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authorThierry Reding <treding@nvidia.com>2014-04-25 11:44:47 -0400
committerStephen Warren <swarren@nvidia.com>2014-04-28 11:57:38 -0400
commit6054dd39de8abf9dba36cc27d53b64f6fd31c524 (patch)
tree0f44b12f5862b980e7443bc6f52b927bafa3ce8c
parent329c39f877323564ba9abee30decac1421636052 (diff)
ARM: tegra: jetson-tk1 - Enable HDMI support
Add HDMI +5V, VDD and PLL regulators and enable the DDC I2C controller. Enable the HDMI device, provide the power supplies as well as the DDC adapter and use pin the standard pin (PN7) for hotplug detection. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
-rw-r--r--arch/arm/boot/dts/tegra124-jetson-tk1.dts39
1 files changed, 37 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
index dd3076d94727..e30a5778f675 100644
--- a/arch/arm/boot/dts/tegra124-jetson-tk1.dts
+++ b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
@@ -16,6 +16,20 @@
16 reg = <0x0 0x80000000 0x0 0x80000000>; 16 reg = <0x0 0x80000000 0x0 0x80000000>;
17 }; 17 };
18 18
19 host1x@0,50000000 {
20 hdmi@0,54280000 {
21 status = "okay";
22
23 hdmi-supply = <&vdd_5v0_hdmi>;
24 pll-supply = <&vdd_hdmi_pll>;
25 vdd-supply = <&vdd_3v3_hdmi>;
26
27 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
28 nvidia,hpd-gpio =
29 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
30 };
31 };
32
19 pinmux: pinmux@0,70000868 { 33 pinmux: pinmux@0,70000868 {
20 pinctrl-names = "default"; 34 pinctrl-names = "default";
21 pinctrl-0 = <&state_default>; 35 pinctrl-0 = <&state_default>;
@@ -1382,7 +1396,7 @@
1382 }; 1396 };
1383 1397
1384 /* HDMI DDC */ 1398 /* HDMI DDC */
1385 i2c@0,7000c700 { 1399 hdmi_ddc: i2c@0,7000c700 {
1386 status = "okay"; 1400 status = "okay";
1387 clock-frequency = <100000>; 1401 clock-frequency = <100000>;
1388 }; 1402 };
@@ -1477,7 +1491,7 @@
1477 regulator-boot-on; 1491 regulator-boot-on;
1478 }; 1492 };
1479 1493
1480 sd4 { 1494 vdd_1v05_run: sd4 {
1481 regulator-name = "+1.05V_RUN"; 1495 regulator-name = "+1.05V_RUN";
1482 regulator-min-microvolt = <1050000>; 1496 regulator-min-microvolt = <1050000>;
1483 regulator-max-microvolt = <1050000>; 1497 regulator-max-microvolt = <1050000>;
@@ -1765,6 +1779,27 @@
1765 enable-active-high; 1779 enable-active-high;
1766 vin-supply = <&vdd_3v3_sys>; 1780 vin-supply = <&vdd_3v3_sys>;
1767 }; 1781 };
1782
1783 vdd_hdmi_pll: regulator@11 {
1784 compatible = "regulator-fixed";
1785 reg = <11>;
1786 regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
1787 regulator-min-microvolt = <1050000>;
1788 regulator-max-microvolt = <1050000>;
1789 gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
1790 vin-supply = <&vdd_1v05_run>;
1791 };
1792
1793 vdd_5v0_hdmi: regulator@12 {
1794 compatible = "regulator-fixed";
1795 reg = <12>;
1796 regulator-name = "+5V_HDMI_CON";
1797 regulator-min-microvolt = <5000000>;
1798 regulator-max-microvolt = <5000000>;
1799 gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
1800 enable-active-high;
1801 vin-supply = <&vdd_5v0_sys>;
1802 };
1768 }; 1803 };
1769 1804
1770 sound { 1805 sound {