diff options
| author | Krzysztof Kozlowski <k.kozlowski@samsung.com> | 2014-06-10 18:18:40 -0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2014-06-10 18:34:46 -0400 |
| commit | 602cb5bbae9868fe48989efa78aca62415309fcf (patch) | |
| tree | 7e6794e8085412d6d67c23b63dcf14695585697f | |
| parent | a992bf836f9c3039a16f4bd068d161c86c6c3e2c (diff) | |
mfd/rtc: sec/s5m: rename SEC* symbols to S5M
Prepare for adding support for S2MPS14 RTC device to the rtc-s5m driver:
1. Rename SEC* symbols to S5M.
2. Add S5M prefix to some of defines which are different between S5M876X
and S2MPS14.
This is only a rename-like patch, new code is not added.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: Sangbeom Kim <sbkim73@samsung.com>
Cc: Samuel Ortiz <sameo@linux.intel.com>
Cc: Marek Szyprowski <m.szyprowski@samsung.com>
Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| -rw-r--r-- | drivers/rtc/rtc-s5m.c | 66 | ||||
| -rw-r--r-- | include/linux/mfd/samsung/rtc.h | 76 |
2 files changed, 71 insertions, 71 deletions
diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c index 8ec2d6a1dbe1..b37df8c790f2 100644 --- a/drivers/rtc/rtc-s5m.c +++ b/drivers/rtc/rtc-s5m.c | |||
| @@ -30,10 +30,10 @@ | |||
| 30 | 30 | ||
| 31 | /* | 31 | /* |
| 32 | * Maximum number of retries for checking changes in UDR field | 32 | * Maximum number of retries for checking changes in UDR field |
| 33 | * of SEC_RTC_UDR_CON register (to limit possible endless loop). | 33 | * of S5M_RTC_UDR_CON register (to limit possible endless loop). |
| 34 | * | 34 | * |
| 35 | * After writing to RTC registers (setting time or alarm) read the UDR field | 35 | * After writing to RTC registers (setting time or alarm) read the UDR field |
| 36 | * in SEC_RTC_UDR_CON register. UDR is auto-cleared when data have | 36 | * in S5M_RTC_UDR_CON register. UDR is auto-cleared when data have |
| 37 | * been transferred. | 37 | * been transferred. |
| 38 | */ | 38 | */ |
| 39 | #define UDR_READ_RETRY_CNT 5 | 39 | #define UDR_READ_RETRY_CNT 5 |
| @@ -54,7 +54,7 @@ static const struct regmap_config s5m_rtc_regmap_config = { | |||
| 54 | .reg_bits = 8, | 54 | .reg_bits = 8, |
| 55 | .val_bits = 8, | 55 | .val_bits = 8, |
| 56 | 56 | ||
| 57 | .max_register = SEC_RTC_REG_MAX, | 57 | .max_register = S5M_RTC_REG_MAX, |
| 58 | }; | 58 | }; |
| 59 | 59 | ||
| 60 | static const struct regmap_config s2mps14_rtc_regmap_config = { | 60 | static const struct regmap_config s2mps14_rtc_regmap_config = { |
| @@ -119,8 +119,8 @@ static inline int s5m8767_wait_for_udr_update(struct s5m_rtc_info *info) | |||
| 119 | unsigned int data; | 119 | unsigned int data; |
| 120 | 120 | ||
| 121 | do { | 121 | do { |
| 122 | ret = regmap_read(info->regmap, SEC_RTC_UDR_CON, &data); | 122 | ret = regmap_read(info->regmap, S5M_RTC_UDR_CON, &data); |
| 123 | } while (--retry && (data & RTC_UDR_MASK) && !ret); | 123 | } while (--retry && (data & S5M_RTC_UDR_MASK) && !ret); |
| 124 | 124 | ||
| 125 | if (!retry) | 125 | if (!retry) |
| 126 | dev_err(info->dev, "waiting for UDR update, reached max number of retries\n"); | 126 | dev_err(info->dev, "waiting for UDR update, reached max number of retries\n"); |
| @@ -133,16 +133,16 @@ static inline int s5m8767_rtc_set_time_reg(struct s5m_rtc_info *info) | |||
| 133 | int ret; | 133 | int ret; |
| 134 | unsigned int data; | 134 | unsigned int data; |
| 135 | 135 | ||
| 136 | ret = regmap_read(info->regmap, SEC_RTC_UDR_CON, &data); | 136 | ret = regmap_read(info->regmap, S5M_RTC_UDR_CON, &data); |
| 137 | if (ret < 0) { | 137 | if (ret < 0) { |
| 138 | dev_err(info->dev, "failed to read update reg(%d)\n", ret); | 138 | dev_err(info->dev, "failed to read update reg(%d)\n", ret); |
| 139 | return ret; | 139 | return ret; |
| 140 | } | 140 | } |
| 141 | 141 | ||
| 142 | data |= RTC_TIME_EN_MASK; | 142 | data |= S5M_RTC_TIME_EN_MASK; |
| 143 | data |= RTC_UDR_MASK; | 143 | data |= S5M_RTC_UDR_MASK; |
| 144 | 144 | ||
| 145 | ret = regmap_write(info->regmap, SEC_RTC_UDR_CON, data); | 145 | ret = regmap_write(info->regmap, S5M_RTC_UDR_CON, data); |
| 146 | if (ret < 0) { | 146 | if (ret < 0) { |
| 147 | dev_err(info->dev, "failed to write update reg(%d)\n", ret); | 147 | dev_err(info->dev, "failed to write update reg(%d)\n", ret); |
| 148 | return ret; | 148 | return ret; |
| @@ -158,17 +158,17 @@ static inline int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info) | |||
| 158 | int ret; | 158 | int ret; |
| 159 | unsigned int data; | 159 | unsigned int data; |
| 160 | 160 | ||
| 161 | ret = regmap_read(info->regmap, SEC_RTC_UDR_CON, &data); | 161 | ret = regmap_read(info->regmap, S5M_RTC_UDR_CON, &data); |
| 162 | if (ret < 0) { | 162 | if (ret < 0) { |
| 163 | dev_err(info->dev, "%s: fail to read update reg(%d)\n", | 163 | dev_err(info->dev, "%s: fail to read update reg(%d)\n", |
| 164 | __func__, ret); | 164 | __func__, ret); |
| 165 | return ret; | 165 | return ret; |
| 166 | } | 166 | } |
| 167 | 167 | ||
| 168 | data &= ~RTC_TIME_EN_MASK; | 168 | data &= ~S5M_RTC_TIME_EN_MASK; |
| 169 | data |= RTC_UDR_MASK; | 169 | data |= S5M_RTC_UDR_MASK; |
| 170 | 170 | ||
| 171 | ret = regmap_write(info->regmap, SEC_RTC_UDR_CON, data); | 171 | ret = regmap_write(info->regmap, S5M_RTC_UDR_CON, data); |
| 172 | if (ret < 0) { | 172 | if (ret < 0) { |
| 173 | dev_err(info->dev, "%s: fail to write update reg(%d)\n", | 173 | dev_err(info->dev, "%s: fail to write update reg(%d)\n", |
| 174 | __func__, ret); | 174 | __func__, ret); |
| @@ -218,7 +218,7 @@ static int s5m_rtc_read_time(struct device *dev, struct rtc_time *tm) | |||
| 218 | u8 data[8]; | 218 | u8 data[8]; |
| 219 | int ret; | 219 | int ret; |
| 220 | 220 | ||
| 221 | ret = regmap_bulk_read(info->regmap, SEC_RTC_SEC, data, 8); | 221 | ret = regmap_bulk_read(info->regmap, S5M_RTC_SEC, data, 8); |
| 222 | if (ret < 0) | 222 | if (ret < 0) |
| 223 | return ret; | 223 | return ret; |
| 224 | 224 | ||
| @@ -266,7 +266,7 @@ static int s5m_rtc_set_time(struct device *dev, struct rtc_time *tm) | |||
| 266 | 1900 + tm->tm_year, 1 + tm->tm_mon, tm->tm_mday, | 266 | 1900 + tm->tm_year, 1 + tm->tm_mon, tm->tm_mday, |
| 267 | tm->tm_hour, tm->tm_min, tm->tm_sec, tm->tm_wday); | 267 | tm->tm_hour, tm->tm_min, tm->tm_sec, tm->tm_wday); |
| 268 | 268 | ||
| 269 | ret = regmap_raw_write(info->regmap, SEC_RTC_SEC, data, 8); | 269 | ret = regmap_raw_write(info->regmap, S5M_RTC_SEC, data, 8); |
| 270 | if (ret < 0) | 270 | if (ret < 0) |
| 271 | return ret; | 271 | return ret; |
| 272 | 272 | ||
| @@ -282,20 +282,20 @@ static int s5m_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |||
| 282 | unsigned int val; | 282 | unsigned int val; |
| 283 | int ret, i; | 283 | int ret, i; |
| 284 | 284 | ||
| 285 | ret = regmap_bulk_read(info->regmap, SEC_ALARM0_SEC, data, 8); | 285 | ret = regmap_bulk_read(info->regmap, S5M_ALARM0_SEC, data, 8); |
| 286 | if (ret < 0) | 286 | if (ret < 0) |
| 287 | return ret; | 287 | return ret; |
| 288 | 288 | ||
| 289 | switch (info->device_type) { | 289 | switch (info->device_type) { |
| 290 | case S5M8763X: | 290 | case S5M8763X: |
| 291 | s5m8763_data_to_tm(data, &alrm->time); | 291 | s5m8763_data_to_tm(data, &alrm->time); |
| 292 | ret = regmap_read(info->regmap, SEC_ALARM0_CONF, &val); | 292 | ret = regmap_read(info->regmap, S5M_ALARM0_CONF, &val); |
| 293 | if (ret < 0) | 293 | if (ret < 0) |
| 294 | return ret; | 294 | return ret; |
| 295 | 295 | ||
| 296 | alrm->enabled = !!val; | 296 | alrm->enabled = !!val; |
| 297 | 297 | ||
| 298 | ret = regmap_read(info->regmap, SEC_RTC_STATUS, &val); | 298 | ret = regmap_read(info->regmap, S5M_RTC_STATUS, &val); |
| 299 | if (ret < 0) | 299 | if (ret < 0) |
| 300 | return ret; | 300 | return ret; |
| 301 | 301 | ||
| @@ -318,7 +318,7 @@ static int s5m_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |||
| 318 | } | 318 | } |
| 319 | 319 | ||
| 320 | alrm->pending = 0; | 320 | alrm->pending = 0; |
| 321 | ret = regmap_read(info->regmap, SEC_RTC_STATUS, &val); | 321 | ret = regmap_read(info->regmap, S5M_RTC_STATUS, &val); |
| 322 | if (ret < 0) | 322 | if (ret < 0) |
| 323 | return ret; | 323 | return ret; |
| 324 | break; | 324 | break; |
| @@ -327,7 +327,7 @@ static int s5m_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |||
| 327 | return -EINVAL; | 327 | return -EINVAL; |
| 328 | } | 328 | } |
| 329 | 329 | ||
| 330 | if (val & ALARM0_STATUS) | 330 | if (val & S5M_ALARM0_STATUS) |
| 331 | alrm->pending = 1; | 331 | alrm->pending = 1; |
| 332 | else | 332 | else |
| 333 | alrm->pending = 0; | 333 | alrm->pending = 0; |
| @@ -341,7 +341,7 @@ static int s5m_rtc_stop_alarm(struct s5m_rtc_info *info) | |||
| 341 | int ret, i; | 341 | int ret, i; |
| 342 | struct rtc_time tm; | 342 | struct rtc_time tm; |
| 343 | 343 | ||
| 344 | ret = regmap_bulk_read(info->regmap, SEC_ALARM0_SEC, data, 8); | 344 | ret = regmap_bulk_read(info->regmap, S5M_ALARM0_SEC, data, 8); |
| 345 | if (ret < 0) | 345 | if (ret < 0) |
| 346 | return ret; | 346 | return ret; |
| 347 | 347 | ||
| @@ -352,14 +352,14 @@ static int s5m_rtc_stop_alarm(struct s5m_rtc_info *info) | |||
| 352 | 352 | ||
| 353 | switch (info->device_type) { | 353 | switch (info->device_type) { |
| 354 | case S5M8763X: | 354 | case S5M8763X: |
| 355 | ret = regmap_write(info->regmap, SEC_ALARM0_CONF, 0); | 355 | ret = regmap_write(info->regmap, S5M_ALARM0_CONF, 0); |
| 356 | break; | 356 | break; |
| 357 | 357 | ||
| 358 | case S5M8767X: | 358 | case S5M8767X: |
| 359 | for (i = 0; i < 7; i++) | 359 | for (i = 0; i < 7; i++) |
| 360 | data[i] &= ~ALARM_ENABLE_MASK; | 360 | data[i] &= ~ALARM_ENABLE_MASK; |
| 361 | 361 | ||
| 362 | ret = regmap_raw_write(info->regmap, SEC_ALARM0_SEC, data, 8); | 362 | ret = regmap_raw_write(info->regmap, S5M_ALARM0_SEC, data, 8); |
| 363 | if (ret < 0) | 363 | if (ret < 0) |
| 364 | return ret; | 364 | return ret; |
| 365 | 365 | ||
| @@ -381,7 +381,7 @@ static int s5m_rtc_start_alarm(struct s5m_rtc_info *info) | |||
| 381 | u8 alarm0_conf; | 381 | u8 alarm0_conf; |
| 382 | struct rtc_time tm; | 382 | struct rtc_time tm; |
| 383 | 383 | ||
| 384 | ret = regmap_bulk_read(info->regmap, SEC_ALARM0_SEC, data, 8); | 384 | ret = regmap_bulk_read(info->regmap, S5M_ALARM0_SEC, data, 8); |
| 385 | if (ret < 0) | 385 | if (ret < 0) |
| 386 | return ret; | 386 | return ret; |
| 387 | 387 | ||
| @@ -393,7 +393,7 @@ static int s5m_rtc_start_alarm(struct s5m_rtc_info *info) | |||
| 393 | switch (info->device_type) { | 393 | switch (info->device_type) { |
| 394 | case S5M8763X: | 394 | case S5M8763X: |
| 395 | alarm0_conf = 0x77; | 395 | alarm0_conf = 0x77; |
| 396 | ret = regmap_write(info->regmap, SEC_ALARM0_CONF, alarm0_conf); | 396 | ret = regmap_write(info->regmap, S5M_ALARM0_CONF, alarm0_conf); |
| 397 | break; | 397 | break; |
| 398 | 398 | ||
| 399 | case S5M8767X: | 399 | case S5M8767X: |
| @@ -408,7 +408,7 @@ static int s5m_rtc_start_alarm(struct s5m_rtc_info *info) | |||
| 408 | if (data[RTC_YEAR1] & 0x7f) | 408 | if (data[RTC_YEAR1] & 0x7f) |
| 409 | data[RTC_YEAR1] |= ALARM_ENABLE_MASK; | 409 | data[RTC_YEAR1] |= ALARM_ENABLE_MASK; |
| 410 | 410 | ||
| 411 | ret = regmap_raw_write(info->regmap, SEC_ALARM0_SEC, data, 8); | 411 | ret = regmap_raw_write(info->regmap, S5M_ALARM0_SEC, data, 8); |
| 412 | if (ret < 0) | 412 | if (ret < 0) |
| 413 | return ret; | 413 | return ret; |
| 414 | ret = s5m8767_rtc_set_alarm_reg(info); | 414 | ret = s5m8767_rtc_set_alarm_reg(info); |
| @@ -450,7 +450,7 @@ static int s5m_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |||
| 450 | if (ret < 0) | 450 | if (ret < 0) |
| 451 | return ret; | 451 | return ret; |
| 452 | 452 | ||
| 453 | ret = regmap_raw_write(info->regmap, SEC_ALARM0_SEC, data, 8); | 453 | ret = regmap_raw_write(info->regmap, S5M_ALARM0_SEC, data, 8); |
| 454 | if (ret < 0) | 454 | if (ret < 0) |
| 455 | return ret; | 455 | return ret; |
| 456 | 456 | ||
| @@ -495,7 +495,7 @@ static const struct rtc_class_ops s5m_rtc_ops = { | |||
| 495 | static void s5m_rtc_enable_wtsr(struct s5m_rtc_info *info, bool enable) | 495 | static void s5m_rtc_enable_wtsr(struct s5m_rtc_info *info, bool enable) |
| 496 | { | 496 | { |
| 497 | int ret; | 497 | int ret; |
| 498 | ret = regmap_update_bits(info->regmap, SEC_WTSR_SMPL_CNTL, | 498 | ret = regmap_update_bits(info->regmap, S5M_WTSR_SMPL_CNTL, |
| 499 | WTSR_ENABLE_MASK, | 499 | WTSR_ENABLE_MASK, |
| 500 | enable ? WTSR_ENABLE_MASK : 0); | 500 | enable ? WTSR_ENABLE_MASK : 0); |
| 501 | if (ret < 0) | 501 | if (ret < 0) |
| @@ -506,7 +506,7 @@ static void s5m_rtc_enable_wtsr(struct s5m_rtc_info *info, bool enable) | |||
| 506 | static void s5m_rtc_enable_smpl(struct s5m_rtc_info *info, bool enable) | 506 | static void s5m_rtc_enable_smpl(struct s5m_rtc_info *info, bool enable) |
| 507 | { | 507 | { |
| 508 | int ret; | 508 | int ret; |
| 509 | ret = regmap_update_bits(info->regmap, SEC_WTSR_SMPL_CNTL, | 509 | ret = regmap_update_bits(info->regmap, S5M_WTSR_SMPL_CNTL, |
| 510 | SMPL_ENABLE_MASK, | 510 | SMPL_ENABLE_MASK, |
| 511 | enable ? SMPL_ENABLE_MASK : 0); | 511 | enable ? SMPL_ENABLE_MASK : 0); |
| 512 | if (ret < 0) | 512 | if (ret < 0) |
| @@ -521,7 +521,7 @@ static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info) | |||
| 521 | int ret; | 521 | int ret; |
| 522 | struct rtc_time tm; | 522 | struct rtc_time tm; |
| 523 | 523 | ||
| 524 | ret = regmap_read(info->regmap, SEC_RTC_UDR_CON, &tp_read); | 524 | ret = regmap_read(info->regmap, S5M_RTC_UDR_CON, &tp_read); |
| 525 | if (ret < 0) { | 525 | if (ret < 0) { |
| 526 | dev_err(info->dev, "%s: fail to read control reg(%d)\n", | 526 | dev_err(info->dev, "%s: fail to read control reg(%d)\n", |
| 527 | __func__, ret); | 527 | __func__, ret); |
| @@ -533,7 +533,7 @@ static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info) | |||
| 533 | data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT); | 533 | data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT); |
| 534 | 534 | ||
| 535 | info->rtc_24hr_mode = 1; | 535 | info->rtc_24hr_mode = 1; |
| 536 | ret = regmap_raw_write(info->regmap, SEC_ALARM0_CONF, data, 2); | 536 | ret = regmap_raw_write(info->regmap, S5M_ALARM0_CONF, data, 2); |
| 537 | if (ret < 0) { | 537 | if (ret < 0) { |
| 538 | dev_err(info->dev, "%s: fail to write controlm reg(%d)\n", | 538 | dev_err(info->dev, "%s: fail to write controlm reg(%d)\n", |
| 539 | __func__, ret); | 539 | __func__, ret); |
| @@ -555,7 +555,7 @@ static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info) | |||
| 555 | ret = s5m_rtc_set_time(info->dev, &tm); | 555 | ret = s5m_rtc_set_time(info->dev, &tm); |
| 556 | } | 556 | } |
| 557 | 557 | ||
| 558 | ret = regmap_update_bits(info->regmap, SEC_RTC_UDR_CON, | 558 | ret = regmap_update_bits(info->regmap, S5M_RTC_UDR_CON, |
| 559 | RTC_TCON_MASK, tp_read | RTC_TCON_MASK); | 559 | RTC_TCON_MASK, tp_read | RTC_TCON_MASK); |
| 560 | if (ret < 0) | 560 | if (ret < 0) |
| 561 | dev_err(info->dev, "%s: fail to update TCON reg(%d)\n", | 561 | dev_err(info->dev, "%s: fail to update TCON reg(%d)\n", |
| @@ -676,7 +676,7 @@ static void s5m_rtc_shutdown(struct platform_device *pdev) | |||
| 676 | if (info->wtsr_smpl) { | 676 | if (info->wtsr_smpl) { |
| 677 | for (i = 0; i < 3; i++) { | 677 | for (i = 0; i < 3; i++) { |
| 678 | s5m_rtc_enable_wtsr(info, false); | 678 | s5m_rtc_enable_wtsr(info, false); |
| 679 | regmap_read(info->regmap, SEC_WTSR_SMPL_CNTL, &val); | 679 | regmap_read(info->regmap, S5M_WTSR_SMPL_CNTL, &val); |
| 680 | pr_debug("%s: WTSR_SMPL reg(0x%02x)\n", __func__, val); | 680 | pr_debug("%s: WTSR_SMPL reg(0x%02x)\n", __func__, val); |
| 681 | if (val & WTSR_ENABLE_MASK) | 681 | if (val & WTSR_ENABLE_MASK) |
| 682 | pr_emerg("%s: fail to disable WTSR\n", | 682 | pr_emerg("%s: fail to disable WTSR\n", |
diff --git a/include/linux/mfd/samsung/rtc.h b/include/linux/mfd/samsung/rtc.h index 3e02b768d537..207fcfbde82e 100644 --- a/include/linux/mfd/samsung/rtc.h +++ b/include/linux/mfd/samsung/rtc.h | |||
| @@ -18,38 +18,38 @@ | |||
| 18 | #ifndef __LINUX_MFD_SEC_RTC_H | 18 | #ifndef __LINUX_MFD_SEC_RTC_H |
| 19 | #define __LINUX_MFD_SEC_RTC_H | 19 | #define __LINUX_MFD_SEC_RTC_H |
| 20 | 20 | ||
| 21 | enum sec_rtc_reg { | 21 | enum s5m_rtc_reg { |
| 22 | SEC_RTC_SEC, | 22 | S5M_RTC_SEC, |
| 23 | SEC_RTC_MIN, | 23 | S5M_RTC_MIN, |
| 24 | SEC_RTC_HOUR, | 24 | S5M_RTC_HOUR, |
| 25 | SEC_RTC_WEEKDAY, | 25 | S5M_RTC_WEEKDAY, |
| 26 | SEC_RTC_DATE, | 26 | S5M_RTC_DATE, |
| 27 | SEC_RTC_MONTH, | 27 | S5M_RTC_MONTH, |
| 28 | SEC_RTC_YEAR1, | 28 | S5M_RTC_YEAR1, |
| 29 | SEC_RTC_YEAR2, | 29 | S5M_RTC_YEAR2, |
| 30 | SEC_ALARM0_SEC, | 30 | S5M_ALARM0_SEC, |
| 31 | SEC_ALARM0_MIN, | 31 | S5M_ALARM0_MIN, |
| 32 | SEC_ALARM0_HOUR, | 32 | S5M_ALARM0_HOUR, |
| 33 | SEC_ALARM0_WEEKDAY, | 33 | S5M_ALARM0_WEEKDAY, |
| 34 | SEC_ALARM0_DATE, | 34 | S5M_ALARM0_DATE, |
| 35 | SEC_ALARM0_MONTH, | 35 | S5M_ALARM0_MONTH, |
| 36 | SEC_ALARM0_YEAR1, | 36 | S5M_ALARM0_YEAR1, |
| 37 | SEC_ALARM0_YEAR2, | 37 | S5M_ALARM0_YEAR2, |
| 38 | SEC_ALARM1_SEC, | 38 | S5M_ALARM1_SEC, |
| 39 | SEC_ALARM1_MIN, | 39 | S5M_ALARM1_MIN, |
| 40 | SEC_ALARM1_HOUR, | 40 | S5M_ALARM1_HOUR, |
| 41 | SEC_ALARM1_WEEKDAY, | 41 | S5M_ALARM1_WEEKDAY, |
| 42 | SEC_ALARM1_DATE, | 42 | S5M_ALARM1_DATE, |
| 43 | SEC_ALARM1_MONTH, | 43 | S5M_ALARM1_MONTH, |
| 44 | SEC_ALARM1_YEAR1, | 44 | S5M_ALARM1_YEAR1, |
| 45 | SEC_ALARM1_YEAR2, | 45 | S5M_ALARM1_YEAR2, |
| 46 | SEC_ALARM0_CONF, | 46 | S5M_ALARM0_CONF, |
| 47 | SEC_ALARM1_CONF, | 47 | S5M_ALARM1_CONF, |
| 48 | SEC_RTC_STATUS, | 48 | S5M_RTC_STATUS, |
| 49 | SEC_WTSR_SMPL_CNTL, | 49 | S5M_WTSR_SMPL_CNTL, |
| 50 | SEC_RTC_UDR_CON, | 50 | S5M_RTC_UDR_CON, |
| 51 | 51 | ||
| 52 | SEC_RTC_REG_MAX, | 52 | S5M_RTC_REG_MAX, |
| 53 | }; | 53 | }; |
| 54 | 54 | ||
| 55 | enum s2mps_rtc_reg { | 55 | enum s2mps_rtc_reg { |
| @@ -88,9 +88,9 @@ enum s2mps_rtc_reg { | |||
| 88 | #define HOUR_12 (1 << 7) | 88 | #define HOUR_12 (1 << 7) |
| 89 | #define HOUR_AMPM (1 << 6) | 89 | #define HOUR_AMPM (1 << 6) |
| 90 | #define HOUR_PM (1 << 5) | 90 | #define HOUR_PM (1 << 5) |
| 91 | #define ALARM0_STATUS (1 << 1) | 91 | #define S5M_ALARM0_STATUS (1 << 1) |
| 92 | #define ALARM1_STATUS (1 << 2) | 92 | #define S5M_ALARM1_STATUS (1 << 2) |
| 93 | #define UPDATE_AD (1 << 0) | 93 | #define S5M_UPDATE_AD (1 << 0) |
| 94 | 94 | ||
| 95 | #define S2MPS_ALARM0_STATUS (1 << 2) | 95 | #define S2MPS_ALARM0_STATUS (1 << 2) |
| 96 | #define S2MPS_ALARM1_STATUS (1 << 1) | 96 | #define S2MPS_ALARM1_STATUS (1 << 1) |
| @@ -101,16 +101,16 @@ enum s2mps_rtc_reg { | |||
| 101 | #define MODEL24_SHIFT 1 | 101 | #define MODEL24_SHIFT 1 |
| 102 | #define MODEL24_MASK (1 << MODEL24_SHIFT) | 102 | #define MODEL24_MASK (1 << MODEL24_SHIFT) |
| 103 | /* RTC Update Register1 */ | 103 | /* RTC Update Register1 */ |
| 104 | #define RTC_UDR_SHIFT 0 | 104 | #define S5M_RTC_UDR_SHIFT 0 |
| 105 | #define RTC_UDR_MASK (1 << RTC_UDR_SHIFT) | 105 | #define S5M_RTC_UDR_MASK (1 << S5M_RTC_UDR_SHIFT) |
| 106 | #define S2MPS_RTC_WUDR_SHIFT 4 | 106 | #define S2MPS_RTC_WUDR_SHIFT 4 |
| 107 | #define S2MPS_RTC_WUDR_MASK (1 << S2MPS_RTC_WUDR_SHIFT) | 107 | #define S2MPS_RTC_WUDR_MASK (1 << S2MPS_RTC_WUDR_SHIFT) |
| 108 | #define S2MPS_RTC_RUDR_SHIFT 0 | 108 | #define S2MPS_RTC_RUDR_SHIFT 0 |
| 109 | #define S2MPS_RTC_RUDR_MASK (1 << S2MPS_RTC_RUDR_SHIFT) | 109 | #define S2MPS_RTC_RUDR_MASK (1 << S2MPS_RTC_RUDR_SHIFT) |
| 110 | #define RTC_TCON_SHIFT 1 | 110 | #define RTC_TCON_SHIFT 1 |
| 111 | #define RTC_TCON_MASK (1 << RTC_TCON_SHIFT) | 111 | #define RTC_TCON_MASK (1 << RTC_TCON_SHIFT) |
| 112 | #define RTC_TIME_EN_SHIFT 3 | 112 | #define S5M_RTC_TIME_EN_SHIFT 3 |
| 113 | #define RTC_TIME_EN_MASK (1 << RTC_TIME_EN_SHIFT) | 113 | #define S5M_RTC_TIME_EN_MASK (1 << S5M_RTC_TIME_EN_SHIFT) |
| 114 | 114 | ||
| 115 | /* RTC Hour register */ | 115 | /* RTC Hour register */ |
| 116 | #define HOUR_PM_SHIFT 6 | 116 | #define HOUR_PM_SHIFT 6 |
