Merge tag 'pinctrl-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pinctrl fixes from Linus Walleij: "A first round of pinctrl fixes for v3.8: - i.MX5 register configuration - Swap a kfree to devm_kfree() to avoid memory corruption in the at91 driver - Add the missing device tree binding doc for the SIRF pin controller - Enable the SIRF GPIO pull up/down configuration from the device tree, it was previously retired from the hard-coded approach. - NULL check for the prcm_base in the Nomadik pin controller. - Provide the prcm_base from the device tree in the DT boot path for the Nomadik pin controller." * tag 'pinctrl-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: ARM: ux500: add pinctrl address resources pinctrl: nomadik: return if prcm_base is NULL pinctrl: sirf: enable GPIO pullup/down configuration from dts pinctrl: sirf: add missing DT-binding document pinctrl: fix comment mistake drivers/pinctrl/pinctrl-at91.c: convert kfree to devm_kfree pinctrl: imx5: fix GPIO_8 pad CAN1_RXCAN configuration
author: Linus Torvalds <torvalds@linux-foundation.org> 2013-01-03 16:10:18 -0500
committer: Linus Torvalds <torvalds@linux-foundation.org> 2013-01-03 16:10:18 -0500
commit: 5f738967e89584f99c6a11c6bf09b16c50b6a03e (patch)
tree: c807b116deb121277799f316052349a5fa663af0
parent: 2318aa272072f6906de8e00a332da1485506b3c5 (diff)
parent: 9fcb4cc2d7dd192ae718f0e7484c6f5c08b8af23 (diff)
8 files changed, 113 insertions, 6 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-sirf.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-sirf.txt
new file mode 100644
index 000000000000..c596a6ad3285
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-sirf.txt
@@ -0,0 +1,47 @@
+CSR SiRFprimaII pinmux controller
+Required properties:
+- compatible    : "sirf,prima2-pinctrl"
+- reg           : Address range of the pinctrl registers
+- interrupts    : Interrupts used by every GPIO group
+- gpio-controller : Indicates this device is a GPIO controller
+- interrupt-controller  : Marks the device node as an interrupt controller
+Optional properties:
+- sirf,pullups : if n-th bit of m-th bank is set, set a pullup on GPIO-n of bank m
+- sirf,pulldowns : if n-th bit of m-th bank is set, set a pulldown on GPIO-n of bank m
+Please refer to pinctrl-bindings.txt in this directory for details of the common
+pinctrl bindings used by client devices.
+SiRFprimaII's pinmux nodes act as a container for an abitrary number of subnodes.
+Each of these subnodes represents some desired configuration for a group of pins.
+Required subnode-properties:
+- sirf,pins : An array of strings. Each string contains the name of a group.
+- sirf,function: A string containing the name of the function to mux to the
+  group.
+  Valid values for group and function names can be found from looking at the
+  group and function arrays in driver files:
+  drivers/pinctrl/pinctrl-sirf.c
+For example, pinctrl might have subnodes like the following:
+ uart2_pins_a: uart2@0 {
+         uart {
+                 sirf,pins = "uart2grp";
+                 sirf,function = "uart2";
+         };
+ };
+ uart2_noflow_pins_a: uart2@1 {
+         uart {
+                 sirf,pins = "uart2_nostreamctrlgrp";
+                 sirf,function = "uart2_nostreamctrl";
+         };
+ };
+For a specific board, if it wants to use uart2 without hardware flow control,
+it can add the following to its board-specific .dts file.
+uart2: uart@0xb0070000 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart2_noflow_pins_a>;
+}
diff --git a/arch/arm/boot/dts/dbx5x0.dtsi b/arch/arm/boot/dts/dbx5x0.dtsi
index 2efd9c891bc9..63f2fbcfe819 100644
--- a/arch/arm/boot/dts/dbx5x0.dtsi
+++ b/arch/arm/boot/dts/dbx5x0.dtsi
@@ -170,7 +170,9 @@
                        gpio-bank = <8>;
                };
-                pinctrl {
+                pinctrl@80157000 {
+                        // This is actually the PRCMU base address
+                        reg = <0x80157000 0x2000>;
                        compatible = "stericsson,nmk_pinctrl";
                };
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index db0bb75e2c76..5b286e06474c 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -285,7 +285,8 @@ static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
        OF_DEV_AUXDATA("st,nomadik-i2c", 0x80110000, "nmk-i2c.3", NULL),
        OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL),
        /* Requires device name bindings. */
-        OF_DEV_AUXDATA("stericsson,nmk_pinctrl", 0, "pinctrl-db8500", NULL),
+        OF_DEV_AUXDATA("stericsson,nmk_pinctrl", U8500_PRCMU_BASE,
+                "pinctrl-db8500", NULL),
        /* Requires clock name and DMA bindings. */
        OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
                "ux500-msp-i2s.0", &msp0_platform_data),
diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c
index 5cdee8669ea3..59f5a965bdc4 100644
--- a/drivers/pinctrl/core.c
+++ b/drivers/pinctrl/core.c
@@ -700,7 +700,7 @@ static struct pinctrl *create_pinctrl(struct device *dev)
                }
        }
-        /* Add the pinmux to the global list */
+        /* Add the pinctrl handle to the global list */
        list_add_tail(&p->node, &pinctrl_list);
        return p;
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
index c5e757157183..bff54bfaff43 100644
--- a/drivers/pinctrl/pinctrl-at91.c
+++ b/drivers/pinctrl/pinctrl-at91.c
@@ -265,7 +265,7 @@ static int at91_dt_node_to_map(struct pinctrl_dev *pctldev,
        /* create mux map */
        parent = of_get_parent(np);
        if (!parent) {
-                kfree(new_map);
+                devm_kfree(pctldev->dev, new_map);
                return -EINVAL;
        }
        new_map[0].type = PIN_MAP_TYPE_MUX_GROUP;
diff --git a/drivers/pinctrl/pinctrl-imx53.c b/drivers/pinctrl/pinctrl-imx53.c
index ec4048691775..af571dc3dc63 100644
--- a/drivers/pinctrl/pinctrl-imx53.c
+++ b/drivers/pinctrl/pinctrl-imx53.c
@@ -1371,7 +1371,7 @@ static struct imx_pin_reg imx53_pin_regs[] = {
        IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 0, 0x7F8, 1), /* MX53_PAD_GPIO_8__ESAI1_TX5_RX0 */
        IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 1, 0x000, 0), /* MX53_PAD_GPIO_8__GPIO1_8 */
        IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 2, 0x000, 0), /* MX53_PAD_GPIO_8__EPIT2_EPITO */
-        IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 3, 0x760, 3), /* MX53_PAD_GPIO_8__CAN1_RXCAN */
+        IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 3, 0x760, 2), /* MX53_PAD_GPIO_8__CAN1_RXCAN */
        IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 4, 0x880, 5), /* MX53_PAD_GPIO_8__UART2_RXD_MUX */
        IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 5, 0x000, 0), /* MX53_PAD_GPIO_8__FIRI_TXD */
        IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 6, 0x000, 0), /* MX53_PAD_GPIO_8__SPDIF_SRCLK */
diff --git a/drivers/pinctrl/pinctrl-nomadik.c b/drivers/pinctrl/pinctrl-nomadik.c
index ef66f98e9202..015b093287a4 100644
--- a/drivers/pinctrl/pinctrl-nomadik.c
+++ b/drivers/pinctrl/pinctrl-nomadik.c
@@ -259,6 +259,9 @@ static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct,
        const struct prcm_gpiocr_altcx_pin_desc *pin_desc;
        const u16 *gpiocr_regs;
+        if (!npct->prcm_base)
+                return;
        if (alt_num > PRCM_IDX_GPIOCR_ALTC_MAX) {
                dev_err(npct->dev, "PRCM GPIOCR: alternate-C%i is invalid\n",
                        alt_num);
@@ -682,6 +685,9 @@ static int nmk_prcm_gpiocr_get_mode(struct pinctrl_dev *pctldev, int gpio)
        const struct prcm_gpiocr_altcx_pin_desc *pin_desc;
        const u16 *gpiocr_regs;
+        if (!npct->prcm_base)
+                return NMK_GPIO_ALT_C;
        for (i = 0; i < npct->soc->npins_altcx; i++) {
                if (npct->soc->altcx_pins[i].pin == gpio)
                        break;
@@ -1887,9 +1893,12 @@ static int __devinit nmk_pinctrl_probe(struct platform_device *pdev)
                                "failed to ioremap PRCM registers\n");
                        return -ENOMEM;
                }
-        } else {
+        } else if (version == PINCTRL_NMK_STN8815) {
                dev_info(&pdev->dev,
                         "No PRCM base, assume no ALT-Cx control is available\n");
+        } else {
+                dev_err(&pdev->dev, "missing PRCM base address\n");
+                return -EINVAL;
        }
        /*
diff --git a/drivers/pinctrl/pinctrl-sirf.c b/drivers/pinctrl/pinctrl-sirf.c
index a4f0c5e487d5..30e1a38293a0 100644
--- a/drivers/pinctrl/pinctrl-sirf.c
+++ b/drivers/pinctrl/pinctrl-sirf.c
@@ -1663,6 +1663,44 @@ const struct irq_domain_ops sirfsoc_gpio_irq_simple_ops = {
        .xlate = irq_domain_xlate_twocell,
 };
+static void sirfsoc_gpio_set_pullup(const u32 *pullups)
+{
+        int i, n;
+        const unsigned long *p = (const unsigned long *)pullups;
+        for (i = 0; i < SIRFSOC_GPIO_NO_OF_BANKS; i++) {
+                n = find_first_bit(p + i, BITS_PER_LONG);
+                while (n < BITS_PER_LONG) {
+                        u32 offset = SIRFSOC_GPIO_CTRL(i, n);
+                        u32 val = readl(sgpio_bank[i].chip.regs + offset);
+                        val |= SIRFSOC_GPIO_CTL_PULL_MASK;
+                        val |= SIRFSOC_GPIO_CTL_PULL_HIGH;
+                        writel(val, sgpio_bank[i].chip.regs + offset);
+                        n = find_next_bit(p + i, BITS_PER_LONG, n + 1);
+                }
+        }
+}
+static void sirfsoc_gpio_set_pulldown(const u32 *pulldowns)
+{
+        int i, n;
+        const unsigned long *p = (const unsigned long *)pulldowns;
+        for (i = 0; i < SIRFSOC_GPIO_NO_OF_BANKS; i++) {
+                n = find_first_bit(p + i, BITS_PER_LONG);
+                while (n < BITS_PER_LONG) {
+                        u32 offset = SIRFSOC_GPIO_CTRL(i, n);
+                        u32 val = readl(sgpio_bank[i].chip.regs + offset);
+                        val |= SIRFSOC_GPIO_CTL_PULL_MASK;
+                        val &= ~SIRFSOC_GPIO_CTL_PULL_HIGH;
+                        writel(val, sgpio_bank[i].chip.regs + offset);
+                        n = find_next_bit(p + i, BITS_PER_LONG, n + 1);
+                }
+        }
+}
 static int __devinit sirfsoc_gpio_probe(struct device_node *np)
 {
        int i, err = 0;
@@ -1671,6 +1709,8 @@ static int __devinit sirfsoc_gpio_probe(struct device_node *np)
        struct platform_device *pdev;
        bool is_marco = false;
+        u32 pullups[SIRFSOC_GPIO_NO_OF_BANKS], pulldowns[SIRFSOC_GPIO_NO_OF_BANKS];
        pdev = of_find_device_by_node(np);
        if (!pdev)
                return -ENODEV;
@@ -1726,6 +1766,14 @@ static int __devinit sirfsoc_gpio_probe(struct device_node *np)
                irq_set_handler_data(bank->parent_irq, bank);
        }
+        if (!of_property_read_u32_array(np, "sirf,pullups", pullups,
+                SIRFSOC_GPIO_NO_OF_BANKS))
+                sirfsoc_gpio_set_pullup(pullups);
+        if (!of_property_read_u32_array(np, "sirf,pulldowns", pulldowns,
+                SIRFSOC_GPIO_NO_OF_BANKS))
+                sirfsoc_gpio_set_pulldown(pulldowns);
        return 0;
 out:
author	Linus Torvalds <torvalds@linux-foundation.org>	2013-01-03 16:10:18 -0500
committer	Linus Torvalds <torvalds@linux-foundation.org>	2013-01-03 16:10:18 -0500
commit	5f738967e89584f99c6a11c6bf09b16c50b6a03e (patch)
tree	c807b116deb121277799f316052349a5fa663af0
parent	2318aa272072f6906de8e00a332da1485506b3c5 (diff)
parent	9fcb4cc2d7dd192ae718f0e7484c6f5c08b8af23 (diff)

diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-sirf.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-sirf.txt new file mode 100644 index 000000000000..c596a6ad3285 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-sirf.txt
@@ -0,0 +1,47 @@
		1	CSR SiRFprimaII pinmux controller
		2
		3	Required properties:
		4	- compatible : "sirf,prima2-pinctrl"
		5	- reg : Address range of the pinctrl registers
		6	- interrupts : Interrupts used by every GPIO group
		7	- gpio-controller : Indicates this device is a GPIO controller
		8	- interrupt-controller : Marks the device node as an interrupt controller
		9	Optional properties:
		10	- sirf,pullups : if n-th bit of m-th bank is set, set a pullup on GPIO-n of bank m
		11	- sirf,pulldowns : if n-th bit of m-th bank is set, set a pulldown on GPIO-n of bank m
		12
		13	Please refer to pinctrl-bindings.txt in this directory for details of the common
		14	pinctrl bindings used by client devices.
		15
		16	SiRFprimaII's pinmux nodes act as a container for an abitrary number of subnodes.
		17	Each of these subnodes represents some desired configuration for a group of pins.
		18
		19	Required subnode-properties:
		20	- sirf,pins : An array of strings. Each string contains the name of a group.
		21	- sirf,function: A string containing the name of the function to mux to the
		22	group.
		23
		24	Valid values for group and function names can be found from looking at the
		25	group and function arrays in driver files:
		26	drivers/pinctrl/pinctrl-sirf.c
		27
		28	For example, pinctrl might have subnodes like the following:
		29	uart2_pins_a: uart2@0 {
		30	uart {
		31	sirf,pins = "uart2grp";
		32	sirf,function = "uart2";
		33	};
		34	};
		35	uart2_noflow_pins_a: uart2@1 {
		36	uart {
		37	sirf,pins = "uart2_nostreamctrlgrp";
		38	sirf,function = "uart2_nostreamctrl";
		39	};
		40	};
		41
		42	For a specific board, if it wants to use uart2 without hardware flow control,
		43	it can add the following to its board-specific .dts file.
		44	uart2: uart@0xb0070000 {
		45	pinctrl-names = "default";
		46	pinctrl-0 = <&uart2_noflow_pins_a>;
		47	}


diff --git a/arch/arm/boot/dts/dbx5x0.dtsi b/arch/arm/boot/dts/dbx5x0.dtsi index 2efd9c891bc9..63f2fbcfe819 100644 --- a/arch/arm/boot/dts/dbx5x0.dtsi +++ b/arch/arm/boot/dts/dbx5x0.dtsi
@@ -170,7 +170,9 @@
170	gpio-bank = <8>;	170	gpio-bank = <8>;
171	};	171	};
172		172
173	pinctrl {	173	pinctrl@80157000 {
		174	// This is actually the PRCMU base address
		175	reg = <0x80157000 0x2000>;
174	compatible = "stericsson,nmk_pinctrl";	176	compatible = "stericsson,nmk_pinctrl";
175	};	177	};
176		178


diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c index db0bb75e2c76..5b286e06474c 100644 --- a/arch/arm/mach-ux500/cpu-db8500.c +++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -285,7 +285,8 @@ static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
285	OF_DEV_AUXDATA("st,nomadik-i2c", 0x80110000, "nmk-i2c.3", NULL),	285	OF_DEV_AUXDATA("st,nomadik-i2c", 0x80110000, "nmk-i2c.3", NULL),
286	OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL),	286	OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL),
287	/* Requires device name bindings. */	287	/* Requires device name bindings. */
288	OF_DEV_AUXDATA("stericsson,nmk_pinctrl", 0, "pinctrl-db8500", NULL),	288	OF_DEV_AUXDATA("stericsson,nmk_pinctrl", U8500_PRCMU_BASE,
		289	"pinctrl-db8500", NULL),
289	/* Requires clock name and DMA bindings. */	290	/* Requires clock name and DMA bindings. */
290	OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,	291	OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
291	"ux500-msp-i2s.0", &msp0_platform_data),	292	"ux500-msp-i2s.0", &msp0_platform_data),


diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c index 5cdee8669ea3..59f5a965bdc4 100644 --- a/drivers/pinctrl/core.c +++ b/drivers/pinctrl/core.c
@@ -700,7 +700,7 @@ static struct pinctrl create_pinctrl(struct device dev)
700	}	700	}
701	}	701	}
702		702
703	/* Add the pinmux to the global list */	703	/* Add the pinctrl handle to the global list */
704	list_add_tail(&p->node, &pinctrl_list);	704	list_add_tail(&p->node, &pinctrl_list);
705		705
706	return p;	706	return p;


diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c index c5e757157183..bff54bfaff43 100644 --- a/drivers/pinctrl/pinctrl-at91.c +++ b/drivers/pinctrl/pinctrl-at91.c
@@ -265,7 +265,7 @@ static int at91_dt_node_to_map(struct pinctrl_dev *pctldev,
265	/* create mux map */	265	/* create mux map */
266	parent = of_get_parent(np);	266	parent = of_get_parent(np);
267	if (!parent) {	267	if (!parent) {
268	kfree(new_map);	268	devm_kfree(pctldev->dev, new_map);
269	return -EINVAL;	269	return -EINVAL;
270	}	270	}
271	new_map[0].type = PIN_MAP_TYPE_MUX_GROUP;	271	new_map[0].type = PIN_MAP_TYPE_MUX_GROUP;


diff --git a/drivers/pinctrl/pinctrl-imx53.c b/drivers/pinctrl/pinctrl-imx53.c index ec4048691775..af571dc3dc63 100644 --- a/drivers/pinctrl/pinctrl-imx53.c +++ b/drivers/pinctrl/pinctrl-imx53.c
@@ -1371,7 +1371,7 @@ static struct imx_pin_reg imx53_pin_regs[] = {
1371	IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 0, 0x7F8, 1), /* MX53_PAD_GPIO_8__ESAI1_TX5_RX0 */	1371	IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 0, 0x7F8, 1), /* MX53_PAD_GPIO_8__ESAI1_TX5_RX0 */
1372	IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 1, 0x000, 0), /* MX53_PAD_GPIO_8__GPIO1_8 */	1372	IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 1, 0x000, 0), /* MX53_PAD_GPIO_8__GPIO1_8 */
1373	IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 2, 0x000, 0), /* MX53_PAD_GPIO_8__EPIT2_EPITO */	1373	IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 2, 0x000, 0), /* MX53_PAD_GPIO_8__EPIT2_EPITO */
1374	IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 3, 0x760, 3), /* MX53_PAD_GPIO_8__CAN1_RXCAN */	1374	IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 3, 0x760, 2), /* MX53_PAD_GPIO_8__CAN1_RXCAN */
1375	IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 4, 0x880, 5), /* MX53_PAD_GPIO_8__UART2_RXD_MUX */	1375	IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 4, 0x880, 5), /* MX53_PAD_GPIO_8__UART2_RXD_MUX */
1376	IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 5, 0x000, 0), /* MX53_PAD_GPIO_8__FIRI_TXD */	1376	IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 5, 0x000, 0), /* MX53_PAD_GPIO_8__FIRI_TXD */
1377	IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 6, 0x000, 0), /* MX53_PAD_GPIO_8__SPDIF_SRCLK */	1377	IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 6, 0x000, 0), /* MX53_PAD_GPIO_8__SPDIF_SRCLK */


diff --git a/drivers/pinctrl/pinctrl-nomadik.c b/drivers/pinctrl/pinctrl-nomadik.c index ef66f98e9202..015b093287a4 100644 --- a/drivers/pinctrl/pinctrl-nomadik.c +++ b/drivers/pinctrl/pinctrl-nomadik.c
@@ -259,6 +259,9 @@ static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct,
259	const struct prcm_gpiocr_altcx_pin_desc *pin_desc;	259	const struct prcm_gpiocr_altcx_pin_desc *pin_desc;
260	const u16 *gpiocr_regs;	260	const u16 *gpiocr_regs;
261		261
		262	if (!npct->prcm_base)
		263	return;
		264
262	if (alt_num > PRCM_IDX_GPIOCR_ALTC_MAX) {	265	if (alt_num > PRCM_IDX_GPIOCR_ALTC_MAX) {
263	dev_err(npct->dev, "PRCM GPIOCR: alternate-C%i is invalid\n",	266	dev_err(npct->dev, "PRCM GPIOCR: alternate-C%i is invalid\n",
264	alt_num);	267	alt_num);
@@ -682,6 +685,9 @@ static int nmk_prcm_gpiocr_get_mode(struct pinctrl_dev *pctldev, int gpio)
682	const struct prcm_gpiocr_altcx_pin_desc *pin_desc;	685	const struct prcm_gpiocr_altcx_pin_desc *pin_desc;
683	const u16 *gpiocr_regs;	686	const u16 *gpiocr_regs;
684		687
		688	if (!npct->prcm_base)
		689	return NMK_GPIO_ALT_C;
		690
685	for (i = 0; i < npct->soc->npins_altcx; i++) {	691	for (i = 0; i < npct->soc->npins_altcx; i++) {
686	if (npct->soc->altcx_pins[i].pin == gpio)	692	if (npct->soc->altcx_pins[i].pin == gpio)
687	break;	693	break;
@@ -1887,9 +1893,12 @@ static int __devinit nmk_pinctrl_probe(struct platform_device *pdev)
1887	"failed to ioremap PRCM registers\n");	1893	"failed to ioremap PRCM registers\n");
1888	return -ENOMEM;	1894	return -ENOMEM;
1889	}	1895	}
1890	} else {	1896	} else if (version == PINCTRL_NMK_STN8815) {
1891	dev_info(&pdev->dev,	1897	dev_info(&pdev->dev,
1892	"No PRCM base, assume no ALT-Cx control is available\n");	1898	"No PRCM base, assume no ALT-Cx control is available\n");
		1899	} else {
		1900	dev_err(&pdev->dev, "missing PRCM base address\n");
		1901	return -EINVAL;
1893	}	1902	}
1894		1903
1895	/*	1904	/*


diff --git a/drivers/pinctrl/pinctrl-sirf.c b/drivers/pinctrl/pinctrl-sirf.c index a4f0c5e487d5..30e1a38293a0 100644 --- a/drivers/pinctrl/pinctrl-sirf.c +++ b/drivers/pinctrl/pinctrl-sirf.c
@@ -1663,6 +1663,44 @@ const struct irq_domain_ops sirfsoc_gpio_irq_simple_ops = {
1663	.xlate = irq_domain_xlate_twocell,	1663	.xlate = irq_domain_xlate_twocell,
1664	};	1664	};
1665		1665
		1666	static void sirfsoc_gpio_set_pullup(const u32 *pullups)
		1667	{
		1668	int i, n;
		1669	const unsigned long p = (const unsigned long )pullups;
		1670
		1671	for (i = 0; i < SIRFSOC_GPIO_NO_OF_BANKS; i++) {
		1672	n = find_first_bit(p + i, BITS_PER_LONG);
		1673	while (n < BITS_PER_LONG) {
		1674	u32 offset = SIRFSOC_GPIO_CTRL(i, n);
		1675	u32 val = readl(sgpio_bank[i].chip.regs + offset);
		1676	val \|= SIRFSOC_GPIO_CTL_PULL_MASK;
		1677	val \|= SIRFSOC_GPIO_CTL_PULL_HIGH;
		1678	writel(val, sgpio_bank[i].chip.regs + offset);
		1679
		1680	n = find_next_bit(p + i, BITS_PER_LONG, n + 1);
		1681	}
		1682	}
		1683	}
		1684
		1685	static void sirfsoc_gpio_set_pulldown(const u32 *pulldowns)
		1686	{
		1687	int i, n;
		1688	const unsigned long p = (const unsigned long )pulldowns;
		1689
		1690	for (i = 0; i < SIRFSOC_GPIO_NO_OF_BANKS; i++) {
		1691	n = find_first_bit(p + i, BITS_PER_LONG);
		1692	while (n < BITS_PER_LONG) {
		1693	u32 offset = SIRFSOC_GPIO_CTRL(i, n);
		1694	u32 val = readl(sgpio_bank[i].chip.regs + offset);
		1695	val \|= SIRFSOC_GPIO_CTL_PULL_MASK;
		1696	val &= ~SIRFSOC_GPIO_CTL_PULL_HIGH;
		1697	writel(val, sgpio_bank[i].chip.regs + offset);
		1698
		1699	n = find_next_bit(p + i, BITS_PER_LONG, n + 1);
		1700	}
		1701	}
		1702	}
		1703
1666	static int __devinit sirfsoc_gpio_probe(struct device_node *np)	1704	static int __devinit sirfsoc_gpio_probe(struct device_node *np)
1667	{	1705	{
1668	int i, err = 0;	1706	int i, err = 0;
@@ -1671,6 +1709,8 @@ static int __devinit sirfsoc_gpio_probe(struct device_node *np)
1671	struct platform_device *pdev;	1709	struct platform_device *pdev;
1672	bool is_marco = false;	1710	bool is_marco = false;
1673		1711
		1712	u32 pullups[SIRFSOC_GPIO_NO_OF_BANKS], pulldowns[SIRFSOC_GPIO_NO_OF_BANKS];
		1713
1674	pdev = of_find_device_by_node(np);	1714	pdev = of_find_device_by_node(np);
1675	if (!pdev)	1715	if (!pdev)
1676	return -ENODEV;	1716	return -ENODEV;
@@ -1726,6 +1766,14 @@ static int __devinit sirfsoc_gpio_probe(struct device_node *np)
1726	irq_set_handler_data(bank->parent_irq, bank);	1766	irq_set_handler_data(bank->parent_irq, bank);
1727	}	1767	}
1728		1768
		1769	if (!of_property_read_u32_array(np, "sirf,pullups", pullups,
		1770	SIRFSOC_GPIO_NO_OF_BANKS))
		1771	sirfsoc_gpio_set_pullup(pullups);
		1772
		1773	if (!of_property_read_u32_array(np, "sirf,pulldowns", pulldowns,
		1774	SIRFSOC_GPIO_NO_OF_BANKS))
		1775	sirfsoc_gpio_set_pulldown(pulldowns);
		1776
1729	return 0;	1777	return 0;
1730		1778
1731	out:	1779	out: