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author | Baruch Siach <baruch@tkos.co.il> | 2013-11-11 10:15:17 -0500 |
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committer | Max Filippov <jcmvbkbc@gmail.com> | 2014-01-14 15:21:23 -0500 |
commit | 5f42146e7599e120ee3f5b07d03ea45c633a955a (patch) | |
tree | 1a6f816e31985d8a5a9b5d5fb9abe414a0f95e83 | |
parent | abf0ea65e0adede5f40a836e6af7f62e7c850546 (diff) |
xtensa: fix ATOMCTL register documentation
Make the WT entry match table 4-52 of the Xtensa ISA RM (RD-2012.5).
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
-rw-r--r-- | Documentation/xtensa/atomctl.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/xtensa/atomctl.txt b/Documentation/xtensa/atomctl.txt index 10a8d1ff35ec..1da783ac200c 100644 --- a/Documentation/xtensa/atomctl.txt +++ b/Documentation/xtensa/atomctl.txt | |||
@@ -40,5 +40,5 @@ See Section 4.3.12.4 of ISA; Bits: | |||
40 | --------- --------------- ----------------- ---------------- | 40 | --------- --------------- ----------------- ---------------- |
41 | 0 Exception Exception Exception | 41 | 0 Exception Exception Exception |
42 | 1 RCW Transaction RCW Transaction RCW Transaction | 42 | 1 RCW Transaction RCW Transaction RCW Transaction |
43 | 2 Internal Operation Exception Reserved | 43 | 2 Internal Operation Internal Operation Reserved |
44 | 3 Reserved Reserved Reserved | 44 | 3 Reserved Reserved Reserved |