diff options
author | Olof Johansson <olof@lixom.net> | 2014-09-24 01:26:19 -0400 |
---|---|---|
committer | Olof Johansson <olof@lixom.net> | 2014-09-24 01:26:28 -0400 |
commit | 5f0798ce4a88e8f787c67f5265d77fc6428e2c88 (patch) | |
tree | 76566587fcad0ac96c06dbccf96dfdf27ecf2634 | |
parent | 007c7fdbdfbb532c1af84770782898e2f7115007 (diff) | |
parent | aabff7bfe55afd01d71a5f11d4a84bd873c20f5e (diff) |
Merge tag 'qcom-dt-for-3.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into next/dt
Merge "qcom DT changes for v3.18-2" from Kumar Gala:
Qualcomm ARM Based Device Tree Updates for v3.18-2
* Added SDCC nodes on MSM8960/CDP and MSM8660/SURF
* Added I2C and SDCC4/WLAN on APQ8064/IFC6410
* Added I2C on MSM8984/DB8074
* tag 'qcom-dt-for-3.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom:
ARM: DT: msm8960: Add sdcc nodes
ARM: DT: msm8660: Add sdcc nodes
ARM: DT: apq8064: Add i2c device nodes
ARM: DT: apq8064: add support to sdcc4 for wlan.
ARM: dts: qcom: Add I2C dt node for MSM8974 and DB8074 board
Signed-off-by: Olof Johansson <olof@lixom.net>
-rw-r--r-- | arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 31 | ||||
-rw-r--r-- | arch/arm/boot/dts/qcom-apq8064.dtsi | 80 | ||||
-rw-r--r-- | arch/arm/boot/dts/qcom-apq8074-dragonboard.dts | 21 | ||||
-rw-r--r-- | arch/arm/boot/dts/qcom-msm8660-surf.dts | 12 | ||||
-rw-r--r-- | arch/arm/boot/dts/qcom-msm8660.dtsi | 51 | ||||
-rw-r--r-- | arch/arm/boot/dts/qcom-msm8960-cdp.dts | 12 | ||||
-rw-r--r-- | arch/arm/boot/dts/qcom-msm8960.dtsi | 50 | ||||
-rw-r--r-- | arch/arm/boot/dts/qcom-msm8974.dtsi | 15 |
8 files changed, 270 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts index 90db8af51f3a..b396c8311b27 100644 --- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | |||
@@ -5,6 +5,33 @@ | |||
5 | compatible = "qcom,apq8064-ifc6410", "qcom,apq8064"; | 5 | compatible = "qcom,apq8064-ifc6410", "qcom,apq8064"; |
6 | 6 | ||
7 | soc { | 7 | soc { |
8 | pinctrl@800000 { | ||
9 | i2c1_pins: i2c1 { | ||
10 | mux { | ||
11 | pins = "gpio20", "gpio21"; | ||
12 | function = "gsbi1"; | ||
13 | }; | ||
14 | }; | ||
15 | }; | ||
16 | |||
17 | gsbi@12440000 { | ||
18 | status = "okay"; | ||
19 | qcom,mode = <GSBI_PROT_I2C>; | ||
20 | |||
21 | i2c@12460000 { | ||
22 | status = "okay"; | ||
23 | clock-frequency = <200000>; | ||
24 | pinctrl-0 = <&i2c1_pins>; | ||
25 | pinctrl-names = "default"; | ||
26 | |||
27 | eeprom: eeprom@52 { | ||
28 | compatible = "atmel,24c128"; | ||
29 | reg = <0x52>; | ||
30 | pagesize = <32>; | ||
31 | }; | ||
32 | }; | ||
33 | }; | ||
34 | |||
8 | gsbi@16600000 { | 35 | gsbi@16600000 { |
9 | status = "ok"; | 36 | status = "ok"; |
10 | qcom,mode = <GSBI_PROT_I2C_UART>; | 37 | qcom,mode = <GSBI_PROT_I2C_UART>; |
@@ -23,6 +50,10 @@ | |||
23 | sdcc3: sdcc@12180000 { | 50 | sdcc3: sdcc@12180000 { |
24 | status = "okay"; | 51 | status = "okay"; |
25 | }; | 52 | }; |
53 | /* WLAN */ | ||
54 | sdcc4: sdcc@121c0000 { | ||
55 | status = "okay"; | ||
56 | }; | ||
26 | }; | 57 | }; |
27 | }; | 58 | }; |
28 | }; | 59 | }; |
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index b1e476ac5edf..b3154c071652 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi | |||
@@ -85,6 +85,13 @@ | |||
85 | pinctrl-names = "default"; | 85 | pinctrl-names = "default"; |
86 | pinctrl-0 = <&ps_hold>; | 86 | pinctrl-0 = <&ps_hold>; |
87 | 87 | ||
88 | sdc4_gpios: sdc4-gpios { | ||
89 | pios { | ||
90 | pins = "gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68"; | ||
91 | function = "sdc4"; | ||
92 | }; | ||
93 | }; | ||
94 | |||
88 | ps_hold: ps_hold { | 95 | ps_hold: ps_hold { |
89 | mux { | 96 | mux { |
90 | pins = "gpio78"; | 97 | pins = "gpio78"; |
@@ -156,6 +163,48 @@ | |||
156 | regulator; | 163 | regulator; |
157 | }; | 164 | }; |
158 | 165 | ||
166 | gsbi1: gsbi@12440000 { | ||
167 | status = "disabled"; | ||
168 | compatible = "qcom,gsbi-v1.0.0"; | ||
169 | reg = <0x12440000 0x100>; | ||
170 | clocks = <&gcc GSBI1_H_CLK>; | ||
171 | clock-names = "iface"; | ||
172 | #address-cells = <1>; | ||
173 | #size-cells = <1>; | ||
174 | ranges; | ||
175 | |||
176 | i2c1: i2c@12460000 { | ||
177 | compatible = "qcom,i2c-qup-v1.1.1"; | ||
178 | reg = <0x12460000 0x1000>; | ||
179 | interrupts = <0 194 IRQ_TYPE_NONE>; | ||
180 | clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>; | ||
181 | clock-names = "core", "iface"; | ||
182 | #address-cells = <1>; | ||
183 | #size-cells = <0>; | ||
184 | }; | ||
185 | }; | ||
186 | |||
187 | gsbi2: gsbi@12480000 { | ||
188 | status = "disabled"; | ||
189 | compatible = "qcom,gsbi-v1.0.0"; | ||
190 | reg = <0x12480000 0x100>; | ||
191 | clocks = <&gcc GSBI2_H_CLK>; | ||
192 | clock-names = "iface"; | ||
193 | #address-cells = <1>; | ||
194 | #size-cells = <1>; | ||
195 | ranges; | ||
196 | |||
197 | i2c2: i2c@124a0000 { | ||
198 | compatible = "qcom,i2c-qup-v1.1.1"; | ||
199 | reg = <0x124a0000 0x1000>; | ||
200 | interrupts = <0 196 IRQ_TYPE_NONE>; | ||
201 | clocks = <&gcc GSBI2_QUP_CLK>, <&gcc GSBI2_H_CLK>; | ||
202 | clock-names = "core", "iface"; | ||
203 | #address-cells = <1>; | ||
204 | #size-cells = <0>; | ||
205 | }; | ||
206 | }; | ||
207 | |||
159 | gsbi7: gsbi@16600000 { | 208 | gsbi7: gsbi@16600000 { |
160 | status = "disabled"; | 209 | status = "disabled"; |
161 | compatible = "qcom,gsbi-v1.0.0"; | 210 | compatible = "qcom,gsbi-v1.0.0"; |
@@ -226,6 +275,16 @@ | |||
226 | qcom,ee = <0>; | 275 | qcom,ee = <0>; |
227 | }; | 276 | }; |
228 | 277 | ||
278 | sdcc4bam:dma@121c2000{ | ||
279 | compatible = "qcom,bam-v1.3.0"; | ||
280 | reg = <0x121c2000 0x8000>; | ||
281 | interrupts = <0 95 0>; | ||
282 | clocks = <&gcc SDC4_H_CLK>; | ||
283 | clock-names = "bam_clk"; | ||
284 | #dma-cells = <1>; | ||
285 | qcom,ee = <0>; | ||
286 | }; | ||
287 | |||
229 | amba { | 288 | amba { |
230 | compatible = "arm,amba-bus"; | 289 | compatible = "arm,amba-bus"; |
231 | #address-cells = <1>; | 290 | #address-cells = <1>; |
@@ -268,6 +327,27 @@ | |||
268 | dmas = <&sdcc3bam 2>, <&sdcc3bam 1>; | 327 | dmas = <&sdcc3bam 2>, <&sdcc3bam 1>; |
269 | dma-names = "tx", "rx"; | 328 | dma-names = "tx", "rx"; |
270 | }; | 329 | }; |
330 | |||
331 | sdcc4: sdcc@121c0000 { | ||
332 | compatible = "arm,pl18x", "arm,primecell"; | ||
333 | arm,primecell-periphid = <0x00051180>; | ||
334 | status = "disabled"; | ||
335 | reg = <0x121c0000 0x2000>; | ||
336 | interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; | ||
337 | interrupt-names = "cmd_irq"; | ||
338 | clocks = <&gcc SDC4_CLK>, <&gcc SDC4_H_CLK>; | ||
339 | clock-names = "mclk", "apb_pclk"; | ||
340 | bus-width = <4>; | ||
341 | cap-sd-highspeed; | ||
342 | cap-mmc-highspeed; | ||
343 | max-frequency = <48000000>; | ||
344 | vmmc-supply = <&vsdcc_fixed>; | ||
345 | vqmmc-supply = <&vsdcc_fixed>; | ||
346 | dmas = <&sdcc4bam 2>, <&sdcc4bam 1>; | ||
347 | dma-names = "tx", "rx"; | ||
348 | pinctrl-names = "default"; | ||
349 | pinctrl-0 = <&sdc4_gpios>; | ||
350 | }; | ||
271 | }; | 351 | }; |
272 | }; | 352 | }; |
273 | }; | 353 | }; |
diff --git a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts index b4dfb01fe6fb..47370494d0f8 100644 --- a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts +++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts | |||
@@ -22,6 +22,13 @@ | |||
22 | 22 | ||
23 | 23 | ||
24 | pinctrl@fd510000 { | 24 | pinctrl@fd510000 { |
25 | i2c11_pins: i2c11 { | ||
26 | mux { | ||
27 | pins = "gpio83", "gpio84"; | ||
28 | function = "blsp_i2c11"; | ||
29 | }; | ||
30 | }; | ||
31 | |||
25 | spi8_default: spi8_default { | 32 | spi8_default: spi8_default { |
26 | mosi { | 33 | mosi { |
27 | pins = "gpio45"; | 34 | pins = "gpio45"; |
@@ -41,5 +48,19 @@ | |||
41 | }; | 48 | }; |
42 | }; | 49 | }; |
43 | }; | 50 | }; |
51 | |||
52 | i2c@f9967000 { | ||
53 | status = "okay"; | ||
54 | clock-frequency = <200000>; | ||
55 | pinctrl-0 = <&i2c11_pins>; | ||
56 | pinctrl-names = "default"; | ||
57 | |||
58 | eeprom: eeprom@52 { | ||
59 | compatible = "atmel,24c128"; | ||
60 | reg = <0x52>; | ||
61 | pagesize = <32>; | ||
62 | read-only; | ||
63 | }; | ||
64 | }; | ||
44 | }; | 65 | }; |
45 | }; | 66 | }; |
diff --git a/arch/arm/boot/dts/qcom-msm8660-surf.dts b/arch/arm/boot/dts/qcom-msm8660-surf.dts index ff7c53f58a06..e0883c376248 100644 --- a/arch/arm/boot/dts/qcom-msm8660-surf.dts +++ b/arch/arm/boot/dts/qcom-msm8660-surf.dts | |||
@@ -14,6 +14,18 @@ | |||
14 | status = "ok"; | 14 | status = "ok"; |
15 | }; | 15 | }; |
16 | }; | 16 | }; |
17 | |||
18 | amba { | ||
19 | /* eMMC */ | ||
20 | sdcc1: sdcc@12400000 { | ||
21 | status = "okay"; | ||
22 | }; | ||
23 | |||
24 | /* External micro SD card */ | ||
25 | sdcc3: sdcc@12180000 { | ||
26 | status = "okay"; | ||
27 | }; | ||
28 | }; | ||
17 | }; | 29 | }; |
18 | }; | 30 | }; |
19 | 31 | ||
diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi index a3fd26b8139f..0affd6193f56 100644 --- a/arch/arm/boot/dts/qcom-msm8660.dtsi +++ b/arch/arm/boot/dts/qcom-msm8660.dtsi | |||
@@ -2,6 +2,7 @@ | |||
2 | 2 | ||
3 | /include/ "skeleton.dtsi" | 3 | /include/ "skeleton.dtsi" |
4 | 4 | ||
5 | #include <dt-bindings/interrupt-controller/arm-gic.h> | ||
5 | #include <dt-bindings/clock/qcom,gcc-msm8660.h> | 6 | #include <dt-bindings/clock/qcom,gcc-msm8660.h> |
6 | #include <dt-bindings/soc/qcom,gsbi.h> | 7 | #include <dt-bindings/soc/qcom,gsbi.h> |
7 | 8 | ||
@@ -146,5 +147,55 @@ | |||
146 | }; | 147 | }; |
147 | }; | 148 | }; |
148 | }; | 149 | }; |
150 | |||
151 | /* Temporary fixed regulator */ | ||
152 | vsdcc_fixed: vsdcc-regulator { | ||
153 | compatible = "regulator-fixed"; | ||
154 | regulator-name = "SDCC Power"; | ||
155 | regulator-min-microvolt = <2700000>; | ||
156 | regulator-max-microvolt = <2700000>; | ||
157 | regulator-always-on; | ||
158 | }; | ||
159 | |||
160 | amba { | ||
161 | compatible = "arm,amba-bus"; | ||
162 | #address-cells = <1>; | ||
163 | #size-cells = <1>; | ||
164 | ranges; | ||
165 | sdcc1: sdcc@12400000 { | ||
166 | status = "disabled"; | ||
167 | compatible = "arm,pl18x", "arm,primecell"; | ||
168 | arm,primecell-periphid = <0x00051180>; | ||
169 | reg = <0x12400000 0x8000>; | ||
170 | interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; | ||
171 | interrupt-names = "cmd_irq"; | ||
172 | clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>; | ||
173 | clock-names = "mclk", "apb_pclk"; | ||
174 | bus-width = <8>; | ||
175 | max-frequency = <48000000>; | ||
176 | non-removable; | ||
177 | cap-sd-highspeed; | ||
178 | cap-mmc-highspeed; | ||
179 | vmmc-supply = <&vsdcc_fixed>; | ||
180 | }; | ||
181 | |||
182 | sdcc3: sdcc@12180000 { | ||
183 | compatible = "arm,pl18x", "arm,primecell"; | ||
184 | arm,primecell-periphid = <0x00051180>; | ||
185 | status = "disabled"; | ||
186 | reg = <0x12180000 0x8000>; | ||
187 | interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; | ||
188 | interrupt-names = "cmd_irq"; | ||
189 | clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>; | ||
190 | clock-names = "mclk", "apb_pclk"; | ||
191 | bus-width = <4>; | ||
192 | cap-sd-highspeed; | ||
193 | cap-mmc-highspeed; | ||
194 | max-frequency = <48000000>; | ||
195 | no-1-8-v; | ||
196 | vmmc-supply = <&vsdcc_fixed>; | ||
197 | }; | ||
198 | }; | ||
149 | }; | 199 | }; |
200 | |||
150 | }; | 201 | }; |
diff --git a/arch/arm/boot/dts/qcom-msm8960-cdp.dts b/arch/arm/boot/dts/qcom-msm8960-cdp.dts index 8b10812c0cda..7f70fae90959 100644 --- a/arch/arm/boot/dts/qcom-msm8960-cdp.dts +++ b/arch/arm/boot/dts/qcom-msm8960-cdp.dts | |||
@@ -14,6 +14,18 @@ | |||
14 | status = "ok"; | 14 | status = "ok"; |
15 | }; | 15 | }; |
16 | }; | 16 | }; |
17 | |||
18 | amba { | ||
19 | /* eMMC */ | ||
20 | sdcc1: sdcc@12400000 { | ||
21 | status = "okay"; | ||
22 | }; | ||
23 | |||
24 | /* External micro SD card */ | ||
25 | sdcc3: sdcc@12180000 { | ||
26 | status = "okay"; | ||
27 | }; | ||
28 | }; | ||
17 | }; | 29 | }; |
18 | }; | 30 | }; |
19 | 31 | ||
diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom-msm8960.dtsi index 2f677247744d..e1b0d5cd9e3c 100644 --- a/arch/arm/boot/dts/qcom-msm8960.dtsi +++ b/arch/arm/boot/dts/qcom-msm8960.dtsi | |||
@@ -2,6 +2,7 @@ | |||
2 | 2 | ||
3 | /include/ "skeleton.dtsi" | 3 | /include/ "skeleton.dtsi" |
4 | 4 | ||
5 | #include <dt-bindings/interrupt-controller/arm-gic.h> | ||
5 | #include <dt-bindings/clock/qcom,gcc-msm8960.h> | 6 | #include <dt-bindings/clock/qcom,gcc-msm8960.h> |
6 | #include <dt-bindings/soc/qcom,gsbi.h> | 7 | #include <dt-bindings/soc/qcom,gsbi.h> |
7 | 8 | ||
@@ -188,5 +189,54 @@ | |||
188 | clocks = <&gcc PRNG_CLK>; | 189 | clocks = <&gcc PRNG_CLK>; |
189 | clock-names = "core"; | 190 | clock-names = "core"; |
190 | }; | 191 | }; |
192 | |||
193 | /* Temporary fixed regulator */ | ||
194 | vsdcc_fixed: vsdcc-regulator { | ||
195 | compatible = "regulator-fixed"; | ||
196 | regulator-name = "SDCC Power"; | ||
197 | regulator-min-microvolt = <2700000>; | ||
198 | regulator-max-microvolt = <2700000>; | ||
199 | regulator-always-on; | ||
200 | }; | ||
201 | |||
202 | amba { | ||
203 | compatible = "arm,amba-bus"; | ||
204 | #address-cells = <1>; | ||
205 | #size-cells = <1>; | ||
206 | ranges; | ||
207 | sdcc1: sdcc@12400000 { | ||
208 | status = "disabled"; | ||
209 | compatible = "arm,pl18x", "arm,primecell"; | ||
210 | arm,primecell-periphid = <0x00051180>; | ||
211 | reg = <0x12400000 0x8000>; | ||
212 | interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; | ||
213 | interrupt-names = "cmd_irq"; | ||
214 | clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>; | ||
215 | clock-names = "mclk", "apb_pclk"; | ||
216 | bus-width = <8>; | ||
217 | max-frequency = <96000000>; | ||
218 | non-removable; | ||
219 | cap-sd-highspeed; | ||
220 | cap-mmc-highspeed; | ||
221 | vmmc-supply = <&vsdcc_fixed>; | ||
222 | }; | ||
223 | |||
224 | sdcc3: sdcc@12180000 { | ||
225 | compatible = "arm,pl18x", "arm,primecell"; | ||
226 | arm,primecell-periphid = <0x00051180>; | ||
227 | status = "disabled"; | ||
228 | reg = <0x12180000 0x8000>; | ||
229 | interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; | ||
230 | interrupt-names = "cmd_irq"; | ||
231 | clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>; | ||
232 | clock-names = "mclk", "apb_pclk"; | ||
233 | bus-width = <4>; | ||
234 | cap-sd-highspeed; | ||
235 | cap-mmc-highspeed; | ||
236 | max-frequency = <192000000>; | ||
237 | no-1-8-v; | ||
238 | vmmc-supply = <&vsdcc_fixed>; | ||
239 | }; | ||
240 | }; | ||
191 | }; | 241 | }; |
192 | }; | 242 | }; |
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 69dca2aca25a..e265ec16a787 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi | |||
@@ -1,8 +1,8 @@ | |||
1 | /dts-v1/; | 1 | /dts-v1/; |
2 | 2 | ||
3 | #include "skeleton.dtsi" | 3 | #include <dt-bindings/interrupt-controller/irq.h> |
4 | |||
5 | #include <dt-bindings/clock/qcom,gcc-msm8974.h> | 4 | #include <dt-bindings/clock/qcom,gcc-msm8974.h> |
5 | #include "skeleton.dtsi" | ||
6 | 6 | ||
7 | / { | 7 | / { |
8 | model = "Qualcomm MSM8974"; | 8 | model = "Qualcomm MSM8974"; |
@@ -236,5 +236,16 @@ | |||
236 | #interrupt-cells = <2>; | 236 | #interrupt-cells = <2>; |
237 | interrupts = <0 208 0>; | 237 | interrupts = <0 208 0>; |
238 | }; | 238 | }; |
239 | |||
240 | blsp_i2c11: i2c@f9967000 { | ||
241 | status = "disable"; | ||
242 | compatible = "qcom,i2c-qup-v2.1.1"; | ||
243 | reg = <0xf9967000 0x1000>; | ||
244 | interrupts = <0 105 IRQ_TYPE_NONE>; | ||
245 | clocks = <&gcc GCC_BLSP2_QUP5_I2C_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>; | ||
246 | clock-names = "core", "iface"; | ||
247 | #address-cells = <1>; | ||
248 | #size-cells = <0>; | ||
249 | }; | ||
239 | }; | 250 | }; |
240 | }; | 251 | }; |