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authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2007-06-25 12:14:01 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-07-10 12:33:03 -0400
commit5ddcb3c35be995517a32799796e2acda90a784e0 (patch)
treefc0f6130b72aca477a9c52a0d1f9443c1968bc63
parentbb33b19ff92aed11fb56435be4c5d5231598a948 (diff)
[MIPS] Make ioremap() work on TX39/49 special unmapped segment
TX39XX and TX49XX have "reserved" segment in CKSEG3 area. 0xff000000-0xff3fffff on TX49XX and 0xff000000-0xfffeffff on TX39XX are reserved (unmapped, uncached). Controllers on these SoCs are placed in this segment. This patch add plat_ioremap() and plat_iounmap() to override default behavior and implement these hooks for TX39/TX49. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/Makefile2
-rw-r--r--include/asm-mips/io.h8
-rw-r--r--include/asm-mips/mach-au1x00/ioremap.h11
-rw-r--r--include/asm-mips/mach-generic/ioremap.h11
-rw-r--r--include/asm-mips/mach-jmr3927/ioremap.h38
-rw-r--r--include/asm-mips/mach-tx49xx/ioremap.h42
6 files changed, 112 insertions, 0 deletions
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 2b9af2fd5507..96d4abbd7b30 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -580,6 +580,7 @@ load-$(CONFIG_TOSHIBA_JMR3927) += 0xffffffff80050000
580# 580#
581core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/toshiba_rbtx4927/ 581core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/toshiba_rbtx4927/
582core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/common/ 582core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/common/
583cflags-$(CONFIG_TOSHIBA_RBTX4927) += -Iinclude/asm-mips/mach-tx49xx
583load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000 584load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000
584 585
585# 586#
@@ -587,6 +588,7 @@ load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000
587# 588#
588core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/toshiba_rbtx4938/ 589core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/toshiba_rbtx4938/
589core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/common/ 590core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/common/
591cflags-$(CONFIG_TOSHIBA_RBTX4938) += -Iinclude/asm-mips/mach-tx49xx
590load-$(CONFIG_TOSHIBA_RBTX4938) += 0xffffffff80100000 592load-$(CONFIG_TOSHIBA_RBTX4938) += 0xffffffff80100000
591 593
592cflags-y += -Iinclude/asm-mips/mach-generic 594cflags-y += -Iinclude/asm-mips/mach-generic
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index 92ec2618560c..12bcc1f9fba9 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -178,6 +178,11 @@ extern void __iounmap(const volatile void __iomem *addr);
178static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size, 178static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size,
179 unsigned long flags) 179 unsigned long flags)
180{ 180{
181 void __iomem *addr = plat_ioremap(offset, size, flags);
182
183 if (addr)
184 return addr;
185
181#define __IS_LOW512(addr) (!((phys_t)(addr) & (phys_t) ~0x1fffffffULL)) 186#define __IS_LOW512(addr) (!((phys_t)(addr) & (phys_t) ~0x1fffffffULL))
182 187
183 if (cpu_has_64bit_addresses) { 188 if (cpu_has_64bit_addresses) {
@@ -282,6 +287,9 @@ static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size,
282 287
283static inline void iounmap(const volatile void __iomem *addr) 288static inline void iounmap(const volatile void __iomem *addr)
284{ 289{
290 if (plat_iounmap(addr))
291 return;
292
285#define __IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == CKSEG1) 293#define __IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == CKSEG1)
286 294
287 if (cpu_has_64bit_addresses || 295 if (cpu_has_64bit_addresses ||
diff --git a/include/asm-mips/mach-au1x00/ioremap.h b/include/asm-mips/mach-au1x00/ioremap.h
index 098fca4289bb..364cea2dc71f 100644
--- a/include/asm-mips/mach-au1x00/ioremap.h
+++ b/include/asm-mips/mach-au1x00/ioremap.h
@@ -28,4 +28,15 @@ static inline phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size)
28 return __fixup_bigphys_addr(phys_addr, size); 28 return __fixup_bigphys_addr(phys_addr, size);
29} 29}
30 30
31static inline void __iomem *plat_ioremap(phys_t offset, unsigned long size,
32 unsigned long flags)
33{
34 return NULL;
35}
36
37static inline int plat_iounmap(const volatile void __iomem *addr)
38{
39 return 0;
40}
41
31#endif /* __ASM_MACH_AU1X00_IOREMAP_H */ 42#endif /* __ASM_MACH_AU1X00_IOREMAP_H */
diff --git a/include/asm-mips/mach-generic/ioremap.h b/include/asm-mips/mach-generic/ioremap.h
index 9b64ff6e485d..b379938d47f0 100644
--- a/include/asm-mips/mach-generic/ioremap.h
+++ b/include/asm-mips/mach-generic/ioremap.h
@@ -20,4 +20,15 @@ static inline phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size)
20 return phys_addr; 20 return phys_addr;
21} 21}
22 22
23static inline void __iomem *plat_ioremap(phys_t offset, unsigned long size,
24 unsigned long flags)
25{
26 return NULL;
27}
28
29static inline int plat_iounmap(const volatile void __iomem *addr)
30{
31 return 0;
32}
33
23#endif /* __ASM_MACH_GENERIC_IOREMAP_H */ 34#endif /* __ASM_MACH_GENERIC_IOREMAP_H */
diff --git a/include/asm-mips/mach-jmr3927/ioremap.h b/include/asm-mips/mach-jmr3927/ioremap.h
new file mode 100644
index 000000000000..aa131ad7f717
--- /dev/null
+++ b/include/asm-mips/mach-jmr3927/ioremap.h
@@ -0,0 +1,38 @@
1/*
2 * include/asm-mips/mach-jmr3927/ioremap.h
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
9#ifndef __ASM_MACH_JMR3927_IOREMAP_H
10#define __ASM_MACH_JMR3927_IOREMAP_H
11
12#include <linux/types.h>
13
14/*
15 * Allow physical addresses to be fixed up to help peripherals located
16 * outside the low 32-bit range -- generic pass-through version.
17 */
18static inline phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size)
19{
20 return phys_addr;
21}
22
23static inline void __iomem *plat_ioremap(phys_t offset, unsigned long size,
24 unsigned long flags)
25{
26#define TXX9_DIRECTMAP_BASE 0xff000000ul
27 if (offset >= TXX9_DIRECTMAP_BASE &&
28 offset < TXX9_DIRECTMAP_BASE + 0xf0000)
29 return (void __iomem *)offset;
30 return NULL;
31}
32
33static inline int plat_iounmap(const volatile void __iomem *addr)
34{
35 return (unsigned long)addr >= TXX9_DIRECTMAP_BASE;
36}
37
38#endif /* __ASM_MACH_JMR3927_IOREMAP_H */
diff --git a/include/asm-mips/mach-tx49xx/ioremap.h b/include/asm-mips/mach-tx49xx/ioremap.h
new file mode 100644
index 000000000000..88cf546719b8
--- /dev/null
+++ b/include/asm-mips/mach-tx49xx/ioremap.h
@@ -0,0 +1,42 @@
1/*
2 * include/asm-mips/mach-tx49xx/ioremap.h
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
9#ifndef __ASM_MACH_TX49XX_IOREMAP_H
10#define __ASM_MACH_TX49XX_IOREMAP_H
11
12#include <linux/types.h>
13
14/*
15 * Allow physical addresses to be fixed up to help peripherals located
16 * outside the low 32-bit range -- generic pass-through version.
17 */
18static inline phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size)
19{
20 return phys_addr;
21}
22
23static inline void __iomem *plat_ioremap(phys_t offset, unsigned long size,
24 unsigned long flags)
25{
26#ifdef CONFIG_64BIT
27#define TXX9_DIRECTMAP_BASE 0xfff000000ul
28#else
29#define TXX9_DIRECTMAP_BASE 0xff000000ul
30#endif
31 if (offset >= TXX9_DIRECTMAP_BASE &&
32 offset < TXX9_DIRECTMAP_BASE + 0x400000)
33 return (void __iomem *)(unsigned long)(int)offset;
34 return NULL;
35}
36
37static inline int plat_iounmap(const volatile void __iomem *addr)
38{
39 return (unsigned long)addr >= (unsigned long)(int)TXX9_DIRECTMAP_BASE;
40}
41
42#endif /* __ASM_MACH_TX49XX_IOREMAP_H */