diff options
author | Ingo Molnar <mingo@kernel.org> | 2013-12-10 14:47:22 -0500 |
---|---|---|
committer | Ingo Molnar <mingo@kernel.org> | 2013-12-10 14:47:22 -0500 |
commit | 5d5119a476f77b57381ddd66d4f7034a5447480b (patch) | |
tree | f6bc77f6bcc06ee5582d6cf586e3dca5167063f3 | |
parent | 17b2112f332db7c2bac56926c9e627807bce3615 (diff) | |
parent | 9ab4727c1d41e50b67aecde4bf11879560a3ca78 (diff) |
Merge branch 'clockevents/fixes' of git://git.linaro.org/people/daniel.lezcano/linux into timers/urgent
Pull clockevents/clocksource fixes from Daniel Lezcano:
* Axel Lin added a missing dependency on CLKSRC_MMIO in the Kconfig
for the time-efm32
* Dinh Nguyen fixed read_sched_clock to return the right value and
added the clksrc-of missing definition for the dw_apb_timer
* Ezequiel Garcia registered the sched clock after the counter,
thus preventing time jump in the traces for the armada-370-xp
* Marc Zyngier stopped the timer before enabling the irq in order
to prevent it to be fired before the clockevent is registered for
the sunxi
* Thierry Reding removed a of_node_put in clksrc-of because the
reference is not held
Signed-off-by: Ingo Molnar <mingo@kernel.org>
-rw-r--r-- | drivers/clocksource/Kconfig | 1 | ||||
-rw-r--r-- | drivers/clocksource/clksrc-of.c | 1 | ||||
-rw-r--r-- | drivers/clocksource/dw_apb_timer_of.c | 7 | ||||
-rw-r--r-- | drivers/clocksource/sun4i_timer.c | 3 | ||||
-rw-r--r-- | drivers/clocksource/time-armada-370-xp.c | 10 |
5 files changed, 13 insertions, 9 deletions
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 5c07a56962db..634c4d6dd45a 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig | |||
@@ -75,6 +75,7 @@ config CLKSRC_DBX500_PRCMU_SCHED_CLOCK | |||
75 | config CLKSRC_EFM32 | 75 | config CLKSRC_EFM32 |
76 | bool "Clocksource for Energy Micro's EFM32 SoCs" if !ARCH_EFM32 | 76 | bool "Clocksource for Energy Micro's EFM32 SoCs" if !ARCH_EFM32 |
77 | depends on OF && ARM && (ARCH_EFM32 || COMPILE_TEST) | 77 | depends on OF && ARM && (ARCH_EFM32 || COMPILE_TEST) |
78 | select CLKSRC_MMIO | ||
78 | default ARCH_EFM32 | 79 | default ARCH_EFM32 |
79 | help | 80 | help |
80 | Support to use the timers of EFM32 SoCs as clock source and clock | 81 | Support to use the timers of EFM32 SoCs as clock source and clock |
diff --git a/drivers/clocksource/clksrc-of.c b/drivers/clocksource/clksrc-of.c index 35639cf4e5a2..b9ddd9e3a2f5 100644 --- a/drivers/clocksource/clksrc-of.c +++ b/drivers/clocksource/clksrc-of.c | |||
@@ -35,6 +35,5 @@ void __init clocksource_of_init(void) | |||
35 | 35 | ||
36 | init_func = match->data; | 36 | init_func = match->data; |
37 | init_func(np); | 37 | init_func(np); |
38 | of_node_put(np); | ||
39 | } | 38 | } |
40 | } | 39 | } |
diff --git a/drivers/clocksource/dw_apb_timer_of.c b/drivers/clocksource/dw_apb_timer_of.c index 45ba8aecc729..2a2ea2717f3a 100644 --- a/drivers/clocksource/dw_apb_timer_of.c +++ b/drivers/clocksource/dw_apb_timer_of.c | |||
@@ -108,12 +108,11 @@ static void __init add_clocksource(struct device_node *source_timer) | |||
108 | 108 | ||
109 | static u64 read_sched_clock(void) | 109 | static u64 read_sched_clock(void) |
110 | { | 110 | { |
111 | return __raw_readl(sched_io_base); | 111 | return ~__raw_readl(sched_io_base); |
112 | } | 112 | } |
113 | 113 | ||
114 | static const struct of_device_id sptimer_ids[] __initconst = { | 114 | static const struct of_device_id sptimer_ids[] __initconst = { |
115 | { .compatible = "picochip,pc3x2-rtc" }, | 115 | { .compatible = "picochip,pc3x2-rtc" }, |
116 | { .compatible = "snps,dw-apb-timer-sp" }, | ||
117 | { /* Sentinel */ }, | 116 | { /* Sentinel */ }, |
118 | }; | 117 | }; |
119 | 118 | ||
@@ -151,4 +150,6 @@ static void __init dw_apb_timer_init(struct device_node *timer) | |||
151 | num_called++; | 150 | num_called++; |
152 | } | 151 | } |
153 | CLOCKSOURCE_OF_DECLARE(pc3x2_timer, "picochip,pc3x2-timer", dw_apb_timer_init); | 152 | CLOCKSOURCE_OF_DECLARE(pc3x2_timer, "picochip,pc3x2-timer", dw_apb_timer_init); |
154 | CLOCKSOURCE_OF_DECLARE(apb_timer, "snps,dw-apb-timer-osc", dw_apb_timer_init); | 153 | CLOCKSOURCE_OF_DECLARE(apb_timer_osc, "snps,dw-apb-timer-osc", dw_apb_timer_init); |
154 | CLOCKSOURCE_OF_DECLARE(apb_timer_sp, "snps,dw-apb-timer-sp", dw_apb_timer_init); | ||
155 | CLOCKSOURCE_OF_DECLARE(apb_timer, "snps,dw-apb-timer", dw_apb_timer_init); | ||
diff --git a/drivers/clocksource/sun4i_timer.c b/drivers/clocksource/sun4i_timer.c index 2fb4695a28d8..a4f6119aafd8 100644 --- a/drivers/clocksource/sun4i_timer.c +++ b/drivers/clocksource/sun4i_timer.c | |||
@@ -179,6 +179,9 @@ static void __init sun4i_timer_init(struct device_node *node) | |||
179 | writel(TIMER_CTL_CLK_SRC(TIMER_CTL_CLK_SRC_OSC24M), | 179 | writel(TIMER_CTL_CLK_SRC(TIMER_CTL_CLK_SRC_OSC24M), |
180 | timer_base + TIMER_CTL_REG(0)); | 180 | timer_base + TIMER_CTL_REG(0)); |
181 | 181 | ||
182 | /* Make sure timer is stopped before playing with interrupts */ | ||
183 | sun4i_clkevt_time_stop(0); | ||
184 | |||
182 | ret = setup_irq(irq, &sun4i_timer_irq); | 185 | ret = setup_irq(irq, &sun4i_timer_irq); |
183 | if (ret) | 186 | if (ret) |
184 | pr_warn("failed to setup irq %d\n", irq); | 187 | pr_warn("failed to setup irq %d\n", irq); |
diff --git a/drivers/clocksource/time-armada-370-xp.c b/drivers/clocksource/time-armada-370-xp.c index d8e47e502785..4e7f6802e840 100644 --- a/drivers/clocksource/time-armada-370-xp.c +++ b/drivers/clocksource/time-armada-370-xp.c | |||
@@ -256,11 +256,6 @@ static void __init armada_370_xp_timer_common_init(struct device_node *np) | |||
256 | ticks_per_jiffy = (timer_clk + HZ / 2) / HZ; | 256 | ticks_per_jiffy = (timer_clk + HZ / 2) / HZ; |
257 | 257 | ||
258 | /* | 258 | /* |
259 | * Set scale and timer for sched_clock. | ||
260 | */ | ||
261 | sched_clock_register(armada_370_xp_read_sched_clock, 32, timer_clk); | ||
262 | |||
263 | /* | ||
264 | * Setup free-running clocksource timer (interrupts | 259 | * Setup free-running clocksource timer (interrupts |
265 | * disabled). | 260 | * disabled). |
266 | */ | 261 | */ |
@@ -270,6 +265,11 @@ static void __init armada_370_xp_timer_common_init(struct device_node *np) | |||
270 | timer_ctrl_clrset(0, TIMER0_EN | TIMER0_RELOAD_EN | | 265 | timer_ctrl_clrset(0, TIMER0_EN | TIMER0_RELOAD_EN | |
271 | TIMER0_DIV(TIMER_DIVIDER_SHIFT)); | 266 | TIMER0_DIV(TIMER_DIVIDER_SHIFT)); |
272 | 267 | ||
268 | /* | ||
269 | * Set scale and timer for sched_clock. | ||
270 | */ | ||
271 | sched_clock_register(armada_370_xp_read_sched_clock, 32, timer_clk); | ||
272 | |||
273 | clocksource_mmio_init(timer_base + TIMER0_VAL_OFF, | 273 | clocksource_mmio_init(timer_base + TIMER0_VAL_OFF, |
274 | "armada_370_xp_clocksource", | 274 | "armada_370_xp_clocksource", |
275 | timer_clk, 300, 32, clocksource_mmio_readl_down); | 275 | timer_clk, 300, 32, clocksource_mmio_readl_down); |