diff options
author | Ben Widawsky <ben@bwidawsk.net> | 2013-06-27 19:30:21 -0400 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-07-01 05:28:00 -0400 |
commit | 5c3fe8b03ea6eb61617edb390d51c08609a495f7 (patch) | |
tree | 87f5310176d7b0d6b1e3338cc17087b3efc75fbd | |
parent | b2f21b4dfdd1e7396a99312c35092c8bb486a699 (diff) |
drm/i915: Move fbc members out of line
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
[danvet: Resolve conflict with Damien's FBC_CHIP_DEFAULT no fbc
reason.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r-- | drivers/gpu/drm/i915/i915_debugfs.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 50 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem_stolen.c | 20 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_drv.h | 7 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 51 |
6 files changed, 69 insertions, 67 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index c16926ca15be..f82134f8e9fb 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c | |||
@@ -1492,7 +1492,7 @@ static int i915_fbc_status(struct seq_file *m, void *unused) | |||
1492 | seq_puts(m, "FBC enabled\n"); | 1492 | seq_puts(m, "FBC enabled\n"); |
1493 | } else { | 1493 | } else { |
1494 | seq_puts(m, "FBC disabled: "); | 1494 | seq_puts(m, "FBC disabled: "); |
1495 | switch (dev_priv->no_fbc_reason) { | 1495 | switch (dev_priv->fbc.no_fbc_reason) { |
1496 | case FBC_NO_OUTPUT: | 1496 | case FBC_NO_OUTPUT: |
1497 | seq_puts(m, "no outputs"); | 1497 | seq_puts(m, "no outputs"); |
1498 | break; | 1498 | break; |
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 438cb0ab6889..d1db73a5ba0c 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
@@ -528,18 +528,36 @@ struct i915_hw_context { | |||
528 | struct i915_ctx_hang_stats hang_stats; | 528 | struct i915_ctx_hang_stats hang_stats; |
529 | }; | 529 | }; |
530 | 530 | ||
531 | enum no_fbc_reason { | 531 | struct i915_fbc { |
532 | FBC_NO_OUTPUT, /* no outputs enabled to compress */ | 532 | unsigned long size; |
533 | FBC_STOLEN_TOO_SMALL, /* not enough space to hold compressed buffers */ | 533 | unsigned int fb_id; |
534 | FBC_UNSUPPORTED_MODE, /* interlace or doublescanned mode */ | 534 | enum plane plane; |
535 | FBC_MODE_TOO_LARGE, /* mode too large for compression */ | 535 | int y; |
536 | FBC_BAD_PLANE, /* fbc not supported on plane */ | 536 | |
537 | FBC_NOT_TILED, /* buffer not tiled */ | 537 | struct drm_mm_node *compressed_fb; |
538 | FBC_MULTIPLE_PIPES, /* more than one pipe active */ | 538 | struct drm_mm_node *compressed_llb; |
539 | FBC_MODULE_PARAM, | 539 | |
540 | FBC_CHIP_DEFAULT, /* disabled by default on this chip */ | 540 | struct intel_fbc_work { |
541 | struct delayed_work work; | ||
542 | struct drm_crtc *crtc; | ||
543 | struct drm_framebuffer *fb; | ||
544 | int interval; | ||
545 | } *fbc_work; | ||
546 | |||
547 | enum { | ||
548 | FBC_NO_OUTPUT, /* no outputs enabled to compress */ | ||
549 | FBC_STOLEN_TOO_SMALL, /* not enough space for buffers */ | ||
550 | FBC_UNSUPPORTED_MODE, /* interlace or doublescanned mode */ | ||
551 | FBC_MODE_TOO_LARGE, /* mode too large for compression */ | ||
552 | FBC_BAD_PLANE, /* fbc not supported on plane */ | ||
553 | FBC_NOT_TILED, /* buffer not tiled */ | ||
554 | FBC_MULTIPLE_PIPES, /* more than one pipe active */ | ||
555 | FBC_MODULE_PARAM, | ||
556 | FBC_CHIP_DEFAULT, /* disabled by default on this chip */ | ||
557 | } no_fbc_reason; | ||
541 | }; | 558 | }; |
542 | 559 | ||
560 | |||
543 | enum intel_pch { | 561 | enum intel_pch { |
544 | PCH_NONE = 0, /* No PCH present */ | 562 | PCH_NONE = 0, /* No PCH present */ |
545 | PCH_IBX, /* Ibexpeak PCH */ | 563 | PCH_IBX, /* Ibexpeak PCH */ |
@@ -1059,12 +1077,7 @@ typedef struct drm_i915_private { | |||
1059 | 1077 | ||
1060 | int num_plane; | 1078 | int num_plane; |
1061 | 1079 | ||
1062 | unsigned long cfb_size; | 1080 | struct i915_fbc fbc; |
1063 | unsigned int cfb_fb; | ||
1064 | enum plane cfb_plane; | ||
1065 | int cfb_y; | ||
1066 | struct intel_fbc_work *fbc_work; | ||
1067 | |||
1068 | struct intel_opregion opregion; | 1081 | struct intel_opregion opregion; |
1069 | struct intel_vbt_data vbt; | 1082 | struct intel_vbt_data vbt; |
1070 | 1083 | ||
@@ -1142,11 +1155,6 @@ typedef struct drm_i915_private { | |||
1142 | /* Haswell power well */ | 1155 | /* Haswell power well */ |
1143 | struct i915_power_well power_well; | 1156 | struct i915_power_well power_well; |
1144 | 1157 | ||
1145 | enum no_fbc_reason no_fbc_reason; | ||
1146 | |||
1147 | struct drm_mm_node *compressed_fb; | ||
1148 | struct drm_mm_node *compressed_llb; | ||
1149 | |||
1150 | struct i915_gpu_error gpu_error; | 1158 | struct i915_gpu_error gpu_error; |
1151 | 1159 | ||
1152 | struct drm_i915_gem_object *vlv_pctx; | 1160 | struct drm_i915_gem_object *vlv_pctx; |
diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c index f713294618fe..8e023447b7eb 100644 --- a/drivers/gpu/drm/i915/i915_gem_stolen.c +++ b/drivers/gpu/drm/i915/i915_gem_stolen.c | |||
@@ -120,7 +120,7 @@ static int i915_setup_compression(struct drm_device *dev, int size) | |||
120 | if (!compressed_llb) | 120 | if (!compressed_llb) |
121 | goto err_fb; | 121 | goto err_fb; |
122 | 122 | ||
123 | dev_priv->compressed_llb = compressed_llb; | 123 | dev_priv->fbc.compressed_llb = compressed_llb; |
124 | 124 | ||
125 | I915_WRITE(FBC_CFB_BASE, | 125 | I915_WRITE(FBC_CFB_BASE, |
126 | dev_priv->mm.stolen_base + compressed_fb->start); | 126 | dev_priv->mm.stolen_base + compressed_fb->start); |
@@ -128,8 +128,8 @@ static int i915_setup_compression(struct drm_device *dev, int size) | |||
128 | dev_priv->mm.stolen_base + compressed_llb->start); | 128 | dev_priv->mm.stolen_base + compressed_llb->start); |
129 | } | 129 | } |
130 | 130 | ||
131 | dev_priv->compressed_fb = compressed_fb; | 131 | dev_priv->fbc.compressed_fb = compressed_fb; |
132 | dev_priv->cfb_size = size; | 132 | dev_priv->fbc.size = size; |
133 | 133 | ||
134 | DRM_DEBUG_KMS("reserved %d bytes of contiguous stolen space for FBC\n", | 134 | DRM_DEBUG_KMS("reserved %d bytes of contiguous stolen space for FBC\n", |
135 | size); | 135 | size); |
@@ -150,7 +150,7 @@ int i915_gem_stolen_setup_compression(struct drm_device *dev, int size) | |||
150 | if (dev_priv->mm.stolen_base == 0) | 150 | if (dev_priv->mm.stolen_base == 0) |
151 | return -ENODEV; | 151 | return -ENODEV; |
152 | 152 | ||
153 | if (size < dev_priv->cfb_size) | 153 | if (size < dev_priv->fbc.size) |
154 | return 0; | 154 | return 0; |
155 | 155 | ||
156 | /* Release any current block */ | 156 | /* Release any current block */ |
@@ -163,16 +163,16 @@ void i915_gem_stolen_cleanup_compression(struct drm_device *dev) | |||
163 | { | 163 | { |
164 | struct drm_i915_private *dev_priv = dev->dev_private; | 164 | struct drm_i915_private *dev_priv = dev->dev_private; |
165 | 165 | ||
166 | if (dev_priv->cfb_size == 0) | 166 | if (dev_priv->fbc.size == 0) |
167 | return; | 167 | return; |
168 | 168 | ||
169 | if (dev_priv->compressed_fb) | 169 | if (dev_priv->fbc.compressed_fb) |
170 | drm_mm_put_block(dev_priv->compressed_fb); | 170 | drm_mm_put_block(dev_priv->fbc.compressed_fb); |
171 | 171 | ||
172 | if (dev_priv->compressed_llb) | 172 | if (dev_priv->fbc.compressed_llb) |
173 | drm_mm_put_block(dev_priv->compressed_llb); | 173 | drm_mm_put_block(dev_priv->fbc.compressed_llb); |
174 | 174 | ||
175 | dev_priv->cfb_size = 0; | 175 | dev_priv->fbc.size = 0; |
176 | } | 176 | } |
177 | 177 | ||
178 | void i915_gem_cleanup_stolen(struct drm_device *dev) | 178 | void i915_gem_cleanup_stolen(struct drm_device *dev) |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index d60684d9847c..112120e909ee 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -3408,7 +3408,7 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc) | |||
3408 | intel_crtc_wait_for_pending_flips(crtc); | 3408 | intel_crtc_wait_for_pending_flips(crtc); |
3409 | drm_vblank_off(dev, pipe); | 3409 | drm_vblank_off(dev, pipe); |
3410 | 3410 | ||
3411 | if (dev_priv->cfb_plane == plane) | 3411 | if (dev_priv->fbc.plane == plane) |
3412 | intel_disable_fbc(dev); | 3412 | intel_disable_fbc(dev); |
3413 | 3413 | ||
3414 | intel_crtc_update_cursor(crtc, false); | 3414 | intel_crtc_update_cursor(crtc, false); |
@@ -3481,7 +3481,7 @@ static void haswell_crtc_disable(struct drm_crtc *crtc) | |||
3481 | drm_vblank_off(dev, pipe); | 3481 | drm_vblank_off(dev, pipe); |
3482 | 3482 | ||
3483 | /* FBC must be disabled before disabling the plane on HSW. */ | 3483 | /* FBC must be disabled before disabling the plane on HSW. */ |
3484 | if (dev_priv->cfb_plane == plane) | 3484 | if (dev_priv->fbc.plane == plane) |
3485 | intel_disable_fbc(dev); | 3485 | intel_disable_fbc(dev); |
3486 | 3486 | ||
3487 | hsw_disable_ips(intel_crtc); | 3487 | hsw_disable_ips(intel_crtc); |
@@ -3720,7 +3720,7 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc) | |||
3720 | intel_crtc_wait_for_pending_flips(crtc); | 3720 | intel_crtc_wait_for_pending_flips(crtc); |
3721 | drm_vblank_off(dev, pipe); | 3721 | drm_vblank_off(dev, pipe); |
3722 | 3722 | ||
3723 | if (dev_priv->cfb_plane == plane) | 3723 | if (dev_priv->fbc.plane == plane) |
3724 | intel_disable_fbc(dev); | 3724 | intel_disable_fbc(dev); |
3725 | 3725 | ||
3726 | intel_crtc_dpms_overlay(intel_crtc, false); | 3726 | intel_crtc_dpms_overlay(intel_crtc, false); |
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 6f7f33e70e91..5dfc1a0f2351 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h | |||
@@ -549,13 +549,6 @@ struct intel_unpin_work { | |||
549 | bool enable_stall_check; | 549 | bool enable_stall_check; |
550 | }; | 550 | }; |
551 | 551 | ||
552 | struct intel_fbc_work { | ||
553 | struct delayed_work work; | ||
554 | struct drm_crtc *crtc; | ||
555 | struct drm_framebuffer *fb; | ||
556 | int interval; | ||
557 | }; | ||
558 | |||
559 | int intel_pch_rawclk(struct drm_device *dev); | 552 | int intel_pch_rawclk(struct drm_device *dev); |
560 | 553 | ||
561 | int intel_connector_update_modes(struct drm_connector *connector, | 554 | int intel_connector_update_modes(struct drm_connector *connector, |
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index aa48fc6ba4db..5b4ade682bd6 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c | |||
@@ -87,7 +87,7 @@ static void i8xx_enable_fbc(struct drm_crtc *crtc, unsigned long interval) | |||
87 | int plane, i; | 87 | int plane, i; |
88 | u32 fbc_ctl, fbc_ctl2; | 88 | u32 fbc_ctl, fbc_ctl2; |
89 | 89 | ||
90 | cfb_pitch = dev_priv->cfb_size / FBC_LL_SIZE; | 90 | cfb_pitch = dev_priv->fbc.size / FBC_LL_SIZE; |
91 | if (fb->pitches[0] < cfb_pitch) | 91 | if (fb->pitches[0] < cfb_pitch) |
92 | cfb_pitch = fb->pitches[0]; | 92 | cfb_pitch = fb->pitches[0]; |
93 | 93 | ||
@@ -326,7 +326,7 @@ static void intel_fbc_work_fn(struct work_struct *__work) | |||
326 | struct drm_i915_private *dev_priv = dev->dev_private; | 326 | struct drm_i915_private *dev_priv = dev->dev_private; |
327 | 327 | ||
328 | mutex_lock(&dev->struct_mutex); | 328 | mutex_lock(&dev->struct_mutex); |
329 | if (work == dev_priv->fbc_work) { | 329 | if (work == dev_priv->fbc.fbc_work) { |
330 | /* Double check that we haven't switched fb without cancelling | 330 | /* Double check that we haven't switched fb without cancelling |
331 | * the prior work. | 331 | * the prior work. |
332 | */ | 332 | */ |
@@ -334,12 +334,12 @@ static void intel_fbc_work_fn(struct work_struct *__work) | |||
334 | dev_priv->display.enable_fbc(work->crtc, | 334 | dev_priv->display.enable_fbc(work->crtc, |
335 | work->interval); | 335 | work->interval); |
336 | 336 | ||
337 | dev_priv->cfb_plane = to_intel_crtc(work->crtc)->plane; | 337 | dev_priv->fbc.plane = to_intel_crtc(work->crtc)->plane; |
338 | dev_priv->cfb_fb = work->crtc->fb->base.id; | 338 | dev_priv->fbc.fb_id = work->crtc->fb->base.id; |
339 | dev_priv->cfb_y = work->crtc->y; | 339 | dev_priv->fbc.y = work->crtc->y; |
340 | } | 340 | } |
341 | 341 | ||
342 | dev_priv->fbc_work = NULL; | 342 | dev_priv->fbc.fbc_work = NULL; |
343 | } | 343 | } |
344 | mutex_unlock(&dev->struct_mutex); | 344 | mutex_unlock(&dev->struct_mutex); |
345 | 345 | ||
@@ -348,25 +348,25 @@ static void intel_fbc_work_fn(struct work_struct *__work) | |||
348 | 348 | ||
349 | static void intel_cancel_fbc_work(struct drm_i915_private *dev_priv) | 349 | static void intel_cancel_fbc_work(struct drm_i915_private *dev_priv) |
350 | { | 350 | { |
351 | if (dev_priv->fbc_work == NULL) | 351 | if (dev_priv->fbc.fbc_work == NULL) |
352 | return; | 352 | return; |
353 | 353 | ||
354 | DRM_DEBUG_KMS("cancelling pending FBC enable\n"); | 354 | DRM_DEBUG_KMS("cancelling pending FBC enable\n"); |
355 | 355 | ||
356 | /* Synchronisation is provided by struct_mutex and checking of | 356 | /* Synchronisation is provided by struct_mutex and checking of |
357 | * dev_priv->fbc_work, so we can perform the cancellation | 357 | * dev_priv->fbc.fbc_work, so we can perform the cancellation |
358 | * entirely asynchronously. | 358 | * entirely asynchronously. |
359 | */ | 359 | */ |
360 | if (cancel_delayed_work(&dev_priv->fbc_work->work)) | 360 | if (cancel_delayed_work(&dev_priv->fbc.fbc_work->work)) |
361 | /* tasklet was killed before being run, clean up */ | 361 | /* tasklet was killed before being run, clean up */ |
362 | kfree(dev_priv->fbc_work); | 362 | kfree(dev_priv->fbc.fbc_work); |
363 | 363 | ||
364 | /* Mark the work as no longer wanted so that if it does | 364 | /* Mark the work as no longer wanted so that if it does |
365 | * wake-up (because the work was already running and waiting | 365 | * wake-up (because the work was already running and waiting |
366 | * for our mutex), it will discover that is no longer | 366 | * for our mutex), it will discover that is no longer |
367 | * necessary to run. | 367 | * necessary to run. |
368 | */ | 368 | */ |
369 | dev_priv->fbc_work = NULL; | 369 | dev_priv->fbc.fbc_work = NULL; |
370 | } | 370 | } |
371 | 371 | ||
372 | static void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval) | 372 | static void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval) |
@@ -392,7 +392,7 @@ static void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval) | |||
392 | work->interval = interval; | 392 | work->interval = interval; |
393 | INIT_DELAYED_WORK(&work->work, intel_fbc_work_fn); | 393 | INIT_DELAYED_WORK(&work->work, intel_fbc_work_fn); |
394 | 394 | ||
395 | dev_priv->fbc_work = work; | 395 | dev_priv->fbc.fbc_work = work; |
396 | 396 | ||
397 | /* Delay the actual enabling to let pageflipping cease and the | 397 | /* Delay the actual enabling to let pageflipping cease and the |
398 | * display to settle before starting the compression. Note that | 398 | * display to settle before starting the compression. Note that |
@@ -418,7 +418,7 @@ void intel_disable_fbc(struct drm_device *dev) | |||
418 | return; | 418 | return; |
419 | 419 | ||
420 | dev_priv->display.disable_fbc(dev); | 420 | dev_priv->display.disable_fbc(dev); |
421 | dev_priv->cfb_plane = -1; | 421 | dev_priv->fbc.plane = -1; |
422 | } | 422 | } |
423 | 423 | ||
424 | /** | 424 | /** |
@@ -470,7 +470,8 @@ void intel_update_fbc(struct drm_device *dev) | |||
470 | !to_intel_crtc(tmp_crtc)->primary_disabled) { | 470 | !to_intel_crtc(tmp_crtc)->primary_disabled) { |
471 | if (crtc) { | 471 | if (crtc) { |
472 | DRM_DEBUG_KMS("more than one pipe active, disabling compression\n"); | 472 | DRM_DEBUG_KMS("more than one pipe active, disabling compression\n"); |
473 | dev_priv->no_fbc_reason = FBC_MULTIPLE_PIPES; | 473 | dev_priv->fbc.no_fbc_reason = |
474 | FBC_MULTIPLE_PIPES; | ||
474 | goto out_disable; | 475 | goto out_disable; |
475 | } | 476 | } |
476 | crtc = tmp_crtc; | 477 | crtc = tmp_crtc; |
@@ -479,7 +480,7 @@ void intel_update_fbc(struct drm_device *dev) | |||
479 | 480 | ||
480 | if (!crtc || crtc->fb == NULL) { | 481 | if (!crtc || crtc->fb == NULL) { |
481 | DRM_DEBUG_KMS("no output, disabling\n"); | 482 | DRM_DEBUG_KMS("no output, disabling\n"); |
482 | dev_priv->no_fbc_reason = FBC_NO_OUTPUT; | 483 | dev_priv->fbc.no_fbc_reason = FBC_NO_OUTPUT; |
483 | goto out_disable; | 484 | goto out_disable; |
484 | } | 485 | } |
485 | 486 | ||
@@ -491,19 +492,19 @@ void intel_update_fbc(struct drm_device *dev) | |||
491 | if (i915_enable_fbc < 0 && | 492 | if (i915_enable_fbc < 0 && |
492 | INTEL_INFO(dev)->gen <= 7 && !IS_HASWELL(dev)) { | 493 | INTEL_INFO(dev)->gen <= 7 && !IS_HASWELL(dev)) { |
493 | DRM_DEBUG_KMS("disabled per chip default\n"); | 494 | DRM_DEBUG_KMS("disabled per chip default\n"); |
494 | dev_priv->no_fbc_reason = FBC_CHIP_DEFAULT; | 495 | dev_priv->fbc.no_fbc_reason = FBC_CHIP_DEFAULT; |
495 | goto out_disable; | 496 | goto out_disable; |
496 | } | 497 | } |
497 | if (!i915_enable_fbc) { | 498 | if (!i915_enable_fbc) { |
498 | DRM_DEBUG_KMS("fbc disabled per module param\n"); | 499 | DRM_DEBUG_KMS("fbc disabled per module param\n"); |
499 | dev_priv->no_fbc_reason = FBC_MODULE_PARAM; | 500 | dev_priv->fbc.no_fbc_reason = FBC_MODULE_PARAM; |
500 | goto out_disable; | 501 | goto out_disable; |
501 | } | 502 | } |
502 | if ((crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) || | 503 | if ((crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) || |
503 | (crtc->mode.flags & DRM_MODE_FLAG_DBLSCAN)) { | 504 | (crtc->mode.flags & DRM_MODE_FLAG_DBLSCAN)) { |
504 | DRM_DEBUG_KMS("mode incompatible with compression, " | 505 | DRM_DEBUG_KMS("mode incompatible with compression, " |
505 | "disabling\n"); | 506 | "disabling\n"); |
506 | dev_priv->no_fbc_reason = FBC_UNSUPPORTED_MODE; | 507 | dev_priv->fbc.no_fbc_reason = FBC_UNSUPPORTED_MODE; |
507 | goto out_disable; | 508 | goto out_disable; |
508 | } | 509 | } |
509 | 510 | ||
@@ -517,13 +518,13 @@ void intel_update_fbc(struct drm_device *dev) | |||
517 | if ((crtc->mode.hdisplay > max_hdisplay) || | 518 | if ((crtc->mode.hdisplay > max_hdisplay) || |
518 | (crtc->mode.vdisplay > max_vdisplay)) { | 519 | (crtc->mode.vdisplay > max_vdisplay)) { |
519 | DRM_DEBUG_KMS("mode too large for compression, disabling\n"); | 520 | DRM_DEBUG_KMS("mode too large for compression, disabling\n"); |
520 | dev_priv->no_fbc_reason = FBC_MODE_TOO_LARGE; | 521 | dev_priv->fbc.no_fbc_reason = FBC_MODE_TOO_LARGE; |
521 | goto out_disable; | 522 | goto out_disable; |
522 | } | 523 | } |
523 | if ((IS_I915GM(dev) || IS_I945GM(dev) || IS_HASWELL(dev)) && | 524 | if ((IS_I915GM(dev) || IS_I945GM(dev) || IS_HASWELL(dev)) && |
524 | intel_crtc->plane != 0) { | 525 | intel_crtc->plane != 0) { |
525 | DRM_DEBUG_KMS("plane not 0, disabling compression\n"); | 526 | DRM_DEBUG_KMS("plane not 0, disabling compression\n"); |
526 | dev_priv->no_fbc_reason = FBC_BAD_PLANE; | 527 | dev_priv->fbc.no_fbc_reason = FBC_BAD_PLANE; |
527 | goto out_disable; | 528 | goto out_disable; |
528 | } | 529 | } |
529 | 530 | ||
@@ -533,7 +534,7 @@ void intel_update_fbc(struct drm_device *dev) | |||
533 | if (obj->tiling_mode != I915_TILING_X || | 534 | if (obj->tiling_mode != I915_TILING_X || |
534 | obj->fence_reg == I915_FENCE_REG_NONE) { | 535 | obj->fence_reg == I915_FENCE_REG_NONE) { |
535 | DRM_DEBUG_KMS("framebuffer not tiled or fenced, disabling compression\n"); | 536 | DRM_DEBUG_KMS("framebuffer not tiled or fenced, disabling compression\n"); |
536 | dev_priv->no_fbc_reason = FBC_NOT_TILED; | 537 | dev_priv->fbc.no_fbc_reason = FBC_NOT_TILED; |
537 | goto out_disable; | 538 | goto out_disable; |
538 | } | 539 | } |
539 | 540 | ||
@@ -543,7 +544,7 @@ void intel_update_fbc(struct drm_device *dev) | |||
543 | 544 | ||
544 | if (i915_gem_stolen_setup_compression(dev, intel_fb->obj->base.size)) { | 545 | if (i915_gem_stolen_setup_compression(dev, intel_fb->obj->base.size)) { |
545 | DRM_DEBUG_KMS("framebuffer too large, disabling compression\n"); | 546 | DRM_DEBUG_KMS("framebuffer too large, disabling compression\n"); |
546 | dev_priv->no_fbc_reason = FBC_STOLEN_TOO_SMALL; | 547 | dev_priv->fbc.no_fbc_reason = FBC_STOLEN_TOO_SMALL; |
547 | goto out_disable; | 548 | goto out_disable; |
548 | } | 549 | } |
549 | 550 | ||
@@ -552,9 +553,9 @@ void intel_update_fbc(struct drm_device *dev) | |||
552 | * cannot be unpinned (and have its GTT offset and fence revoked) | 553 | * cannot be unpinned (and have its GTT offset and fence revoked) |
553 | * without first being decoupled from the scanout and FBC disabled. | 554 | * without first being decoupled from the scanout and FBC disabled. |
554 | */ | 555 | */ |
555 | if (dev_priv->cfb_plane == intel_crtc->plane && | 556 | if (dev_priv->fbc.plane == intel_crtc->plane && |
556 | dev_priv->cfb_fb == fb->base.id && | 557 | dev_priv->fbc.fb_id == fb->base.id && |
557 | dev_priv->cfb_y == crtc->y) | 558 | dev_priv->fbc.y == crtc->y) |
558 | return; | 559 | return; |
559 | 560 | ||
560 | if (intel_fbc_enabled(dev)) { | 561 | if (intel_fbc_enabled(dev)) { |