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authorTony Prisk <linux@prisktech.co.nz>2013-05-10 01:35:11 -0400
committerTony Prisk <linux@prisktech.co.nz>2013-05-12 04:31:14 -0400
commit5c2b0a8531f594db82abc29e786b4c2d38fa298b (patch)
treef30bf9ade5b19ff378d9e5b52c681f43cbd806c3
parent7d4c6f3c5fdb216dfd36573d117eff602146cdcd (diff)
dts: vt8500: Populate missing PLL nodes
Add the missing devicetree nodes for PLL's found on the WM8505, WM8650 and WM8850 SoCs. Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
-rw-r--r--arch/arm/boot/dts/wm8505.dtsi21
-rw-r--r--arch/arm/boot/dts/wm8650.dtsi21
-rw-r--r--arch/arm/boot/dts/wm8850.dtsi35
3 files changed, 77 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/wm8505.dtsi b/arch/arm/boot/dts/wm8505.dtsi
index 060b5fca2c16..702d866b6f57 100644
--- a/arch/arm/boot/dts/wm8505.dtsi
+++ b/arch/arm/boot/dts/wm8505.dtsi
@@ -81,6 +81,13 @@
81 clock-frequency = <25000000>; 81 clock-frequency = <25000000>;
82 }; 82 };
83 83
84 plla: plla {
85 #clock-cells = <0>;
86 compatible = "via,vt8500-pll-clock";
87 clocks = <&ref25>;
88 reg = <0x200>;
89 };
90
84 pllb: pllb { 91 pllb: pllb {
85 #clock-cells = <0>; 92 #clock-cells = <0>;
86 compatible = "via,vt8500-pll-clock"; 93 compatible = "via,vt8500-pll-clock";
@@ -88,6 +95,20 @@
88 reg = <0x204>; 95 reg = <0x204>;
89 }; 96 };
90 97
98 pllc: pllc {
99 #clock-cells = <0>;
100 compatible = "via,vt8500-pll-clock";
101 clocks = <&ref25>;
102 reg = <0x208>;
103 };
104
105 plld: plld {
106 #clock-cells = <0>;
107 compatible = "via,vt8500-pll-clock";
108 clocks = <&ref25>;
109 reg = <0x20c>;
110 };
111
91 clkuart0: uart0 { 112 clkuart0: uart0 {
92 #clock-cells = <0>; 113 #clock-cells = <0>;
93 compatible = "via,vt8500-device-clock"; 114 compatible = "via,vt8500-device-clock";
diff --git a/arch/arm/boot/dts/wm8650.dtsi b/arch/arm/boot/dts/wm8650.dtsi
index 4fdae5ce4dfb..46a4603c9c53 100644
--- a/arch/arm/boot/dts/wm8650.dtsi
+++ b/arch/arm/boot/dts/wm8650.dtsi
@@ -92,6 +92,27 @@
92 reg = <0x204>; 92 reg = <0x204>;
93 }; 93 };
94 94
95 pllc: pllc {
96 #clock-cells = <0>;
97 compatible = "wm,wm8650-pll-clock";
98 clocks = <&ref25>;
99 reg = <0x208>;
100 };
101
102 plld: plld {
103 #clock-cells = <0>;
104 compatible = "wm,wm8650-pll-clock";
105 clocks = <&ref25>;
106 reg = <0x20c>;
107 };
108
109 plle: plle {
110 #clock-cells = <0>;
111 compatible = "wm,wm8650-pll-clock";
112 clocks = <&ref25>;
113 reg = <0x210>;
114 };
115
95 clkuart0: uart0 { 116 clkuart0: uart0 {
96 #clock-cells = <0>; 117 #clock-cells = <0>;
97 compatible = "via,vt8500-device-clock"; 118 compatible = "via,vt8500-device-clock";
diff --git a/arch/arm/boot/dts/wm8850.dtsi b/arch/arm/boot/dts/wm8850.dtsi
index 9239c0a3aeb7..59aaad98f544 100644
--- a/arch/arm/boot/dts/wm8850.dtsi
+++ b/arch/arm/boot/dts/wm8850.dtsi
@@ -95,6 +95,41 @@
95 reg = <0x204>; 95 reg = <0x204>;
96 }; 96 };
97 97
98 pllc: pllc {
99 #clock-cells = <0>;
100 compatible = "wm,wm8850-pll-clock";
101 clocks = <&ref25>;
102 reg = <0x208>;
103 };
104
105 plld: plld {
106 #clock-cells = <0>;
107 compatible = "wm,wm8850-pll-clock";
108 clocks = <&ref25>;
109 reg = <0x20c>;
110 };
111
112 plle: plle {
113 #clock-cells = <0>;
114 compatible = "wm,wm8850-pll-clock";
115 clocks = <&ref25>;
116 reg = <0x210>;
117 };
118
119 pllf: pllf {
120 #clock-cells = <0>;
121 compatible = "wm,wm8850-pll-clock";
122 clocks = <&ref25>;
123 reg = <0x214>;
124 };
125
126 pllg: pllg {
127 #clock-cells = <0>;
128 compatible = "wm,wm8850-pll-clock";
129 clocks = <&ref25>;
130 reg = <0x218>;
131 };
132
98 clkuart0: uart0 { 133 clkuart0: uart0 {
99 #clock-cells = <0>; 134 #clock-cells = <0>;
100 compatible = "via,vt8500-device-clock"; 135 compatible = "via,vt8500-device-clock";