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authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2012-12-15 17:51:45 -0500
committerSimon Horman <horms+renesas@verge.net.au>2013-01-24 19:24:29 -0500
commit5b574e29b13b699e3f6f961d400b962f9c390223 (patch)
tree8352b2c3d5a09db6c72d155a911a1253735dc3b5
parent9f27bac5ab0f332a8a4951bb5c9290abfda1f571 (diff)
sh: sh7722: pinmux: Use driver-provided pinmux info
Pinmux info for the sh machines is now provided by pinmux drivers. Remove the duplicate copy in arch code. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat
-rw-r--r--arch/sh/kernel/cpu/sh4a/pinmux-sh7722.c1777
1 files changed, 1 insertions, 1776 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/pinmux-sh7722.c b/arch/sh/kernel/cpu/sh4a/pinmux-sh7722.c
index 11dbce342884..d9bcc4290997 100644
--- a/arch/sh/kernel/cpu/sh4a/pinmux-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/pinmux-sh7722.c
@@ -1,1785 +1,10 @@
1#include <linux/init.h> 1#include <linux/init.h>
2#include <linux/kernel.h> 2#include <linux/kernel.h>
3#include <linux/gpio.h>
4#include <cpu/pfc.h> 3#include <cpu/pfc.h>
5#include <cpu/sh7722.h>
6
7enum {
8 PINMUX_RESERVED = 0,
9
10 PINMUX_DATA_BEGIN,
11 PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
12 PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA,
13 PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
14 PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA,
15 PTC7_DATA, PTC5_DATA, PTC4_DATA, PTC3_DATA, PTC2_DATA, PTC0_DATA,
16 PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
17 PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA,
18 PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA, PTE1_DATA, PTE0_DATA,
19 PTF6_DATA, PTF5_DATA, PTF4_DATA,
20 PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA,
21 PTG4_DATA, PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA,
22 PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
23 PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA,
24 PTJ7_DATA, PTJ6_DATA, PTJ5_DATA, PTJ1_DATA, PTJ0_DATA,
25 PTK6_DATA, PTK5_DATA, PTK4_DATA,
26 PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA,
27 PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
28 PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA,
29 PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
30 PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA,
31 PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA,
32 PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA,
33 PTQ6_DATA, PTQ5_DATA, PTQ4_DATA,
34 PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA,
35 PTR4_DATA, PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA,
36 PTS4_DATA, PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA,
37 PTT4_DATA, PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA,
38 PTU4_DATA, PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA,
39 PTV4_DATA, PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA,
40 PTW6_DATA, PTW5_DATA, PTW4_DATA,
41 PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA,
42 PTX6_DATA, PTX5_DATA, PTX4_DATA,
43 PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA,
44 PTY6_DATA, PTY5_DATA, PTY4_DATA,
45 PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA,
46 PTZ5_DATA, PTZ4_DATA, PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA,
47 PINMUX_DATA_END,
48
49 PINMUX_INPUT_BEGIN,
50 PTA7_IN, PTA6_IN, PTA5_IN, PTA4_IN,
51 PTA3_IN, PTA2_IN, PTA1_IN, PTA0_IN,
52 PTB7_IN, PTB6_IN, PTB5_IN, PTB4_IN,
53 PTB3_IN, PTB2_IN, PTB1_IN, PTB0_IN,
54 PTC7_IN, PTC5_IN, PTC4_IN, PTC3_IN, PTC2_IN, PTC0_IN,
55 PTD7_IN, PTD6_IN, PTD5_IN, PTD4_IN, PTD3_IN, PTD2_IN, PTD1_IN,
56 PTE7_IN, PTE6_IN, PTE5_IN, PTE4_IN, PTE1_IN, PTE0_IN,
57 PTF6_IN, PTF5_IN, PTF4_IN, PTF3_IN, PTF2_IN, PTF1_IN,
58 PTH6_IN, PTH5_IN, PTH1_IN, PTH0_IN,
59 PTJ1_IN, PTJ0_IN,
60 PTK6_IN, PTK5_IN, PTK4_IN, PTK3_IN, PTK2_IN, PTK0_IN,
61 PTL7_IN, PTL6_IN, PTL5_IN, PTL4_IN,
62 PTL3_IN, PTL2_IN, PTL1_IN, PTL0_IN,
63 PTM7_IN, PTM6_IN, PTM5_IN, PTM4_IN,
64 PTM3_IN, PTM2_IN, PTM1_IN, PTM0_IN,
65 PTN7_IN, PTN6_IN, PTN5_IN, PTN4_IN,
66 PTN3_IN, PTN2_IN, PTN1_IN, PTN0_IN,
67 PTQ5_IN, PTQ4_IN, PTQ3_IN, PTQ2_IN, PTQ0_IN,
68 PTR2_IN,
69 PTS4_IN, PTS2_IN, PTS1_IN,
70 PTT4_IN, PTT3_IN, PTT2_IN, PTT1_IN,
71 PTU4_IN, PTU3_IN, PTU2_IN, PTU1_IN, PTU0_IN,
72 PTV4_IN, PTV3_IN, PTV2_IN, PTV1_IN, PTV0_IN,
73 PTW6_IN, PTW4_IN, PTW3_IN, PTW2_IN, PTW1_IN, PTW0_IN,
74 PTX6_IN, PTX5_IN, PTX4_IN, PTX3_IN, PTX2_IN, PTX1_IN, PTX0_IN,
75 PTY5_IN, PTY4_IN, PTY3_IN, PTY2_IN, PTY0_IN,
76 PTZ5_IN, PTZ4_IN, PTZ3_IN, PTZ2_IN, PTZ1_IN,
77 PINMUX_INPUT_END,
78
79 PINMUX_INPUT_PULLDOWN_BEGIN,
80 PTA7_IN_PD, PTA6_IN_PD, PTA5_IN_PD, PTA4_IN_PD,
81 PTA3_IN_PD, PTA2_IN_PD, PTA1_IN_PD, PTA0_IN_PD,
82 PTE7_IN_PD, PTE6_IN_PD, PTE5_IN_PD, PTE4_IN_PD, PTE1_IN_PD, PTE0_IN_PD,
83 PTF6_IN_PD, PTF5_IN_PD, PTF4_IN_PD, PTF3_IN_PD, PTF2_IN_PD, PTF1_IN_PD,
84 PTH6_IN_PD, PTH5_IN_PD, PTH1_IN_PD, PTH0_IN_PD,
85 PTK6_IN_PD, PTK5_IN_PD, PTK4_IN_PD, PTK3_IN_PD, PTK2_IN_PD, PTK0_IN_PD,
86 PTL7_IN_PD, PTL6_IN_PD, PTL5_IN_PD, PTL4_IN_PD,
87 PTL3_IN_PD, PTL2_IN_PD, PTL1_IN_PD, PTL0_IN_PD,
88 PTM7_IN_PD, PTM6_IN_PD, PTM5_IN_PD, PTM4_IN_PD,
89 PTM3_IN_PD, PTM2_IN_PD, PTM1_IN_PD, PTM0_IN_PD,
90 PTQ5_IN_PD, PTQ4_IN_PD, PTQ3_IN_PD, PTQ2_IN_PD,
91 PTS4_IN_PD, PTS2_IN_PD, PTS1_IN_PD,
92 PTT4_IN_PD, PTT3_IN_PD, PTT2_IN_PD, PTT1_IN_PD,
93 PTU4_IN_PD, PTU3_IN_PD, PTU2_IN_PD, PTU1_IN_PD, PTU0_IN_PD,
94 PTV4_IN_PD, PTV3_IN_PD, PTV2_IN_PD, PTV1_IN_PD, PTV0_IN_PD,
95 PTW6_IN_PD, PTW4_IN_PD, PTW3_IN_PD, PTW2_IN_PD, PTW1_IN_PD, PTW0_IN_PD,
96 PTX6_IN_PD, PTX5_IN_PD, PTX4_IN_PD,
97 PTX3_IN_PD, PTX2_IN_PD, PTX1_IN_PD, PTX0_IN_PD,
98 PINMUX_INPUT_PULLDOWN_END,
99
100 PINMUX_INPUT_PULLUP_BEGIN,
101 PTC7_IN_PU, PTC5_IN_PU,
102 PTD7_IN_PU, PTD6_IN_PU, PTD5_IN_PU, PTD4_IN_PU,
103 PTD3_IN_PU, PTD2_IN_PU, PTD1_IN_PU,
104 PTJ1_IN_PU, PTJ0_IN_PU,
105 PTQ0_IN_PU,
106 PTR2_IN_PU,
107 PTX6_IN_PU,
108 PTY5_IN_PU, PTY4_IN_PU, PTY3_IN_PU, PTY2_IN_PU, PTY0_IN_PU,
109 PTZ5_IN_PU, PTZ4_IN_PU, PTZ3_IN_PU, PTZ2_IN_PU, PTZ1_IN_PU,
110 PINMUX_INPUT_PULLUP_END,
111
112 PINMUX_OUTPUT_BEGIN,
113 PTA7_OUT, PTA5_OUT,
114 PTB7_OUT, PTB6_OUT, PTB5_OUT, PTB4_OUT,
115 PTB3_OUT, PTB2_OUT, PTB1_OUT, PTB0_OUT,
116 PTC4_OUT, PTC3_OUT, PTC2_OUT, PTC0_OUT,
117 PTD6_OUT, PTD5_OUT, PTD4_OUT,
118 PTD3_OUT, PTD2_OUT, PTD1_OUT, PTD0_OUT,
119 PTE7_OUT, PTE6_OUT, PTE5_OUT, PTE4_OUT, PTE1_OUT, PTE0_OUT,
120 PTF6_OUT, PTF5_OUT, PTF4_OUT, PTF3_OUT, PTF2_OUT, PTF0_OUT,
121 PTG4_OUT, PTG3_OUT, PTG2_OUT, PTG1_OUT, PTG0_OUT,
122 PTH7_OUT, PTH6_OUT, PTH5_OUT, PTH4_OUT,
123 PTH3_OUT, PTH2_OUT, PTH1_OUT, PTH0_OUT,
124 PTJ7_OUT, PTJ6_OUT, PTJ5_OUT, PTJ1_OUT, PTJ0_OUT,
125 PTK6_OUT, PTK5_OUT, PTK4_OUT, PTK3_OUT, PTK1_OUT, PTK0_OUT,
126 PTL7_OUT, PTL6_OUT, PTL5_OUT, PTL4_OUT,
127 PTL3_OUT, PTL2_OUT, PTL1_OUT, PTL0_OUT,
128 PTM7_OUT, PTM6_OUT, PTM5_OUT, PTM4_OUT,
129 PTM3_OUT, PTM2_OUT, PTM1_OUT, PTM0_OUT,
130 PTN7_OUT, PTN6_OUT, PTN5_OUT, PTN4_OUT,
131 PTN3_OUT, PTN2_OUT, PTN1_OUT, PTN0_OUT, PTQ6_OUT, PTQ5_OUT, PTQ4_OUT,
132 PTQ3_OUT, PTQ2_OUT, PTQ1_OUT, PTQ0_OUT,
133 PTR4_OUT, PTR3_OUT, PTR1_OUT, PTR0_OUT,
134 PTS3_OUT, PTS2_OUT, PTS0_OUT,
135 PTT4_OUT, PTT3_OUT, PTT2_OUT, PTT0_OUT,
136 PTU4_OUT, PTU3_OUT, PTU2_OUT, PTU0_OUT,
137 PTV4_OUT, PTV3_OUT, PTV2_OUT, PTV1_OUT, PTV0_OUT,
138 PTW5_OUT, PTW4_OUT, PTW3_OUT, PTW2_OUT, PTW1_OUT, PTW0_OUT,
139 PTX6_OUT, PTX5_OUT, PTX4_OUT, PTX3_OUT, PTX2_OUT, PTX1_OUT, PTX0_OUT,
140 PTY5_OUT, PTY4_OUT, PTY3_OUT, PTY2_OUT, PTY1_OUT, PTY0_OUT,
141 PINMUX_OUTPUT_END,
142
143 PINMUX_MARK_BEGIN,
144 SCIF0_TXD_MARK, SCIF0_RXD_MARK,
145 SCIF0_RTS_MARK, SCIF0_CTS_MARK, SCIF0_SCK_MARK,
146 SCIF1_TXD_MARK, SCIF1_RXD_MARK,
147 SCIF1_RTS_MARK, SCIF1_CTS_MARK, SCIF1_SCK_MARK,
148 SCIF2_TXD_MARK, SCIF2_RXD_MARK,
149 SCIF2_RTS_MARK, SCIF2_CTS_MARK, SCIF2_SCK_MARK,
150 SIOTXD_MARK, SIORXD_MARK,
151 SIOD_MARK, SIOSTRB0_MARK, SIOSTRB1_MARK,
152 SIOSCK_MARK, SIOMCK_MARK,
153 VIO_D15_MARK, VIO_D14_MARK, VIO_D13_MARK, VIO_D12_MARK,
154 VIO_D11_MARK, VIO_D10_MARK, VIO_D9_MARK, VIO_D8_MARK,
155 VIO_D7_MARK, VIO_D6_MARK, VIO_D5_MARK, VIO_D4_MARK,
156 VIO_D3_MARK, VIO_D2_MARK, VIO_D1_MARK, VIO_D0_MARK,
157 VIO_CLK_MARK, VIO_VD_MARK, VIO_HD_MARK, VIO_FLD_MARK,
158 VIO_CKO_MARK, VIO_STEX_MARK, VIO_STEM_MARK, VIO_VD2_MARK,
159 VIO_HD2_MARK, VIO_CLK2_MARK,
160 LCDD23_MARK, LCDD22_MARK, LCDD21_MARK, LCDD20_MARK,
161 LCDD19_MARK, LCDD18_MARK, LCDD17_MARK, LCDD16_MARK,
162 LCDD15_MARK, LCDD14_MARK, LCDD13_MARK, LCDD12_MARK,
163 LCDD11_MARK, LCDD10_MARK, LCDD9_MARK, LCDD8_MARK,
164 LCDD7_MARK, LCDD6_MARK, LCDD5_MARK, LCDD4_MARK,
165 LCDD3_MARK, LCDD2_MARK, LCDD1_MARK, LCDD0_MARK,
166 LCDLCLK_MARK, LCDDON_MARK, LCDVCPWC_MARK, LCDVEPWC_MARK,
167 LCDVSYN_MARK, LCDDCK_MARK, LCDHSYN_MARK, LCDDISP_MARK,
168 LCDRS_MARK, LCDCS_MARK, LCDWR_MARK, LCDRD_MARK,
169 LCDDON2_MARK, LCDVCPWC2_MARK, LCDVEPWC2_MARK, LCDVSYN2_MARK,
170 LCDCS2_MARK,
171 IOIS16_MARK, A25_MARK, A24_MARK, A23_MARK, A22_MARK,
172 BS_MARK, CS6B_CE1B_MARK, WAIT_MARK, CS6A_CE2B_MARK,
173 HPD63_MARK, HPD62_MARK, HPD61_MARK, HPD60_MARK,
174 HPD59_MARK, HPD58_MARK, HPD57_MARK, HPD56_MARK,
175 HPD55_MARK, HPD54_MARK, HPD53_MARK, HPD52_MARK,
176 HPD51_MARK, HPD50_MARK, HPD49_MARK, HPD48_MARK,
177 HPDQM7_MARK, HPDQM6_MARK, HPDQM5_MARK, HPDQM4_MARK,
178 IRQ0_MARK, IRQ1_MARK, IRQ2_MARK, IRQ3_MARK,
179 IRQ4_MARK, IRQ5_MARK, IRQ6_MARK, IRQ7_MARK,
180 SDHICD_MARK, SDHIWP_MARK, SDHID3_MARK, SDHID2_MARK,
181 SDHID1_MARK, SDHID0_MARK, SDHICMD_MARK, SDHICLK_MARK,
182 SIUAOLR_MARK, SIUAOBT_MARK, SIUAISLD_MARK, SIUAILR_MARK,
183 SIUAIBT_MARK, SIUAOSLD_MARK, SIUMCKA_MARK, SIUFCKA_MARK,
184 SIUBOLR_MARK, SIUBOBT_MARK, SIUBISLD_MARK, SIUBILR_MARK,
185 SIUBIBT_MARK, SIUBOSLD_MARK, SIUMCKB_MARK, SIUFCKB_MARK,
186 AUDSYNC_MARK, AUDATA3_MARK, AUDATA2_MARK, AUDATA1_MARK, AUDATA0_MARK,
187 DACK_MARK, DREQ0_MARK,
188 DV_CLKI_MARK, DV_CLK_MARK, DV_HSYNC_MARK, DV_VSYNC_MARK,
189 DV_D15_MARK, DV_D14_MARK, DV_D13_MARK, DV_D12_MARK,
190 DV_D11_MARK, DV_D10_MARK, DV_D9_MARK, DV_D8_MARK,
191 DV_D7_MARK, DV_D6_MARK, DV_D5_MARK, DV_D4_MARK,
192 DV_D3_MARK, DV_D2_MARK, DV_D1_MARK, DV_D0_MARK,
193 STATUS0_MARK, PDSTATUS_MARK,
194 SIOF0_MCK_MARK, SIOF0_SCK_MARK,
195 SIOF0_SYNC_MARK, SIOF0_SS1_MARK, SIOF0_SS2_MARK,
196 SIOF0_TXD_MARK, SIOF0_RXD_MARK,
197 SIOF1_MCK_MARK, SIOF1_SCK_MARK,
198 SIOF1_SYNC_MARK, SIOF1_SS1_MARK, SIOF1_SS2_MARK,
199 SIOF1_TXD_MARK, SIOF1_RXD_MARK,
200 SIM_D_MARK, SIM_CLK_MARK, SIM_RST_MARK,
201 TS_SDAT_MARK, TS_SCK_MARK, TS_SDEN_MARK, TS_SPSYNC_MARK,
202 IRDA_IN_MARK, IRDA_OUT_MARK,
203 TPUTO_MARK,
204 FCE_MARK, NAF7_MARK, NAF6_MARK, NAF5_MARK, NAF4_MARK,
205 NAF3_MARK, NAF2_MARK, NAF1_MARK, NAF0_MARK, FCDE_MARK,
206 FOE_MARK, FSC_MARK, FWE_MARK, FRB_MARK,
207 KEYIN0_MARK, KEYIN1_MARK, KEYIN2_MARK, KEYIN3_MARK, KEYIN4_MARK,
208 KEYOUT0_MARK, KEYOUT1_MARK, KEYOUT2_MARK, KEYOUT3_MARK,
209 KEYOUT4_IN6_MARK, KEYOUT5_IN5_MARK,
210 PINMUX_MARK_END,
211
212 PINMUX_FUNCTION_BEGIN,
213 VIO_D7_SCIF1_SCK, VIO_D6_SCIF1_RXD, VIO_D5_SCIF1_TXD, VIO_D4,
214 VIO_D3, VIO_D2, VIO_D1, VIO_D0_LCDLCLK,
215 HPD55, HPD54, HPD53, HPD52, HPD51, HPD50, HPD49, HPD48,
216 IOIS16, HPDQM7, HPDQM6, HPDQM5, HPDQM4,
217 SDHICD, SDHIWP, SDHID3, IRQ2_SDHID2, SDHID1, SDHID0, SDHICMD, SDHICLK,
218 A25, A24, A23, A22, IRQ5, IRQ4_BS,
219 PTF6, SIOSCK_SIUBOBT, SIOSTRB1_SIUBOLR,
220 SIOSTRB0_SIUBIBT, SIOD_SIUBILR, SIORXD_SIUBISLD, SIOTXD_SIUBOSLD,
221 AUDSYNC, AUDATA3, AUDATA2, AUDATA1, AUDATA0,
222 LCDVCPWC_LCDVCPWC2, LCDVSYN2_DACK, LCDVSYN, LCDDISP_LCDRS,
223 LCDHSYN_LCDCS, LCDDON_LCDDON2, LCDD17_DV_HSYNC, LCDD16_DV_VSYNC,
224 STATUS0, PDSTATUS, IRQ1, IRQ0,
225 SIUAILR_SIOF1_SS2, SIUAIBT_SIOF1_SS1, SIUAOLR_SIOF1_SYNC,
226 SIUAOBT_SIOF1_SCK, SIUAISLD_SIOF1_RXD, SIUAOSLD_SIOF1_TXD, PTK0,
227 LCDD15_DV_D15, LCDD14_DV_D14, LCDD13_DV_D13, LCDD12_DV_D12,
228 LCDD11_DV_D11, LCDD10_DV_D10, LCDD9_DV_D9, LCDD8_DV_D8,
229 LCDD7_DV_D7, LCDD6_DV_D6, LCDD5_DV_D5, LCDD4_DV_D4,
230 LCDD3_DV_D3, LCDD2_DV_D2, LCDD1_DV_D1, LCDD0_DV_D0,
231 HPD63, HPD62, HPD61, HPD60, HPD59, HPD58, HPD57, HPD56,
232 SIOF0_SS2_SIM_RST, SIOF0_SS1_TS_SPSYNC, SIOF0_SYNC_TS_SDEN,
233 SIOF0_SCK_TS_SCK, PTQ2, PTQ1, PTQ0,
234 LCDRD, CS6B_CE1B_LCDCS2, WAIT, LCDDCK_LCDWR, LCDVEPWC_LCDVEPWC2,
235 SCIF0_CTS_SIUAISPD, SCIF0_RTS_SIUAOSPD,
236 SCIF0_SCK_TPUTO, SCIF0_RXD, SCIF0_TXD,
237 FOE_VIO_VD2, FWE, FSC, DREQ0, FCDE,
238 NAF2_VIO_D10, NAF1_VIO_D9, NAF0_VIO_D8,
239 FRB_VIO_CLK2, FCE_VIO_HD2,
240 NAF7_VIO_D15, NAF6_VIO_D14, NAF5_VIO_D13, NAF4_VIO_D12, NAF3_VIO_D11,
241 VIO_FLD_SCIF2_CTS, VIO_CKO_SCIF2_RTS, VIO_STEX_SCIF2_SCK,
242 VIO_STEM_SCIF2_TXD, VIO_HD_SCIF2_RXD,
243 VIO_VD_SCIF1_CTS, VIO_CLK_SCIF1_RTS,
244 CS6A_CE2B, LCDD23, LCDD22, LCDD21, LCDD20,
245 LCDD19_DV_CLKI, LCDD18_DV_CLK,
246 KEYOUT5_IN5, KEYOUT4_IN6, KEYOUT3, KEYOUT2, KEYOUT1, KEYOUT0,
247 KEYIN4_IRQ7, KEYIN3, KEYIN2, KEYIN1, KEYIN0_IRQ6,
248
249 PSA15_KEYIN0, PSA15_IRQ6, PSA14_KEYIN4, PSA14_IRQ7,
250 PSA9_IRQ4, PSA9_BS, PSA4_IRQ2, PSA4_SDHID2,
251 PSB15_SIOTXD, PSB15_SIUBOSLD, PSB14_SIORXD, PSB14_SIUBISLD,
252 PSB13_SIOD, PSB13_SIUBILR, PSB12_SIOSTRB0, PSB12_SIUBIBT,
253 PSB11_SIOSTRB1, PSB11_SIUBOLR, PSB10_SIOSCK, PSB10_SIUBOBT,
254 PSB9_SIOMCK, PSB9_SIUMCKB, PSB8_SIOF0_MCK, PSB8_IRQ3,
255 PSB7_SIOF0_TXD, PSB7_IRDA_OUT, PSB6_SIOF0_RXD, PSB6_IRDA_IN,
256 PSB5_SIOF0_SCK, PSB5_TS_SCK, PSB4_SIOF0_SYNC, PSB4_TS_SDEN,
257 PSB3_SIOF0_SS1, PSB3_TS_SPSYNC, PSB2_SIOF0_SS2, PSB2_SIM_RST,
258 PSB1_SIUMCKA, PSB1_SIOF1_MCK, PSB0_SIUAOSLD, PSB0_SIOF1_TXD,
259 PSC15_SIUAISLD, PSC15_SIOF1_RXD, PSC14_SIUAOBT, PSC14_SIOF1_SCK,
260 PSC13_SIUAOLR, PSC13_SIOF1_SYNC, PSC12_SIUAIBT, PSC12_SIOF1_SS1,
261 PSC11_SIUAILR, PSC11_SIOF1_SS2, PSC0_NAF, PSC0_VIO,
262 PSD13_VIO, PSD13_SCIF2, PSD12_VIO, PSD12_SCIF1,
263 PSD11_VIO, PSD11_SCIF1, PSD10_VIO_D0, PSD10_LCDLCLK,
264 PSD9_SIOMCK_SIUMCKB, PSD9_SIUFCKB, PSD8_SCIF0_SCK, PSD8_TPUTO,
265 PSD7_SCIF0_RTS, PSD7_SIUAOSPD, PSD6_SCIF0_CTS, PSD6_SIUAISPD,
266 PSD5_CS6B_CE1B, PSD5_LCDCS2,
267 PSD3_LCDVEPWC_LCDVCPWC, PSD3_LCDVEPWC2_LCDVCPWC2,
268 PSD2_LCDDON, PSD2_LCDDON2, PSD0_LCDD19_LCDD0, PSD0_DV,
269 PSE15_SIOF0_MCK_IRQ3, PSE15_SIM_D,
270 PSE14_SIOF0_TXD_IRDA_OUT, PSE14_SIM_CLK,
271 PSE13_SIOF0_RXD_IRDA_IN, PSE13_TS_SDAT, PSE12_LCDVSYN2, PSE12_DACK,
272 PSE11_SIUMCKA_SIOF1_MCK, PSE11_SIUFCKA,
273 PSE3_FLCTL, PSE3_VIO, PSE2_NAF2, PSE2_VIO_D10,
274 PSE1_NAF1, PSE1_VIO_D9, PSE0_NAF0, PSE0_VIO_D8,
275
276 HIZA14_KEYSC, HIZA14_HIZ,
277 HIZA10_NAF, HIZA10_HIZ,
278 HIZA9_VIO, HIZA9_HIZ,
279 HIZA8_LCDC, HIZA8_HIZ,
280 HIZA7_LCDC, HIZA7_HIZ,
281 HIZA6_LCDC, HIZA6_HIZ,
282 HIZB4_SIUA, HIZB4_HIZ,
283 HIZB1_VIO, HIZB1_HIZ,
284 HIZB0_VIO, HIZB0_HIZ,
285 HIZC15_IRQ7, HIZC15_HIZ,
286 HIZC14_IRQ6, HIZC14_HIZ,
287 HIZC13_IRQ5, HIZC13_HIZ,
288 HIZC12_IRQ4, HIZC12_HIZ,
289 HIZC11_IRQ3, HIZC11_HIZ,
290 HIZC10_IRQ2, HIZC10_HIZ,
291 HIZC9_IRQ1, HIZC9_HIZ,
292 HIZC8_IRQ0, HIZC8_HIZ,
293 MSELB9_VIO, MSELB9_VIO2,
294 MSELB8_RGB, MSELB8_SYS,
295 PINMUX_FUNCTION_END,
296};
297
298static pinmux_enum_t pinmux_data[] = {
299 /* PTA */
300 PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_IN_PD, PTA7_OUT),
301 PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_IN_PD),
302 PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_IN_PD, PTA5_OUT),
303 PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_IN_PD),
304 PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_IN_PD),
305 PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_IN_PD),
306 PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_IN_PD),
307 PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_IN_PD),
308
309 /* PTB */
310 PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT),
311 PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT),
312 PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT),
313 PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT),
314 PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT),
315 PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT),
316 PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT),
317 PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT),
318
319 /* PTC */
320 PINMUX_DATA(PTC7_DATA, PTC7_IN, PTC7_IN_PU),
321 PINMUX_DATA(PTC5_DATA, PTC5_IN, PTC5_IN_PU),
322 PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT),
323 PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT),
324 PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT),
325 PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT),
326
327 /* PTD */
328 PINMUX_DATA(PTD7_DATA, PTD7_IN, PTD7_IN_PU),
329 PINMUX_DATA(PTD6_DATA, PTD6_OUT, PTD6_IN, PTD6_IN_PU),
330 PINMUX_DATA(PTD5_DATA, PTD5_OUT, PTD5_IN, PTD5_IN_PU),
331 PINMUX_DATA(PTD4_DATA, PTD4_OUT, PTD4_IN, PTD4_IN_PU),
332 PINMUX_DATA(PTD3_DATA, PTD3_OUT, PTD3_IN, PTD3_IN_PU),
333 PINMUX_DATA(PTD2_DATA, PTD2_OUT, PTD2_IN, PTD2_IN_PU),
334 PINMUX_DATA(PTD1_DATA, PTD1_OUT, PTD1_IN, PTD1_IN_PU),
335 PINMUX_DATA(PTD0_DATA, PTD0_OUT),
336
337 /* PTE */
338 PINMUX_DATA(PTE7_DATA, PTE7_OUT, PTE7_IN, PTE7_IN_PD),
339 PINMUX_DATA(PTE6_DATA, PTE6_OUT, PTE6_IN, PTE6_IN_PD),
340 PINMUX_DATA(PTE5_DATA, PTE5_OUT, PTE5_IN, PTE5_IN_PD),
341 PINMUX_DATA(PTE4_DATA, PTE4_OUT, PTE4_IN, PTE4_IN_PD),
342 PINMUX_DATA(PTE1_DATA, PTE1_OUT, PTE1_IN, PTE1_IN_PD),
343 PINMUX_DATA(PTE0_DATA, PTE0_OUT, PTE0_IN, PTE0_IN_PD),
344
345 /* PTF */
346 PINMUX_DATA(PTF6_DATA, PTF6_OUT, PTF6_IN, PTF6_IN_PD),
347 PINMUX_DATA(PTF5_DATA, PTF5_OUT, PTF5_IN, PTF5_IN_PD),
348 PINMUX_DATA(PTF4_DATA, PTF4_OUT, PTF4_IN, PTF4_IN_PD),
349 PINMUX_DATA(PTF3_DATA, PTF3_OUT, PTF3_IN, PTF3_IN_PD),
350 PINMUX_DATA(PTF2_DATA, PTF2_OUT, PTF2_IN, PTF2_IN_PD),
351 PINMUX_DATA(PTF1_DATA, PTF1_IN, PTF1_IN_PD),
352 PINMUX_DATA(PTF0_DATA, PTF0_OUT),
353
354 /* PTG */
355 PINMUX_DATA(PTG4_DATA, PTG4_OUT),
356 PINMUX_DATA(PTG3_DATA, PTG3_OUT),
357 PINMUX_DATA(PTG2_DATA, PTG2_OUT),
358 PINMUX_DATA(PTG1_DATA, PTG1_OUT),
359 PINMUX_DATA(PTG0_DATA, PTG0_OUT),
360
361 /* PTH */
362 PINMUX_DATA(PTH7_DATA, PTH7_OUT),
363 PINMUX_DATA(PTH6_DATA, PTH6_OUT, PTH6_IN, PTH6_IN_PD),
364 PINMUX_DATA(PTH5_DATA, PTH5_OUT, PTH5_IN, PTH5_IN_PD),
365 PINMUX_DATA(PTH4_DATA, PTH4_OUT),
366 PINMUX_DATA(PTH3_DATA, PTH3_OUT),
367 PINMUX_DATA(PTH2_DATA, PTH2_OUT),
368 PINMUX_DATA(PTH1_DATA, PTH1_OUT, PTH1_IN, PTH1_IN_PD),
369 PINMUX_DATA(PTH0_DATA, PTH0_OUT, PTH0_IN, PTH0_IN_PD),
370
371 /* PTJ */
372 PINMUX_DATA(PTJ7_DATA, PTJ7_OUT),
373 PINMUX_DATA(PTJ6_DATA, PTJ6_OUT),
374 PINMUX_DATA(PTJ5_DATA, PTJ5_OUT),
375 PINMUX_DATA(PTJ1_DATA, PTJ1_OUT, PTJ1_IN, PTJ1_IN_PU),
376 PINMUX_DATA(PTJ0_DATA, PTJ0_OUT, PTJ0_IN, PTJ0_IN_PU),
377
378 /* PTK */
379 PINMUX_DATA(PTK6_DATA, PTK6_OUT, PTK6_IN, PTK6_IN_PD),
380 PINMUX_DATA(PTK5_DATA, PTK5_OUT, PTK5_IN, PTK5_IN_PD),
381 PINMUX_DATA(PTK4_DATA, PTK4_OUT, PTK4_IN, PTK4_IN_PD),
382 PINMUX_DATA(PTK3_DATA, PTK3_OUT, PTK3_IN, PTK3_IN_PD),
383 PINMUX_DATA(PTK2_DATA, PTK2_IN, PTK2_IN_PD),
384 PINMUX_DATA(PTK1_DATA, PTK1_OUT),
385 PINMUX_DATA(PTK0_DATA, PTK0_OUT, PTK0_IN, PTK0_IN_PD),
386
387 /* PTL */
388 PINMUX_DATA(PTL7_DATA, PTL7_OUT, PTL7_IN, PTL7_IN_PD),
389 PINMUX_DATA(PTL6_DATA, PTL6_OUT, PTL6_IN, PTL6_IN_PD),
390 PINMUX_DATA(PTL5_DATA, PTL5_OUT, PTL5_IN, PTL5_IN_PD),
391 PINMUX_DATA(PTL4_DATA, PTL4_OUT, PTL4_IN, PTL4_IN_PD),
392 PINMUX_DATA(PTL3_DATA, PTL3_OUT, PTL3_IN, PTL3_IN_PD),
393 PINMUX_DATA(PTL2_DATA, PTL2_OUT, PTL2_IN, PTL2_IN_PD),
394 PINMUX_DATA(PTL1_DATA, PTL1_OUT, PTL1_IN, PTL1_IN_PD),
395 PINMUX_DATA(PTL0_DATA, PTL0_OUT, PTL0_IN, PTL0_IN_PD),
396
397 /* PTM */
398 PINMUX_DATA(PTM7_DATA, PTM7_OUT, PTM7_IN, PTM7_IN_PD),
399 PINMUX_DATA(PTM6_DATA, PTM6_OUT, PTM6_IN, PTM6_IN_PD),
400 PINMUX_DATA(PTM5_DATA, PTM5_OUT, PTM5_IN, PTM5_IN_PD),
401 PINMUX_DATA(PTM4_DATA, PTM4_OUT, PTM4_IN, PTM4_IN_PD),
402 PINMUX_DATA(PTM3_DATA, PTM3_OUT, PTM3_IN, PTM3_IN_PD),
403 PINMUX_DATA(PTM2_DATA, PTM2_OUT, PTM2_IN, PTM2_IN_PD),
404 PINMUX_DATA(PTM1_DATA, PTM1_OUT, PTM1_IN, PTM1_IN_PD),
405 PINMUX_DATA(PTM0_DATA, PTM0_OUT, PTM0_IN, PTM0_IN_PD),
406
407 /* PTN */
408 PINMUX_DATA(PTN7_DATA, PTN7_OUT, PTN7_IN),
409 PINMUX_DATA(PTN6_DATA, PTN6_OUT, PTN6_IN),
410 PINMUX_DATA(PTN5_DATA, PTN5_OUT, PTN5_IN),
411 PINMUX_DATA(PTN4_DATA, PTN4_OUT, PTN4_IN),
412 PINMUX_DATA(PTN3_DATA, PTN3_OUT, PTN3_IN),
413 PINMUX_DATA(PTN2_DATA, PTN2_OUT, PTN2_IN),
414 PINMUX_DATA(PTN1_DATA, PTN1_OUT, PTN1_IN),
415 PINMUX_DATA(PTN0_DATA, PTN0_OUT, PTN0_IN),
416
417 /* PTQ */
418 PINMUX_DATA(PTQ6_DATA, PTQ6_OUT),
419 PINMUX_DATA(PTQ5_DATA, PTQ5_OUT, PTQ5_IN, PTQ5_IN_PD),
420 PINMUX_DATA(PTQ4_DATA, PTQ4_OUT, PTQ4_IN, PTQ4_IN_PD),
421 PINMUX_DATA(PTQ3_DATA, PTQ3_OUT, PTQ3_IN, PTQ3_IN_PD),
422 PINMUX_DATA(PTQ2_DATA, PTQ2_IN, PTQ2_IN_PD),
423 PINMUX_DATA(PTQ1_DATA, PTQ1_OUT),
424 PINMUX_DATA(PTQ0_DATA, PTQ0_OUT, PTQ0_IN, PTQ0_IN_PU),
425
426 /* PTR */
427 PINMUX_DATA(PTR4_DATA, PTR4_OUT),
428 PINMUX_DATA(PTR3_DATA, PTR3_OUT),
429 PINMUX_DATA(PTR2_DATA, PTR2_IN, PTR2_IN_PU),
430 PINMUX_DATA(PTR1_DATA, PTR1_OUT),
431 PINMUX_DATA(PTR0_DATA, PTR0_OUT),
432
433 /* PTS */
434 PINMUX_DATA(PTS4_DATA, PTS4_IN, PTS4_IN_PD),
435 PINMUX_DATA(PTS3_DATA, PTS3_OUT),
436 PINMUX_DATA(PTS2_DATA, PTS2_OUT, PTS2_IN, PTS2_IN_PD),
437 PINMUX_DATA(PTS1_DATA, PTS1_IN, PTS1_IN_PD),
438 PINMUX_DATA(PTS0_DATA, PTS0_OUT),
439
440 /* PTT */
441 PINMUX_DATA(PTT4_DATA, PTT4_OUT, PTT4_IN, PTT4_IN_PD),
442 PINMUX_DATA(PTT3_DATA, PTT3_OUT, PTT3_IN, PTT3_IN_PD),
443 PINMUX_DATA(PTT2_DATA, PTT2_OUT, PTT2_IN, PTT2_IN_PD),
444 PINMUX_DATA(PTT1_DATA, PTT1_IN, PTT1_IN_PD),
445 PINMUX_DATA(PTT0_DATA, PTT0_OUT),
446
447 /* PTU */
448 PINMUX_DATA(PTU4_DATA, PTU4_OUT, PTU4_IN, PTU4_IN_PD),
449 PINMUX_DATA(PTU3_DATA, PTU3_OUT, PTU3_IN, PTU3_IN_PD),
450 PINMUX_DATA(PTU2_DATA, PTU2_OUT, PTU2_IN, PTU2_IN_PD),
451 PINMUX_DATA(PTU1_DATA, PTU1_IN, PTU1_IN_PD),
452 PINMUX_DATA(PTU0_DATA, PTU0_OUT, PTU0_IN, PTU0_IN_PD),
453
454 /* PTV */
455 PINMUX_DATA(PTV4_DATA, PTV4_OUT, PTV4_IN, PTV4_IN_PD),
456 PINMUX_DATA(PTV3_DATA, PTV3_OUT, PTV3_IN, PTV3_IN_PD),
457 PINMUX_DATA(PTV2_DATA, PTV2_OUT, PTV2_IN, PTV2_IN_PD),
458 PINMUX_DATA(PTV1_DATA, PTV1_OUT, PTV1_IN, PTV1_IN_PD),
459 PINMUX_DATA(PTV0_DATA, PTV0_OUT, PTV0_IN, PTV0_IN_PD),
460
461 /* PTW */
462 PINMUX_DATA(PTW6_DATA, PTW6_IN, PTW6_IN_PD),
463 PINMUX_DATA(PTW5_DATA, PTW5_OUT),
464 PINMUX_DATA(PTW4_DATA, PTW4_OUT, PTW4_IN, PTW4_IN_PD),
465 PINMUX_DATA(PTW3_DATA, PTW3_OUT, PTW3_IN, PTW3_IN_PD),
466 PINMUX_DATA(PTW2_DATA, PTW2_OUT, PTW2_IN, PTW2_IN_PD),
467 PINMUX_DATA(PTW1_DATA, PTW1_OUT, PTW1_IN, PTW1_IN_PD),
468 PINMUX_DATA(PTW0_DATA, PTW0_OUT, PTW0_IN, PTW0_IN_PD),
469
470 /* PTX */
471 PINMUX_DATA(PTX6_DATA, PTX6_OUT, PTX6_IN, PTX6_IN_PD),
472 PINMUX_DATA(PTX5_DATA, PTX5_OUT, PTX5_IN, PTX5_IN_PD),
473 PINMUX_DATA(PTX4_DATA, PTX4_OUT, PTX4_IN, PTX4_IN_PD),
474 PINMUX_DATA(PTX3_DATA, PTX3_OUT, PTX3_IN, PTX3_IN_PD),
475 PINMUX_DATA(PTX2_DATA, PTX2_OUT, PTX2_IN, PTX2_IN_PD),
476 PINMUX_DATA(PTX1_DATA, PTX1_OUT, PTX1_IN, PTX1_IN_PD),
477 PINMUX_DATA(PTX0_DATA, PTX0_OUT, PTX0_IN, PTX0_IN_PD),
478
479 /* PTY */
480 PINMUX_DATA(PTY5_DATA, PTY5_OUT, PTY5_IN, PTY5_IN_PU),
481 PINMUX_DATA(PTY4_DATA, PTY4_OUT, PTY4_IN, PTY4_IN_PU),
482 PINMUX_DATA(PTY3_DATA, PTY3_OUT, PTY3_IN, PTY3_IN_PU),
483 PINMUX_DATA(PTY2_DATA, PTY2_OUT, PTY2_IN, PTY2_IN_PU),
484 PINMUX_DATA(PTY1_DATA, PTY1_OUT),
485 PINMUX_DATA(PTY0_DATA, PTY0_OUT, PTY0_IN, PTY0_IN_PU),
486
487 /* PTZ */
488 PINMUX_DATA(PTZ5_DATA, PTZ5_IN, PTZ5_IN_PU),
489 PINMUX_DATA(PTZ4_DATA, PTZ4_IN, PTZ4_IN_PU),
490 PINMUX_DATA(PTZ3_DATA, PTZ3_IN, PTZ3_IN_PU),
491 PINMUX_DATA(PTZ2_DATA, PTZ2_IN, PTZ2_IN_PU),
492 PINMUX_DATA(PTZ1_DATA, PTZ1_IN, PTZ1_IN_PU),
493
494 /* SCIF0 */
495 PINMUX_DATA(SCIF0_TXD_MARK, SCIF0_TXD),
496 PINMUX_DATA(SCIF0_RXD_MARK, SCIF0_RXD),
497 PINMUX_DATA(SCIF0_RTS_MARK, PSD7_SCIF0_RTS, SCIF0_RTS_SIUAOSPD),
498 PINMUX_DATA(SCIF0_CTS_MARK, PSD6_SCIF0_CTS, SCIF0_CTS_SIUAISPD),
499 PINMUX_DATA(SCIF0_SCK_MARK, PSD8_SCIF0_SCK, SCIF0_SCK_TPUTO),
500
501 /* SCIF1 */
502 PINMUX_DATA(SCIF1_TXD_MARK, PSD11_SCIF1, VIO_D5_SCIF1_TXD),
503 PINMUX_DATA(SCIF1_RXD_MARK, PSD11_SCIF1, VIO_D6_SCIF1_RXD),
504 PINMUX_DATA(SCIF1_RTS_MARK, PSD12_SCIF1, VIO_CLK_SCIF1_RTS),
505 PINMUX_DATA(SCIF1_CTS_MARK, PSD12_SCIF1, VIO_VD_SCIF1_CTS),
506 PINMUX_DATA(SCIF1_SCK_MARK, PSD11_SCIF1, VIO_D7_SCIF1_SCK),
507
508 /* SCIF2 */
509 PINMUX_DATA(SCIF2_TXD_MARK, PSD13_SCIF2, VIO_STEM_SCIF2_TXD),
510 PINMUX_DATA(SCIF2_RXD_MARK, PSD13_SCIF2, VIO_HD_SCIF2_RXD),
511 PINMUX_DATA(SCIF2_RTS_MARK, PSD13_SCIF2, VIO_CKO_SCIF2_RTS),
512 PINMUX_DATA(SCIF2_CTS_MARK, PSD13_SCIF2, VIO_FLD_SCIF2_CTS),
513 PINMUX_DATA(SCIF2_SCK_MARK, PSD13_SCIF2, VIO_STEX_SCIF2_SCK),
514
515 /* SIO */
516 PINMUX_DATA(SIOTXD_MARK, PSB15_SIOTXD, SIOTXD_SIUBOSLD),
517 PINMUX_DATA(SIORXD_MARK, PSB14_SIORXD, SIORXD_SIUBISLD),
518 PINMUX_DATA(SIOD_MARK, PSB13_SIOD, SIOD_SIUBILR),
519 PINMUX_DATA(SIOSTRB0_MARK, PSB12_SIOSTRB0, SIOSTRB0_SIUBIBT),
520 PINMUX_DATA(SIOSTRB1_MARK, PSB11_SIOSTRB1, SIOSTRB1_SIUBOLR),
521 PINMUX_DATA(SIOSCK_MARK, PSB10_SIOSCK, SIOSCK_SIUBOBT),
522 PINMUX_DATA(SIOMCK_MARK, PSD9_SIOMCK_SIUMCKB, PSB9_SIOMCK, PTF6),
523
524 /* CEU */
525 PINMUX_DATA(VIO_D15_MARK, PSC0_VIO, HIZA10_NAF, NAF7_VIO_D15),
526 PINMUX_DATA(VIO_D14_MARK, PSC0_VIO, HIZA10_NAF, NAF6_VIO_D14),
527 PINMUX_DATA(VIO_D13_MARK, PSC0_VIO, HIZA10_NAF, NAF5_VIO_D13),
528 PINMUX_DATA(VIO_D12_MARK, PSC0_VIO, HIZA10_NAF, NAF4_VIO_D12),
529 PINMUX_DATA(VIO_D11_MARK, PSC0_VIO, HIZA10_NAF, NAF3_VIO_D11),
530 PINMUX_DATA(VIO_D10_MARK, PSE2_VIO_D10, HIZB0_VIO, NAF2_VIO_D10),
531 PINMUX_DATA(VIO_D9_MARK, PSE1_VIO_D9, HIZB0_VIO, NAF1_VIO_D9),
532 PINMUX_DATA(VIO_D8_MARK, PSE0_VIO_D8, HIZB0_VIO, NAF0_VIO_D8),
533 PINMUX_DATA(VIO_D7_MARK, PSD11_VIO, VIO_D7_SCIF1_SCK),
534 PINMUX_DATA(VIO_D6_MARK, PSD11_VIO, VIO_D6_SCIF1_RXD),
535 PINMUX_DATA(VIO_D5_MARK, PSD11_VIO, VIO_D5_SCIF1_TXD),
536 PINMUX_DATA(VIO_D4_MARK, VIO_D4),
537 PINMUX_DATA(VIO_D3_MARK, VIO_D3),
538 PINMUX_DATA(VIO_D2_MARK, VIO_D2),
539 PINMUX_DATA(VIO_D1_MARK, VIO_D1),
540 PINMUX_DATA(VIO_D0_MARK, PSD10_VIO_D0, VIO_D0_LCDLCLK),
541 PINMUX_DATA(VIO_CLK_MARK, PSD12_VIO, MSELB9_VIO, VIO_CLK_SCIF1_RTS),
542 PINMUX_DATA(VIO_VD_MARK, PSD12_VIO, MSELB9_VIO, VIO_VD_SCIF1_CTS),
543 PINMUX_DATA(VIO_HD_MARK, PSD13_VIO, MSELB9_VIO, VIO_HD_SCIF2_RXD),
544 PINMUX_DATA(VIO_FLD_MARK, PSD13_VIO, HIZA9_VIO, VIO_FLD_SCIF2_CTS),
545 PINMUX_DATA(VIO_CKO_MARK, PSD13_VIO, HIZA9_VIO, VIO_CKO_SCIF2_RTS),
546 PINMUX_DATA(VIO_STEX_MARK, PSD13_VIO, HIZA9_VIO, VIO_STEX_SCIF2_SCK),
547 PINMUX_DATA(VIO_STEM_MARK, PSD13_VIO, HIZA9_VIO, VIO_STEM_SCIF2_TXD),
548 PINMUX_DATA(VIO_VD2_MARK, PSE3_VIO, MSELB9_VIO2,
549 HIZB0_VIO, FOE_VIO_VD2),
550 PINMUX_DATA(VIO_HD2_MARK, PSE3_VIO, MSELB9_VIO2,
551 HIZB1_VIO, FCE_VIO_HD2),
552 PINMUX_DATA(VIO_CLK2_MARK, PSE3_VIO, MSELB9_VIO2,
553 HIZB1_VIO, FRB_VIO_CLK2),
554
555 /* LCDC */
556 PINMUX_DATA(LCDD23_MARK, HIZA8_LCDC, LCDD23),
557 PINMUX_DATA(LCDD22_MARK, HIZA8_LCDC, LCDD22),
558 PINMUX_DATA(LCDD21_MARK, HIZA8_LCDC, LCDD21),
559 PINMUX_DATA(LCDD20_MARK, HIZA8_LCDC, LCDD20),
560 PINMUX_DATA(LCDD19_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD19_DV_CLKI),
561 PINMUX_DATA(LCDD18_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD18_DV_CLK),
562 PINMUX_DATA(LCDD17_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC,
563 LCDD17_DV_HSYNC),
564 PINMUX_DATA(LCDD16_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC,
565 LCDD16_DV_VSYNC),
566 PINMUX_DATA(LCDD15_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD15_DV_D15),
567 PINMUX_DATA(LCDD14_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD14_DV_D14),
568 PINMUX_DATA(LCDD13_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD13_DV_D13),
569 PINMUX_DATA(LCDD12_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD12_DV_D12),
570 PINMUX_DATA(LCDD11_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD11_DV_D11),
571 PINMUX_DATA(LCDD10_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD10_DV_D10),
572 PINMUX_DATA(LCDD9_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD9_DV_D9),
573 PINMUX_DATA(LCDD8_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD8_DV_D8),
574 PINMUX_DATA(LCDD7_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD7_DV_D7),
575 PINMUX_DATA(LCDD6_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD6_DV_D6),
576 PINMUX_DATA(LCDD5_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD5_DV_D5),
577 PINMUX_DATA(LCDD4_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD4_DV_D4),
578 PINMUX_DATA(LCDD3_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD3_DV_D3),
579 PINMUX_DATA(LCDD2_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD2_DV_D2),
580 PINMUX_DATA(LCDD1_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD1_DV_D1),
581 PINMUX_DATA(LCDD0_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD0_DV_D0),
582 PINMUX_DATA(LCDLCLK_MARK, PSD10_LCDLCLK, VIO_D0_LCDLCLK),
583 /* Main LCD */
584 PINMUX_DATA(LCDDON_MARK, PSD2_LCDDON, HIZA7_LCDC, LCDDON_LCDDON2),
585 PINMUX_DATA(LCDVCPWC_MARK, PSD3_LCDVEPWC_LCDVCPWC,
586 HIZA6_LCDC, LCDVCPWC_LCDVCPWC2),
587 PINMUX_DATA(LCDVEPWC_MARK, PSD3_LCDVEPWC_LCDVCPWC,
588 HIZA6_LCDC, LCDVEPWC_LCDVEPWC2),
589 PINMUX_DATA(LCDVSYN_MARK, HIZA7_LCDC, LCDVSYN),
590 /* Main LCD - RGB Mode */
591 PINMUX_DATA(LCDDCK_MARK, MSELB8_RGB, HIZA8_LCDC, LCDDCK_LCDWR),
592 PINMUX_DATA(LCDHSYN_MARK, MSELB8_RGB, HIZA7_LCDC, LCDHSYN_LCDCS),
593 PINMUX_DATA(LCDDISP_MARK, MSELB8_RGB, HIZA7_LCDC, LCDDISP_LCDRS),
594 /* Main LCD - SYS Mode */
595 PINMUX_DATA(LCDRS_MARK, MSELB8_SYS, HIZA7_LCDC, LCDDISP_LCDRS),
596 PINMUX_DATA(LCDCS_MARK, MSELB8_SYS, HIZA7_LCDC, LCDHSYN_LCDCS),
597 PINMUX_DATA(LCDWR_MARK, MSELB8_SYS, HIZA8_LCDC, LCDDCK_LCDWR),
598 PINMUX_DATA(LCDRD_MARK, HIZA7_LCDC, LCDRD),
599 /* Sub LCD - SYS Mode */
600 PINMUX_DATA(LCDDON2_MARK, PSD2_LCDDON2, HIZA7_LCDC, LCDDON_LCDDON2),
601 PINMUX_DATA(LCDVCPWC2_MARK, PSD3_LCDVEPWC2_LCDVCPWC2,
602 HIZA6_LCDC, LCDVCPWC_LCDVCPWC2),
603 PINMUX_DATA(LCDVEPWC2_MARK, PSD3_LCDVEPWC2_LCDVCPWC2,
604 HIZA6_LCDC, LCDVEPWC_LCDVEPWC2),
605 PINMUX_DATA(LCDVSYN2_MARK, PSE12_LCDVSYN2, HIZA8_LCDC, LCDVSYN2_DACK),
606 PINMUX_DATA(LCDCS2_MARK, PSD5_LCDCS2, CS6B_CE1B_LCDCS2),
607
608 /* BSC */
609 PINMUX_DATA(IOIS16_MARK, IOIS16),
610 PINMUX_DATA(A25_MARK, A25),
611 PINMUX_DATA(A24_MARK, A24),
612 PINMUX_DATA(A23_MARK, A23),
613 PINMUX_DATA(A22_MARK, A22),
614 PINMUX_DATA(BS_MARK, PSA9_BS, IRQ4_BS),
615 PINMUX_DATA(CS6B_CE1B_MARK, PSD5_CS6B_CE1B, CS6B_CE1B_LCDCS2),
616 PINMUX_DATA(WAIT_MARK, WAIT),
617 PINMUX_DATA(CS6A_CE2B_MARK, CS6A_CE2B),
618
619 /* SBSC */
620 PINMUX_DATA(HPD63_MARK, HPD63),
621 PINMUX_DATA(HPD62_MARK, HPD62),
622 PINMUX_DATA(HPD61_MARK, HPD61),
623 PINMUX_DATA(HPD60_MARK, HPD60),
624 PINMUX_DATA(HPD59_MARK, HPD59),
625 PINMUX_DATA(HPD58_MARK, HPD58),
626 PINMUX_DATA(HPD57_MARK, HPD57),
627 PINMUX_DATA(HPD56_MARK, HPD56),
628 PINMUX_DATA(HPD55_MARK, HPD55),
629 PINMUX_DATA(HPD54_MARK, HPD54),
630 PINMUX_DATA(HPD53_MARK, HPD53),
631 PINMUX_DATA(HPD52_MARK, HPD52),
632 PINMUX_DATA(HPD51_MARK, HPD51),
633 PINMUX_DATA(HPD50_MARK, HPD50),
634 PINMUX_DATA(HPD49_MARK, HPD49),
635 PINMUX_DATA(HPD48_MARK, HPD48),
636 PINMUX_DATA(HPDQM7_MARK, HPDQM7),
637 PINMUX_DATA(HPDQM6_MARK, HPDQM6),
638 PINMUX_DATA(HPDQM5_MARK, HPDQM5),
639 PINMUX_DATA(HPDQM4_MARK, HPDQM4),
640
641 /* IRQ */
642 PINMUX_DATA(IRQ0_MARK, HIZC8_IRQ0, IRQ0),
643 PINMUX_DATA(IRQ1_MARK, HIZC9_IRQ1, IRQ1),
644 PINMUX_DATA(IRQ2_MARK, PSA4_IRQ2, HIZC10_IRQ2, IRQ2_SDHID2),
645 PINMUX_DATA(IRQ3_MARK, PSE15_SIOF0_MCK_IRQ3, PSB8_IRQ3,
646 HIZC11_IRQ3, PTQ0),
647 PINMUX_DATA(IRQ4_MARK, PSA9_IRQ4, HIZC12_IRQ4, IRQ4_BS),
648 PINMUX_DATA(IRQ5_MARK, HIZC13_IRQ5, IRQ5),
649 PINMUX_DATA(IRQ6_MARK, PSA15_IRQ6, HIZC14_IRQ6, KEYIN0_IRQ6),
650 PINMUX_DATA(IRQ7_MARK, PSA14_IRQ7, HIZC15_IRQ7, KEYIN4_IRQ7),
651
652 /* SDHI */
653 PINMUX_DATA(SDHICD_MARK, SDHICD),
654 PINMUX_DATA(SDHIWP_MARK, SDHIWP),
655 PINMUX_DATA(SDHID3_MARK, SDHID3),
656 PINMUX_DATA(SDHID2_MARK, PSA4_SDHID2, IRQ2_SDHID2),
657 PINMUX_DATA(SDHID1_MARK, SDHID1),
658 PINMUX_DATA(SDHID0_MARK, SDHID0),
659 PINMUX_DATA(SDHICMD_MARK, SDHICMD),
660 PINMUX_DATA(SDHICLK_MARK, SDHICLK),
661
662 /* SIU - Port A */
663 PINMUX_DATA(SIUAOLR_MARK, PSC13_SIUAOLR, HIZB4_SIUA, SIUAOLR_SIOF1_SYNC),
664 PINMUX_DATA(SIUAOBT_MARK, PSC14_SIUAOBT, HIZB4_SIUA, SIUAOBT_SIOF1_SCK),
665 PINMUX_DATA(SIUAISLD_MARK, PSC15_SIUAISLD, HIZB4_SIUA, SIUAISLD_SIOF1_RXD),
666 PINMUX_DATA(SIUAILR_MARK, PSC11_SIUAILR, HIZB4_SIUA, SIUAILR_SIOF1_SS2),
667 PINMUX_DATA(SIUAIBT_MARK, PSC12_SIUAIBT, HIZB4_SIUA, SIUAIBT_SIOF1_SS1),
668 PINMUX_DATA(SIUAOSLD_MARK, PSB0_SIUAOSLD, HIZB4_SIUA, SIUAOSLD_SIOF1_TXD),
669 PINMUX_DATA(SIUMCKA_MARK, PSE11_SIUMCKA_SIOF1_MCK, HIZB4_SIUA, PSB1_SIUMCKA, PTK0),
670 PINMUX_DATA(SIUFCKA_MARK, PSE11_SIUFCKA, HIZB4_SIUA, PTK0),
671
672 /* SIU - Port B */
673 PINMUX_DATA(SIUBOLR_MARK, PSB11_SIUBOLR, SIOSTRB1_SIUBOLR),
674 PINMUX_DATA(SIUBOBT_MARK, PSB10_SIUBOBT, SIOSCK_SIUBOBT),
675 PINMUX_DATA(SIUBISLD_MARK, PSB14_SIUBISLD, SIORXD_SIUBISLD),
676 PINMUX_DATA(SIUBILR_MARK, PSB13_SIUBILR, SIOD_SIUBILR),
677 PINMUX_DATA(SIUBIBT_MARK, PSB12_SIUBIBT, SIOSTRB0_SIUBIBT),
678 PINMUX_DATA(SIUBOSLD_MARK, PSB15_SIUBOSLD, SIOTXD_SIUBOSLD),
679 PINMUX_DATA(SIUMCKB_MARK, PSD9_SIOMCK_SIUMCKB, PSB9_SIUMCKB, PTF6),
680 PINMUX_DATA(SIUFCKB_MARK, PSD9_SIUFCKB, PTF6),
681
682 /* AUD */
683 PINMUX_DATA(AUDSYNC_MARK, AUDSYNC),
684 PINMUX_DATA(AUDATA3_MARK, AUDATA3),
685 PINMUX_DATA(AUDATA2_MARK, AUDATA2),
686 PINMUX_DATA(AUDATA1_MARK, AUDATA1),
687 PINMUX_DATA(AUDATA0_MARK, AUDATA0),
688
689 /* DMAC */
690 PINMUX_DATA(DACK_MARK, PSE12_DACK, LCDVSYN2_DACK),
691 PINMUX_DATA(DREQ0_MARK, DREQ0),
692
693 /* VOU */
694 PINMUX_DATA(DV_CLKI_MARK, PSD0_DV, LCDD19_DV_CLKI),
695 PINMUX_DATA(DV_CLK_MARK, PSD0_DV, LCDD18_DV_CLK),
696 PINMUX_DATA(DV_HSYNC_MARK, PSD0_DV, LCDD17_DV_HSYNC),
697 PINMUX_DATA(DV_VSYNC_MARK, PSD0_DV, LCDD16_DV_VSYNC),
698 PINMUX_DATA(DV_D15_MARK, PSD0_DV, LCDD15_DV_D15),
699 PINMUX_DATA(DV_D14_MARK, PSD0_DV, LCDD14_DV_D14),
700 PINMUX_DATA(DV_D13_MARK, PSD0_DV, LCDD13_DV_D13),
701 PINMUX_DATA(DV_D12_MARK, PSD0_DV, LCDD12_DV_D12),
702 PINMUX_DATA(DV_D11_MARK, PSD0_DV, LCDD11_DV_D11),
703 PINMUX_DATA(DV_D10_MARK, PSD0_DV, LCDD10_DV_D10),
704 PINMUX_DATA(DV_D9_MARK, PSD0_DV, LCDD9_DV_D9),
705 PINMUX_DATA(DV_D8_MARK, PSD0_DV, LCDD8_DV_D8),
706 PINMUX_DATA(DV_D7_MARK, PSD0_DV, LCDD7_DV_D7),
707 PINMUX_DATA(DV_D6_MARK, PSD0_DV, LCDD6_DV_D6),
708 PINMUX_DATA(DV_D5_MARK, PSD0_DV, LCDD5_DV_D5),
709 PINMUX_DATA(DV_D4_MARK, PSD0_DV, LCDD4_DV_D4),
710 PINMUX_DATA(DV_D3_MARK, PSD0_DV, LCDD3_DV_D3),
711 PINMUX_DATA(DV_D2_MARK, PSD0_DV, LCDD2_DV_D2),
712 PINMUX_DATA(DV_D1_MARK, PSD0_DV, LCDD1_DV_D1),
713 PINMUX_DATA(DV_D0_MARK, PSD0_DV, LCDD0_DV_D0),
714
715 /* CPG */
716 PINMUX_DATA(STATUS0_MARK, STATUS0),
717 PINMUX_DATA(PDSTATUS_MARK, PDSTATUS),
718
719 /* SIOF0 */
720 PINMUX_DATA(SIOF0_MCK_MARK, PSE15_SIOF0_MCK_IRQ3, PSB8_SIOF0_MCK, PTQ0),
721 PINMUX_DATA(SIOF0_SCK_MARK, PSB5_SIOF0_SCK, SIOF0_SCK_TS_SCK),
722 PINMUX_DATA(SIOF0_SYNC_MARK, PSB4_SIOF0_SYNC, SIOF0_SYNC_TS_SDEN),
723 PINMUX_DATA(SIOF0_SS1_MARK, PSB3_SIOF0_SS1, SIOF0_SS1_TS_SPSYNC),
724 PINMUX_DATA(SIOF0_SS2_MARK, PSB2_SIOF0_SS2, SIOF0_SS2_SIM_RST),
725 PINMUX_DATA(SIOF0_TXD_MARK, PSE14_SIOF0_TXD_IRDA_OUT,
726 PSB7_SIOF0_TXD, PTQ1),
727 PINMUX_DATA(SIOF0_RXD_MARK, PSE13_SIOF0_RXD_IRDA_IN,
728 PSB6_SIOF0_RXD, PTQ2),
729
730 /* SIOF1 */
731 PINMUX_DATA(SIOF1_MCK_MARK, PSE11_SIUMCKA_SIOF1_MCK,
732 PSB1_SIOF1_MCK, PTK0),
733 PINMUX_DATA(SIOF1_SCK_MARK, PSC14_SIOF1_SCK, SIUAOBT_SIOF1_SCK),
734 PINMUX_DATA(SIOF1_SYNC_MARK, PSC13_SIOF1_SYNC, SIUAOLR_SIOF1_SYNC),
735 PINMUX_DATA(SIOF1_SS1_MARK, PSC12_SIOF1_SS1, SIUAIBT_SIOF1_SS1),
736 PINMUX_DATA(SIOF1_SS2_MARK, PSC11_SIOF1_SS2, SIUAILR_SIOF1_SS2),
737 PINMUX_DATA(SIOF1_TXD_MARK, PSB0_SIOF1_TXD, SIUAOSLD_SIOF1_TXD),
738 PINMUX_DATA(SIOF1_RXD_MARK, PSC15_SIOF1_RXD, SIUAISLD_SIOF1_RXD),
739
740 /* SIM */
741 PINMUX_DATA(SIM_D_MARK, PSE15_SIM_D, PTQ0),
742 PINMUX_DATA(SIM_CLK_MARK, PSE14_SIM_CLK, PTQ1),
743 PINMUX_DATA(SIM_RST_MARK, PSB2_SIM_RST, SIOF0_SS2_SIM_RST),
744
745 /* TSIF */
746 PINMUX_DATA(TS_SDAT_MARK, PSE13_TS_SDAT, PTQ2),
747 PINMUX_DATA(TS_SCK_MARK, PSB5_TS_SCK, SIOF0_SCK_TS_SCK),
748 PINMUX_DATA(TS_SDEN_MARK, PSB4_TS_SDEN, SIOF0_SYNC_TS_SDEN),
749 PINMUX_DATA(TS_SPSYNC_MARK, PSB3_TS_SPSYNC, SIOF0_SS1_TS_SPSYNC),
750
751 /* IRDA */
752 PINMUX_DATA(IRDA_IN_MARK, PSE13_SIOF0_RXD_IRDA_IN, PSB6_IRDA_IN, PTQ2),
753 PINMUX_DATA(IRDA_OUT_MARK, PSE14_SIOF0_TXD_IRDA_OUT,
754 PSB7_IRDA_OUT, PTQ1),
755
756 /* TPU */
757 PINMUX_DATA(TPUTO_MARK, PSD8_TPUTO, SCIF0_SCK_TPUTO),
758
759 /* FLCTL */
760 PINMUX_DATA(FCE_MARK, PSE3_FLCTL, FCE_VIO_HD2),
761 PINMUX_DATA(NAF7_MARK, PSC0_NAF, HIZA10_NAF, NAF7_VIO_D15),
762 PINMUX_DATA(NAF6_MARK, PSC0_NAF, HIZA10_NAF, NAF6_VIO_D14),
763 PINMUX_DATA(NAF5_MARK, PSC0_NAF, HIZA10_NAF, NAF5_VIO_D13),
764 PINMUX_DATA(NAF4_MARK, PSC0_NAF, HIZA10_NAF, NAF4_VIO_D12),
765 PINMUX_DATA(NAF3_MARK, PSC0_NAF, HIZA10_NAF, NAF3_VIO_D11),
766 PINMUX_DATA(NAF2_MARK, PSE2_NAF2, HIZB0_VIO, NAF2_VIO_D10),
767 PINMUX_DATA(NAF1_MARK, PSE1_NAF1, HIZB0_VIO, NAF1_VIO_D9),
768 PINMUX_DATA(NAF0_MARK, PSE0_NAF0, HIZB0_VIO, NAF0_VIO_D8),
769 PINMUX_DATA(FCDE_MARK, FCDE),
770 PINMUX_DATA(FOE_MARK, PSE3_FLCTL, HIZB0_VIO, FOE_VIO_VD2),
771 PINMUX_DATA(FSC_MARK, FSC),
772 PINMUX_DATA(FWE_MARK, FWE),
773 PINMUX_DATA(FRB_MARK, PSE3_FLCTL, FRB_VIO_CLK2),
774
775 /* KEYSC */
776 PINMUX_DATA(KEYIN0_MARK, PSA15_KEYIN0, HIZC14_IRQ6, KEYIN0_IRQ6),
777 PINMUX_DATA(KEYIN1_MARK, HIZA14_KEYSC, KEYIN1),
778 PINMUX_DATA(KEYIN2_MARK, HIZA14_KEYSC, KEYIN2),
779 PINMUX_DATA(KEYIN3_MARK, HIZA14_KEYSC, KEYIN3),
780 PINMUX_DATA(KEYIN4_MARK, PSA14_KEYIN4, HIZC15_IRQ7, KEYIN4_IRQ7),
781 PINMUX_DATA(KEYOUT0_MARK, HIZA14_KEYSC, KEYOUT0),
782 PINMUX_DATA(KEYOUT1_MARK, HIZA14_KEYSC, KEYOUT1),
783 PINMUX_DATA(KEYOUT2_MARK, HIZA14_KEYSC, KEYOUT2),
784 PINMUX_DATA(KEYOUT3_MARK, HIZA14_KEYSC, KEYOUT3),
785 PINMUX_DATA(KEYOUT4_IN6_MARK, HIZA14_KEYSC, KEYOUT4_IN6),
786 PINMUX_DATA(KEYOUT5_IN5_MARK, HIZA14_KEYSC, KEYOUT5_IN5),
787};
788
789static struct pinmux_gpio pinmux_gpios[] = {
790 /* PTA */
791 PINMUX_GPIO(GPIO_PTA7, PTA7_DATA),
792 PINMUX_GPIO(GPIO_PTA6, PTA6_DATA),
793 PINMUX_GPIO(GPIO_PTA5, PTA5_DATA),
794 PINMUX_GPIO(GPIO_PTA4, PTA4_DATA),
795 PINMUX_GPIO(GPIO_PTA3, PTA3_DATA),
796 PINMUX_GPIO(GPIO_PTA2, PTA2_DATA),
797 PINMUX_GPIO(GPIO_PTA1, PTA1_DATA),
798 PINMUX_GPIO(GPIO_PTA0, PTA0_DATA),
799
800 /* PTB */
801 PINMUX_GPIO(GPIO_PTB7, PTB7_DATA),
802 PINMUX_GPIO(GPIO_PTB6, PTB6_DATA),
803 PINMUX_GPIO(GPIO_PTB5, PTB5_DATA),
804 PINMUX_GPIO(GPIO_PTB4, PTB4_DATA),
805 PINMUX_GPIO(GPIO_PTB3, PTB3_DATA),
806 PINMUX_GPIO(GPIO_PTB2, PTB2_DATA),
807 PINMUX_GPIO(GPIO_PTB1, PTB1_DATA),
808 PINMUX_GPIO(GPIO_PTB0, PTB0_DATA),
809
810 /* PTC */
811 PINMUX_GPIO(GPIO_PTC7, PTC7_DATA),
812 PINMUX_GPIO(GPIO_PTC5, PTC5_DATA),
813 PINMUX_GPIO(GPIO_PTC4, PTC4_DATA),
814 PINMUX_GPIO(GPIO_PTC3, PTC3_DATA),
815 PINMUX_GPIO(GPIO_PTC2, PTC2_DATA),
816 PINMUX_GPIO(GPIO_PTC0, PTC0_DATA),
817
818 /* PTD */
819 PINMUX_GPIO(GPIO_PTD7, PTD7_DATA),
820 PINMUX_GPIO(GPIO_PTD6, PTD6_DATA),
821 PINMUX_GPIO(GPIO_PTD5, PTD5_DATA),
822 PINMUX_GPIO(GPIO_PTD4, PTD4_DATA),
823 PINMUX_GPIO(GPIO_PTD3, PTD3_DATA),
824 PINMUX_GPIO(GPIO_PTD2, PTD2_DATA),
825 PINMUX_GPIO(GPIO_PTD1, PTD1_DATA),
826 PINMUX_GPIO(GPIO_PTD0, PTD0_DATA),
827
828 /* PTE */
829 PINMUX_GPIO(GPIO_PTE7, PTE7_DATA),
830 PINMUX_GPIO(GPIO_PTE6, PTE6_DATA),
831 PINMUX_GPIO(GPIO_PTE5, PTE5_DATA),
832 PINMUX_GPIO(GPIO_PTE4, PTE4_DATA),
833 PINMUX_GPIO(GPIO_PTE1, PTE1_DATA),
834 PINMUX_GPIO(GPIO_PTE0, PTE0_DATA),
835
836 /* PTF */
837 PINMUX_GPIO(GPIO_PTF6, PTF6_DATA),
838 PINMUX_GPIO(GPIO_PTF5, PTF5_DATA),
839 PINMUX_GPIO(GPIO_PTF4, PTF4_DATA),
840 PINMUX_GPIO(GPIO_PTF3, PTF3_DATA),
841 PINMUX_GPIO(GPIO_PTF2, PTF2_DATA),
842 PINMUX_GPIO(GPIO_PTF1, PTF1_DATA),
843 PINMUX_GPIO(GPIO_PTF0, PTF0_DATA),
844
845 /* PTG */
846 PINMUX_GPIO(GPIO_PTG4, PTG4_DATA),
847 PINMUX_GPIO(GPIO_PTG3, PTG3_DATA),
848 PINMUX_GPIO(GPIO_PTG2, PTG2_DATA),
849 PINMUX_GPIO(GPIO_PTG1, PTG1_DATA),
850 PINMUX_GPIO(GPIO_PTG0, PTG0_DATA),
851
852 /* PTH */
853 PINMUX_GPIO(GPIO_PTH7, PTH7_DATA),
854 PINMUX_GPIO(GPIO_PTH6, PTH6_DATA),
855 PINMUX_GPIO(GPIO_PTH5, PTH5_DATA),
856 PINMUX_GPIO(GPIO_PTH4, PTH4_DATA),
857 PINMUX_GPIO(GPIO_PTH3, PTH3_DATA),
858 PINMUX_GPIO(GPIO_PTH2, PTH2_DATA),
859 PINMUX_GPIO(GPIO_PTH1, PTH1_DATA),
860 PINMUX_GPIO(GPIO_PTH0, PTH0_DATA),
861
862 /* PTJ */
863 PINMUX_GPIO(GPIO_PTJ7, PTJ7_DATA),
864 PINMUX_GPIO(GPIO_PTJ6, PTJ6_DATA),
865 PINMUX_GPIO(GPIO_PTJ5, PTJ5_DATA),
866 PINMUX_GPIO(GPIO_PTJ1, PTJ1_DATA),
867 PINMUX_GPIO(GPIO_PTJ0, PTJ0_DATA),
868
869 /* PTK */
870 PINMUX_GPIO(GPIO_PTK6, PTK6_DATA),
871 PINMUX_GPIO(GPIO_PTK5, PTK5_DATA),
872 PINMUX_GPIO(GPIO_PTK4, PTK4_DATA),
873 PINMUX_GPIO(GPIO_PTK3, PTK3_DATA),
874 PINMUX_GPIO(GPIO_PTK2, PTK2_DATA),
875 PINMUX_GPIO(GPIO_PTK1, PTK1_DATA),
876 PINMUX_GPIO(GPIO_PTK0, PTK0_DATA),
877
878 /* PTL */
879 PINMUX_GPIO(GPIO_PTL7, PTL7_DATA),
880 PINMUX_GPIO(GPIO_PTL6, PTL6_DATA),
881 PINMUX_GPIO(GPIO_PTL5, PTL5_DATA),
882 PINMUX_GPIO(GPIO_PTL4, PTL4_DATA),
883 PINMUX_GPIO(GPIO_PTL3, PTL3_DATA),
884 PINMUX_GPIO(GPIO_PTL2, PTL2_DATA),
885 PINMUX_GPIO(GPIO_PTL1, PTL1_DATA),
886 PINMUX_GPIO(GPIO_PTL0, PTL0_DATA),
887
888 /* PTM */
889 PINMUX_GPIO(GPIO_PTM7, PTM7_DATA),
890 PINMUX_GPIO(GPIO_PTM6, PTM6_DATA),
891 PINMUX_GPIO(GPIO_PTM5, PTM5_DATA),
892 PINMUX_GPIO(GPIO_PTM4, PTM4_DATA),
893 PINMUX_GPIO(GPIO_PTM3, PTM3_DATA),
894 PINMUX_GPIO(GPIO_PTM2, PTM2_DATA),
895 PINMUX_GPIO(GPIO_PTM1, PTM1_DATA),
896 PINMUX_GPIO(GPIO_PTM0, PTM0_DATA),
897
898 /* PTN */
899 PINMUX_GPIO(GPIO_PTN7, PTN7_DATA),
900 PINMUX_GPIO(GPIO_PTN6, PTN6_DATA),
901 PINMUX_GPIO(GPIO_PTN5, PTN5_DATA),
902 PINMUX_GPIO(GPIO_PTN4, PTN4_DATA),
903 PINMUX_GPIO(GPIO_PTN3, PTN3_DATA),
904 PINMUX_GPIO(GPIO_PTN2, PTN2_DATA),
905 PINMUX_GPIO(GPIO_PTN1, PTN1_DATA),
906 PINMUX_GPIO(GPIO_PTN0, PTN0_DATA),
907
908 /* PTQ */
909 PINMUX_GPIO(GPIO_PTQ6, PTQ6_DATA),
910 PINMUX_GPIO(GPIO_PTQ5, PTQ5_DATA),
911 PINMUX_GPIO(GPIO_PTQ4, PTQ4_DATA),
912 PINMUX_GPIO(GPIO_PTQ3, PTQ3_DATA),
913 PINMUX_GPIO(GPIO_PTQ2, PTQ2_DATA),
914 PINMUX_GPIO(GPIO_PTQ1, PTQ1_DATA),
915 PINMUX_GPIO(GPIO_PTQ0, PTQ0_DATA),
916
917 /* PTR */
918 PINMUX_GPIO(GPIO_PTR4, PTR4_DATA),
919 PINMUX_GPIO(GPIO_PTR3, PTR3_DATA),
920 PINMUX_GPIO(GPIO_PTR2, PTR2_DATA),
921 PINMUX_GPIO(GPIO_PTR1, PTR1_DATA),
922 PINMUX_GPIO(GPIO_PTR0, PTR0_DATA),
923
924 /* PTS */
925 PINMUX_GPIO(GPIO_PTS4, PTS4_DATA),
926 PINMUX_GPIO(GPIO_PTS3, PTS3_DATA),
927 PINMUX_GPIO(GPIO_PTS2, PTS2_DATA),
928 PINMUX_GPIO(GPIO_PTS1, PTS1_DATA),
929 PINMUX_GPIO(GPIO_PTS0, PTS0_DATA),
930
931 /* PTT */
932 PINMUX_GPIO(GPIO_PTT4, PTT4_DATA),
933 PINMUX_GPIO(GPIO_PTT3, PTT3_DATA),
934 PINMUX_GPIO(GPIO_PTT2, PTT2_DATA),
935 PINMUX_GPIO(GPIO_PTT1, PTT1_DATA),
936 PINMUX_GPIO(GPIO_PTT0, PTT0_DATA),
937
938 /* PTU */
939 PINMUX_GPIO(GPIO_PTU4, PTU4_DATA),
940 PINMUX_GPIO(GPIO_PTU3, PTU3_DATA),
941 PINMUX_GPIO(GPIO_PTU2, PTU2_DATA),
942 PINMUX_GPIO(GPIO_PTU1, PTU1_DATA),
943 PINMUX_GPIO(GPIO_PTU0, PTU0_DATA),
944
945 /* PTV */
946 PINMUX_GPIO(GPIO_PTV4, PTV4_DATA),
947 PINMUX_GPIO(GPIO_PTV3, PTV3_DATA),
948 PINMUX_GPIO(GPIO_PTV2, PTV2_DATA),
949 PINMUX_GPIO(GPIO_PTV1, PTV1_DATA),
950 PINMUX_GPIO(GPIO_PTV0, PTV0_DATA),
951
952 /* PTW */
953 PINMUX_GPIO(GPIO_PTW6, PTW6_DATA),
954 PINMUX_GPIO(GPIO_PTW5, PTW5_DATA),
955 PINMUX_GPIO(GPIO_PTW4, PTW4_DATA),
956 PINMUX_GPIO(GPIO_PTW3, PTW3_DATA),
957 PINMUX_GPIO(GPIO_PTW2, PTW2_DATA),
958 PINMUX_GPIO(GPIO_PTW1, PTW1_DATA),
959 PINMUX_GPIO(GPIO_PTW0, PTW0_DATA),
960
961 /* PTX */
962 PINMUX_GPIO(GPIO_PTX6, PTX6_DATA),
963 PINMUX_GPIO(GPIO_PTX5, PTX5_DATA),
964 PINMUX_GPIO(GPIO_PTX4, PTX4_DATA),
965 PINMUX_GPIO(GPIO_PTX3, PTX3_DATA),
966 PINMUX_GPIO(GPIO_PTX2, PTX2_DATA),
967 PINMUX_GPIO(GPIO_PTX1, PTX1_DATA),
968 PINMUX_GPIO(GPIO_PTX0, PTX0_DATA),
969
970 /* PTY */
971 PINMUX_GPIO(GPIO_PTY5, PTY5_DATA),
972 PINMUX_GPIO(GPIO_PTY4, PTY4_DATA),
973 PINMUX_GPIO(GPIO_PTY3, PTY3_DATA),
974 PINMUX_GPIO(GPIO_PTY2, PTY2_DATA),
975 PINMUX_GPIO(GPIO_PTY1, PTY1_DATA),
976 PINMUX_GPIO(GPIO_PTY0, PTY0_DATA),
977
978 /* PTZ */
979 PINMUX_GPIO(GPIO_PTZ5, PTZ5_DATA),
980 PINMUX_GPIO(GPIO_PTZ4, PTZ4_DATA),
981 PINMUX_GPIO(GPIO_PTZ3, PTZ3_DATA),
982 PINMUX_GPIO(GPIO_PTZ2, PTZ2_DATA),
983 PINMUX_GPIO(GPIO_PTZ1, PTZ1_DATA),
984
985 /* SCIF0 */
986 PINMUX_GPIO(GPIO_FN_SCIF0_TXD, SCIF0_TXD_MARK),
987 PINMUX_GPIO(GPIO_FN_SCIF0_RXD, SCIF0_RXD_MARK),
988 PINMUX_GPIO(GPIO_FN_SCIF0_RTS, SCIF0_RTS_MARK),
989 PINMUX_GPIO(GPIO_FN_SCIF0_CTS, SCIF0_CTS_MARK),
990 PINMUX_GPIO(GPIO_FN_SCIF0_SCK, SCIF0_SCK_MARK),
991
992 /* SCIF1 */
993 PINMUX_GPIO(GPIO_FN_SCIF1_TXD, SCIF1_TXD_MARK),
994 PINMUX_GPIO(GPIO_FN_SCIF1_RXD, SCIF1_RXD_MARK),
995 PINMUX_GPIO(GPIO_FN_SCIF1_RTS, SCIF1_RTS_MARK),
996 PINMUX_GPIO(GPIO_FN_SCIF1_CTS, SCIF1_CTS_MARK),
997 PINMUX_GPIO(GPIO_FN_SCIF1_SCK, SCIF1_SCK_MARK),
998
999 /* SCIF2 */
1000 PINMUX_GPIO(GPIO_FN_SCIF2_TXD, SCIF2_TXD_MARK),
1001 PINMUX_GPIO(GPIO_FN_SCIF2_RXD, SCIF2_RXD_MARK),
1002 PINMUX_GPIO(GPIO_FN_SCIF2_RTS, SCIF2_RTS_MARK),
1003 PINMUX_GPIO(GPIO_FN_SCIF2_CTS, SCIF2_CTS_MARK),
1004 PINMUX_GPIO(GPIO_FN_SCIF2_SCK, SCIF2_SCK_MARK),
1005
1006 /* SIO */
1007 PINMUX_GPIO(GPIO_FN_SIOTXD, SIOTXD_MARK),
1008 PINMUX_GPIO(GPIO_FN_SIORXD, SIORXD_MARK),
1009 PINMUX_GPIO(GPIO_FN_SIOD, SIOD_MARK),
1010 PINMUX_GPIO(GPIO_FN_SIOSTRB0, SIOSTRB0_MARK),
1011 PINMUX_GPIO(GPIO_FN_SIOSTRB1, SIOSTRB1_MARK),
1012 PINMUX_GPIO(GPIO_FN_SIOSCK, SIOSCK_MARK),
1013 PINMUX_GPIO(GPIO_FN_SIOMCK, SIOMCK_MARK),
1014
1015 /* CEU */
1016 PINMUX_GPIO(GPIO_FN_VIO_D15, VIO_D15_MARK),
1017 PINMUX_GPIO(GPIO_FN_VIO_D14, VIO_D14_MARK),
1018 PINMUX_GPIO(GPIO_FN_VIO_D13, VIO_D13_MARK),
1019 PINMUX_GPIO(GPIO_FN_VIO_D12, VIO_D12_MARK),
1020 PINMUX_GPIO(GPIO_FN_VIO_D11, VIO_D11_MARK),
1021 PINMUX_GPIO(GPIO_FN_VIO_D10, VIO_D10_MARK),
1022 PINMUX_GPIO(GPIO_FN_VIO_D9, VIO_D9_MARK),
1023 PINMUX_GPIO(GPIO_FN_VIO_D8, VIO_D8_MARK),
1024 PINMUX_GPIO(GPIO_FN_VIO_D7, VIO_D7_MARK),
1025 PINMUX_GPIO(GPIO_FN_VIO_D6, VIO_D6_MARK),
1026 PINMUX_GPIO(GPIO_FN_VIO_D5, VIO_D5_MARK),
1027 PINMUX_GPIO(GPIO_FN_VIO_D4, VIO_D4_MARK),
1028 PINMUX_GPIO(GPIO_FN_VIO_D3, VIO_D3_MARK),
1029 PINMUX_GPIO(GPIO_FN_VIO_D2, VIO_D2_MARK),
1030 PINMUX_GPIO(GPIO_FN_VIO_D1, VIO_D1_MARK),
1031 PINMUX_GPIO(GPIO_FN_VIO_D0, VIO_D0_MARK),
1032 PINMUX_GPIO(GPIO_FN_VIO_CLK, VIO_CLK_MARK),
1033 PINMUX_GPIO(GPIO_FN_VIO_VD, VIO_VD_MARK),
1034 PINMUX_GPIO(GPIO_FN_VIO_HD, VIO_HD_MARK),
1035 PINMUX_GPIO(GPIO_FN_VIO_FLD, VIO_FLD_MARK),
1036 PINMUX_GPIO(GPIO_FN_VIO_CKO, VIO_CKO_MARK),
1037 PINMUX_GPIO(GPIO_FN_VIO_STEX, VIO_STEX_MARK),
1038 PINMUX_GPIO(GPIO_FN_VIO_STEM, VIO_STEM_MARK),
1039 PINMUX_GPIO(GPIO_FN_VIO_VD2, VIO_VD2_MARK),
1040 PINMUX_GPIO(GPIO_FN_VIO_HD2, VIO_HD2_MARK),
1041 PINMUX_GPIO(GPIO_FN_VIO_CLK2, VIO_CLK2_MARK),
1042
1043 /* LCDC */
1044 PINMUX_GPIO(GPIO_FN_LCDD23, LCDD23_MARK),
1045 PINMUX_GPIO(GPIO_FN_LCDD22, LCDD22_MARK),
1046 PINMUX_GPIO(GPIO_FN_LCDD21, LCDD21_MARK),
1047 PINMUX_GPIO(GPIO_FN_LCDD20, LCDD20_MARK),
1048 PINMUX_GPIO(GPIO_FN_LCDD19, LCDD19_MARK),
1049 PINMUX_GPIO(GPIO_FN_LCDD18, LCDD18_MARK),
1050 PINMUX_GPIO(GPIO_FN_LCDD17, LCDD17_MARK),
1051 PINMUX_GPIO(GPIO_FN_LCDD16, LCDD16_MARK),
1052 PINMUX_GPIO(GPIO_FN_LCDD15, LCDD15_MARK),
1053 PINMUX_GPIO(GPIO_FN_LCDD14, LCDD14_MARK),
1054 PINMUX_GPIO(GPIO_FN_LCDD13, LCDD13_MARK),
1055 PINMUX_GPIO(GPIO_FN_LCDD12, LCDD12_MARK),
1056 PINMUX_GPIO(GPIO_FN_LCDD11, LCDD11_MARK),
1057 PINMUX_GPIO(GPIO_FN_LCDD10, LCDD10_MARK),
1058 PINMUX_GPIO(GPIO_FN_LCDD9, LCDD9_MARK),
1059 PINMUX_GPIO(GPIO_FN_LCDD8, LCDD8_MARK),
1060 PINMUX_GPIO(GPIO_FN_LCDD7, LCDD7_MARK),
1061 PINMUX_GPIO(GPIO_FN_LCDD6, LCDD6_MARK),
1062 PINMUX_GPIO(GPIO_FN_LCDD5, LCDD5_MARK),
1063 PINMUX_GPIO(GPIO_FN_LCDD4, LCDD4_MARK),
1064 PINMUX_GPIO(GPIO_FN_LCDD3, LCDD3_MARK),
1065 PINMUX_GPIO(GPIO_FN_LCDD2, LCDD2_MARK),
1066 PINMUX_GPIO(GPIO_FN_LCDD1, LCDD1_MARK),
1067 PINMUX_GPIO(GPIO_FN_LCDD0, LCDD0_MARK),
1068 PINMUX_GPIO(GPIO_FN_LCDLCLK, LCDLCLK_MARK),
1069 /* Main LCD */
1070 PINMUX_GPIO(GPIO_FN_LCDDON, LCDDON_MARK),
1071 PINMUX_GPIO(GPIO_FN_LCDVCPWC, LCDVCPWC_MARK),
1072 PINMUX_GPIO(GPIO_FN_LCDVEPWC, LCDVEPWC_MARK),
1073 PINMUX_GPIO(GPIO_FN_LCDVSYN, LCDVSYN_MARK),
1074 /* Main LCD - RGB Mode */
1075 PINMUX_GPIO(GPIO_FN_LCDDCK, LCDDCK_MARK),
1076 PINMUX_GPIO(GPIO_FN_LCDHSYN, LCDHSYN_MARK),
1077 PINMUX_GPIO(GPIO_FN_LCDDISP, LCDDISP_MARK),
1078 /* Main LCD - SYS Mode */
1079 PINMUX_GPIO(GPIO_FN_LCDRS, LCDRS_MARK),
1080 PINMUX_GPIO(GPIO_FN_LCDCS, LCDCS_MARK),
1081 PINMUX_GPIO(GPIO_FN_LCDWR, LCDWR_MARK),
1082 PINMUX_GPIO(GPIO_FN_LCDRD, LCDRD_MARK),
1083 /* Sub LCD - SYS Mode */
1084 PINMUX_GPIO(GPIO_FN_LCDDON2, LCDDON2_MARK),
1085 PINMUX_GPIO(GPIO_FN_LCDVCPWC2, LCDVCPWC2_MARK),
1086 PINMUX_GPIO(GPIO_FN_LCDVEPWC2, LCDVEPWC2_MARK),
1087 PINMUX_GPIO(GPIO_FN_LCDVSYN2, LCDVSYN2_MARK),
1088 PINMUX_GPIO(GPIO_FN_LCDCS2, LCDCS2_MARK),
1089
1090 /* BSC */
1091 PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK),
1092 PINMUX_GPIO(GPIO_FN_A25, A25_MARK),
1093 PINMUX_GPIO(GPIO_FN_A24, A24_MARK),
1094 PINMUX_GPIO(GPIO_FN_A23, A23_MARK),
1095 PINMUX_GPIO(GPIO_FN_A22, A22_MARK),
1096 PINMUX_GPIO(GPIO_FN_BS, BS_MARK),
1097 PINMUX_GPIO(GPIO_FN_CS6B_CE1B, CS6B_CE1B_MARK),
1098 PINMUX_GPIO(GPIO_FN_WAIT, WAIT_MARK),
1099 PINMUX_GPIO(GPIO_FN_CS6A_CE2B, CS6A_CE2B_MARK),
1100
1101 /* SBSC */
1102 PINMUX_GPIO(GPIO_FN_HPD63, HPD63_MARK),
1103 PINMUX_GPIO(GPIO_FN_HPD62, HPD62_MARK),
1104 PINMUX_GPIO(GPIO_FN_HPD61, HPD61_MARK),
1105 PINMUX_GPIO(GPIO_FN_HPD60, HPD60_MARK),
1106 PINMUX_GPIO(GPIO_FN_HPD59, HPD59_MARK),
1107 PINMUX_GPIO(GPIO_FN_HPD58, HPD58_MARK),
1108 PINMUX_GPIO(GPIO_FN_HPD57, HPD57_MARK),
1109 PINMUX_GPIO(GPIO_FN_HPD56, HPD56_MARK),
1110 PINMUX_GPIO(GPIO_FN_HPD55, HPD55_MARK),
1111 PINMUX_GPIO(GPIO_FN_HPD54, HPD54_MARK),
1112 PINMUX_GPIO(GPIO_FN_HPD53, HPD53_MARK),
1113 PINMUX_GPIO(GPIO_FN_HPD52, HPD52_MARK),
1114 PINMUX_GPIO(GPIO_FN_HPD51, HPD51_MARK),
1115 PINMUX_GPIO(GPIO_FN_HPD50, HPD50_MARK),
1116 PINMUX_GPIO(GPIO_FN_HPD49, HPD49_MARK),
1117 PINMUX_GPIO(GPIO_FN_HPD48, HPD48_MARK),
1118 PINMUX_GPIO(GPIO_FN_HPDQM7, HPDQM7_MARK),
1119 PINMUX_GPIO(GPIO_FN_HPDQM6, HPDQM6_MARK),
1120 PINMUX_GPIO(GPIO_FN_HPDQM5, HPDQM5_MARK),
1121 PINMUX_GPIO(GPIO_FN_HPDQM4, HPDQM4_MARK),
1122
1123 /* IRQ */
1124 PINMUX_GPIO(GPIO_FN_IRQ0, IRQ0_MARK),
1125 PINMUX_GPIO(GPIO_FN_IRQ1, IRQ1_MARK),
1126 PINMUX_GPIO(GPIO_FN_IRQ2, IRQ2_MARK),
1127 PINMUX_GPIO(GPIO_FN_IRQ3, IRQ3_MARK),
1128 PINMUX_GPIO(GPIO_FN_IRQ4, IRQ4_MARK),
1129 PINMUX_GPIO(GPIO_FN_IRQ5, IRQ5_MARK),
1130 PINMUX_GPIO(GPIO_FN_IRQ6, IRQ6_MARK),
1131 PINMUX_GPIO(GPIO_FN_IRQ7, IRQ7_MARK),
1132
1133 /* SDHI */
1134 PINMUX_GPIO(GPIO_FN_SDHICD, SDHICD_MARK),
1135 PINMUX_GPIO(GPIO_FN_SDHIWP, SDHIWP_MARK),
1136 PINMUX_GPIO(GPIO_FN_SDHID3, SDHID3_MARK),
1137 PINMUX_GPIO(GPIO_FN_SDHID2, SDHID2_MARK),
1138 PINMUX_GPIO(GPIO_FN_SDHID1, SDHID1_MARK),
1139 PINMUX_GPIO(GPIO_FN_SDHID0, SDHID0_MARK),
1140 PINMUX_GPIO(GPIO_FN_SDHICMD, SDHICMD_MARK),
1141 PINMUX_GPIO(GPIO_FN_SDHICLK, SDHICLK_MARK),
1142
1143 /* SIU - Port A */
1144 PINMUX_GPIO(GPIO_FN_SIUAOLR, SIUAOLR_MARK),
1145 PINMUX_GPIO(GPIO_FN_SIUAOBT, SIUAOBT_MARK),
1146 PINMUX_GPIO(GPIO_FN_SIUAISLD, SIUAISLD_MARK),
1147 PINMUX_GPIO(GPIO_FN_SIUAILR, SIUAILR_MARK),
1148 PINMUX_GPIO(GPIO_FN_SIUAIBT, SIUAIBT_MARK),
1149 PINMUX_GPIO(GPIO_FN_SIUAOSLD, SIUAOSLD_MARK),
1150 PINMUX_GPIO(GPIO_FN_SIUMCKA, SIUMCKA_MARK),
1151 PINMUX_GPIO(GPIO_FN_SIUFCKA, SIUFCKA_MARK),
1152
1153 /* SIU - Port B */
1154 PINMUX_GPIO(GPIO_FN_SIUBOLR, SIUBOLR_MARK),
1155 PINMUX_GPIO(GPIO_FN_SIUBOBT, SIUBOBT_MARK),
1156 PINMUX_GPIO(GPIO_FN_SIUBISLD, SIUBISLD_MARK),
1157 PINMUX_GPIO(GPIO_FN_SIUBILR, SIUBILR_MARK),
1158 PINMUX_GPIO(GPIO_FN_SIUBIBT, SIUBIBT_MARK),
1159 PINMUX_GPIO(GPIO_FN_SIUBOSLD, SIUBOSLD_MARK),
1160 PINMUX_GPIO(GPIO_FN_SIUMCKB, SIUMCKB_MARK),
1161 PINMUX_GPIO(GPIO_FN_SIUFCKB, SIUFCKB_MARK),
1162
1163 /* AUD */
1164 PINMUX_GPIO(GPIO_FN_AUDSYNC, AUDSYNC_MARK),
1165 PINMUX_GPIO(GPIO_FN_AUDATA3, AUDATA3_MARK),
1166 PINMUX_GPIO(GPIO_FN_AUDATA2, AUDATA2_MARK),
1167 PINMUX_GPIO(GPIO_FN_AUDATA1, AUDATA1_MARK),
1168 PINMUX_GPIO(GPIO_FN_AUDATA0, AUDATA0_MARK),
1169
1170 /* DMAC */
1171 PINMUX_GPIO(GPIO_FN_DACK, DACK_MARK),
1172 PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK),
1173
1174 /* VOU */
1175 PINMUX_GPIO(GPIO_FN_DV_CLKI, DV_CLKI_MARK),
1176 PINMUX_GPIO(GPIO_FN_DV_CLK, DV_CLK_MARK),
1177 PINMUX_GPIO(GPIO_FN_DV_HSYNC, DV_HSYNC_MARK),
1178 PINMUX_GPIO(GPIO_FN_DV_VSYNC, DV_VSYNC_MARK),
1179 PINMUX_GPIO(GPIO_FN_DV_D15, DV_D15_MARK),
1180 PINMUX_GPIO(GPIO_FN_DV_D14, DV_D14_MARK),
1181 PINMUX_GPIO(GPIO_FN_DV_D13, DV_D13_MARK),
1182 PINMUX_GPIO(GPIO_FN_DV_D12, DV_D12_MARK),
1183 PINMUX_GPIO(GPIO_FN_DV_D11, DV_D11_MARK),
1184 PINMUX_GPIO(GPIO_FN_DV_D10, DV_D10_MARK),
1185 PINMUX_GPIO(GPIO_FN_DV_D9, DV_D9_MARK),
1186 PINMUX_GPIO(GPIO_FN_DV_D8, DV_D8_MARK),
1187 PINMUX_GPIO(GPIO_FN_DV_D7, DV_D7_MARK),
1188 PINMUX_GPIO(GPIO_FN_DV_D6, DV_D6_MARK),
1189 PINMUX_GPIO(GPIO_FN_DV_D5, DV_D5_MARK),
1190 PINMUX_GPIO(GPIO_FN_DV_D4, DV_D4_MARK),
1191 PINMUX_GPIO(GPIO_FN_DV_D3, DV_D3_MARK),
1192 PINMUX_GPIO(GPIO_FN_DV_D2, DV_D2_MARK),
1193 PINMUX_GPIO(GPIO_FN_DV_D1, DV_D1_MARK),
1194 PINMUX_GPIO(GPIO_FN_DV_D0, DV_D0_MARK),
1195
1196 /* CPG */
1197 PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK),
1198 PINMUX_GPIO(GPIO_FN_PDSTATUS, PDSTATUS_MARK),
1199
1200 /* SIOF0 */
1201 PINMUX_GPIO(GPIO_FN_SIOF0_MCK, SIOF0_MCK_MARK),
1202 PINMUX_GPIO(GPIO_FN_SIOF0_SCK, SIOF0_SCK_MARK),
1203 PINMUX_GPIO(GPIO_FN_SIOF0_SYNC, SIOF0_SYNC_MARK),
1204 PINMUX_GPIO(GPIO_FN_SIOF0_SS1, SIOF0_SS1_MARK),
1205 PINMUX_GPIO(GPIO_FN_SIOF0_SS2, SIOF0_SS2_MARK),
1206 PINMUX_GPIO(GPIO_FN_SIOF0_TXD, SIOF0_TXD_MARK),
1207 PINMUX_GPIO(GPIO_FN_SIOF0_RXD, SIOF0_RXD_MARK),
1208
1209 /* SIOF1 */
1210 PINMUX_GPIO(GPIO_FN_SIOF1_MCK, SIOF1_MCK_MARK),
1211 PINMUX_GPIO(GPIO_FN_SIOF1_SCK, SIOF1_SCK_MARK),
1212 PINMUX_GPIO(GPIO_FN_SIOF1_SYNC, SIOF1_SYNC_MARK),
1213 PINMUX_GPIO(GPIO_FN_SIOF1_SS1, SIOF1_SS1_MARK),
1214 PINMUX_GPIO(GPIO_FN_SIOF1_SS2, SIOF1_SS2_MARK),
1215 PINMUX_GPIO(GPIO_FN_SIOF1_TXD, SIOF1_TXD_MARK),
1216 PINMUX_GPIO(GPIO_FN_SIOF1_RXD, SIOF1_RXD_MARK),
1217
1218 /* SIM */
1219 PINMUX_GPIO(GPIO_FN_SIM_D, SIM_D_MARK),
1220 PINMUX_GPIO(GPIO_FN_SIM_CLK, SIM_CLK_MARK),
1221 PINMUX_GPIO(GPIO_FN_SIM_RST, SIM_RST_MARK),
1222
1223 /* TSIF */
1224 PINMUX_GPIO(GPIO_FN_TS_SDAT, TS_SDAT_MARK),
1225 PINMUX_GPIO(GPIO_FN_TS_SCK, TS_SCK_MARK),
1226 PINMUX_GPIO(GPIO_FN_TS_SDEN, TS_SDEN_MARK),
1227 PINMUX_GPIO(GPIO_FN_TS_SPSYNC, TS_SPSYNC_MARK),
1228
1229 /* IRDA */
1230 PINMUX_GPIO(GPIO_FN_IRDA_IN, IRDA_IN_MARK),
1231 PINMUX_GPIO(GPIO_FN_IRDA_OUT, IRDA_OUT_MARK),
1232
1233 /* TPU */
1234 PINMUX_GPIO(GPIO_FN_TPUTO, TPUTO_MARK),
1235
1236 /* FLCTL */
1237 PINMUX_GPIO(GPIO_FN_FCE, FCE_MARK),
1238 PINMUX_GPIO(GPIO_FN_NAF7, NAF7_MARK),
1239 PINMUX_GPIO(GPIO_FN_NAF6, NAF6_MARK),
1240 PINMUX_GPIO(GPIO_FN_NAF5, NAF5_MARK),
1241 PINMUX_GPIO(GPIO_FN_NAF4, NAF4_MARK),
1242 PINMUX_GPIO(GPIO_FN_NAF3, NAF3_MARK),
1243 PINMUX_GPIO(GPIO_FN_NAF2, NAF2_MARK),
1244 PINMUX_GPIO(GPIO_FN_NAF1, NAF1_MARK),
1245 PINMUX_GPIO(GPIO_FN_NAF0, NAF0_MARK),
1246 PINMUX_GPIO(GPIO_FN_FCDE, FCDE_MARK),
1247 PINMUX_GPIO(GPIO_FN_FOE, FOE_MARK),
1248 PINMUX_GPIO(GPIO_FN_FSC, FSC_MARK),
1249 PINMUX_GPIO(GPIO_FN_FWE, FWE_MARK),
1250 PINMUX_GPIO(GPIO_FN_FRB, FRB_MARK),
1251
1252 /* KEYSC */
1253 PINMUX_GPIO(GPIO_FN_KEYIN0, KEYIN0_MARK),
1254 PINMUX_GPIO(GPIO_FN_KEYIN1, KEYIN1_MARK),
1255 PINMUX_GPIO(GPIO_FN_KEYIN2, KEYIN2_MARK),
1256 PINMUX_GPIO(GPIO_FN_KEYIN3, KEYIN3_MARK),
1257 PINMUX_GPIO(GPIO_FN_KEYIN4, KEYIN4_MARK),
1258 PINMUX_GPIO(GPIO_FN_KEYOUT0, KEYOUT0_MARK),
1259 PINMUX_GPIO(GPIO_FN_KEYOUT1, KEYOUT1_MARK),
1260 PINMUX_GPIO(GPIO_FN_KEYOUT2, KEYOUT2_MARK),
1261 PINMUX_GPIO(GPIO_FN_KEYOUT3, KEYOUT3_MARK),
1262 PINMUX_GPIO(GPIO_FN_KEYOUT4_IN6, KEYOUT4_IN6_MARK),
1263 PINMUX_GPIO(GPIO_FN_KEYOUT5_IN5, KEYOUT5_IN5_MARK),
1264};
1265
1266static struct pinmux_cfg_reg pinmux_config_regs[] = {
1267 { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) {
1268 VIO_D7_SCIF1_SCK, PTA7_OUT, PTA7_IN_PD, PTA7_IN,
1269 VIO_D6_SCIF1_RXD, 0, PTA6_IN_PD, PTA6_IN,
1270 VIO_D5_SCIF1_TXD, PTA5_OUT, PTA5_IN_PD, PTA5_IN,
1271 VIO_D4, 0, PTA4_IN_PD, PTA4_IN,
1272 VIO_D3, 0, PTA3_IN_PD, PTA3_IN,
1273 VIO_D2, 0, PTA2_IN_PD, PTA2_IN,
1274 VIO_D1, 0, PTA1_IN_PD, PTA1_IN,
1275 VIO_D0_LCDLCLK, 0, PTA0_IN_PD, PTA0_IN }
1276 },
1277 { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2) {
1278 HPD55, PTB7_OUT, 0, PTB7_IN,
1279 HPD54, PTB6_OUT, 0, PTB6_IN,
1280 HPD53, PTB5_OUT, 0, PTB5_IN,
1281 HPD52, PTB4_OUT, 0, PTB4_IN,
1282 HPD51, PTB3_OUT, 0, PTB3_IN,
1283 HPD50, PTB2_OUT, 0, PTB2_IN,
1284 HPD49, PTB1_OUT, 0, PTB1_IN,
1285 HPD48, PTB0_OUT, 0, PTB0_IN }
1286 },
1287 { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2) {
1288 0, 0, PTC7_IN_PU, PTC7_IN,
1289 0, 0, 0, 0,
1290 IOIS16, 0, PTC5_IN_PU, PTC5_IN,
1291 HPDQM7, PTC4_OUT, 0, PTC4_IN,
1292 HPDQM6, PTC3_OUT, 0, PTC3_IN,
1293 HPDQM5, PTC2_OUT, 0, PTC2_IN,
1294 0, 0, 0, 0,
1295 HPDQM4, PTC0_OUT, 0, PTC0_IN }
1296 },
1297 { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2) {
1298 SDHICD, 0, PTD7_IN_PU, PTD7_IN,
1299 SDHIWP, PTD6_OUT, PTD6_IN_PU, PTD6_IN,
1300 SDHID3, PTD5_OUT, PTD5_IN_PU, PTD5_IN,
1301 IRQ2_SDHID2, PTD4_OUT, PTD4_IN_PU, PTD4_IN,
1302 SDHID1, PTD3_OUT, PTD3_IN_PU, PTD3_IN,
1303 SDHID0, PTD2_OUT, PTD2_IN_PU, PTD2_IN,
1304 SDHICMD, PTD1_OUT, PTD1_IN_PU, PTD1_IN,
1305 SDHICLK, PTD0_OUT, 0, 0 }
1306 },
1307 { PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2) {
1308 A25, PTE7_OUT, PTE7_IN_PD, PTE7_IN,
1309 A24, PTE6_OUT, PTE6_IN_PD, PTE6_IN,
1310 A23, PTE5_OUT, PTE5_IN_PD, PTE5_IN,
1311 A22, PTE4_OUT, PTE4_IN_PD, PTE4_IN,
1312 0, 0, 0, 0,
1313 0, 0, 0, 0,
1314 IRQ5, PTE1_OUT, PTE1_IN_PD, PTE1_IN,
1315 IRQ4_BS, PTE0_OUT, PTE0_IN_PD, PTE0_IN }
1316 },
1317 { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2) {
1318 0, 0, 0, 0,
1319 PTF6, PTF6_OUT, PTF6_IN_PD, PTF6_IN,
1320 SIOSCK_SIUBOBT, PTF5_OUT, PTF5_IN_PD, PTF5_IN,
1321 SIOSTRB1_SIUBOLR, PTF4_OUT, PTF4_IN_PD, PTF4_IN,
1322 SIOSTRB0_SIUBIBT, PTF3_OUT, PTF3_IN_PD, PTF3_IN,
1323 SIOD_SIUBILR, PTF2_OUT, PTF2_IN_PD, PTF2_IN,
1324 SIORXD_SIUBISLD, 0, PTF1_IN_PD, PTF1_IN,
1325 SIOTXD_SIUBOSLD, PTF0_OUT, 0, 0 }
1326 },
1327 { PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2) {
1328 0, 0, 0, 0,
1329 0, 0, 0, 0,
1330 0, 0, 0, 0,
1331 AUDSYNC, PTG4_OUT, 0, 0,
1332 AUDATA3, PTG3_OUT, 0, 0,
1333 AUDATA2, PTG2_OUT, 0, 0,
1334 AUDATA1, PTG1_OUT, 0, 0,
1335 AUDATA0, PTG0_OUT, 0, 0 }
1336 },
1337 { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2) {
1338 LCDVCPWC_LCDVCPWC2, PTH7_OUT, 0, 0,
1339 LCDVSYN2_DACK, PTH6_OUT, PTH6_IN_PD, PTH6_IN,
1340 LCDVSYN, PTH5_OUT, PTH5_IN_PD, PTH5_IN,
1341 LCDDISP_LCDRS, PTH4_OUT, 0, 0,
1342 LCDHSYN_LCDCS, PTH3_OUT, 0, 0,
1343 LCDDON_LCDDON2, PTH2_OUT, 0, 0,
1344 LCDD17_DV_HSYNC, PTH1_OUT, PTH1_IN_PD, PTH1_IN,
1345 LCDD16_DV_VSYNC, PTH0_OUT, PTH0_IN_PD, PTH0_IN }
1346 },
1347 { PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2) {
1348 STATUS0, PTJ7_OUT, 0, 0,
1349 0, PTJ6_OUT, 0, 0,
1350 PDSTATUS, PTJ5_OUT, 0, 0,
1351 0, 0, 0, 0,
1352 0, 0, 0, 0,
1353 0, 0, 0, 0,
1354 IRQ1, PTJ1_OUT, PTJ1_IN_PU, PTJ1_IN,
1355 IRQ0, PTJ0_OUT, PTJ0_IN_PU, PTJ0_IN }
1356 },
1357 { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2) {
1358 0, 0, 0, 0,
1359 SIUAILR_SIOF1_SS2, PTK6_OUT, PTK6_IN_PD, PTK6_IN,
1360 SIUAIBT_SIOF1_SS1, PTK5_OUT, PTK5_IN_PD, PTK5_IN,
1361 SIUAOLR_SIOF1_SYNC, PTK4_OUT, PTK4_IN_PD, PTK4_IN,
1362 SIUAOBT_SIOF1_SCK, PTK3_OUT, PTK3_IN_PD, PTK3_IN,
1363 SIUAISLD_SIOF1_RXD, 0, PTK2_IN_PD, PTK2_IN,
1364 SIUAOSLD_SIOF1_TXD, PTK1_OUT, 0, 0,
1365 PTK0, PTK0_OUT, PTK0_IN_PD, PTK0_IN }
1366 },
1367 { PINMUX_CFG_REG("PLCR", 0xa4050114, 16, 2) {
1368 LCDD15_DV_D15, PTL7_OUT, PTL7_IN_PD, PTL7_IN,
1369 LCDD14_DV_D14, PTL6_OUT, PTL6_IN_PD, PTL6_IN,
1370 LCDD13_DV_D13, PTL5_OUT, PTL5_IN_PD, PTL5_IN,
1371 LCDD12_DV_D12, PTL4_OUT, PTL4_IN_PD, PTL4_IN,
1372 LCDD11_DV_D11, PTL3_OUT, PTL3_IN_PD, PTL3_IN,
1373 LCDD10_DV_D10, PTL2_OUT, PTL2_IN_PD, PTL2_IN,
1374 LCDD9_DV_D9, PTL1_OUT, PTL1_IN_PD, PTL1_IN,
1375 LCDD8_DV_D8, PTL0_OUT, PTL0_IN_PD, PTL0_IN }
1376 },
1377 { PINMUX_CFG_REG("PMCR", 0xa4050116, 16, 2) {
1378 LCDD7_DV_D7, PTM7_OUT, PTM7_IN_PD, PTM7_IN,
1379 LCDD6_DV_D6, PTM6_OUT, PTM6_IN_PD, PTM6_IN,
1380 LCDD5_DV_D5, PTM5_OUT, PTM5_IN_PD, PTM5_IN,
1381 LCDD4_DV_D4, PTM4_OUT, PTM4_IN_PD, PTM4_IN,
1382 LCDD3_DV_D3, PTM3_OUT, PTM3_IN_PD, PTM3_IN,
1383 LCDD2_DV_D2, PTM2_OUT, PTM2_IN_PD, PTM2_IN,
1384 LCDD1_DV_D1, PTM1_OUT, PTM1_IN_PD, PTM1_IN,
1385 LCDD0_DV_D0, PTM0_OUT, PTM0_IN_PD, PTM0_IN }
1386 },
1387 { PINMUX_CFG_REG("PNCR", 0xa4050118, 16, 2) {
1388 HPD63, PTN7_OUT, 0, PTN7_IN,
1389 HPD62, PTN6_OUT, 0, PTN6_IN,
1390 HPD61, PTN5_OUT, 0, PTN5_IN,
1391 HPD60, PTN4_OUT, 0, PTN4_IN,
1392 HPD59, PTN3_OUT, 0, PTN3_IN,
1393 HPD58, PTN2_OUT, 0, PTN2_IN,
1394 HPD57, PTN1_OUT, 0, PTN1_IN,
1395 HPD56, PTN0_OUT, 0, PTN0_IN }
1396 },
1397 { PINMUX_CFG_REG("PQCR", 0xa405011a, 16, 2) {
1398 0, 0, 0, 0,
1399 SIOF0_SS2_SIM_RST, PTQ6_OUT, 0, 0,
1400 SIOF0_SS1_TS_SPSYNC, PTQ5_OUT, PTQ5_IN_PD, PTQ5_IN,
1401 SIOF0_SYNC_TS_SDEN, PTQ4_OUT, PTQ4_IN_PD, PTQ4_IN,
1402 SIOF0_SCK_TS_SCK, PTQ3_OUT, PTQ3_IN_PD, PTQ3_IN,
1403 PTQ2, 0, PTQ2_IN_PD, PTQ2_IN,
1404 PTQ1, PTQ1_OUT, 0, 0,
1405 PTQ0, PTQ0_OUT, PTQ0_IN_PU, PTQ0_IN }
1406 },
1407 { PINMUX_CFG_REG("PRCR", 0xa405011c, 16, 2) {
1408 0, 0, 0, 0,
1409 0, 0, 0, 0,
1410 0, 0, 0, 0,
1411 LCDRD, PTR4_OUT, 0, 0,
1412 CS6B_CE1B_LCDCS2, PTR3_OUT, 0, 0,
1413 WAIT, 0, PTR2_IN_PU, PTR2_IN,
1414 LCDDCK_LCDWR, PTR1_OUT, 0, 0,
1415 LCDVEPWC_LCDVEPWC2, PTR0_OUT, 0, 0 }
1416 },
1417 { PINMUX_CFG_REG("PSCR", 0xa405011e, 16, 2) {
1418 0, 0, 0, 0,
1419 0, 0, 0, 0,
1420 0, 0, 0, 0,
1421 SCIF0_CTS_SIUAISPD, 0, PTS4_IN_PD, PTS4_IN,
1422 SCIF0_RTS_SIUAOSPD, PTS3_OUT, 0, 0,
1423 SCIF0_SCK_TPUTO, PTS2_OUT, PTS2_IN_PD, PTS2_IN,
1424 SCIF0_RXD, 0, PTS1_IN_PD, PTS1_IN,
1425 SCIF0_TXD, PTS0_OUT, 0, 0 }
1426 },
1427 { PINMUX_CFG_REG("PTCR", 0xa4050140, 16, 2) {
1428 0, 0, 0, 0,
1429 0, 0, 0, 0,
1430 0, 0, 0, 0,
1431 FOE_VIO_VD2, PTT4_OUT, PTT4_IN_PD, PTT4_IN,
1432 FWE, PTT3_OUT, PTT3_IN_PD, PTT3_IN,
1433 FSC, PTT2_OUT, PTT2_IN_PD, PTT2_IN,
1434 DREQ0, 0, PTT1_IN_PD, PTT1_IN,
1435 FCDE, PTT0_OUT, 0, 0 }
1436 },
1437 { PINMUX_CFG_REG("PUCR", 0xa4050142, 16, 2) {
1438 0, 0, 0, 0,
1439 0, 0, 0, 0,
1440 0, 0, 0, 0,
1441 NAF2_VIO_D10, PTU4_OUT, PTU4_IN_PD, PTU4_IN,
1442 NAF1_VIO_D9, PTU3_OUT, PTU3_IN_PD, PTU3_IN,
1443 NAF0_VIO_D8, PTU2_OUT, PTU2_IN_PD, PTU2_IN,
1444 FRB_VIO_CLK2, 0, PTU1_IN_PD, PTU1_IN,
1445 FCE_VIO_HD2, PTU0_OUT, PTU0_IN_PD, PTU0_IN }
1446 },
1447 { PINMUX_CFG_REG("PVCR", 0xa4050144, 16, 2) {
1448 0, 0, 0, 0,
1449 0, 0, 0, 0,
1450 0, 0, 0, 0,
1451 NAF7_VIO_D15, PTV4_OUT, PTV4_IN_PD, PTV4_IN,
1452 NAF6_VIO_D14, PTV3_OUT, PTV3_IN_PD, PTV3_IN,
1453 NAF5_VIO_D13, PTV2_OUT, PTV2_IN_PD, PTV2_IN,
1454 NAF4_VIO_D12, PTV1_OUT, PTV1_IN_PD, PTV1_IN,
1455 NAF3_VIO_D11, PTV0_OUT, PTV0_IN_PD, PTV0_IN }
1456 },
1457 { PINMUX_CFG_REG("PWCR", 0xa4050146, 16, 2) {
1458 0, 0, 0, 0,
1459 VIO_FLD_SCIF2_CTS, 0, PTW6_IN_PD, PTW6_IN,
1460 VIO_CKO_SCIF2_RTS, PTW5_OUT, 0, 0,
1461 VIO_STEX_SCIF2_SCK, PTW4_OUT, PTW4_IN_PD, PTW4_IN,
1462 VIO_STEM_SCIF2_TXD, PTW3_OUT, PTW3_IN_PD, PTW3_IN,
1463 VIO_HD_SCIF2_RXD, PTW2_OUT, PTW2_IN_PD, PTW2_IN,
1464 VIO_VD_SCIF1_CTS, PTW1_OUT, PTW1_IN_PD, PTW1_IN,
1465 VIO_CLK_SCIF1_RTS, PTW0_OUT, PTW0_IN_PD, PTW0_IN }
1466 },
1467 { PINMUX_CFG_REG("PXCR", 0xa4050148, 16, 2) {
1468 0, 0, 0, 0,
1469 CS6A_CE2B, PTX6_OUT, PTX6_IN_PU, PTX6_IN,
1470 LCDD23, PTX5_OUT, PTX5_IN_PD, PTX5_IN,
1471 LCDD22, PTX4_OUT, PTX4_IN_PD, PTX4_IN,
1472 LCDD21, PTX3_OUT, PTX3_IN_PD, PTX3_IN,
1473 LCDD20, PTX2_OUT, PTX2_IN_PD, PTX2_IN,
1474 LCDD19_DV_CLKI, PTX1_OUT, PTX1_IN_PD, PTX1_IN,
1475 LCDD18_DV_CLK, PTX0_OUT, PTX0_IN_PD, PTX0_IN }
1476 },
1477 { PINMUX_CFG_REG("PYCR", 0xa405014a, 16, 2) {
1478 0, 0, 0, 0,
1479 0, 0, 0, 0,
1480 KEYOUT5_IN5, PTY5_OUT, PTY5_IN_PU, PTY5_IN,
1481 KEYOUT4_IN6, PTY4_OUT, PTY4_IN_PU, PTY4_IN,
1482 KEYOUT3, PTY3_OUT, PTY3_IN_PU, PTY3_IN,
1483 KEYOUT2, PTY2_OUT, PTY2_IN_PU, PTY2_IN,
1484 KEYOUT1, PTY1_OUT, 0, 0,
1485 KEYOUT0, PTY0_OUT, PTY0_IN_PU, PTY0_IN }
1486 },
1487 { PINMUX_CFG_REG("PZCR", 0xa405014c, 16, 2) {
1488 0, 0, 0, 0,
1489 0, 0, 0, 0,
1490 KEYIN4_IRQ7, 0, PTZ5_IN_PU, PTZ5_IN,
1491 KEYIN3, 0, PTZ4_IN_PU, PTZ4_IN,
1492 KEYIN2, 0, PTZ3_IN_PU, PTZ3_IN,
1493 KEYIN1, 0, PTZ2_IN_PU, PTZ2_IN,
1494 KEYIN0_IRQ6, 0, PTZ1_IN_PU, PTZ1_IN,
1495 0, 0, 0, 0 }
1496 },
1497 { PINMUX_CFG_REG("PSELA", 0xa405014e, 16, 1) {
1498 PSA15_KEYIN0, PSA15_IRQ6,
1499 PSA14_KEYIN4, PSA14_IRQ7,
1500 0, 0,
1501 0, 0,
1502 0, 0,
1503 0, 0,
1504 PSA9_IRQ4, PSA9_BS,
1505 0, 0,
1506 0, 0,
1507 0, 0,
1508 0, 0,
1509 PSA4_IRQ2, PSA4_SDHID2,
1510 0, 0,
1511 0, 0,
1512 0, 0,
1513 0, 0 }
1514 },
1515 { PINMUX_CFG_REG("PSELB", 0xa4050150, 16, 1) {
1516 PSB15_SIOTXD, PSB15_SIUBOSLD,
1517 PSB14_SIORXD, PSB14_SIUBISLD,
1518 PSB13_SIOD, PSB13_SIUBILR,
1519 PSB12_SIOSTRB0, PSB12_SIUBIBT,
1520 PSB11_SIOSTRB1, PSB11_SIUBOLR,
1521 PSB10_SIOSCK, PSB10_SIUBOBT,
1522 PSB9_SIOMCK, PSB9_SIUMCKB,
1523 PSB8_SIOF0_MCK, PSB8_IRQ3,
1524 PSB7_SIOF0_TXD, PSB7_IRDA_OUT,
1525 PSB6_SIOF0_RXD, PSB6_IRDA_IN,
1526 PSB5_SIOF0_SCK, PSB5_TS_SCK,
1527 PSB4_SIOF0_SYNC, PSB4_TS_SDEN,
1528 PSB3_SIOF0_SS1, PSB3_TS_SPSYNC,
1529 PSB2_SIOF0_SS2, PSB2_SIM_RST,
1530 PSB1_SIUMCKA, PSB1_SIOF1_MCK,
1531 PSB0_SIUAOSLD, PSB0_SIOF1_TXD }
1532 },
1533 { PINMUX_CFG_REG("PSELC", 0xa4050152, 16, 1) {
1534 PSC15_SIUAISLD, PSC15_SIOF1_RXD,
1535 PSC14_SIUAOBT, PSC14_SIOF1_SCK,
1536 PSC13_SIUAOLR, PSC13_SIOF1_SYNC,
1537 PSC12_SIUAIBT, PSC12_SIOF1_SS1,
1538 PSC11_SIUAILR, PSC11_SIOF1_SS2,
1539 0, 0,
1540 0, 0,
1541 0, 0,
1542 0, 0,
1543 0, 0,
1544 0, 0,
1545 0, 0,
1546 0, 0,
1547 0, 0,
1548 0, 0,
1549 PSC0_NAF, PSC0_VIO }
1550 },
1551 { PINMUX_CFG_REG("PSELD", 0xa4050154, 16, 1) {
1552 0, 0,
1553 0, 0,
1554 PSD13_VIO, PSD13_SCIF2,
1555 PSD12_VIO, PSD12_SCIF1,
1556 PSD11_VIO, PSD11_SCIF1,
1557 PSD10_VIO_D0, PSD10_LCDLCLK,
1558 PSD9_SIOMCK_SIUMCKB, PSD9_SIUFCKB,
1559 PSD8_SCIF0_SCK, PSD8_TPUTO,
1560 PSD7_SCIF0_RTS, PSD7_SIUAOSPD,
1561 PSD6_SCIF0_CTS, PSD6_SIUAISPD,
1562 PSD5_CS6B_CE1B, PSD5_LCDCS2,
1563 0, 0,
1564 PSD3_LCDVEPWC_LCDVCPWC, PSD3_LCDVEPWC2_LCDVCPWC2,
1565 PSD2_LCDDON, PSD2_LCDDON2,
1566 0, 0,
1567 PSD0_LCDD19_LCDD0, PSD0_DV }
1568 },
1569 { PINMUX_CFG_REG("PSELE", 0xa4050156, 16, 1) {
1570 PSE15_SIOF0_MCK_IRQ3, PSE15_SIM_D,
1571 PSE14_SIOF0_TXD_IRDA_OUT, PSE14_SIM_CLK,
1572 PSE13_SIOF0_RXD_IRDA_IN, PSE13_TS_SDAT,
1573 PSE12_LCDVSYN2, PSE12_DACK,
1574 PSE11_SIUMCKA_SIOF1_MCK, PSE11_SIUFCKA,
1575 0, 0,
1576 0, 0,
1577 0, 0,
1578 0, 0,
1579 0, 0,
1580 0, 0,
1581 0, 0,
1582 PSE3_FLCTL, PSE3_VIO,
1583 PSE2_NAF2, PSE2_VIO_D10,
1584 PSE1_NAF1, PSE1_VIO_D9,
1585 PSE0_NAF0, PSE0_VIO_D8 }
1586 },
1587 { PINMUX_CFG_REG("HIZCRA", 0xa4050158, 16, 1) {
1588 0, 0,
1589 HIZA14_KEYSC, HIZA14_HIZ,
1590 0, 0,
1591 0, 0,
1592 0, 0,
1593 HIZA10_NAF, HIZA10_HIZ,
1594 HIZA9_VIO, HIZA9_HIZ,
1595 HIZA8_LCDC, HIZA8_HIZ,
1596 HIZA7_LCDC, HIZA7_HIZ,
1597 HIZA6_LCDC, HIZA6_HIZ,
1598 0, 0,
1599 0, 0,
1600 0, 0,
1601 0, 0,
1602 0, 0,
1603 0, 0 }
1604 },
1605 { PINMUX_CFG_REG("HIZCRB", 0xa405015a, 16, 1) {
1606 0, 0,
1607 0, 0,
1608 0, 0,
1609 0, 0,
1610 0, 0,
1611 0, 0,
1612 0, 0,
1613 0, 0,
1614 0, 0,
1615 0, 0,
1616 0, 0,
1617 HIZB4_SIUA, HIZB4_HIZ,
1618 0, 0,
1619 0, 0,
1620 HIZB1_VIO, HIZB1_HIZ,
1621 HIZB0_VIO, HIZB0_HIZ }
1622 },
1623 { PINMUX_CFG_REG("HIZCRC", 0xa405015c, 16, 1) {
1624 HIZC15_IRQ7, HIZC15_HIZ,
1625 HIZC14_IRQ6, HIZC14_HIZ,
1626 HIZC13_IRQ5, HIZC13_HIZ,
1627 HIZC12_IRQ4, HIZC12_HIZ,
1628 HIZC11_IRQ3, HIZC11_HIZ,
1629 HIZC10_IRQ2, HIZC10_HIZ,
1630 HIZC9_IRQ1, HIZC9_HIZ,
1631 HIZC8_IRQ0, HIZC8_HIZ,
1632 0, 0,
1633 0, 0,
1634 0, 0,
1635 0, 0,
1636 0, 0,
1637 0, 0,
1638 0, 0,
1639 0, 0 }
1640 },
1641 { PINMUX_CFG_REG("MSELCRB", 0xa4050182, 16, 1) {
1642 0, 0,
1643 0, 0,
1644 0, 0,
1645 0, 0,
1646 0, 0,
1647 0, 0,
1648 MSELB9_VIO, MSELB9_VIO2,
1649 MSELB8_RGB, MSELB8_SYS,
1650 0, 0,
1651 0, 0,
1652 0, 0,
1653 0, 0,
1654 0, 0,
1655 0, 0,
1656 0, 0,
1657 0, 0 }
1658 },
1659 {}
1660};
1661
1662static struct pinmux_data_reg pinmux_data_regs[] = {
1663 { PINMUX_DATA_REG("PADR", 0xa4050120, 8) {
1664 PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
1665 PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA }
1666 },
1667 { PINMUX_DATA_REG("PBDR", 0xa4050122, 8) {
1668 PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
1669 PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA }
1670 },
1671 { PINMUX_DATA_REG("PCDR", 0xa4050124, 8) {
1672 PTC7_DATA, 0, PTC5_DATA, PTC4_DATA,
1673 PTC3_DATA, PTC2_DATA, 0, PTC0_DATA }
1674 },
1675 { PINMUX_DATA_REG("PDDR", 0xa4050126, 8) {
1676 PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
1677 PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA }
1678 },
1679 { PINMUX_DATA_REG("PEDR", 0xa4050128, 8) {
1680 PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA,
1681 0, 0, PTE1_DATA, PTE0_DATA }
1682 },
1683 { PINMUX_DATA_REG("PFDR", 0xa405012a, 8) {
1684 0, PTF6_DATA, PTF5_DATA, PTF4_DATA,
1685 PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA }
1686 },
1687 { PINMUX_DATA_REG("PGDR", 0xa405012c, 8) {
1688 0, 0, 0, PTG4_DATA,
1689 PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA }
1690 },
1691 { PINMUX_DATA_REG("PHDR", 0xa405012e, 8) {
1692 PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
1693 PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA }
1694 },
1695 { PINMUX_DATA_REG("PJDR", 0xa4050130, 8) {
1696 PTJ7_DATA, PTJ6_DATA, PTJ5_DATA, 0,
1697 0, 0, PTJ1_DATA, PTJ0_DATA }
1698 },
1699 { PINMUX_DATA_REG("PKDR", 0xa4050132, 8) {
1700 0, PTK6_DATA, PTK5_DATA, PTK4_DATA,
1701 PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA }
1702 },
1703 { PINMUX_DATA_REG("PLDR", 0xa4050134, 8) {
1704 PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
1705 PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA }
1706 },
1707 { PINMUX_DATA_REG("PMDR", 0xa4050136, 8) {
1708 PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
1709 PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA }
1710 },
1711 { PINMUX_DATA_REG("PNDR", 0xa4050138, 8) {
1712 PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA,
1713 PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA }
1714 },
1715 { PINMUX_DATA_REG("PQDR", 0xa405013a, 8) {
1716 0, PTQ6_DATA, PTQ5_DATA, PTQ4_DATA,
1717 PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA }
1718 },
1719 { PINMUX_DATA_REG("PRDR", 0xa405013c, 8) {
1720 0, 0, 0, PTR4_DATA,
1721 PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA }
1722 },
1723 { PINMUX_DATA_REG("PSDR", 0xa405013e, 8) {
1724 0, 0, 0, PTS4_DATA,
1725 PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA }
1726 },
1727 { PINMUX_DATA_REG("PTDR", 0xa4050160, 8) {
1728 0, 0, 0, PTT4_DATA,
1729 PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA }
1730 },
1731 { PINMUX_DATA_REG("PUDR", 0xa4050162, 8) {
1732 0, 0, 0, PTU4_DATA,
1733 PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA }
1734 },
1735 { PINMUX_DATA_REG("PVDR", 0xa4050164, 8) {
1736 0, 0, 0, PTV4_DATA,
1737 PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA }
1738 },
1739 { PINMUX_DATA_REG("PWDR", 0xa4050166, 8) {
1740 0, PTW6_DATA, PTW5_DATA, PTW4_DATA,
1741 PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA }
1742 },
1743 { PINMUX_DATA_REG("PXDR", 0xa4050168, 8) {
1744 0, PTX6_DATA, PTX5_DATA, PTX4_DATA,
1745 PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA }
1746 },
1747 { PINMUX_DATA_REG("PYDR", 0xa405016a, 8) {
1748 0, PTY6_DATA, PTY5_DATA, PTY4_DATA,
1749 PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA }
1750 },
1751 { PINMUX_DATA_REG("PZDR", 0xa405016c, 8) {
1752 0, 0, PTZ5_DATA, PTZ4_DATA,
1753 PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA }
1754 },
1755 { },
1756};
1757
1758static struct pinmux_info sh7722_pinmux_info = {
1759 .name = "sh7722_pfc",
1760 .reserved_id = PINMUX_RESERVED,
1761 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
1762 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
1763 .input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END },
1764 .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
1765 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
1766 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
1767 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
1768
1769 .first_gpio = GPIO_PTA7,
1770 .last_gpio = GPIO_FN_KEYOUT5_IN5,
1771
1772 .gpios = pinmux_gpios,
1773 .cfg_regs = pinmux_config_regs,
1774 .data_regs = pinmux_data_regs,
1775
1776 .gpio_data = pinmux_data,
1777 .gpio_data_size = ARRAY_SIZE(pinmux_data),
1778};
1779 4
1780static int __init plat_pinmux_setup(void) 5static int __init plat_pinmux_setup(void)
1781{ 6{
1782 return sh_pfc_register_info(NULL, NULL, 0, &sh7722_pinmux_info); 7 return sh_pfc_register("pfc-sh7722", NULL, 0);
1783} 8}
1784 9
1785arch_initcall(plat_pinmux_setup); 10arch_initcall(plat_pinmux_setup);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-12 03:23:12 -0500