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authorHeiko Stübner <heiko@sntech.de>2014-05-23 16:58:53 -0400
committerOlof Johansson <olof@lixom.net>2014-05-26 15:09:45 -0400
commit5a3babfcd2354fb1063de2895cab0320fb2027ca (patch)
tree1e41f9e4dbc1a024fa8b5460e18d5fce28ecd84d
parentc40f01287b3369638c9cb145298a79cc7103f696 (diff)
clk: samsung: clk-s3c2410-dlck: do not use PNAME macro as it declares __initdata
The originally used PNAME macro from the core samsung clock infrastructure declares the created array as initdata, creating section mismatch warnings in the dclk driver. Thus declare them directly, removing these warning. Reported-by: Olof Johansson <olof@lixom.net> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Olof Johansson <olof@lixom.net>
-rw-r--r--drivers/clk/samsung/clk-s3c2410-dclk.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/clk/samsung/clk-s3c2410-dclk.c b/drivers/clk/samsung/clk-s3c2410-dclk.c
index 8d8dff005c10..c1726f46eddd 100644
--- a/drivers/clk/samsung/clk-s3c2410-dclk.c
+++ b/drivers/clk/samsung/clk-s3c2410-dclk.c
@@ -135,26 +135,26 @@ struct s3c24xx_dclk {
135#define to_s3c24xx_dclk1(x) \ 135#define to_s3c24xx_dclk1(x) \
136 container_of(x, struct s3c24xx_dclk, dclk1_div_change_nb) 136 container_of(x, struct s3c24xx_dclk, dclk1_div_change_nb)
137 137
138PNAME(dclk_s3c2410_p) = { "pclk", "uclk" }; 138static const char *dclk_s3c2410_p[] = { "pclk", "uclk" };
139PNAME(clkout0_s3c2410_p) = { "mpll", "upll", "fclk", "hclk", "pclk", 139static const char *clkout0_s3c2410_p[] = { "mpll", "upll", "fclk", "hclk", "pclk",
140 "gate_dclk0" }; 140 "gate_dclk0" };
141PNAME(clkout1_s3c2410_p) = { "mpll", "upll", "fclk", "hclk", "pclk", 141static const char *clkout1_s3c2410_p[] = { "mpll", "upll", "fclk", "hclk", "pclk",
142 "gate_dclk1" }; 142 "gate_dclk1" };
143 143
144PNAME(clkout0_s3c2412_p) = { "mpll", "upll", "rtc_clkout", 144static const char *clkout0_s3c2412_p[] = { "mpll", "upll", "rtc_clkout",
145 "hclk", "pclk", "gate_dclk0" }; 145 "hclk", "pclk", "gate_dclk0" };
146PNAME(clkout1_s3c2412_p) = { "xti", "upll", "fclk", "hclk", "pclk", 146static const char *clkout1_s3c2412_p) = { "xti", "upll", "fclk", "hclk", "pclk",
147 "gate_dclk1" }; 147 "gate_dclk1" };
148 148
149PNAME(clkout0_s3c2440_p) = { "xti", "upll", "fclk", "hclk", "pclk", 149static const char *clkout0_s3c2440_p[] = { "xti", "upll", "fclk", "hclk", "pclk",
150 "gate_dclk0" }; 150 "gate_dclk0" };
151PNAME(clkout1_s3c2440_p) = { "mpll", "upll", "rtc_clkout", 151static const char *clkout1_s3c2440_p[] = { "mpll", "upll", "rtc_clkout",
152 "hclk", "pclk", "gate_dclk1" }; 152 "hclk", "pclk", "gate_dclk1" };
153 153
154PNAME(dclk_s3c2443_p) = { "pclk", "epll" }; 154static const char *dclk_s3c2443_p[] = { "pclk", "epll" };
155PNAME(clkout0_s3c2443_p) = { "xti", "epll", "armclk", "hclk", "pclk", 155static const char *clkout0_s3c2443_p[] = { "xti", "epll", "armclk", "hclk", "pclk",
156 "gate_dclk0" }; 156 "gate_dclk0" };
157PNAME(clkout1_s3c2443_p) = { "dummy", "epll", "rtc_clkout", 157static const char *clkout1_s3c2443_p[] = { "dummy", "epll", "rtc_clkout",
158 "hclk", "pclk", "gate_dclk1" }; 158 "hclk", "pclk", "gate_dclk1" };
159 159
160#define DCLKCON_DCLK_DIV_MASK 0xf 160#define DCLKCON_DCLK_DIV_MASK 0xf