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authorArnd Bergmann <arnd@arndb.de>2012-07-06 16:13:07 -0400
committerArnd Bergmann <arnd@arndb.de>2012-07-06 16:13:07 -0400
commit5914f1a5bea192e57cd104635c69c19703f0a426 (patch)
treecd76b3836598058e7004bcfe27f29cf8930de58f
parent8e31cbc66b4c92fd1b70cbacc4917df322345f42 (diff)
parent95ef9958849381931a79ecec53e677e52c406c5a (diff)
Merge branch 'for-3.6/fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/cleanup
From Stephen Warren <swarren@wwwdotorg.org>: * 'for-3.6/fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: ARM: tegra: build powergate unconditionally ARM: tegra: Fix dts files w/ status property: "disable" -> "disabled" Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat
-rw-r--r--arch/arm/boot/dts/tegra20.dtsi36
-rw-r--r--arch/arm/boot/dts/tegra30.dtsi38
-rw-r--r--arch/arm/mach-tegra/Makefile2
3 files changed, 38 insertions, 38 deletions
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 59116b852434..9f1921634eb7 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -72,7 +72,7 @@
72 reg = <0x70002800 0x200>; 72 reg = <0x70002800 0x200>;
73 interrupts = <0 13 0x04>; 73 interrupts = <0 13 0x04>;
74 nvidia,dma-request-selector = <&apbdma 2>; 74 nvidia,dma-request-selector = <&apbdma 2>;
75 status = "disable"; 75 status = "disabled";
76 }; 76 };
77 77
78 tegra_i2s2: i2s@70002a00 { 78 tegra_i2s2: i2s@70002a00 {
@@ -80,7 +80,7 @@
80 reg = <0x70002a00 0x200>; 80 reg = <0x70002a00 0x200>;
81 interrupts = <0 3 0x04>; 81 interrupts = <0 3 0x04>;
82 nvidia,dma-request-selector = <&apbdma 1>; 82 nvidia,dma-request-selector = <&apbdma 1>;
83 status = "disable"; 83 status = "disabled";
84 }; 84 };
85 85
86 serial@70006000 { 86 serial@70006000 {
@@ -88,7 +88,7 @@
88 reg = <0x70006000 0x40>; 88 reg = <0x70006000 0x40>;
89 reg-shift = <2>; 89 reg-shift = <2>;
90 interrupts = <0 36 0x04>; 90 interrupts = <0 36 0x04>;
91 status = "disable"; 91 status = "disabled";
92 }; 92 };
93 93
94 serial@70006040 { 94 serial@70006040 {
@@ -96,7 +96,7 @@
96 reg = <0x70006040 0x40>; 96 reg = <0x70006040 0x40>;
97 reg-shift = <2>; 97 reg-shift = <2>;
98 interrupts = <0 37 0x04>; 98 interrupts = <0 37 0x04>;
99 status = "disable"; 99 status = "disabled";
100 }; 100 };
101 101
102 serial@70006200 { 102 serial@70006200 {
@@ -104,7 +104,7 @@
104 reg = <0x70006200 0x100>; 104 reg = <0x70006200 0x100>;
105 reg-shift = <2>; 105 reg-shift = <2>;
106 interrupts = <0 46 0x04>; 106 interrupts = <0 46 0x04>;
107 status = "disable"; 107 status = "disabled";
108 }; 108 };
109 109
110 serial@70006300 { 110 serial@70006300 {
@@ -112,7 +112,7 @@
112 reg = <0x70006300 0x100>; 112 reg = <0x70006300 0x100>;
113 reg-shift = <2>; 113 reg-shift = <2>;
114 interrupts = <0 90 0x04>; 114 interrupts = <0 90 0x04>;
115 status = "disable"; 115 status = "disabled";
116 }; 116 };
117 117
118 serial@70006400 { 118 serial@70006400 {
@@ -120,7 +120,7 @@
120 reg = <0x70006400 0x100>; 120 reg = <0x70006400 0x100>;
121 reg-shift = <2>; 121 reg-shift = <2>;
122 interrupts = <0 91 0x04>; 122 interrupts = <0 91 0x04>;
123 status = "disable"; 123 status = "disabled";
124 }; 124 };
125 125
126 i2c@7000c000 { 126 i2c@7000c000 {
@@ -129,7 +129,7 @@
129 interrupts = <0 38 0x04>; 129 interrupts = <0 38 0x04>;
130 #address-cells = <1>; 130 #address-cells = <1>;
131 #size-cells = <0>; 131 #size-cells = <0>;
132 status = "disable"; 132 status = "disabled";
133 }; 133 };
134 134
135 i2c@7000c400 { 135 i2c@7000c400 {
@@ -138,7 +138,7 @@
138 interrupts = <0 84 0x04>; 138 interrupts = <0 84 0x04>;
139 #address-cells = <1>; 139 #address-cells = <1>;
140 #size-cells = <0>; 140 #size-cells = <0>;
141 status = "disable"; 141 status = "disabled";
142 }; 142 };
143 143
144 i2c@7000c500 { 144 i2c@7000c500 {
@@ -147,7 +147,7 @@
147 interrupts = <0 92 0x04>; 147 interrupts = <0 92 0x04>;
148 #address-cells = <1>; 148 #address-cells = <1>;
149 #size-cells = <0>; 149 #size-cells = <0>;
150 status = "disable"; 150 status = "disabled";
151 }; 151 };
152 152
153 i2c@7000d000 { 153 i2c@7000d000 {
@@ -156,7 +156,7 @@
156 interrupts = <0 53 0x04>; 156 interrupts = <0 53 0x04>;
157 #address-cells = <1>; 157 #address-cells = <1>;
158 #size-cells = <0>; 158 #size-cells = <0>;
159 status = "disable"; 159 status = "disabled";
160 }; 160 };
161 161
162 pmc { 162 pmc {
@@ -190,7 +190,7 @@
190 interrupts = <0 20 0x04>; 190 interrupts = <0 20 0x04>;
191 phy_type = "utmi"; 191 phy_type = "utmi";
192 nvidia,has-legacy-mode; 192 nvidia,has-legacy-mode;
193 status = "disable"; 193 status = "disabled";
194 }; 194 };
195 195
196 usb@c5004000 { 196 usb@c5004000 {
@@ -198,7 +198,7 @@
198 reg = <0xc5004000 0x4000>; 198 reg = <0xc5004000 0x4000>;
199 interrupts = <0 21 0x04>; 199 interrupts = <0 21 0x04>;
200 phy_type = "ulpi"; 200 phy_type = "ulpi";
201 status = "disable"; 201 status = "disabled";
202 }; 202 };
203 203
204 usb@c5008000 { 204 usb@c5008000 {
@@ -206,35 +206,35 @@
206 reg = <0xc5008000 0x4000>; 206 reg = <0xc5008000 0x4000>;
207 interrupts = <0 97 0x04>; 207 interrupts = <0 97 0x04>;
208 phy_type = "utmi"; 208 phy_type = "utmi";
209 status = "disable"; 209 status = "disabled";
210 }; 210 };
211 211
212 sdhci@c8000000 { 212 sdhci@c8000000 {
213 compatible = "nvidia,tegra20-sdhci"; 213 compatible = "nvidia,tegra20-sdhci";
214 reg = <0xc8000000 0x200>; 214 reg = <0xc8000000 0x200>;
215 interrupts = <0 14 0x04>; 215 interrupts = <0 14 0x04>;
216 status = "disable"; 216 status = "disabled";
217 }; 217 };
218 218
219 sdhci@c8000200 { 219 sdhci@c8000200 {
220 compatible = "nvidia,tegra20-sdhci"; 220 compatible = "nvidia,tegra20-sdhci";
221 reg = <0xc8000200 0x200>; 221 reg = <0xc8000200 0x200>;
222 interrupts = <0 15 0x04>; 222 interrupts = <0 15 0x04>;
223 status = "disable"; 223 status = "disabled";
224 }; 224 };
225 225
226 sdhci@c8000400 { 226 sdhci@c8000400 {
227 compatible = "nvidia,tegra20-sdhci"; 227 compatible = "nvidia,tegra20-sdhci";
228 reg = <0xc8000400 0x200>; 228 reg = <0xc8000400 0x200>;
229 interrupts = <0 19 0x04>; 229 interrupts = <0 19 0x04>;
230 status = "disable"; 230 status = "disabled";
231 }; 231 };
232 232
233 sdhci@c8000600 { 233 sdhci@c8000600 {
234 compatible = "nvidia,tegra20-sdhci"; 234 compatible = "nvidia,tegra20-sdhci";
235 reg = <0xc8000600 0x200>; 235 reg = <0xc8000600 0x200>;
236 interrupts = <0 31 0x04>; 236 interrupts = <0 31 0x04>;
237 status = "disable"; 237 status = "disabled";
238 }; 238 };
239 239
240 pmu { 240 pmu {
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 19479393842e..da740191771f 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -82,7 +82,7 @@
82 reg = <0x70006000 0x40>; 82 reg = <0x70006000 0x40>;
83 reg-shift = <2>; 83 reg-shift = <2>;
84 interrupts = <0 36 0x04>; 84 interrupts = <0 36 0x04>;
85 status = "disable"; 85 status = "disabled";
86 }; 86 };
87 87
88 serial@70006040 { 88 serial@70006040 {
@@ -90,7 +90,7 @@
90 reg = <0x70006040 0x40>; 90 reg = <0x70006040 0x40>;
91 reg-shift = <2>; 91 reg-shift = <2>;
92 interrupts = <0 37 0x04>; 92 interrupts = <0 37 0x04>;
93 status = "disable"; 93 status = "disabled";
94 }; 94 };
95 95
96 serial@70006200 { 96 serial@70006200 {
@@ -98,7 +98,7 @@
98 reg = <0x70006200 0x100>; 98 reg = <0x70006200 0x100>;
99 reg-shift = <2>; 99 reg-shift = <2>;
100 interrupts = <0 46 0x04>; 100 interrupts = <0 46 0x04>;
101 status = "disable"; 101 status = "disabled";
102 }; 102 };
103 103
104 serial@70006300 { 104 serial@70006300 {
@@ -106,7 +106,7 @@
106 reg = <0x70006300 0x100>; 106 reg = <0x70006300 0x100>;
107 reg-shift = <2>; 107 reg-shift = <2>;
108 interrupts = <0 90 0x04>; 108 interrupts = <0 90 0x04>;
109 status = "disable"; 109 status = "disabled";
110 }; 110 };
111 111
112 serial@70006400 { 112 serial@70006400 {
@@ -114,7 +114,7 @@
114 reg = <0x70006400 0x100>; 114 reg = <0x70006400 0x100>;
115 reg-shift = <2>; 115 reg-shift = <2>;
116 interrupts = <0 91 0x04>; 116 interrupts = <0 91 0x04>;
117 status = "disable"; 117 status = "disabled";
118 }; 118 };
119 119
120 i2c@7000c000 { 120 i2c@7000c000 {
@@ -123,7 +123,7 @@
123 interrupts = <0 38 0x04>; 123 interrupts = <0 38 0x04>;
124 #address-cells = <1>; 124 #address-cells = <1>;
125 #size-cells = <0>; 125 #size-cells = <0>;
126 status = "disable"; 126 status = "disabled";
127 }; 127 };
128 128
129 i2c@7000c400 { 129 i2c@7000c400 {
@@ -132,7 +132,7 @@
132 interrupts = <0 84 0x04>; 132 interrupts = <0 84 0x04>;
133 #address-cells = <1>; 133 #address-cells = <1>;
134 #size-cells = <0>; 134 #size-cells = <0>;
135 status = "disable"; 135 status = "disabled";
136 }; 136 };
137 137
138 i2c@7000c500 { 138 i2c@7000c500 {
@@ -141,7 +141,7 @@
141 interrupts = <0 92 0x04>; 141 interrupts = <0 92 0x04>;
142 #address-cells = <1>; 142 #address-cells = <1>;
143 #size-cells = <0>; 143 #size-cells = <0>;
144 status = "disable"; 144 status = "disabled";
145 }; 145 };
146 146
147 i2c@7000c700 { 147 i2c@7000c700 {
@@ -150,7 +150,7 @@
150 interrupts = <0 120 0x04>; 150 interrupts = <0 120 0x04>;
151 #address-cells = <1>; 151 #address-cells = <1>;
152 #size-cells = <0>; 152 #size-cells = <0>;
153 status = "disable"; 153 status = "disabled";
154 }; 154 };
155 155
156 i2c@7000d000 { 156 i2c@7000d000 {
@@ -159,7 +159,7 @@
159 interrupts = <0 53 0x04>; 159 interrupts = <0 53 0x04>;
160 #address-cells = <1>; 160 #address-cells = <1>;
161 #size-cells = <0>; 161 #size-cells = <0>;
162 status = "disable"; 162 status = "disabled";
163 }; 163 };
164 164
165 pmc { 165 pmc {
@@ -201,35 +201,35 @@
201 compatible = "nvidia,tegra30-i2s"; 201 compatible = "nvidia,tegra30-i2s";
202 reg = <0x70080300 0x100>; 202 reg = <0x70080300 0x100>;
203 nvidia,ahub-cif-ids = <4 4>; 203 nvidia,ahub-cif-ids = <4 4>;
204 status = "disable"; 204 status = "disabled";
205 }; 205 };
206 206
207 tegra_i2s1: i2s@70080400 { 207 tegra_i2s1: i2s@70080400 {
208 compatible = "nvidia,tegra30-i2s"; 208 compatible = "nvidia,tegra30-i2s";
209 reg = <0x70080400 0x100>; 209 reg = <0x70080400 0x100>;
210 nvidia,ahub-cif-ids = <5 5>; 210 nvidia,ahub-cif-ids = <5 5>;
211 status = "disable"; 211 status = "disabled";
212 }; 212 };
213 213
214 tegra_i2s2: i2s@70080500 { 214 tegra_i2s2: i2s@70080500 {
215 compatible = "nvidia,tegra30-i2s"; 215 compatible = "nvidia,tegra30-i2s";
216 reg = <0x70080500 0x100>; 216 reg = <0x70080500 0x100>;
217 nvidia,ahub-cif-ids = <6 6>; 217 nvidia,ahub-cif-ids = <6 6>;
218 status = "disable"; 218 status = "disabled";
219 }; 219 };
220 220
221 tegra_i2s3: i2s@70080600 { 221 tegra_i2s3: i2s@70080600 {
222 compatible = "nvidia,tegra30-i2s"; 222 compatible = "nvidia,tegra30-i2s";
223 reg = <0x70080600 0x100>; 223 reg = <0x70080600 0x100>;
224 nvidia,ahub-cif-ids = <7 7>; 224 nvidia,ahub-cif-ids = <7 7>;
225 status = "disable"; 225 status = "disabled";
226 }; 226 };
227 227
228 tegra_i2s4: i2s@70080700 { 228 tegra_i2s4: i2s@70080700 {
229 compatible = "nvidia,tegra30-i2s"; 229 compatible = "nvidia,tegra30-i2s";
230 reg = <0x70080700 0x100>; 230 reg = <0x70080700 0x100>;
231 nvidia,ahub-cif-ids = <8 8>; 231 nvidia,ahub-cif-ids = <8 8>;
232 status = "disable"; 232 status = "disabled";
233 }; 233 };
234 }; 234 };
235 235
@@ -237,28 +237,28 @@
237 compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; 237 compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
238 reg = <0x78000000 0x200>; 238 reg = <0x78000000 0x200>;
239 interrupts = <0 14 0x04>; 239 interrupts = <0 14 0x04>;
240 status = "disable"; 240 status = "disabled";
241 }; 241 };
242 242
243 sdhci@78000200 { 243 sdhci@78000200 {
244 compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; 244 compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
245 reg = <0x78000200 0x200>; 245 reg = <0x78000200 0x200>;
246 interrupts = <0 15 0x04>; 246 interrupts = <0 15 0x04>;
247 status = "disable"; 247 status = "disabled";
248 }; 248 };
249 249
250 sdhci@78000400 { 250 sdhci@78000400 {
251 compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; 251 compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
252 reg = <0x78000400 0x200>; 252 reg = <0x78000400 0x200>;
253 interrupts = <0 19 0x04>; 253 interrupts = <0 19 0x04>;
254 status = "disable"; 254 status = "disabled";
255 }; 255 };
256 256
257 sdhci@78000600 { 257 sdhci@78000600 {
258 compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; 258 compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
259 reg = <0x78000600 0x200>; 259 reg = <0x78000600 0x200>;
260 interrupts = <0 31 0x04>; 260 interrupts = <0 31 0x04>;
261 status = "disable"; 261 status = "disabled";
262 }; 262 };
263 263
264 pmu { 264 pmu {
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 2eb4445ddb14..35253fdd1ba7 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -8,9 +8,9 @@ obj-y += timer.o
8obj-y += fuse.o 8obj-y += fuse.o
9obj-y += pmc.o 9obj-y += pmc.o
10obj-y += flowctrl.o 10obj-y += flowctrl.o
11obj-y += powergate.o
11obj-$(CONFIG_CPU_IDLE) += cpuidle.o 12obj-$(CONFIG_CPU_IDLE) += cpuidle.o
12obj-$(CONFIG_CPU_IDLE) += sleep.o 13obj-$(CONFIG_CPU_IDLE) += sleep.o
13obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += powergate.o
14obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_clocks.o 14obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_clocks.o
15obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_emc.o 15obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_emc.o
16obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += board-dt-tegra30.o 16obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += board-dt-tegra30.o
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-18 12:40:21 -0500