diff options
author | Gábor Stefanik <netrolller.3d@gmail.com> | 2009-08-18 13:18:13 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2009-08-20 11:36:07 -0400 |
commit | 5904d2067680e9bb73a4816fa6b9eec49355c9c8 (patch) | |
tree | 8bb02d8a1e824ace7892c2e6a63758a989185f79 | |
parent | 16a832e785820aa199641c77b2d6f4a443d2ec46 (diff) |
b43: LP-PHY: Implement spec updates and remove resolved FIXMEs
Larry has started re-checking all current routines against a new
version of the Broadcom MIPS driver. This patch implements the first
round of changes he documented on the specs wiki.
Also remove a few FIXMEs regarding missing initial values for variables
with dynamic initial values where reading the values has been implemented.
Signed-off-by: Gábor Stefanik <netrolller.3d@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r-- | drivers/net/wireless/b43/phy_lp.c | 98 | ||||
-rw-r--r-- | drivers/net/wireless/b43/phy_lp.h | 18 | ||||
-rw-r--r-- | drivers/net/wireless/b43/tables_lpphy.c | 12 |
3 files changed, 82 insertions, 46 deletions
diff --git a/drivers/net/wireless/b43/phy_lp.c b/drivers/net/wireless/b43/phy_lp.c index 37ba1777667f..2d3a5d812c42 100644 --- a/drivers/net/wireless/b43/phy_lp.c +++ b/drivers/net/wireless/b43/phy_lp.c | |||
@@ -724,9 +724,39 @@ static void lpphy_set_bb_mult(struct b43_wldev *dev, u8 bb_mult) | |||
724 | b43_lptab_write(dev, B43_LPTAB16(0, 87), (u16)bb_mult << 8); | 724 | b43_lptab_write(dev, B43_LPTAB16(0, 87), (u16)bb_mult << 8); |
725 | } | 725 | } |
726 | 726 | ||
727 | static void lpphy_disable_crs(struct b43_wldev *dev) | 727 | static void lpphy_set_deaf(struct b43_wldev *dev, bool user) |
728 | { | 728 | { |
729 | struct b43_phy_lp *lpphy = dev->phy.lp; | ||
730 | |||
731 | if (user) | ||
732 | lpphy->crs_usr_disable = 1; | ||
733 | else | ||
734 | lpphy->crs_sys_disable = 1; | ||
729 | b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, 0xFF1F, 0x80); | 735 | b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, 0xFF1F, 0x80); |
736 | } | ||
737 | |||
738 | static void lpphy_clear_deaf(struct b43_wldev *dev, bool user) | ||
739 | { | ||
740 | struct b43_phy_lp *lpphy = dev->phy.lp; | ||
741 | |||
742 | if (user) | ||
743 | lpphy->crs_usr_disable = 0; | ||
744 | else | ||
745 | lpphy->crs_sys_disable = 0; | ||
746 | |||
747 | if (!lpphy->crs_usr_disable && !lpphy->crs_sys_disable) { | ||
748 | if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) | ||
749 | b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, | ||
750 | 0xFF1F, 0x60); | ||
751 | else | ||
752 | b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, | ||
753 | 0xFF1F, 0x20); | ||
754 | } | ||
755 | } | ||
756 | |||
757 | static void lpphy_disable_crs(struct b43_wldev *dev, bool user) | ||
758 | { | ||
759 | lpphy_set_deaf(dev, user); | ||
730 | b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFFC, 0x1); | 760 | b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFFC, 0x1); |
731 | b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x3); | 761 | b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x3); |
732 | b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFFB); | 762 | b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFFB); |
@@ -754,12 +784,9 @@ static void lpphy_disable_crs(struct b43_wldev *dev) | |||
754 | b43_phy_write(dev, B43_LPPHY_RF_OVERRIDE_2, 0x3FF); | 784 | b43_phy_write(dev, B43_LPPHY_RF_OVERRIDE_2, 0x3FF); |
755 | } | 785 | } |
756 | 786 | ||
757 | static void lpphy_restore_crs(struct b43_wldev *dev) | 787 | static void lpphy_restore_crs(struct b43_wldev *dev, bool user) |
758 | { | 788 | { |
759 | if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) | 789 | lpphy_clear_deaf(dev, user); |
760 | b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, 0xFF1F, 0x60); | ||
761 | else | ||
762 | b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, 0xFF1F, 0x20); | ||
763 | b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFF80); | 790 | b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFF80); |
764 | b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFC00); | 791 | b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFC00); |
765 | } | 792 | } |
@@ -805,10 +832,11 @@ static void lpphy_set_tx_gains(struct b43_wldev *dev, | |||
805 | b43_phy_maskset(dev, B43_LPPHY_TX_GAIN_CTL_OVERRIDE_VAL, | 832 | b43_phy_maskset(dev, B43_LPPHY_TX_GAIN_CTL_OVERRIDE_VAL, |
806 | 0xF800, rf_gain); | 833 | 0xF800, rf_gain); |
807 | } else { | 834 | } else { |
808 | pa_gain = b43_phy_read(dev, B43_PHY_OFDM(0xFB)) & 0x7F00; | 835 | pa_gain = b43_phy_read(dev, B43_PHY_OFDM(0xFB)) & 0x1FC0; |
836 | pa_gain <<= 2; | ||
809 | b43_phy_write(dev, B43_LPPHY_TX_GAIN_CTL_OVERRIDE_VAL, | 837 | b43_phy_write(dev, B43_LPPHY_TX_GAIN_CTL_OVERRIDE_VAL, |
810 | (gains.pga << 8) | gains.gm); | 838 | (gains.pga << 8) | gains.gm); |
811 | b43_phy_maskset(dev, B43_LPPHY_TX_GAIN_CTL_OVERRIDE_VAL, | 839 | b43_phy_maskset(dev, B43_PHY_OFDM(0xFB), |
812 | 0x8000, gains.pad | pa_gain); | 840 | 0x8000, gains.pad | pa_gain); |
813 | b43_phy_write(dev, B43_PHY_OFDM(0xFC), | 841 | b43_phy_write(dev, B43_PHY_OFDM(0xFC), |
814 | (gains.pga << 8) | gains.gm); | 842 | (gains.pga << 8) | gains.gm); |
@@ -822,7 +850,7 @@ static void lpphy_set_tx_gains(struct b43_wldev *dev, | |||
822 | b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFF7F, 1 << 7); | 850 | b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFF7F, 1 << 7); |
823 | b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_2, 0xBFFF, 1 << 14); | 851 | b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_2, 0xBFFF, 1 << 14); |
824 | } | 852 | } |
825 | b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFFBF, 1 << 6); | 853 | b43_phy_maskset(dev, B43_LPPHY_AFE_CTL_OVR, 0xFFBF, 1 << 6); |
826 | } | 854 | } |
827 | 855 | ||
828 | static void lpphy_rev0_1_set_rx_gain(struct b43_wldev *dev, u32 gain) | 856 | static void lpphy_rev0_1_set_rx_gain(struct b43_wldev *dev, u32 gain) |
@@ -862,33 +890,33 @@ static void lpphy_rev2plus_set_rx_gain(struct b43_wldev *dev, u32 gain) | |||
862 | } | 890 | } |
863 | } | 891 | } |
864 | 892 | ||
865 | static void lpphy_enable_rx_gain_override(struct b43_wldev *dev) | 893 | static void lpphy_disable_rx_gain_override(struct b43_wldev *dev) |
866 | { | 894 | { |
867 | b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFFE); | 895 | b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFFE); |
868 | b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFEF); | 896 | b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFEF); |
869 | b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFBF); | 897 | b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFBF); |
870 | if (dev->phy.rev >= 2) { | 898 | if (dev->phy.rev >= 2) { |
871 | b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFEFF); | 899 | b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFEFF); |
872 | if (b43_current_band(dev->wl) != IEEE80211_BAND_2GHZ) | 900 | if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { |
873 | return; | 901 | b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFBFF); |
874 | b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFBFF); | 902 | b43_phy_mask(dev, B43_PHY_OFDM(0xE5), 0xFFF7); |
875 | b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFFF7); | 903 | } |
876 | } else { | 904 | } else { |
877 | b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFDFF); | 905 | b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFDFF); |
878 | } | 906 | } |
879 | } | 907 | } |
880 | 908 | ||
881 | static void lpphy_disable_rx_gain_override(struct b43_wldev *dev) | 909 | static void lpphy_enable_rx_gain_override(struct b43_wldev *dev) |
882 | { | 910 | { |
883 | b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x1); | 911 | b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x1); |
884 | b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x10); | 912 | b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x10); |
885 | b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x40); | 913 | b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x40); |
886 | if (dev->phy.rev >= 2) { | 914 | if (dev->phy.rev >= 2) { |
887 | b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x100); | 915 | b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x100); |
888 | if (b43_current_band(dev->wl) != IEEE80211_BAND_2GHZ) | 916 | if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { |
889 | return; | 917 | b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x400); |
890 | b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x400); | 918 | b43_phy_set(dev, B43_PHY_OFDM(0xE5), 0x8); |
891 | b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x8); | 919 | } |
892 | } else { | 920 | } else { |
893 | b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x200); | 921 | b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x200); |
894 | } | 922 | } |
@@ -1007,26 +1035,22 @@ static u32 lpphy_qdiv_roundup(u32 dividend, u32 divisor, u8 precision) | |||
1007 | { | 1035 | { |
1008 | u32 quotient, remainder, rbit, roundup, tmp; | 1036 | u32 quotient, remainder, rbit, roundup, tmp; |
1009 | 1037 | ||
1010 | if (divisor == 0) { | 1038 | if (divisor == 0) |
1011 | quotient = 0; | 1039 | return 0; |
1012 | remainder = 0; | 1040 | |
1013 | } else { | 1041 | quotient = dividend / divisor; |
1014 | quotient = dividend / divisor; | 1042 | remainder = dividend % divisor; |
1015 | remainder = dividend % divisor; | ||
1016 | } | ||
1017 | 1043 | ||
1018 | rbit = divisor & 0x1; | 1044 | rbit = divisor & 0x1; |
1019 | roundup = (divisor >> 1) + rbit; | 1045 | roundup = (divisor >> 1) + rbit; |
1020 | precision--; | ||
1021 | 1046 | ||
1022 | while (precision != 0xFF) { | 1047 | while (precision != 0) { |
1023 | tmp = remainder - roundup; | 1048 | tmp = remainder - roundup; |
1024 | quotient <<= 1; | 1049 | quotient <<= 1; |
1025 | remainder <<= 1; | 1050 | if (remainder >= roundup) |
1026 | if (remainder >= roundup) { | ||
1027 | remainder = (tmp << 1) + rbit; | 1051 | remainder = (tmp << 1) + rbit; |
1028 | quotient--; | 1052 | else |
1029 | } | 1053 | remainder <<= 1; |
1030 | precision--; | 1054 | precision--; |
1031 | } | 1055 | } |
1032 | 1056 | ||
@@ -1128,11 +1152,11 @@ static void lpphy_rev0_1_rc_calib(struct b43_wldev *dev) | |||
1128 | struct b43_phy_lp *lpphy = dev->phy.lp; | 1152 | struct b43_phy_lp *lpphy = dev->phy.lp; |
1129 | struct lpphy_iq_est iq_est; | 1153 | struct lpphy_iq_est iq_est; |
1130 | struct lpphy_tx_gains tx_gains; | 1154 | struct lpphy_tx_gains tx_gains; |
1131 | static const u32 ideal_pwr_table[22] = { | 1155 | static const u32 ideal_pwr_table[21] = { |
1132 | 0x10000, 0x10557, 0x10e2d, 0x113e0, 0x10f22, 0x0ff64, | 1156 | 0x10000, 0x10557, 0x10e2d, 0x113e0, 0x10f22, 0x0ff64, |
1133 | 0x0eda2, 0x0e5d4, 0x0efd1, 0x0fbe8, 0x0b7b8, 0x04b35, | 1157 | 0x0eda2, 0x0e5d4, 0x0efd1, 0x0fbe8, 0x0b7b8, 0x04b35, |
1134 | 0x01a5e, 0x00a0b, 0x00444, 0x001fd, 0x000ff, 0x00088, | 1158 | 0x01a5e, 0x00a0b, 0x00444, 0x001fd, 0x000ff, 0x00088, |
1135 | 0x0004c, 0x0002c, 0x0001a, 0xc0006, | 1159 | 0x0004c, 0x0002c, 0x0001a, |
1136 | }; | 1160 | }; |
1137 | bool old_txg_ovr; | 1161 | bool old_txg_ovr; |
1138 | u8 old_bbmult; | 1162 | u8 old_bbmult; |
@@ -1150,7 +1174,7 @@ static void lpphy_rev0_1_rc_calib(struct b43_wldev *dev) | |||
1150 | "RC calib: Failed to switch to channel 7, error = %d", | 1174 | "RC calib: Failed to switch to channel 7, error = %d", |
1151 | err); | 1175 | err); |
1152 | } | 1176 | } |
1153 | old_txg_ovr = (b43_phy_read(dev, B43_LPPHY_AFE_CTL_OVR) >> 6) & 1; | 1177 | old_txg_ovr = !!(b43_phy_read(dev, B43_LPPHY_AFE_CTL_OVR) & 0x40); |
1154 | old_bbmult = lpphy_get_bb_mult(dev); | 1178 | old_bbmult = lpphy_get_bb_mult(dev); |
1155 | if (old_txg_ovr) | 1179 | if (old_txg_ovr) |
1156 | tx_gains = lpphy_get_tx_gains(dev); | 1180 | tx_gains = lpphy_get_tx_gains(dev); |
@@ -1165,7 +1189,7 @@ static void lpphy_rev0_1_rc_calib(struct b43_wldev *dev) | |||
1165 | old_txpctl = lpphy->txpctl_mode; | 1189 | old_txpctl = lpphy->txpctl_mode; |
1166 | 1190 | ||
1167 | lpphy_set_tx_power_control(dev, B43_LPPHY_TXPCTL_OFF); | 1191 | lpphy_set_tx_power_control(dev, B43_LPPHY_TXPCTL_OFF); |
1168 | lpphy_disable_crs(dev); | 1192 | lpphy_disable_crs(dev, true); |
1169 | loopback = lpphy_loopback(dev); | 1193 | loopback = lpphy_loopback(dev); |
1170 | if (loopback == -1) | 1194 | if (loopback == -1) |
1171 | goto finish; | 1195 | goto finish; |
@@ -1198,7 +1222,7 @@ static void lpphy_rev0_1_rc_calib(struct b43_wldev *dev) | |||
1198 | lpphy_stop_ddfs(dev); | 1222 | lpphy_stop_ddfs(dev); |
1199 | 1223 | ||
1200 | finish: | 1224 | finish: |
1201 | lpphy_restore_crs(dev); | 1225 | lpphy_restore_crs(dev, true); |
1202 | b43_phy_write(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, old_rf_ovrval); | 1226 | b43_phy_write(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, old_rf_ovrval); |
1203 | b43_phy_write(dev, B43_LPPHY_RF_OVERRIDE_0, old_rf_ovr); | 1227 | b43_phy_write(dev, B43_LPPHY_RF_OVERRIDE_0, old_rf_ovr); |
1204 | b43_phy_write(dev, B43_LPPHY_AFE_CTL_OVRVAL, old_afe_ovrval); | 1228 | b43_phy_write(dev, B43_LPPHY_AFE_CTL_OVRVAL, old_afe_ovrval); |
diff --git a/drivers/net/wireless/b43/phy_lp.h b/drivers/net/wireless/b43/phy_lp.h index 99cb0386e345..e158d1f66c0e 100644 --- a/drivers/net/wireless/b43/phy_lp.h +++ b/drivers/net/wireless/b43/phy_lp.h | |||
@@ -825,11 +825,11 @@ struct b43_phy_lp { | |||
825 | enum b43_lpphy_txpctl_mode txpctl_mode; | 825 | enum b43_lpphy_txpctl_mode txpctl_mode; |
826 | 826 | ||
827 | /* Transmit isolation medium band */ | 827 | /* Transmit isolation medium band */ |
828 | u8 tx_isolation_med_band; /* FIXME initial value? */ | 828 | u8 tx_isolation_med_band; |
829 | /* Transmit isolation low band */ | 829 | /* Transmit isolation low band */ |
830 | u8 tx_isolation_low_band; /* FIXME initial value? */ | 830 | u8 tx_isolation_low_band; |
831 | /* Transmit isolation high band */ | 831 | /* Transmit isolation high band */ |
832 | u8 tx_isolation_hi_band; /* FIXME initial value? */ | 832 | u8 tx_isolation_hi_band; |
833 | 833 | ||
834 | /* Max transmit power medium band */ | 834 | /* Max transmit power medium band */ |
835 | u16 max_tx_pwr_med_band; | 835 | u16 max_tx_pwr_med_band; |
@@ -848,7 +848,7 @@ struct b43_phy_lp { | |||
848 | s16 txpa[3], txpal[3], txpah[3]; | 848 | s16 txpa[3], txpal[3], txpah[3]; |
849 | 849 | ||
850 | /* Receive power offset */ | 850 | /* Receive power offset */ |
851 | u8 rx_pwr_offset; /* FIXME initial value? */ | 851 | u8 rx_pwr_offset; |
852 | 852 | ||
853 | /* TSSI transmit count */ | 853 | /* TSSI transmit count */ |
854 | u16 tssi_tx_count; | 854 | u16 tssi_tx_count; |
@@ -864,16 +864,16 @@ struct b43_phy_lp { | |||
864 | s8 tx_pwr_idx_over; /* FIXME initial value? */ | 864 | s8 tx_pwr_idx_over; /* FIXME initial value? */ |
865 | 865 | ||
866 | /* RSSI vf */ | 866 | /* RSSI vf */ |
867 | u8 rssi_vf; /* FIXME initial value? */ | 867 | u8 rssi_vf; |
868 | /* RSSI vc */ | 868 | /* RSSI vc */ |
869 | u8 rssi_vc; /* FIXME initial value? */ | 869 | u8 rssi_vc; |
870 | /* RSSI gs */ | 870 | /* RSSI gs */ |
871 | u8 rssi_gs; /* FIXME initial value? */ | 871 | u8 rssi_gs; |
872 | 872 | ||
873 | /* RC cap */ | 873 | /* RC cap */ |
874 | u8 rc_cap; /* FIXME initial value? */ | 874 | u8 rc_cap; /* FIXME initial value? */ |
875 | /* BX arch */ | 875 | /* BX arch */ |
876 | u8 bx_arch; /* FIXME initial value? */ | 876 | u8 bx_arch; |
877 | 877 | ||
878 | /* Full calibration channel */ | 878 | /* Full calibration channel */ |
879 | u8 full_calib_chan; /* FIXME initial value? */ | 879 | u8 full_calib_chan; /* FIXME initial value? */ |
@@ -885,6 +885,8 @@ struct b43_phy_lp { | |||
885 | /* Used for "Save/Restore Dig Filt State" */ | 885 | /* Used for "Save/Restore Dig Filt State" */ |
886 | u16 dig_flt_state[9]; | 886 | u16 dig_flt_state[9]; |
887 | 887 | ||
888 | bool crs_usr_disable, crs_sys_disable; | ||
889 | |||
888 | unsigned int pdiv; | 890 | unsigned int pdiv; |
889 | }; | 891 | }; |
890 | 892 | ||
diff --git a/drivers/net/wireless/b43/tables_lpphy.c b/drivers/net/wireless/b43/tables_lpphy.c index 2721310acb2a..60d472f285af 100644 --- a/drivers/net/wireless/b43/tables_lpphy.c +++ b/drivers/net/wireless/b43/tables_lpphy.c | |||
@@ -2367,7 +2367,17 @@ static void lpphy_rev2plus_write_gain_table(struct b43_wldev *dev, int offset, | |||
2367 | tmp = data.pad << 16; | 2367 | tmp = data.pad << 16; |
2368 | tmp |= data.pga << 8; | 2368 | tmp |= data.pga << 8; |
2369 | tmp |= data.gm; | 2369 | tmp |= data.gm; |
2370 | tmp |= 0x7f000000; | 2370 | if (dev->phy.rev >= 3) { |
2371 | if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) | ||
2372 | tmp |= 0x10 << 24; | ||
2373 | else | ||
2374 | tmp |= 0x70 << 24; | ||
2375 | } else { | ||
2376 | if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) | ||
2377 | tmp |= 0x14 << 24; | ||
2378 | else | ||
2379 | tmp |= 0x7F << 24; | ||
2380 | } | ||
2371 | b43_lptab_write(dev, B43_LPTAB32(7, 0xC0 + offset), tmp); | 2381 | b43_lptab_write(dev, B43_LPTAB32(7, 0xC0 + offset), tmp); |
2372 | tmp = data.bb_mult << 20; | 2382 | tmp = data.bb_mult << 20; |
2373 | tmp |= data.dac << 28; | 2383 | tmp |= data.dac << 28; |