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authorGreg Ungerer <gerg@uclinux.org>2011-03-08 18:57:14 -0500
committerGreg Ungerer <gerg@uclinux.org>2011-03-15 07:01:54 -0400
commit58f0ac98f386d2b335e5852e8feec828c43a0e13 (patch)
treee5155ca33386026a9d0b7b2e0de00514f76fd295
parentbabc08b7e953cd23e10d175d546309dedadaabea (diff)
m68knommu: remove use of MBAR in old-style ColdFire timer
Not all ColdFire CPUs that use the old style timer hardware module use an MBAR set peripheral region. Move the TIMER base address defines to the per-CPU header files where we can set it correctly based on how the peripherals are mapped - instead of using a fake MBAR for some platforms. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
-rw-r--r--arch/m68k/include/asm/m5206sim.h3
-rw-r--r--arch/m68k/include/asm/m5249sim.h8
-rw-r--r--arch/m68k/include/asm/m5272sim.h5
-rw-r--r--arch/m68k/include/asm/m5307sim.h6
-rw-r--r--arch/m68k/include/asm/m532xsim.h8
-rw-r--r--arch/m68k/include/asm/m5407sim.h6
-rw-r--r--arch/m68k/include/asm/mcftimer.h23
-rw-r--r--arch/m68knommu/platform/coldfire/timers.c4
8 files changed, 37 insertions, 26 deletions
diff --git a/arch/m68k/include/asm/m5206sim.h b/arch/m68k/include/asm/m5206sim.h
index 6fb656f18455..7b58da5050a0 100644
--- a/arch/m68k/include/asm/m5206sim.h
+++ b/arch/m68k/include/asm/m5206sim.h
@@ -89,6 +89,9 @@
89#define MCFSIM_PAR 0xcb /* Pin Assignment reg (r/w) */ 89#define MCFSIM_PAR 0xcb /* Pin Assignment reg (r/w) */
90#endif 90#endif
91 91
92#define MCFTIMER_BASE1 (MCF_MBAR + 0x100) /* Base of TIMER1 */
93#define MCFTIMER_BASE2 (MCF_MBAR + 0x120) /* Base of TIMER2 */
94
92#define MCFSIM_PADDR (MCF_MBAR + 0x1c5) /* Parallel Direction (r/w) */ 95#define MCFSIM_PADDR (MCF_MBAR + 0x1c5) /* Parallel Direction (r/w) */
93#define MCFSIM_PADAT (MCF_MBAR + 0x1c9) /* Parallel Port Value (r/w) */ 96#define MCFSIM_PADAT (MCF_MBAR + 0x1c9) /* Parallel Port Value (r/w) */
94 97
diff --git a/arch/m68k/include/asm/m5249sim.h b/arch/m68k/include/asm/m5249sim.h
index aefb83ef8392..c318ce786f93 100644
--- a/arch/m68k/include/asm/m5249sim.h
+++ b/arch/m68k/include/asm/m5249sim.h
@@ -19,7 +19,7 @@
19/* 19/*
20 * The 5249 has a second MBAR region, define its address. 20 * The 5249 has a second MBAR region, define its address.
21 */ 21 */
22#define MCF_MBAR2 0x80000000 22#define MCF_MBAR2 0x80000000
23 23
24/* 24/*
25 * Define the 5249 SIM register set addresses. 25 * Define the 5249 SIM register set addresses.
@@ -67,6 +67,12 @@
67#define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */ 67#define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */
68 68
69/* 69/*
70 * Timer module.
71 */
72#define MCFTIMER_BASE1 (MCF_MBAR + 0x140) /* Base of TIMER1 */
73#define MCFTIMER_BASE2 (MCF_MBAR + 0x180) /* Base of TIMER2 */
74
75/*
70 * UART module. 76 * UART module.
71 */ 77 */
72#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */ 78#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */
diff --git a/arch/m68k/include/asm/m5272sim.h b/arch/m68k/include/asm/m5272sim.h
index 3b43fee72573..57ca4de1f911 100644
--- a/arch/m68k/include/asm/m5272sim.h
+++ b/arch/m68k/include/asm/m5272sim.h
@@ -82,6 +82,11 @@
82 82
83#define MCFDMA_BASE0 (MCF_MBAR + 0xe0) /* Base address DMA 0 */ 83#define MCFDMA_BASE0 (MCF_MBAR + 0xe0) /* Base address DMA 0 */
84 84
85#define MCFTIMER_BASE1 (MCF_MBAR + 0x200) /* Base address TIMER1 */
86#define MCFTIMER_BASE2 (MCF_MBAR + 0x220) /* Base address TIMER2 */
87#define MCFTIMER_BASE3 (MCF_MBAR + 0x240) /* Base address TIMER4 */
88#define MCFTIMER_BASE4 (MCF_MBAR + 0x260) /* Base address TIMER3 */
89
85/* 90/*
86 * Define system peripheral IRQ usage. 91 * Define system peripheral IRQ usage.
87 */ 92 */
diff --git a/arch/m68k/include/asm/m5307sim.h b/arch/m68k/include/asm/m5307sim.h
index 39285769c0e2..c3846fcfa5d1 100644
--- a/arch/m68k/include/asm/m5307sim.h
+++ b/arch/m68k/include/asm/m5307sim.h
@@ -95,6 +95,12 @@
95#define MCFSIM_DACR1 0x110 /* DRAM 1 Addr and Ctrl (r/w) */ 95#define MCFSIM_DACR1 0x110 /* DRAM 1 Addr and Ctrl (r/w) */
96#define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */ 96#define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */
97 97
98/*
99 * Timer module.
100 */
101#define MCFTIMER_BASE1 (MCF_MBAR + 0x140) /* Base of TIMER1 */
102#define MCFTIMER_BASE2 (MCF_MBAR + 0x180) /* Base of TIMER2 */
103
98#define MCFSIM_PADDR (MCF_MBAR + 0x244) 104#define MCFSIM_PADDR (MCF_MBAR + 0x244)
99#define MCFSIM_PADAT (MCF_MBAR + 0x248) 105#define MCFSIM_PADAT (MCF_MBAR + 0x248)
100 106
diff --git a/arch/m68k/include/asm/m532xsim.h b/arch/m68k/include/asm/m532xsim.h
index e6470f8ca324..0dea126f3fcf 100644
--- a/arch/m68k/include/asm/m532xsim.h
+++ b/arch/m68k/include/asm/m532xsim.h
@@ -85,6 +85,14 @@
85#define MCFUART_BASE2 0xFC064000 /* Base address of UART2 */ 85#define MCFUART_BASE2 0xFC064000 /* Base address of UART2 */
86#define MCFUART_BASE3 0xFC068000 /* Base address of UART3 */ 86#define MCFUART_BASE3 0xFC068000 /* Base address of UART3 */
87 87
88/*
89 * Timer module.
90 */
91#define MCFTIMER_BASE1 0xFC070000 /* Base address of TIMER1 */
92#define MCFTIMER_BASE2 0xFC074000 /* Base address of TIMER2 */
93#define MCFTIMER_BASE3 0xFC078000 /* Base address of TIMER3 */
94#define MCFTIMER_BASE4 0xFC07C000 /* Base address of TIMER4 */
95
88/********************************************************************* 96/*********************************************************************
89 * 97 *
90 * Reset Controller Module 98 * Reset Controller Module
diff --git a/arch/m68k/include/asm/m5407sim.h b/arch/m68k/include/asm/m5407sim.h
index 70181727326f..43272584dc09 100644
--- a/arch/m68k/include/asm/m5407sim.h
+++ b/arch/m68k/include/asm/m5407sim.h
@@ -78,6 +78,12 @@
78#define MCFSIM_DACR1 0x110 /* DRAM 1 Addr and Ctrl (r/w) */ 78#define MCFSIM_DACR1 0x110 /* DRAM 1 Addr and Ctrl (r/w) */
79#define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */ 79#define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */
80 80
81/*
82 * Timer module.
83 */
84#define MCFTIMER_BASE1 (MCF_MBAR + 0x140) /* Base of TIMER1 */
85#define MCFTIMER_BASE2 (MCF_MBAR + 0x180) /* Base of TIMER2 */
86
81#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */ 87#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */
82#define MCFUART_BASE2 0x200 /* Base address of UART2 */ 88#define MCFUART_BASE2 0x200 /* Base address of UART2 */
83 89
diff --git a/arch/m68k/include/asm/mcftimer.h b/arch/m68k/include/asm/mcftimer.h
index 0f90f6d2227a..92b276fe8240 100644
--- a/arch/m68k/include/asm/mcftimer.h
+++ b/arch/m68k/include/asm/mcftimer.h
@@ -12,29 +12,6 @@
12#define mcftimer_h 12#define mcftimer_h
13/****************************************************************************/ 13/****************************************************************************/
14 14
15
16/*
17 * Get address specific defines for this ColdFire member.
18 */
19#if defined(CONFIG_M5206) || defined(CONFIG_M5206e)
20#define MCFTIMER_BASE1 0x100 /* Base address of TIMER1 */
21#define MCFTIMER_BASE2 0x120 /* Base address of TIMER2 */
22#elif defined(CONFIG_M5272)
23#define MCFTIMER_BASE1 0x200 /* Base address of TIMER1 */
24#define MCFTIMER_BASE2 0x220 /* Base address of TIMER2 */
25#define MCFTIMER_BASE3 0x240 /* Base address of TIMER4 */
26#define MCFTIMER_BASE4 0x260 /* Base address of TIMER3 */
27#elif defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407)
28#define MCFTIMER_BASE1 0x140 /* Base address of TIMER1 */
29#define MCFTIMER_BASE2 0x180 /* Base address of TIMER2 */
30#elif defined(CONFIG_M532x)
31#define MCFTIMER_BASE1 0xfc070000 /* Base address of TIMER1 */
32#define MCFTIMER_BASE2 0xfc074000 /* Base address of TIMER2 */
33#define MCFTIMER_BASE3 0xfc078000 /* Base address of TIMER3 */
34#define MCFTIMER_BASE4 0xfc07c000 /* Base address of TIMER4 */
35#endif
36
37
38/* 15/*
39 * Define the TIMER register set addresses. 16 * Define the TIMER register set addresses.
40 */ 17 */
diff --git a/arch/m68knommu/platform/coldfire/timers.c b/arch/m68knommu/platform/coldfire/timers.c
index 2304d736c701..60242f65fea9 100644
--- a/arch/m68knommu/platform/coldfire/timers.c
+++ b/arch/m68knommu/platform/coldfire/timers.c
@@ -28,7 +28,7 @@
28 * By default use timer1 as the system clock timer. 28 * By default use timer1 as the system clock timer.
29 */ 29 */
30#define FREQ (MCF_BUSCLK / 16) 30#define FREQ (MCF_BUSCLK / 16)
31#define TA(a) (MCF_MBAR + MCFTIMER_BASE1 + (a)) 31#define TA(a) (MCFTIMER_BASE1 + (a))
32 32
33/* 33/*
34 * These provide the underlying interrupt vector support. 34 * These provide the underlying interrupt vector support.
@@ -126,7 +126,7 @@ void hw_timer_init(void)
126/* 126/*
127 * By default use timer2 as the profiler clock timer. 127 * By default use timer2 as the profiler clock timer.
128 */ 128 */
129#define PA(a) (MCF_MBAR + MCFTIMER_BASE2 + (a)) 129#define PA(a) (MCFTIMER_BASE2 + (a))
130 130
131/* 131/*
132 * Choose a reasonably fast profile timer. Make it an odd value to 132 * Choose a reasonably fast profile timer. Make it an odd value to