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authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2014-04-02 10:31:47 -0400
committerSimon Horman <horms+renesas@verge.net.au>2014-04-13 22:30:11 -0400
commit58ea1d53ba93620ac50fef9d9720b2323971f243 (patch)
tree06df2849ca580f89de6ddcd92b9283311b1abf09
parent79ea9934b8df700fa306c8ced2d3bbf94ff276a8 (diff)
ARM: shmobile: r8a7791: Rename VSP1_SY clocks to VSP1_S
The r8a7791 has three VSP1 instances, one of them being named VSPS (which stands for "VSP Standard"). The clock section in the SoC datasheet misunderstood the abbreviation as meaning VSP System, and named the corresponding clock VSP1(SY). This mistake has been carried over to the kernel code. Fix this by renaming the VSP1_SY clock to VSP1_S. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--arch/arm/boot/dts/r8a7791.dtsi2
-rw-r--r--include/dt-bindings/clock/r8a7791-clock.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 46181708e59c..aa1cba94196c 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -688,7 +688,7 @@
688 renesas,clock-indices = < 688 renesas,clock-indices = <
689 R8A7791_CLK_TMU1 R8A7791_CLK_TMU3 R8A7791_CLK_TMU2 689 R8A7791_CLK_TMU1 R8A7791_CLK_TMU3 R8A7791_CLK_TMU2
690 R8A7791_CLK_CMT0 R8A7791_CLK_TMU0 R8A7791_CLK_VSP1_DU1 690 R8A7791_CLK_CMT0 R8A7791_CLK_TMU0 R8A7791_CLK_VSP1_DU1
691 R8A7791_CLK_VSP1_DU0 R8A7791_CLK_VSP1_SY 691 R8A7791_CLK_VSP1_DU0 R8A7791_CLK_VSP1_S
692 >; 692 >;
693 clock-output-names = 693 clock-output-names =
694 "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1", 694 "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h
index 30f82f286e29..f069bc6627cb 100644
--- a/include/dt-bindings/clock/r8a7791-clock.h
+++ b/include/dt-bindings/clock/r8a7791-clock.h
@@ -32,7 +32,7 @@
32#define R8A7791_CLK_TMU0 25 32#define R8A7791_CLK_TMU0 25
33#define R8A7791_CLK_VSP1_DU1 27 33#define R8A7791_CLK_VSP1_DU1 27
34#define R8A7791_CLK_VSP1_DU0 28 34#define R8A7791_CLK_VSP1_DU0 28
35#define R8A7791_CLK_VSP1_SY 31 35#define R8A7791_CLK_VSP1_S 31
36 36
37/* MSTP2 */ 37/* MSTP2 */
38#define R8A7791_CLK_SCIFA2 2 38#define R8A7791_CLK_SCIFA2 2