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authorBrian Norris <computersforpeace@gmail.com>2014-04-08 22:16:49 -0400
committerBrian Norris <computersforpeace@gmail.com>2014-04-14 14:23:00 -0400
commit58b89a1f4c2a65b10b8f7b90b6ff2161b19bb0d1 (patch)
tree4c66af58cbfddd308c20271ae68f4959c6644117
parentb02e7f3ef0beb72da8fc64542f0ac977996ec56b (diff)
mtd: spi-nor: unify read opcode variants with ST SPI FSM
serial_flash_cmds.h defines our opcodes a little differently. Let's borrow its naming, since it's borrowed from the SFDP standard, and it's more extensible. This prepares us for merging serial_flash_cmds.h and spi-nor.h opcode listing. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Huang Shijie <b32955@freescale.com>
-rw-r--r--drivers/mtd/spi-nor/fsl-quadspi.c6
-rw-r--r--drivers/mtd/spi-nor/spi-nor.c16
-rw-r--r--include/linux/mtd/spi-nor.h24
3 files changed, 27 insertions, 19 deletions
diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c b/drivers/mtd/spi-nor/fsl-quadspi.c
index 2977f026f39d..b41bbbc531ff 100644
--- a/drivers/mtd/spi-nor/fsl-quadspi.c
+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
@@ -294,12 +294,12 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q)
294 lut_base = SEQID_QUAD_READ * 4; 294 lut_base = SEQID_QUAD_READ * 4;
295 295
296 if (q->nor_size <= SZ_16M) { 296 if (q->nor_size <= SZ_16M) {
297 cmd = SPINOR_OP_QUAD_READ; 297 cmd = SPINOR_OP_READ_1_1_4;
298 addrlen = ADDR24BIT; 298 addrlen = ADDR24BIT;
299 dummy = 8; 299 dummy = 8;
300 } else { 300 } else {
301 /* use the 4-byte address */ 301 /* use the 4-byte address */
302 cmd = SPINOR_OP_QUAD_READ; 302 cmd = SPINOR_OP_READ_1_1_4;
303 addrlen = ADDR32BIT; 303 addrlen = ADDR32BIT;
304 dummy = 8; 304 dummy = 8;
305 } 305 }
@@ -388,7 +388,7 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q)
388static int fsl_qspi_get_seqid(struct fsl_qspi *q, u8 cmd) 388static int fsl_qspi_get_seqid(struct fsl_qspi *q, u8 cmd)
389{ 389{
390 switch (cmd) { 390 switch (cmd) {
391 case SPINOR_OP_QUAD_READ: 391 case SPINOR_OP_READ_1_1_4:
392 return SEQID_QUAD_READ; 392 return SEQID_QUAD_READ;
393 case SPINOR_OP_WREN: 393 case SPINOR_OP_WREN:
394 return SEQID_WREN; 394 return SEQID_WREN;
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 1716f3ce9949..d6f44d527701 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -1014,16 +1014,16 @@ int spi_nor_scan(struct spi_nor *nor, const struct spi_device_id *id,
1014 /* Default commands */ 1014 /* Default commands */
1015 switch (nor->flash_read) { 1015 switch (nor->flash_read) {
1016 case SPI_NOR_QUAD: 1016 case SPI_NOR_QUAD:
1017 nor->read_opcode = SPINOR_OP_QUAD_READ; 1017 nor->read_opcode = SPINOR_OP_READ_1_1_4;
1018 break; 1018 break;
1019 case SPI_NOR_DUAL: 1019 case SPI_NOR_DUAL:
1020 nor->read_opcode = SPINOR_OP_DUAL_READ; 1020 nor->read_opcode = SPINOR_OP_READ_1_1_2;
1021 break; 1021 break;
1022 case SPI_NOR_FAST: 1022 case SPI_NOR_FAST:
1023 nor->read_opcode = SPINOR_OP_FAST_READ; 1023 nor->read_opcode = SPINOR_OP_READ_FAST;
1024 break; 1024 break;
1025 case SPI_NOR_NORMAL: 1025 case SPI_NOR_NORMAL:
1026 nor->read_opcode = SPINOR_OP_NORM_READ; 1026 nor->read_opcode = SPINOR_OP_READ;
1027 break; 1027 break;
1028 default: 1028 default:
1029 dev_err(dev, "No Read opcode defined\n"); 1029 dev_err(dev, "No Read opcode defined\n");
@@ -1041,16 +1041,16 @@ int spi_nor_scan(struct spi_nor *nor, const struct spi_device_id *id,
1041 /* Dedicated 4-byte command set */ 1041 /* Dedicated 4-byte command set */
1042 switch (nor->flash_read) { 1042 switch (nor->flash_read) {
1043 case SPI_NOR_QUAD: 1043 case SPI_NOR_QUAD:
1044 nor->read_opcode = SPINOR_OP_QUAD_READ_4B; 1044 nor->read_opcode = SPINOR_OP_READ4_1_1_4;
1045 break; 1045 break;
1046 case SPI_NOR_DUAL: 1046 case SPI_NOR_DUAL:
1047 nor->read_opcode = SPINOR_OP_DUAL_READ_4B; 1047 nor->read_opcode = SPINOR_OP_READ4_1_1_2;
1048 break; 1048 break;
1049 case SPI_NOR_FAST: 1049 case SPI_NOR_FAST:
1050 nor->read_opcode = SPINOR_OP_FAST_READ_4B; 1050 nor->read_opcode = SPINOR_OP_READ4_FAST;
1051 break; 1051 break;
1052 case SPI_NOR_NORMAL: 1052 case SPI_NOR_NORMAL:
1053 nor->read_opcode = SPINOR_OP_NORM_READ_4B; 1053 nor->read_opcode = SPINOR_OP_READ4;
1054 break; 1054 break;
1055 } 1055 }
1056 nor->program_opcode = SPINOR_OP_PP_4B; 1056 nor->program_opcode = SPINOR_OP_PP_4B;
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index f1fe1a6659a3..53241842a7ab 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -10,14 +10,22 @@
10#ifndef __LINUX_MTD_SPI_NOR_H 10#ifndef __LINUX_MTD_SPI_NOR_H
11#define __LINUX_MTD_SPI_NOR_H 11#define __LINUX_MTD_SPI_NOR_H
12 12
13/*
14 * Note on opcode nomenclature: some opcodes have a format like
15 * SPINOR_OP_FUNCTION{4,}_x_y_z. The numbers x, y, and z stand for the number
16 * of I/O lines used for the opcode, address, and data (respectively). The
17 * FUNCTION has an optional suffix of '4', to represent an opcode which
18 * requires a 4-byte (32-bit) address.
19 */
20
13/* Flash opcodes. */ 21/* Flash opcodes. */
14#define SPINOR_OP_WREN 0x06 /* Write enable */ 22#define SPINOR_OP_WREN 0x06 /* Write enable */
15#define SPINOR_OP_RDSR 0x05 /* Read status register */ 23#define SPINOR_OP_RDSR 0x05 /* Read status register */
16#define SPINOR_OP_WRSR 0x01 /* Write status register 1 byte */ 24#define SPINOR_OP_WRSR 0x01 /* Write status register 1 byte */
17#define SPINOR_OP_NORM_READ 0x03 /* Read data bytes (low frequency) */ 25#define SPINOR_OP_READ 0x03 /* Read data bytes (low frequency) */
18#define SPINOR_OP_FAST_READ 0x0b /* Read data bytes (high frequency) */ 26#define SPINOR_OP_READ_FAST 0x0b /* Read data bytes (high frequency) */
19#define SPINOR_OP_DUAL_READ 0x3b /* Read data bytes (Dual SPI) */ 27#define SPINOR_OP_READ_1_1_2 0x3b /* Read data bytes (Dual SPI) */
20#define SPINOR_OP_QUAD_READ 0x6b /* Read data bytes (Quad SPI) */ 28#define SPINOR_OP_READ_1_1_4 0x6b /* Read data bytes (Quad SPI) */
21#define SPINOR_OP_PP 0x02 /* Page program (up to 256 bytes) */ 29#define SPINOR_OP_PP 0x02 /* Page program (up to 256 bytes) */
22#define SPINOR_OP_BE_4K 0x20 /* Erase 4KiB block */ 30#define SPINOR_OP_BE_4K 0x20 /* Erase 4KiB block */
23#define SPINOR_OP_BE_4K_PMC 0xd7 /* Erase 4KiB block on PMC chips */ 31#define SPINOR_OP_BE_4K_PMC 0xd7 /* Erase 4KiB block on PMC chips */
@@ -28,10 +36,10 @@
28#define SPINOR_OP_RDCR 0x35 /* Read configuration register */ 36#define SPINOR_OP_RDCR 0x35 /* Read configuration register */
29 37
30/* 4-byte address opcodes - used on Spansion and some Macronix flashes. */ 38/* 4-byte address opcodes - used on Spansion and some Macronix flashes. */
31#define SPINOR_OP_NORM_READ_4B 0x13 /* Read data bytes (low frequency) */ 39#define SPINOR_OP_READ4 0x13 /* Read data bytes (low frequency) */
32#define SPINOR_OP_FAST_READ_4B 0x0c /* Read data bytes (high frequency) */ 40#define SPINOR_OP_READ4_FAST 0x0c /* Read data bytes (high frequency) */
33#define SPINOR_OP_DUAL_READ_4B 0x3c /* Read data bytes (Dual SPI) */ 41#define SPINOR_OP_READ4_1_1_2 0x3c /* Read data bytes (Dual SPI) */
34#define SPINOR_OP_QUAD_READ_4B 0x6c /* Read data bytes (Quad SPI) */ 42#define SPINOR_OP_READ4_1_1_4 0x6c /* Read data bytes (Quad SPI) */
35#define SPINOR_OP_PP_4B 0x12 /* Page program (up to 256 bytes) */ 43#define SPINOR_OP_PP_4B 0x12 /* Page program (up to 256 bytes) */
36#define SPINOR_OP_SE_4B 0xdc /* Sector erase (usually 64KiB) */ 44#define SPINOR_OP_SE_4B 0xdc /* Sector erase (usually 64KiB) */
37 45