diff options
author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2013-05-03 04:30:28 -0400 |
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committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2013-05-03 04:30:28 -0400 |
commit | 57669eaab2e9d347b1063fd57038ba26afba5882 (patch) | |
tree | 3f034dc055ea0c6eef57ee9802f4e2901ed92afb | |
parent | 37c1b9273fefe90e45c7d01ba4209e42d5e3e058 (diff) | |
parent | df4a4eece78b484ea3c29aa1f9e9a03fcbb56c8b (diff) |
Merge remote-tracking branch 'asoc/fix/davinci' into asoc-linus
-rw-r--r-- | sound/soc/davinci/davinci-mcasp.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/sound/soc/davinci/davinci-mcasp.c b/sound/soc/davinci/davinci-mcasp.c index 9321e5c9d8c1..660d00e7f6f2 100644 --- a/sound/soc/davinci/davinci-mcasp.c +++ b/sound/soc/davinci/davinci-mcasp.c | |||
@@ -503,7 +503,10 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai, | |||
503 | mcasp_set_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE); | 503 | mcasp_set_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE); |
504 | mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, AFSRE); | 504 | mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, AFSRE); |
505 | 505 | ||
506 | mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG, ACLKX | AFSX); | 506 | mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG, |
507 | ACLKX | ACLKR); | ||
508 | mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG, | ||
509 | AFSX | AFSR); | ||
507 | break; | 510 | break; |
508 | case SND_SOC_DAIFMT_CBM_CFS: | 511 | case SND_SOC_DAIFMT_CBM_CFS: |
509 | /* codec is clock master and frame slave */ | 512 | /* codec is clock master and frame slave */ |
@@ -563,7 +566,7 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai, | |||
563 | mcasp_set_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); | 566 | mcasp_set_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); |
564 | mcasp_clr_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); | 567 | mcasp_clr_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); |
565 | 568 | ||
566 | mcasp_clr_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); | 569 | mcasp_set_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); |
567 | mcasp_clr_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); | 570 | mcasp_clr_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); |
568 | break; | 571 | break; |
569 | 572 | ||