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authorJesse Barnes <jbarnes@virtuousgeek.org>2012-03-28 16:39:37 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-03-28 18:09:08 -0400
commit575155a9af9ba5e384caa6979cd918387d712221 (patch)
tree8185d59317b974d6e2824d9cfbc16a9d54fb04ba
parent64757876215fcc515403639fa0bd19e8da7ab06b (diff)
drm/i915: add ValleyView specific force wake get/put functions
ValleyView handles force wake differently than previous chipsets, so add a couple of new functions for it. But leave it disabled by default until we test it (need a chip with the Punit enabled first). Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r--drivers/gpu/drm/i915/i915_drv.c28
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h3
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h2
-rw-r--r--drivers/gpu/drm/i915/intel_display.c2
4 files changed, 34 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 77f11b9dd14e..0d92e5eb1295 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -465,6 +465,31 @@ int __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv)
465 return ret; 465 return ret;
466} 466}
467 467
468void vlv_force_wake_get(struct drm_i915_private *dev_priv)
469{
470 int count;
471
472 count = 0;
473
474 /* Already awake? */
475 if ((I915_READ(0x130094) & 0xa1) == 0xa1)
476 return;
477
478 I915_WRITE_NOTRACE(FORCEWAKE_VLV, 0xffffffff);
479 POSTING_READ(FORCEWAKE_VLV);
480
481 count = 0;
482 while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK_VLV) & 1) == 0)
483 udelay(10);
484}
485
486void vlv_force_wake_put(struct drm_i915_private *dev_priv)
487{
488 I915_WRITE_NOTRACE(FORCEWAKE_VLV, 0xffff0000);
489 /* FIXME: confirm VLV behavior with Punit folks */
490 POSTING_READ(FORCEWAKE_VLV);
491}
492
468static int i915_drm_freeze(struct drm_device *dev) 493static int i915_drm_freeze(struct drm_device *dev)
469{ 494{
470 struct drm_i915_private *dev_priv = dev->dev_private; 495 struct drm_i915_private *dev_priv = dev->dev_private;
@@ -1007,7 +1032,8 @@ MODULE_LICENSE("GPL and additional rights");
1007#define NEEDS_FORCE_WAKE(dev_priv, reg) \ 1032#define NEEDS_FORCE_WAKE(dev_priv, reg) \
1008 (((dev_priv)->info->gen >= 6) && \ 1033 (((dev_priv)->info->gen >= 6) && \
1009 ((reg) < 0x40000) && \ 1034 ((reg) < 0x40000) && \
1010 ((reg) != FORCEWAKE)) 1035 ((reg) != FORCEWAKE)) && \
1036 (!IS_VALLEYVIEW((dev_priv)->dev))
1011 1037
1012#define __i915_read(x, y) \ 1038#define __i915_read(x, y) \
1013u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \ 1039u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 32f3731b1a18..48ca0d1e306c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1406,6 +1406,9 @@ extern void __gen6_gt_force_wake_mt_get(struct drm_i915_private *dev_priv);
1406extern void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv); 1406extern void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv);
1407extern void __gen6_gt_force_wake_mt_put(struct drm_i915_private *dev_priv); 1407extern void __gen6_gt_force_wake_mt_put(struct drm_i915_private *dev_priv);
1408 1408
1409extern void vlv_force_wake_get(struct drm_i915_private *dev_priv);
1410extern void vlv_force_wake_put(struct drm_i915_private *dev_priv);
1411
1409/* overlay */ 1412/* overlay */
1410#ifdef CONFIG_DEBUG_FS 1413#ifdef CONFIG_DEBUG_FS
1411extern struct intel_overlay_error_state *intel_overlay_capture_error_state(struct drm_device *dev); 1414extern struct intel_overlay_error_state *intel_overlay_capture_error_state(struct drm_device *dev);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 841d0d115a00..3aadace73ddb 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3820,6 +3820,8 @@
3820#define EDP_LINK_TRAIN_VOL_EMP_MASK_IVB (0x3f<<22) 3820#define EDP_LINK_TRAIN_VOL_EMP_MASK_IVB (0x3f<<22)
3821 3821
3822#define FORCEWAKE 0xA18C 3822#define FORCEWAKE 0xA18C
3823#define FORCEWAKE_VLV 0x1300b0
3824#define FORCEWAKE_ACK_VLV 0x1300b4
3823#define FORCEWAKE_ACK 0x130090 3825#define FORCEWAKE_ACK 0x130090
3824#define FORCEWAKE_MT 0xa188 /* multi-threaded */ 3826#define FORCEWAKE_MT 0xa188 /* multi-threaded */
3825#define FORCEWAKE_MT_ACK 0x130040 3827#define FORCEWAKE_MT_ACK 0x130040
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 6cd5744c1d9a..d86362a44590 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9277,6 +9277,8 @@ static void intel_init_display(struct drm_device *dev)
9277 dev_priv->display.update_wm = valleyview_update_wm; 9277 dev_priv->display.update_wm = valleyview_update_wm;
9278 dev_priv->display.init_clock_gating = 9278 dev_priv->display.init_clock_gating =
9279 valleyview_init_clock_gating; 9279 valleyview_init_clock_gating;
9280 dev_priv->display.force_wake_get = vlv_force_wake_get;
9281 dev_priv->display.force_wake_put = vlv_force_wake_put;
9280 } else if (IS_PINEVIEW(dev)) { 9282 } else if (IS_PINEVIEW(dev)) {
9281 if (!intel_get_cxsr_latency(IS_PINEVIEW_G(dev), 9283 if (!intel_get_cxsr_latency(IS_PINEVIEW_G(dev),
9282 dev_priv->is_ddr3, 9284 dev_priv->is_ddr3,