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authorDamien Lespiau <damien.lespiau@intel.com>2015-01-20 07:51:52 -0500
committerDaniel Vetter <daniel.vetter@ffwll.ch>2015-01-27 03:51:04 -0500
commit5724dbd1678e2f573b13f0688277941fad66cb88 (patch)
tree4135398c6d43fa484478ed05af82920cd8fea7e7
parentbc8d7dffacb15bef89e21227c42e23d3ffc77b7b (diff)
drm/i915: Rename plane_config to initial_plane_config
This vfunc and related structure are only used for fast boot, so let's rename them to not take them as general purpose ones. v2: Fix conflicts caused by the introduction of struct intel_crtc_state Reviewed-By: Tvrtko Ursulin <tvrtko.ursulin@intel.com> (v1) Suggested-by: Daniel Vetter <daniel@ffwll.ch> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h6
-rw-r--r--drivers/gpu/drm/i915/intel_display.c44
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h4
-rw-r--r--drivers/gpu/drm/i915/intel_fbdev.c2
4 files changed, 33 insertions, 23 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index dd1cdc81b150..56fd2b80f8af 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -504,7 +504,7 @@ struct drm_i915_error_state {
504struct intel_connector; 504struct intel_connector;
505struct intel_encoder; 505struct intel_encoder;
506struct intel_crtc_state; 506struct intel_crtc_state;
507struct intel_plane_config; 507struct intel_initial_plane_config;
508struct intel_crtc; 508struct intel_crtc;
509struct intel_limit; 509struct intel_limit;
510struct dpll; 510struct dpll;
@@ -543,8 +543,8 @@ struct drm_i915_display_funcs {
543 * fills out the pipe-config with the hw state. */ 543 * fills out the pipe-config with the hw state. */
544 bool (*get_pipe_config)(struct intel_crtc *, 544 bool (*get_pipe_config)(struct intel_crtc *,
545 struct intel_crtc_state *); 545 struct intel_crtc_state *);
546 void (*get_plane_config)(struct intel_crtc *, 546 void (*get_initial_plane_config)(struct intel_crtc *,
547 struct intel_plane_config *); 547 struct intel_initial_plane_config *);
548 int (*crtc_compute_clock)(struct intel_crtc *crtc, 548 int (*crtc_compute_clock)(struct intel_crtc *crtc,
549 struct intel_crtc_state *crtc_state); 549 struct intel_crtc_state *crtc_state);
550 void (*crtc_enable)(struct drm_crtc *crtc); 550 void (*crtc_enable)(struct drm_crtc *crtc);
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 30d99017f6cc..65fce56646b9 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2363,8 +2363,9 @@ static int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
2363 } 2363 }
2364} 2364}
2365 2365
2366static bool intel_alloc_plane_obj(struct intel_crtc *crtc, 2366static bool
2367 struct intel_plane_config *plane_config) 2367intel_alloc_plane_obj(struct intel_crtc *crtc,
2368 struct intel_initial_plane_config *plane_config)
2368{ 2369{
2369 struct drm_device *dev = crtc->base.dev; 2370 struct drm_device *dev = crtc->base.dev;
2370 struct drm_i915_gem_object *obj = NULL; 2371 struct drm_i915_gem_object *obj = NULL;
@@ -2408,8 +2409,9 @@ out_unref_obj:
2408 return false; 2409 return false;
2409} 2410}
2410 2411
2411static void intel_find_plane_obj(struct intel_crtc *intel_crtc, 2412static void
2412 struct intel_plane_config *plane_config) 2413intel_find_plane_obj(struct intel_crtc *intel_crtc,
2414 struct intel_initial_plane_config *plane_config)
2413{ 2415{
2414 struct drm_device *dev = intel_crtc->base.dev; 2416 struct drm_device *dev = intel_crtc->base.dev;
2415 struct drm_i915_private *dev_priv = dev->dev_private; 2417 struct drm_i915_private *dev_priv = dev->dev_private;
@@ -6571,8 +6573,9 @@ static void vlv_crtc_clock_get(struct intel_crtc *crtc,
6571 pipe_config->port_clock = clock.dot / 5; 6573 pipe_config->port_clock = clock.dot / 5;
6572} 6574}
6573 6575
6574static void i9xx_get_plane_config(struct intel_crtc *crtc, 6576static void
6575 struct intel_plane_config *plane_config) 6577i9xx_get_initial_plane_config(struct intel_crtc *crtc,
6578 struct intel_initial_plane_config *plane_config)
6576{ 6579{
6577 struct drm_device *dev = crtc->base.dev; 6580 struct drm_device *dev = crtc->base.dev;
6578 struct drm_i915_private *dev_priv = dev->dev_private; 6581 struct drm_i915_private *dev_priv = dev->dev_private;
@@ -7599,8 +7602,9 @@ static void skylake_get_pfit_config(struct intel_crtc *crtc,
7599 } 7602 }
7600} 7603}
7601 7604
7602static void skylake_get_plane_config(struct intel_crtc *crtc, 7605static void
7603 struct intel_plane_config *plane_config) 7606skylake_get_initial_plane_config(struct intel_crtc *crtc,
7607 struct intel_initial_plane_config *plane_config)
7604{ 7608{
7605 struct drm_device *dev = crtc->base.dev; 7609 struct drm_device *dev = crtc->base.dev;
7606 struct drm_i915_private *dev_priv = dev->dev_private; 7610 struct drm_i915_private *dev_priv = dev->dev_private;
@@ -7691,8 +7695,9 @@ static void ironlake_get_pfit_config(struct intel_crtc *crtc,
7691 } 7695 }
7692} 7696}
7693 7697
7694static void ironlake_get_plane_config(struct intel_crtc *crtc, 7698static void
7695 struct intel_plane_config *plane_config) 7699ironlake_get_initial_plane_config(struct intel_crtc *crtc,
7700 struct intel_initial_plane_config *plane_config)
7696{ 7701{
7697 struct drm_device *dev = crtc->base.dev; 7702 struct drm_device *dev = crtc->base.dev;
7698 struct drm_i915_private *dev_priv = dev->dev_private; 7703 struct drm_i915_private *dev_priv = dev->dev_private;
@@ -12764,7 +12769,8 @@ static void intel_init_display(struct drm_device *dev)
12764 12769
12765 if (INTEL_INFO(dev)->gen >= 9) { 12770 if (INTEL_INFO(dev)->gen >= 9) {
12766 dev_priv->display.get_pipe_config = haswell_get_pipe_config; 12771 dev_priv->display.get_pipe_config = haswell_get_pipe_config;
12767 dev_priv->display.get_plane_config = skylake_get_plane_config; 12772 dev_priv->display.get_initial_plane_config =
12773 skylake_get_initial_plane_config;
12768 dev_priv->display.crtc_compute_clock = 12774 dev_priv->display.crtc_compute_clock =
12769 haswell_crtc_compute_clock; 12775 haswell_crtc_compute_clock;
12770 dev_priv->display.crtc_enable = haswell_crtc_enable; 12776 dev_priv->display.crtc_enable = haswell_crtc_enable;
@@ -12774,7 +12780,8 @@ static void intel_init_display(struct drm_device *dev)
12774 skylake_update_primary_plane; 12780 skylake_update_primary_plane;
12775 } else if (HAS_DDI(dev)) { 12781 } else if (HAS_DDI(dev)) {
12776 dev_priv->display.get_pipe_config = haswell_get_pipe_config; 12782 dev_priv->display.get_pipe_config = haswell_get_pipe_config;
12777 dev_priv->display.get_plane_config = ironlake_get_plane_config; 12783 dev_priv->display.get_initial_plane_config =
12784 ironlake_get_initial_plane_config;
12778 dev_priv->display.crtc_compute_clock = 12785 dev_priv->display.crtc_compute_clock =
12779 haswell_crtc_compute_clock; 12786 haswell_crtc_compute_clock;
12780 dev_priv->display.crtc_enable = haswell_crtc_enable; 12787 dev_priv->display.crtc_enable = haswell_crtc_enable;
@@ -12784,7 +12791,8 @@ static void intel_init_display(struct drm_device *dev)
12784 ironlake_update_primary_plane; 12791 ironlake_update_primary_plane;
12785 } else if (HAS_PCH_SPLIT(dev)) { 12792 } else if (HAS_PCH_SPLIT(dev)) {
12786 dev_priv->display.get_pipe_config = ironlake_get_pipe_config; 12793 dev_priv->display.get_pipe_config = ironlake_get_pipe_config;
12787 dev_priv->display.get_plane_config = ironlake_get_plane_config; 12794 dev_priv->display.get_initial_plane_config =
12795 ironlake_get_initial_plane_config;
12788 dev_priv->display.crtc_compute_clock = 12796 dev_priv->display.crtc_compute_clock =
12789 ironlake_crtc_compute_clock; 12797 ironlake_crtc_compute_clock;
12790 dev_priv->display.crtc_enable = ironlake_crtc_enable; 12798 dev_priv->display.crtc_enable = ironlake_crtc_enable;
@@ -12794,7 +12802,8 @@ static void intel_init_display(struct drm_device *dev)
12794 ironlake_update_primary_plane; 12802 ironlake_update_primary_plane;
12795 } else if (IS_VALLEYVIEW(dev)) { 12803 } else if (IS_VALLEYVIEW(dev)) {
12796 dev_priv->display.get_pipe_config = i9xx_get_pipe_config; 12804 dev_priv->display.get_pipe_config = i9xx_get_pipe_config;
12797 dev_priv->display.get_plane_config = i9xx_get_plane_config; 12805 dev_priv->display.get_initial_plane_config =
12806 i9xx_get_initial_plane_config;
12798 dev_priv->display.crtc_compute_clock = i9xx_crtc_compute_clock; 12807 dev_priv->display.crtc_compute_clock = i9xx_crtc_compute_clock;
12799 dev_priv->display.crtc_enable = valleyview_crtc_enable; 12808 dev_priv->display.crtc_enable = valleyview_crtc_enable;
12800 dev_priv->display.crtc_disable = i9xx_crtc_disable; 12809 dev_priv->display.crtc_disable = i9xx_crtc_disable;
@@ -12803,7 +12812,8 @@ static void intel_init_display(struct drm_device *dev)
12803 i9xx_update_primary_plane; 12812 i9xx_update_primary_plane;
12804 } else { 12813 } else {
12805 dev_priv->display.get_pipe_config = i9xx_get_pipe_config; 12814 dev_priv->display.get_pipe_config = i9xx_get_pipe_config;
12806 dev_priv->display.get_plane_config = i9xx_get_plane_config; 12815 dev_priv->display.get_initial_plane_config =
12816 i9xx_get_initial_plane_config;
12807 dev_priv->display.crtc_compute_clock = i9xx_crtc_compute_clock; 12817 dev_priv->display.crtc_compute_clock = i9xx_crtc_compute_clock;
12808 dev_priv->display.crtc_enable = i9xx_crtc_enable; 12818 dev_priv->display.crtc_enable = i9xx_crtc_enable;
12809 dev_priv->display.crtc_disable = i9xx_crtc_disable; 12819 dev_priv->display.crtc_disable = i9xx_crtc_disable;
@@ -13175,8 +13185,8 @@ void intel_modeset_init(struct drm_device *dev)
13175 * can even allow for smooth boot transitions if the BIOS 13185 * can even allow for smooth boot transitions if the BIOS
13176 * fb is large enough for the active pipe configuration. 13186 * fb is large enough for the active pipe configuration.
13177 */ 13187 */
13178 if (dev_priv->display.get_plane_config) { 13188 if (dev_priv->display.get_initial_plane_config) {
13179 dev_priv->display.get_plane_config(crtc, 13189 dev_priv->display.get_initial_plane_config(crtc,
13180 &crtc->plane_config); 13190 &crtc->plane_config);
13181 /* 13191 /*
13182 * If the fb is shared between multiple heads, we'll 13192 * If the fb is shared between multiple heads, we'll
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 7f7407af8c19..e957d4d938e7 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -257,7 +257,7 @@ struct intel_plane_state {
257 bool hides_primary; 257 bool hides_primary;
258}; 258};
259 259
260struct intel_plane_config { 260struct intel_initial_plane_config {
261 unsigned int tiling; 261 unsigned int tiling;
262 int size; 262 int size;
263 u32 base; 263 u32 base;
@@ -468,7 +468,7 @@ struct intel_crtc {
468 uint32_t cursor_size; 468 uint32_t cursor_size;
469 uint32_t cursor_base; 469 uint32_t cursor_base;
470 470
471 struct intel_plane_config plane_config; 471 struct intel_initial_plane_config plane_config;
472 struct intel_crtc_state *config; 472 struct intel_crtc_state *config;
473 struct intel_crtc_state *new_config; 473 struct intel_crtc_state *new_config;
474 bool new_enabled; 474 bool new_enabled;
diff --git a/drivers/gpu/drm/i915/intel_fbdev.c b/drivers/gpu/drm/i915/intel_fbdev.c
index ece702235b38..3001a8674611 100644
--- a/drivers/gpu/drm/i915/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/intel_fbdev.c
@@ -531,7 +531,7 @@ static bool intel_fbdev_init_bios(struct drm_device *dev,
531 struct intel_framebuffer *fb = NULL; 531 struct intel_framebuffer *fb = NULL;
532 struct drm_crtc *crtc; 532 struct drm_crtc *crtc;
533 struct intel_crtc *intel_crtc; 533 struct intel_crtc *intel_crtc;
534 struct intel_plane_config *plane_config = NULL; 534 struct intel_initial_plane_config *plane_config = NULL;
535 unsigned int max_size = 0; 535 unsigned int max_size = 0;
536 536
537 if (!i915.fastboot) 537 if (!i915.fastboot)