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authorJack Morgenstein <jackm@dev.mellanox.co.il>2013-11-07 05:19:50 -0500
committerDavid S. Miller <davem@davemloft.net>2013-11-07 19:22:47 -0500
commit571b8b92c7d4cddd899cf19f11f14fb149968898 (patch)
treee89b424be4ee510fe2f508331306b9175b02f9b6
parent75a353d4761ae25f5b7676720bab81a8ad2abf0b (diff)
net/mlx4_core: Initialize all mailbox buffers to zero before use
To guarantee that all unused fields in all FW commands for both inboxes and outboxes are zeroed out, initialize the mailbox buffer to all zeroes. This is especially important for SRIOV comm-channel virtual commands (such as QUERY_FUNC_CAP), where if new fields are added to support new features, the driver can depend on older kernels passing zeroes in these fields. In addition to zeroing out the mailbox buffer at allocation time, all (now unnecessary) calls to memset by the callers of mlx4_alloc_cmd_mailbox() are removed. Signed-off-by: Majd Dibbiny <majd@mellanox.com> Signed-off-by: Jack Morgenstein <jackm@dev.mellanox.co.il> Signed-off-by: Amir Vadai <amirv@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/infiniband/hw/mlx4/main.c6
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/cmd.c2
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/cq.c6
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/en_port.c3
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/eq.c1
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/fw.c7
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/mcg.c2
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/mr.c5
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/port.c11
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/srq.c2
10 files changed, 2 insertions, 43 deletions
diff --git a/drivers/infiniband/hw/mlx4/main.c b/drivers/infiniband/hw/mlx4/main.c
index 7567437dbd34..6a0a0d29660d 100644
--- a/drivers/infiniband/hw/mlx4/main.c
+++ b/drivers/infiniband/hw/mlx4/main.c
@@ -526,7 +526,6 @@ static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask,
526 if (IS_ERR(mailbox)) 526 if (IS_ERR(mailbox))
527 return 0; 527 return 0;
528 528
529 memset(mailbox->buf, 0, 256);
530 memcpy(mailbox->buf, props->node_desc, 64); 529 memcpy(mailbox->buf, props->node_desc, 64);
531 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0, 530 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0,
532 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE); 531 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
@@ -547,8 +546,6 @@ static int mlx4_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols,
547 if (IS_ERR(mailbox)) 546 if (IS_ERR(mailbox))
548 return PTR_ERR(mailbox); 547 return PTR_ERR(mailbox);
549 548
550 memset(mailbox->buf, 0, 256);
551
552 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) { 549 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
553 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6; 550 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6;
554 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask); 551 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask);
@@ -879,8 +876,6 @@ static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_att
879 struct mlx4_ib_dev *mdev = to_mdev(qp->device); 876 struct mlx4_ib_dev *mdev = to_mdev(qp->device);
880 struct mlx4_cmd_mailbox *mailbox; 877 struct mlx4_cmd_mailbox *mailbox;
881 struct mlx4_net_trans_rule_hw_ctrl *ctrl; 878 struct mlx4_net_trans_rule_hw_ctrl *ctrl;
882 size_t rule_size = sizeof(struct mlx4_net_trans_rule_hw_ctrl) +
883 (sizeof(struct _rule_hw) * flow_attr->num_of_specs);
884 879
885 static const u16 __mlx4_domain[] = { 880 static const u16 __mlx4_domain[] = {
886 [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS, 881 [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS,
@@ -905,7 +900,6 @@ static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_att
905 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev); 900 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
906 if (IS_ERR(mailbox)) 901 if (IS_ERR(mailbox))
907 return PTR_ERR(mailbox); 902 return PTR_ERR(mailbox);
908 memset(mailbox->buf, 0, rule_size);
909 ctrl = mailbox->buf; 903 ctrl = mailbox->buf;
910 904
911 ctrl->prio = cpu_to_be16(__mlx4_domain[domain] | 905 ctrl->prio = cpu_to_be16(__mlx4_domain[domain] |
diff --git a/drivers/net/ethernet/mellanox/mlx4/cmd.c b/drivers/net/ethernet/mellanox/mlx4/cmd.c
index 65d41b76fa2c..7207dcd05759 100644
--- a/drivers/net/ethernet/mellanox/mlx4/cmd.c
+++ b/drivers/net/ethernet/mellanox/mlx4/cmd.c
@@ -2199,6 +2199,8 @@ struct mlx4_cmd_mailbox *mlx4_alloc_cmd_mailbox(struct mlx4_dev *dev)
2199 return ERR_PTR(-ENOMEM); 2199 return ERR_PTR(-ENOMEM);
2200 } 2200 }
2201 2201
2202 memset(mailbox->buf, 0, MLX4_MAILBOX_SIZE);
2203
2202 return mailbox; 2204 return mailbox;
2203} 2205}
2204EXPORT_SYMBOL_GPL(mlx4_alloc_cmd_mailbox); 2206EXPORT_SYMBOL_GPL(mlx4_alloc_cmd_mailbox);
diff --git a/drivers/net/ethernet/mellanox/mlx4/cq.c b/drivers/net/ethernet/mellanox/mlx4/cq.c
index 004e4231af67..22fcbe78311c 100644
--- a/drivers/net/ethernet/mellanox/mlx4/cq.c
+++ b/drivers/net/ethernet/mellanox/mlx4/cq.c
@@ -128,8 +128,6 @@ int mlx4_cq_modify(struct mlx4_dev *dev, struct mlx4_cq *cq,
128 return PTR_ERR(mailbox); 128 return PTR_ERR(mailbox);
129 129
130 cq_context = mailbox->buf; 130 cq_context = mailbox->buf;
131 memset(cq_context, 0, sizeof *cq_context);
132
133 cq_context->cq_max_count = cpu_to_be16(count); 131 cq_context->cq_max_count = cpu_to_be16(count);
134 cq_context->cq_period = cpu_to_be16(period); 132 cq_context->cq_period = cpu_to_be16(period);
135 133
@@ -153,8 +151,6 @@ int mlx4_cq_resize(struct mlx4_dev *dev, struct mlx4_cq *cq,
153 return PTR_ERR(mailbox); 151 return PTR_ERR(mailbox);
154 152
155 cq_context = mailbox->buf; 153 cq_context = mailbox->buf;
156 memset(cq_context, 0, sizeof *cq_context);
157
158 cq_context->logsize_usrpage = cpu_to_be32(ilog2(entries) << 24); 154 cq_context->logsize_usrpage = cpu_to_be32(ilog2(entries) << 24);
159 cq_context->log_page_size = mtt->page_shift - 12; 155 cq_context->log_page_size = mtt->page_shift - 12;
160 mtt_addr = mlx4_mtt_addr(dev, mtt); 156 mtt_addr = mlx4_mtt_addr(dev, mtt);
@@ -274,8 +270,6 @@ int mlx4_cq_alloc(struct mlx4_dev *dev, int nent,
274 } 270 }
275 271
276 cq_context = mailbox->buf; 272 cq_context = mailbox->buf;
277 memset(cq_context, 0, sizeof *cq_context);
278
279 cq_context->flags = cpu_to_be32(!!collapsed << 18); 273 cq_context->flags = cpu_to_be32(!!collapsed << 18);
280 if (timestamp_en) 274 if (timestamp_en)
281 cq_context->flags |= cpu_to_be32(1 << 19); 275 cq_context->flags |= cpu_to_be32(1 << 19);
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_port.c b/drivers/net/ethernet/mellanox/mlx4/en_port.c
index 331791467a22..5f8535e408a3 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_port.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_port.c
@@ -56,7 +56,6 @@ int mlx4_SET_VLAN_FLTR(struct mlx4_dev *dev, struct mlx4_en_priv *priv)
56 return PTR_ERR(mailbox); 56 return PTR_ERR(mailbox);
57 57
58 filter = mailbox->buf; 58 filter = mailbox->buf;
59 memset(filter, 0, sizeof(*filter));
60 for (i = VLAN_FLTR_SIZE - 1; i >= 0; i--) { 59 for (i = VLAN_FLTR_SIZE - 1; i >= 0; i--) {
61 entry = 0; 60 entry = 0;
62 for (j = 0; j < 32; j++) 61 for (j = 0; j < 32; j++)
@@ -81,7 +80,6 @@ int mlx4_en_QUERY_PORT(struct mlx4_en_dev *mdev, u8 port)
81 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev); 80 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
82 if (IS_ERR(mailbox)) 81 if (IS_ERR(mailbox))
83 return PTR_ERR(mailbox); 82 return PTR_ERR(mailbox);
84 memset(mailbox->buf, 0, sizeof(*qport_context));
85 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0, 83 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
86 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B, 84 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
87 MLX4_CMD_WRAPPED); 85 MLX4_CMD_WRAPPED);
@@ -127,7 +125,6 @@ int mlx4_en_DUMP_ETH_STATS(struct mlx4_en_dev *mdev, u8 port, u8 reset)
127 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev); 125 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
128 if (IS_ERR(mailbox)) 126 if (IS_ERR(mailbox))
129 return PTR_ERR(mailbox); 127 return PTR_ERR(mailbox);
130 memset(mailbox->buf, 0, sizeof(*mlx4_en_stats));
131 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, in_mod, 0, 128 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, in_mod, 0,
132 MLX4_CMD_DUMP_ETH_STATS, MLX4_CMD_TIME_CLASS_B, 129 MLX4_CMD_DUMP_ETH_STATS, MLX4_CMD_TIME_CLASS_B,
133 MLX4_CMD_WRAPPED); 130 MLX4_CMD_WRAPPED);
diff --git a/drivers/net/ethernet/mellanox/mlx4/eq.c b/drivers/net/ethernet/mellanox/mlx4/eq.c
index 0416c5b3b35c..c9cdb2a2c596 100644
--- a/drivers/net/ethernet/mellanox/mlx4/eq.c
+++ b/drivers/net/ethernet/mellanox/mlx4/eq.c
@@ -936,7 +936,6 @@ static int mlx4_create_eq(struct mlx4_dev *dev, int nent,
936 if (err) 936 if (err)
937 goto err_out_free_mtt; 937 goto err_out_free_mtt;
938 938
939 memset(eq_context, 0, sizeof *eq_context);
940 eq_context->flags = cpu_to_be32(MLX4_EQ_STATUS_OK | 939 eq_context->flags = cpu_to_be32(MLX4_EQ_STATUS_OK |
941 MLX4_EQ_STATE_ARMED); 940 MLX4_EQ_STATE_ARMED);
942 eq_context->log_eq_size = ilog2(eq->nent); 941 eq_context->log_eq_size = ilog2(eq->nent);
diff --git a/drivers/net/ethernet/mellanox/mlx4/fw.c b/drivers/net/ethernet/mellanox/mlx4/fw.c
index c3e70bc2d875..fda26679f7d5 100644
--- a/drivers/net/ethernet/mellanox/mlx4/fw.c
+++ b/drivers/net/ethernet/mellanox/mlx4/fw.c
@@ -159,8 +159,6 @@ int mlx4_MOD_STAT_CFG(struct mlx4_dev *dev, struct mlx4_mod_stat_cfg *cfg)
159 return PTR_ERR(mailbox); 159 return PTR_ERR(mailbox);
160 inbox = mailbox->buf; 160 inbox = mailbox->buf;
161 161
162 memset(inbox, 0, MOD_STAT_CFG_IN_SIZE);
163
164 MLX4_PUT(inbox, cfg->log_pg_sz, MOD_STAT_CFG_PG_SZ_OFFSET); 162 MLX4_PUT(inbox, cfg->log_pg_sz, MOD_STAT_CFG_PG_SZ_OFFSET);
165 MLX4_PUT(inbox, cfg->log_pg_sz_m, MOD_STAT_CFG_PG_SZ_M_OFFSET); 163 MLX4_PUT(inbox, cfg->log_pg_sz_m, MOD_STAT_CFG_PG_SZ_M_OFFSET);
166 164
@@ -967,7 +965,6 @@ int mlx4_map_cmd(struct mlx4_dev *dev, u16 op, struct mlx4_icm *icm, u64 virt)
967 mailbox = mlx4_alloc_cmd_mailbox(dev); 965 mailbox = mlx4_alloc_cmd_mailbox(dev);
968 if (IS_ERR(mailbox)) 966 if (IS_ERR(mailbox))
969 return PTR_ERR(mailbox); 967 return PTR_ERR(mailbox);
970 memset(mailbox->buf, 0, MLX4_MAILBOX_SIZE);
971 pages = mailbox->buf; 968 pages = mailbox->buf;
972 969
973 for (mlx4_icm_first(icm, &iter); 970 for (mlx4_icm_first(icm, &iter);
@@ -1316,8 +1313,6 @@ int mlx4_INIT_HCA(struct mlx4_dev *dev, struct mlx4_init_hca_param *param)
1316 return PTR_ERR(mailbox); 1313 return PTR_ERR(mailbox);
1317 inbox = mailbox->buf; 1314 inbox = mailbox->buf;
1318 1315
1319 memset(inbox, 0, INIT_HCA_IN_SIZE);
1320
1321 *((u8 *) mailbox->buf + INIT_HCA_VERSION_OFFSET) = INIT_HCA_VERSION; 1316 *((u8 *) mailbox->buf + INIT_HCA_VERSION_OFFSET) = INIT_HCA_VERSION;
1322 1317
1323 *((u8 *) mailbox->buf + INIT_HCA_CACHELINE_SZ_OFFSET) = 1318 *((u8 *) mailbox->buf + INIT_HCA_CACHELINE_SZ_OFFSET) =
@@ -1616,8 +1611,6 @@ int mlx4_INIT_PORT(struct mlx4_dev *dev, int port)
1616 return PTR_ERR(mailbox); 1611 return PTR_ERR(mailbox);
1617 inbox = mailbox->buf; 1612 inbox = mailbox->buf;
1618 1613
1619 memset(inbox, 0, INIT_PORT_IN_SIZE);
1620
1621 flags = 0; 1614 flags = 0;
1622 flags |= (dev->caps.vl_cap[port] & 0xf) << INIT_PORT_VL_SHIFT; 1615 flags |= (dev->caps.vl_cap[port] & 0xf) << INIT_PORT_VL_SHIFT;
1623 flags |= (dev->caps.port_width_cap[port] & 0xf) << INIT_PORT_PORT_WIDTH_SHIFT; 1616 flags |= (dev->caps.port_width_cap[port] & 0xf) << INIT_PORT_PORT_WIDTH_SHIFT;
diff --git a/drivers/net/ethernet/mellanox/mlx4/mcg.c b/drivers/net/ethernet/mellanox/mlx4/mcg.c
index 70f0213d68c4..acf9d5f1f922 100644
--- a/drivers/net/ethernet/mellanox/mlx4/mcg.c
+++ b/drivers/net/ethernet/mellanox/mlx4/mcg.c
@@ -506,7 +506,6 @@ static int remove_promisc_qp(struct mlx4_dev *dev, u8 port,
506 goto out_list; 506 goto out_list;
507 } 507 }
508 mgm = mailbox->buf; 508 mgm = mailbox->buf;
509 memset(mgm, 0, sizeof *mgm);
510 members_count = 0; 509 members_count = 0;
511 list_for_each_entry(dqp, &s_steer->promisc_qps[steer], list) 510 list_for_each_entry(dqp, &s_steer->promisc_qps[steer], list)
512 mgm->qp[members_count++] = cpu_to_be32(dqp->qpn & MGM_QPN_MASK); 511 mgm->qp[members_count++] = cpu_to_be32(dqp->qpn & MGM_QPN_MASK);
@@ -857,7 +856,6 @@ int mlx4_flow_attach(struct mlx4_dev *dev,
857 if (IS_ERR(mailbox)) 856 if (IS_ERR(mailbox))
858 return PTR_ERR(mailbox); 857 return PTR_ERR(mailbox);
859 858
860 memset(mailbox->buf, 0, sizeof(struct mlx4_net_trans_rule_hw_ctrl));
861 trans_rule_ctrl_to_hw(rule, mailbox->buf); 859 trans_rule_ctrl_to_hw(rule, mailbox->buf);
862 860
863 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl); 861 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
diff --git a/drivers/net/ethernet/mellanox/mlx4/mr.c b/drivers/net/ethernet/mellanox/mlx4/mr.c
index 63391a1a7f8c..b3ee9bafff5e 100644
--- a/drivers/net/ethernet/mellanox/mlx4/mr.c
+++ b/drivers/net/ethernet/mellanox/mlx4/mr.c
@@ -480,9 +480,6 @@ int mlx4_mr_enable(struct mlx4_dev *dev, struct mlx4_mr *mr)
480 goto err_table; 480 goto err_table;
481 } 481 }
482 mpt_entry = mailbox->buf; 482 mpt_entry = mailbox->buf;
483
484 memset(mpt_entry, 0, sizeof *mpt_entry);
485
486 mpt_entry->flags = cpu_to_be32(MLX4_MPT_FLAG_MIO | 483 mpt_entry->flags = cpu_to_be32(MLX4_MPT_FLAG_MIO |
487 MLX4_MPT_FLAG_REGION | 484 MLX4_MPT_FLAG_REGION |
488 mr->access); 485 mr->access);
@@ -695,8 +692,6 @@ int mlx4_mw_enable(struct mlx4_dev *dev, struct mlx4_mw *mw)
695 } 692 }
696 mpt_entry = mailbox->buf; 693 mpt_entry = mailbox->buf;
697 694
698 memset(mpt_entry, 0, sizeof(*mpt_entry));
699
700 /* Note that the MLX4_MPT_FLAG_REGION bit in mpt_entry->flags is turned 695 /* Note that the MLX4_MPT_FLAG_REGION bit in mpt_entry->flags is turned
701 * off, thus creating a memory window and not a memory region. 696 * off, thus creating a memory window and not a memory region.
702 */ 697 */
diff --git a/drivers/net/ethernet/mellanox/mlx4/port.c b/drivers/net/ethernet/mellanox/mlx4/port.c
index caaa15470395..97d342fa5032 100644
--- a/drivers/net/ethernet/mellanox/mlx4/port.c
+++ b/drivers/net/ethernet/mellanox/mlx4/port.c
@@ -469,8 +469,6 @@ int mlx4_get_port_ib_caps(struct mlx4_dev *dev, u8 port, __be32 *caps)
469 469
470 inbuf = inmailbox->buf; 470 inbuf = inmailbox->buf;
471 outbuf = outmailbox->buf; 471 outbuf = outmailbox->buf;
472 memset(inbuf, 0, 256);
473 memset(outbuf, 0, 256);
474 inbuf[0] = 1; 472 inbuf[0] = 1;
475 inbuf[1] = 1; 473 inbuf[1] = 1;
476 inbuf[2] = 1; 474 inbuf[2] = 1;
@@ -653,8 +651,6 @@ int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port, int pkey_tbl_sz)
653 if (IS_ERR(mailbox)) 651 if (IS_ERR(mailbox))
654 return PTR_ERR(mailbox); 652 return PTR_ERR(mailbox);
655 653
656 memset(mailbox->buf, 0, 256);
657
658 ((__be32 *) mailbox->buf)[1] = dev->caps.ib_port_def_cap[port]; 654 ((__be32 *) mailbox->buf)[1] = dev->caps.ib_port_def_cap[port];
659 655
660 if (pkey_tbl_sz >= 0 && mlx4_is_master(dev)) { 656 if (pkey_tbl_sz >= 0 && mlx4_is_master(dev)) {
@@ -692,8 +688,6 @@ int mlx4_SET_PORT_general(struct mlx4_dev *dev, u8 port, int mtu,
692 if (IS_ERR(mailbox)) 688 if (IS_ERR(mailbox))
693 return PTR_ERR(mailbox); 689 return PTR_ERR(mailbox);
694 context = mailbox->buf; 690 context = mailbox->buf;
695 memset(context, 0, sizeof *context);
696
697 context->flags = SET_PORT_GEN_ALL_VALID; 691 context->flags = SET_PORT_GEN_ALL_VALID;
698 context->mtu = cpu_to_be16(mtu); 692 context->mtu = cpu_to_be16(mtu);
699 context->pptx = (pptx * (!pfctx)) << 7; 693 context->pptx = (pptx * (!pfctx)) << 7;
@@ -727,8 +721,6 @@ int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn,
727 if (IS_ERR(mailbox)) 721 if (IS_ERR(mailbox))
728 return PTR_ERR(mailbox); 722 return PTR_ERR(mailbox);
729 context = mailbox->buf; 723 context = mailbox->buf;
730 memset(context, 0, sizeof *context);
731
732 context->base_qpn = cpu_to_be32(base_qpn); 724 context->base_qpn = cpu_to_be32(base_qpn);
733 context->n_mac = dev->caps.log_num_macs; 725 context->n_mac = dev->caps.log_num_macs;
734 context->promisc = cpu_to_be32(promisc << SET_PORT_PROMISC_SHIFT | 726 context->promisc = cpu_to_be32(promisc << SET_PORT_PROMISC_SHIFT |
@@ -761,8 +753,6 @@ int mlx4_SET_PORT_PRIO2TC(struct mlx4_dev *dev, u8 port, u8 *prio2tc)
761 if (IS_ERR(mailbox)) 753 if (IS_ERR(mailbox))
762 return PTR_ERR(mailbox); 754 return PTR_ERR(mailbox);
763 context = mailbox->buf; 755 context = mailbox->buf;
764 memset(context, 0, sizeof *context);
765
766 for (i = 0; i < MLX4_NUM_UP; i += 2) 756 for (i = 0; i < MLX4_NUM_UP; i += 2)
767 context->prio2tc[i >> 1] = prio2tc[i] << 4 | prio2tc[i + 1]; 757 context->prio2tc[i >> 1] = prio2tc[i] << 4 | prio2tc[i + 1];
768 758
@@ -788,7 +778,6 @@ int mlx4_SET_PORT_SCHEDULER(struct mlx4_dev *dev, u8 port, u8 *tc_tx_bw,
788 if (IS_ERR(mailbox)) 778 if (IS_ERR(mailbox))
789 return PTR_ERR(mailbox); 779 return PTR_ERR(mailbox);
790 context = mailbox->buf; 780 context = mailbox->buf;
791 memset(context, 0, sizeof *context);
792 781
793 for (i = 0; i < MLX4_NUM_TC; i++) { 782 for (i = 0; i < MLX4_NUM_TC; i++) {
794 struct mlx4_port_scheduler_tc_cfg_be *tc = &context->tc[i]; 783 struct mlx4_port_scheduler_tc_cfg_be *tc = &context->tc[i];
diff --git a/drivers/net/ethernet/mellanox/mlx4/srq.c b/drivers/net/ethernet/mellanox/mlx4/srq.c
index 9e08e35ce351..8fdf23753779 100644
--- a/drivers/net/ethernet/mellanox/mlx4/srq.c
+++ b/drivers/net/ethernet/mellanox/mlx4/srq.c
@@ -189,8 +189,6 @@ int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, u32 cqn, u16 xrcd,
189 } 189 }
190 190
191 srq_context = mailbox->buf; 191 srq_context = mailbox->buf;
192 memset(srq_context, 0, sizeof *srq_context);
193
194 srq_context->state_logsize_srqn = cpu_to_be32((ilog2(srq->max) << 24) | 192 srq_context->state_logsize_srqn = cpu_to_be32((ilog2(srq->max) << 24) |
195 srq->srqn); 193 srq->srqn);
196 srq_context->logstride = srq->wqe_shift - 4; 194 srq_context->logstride = srq->wqe_shift - 4;