[OMAP850] Changes to base IO subsystem, v2

Changes to base IO subsystem.

Signed-off-by: Zebediah C. McClure <zmc@lurian.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>

6 files changed, 212 insertions, 8 deletions

diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c
index 4c3e582f3d3c..3afe540149f7 100644
--- a/arch/arm/mach-omap1/io.c
+++ b/arch/arm/mach-omap1/io.c
@@ -52,6 +52,22 @@ static struct map_desc omap730_io_desc[] __initdata = {
 };
 #endif
 
+#ifdef CONFIG_ARCH_OMAP850
+static struct map_desc omap850_io_desc[] __initdata = {
+        {
+                .virtual        = OMAP850_DSP_BASE,
+                .pfn            = __phys_to_pfn(OMAP850_DSP_START),
+                .length         = OMAP850_DSP_SIZE,
+                .type           = MT_DEVICE
+        }, {
+                .virtual        = OMAP850_DSPREG_BASE,
+                .pfn            = __phys_to_pfn(OMAP850_DSPREG_START),
+                .length         = OMAP850_DSPREG_SIZE,
+                .type           = MT_DEVICE
+        }
+};
+#endif
+
 #ifdef CONFIG_ARCH_OMAP15XX
 static struct map_desc omap1510_io_desc[] __initdata = {
         {
@@ -109,6 +125,13 @@ void __init omap1_map_common_io(void)
                 iotable_init(omap730_io_desc, ARRAY_SIZE(omap730_io_desc));
         }
 #endif
+
+#ifdef CONFIG_ARCH_OMAP850
+        if (cpu_is_omap850()) {
+                iotable_init(omap850_io_desc, ARRAY_SIZE(omap850_io_desc));
+        }
+#endif
+
 #ifdef CONFIG_ARCH_OMAP15XX
         if (cpu_is_omap15xx()) {
                 iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc));
diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c
index 062c905c2ba6..721e0d9d8b1d 100644
--- a/arch/arm/mach-omap1/mux.c
+++ b/arch/arm/mach-omap1/mux.c
@@ -58,6 +58,25 @@ MUX_CFG_730("W17_730_USB_VBUSI",   2,   29,    0,   28,   0, 0)
 #define OMAP730_PINS_SZ         0
 #endif  /* CONFIG_ARCH_OMAP730 */
 
+#ifdef CONFIG_ARCH_OMAP850
+struct pin_config __initdata_or_module omap850_pins[] = {
+MUX_CFG_850("E2_850_KBR0",        12,   21,    0,   20,   1, 0)
+MUX_CFG_850("J7_850_KBR1",        12,   25,    0,   24,   1, 0)
+MUX_CFG_850("E1_850_KBR2",        12,   29,    0,   28,   1, 0)
+MUX_CFG_850("F3_850_KBR3",        13,    1,    0,    0,   1, 0)
+MUX_CFG_850("D2_850_KBR4",        13,    5,    0,    4,   1, 0)
+MUX_CFG_850("C2_850_KBC0",        13,    9,    0,    8,   1, 0)
+MUX_CFG_850("D3_850_KBC1",        13,   13,    0,   12,   1, 0)
+MUX_CFG_850("E4_850_KBC2",        13,   17,    0,   16,   1, 0)
+MUX_CFG_850("F4_850_KBC3",        13,   21,    0,   20,   1, 0)
+MUX_CFG_850("E3_850_KBC4",        13,   25,    0,   24,   1, 0)
+
+MUX_CFG_850("AA17_850_USB_DM",     2,   21,    0,   20,   0, 0)
+MUX_CFG_850("W16_850_USB_PU_EN",   2,   25,    0,   24,   0, 0)
+MUX_CFG_850("W17_850_USB_VBUSI",   2,   29,    0,   28,   0, 0)
+};
+#endif
+
 #if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)
 static struct pin_config __initdata_or_module omap1xxx_pins[] = {
 /*
@@ -419,6 +438,11 @@ int __init_or_module omap1_cfg_reg(const struct pin_config *cfg)
                         printk("      %s (0x%08x) = 0x%08x -> 0x%08x\n",
                                cfg->pull_name, cfg->pull_reg, pull_orig, pull);
         }
+
+#ifdef CONFIG_ARCH_OMAP850
+        omap_mux_register(omap850_pins, ARRAY_SIZE(omap850_pins));
+#endif
+
 #endif
 
 #ifdef CONFIG_OMAP_MUX_ERRORS
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c
index 0002084e0655..842090b148f1 100644
--- a/arch/arm/mach-omap1/serial.c
+++ b/arch/arm/mach-omap1/serial.c
@@ -121,6 +121,13 @@ void __init omap_serial_init(void)
                 serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2;
         }
 
+        if (cpu_is_omap850()) {
+                serial_platform_data[0].regshift = 0;
+                serial_platform_data[1].regshift = 0;
+                serial_platform_data[0].irq = INT_850_UART_MODEM_1;
+                serial_platform_data[1].irq = INT_850_UART_MODEM_IRDA_2;
+        }
+
         if (cpu_is_omap15xx()) {
                 serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16;
                 serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16;
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index f856a90b264e..d3fa41e3d8c5 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -81,6 +81,22 @@
 #define OMAP730_GPIO_INT_STATUS         0x14
 
 /*
+ * OMAP850 specific GPIO registers
+ */
+#define OMAP850_GPIO1_BASE              IO_ADDRESS(0xfffbc000)
+#define OMAP850_GPIO2_BASE              IO_ADDRESS(0xfffbc800)
+#define OMAP850_GPIO3_BASE              IO_ADDRESS(0xfffbd000)
+#define OMAP850_GPIO4_BASE              IO_ADDRESS(0xfffbd800)
+#define OMAP850_GPIO5_BASE              IO_ADDRESS(0xfffbe000)
+#define OMAP850_GPIO6_BASE              IO_ADDRESS(0xfffbe800)
+#define OMAP850_GPIO_DATA_INPUT         0x00
+#define OMAP850_GPIO_DATA_OUTPUT        0x04
+#define OMAP850_GPIO_DIR_CONTROL        0x08
+#define OMAP850_GPIO_INT_CONTROL        0x0c
+#define OMAP850_GPIO_INT_MASK           0x10
+#define OMAP850_GPIO_INT_STATUS         0x14
+
+/*
  * omap24xx specific GPIO registers
  */
 #define OMAP242X_GPIO1_BASE             IO_ADDRESS(0x48018000)
@@ -159,7 +175,8 @@ struct gpio_bank {
 #define METHOD_GPIO_1510        1
 #define METHOD_GPIO_1610        2
 #define METHOD_GPIO_730         3
-#define METHOD_GPIO_24XX        4
+#define METHOD_GPIO_850         4
+#define METHOD_GPIO_24XX        5
 
 #ifdef CONFIG_ARCH_OMAP16XX
 static struct gpio_bank gpio_bank_1610[5] = {
@@ -190,6 +207,19 @@ static struct gpio_bank gpio_bank_730[7] = {
 };
 #endif
 
+#ifdef CONFIG_ARCH_OMAP850
+static struct gpio_bank gpio_bank_850[7] = {
+        { OMAP_MPUIO_BASE,     INT_850_MPUIO,       IH_MPUIO_BASE,      METHOD_MPUIO },
+        { OMAP850_GPIO1_BASE,  INT_850_GPIO_BANK1,  IH_GPIO_BASE,       METHOD_GPIO_850 },
+        { OMAP850_GPIO2_BASE,  INT_850_GPIO_BANK2,  IH_GPIO_BASE + 32,  METHOD_GPIO_850 },
+        { OMAP850_GPIO3_BASE,  INT_850_GPIO_BANK3,  IH_GPIO_BASE + 64,  METHOD_GPIO_850 },
+        { OMAP850_GPIO4_BASE,  INT_850_GPIO_BANK4,  IH_GPIO_BASE + 96,  METHOD_GPIO_850 },
+        { OMAP850_GPIO5_BASE,  INT_850_GPIO_BANK5,  IH_GPIO_BASE + 128, METHOD_GPIO_850 },
+        { OMAP850_GPIO6_BASE,  INT_850_GPIO_BANK6,  IH_GPIO_BASE + 160, METHOD_GPIO_850 },
+};
+#endif
+
+
 #ifdef CONFIG_ARCH_OMAP24XX
 
 static struct gpio_bank gpio_bank_242x[4] = {
@@ -236,7 +266,7 @@ static inline struct gpio_bank *get_gpio_bank(int gpio)
                         return &gpio_bank[0];
                 return &gpio_bank[1 + (gpio >> 4)];
         }
-        if (cpu_is_omap730()) {
+        if (cpu_is_omap7xx()) {
                 if (OMAP_GPIO_IS_MPUIO(gpio))
                         return &gpio_bank[0];
                 return &gpio_bank[1 + (gpio >> 5)];
@@ -251,7 +281,7 @@ static inline struct gpio_bank *get_gpio_bank(int gpio)
 
 static inline int get_gpio_index(int gpio)
 {
-        if (cpu_is_omap730())
+        if (cpu_is_omap7xx())
                 return gpio & 0x1f;
         if (cpu_is_omap24xx())
                 return gpio & 0x1f;
@@ -273,7 +303,7 @@ static inline int gpio_valid(int gpio)
                 return 0;
         if ((cpu_is_omap16xx()) && gpio < 64)
                 return 0;
-        if (cpu_is_omap730() && gpio < 192)
+        if (cpu_is_omap7xx() && gpio < 192)
                 return 0;
         if (cpu_is_omap24xx() && gpio < 128)
                 return 0;
@@ -318,6 +348,11 @@ static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
                 reg += OMAP730_GPIO_DIR_CONTROL;
                 break;
 #endif
+#ifdef CONFIG_ARCH_OMAP850
+        case METHOD_GPIO_850:
+                reg += OMAP850_GPIO_DIR_CONTROL;
+                break;
+#endif
 #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
         case METHOD_GPIO_24XX:
                 reg += OMAP24XX_GPIO_OE;
@@ -380,6 +415,16 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
                         l &= ~(1 << gpio);
                 break;
 #endif
+#ifdef CONFIG_ARCH_OMAP850
+        case METHOD_GPIO_850:
+                reg += OMAP850_GPIO_DATA_OUTPUT;
+                l = __raw_readl(reg);
+                if (enable)
+                        l |= 1 << gpio;
+                else
+                        l &= ~(1 << gpio);
+                break;
+#endif
 #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
         case METHOD_GPIO_24XX:
                 if (enable)
@@ -426,6 +471,11 @@ static int __omap_get_gpio_datain(int gpio)
                 reg += OMAP730_GPIO_DATA_INPUT;
                 break;
 #endif
+#ifdef CONFIG_ARCH_OMAP850
+        case METHOD_GPIO_850:
+                reg += OMAP850_GPIO_DATA_INPUT;
+                break;
+#endif
 #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
         case METHOD_GPIO_24XX:
                 reg += OMAP24XX_GPIO_DATAIN;
@@ -598,6 +648,18 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
                         goto bad;
                 break;
 #endif
+#ifdef CONFIG_ARCH_OMAP850
+        case METHOD_GPIO_850:
+                reg += OMAP850_GPIO_INT_CONTROL;
+                l = __raw_readl(reg);
+                if (trigger & IRQ_TYPE_EDGE_RISING)
+                        l |= 1 << gpio;
+                else if (trigger & IRQ_TYPE_EDGE_FALLING)
+                        l &= ~(1 << gpio);
+                else
+                        goto bad;
+                break;
+#endif
 #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
         case METHOD_GPIO_24XX:
                 set_24xx_gpio_triggering(bank, gpio, trigger);
@@ -678,6 +740,11 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
                 reg += OMAP730_GPIO_INT_STATUS;
                 break;
 #endif
+#ifdef CONFIG_ARCH_OMAP850
+        case METHOD_GPIO_850:
+                reg += OMAP850_GPIO_INT_STATUS;
+                break;
+#endif
 #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
         case METHOD_GPIO_24XX:
                 reg += OMAP24XX_GPIO_IRQSTATUS1;
@@ -736,6 +803,13 @@ static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)
                 inv = 1;
                 break;
 #endif
+#ifdef CONFIG_ARCH_OMAP850
+        case METHOD_GPIO_850:
+                reg += OMAP850_GPIO_INT_MASK;
+                mask = 0xffffffff;
+                inv = 1;
+                break;
+#endif
 #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
         case METHOD_GPIO_24XX:
                 reg += OMAP24XX_GPIO_IRQENABLE1;
@@ -799,6 +873,16 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab
                         l |= gpio_mask;
                 break;
 #endif
+#ifdef CONFIG_ARCH_OMAP850
+        case METHOD_GPIO_850:
+                reg += OMAP850_GPIO_INT_MASK;
+                l = __raw_readl(reg);
+                if (enable)
+                        l &= ~(gpio_mask);
+                else
+                        l |= gpio_mask;
+                break;
+#endif
 #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
         case METHOD_GPIO_24XX:
                 if (enable)
@@ -983,6 +1067,10 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
         if (bank->method == METHOD_GPIO_730)
                 isr_reg = bank->base + OMAP730_GPIO_INT_STATUS;
 #endif
+#ifdef CONFIG_ARCH_OMAP850
+        if (bank->method == METHOD_GPIO_850)
+                isr_reg = bank->base + OMAP850_GPIO_INT_STATUS;
+#endif
 #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
         if (bank->method == METHOD_GPIO_24XX)
                 isr_reg = bank->base + OMAP24XX_GPIO_IRQSTATUS1;
@@ -1372,6 +1460,13 @@ static int __init _omap_gpio_init(void)
                 gpio_bank = gpio_bank_730;
         }
 #endif
+#ifdef CONFIG_ARCH_OMAP850
+        if (cpu_is_omap850()) {
+                printk(KERN_INFO "OMAP850 GPIO hardware\n");
+                gpio_bank_count = 7;
+                gpio_bank = gpio_bank_850;
+        }
+#endif
 
 #ifdef CONFIG_ARCH_OMAP24XX
         if (cpu_is_omap242x()) {
@@ -1420,7 +1515,7 @@ static int __init _omap_gpio_init(void)
                         __raw_writew(0xffff, bank->base + OMAP1610_GPIO_IRQSTATUS1);
                         __raw_writew(0x0014, bank->base + OMAP1610_GPIO_SYSCONFIG);
                 }
-                if (cpu_is_omap730() && bank->method == METHOD_GPIO_730) {
+                if (cpu_is_omap7xx() && bank->method == METHOD_GPIO_730) {
                         __raw_writel(0xffffffff, bank->base + OMAP730_GPIO_INT_MASK);
                         __raw_writel(0x00000000, bank->base + OMAP730_GPIO_INT_STATUS);
 
@@ -1743,6 +1838,9 @@ static int gpio_is_input(struct gpio_bank *bank, int mask)
         case METHOD_GPIO_730:
                 reg += OMAP730_GPIO_DIR_CONTROL;
                 break;
+        case METHOD_GPIO_850:
+                reg += OMAP850_GPIO_DIR_CONTROL;
+                break;
         case METHOD_GPIO_24XX:
                 reg += OMAP24XX_GPIO_OE;
                 break;
@@ -1762,7 +1860,8 @@ static int dbg_gpio_show(struct seq_file *s, void *unused)
 
                 if (bank_is_mpuio(bank))
                         gpio = OMAP_MPUIO(0);
-                else if (cpu_class_is_omap2() || cpu_is_omap730())
+                else if (cpu_class_is_omap2() || cpu_is_omap730() ||
+                                cpu_is_omap850())
                         bankwidth = 32;
 
                 for (j = 0; j < bankwidth; j++, gpio++, mask <<= 1) {
diff --git a/arch/arm/plat-omap/include/mach/gpio.h b/arch/arm/plat-omap/include/mach/gpio.h
index 8d9dfe314387..2b22a8799bc6 100644
--- a/arch/arm/plat-omap/include/mach/gpio.h
+++ b/arch/arm/plat-omap/include/mach/gpio.h
@@ -31,7 +31,8 @@
 
 #define OMAP_MPUIO_BASE                 0xfffb5000
 
-#ifdef CONFIG_ARCH_OMAP730
+#if (defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850))
+
 #define OMAP_MPUIO_INPUT_LATCH          0x00
 #define OMAP_MPUIO_OUTPUT               0x02
 #define OMAP_MPUIO_IO_CNTL              0x04
diff --git a/arch/arm/plat-omap/include/mach/mux.h b/arch/arm/plat-omap/include/mach/mux.h
index f4362b8682c7..6a02f8f4c8bf 100644
--- a/arch/arm/plat-omap/include/mach/mux.h
+++ b/arch/arm/plat-omap/include/mach/mux.h
@@ -61,6 +61,16 @@
                                         .pull_bit = bit, \
                                         .pull_val = status,
 
+#define MUX_REG_850(reg, mode_offset, mode) .mux_reg_name = "OMAP850_IO_CONF_"#reg, \
+                                        .mux_reg = OMAP850_IO_CONF_##reg, \
+                                        .mask_offset = mode_offset, \
+                                        .mask = mode,
+
+#define PULL_REG_850(reg, bit, status)  .pull_name = "OMAP850_IO_CONF_"#reg, \
+                                        .pull_reg = OMAP850_IO_CONF_##reg, \
+                                        .pull_bit = bit, \
+                                        .pull_val = status,
+
 #else
 
 #define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, \
@@ -83,6 +93,15 @@
                                         .pull_bit = bit, \
                                         .pull_val = status,
 
+#define MUX_REG_850(reg, mode_offset, mode) \
+                                        .mux_reg = OMAP850_IO_CONF_##reg, \
+                                        .mask_offset = mode_offset, \
+                                        .mask = mode,
+
+#define PULL_REG_850(reg, bit, status)  .pull_reg = OMAP850_IO_CONF_##reg, \
+                                        .pull_bit = bit, \
+                                        .pull_val = status,
+
 #endif /* CONFIG_OMAP_MUX_DEBUG */
 
 #define MUX_CFG(desc, mux_reg, mode_offset, mode,       \
@@ -98,7 +117,7 @@
 
 
 /*
- * OMAP730 has a slightly different config for the pin mux.
+ * OMAP730/850 has a slightly different config for the pin mux.
  * - config regs are the OMAP730_IO_CONF_x regs (see omap730.h) regs and
  *   not the FUNC_MUX_CTRL_x regs from hardware.h
  * - for pull-up/down, only has one enable bit which is is in the same register
@@ -114,6 +133,17 @@
         PU_PD_REG(NA, 0)                \
 },
 
+#define MUX_CFG_850(desc, mux_reg, mode_offset, mode,   \
+                   pull_bit, pull_status, debug_status)\
+{                                                       \
+        .name =  desc,                                  \
+        .debug = debug_status,                          \
+        MUX_REG_850(mux_reg, mode_offset, mode)         \
+        PULL_REG_850(mux_reg, pull_bit, pull_status)    \
+        PU_PD_REG(NA, 0)                \
+},
+
+
 #define MUX_CFG_24XX(desc, reg_offset, mode,                    \
                                 pull_en, pull_mode, dbg)        \
 {                                                               \
@@ -221,6 +251,26 @@ enum omap730_index {
         W17_730_USB_VBUSI,
 };
 
+enum omap850_index {
+        /* OMAP 850 keyboard */
+        E2_850_KBR0,
+        J7_850_KBR1,
+        E1_850_KBR2,
+        F3_850_KBR3,
+        D2_850_KBR4,
+        C2_850_KBC0,
+        D3_850_KBC1,
+        E4_850_KBC2,
+        F4_850_KBC3,
+        E3_850_KBC4,
+
+        /* USB */
+        AA17_850_USB_DM,
+        W16_850_USB_PU_EN,
+        W17_850_USB_VBUSI,
+};
+
+
 enum omap1xxx_index {
         /* UART1 (BT_UART_GATING)*/
         UART1_TX = 0,