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authorJason Cooper <jason@lakedaemon.net>2014-03-01 02:03:00 -0500
committerJason Cooper <jason@lakedaemon.net>2014-03-01 02:03:00 -0500
commit55387764c4e8c2b0657acbdedd8df465eb856f82 (patch)
tree422381a0f0e635a5315b6909751529887b2777d1
parent38dbfb59d1175ef458d006556061adeaa8751b72 (diff)
parent78c2c3d3dad07cfdc8f9d9bc3dff03a3ec1acfd2 (diff)
Merge tag 'tags/for-mvebu-pinctrl-cleanup' into mvebu/pinctrl
Sign for-mvebu/pinctrl-cleanup
-rw-r--r--drivers/pinctrl/mvebu/pinctrl-armada-370.c20
-rw-r--r--drivers/pinctrl/mvebu/pinctrl-armada-xp.c24
-rw-r--r--drivers/pinctrl/mvebu/pinctrl-dove.c133
-rw-r--r--drivers/pinctrl/mvebu/pinctrl-kirkwood.c25
-rw-r--r--drivers/pinctrl/mvebu/pinctrl-mvebu.c122
-rw-r--r--drivers/pinctrl/mvebu/pinctrl-mvebu.h55
6 files changed, 193 insertions, 186 deletions
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-370.c b/drivers/pinctrl/mvebu/pinctrl-armada-370.c
index ae1f760cbdd2..670e5b01c678 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-370.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-370.c
@@ -23,6 +23,18 @@
23 23
24#include "pinctrl-mvebu.h" 24#include "pinctrl-mvebu.h"
25 25
26static void __iomem *mpp_base;
27
28static int armada_370_mpp_ctrl_get(unsigned pid, unsigned long *config)
29{
30 return default_mpp_ctrl_get(mpp_base, pid, config);
31}
32
33static int armada_370_mpp_ctrl_set(unsigned pid, unsigned long config)
34{
35 return default_mpp_ctrl_set(mpp_base, pid, config);
36}
37
26static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = { 38static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
27 MPP_MODE(0, 39 MPP_MODE(0,
28 MPP_FUNCTION(0x0, "gpio", NULL), 40 MPP_FUNCTION(0x0, "gpio", NULL),
@@ -373,7 +385,7 @@ static struct of_device_id armada_370_pinctrl_of_match[] = {
373}; 385};
374 386
375static struct mvebu_mpp_ctrl mv88f6710_mpp_controls[] = { 387static struct mvebu_mpp_ctrl mv88f6710_mpp_controls[] = {
376 MPP_REG_CTRL(0, 65), 388 MPP_FUNC_CTRL(0, 65, NULL, armada_370_mpp_ctrl),
377}; 389};
378 390
379static struct pinctrl_gpio_range mv88f6710_mpp_gpio_ranges[] = { 391static struct pinctrl_gpio_range mv88f6710_mpp_gpio_ranges[] = {
@@ -385,6 +397,12 @@ static struct pinctrl_gpio_range mv88f6710_mpp_gpio_ranges[] = {
385static int armada_370_pinctrl_probe(struct platform_device *pdev) 397static int armada_370_pinctrl_probe(struct platform_device *pdev)
386{ 398{
387 struct mvebu_pinctrl_soc_info *soc = &armada_370_pinctrl_info; 399 struct mvebu_pinctrl_soc_info *soc = &armada_370_pinctrl_info;
400 struct resource *res;
401
402 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
403 mpp_base = devm_ioremap_resource(&pdev->dev, res);
404 if (IS_ERR(mpp_base))
405 return PTR_ERR(mpp_base);
388 406
389 soc->variant = 0; /* no variants for Armada 370 */ 407 soc->variant = 0; /* no variants for Armada 370 */
390 soc->controls = mv88f6710_mpp_controls; 408 soc->controls = mv88f6710_mpp_controls;
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-xp.c b/drivers/pinctrl/mvebu/pinctrl-armada-xp.c
index 843a51f9d129..de311129f7a0 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-xp.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-xp.c
@@ -33,6 +33,18 @@
33 33
34#include "pinctrl-mvebu.h" 34#include "pinctrl-mvebu.h"
35 35
36static void __iomem *mpp_base;
37
38static int armada_xp_mpp_ctrl_get(unsigned pid, unsigned long *config)
39{
40 return default_mpp_ctrl_get(mpp_base, pid, config);
41}
42
43static int armada_xp_mpp_ctrl_set(unsigned pid, unsigned long config)
44{
45 return default_mpp_ctrl_set(mpp_base, pid, config);
46}
47
36enum armada_xp_variant { 48enum armada_xp_variant {
37 V_MV78230 = BIT(0), 49 V_MV78230 = BIT(0),
38 V_MV78260 = BIT(1), 50 V_MV78260 = BIT(1),
@@ -366,7 +378,7 @@ static struct of_device_id armada_xp_pinctrl_of_match[] = {
366}; 378};
367 379
368static struct mvebu_mpp_ctrl mv78230_mpp_controls[] = { 380static struct mvebu_mpp_ctrl mv78230_mpp_controls[] = {
369 MPP_REG_CTRL(0, 48), 381 MPP_FUNC_CTRL(0, 48, NULL, armada_xp_mpp_ctrl),
370}; 382};
371 383
372static struct pinctrl_gpio_range mv78230_mpp_gpio_ranges[] = { 384static struct pinctrl_gpio_range mv78230_mpp_gpio_ranges[] = {
@@ -375,7 +387,7 @@ static struct pinctrl_gpio_range mv78230_mpp_gpio_ranges[] = {
375}; 387};
376 388
377static struct mvebu_mpp_ctrl mv78260_mpp_controls[] = { 389static struct mvebu_mpp_ctrl mv78260_mpp_controls[] = {
378 MPP_REG_CTRL(0, 66), 390 MPP_FUNC_CTRL(0, 66, NULL, armada_xp_mpp_ctrl),
379}; 391};
380 392
381static struct pinctrl_gpio_range mv78260_mpp_gpio_ranges[] = { 393static struct pinctrl_gpio_range mv78260_mpp_gpio_ranges[] = {
@@ -385,7 +397,7 @@ static struct pinctrl_gpio_range mv78260_mpp_gpio_ranges[] = {
385}; 397};
386 398
387static struct mvebu_mpp_ctrl mv78460_mpp_controls[] = { 399static struct mvebu_mpp_ctrl mv78460_mpp_controls[] = {
388 MPP_REG_CTRL(0, 66), 400 MPP_FUNC_CTRL(0, 66, NULL, armada_xp_mpp_ctrl),
389}; 401};
390 402
391static struct pinctrl_gpio_range mv78460_mpp_gpio_ranges[] = { 403static struct pinctrl_gpio_range mv78460_mpp_gpio_ranges[] = {
@@ -399,10 +411,16 @@ static int armada_xp_pinctrl_probe(struct platform_device *pdev)
399 struct mvebu_pinctrl_soc_info *soc = &armada_xp_pinctrl_info; 411 struct mvebu_pinctrl_soc_info *soc = &armada_xp_pinctrl_info;
400 const struct of_device_id *match = 412 const struct of_device_id *match =
401 of_match_device(armada_xp_pinctrl_of_match, &pdev->dev); 413 of_match_device(armada_xp_pinctrl_of_match, &pdev->dev);
414 struct resource *res;
402 415
403 if (!match) 416 if (!match)
404 return -ENODEV; 417 return -ENODEV;
405 418
419 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
420 mpp_base = devm_ioremap_resource(&pdev->dev, res);
421 if (IS_ERR(mpp_base))
422 return PTR_ERR(mpp_base);
423
406 soc->variant = (unsigned) match->data & 0xff; 424 soc->variant = (unsigned) match->data & 0xff;
407 425
408 switch (soc->variant) { 426 switch (soc->variant) {
diff --git a/drivers/pinctrl/mvebu/pinctrl-dove.c b/drivers/pinctrl/mvebu/pinctrl-dove.c
index 47268393af34..da9ca26360fd 100644
--- a/drivers/pinctrl/mvebu/pinctrl-dove.c
+++ b/drivers/pinctrl/mvebu/pinctrl-dove.c
@@ -49,62 +49,64 @@
49#define DOVE_SD1_GPIO_SEL BIT(1) 49#define DOVE_SD1_GPIO_SEL BIT(1)
50#define DOVE_SD0_GPIO_SEL BIT(0) 50#define DOVE_SD0_GPIO_SEL BIT(0)
51 51
52#define MPPS_PER_REG 8
53#define MPP_BITS 4
54#define MPP_MASK 0xf
55
56#define CONFIG_PMU BIT(4) 52#define CONFIG_PMU BIT(4)
57 53
58static int dove_pmu_mpp_ctrl_get(struct mvebu_mpp_ctrl *ctrl, 54static void __iomem *mpp_base;
59 unsigned long *config) 55
56static int dove_mpp_ctrl_get(unsigned pid, unsigned long *config)
57{
58 return default_mpp_ctrl_get(mpp_base, pid, config);
59}
60
61static int dove_mpp_ctrl_set(unsigned pid, unsigned long config)
62{
63 return default_mpp_ctrl_set(mpp_base, pid, config);
64}
65
66static int dove_pmu_mpp_ctrl_get(unsigned pid, unsigned long *config)
60{ 67{
61 unsigned off = (ctrl->pid / MPPS_PER_REG) * MPP_BITS; 68 unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
62 unsigned shift = (ctrl->pid % MPPS_PER_REG) * MPP_BITS; 69 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
63 unsigned long pmu = readl(DOVE_PMU_MPP_GENERAL_CTRL); 70 unsigned long pmu = readl(DOVE_PMU_MPP_GENERAL_CTRL);
64 unsigned long func; 71 unsigned long func;
65 72
66 if (pmu & (1 << ctrl->pid)) { 73 if ((pmu & BIT(pid)) == 0)
67 func = readl(DOVE_PMU_SIGNAL_SELECT_0 + off); 74 return default_mpp_ctrl_get(mpp_base, pid, config);
68 *config = (func >> shift) & MPP_MASK; 75
69 *config |= CONFIG_PMU; 76 func = readl(DOVE_PMU_SIGNAL_SELECT_0 + off);
70 } else { 77 *config = (func >> shift) & MVEBU_MPP_MASK;
71 func = readl(DOVE_MPP_VIRT_BASE + off); 78 *config |= CONFIG_PMU;
72 *config = (func >> shift) & MPP_MASK; 79
73 }
74 return 0; 80 return 0;
75} 81}
76 82
77static int dove_pmu_mpp_ctrl_set(struct mvebu_mpp_ctrl *ctrl, 83static int dove_pmu_mpp_ctrl_set(unsigned pid, unsigned long config)
78 unsigned long config)
79{ 84{
80 unsigned off = (ctrl->pid / MPPS_PER_REG) * MPP_BITS; 85 unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
81 unsigned shift = (ctrl->pid % MPPS_PER_REG) * MPP_BITS; 86 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
82 unsigned long pmu = readl(DOVE_PMU_MPP_GENERAL_CTRL); 87 unsigned long pmu = readl(DOVE_PMU_MPP_GENERAL_CTRL);
83 unsigned long func; 88 unsigned long func;
84 89
85 if (config & CONFIG_PMU) { 90 if ((config & CONFIG_PMU) == 0) {
86 writel(pmu | (1 << ctrl->pid), DOVE_PMU_MPP_GENERAL_CTRL); 91 writel(pmu & ~BIT(pid), DOVE_PMU_MPP_GENERAL_CTRL);
87 func = readl(DOVE_PMU_SIGNAL_SELECT_0 + off); 92 return default_mpp_ctrl_set(mpp_base, pid, config);
88 func &= ~(MPP_MASK << shift);
89 func |= (config & MPP_MASK) << shift;
90 writel(func, DOVE_PMU_SIGNAL_SELECT_0 + off);
91 } else {
92 writel(pmu & ~(1 << ctrl->pid), DOVE_PMU_MPP_GENERAL_CTRL);
93 func = readl(DOVE_MPP_VIRT_BASE + off);
94 func &= ~(MPP_MASK << shift);
95 func |= (config & MPP_MASK) << shift;
96 writel(func, DOVE_MPP_VIRT_BASE + off);
97 } 93 }
94
95 writel(pmu | BIT(pid), DOVE_PMU_MPP_GENERAL_CTRL);
96 func = readl(DOVE_PMU_SIGNAL_SELECT_0 + off);
97 func &= ~(MVEBU_MPP_MASK << shift);
98 func |= (config & MVEBU_MPP_MASK) << shift;
99 writel(func, DOVE_PMU_SIGNAL_SELECT_0 + off);
100
98 return 0; 101 return 0;
99} 102}
100 103
101static int dove_mpp4_ctrl_get(struct mvebu_mpp_ctrl *ctrl, 104static int dove_mpp4_ctrl_get(unsigned pid, unsigned long *config)
102 unsigned long *config)
103{ 105{
104 unsigned long mpp4 = readl(DOVE_MPP_CTRL4_VIRT_BASE); 106 unsigned long mpp4 = readl(DOVE_MPP_CTRL4_VIRT_BASE);
105 unsigned long mask; 107 unsigned long mask;
106 108
107 switch (ctrl->pid) { 109 switch (pid) {
108 case 24: /* mpp_camera */ 110 case 24: /* mpp_camera */
109 mask = DOVE_CAM_GPIO_SEL; 111 mask = DOVE_CAM_GPIO_SEL;
110 break; 112 break;
@@ -129,13 +131,12 @@ static int dove_mpp4_ctrl_get(struct mvebu_mpp_ctrl *ctrl,
129 return 0; 131 return 0;
130} 132}
131 133
132static int dove_mpp4_ctrl_set(struct mvebu_mpp_ctrl *ctrl, 134static int dove_mpp4_ctrl_set(unsigned pid, unsigned long config)
133 unsigned long config)
134{ 135{
135 unsigned long mpp4 = readl(DOVE_MPP_CTRL4_VIRT_BASE); 136 unsigned long mpp4 = readl(DOVE_MPP_CTRL4_VIRT_BASE);
136 unsigned long mask; 137 unsigned long mask;
137 138
138 switch (ctrl->pid) { 139 switch (pid) {
139 case 24: /* mpp_camera */ 140 case 24: /* mpp_camera */
140 mask = DOVE_CAM_GPIO_SEL; 141 mask = DOVE_CAM_GPIO_SEL;
141 break; 142 break;
@@ -164,8 +165,7 @@ static int dove_mpp4_ctrl_set(struct mvebu_mpp_ctrl *ctrl,
164 return 0; 165 return 0;
165} 166}
166 167
167static int dove_nand_ctrl_get(struct mvebu_mpp_ctrl *ctrl, 168static int dove_nand_ctrl_get(unsigned pid, unsigned long *config)
168 unsigned long *config)
169{ 169{
170 unsigned long gmpp = readl(DOVE_MPP_GENERAL_VIRT_BASE); 170 unsigned long gmpp = readl(DOVE_MPP_GENERAL_VIRT_BASE);
171 171
@@ -174,8 +174,7 @@ static int dove_nand_ctrl_get(struct mvebu_mpp_ctrl *ctrl,
174 return 0; 174 return 0;
175} 175}
176 176
177static int dove_nand_ctrl_set(struct mvebu_mpp_ctrl *ctrl, 177static int dove_nand_ctrl_set(unsigned pid, unsigned long config)
178 unsigned long config)
179{ 178{
180 unsigned long gmpp = readl(DOVE_MPP_GENERAL_VIRT_BASE); 179 unsigned long gmpp = readl(DOVE_MPP_GENERAL_VIRT_BASE);
181 180
@@ -188,8 +187,7 @@ static int dove_nand_ctrl_set(struct mvebu_mpp_ctrl *ctrl,
188 return 0; 187 return 0;
189} 188}
190 189
191static int dove_audio0_ctrl_get(struct mvebu_mpp_ctrl *ctrl, 190static int dove_audio0_ctrl_get(unsigned pid, unsigned long *config)
192 unsigned long *config)
193{ 191{
194 unsigned long pmu = readl(DOVE_PMU_MPP_GENERAL_CTRL); 192 unsigned long pmu = readl(DOVE_PMU_MPP_GENERAL_CTRL);
195 193
@@ -198,8 +196,7 @@ static int dove_audio0_ctrl_get(struct mvebu_mpp_ctrl *ctrl,
198 return 0; 196 return 0;
199} 197}
200 198
201static int dove_audio0_ctrl_set(struct mvebu_mpp_ctrl *ctrl, 199static int dove_audio0_ctrl_set(unsigned pid, unsigned long config)
202 unsigned long config)
203{ 200{
204 unsigned long pmu = readl(DOVE_PMU_MPP_GENERAL_CTRL); 201 unsigned long pmu = readl(DOVE_PMU_MPP_GENERAL_CTRL);
205 202
@@ -211,8 +208,7 @@ static int dove_audio0_ctrl_set(struct mvebu_mpp_ctrl *ctrl,
211 return 0; 208 return 0;
212} 209}
213 210
214static int dove_audio1_ctrl_get(struct mvebu_mpp_ctrl *ctrl, 211static int dove_audio1_ctrl_get(unsigned pid, unsigned long *config)
215 unsigned long *config)
216{ 212{
217 unsigned long mpp4 = readl(DOVE_MPP_CTRL4_VIRT_BASE); 213 unsigned long mpp4 = readl(DOVE_MPP_CTRL4_VIRT_BASE);
218 unsigned long sspc1 = readl(DOVE_SSP_CTRL_STATUS_1); 214 unsigned long sspc1 = readl(DOVE_SSP_CTRL_STATUS_1);
@@ -238,8 +234,7 @@ static int dove_audio1_ctrl_get(struct mvebu_mpp_ctrl *ctrl,
238 return 0; 234 return 0;
239} 235}
240 236
241static int dove_audio1_ctrl_set(struct mvebu_mpp_ctrl *ctrl, 237static int dove_audio1_ctrl_set(unsigned pid, unsigned long config)
242 unsigned long config)
243{ 238{
244 unsigned long mpp4 = readl(DOVE_MPP_CTRL4_VIRT_BASE); 239 unsigned long mpp4 = readl(DOVE_MPP_CTRL4_VIRT_BASE);
245 unsigned long sspc1 = readl(DOVE_SSP_CTRL_STATUS_1); 240 unsigned long sspc1 = readl(DOVE_SSP_CTRL_STATUS_1);
@@ -276,11 +271,11 @@ static int dove_audio1_ctrl_set(struct mvebu_mpp_ctrl *ctrl,
276 * break other functions. If you require all mpps as gpio 271 * break other functions. If you require all mpps as gpio
277 * enforce gpio setting by pinctrl mapping. 272 * enforce gpio setting by pinctrl mapping.
278 */ 273 */
279static int dove_audio1_ctrl_gpio_req(struct mvebu_mpp_ctrl *ctrl, u8 pid) 274static int dove_audio1_ctrl_gpio_req(unsigned pid)
280{ 275{
281 unsigned long config; 276 unsigned long config;
282 277
283 dove_audio1_ctrl_get(ctrl, &config); 278 dove_audio1_ctrl_get(pid, &config);
284 279
285 switch (config) { 280 switch (config) {
286 case 0x02: /* i2s1 : gpio[56:57] */ 281 case 0x02: /* i2s1 : gpio[56:57] */
@@ -303,16 +298,14 @@ static int dove_audio1_ctrl_gpio_req(struct mvebu_mpp_ctrl *ctrl, u8 pid)
303} 298}
304 299
305/* mpp[52:57] has gpio pins capable of in and out */ 300/* mpp[52:57] has gpio pins capable of in and out */
306static int dove_audio1_ctrl_gpio_dir(struct mvebu_mpp_ctrl *ctrl, u8 pid, 301static int dove_audio1_ctrl_gpio_dir(unsigned pid, bool input)
307 bool input)
308{ 302{
309 if (pid < 52 || pid > 57) 303 if (pid < 52 || pid > 57)
310 return -ENOTSUPP; 304 return -ENOTSUPP;
311 return 0; 305 return 0;
312} 306}
313 307
314static int dove_twsi_ctrl_get(struct mvebu_mpp_ctrl *ctrl, 308static int dove_twsi_ctrl_get(unsigned pid, unsigned long *config)
315 unsigned long *config)
316{ 309{
317 unsigned long gcfg1 = readl(DOVE_GLOBAL_CONFIG_1); 310 unsigned long gcfg1 = readl(DOVE_GLOBAL_CONFIG_1);
318 unsigned long gcfg2 = readl(DOVE_GLOBAL_CONFIG_2); 311 unsigned long gcfg2 = readl(DOVE_GLOBAL_CONFIG_2);
@@ -328,8 +321,7 @@ static int dove_twsi_ctrl_get(struct mvebu_mpp_ctrl *ctrl,
328 return 0; 321 return 0;
329} 322}
330 323
331static int dove_twsi_ctrl_set(struct mvebu_mpp_ctrl *ctrl, 324static int dove_twsi_ctrl_set(unsigned pid, unsigned long config)
332 unsigned long config)
333{ 325{
334 unsigned long gcfg1 = readl(DOVE_GLOBAL_CONFIG_1); 326 unsigned long gcfg1 = readl(DOVE_GLOBAL_CONFIG_1);
335 unsigned long gcfg2 = readl(DOVE_GLOBAL_CONFIG_2); 327 unsigned long gcfg2 = readl(DOVE_GLOBAL_CONFIG_2);
@@ -356,23 +348,8 @@ static int dove_twsi_ctrl_set(struct mvebu_mpp_ctrl *ctrl,
356} 348}
357 349
358static struct mvebu_mpp_ctrl dove_mpp_controls[] = { 350static struct mvebu_mpp_ctrl dove_mpp_controls[] = {
359 MPP_FUNC_CTRL(0, 0, "mpp0", dove_pmu_mpp_ctrl), 351 MPP_FUNC_CTRL(0, 15, NULL, dove_pmu_mpp_ctrl),
360 MPP_FUNC_CTRL(1, 1, "mpp1", dove_pmu_mpp_ctrl), 352 MPP_FUNC_CTRL(16, 23, NULL, dove_mpp_ctrl),
361 MPP_FUNC_CTRL(2, 2, "mpp2", dove_pmu_mpp_ctrl),
362 MPP_FUNC_CTRL(3, 3, "mpp3", dove_pmu_mpp_ctrl),
363 MPP_FUNC_CTRL(4, 4, "mpp4", dove_pmu_mpp_ctrl),
364 MPP_FUNC_CTRL(5, 5, "mpp5", dove_pmu_mpp_ctrl),
365 MPP_FUNC_CTRL(6, 6, "mpp6", dove_pmu_mpp_ctrl),
366 MPP_FUNC_CTRL(7, 7, "mpp7", dove_pmu_mpp_ctrl),
367 MPP_FUNC_CTRL(8, 8, "mpp8", dove_pmu_mpp_ctrl),
368 MPP_FUNC_CTRL(9, 9, "mpp9", dove_pmu_mpp_ctrl),
369 MPP_FUNC_CTRL(10, 10, "mpp10", dove_pmu_mpp_ctrl),
370 MPP_FUNC_CTRL(11, 11, "mpp11", dove_pmu_mpp_ctrl),
371 MPP_FUNC_CTRL(12, 12, "mpp12", dove_pmu_mpp_ctrl),
372 MPP_FUNC_CTRL(13, 13, "mpp13", dove_pmu_mpp_ctrl),
373 MPP_FUNC_CTRL(14, 14, "mpp14", dove_pmu_mpp_ctrl),
374 MPP_FUNC_CTRL(15, 15, "mpp15", dove_pmu_mpp_ctrl),
375 MPP_REG_CTRL(16, 23),
376 MPP_FUNC_CTRL(24, 39, "mpp_camera", dove_mpp4_ctrl), 353 MPP_FUNC_CTRL(24, 39, "mpp_camera", dove_mpp4_ctrl),
377 MPP_FUNC_CTRL(40, 45, "mpp_sdio0", dove_mpp4_ctrl), 354 MPP_FUNC_CTRL(40, 45, "mpp_sdio0", dove_mpp4_ctrl),
378 MPP_FUNC_CTRL(46, 51, "mpp_sdio1", dove_mpp4_ctrl), 355 MPP_FUNC_CTRL(46, 51, "mpp_sdio1", dove_mpp4_ctrl),
@@ -774,6 +751,7 @@ static struct of_device_id dove_pinctrl_of_match[] = {
774 751
775static int dove_pinctrl_probe(struct platform_device *pdev) 752static int dove_pinctrl_probe(struct platform_device *pdev)
776{ 753{
754 struct resource *res;
777 const struct of_device_id *match = 755 const struct of_device_id *match =
778 of_match_device(dove_pinctrl_of_match, &pdev->dev); 756 of_match_device(dove_pinctrl_of_match, &pdev->dev);
779 pdev->dev.platform_data = (void *)match->data; 757 pdev->dev.platform_data = (void *)match->data;
@@ -789,6 +767,11 @@ static int dove_pinctrl_probe(struct platform_device *pdev)
789 } 767 }
790 clk_prepare_enable(clk); 768 clk_prepare_enable(clk);
791 769
770 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
771 mpp_base = devm_ioremap_resource(&pdev->dev, res);
772 if (IS_ERR(mpp_base))
773 return PTR_ERR(mpp_base);
774
792 return mvebu_pinctrl_probe(pdev); 775 return mvebu_pinctrl_probe(pdev);
793} 776}
794 777
diff --git a/drivers/pinctrl/mvebu/pinctrl-kirkwood.c b/drivers/pinctrl/mvebu/pinctrl-kirkwood.c
index 6b504b5935a5..0d0211a1a0b0 100644
--- a/drivers/pinctrl/mvebu/pinctrl-kirkwood.c
+++ b/drivers/pinctrl/mvebu/pinctrl-kirkwood.c
@@ -21,6 +21,18 @@
21 21
22#include "pinctrl-mvebu.h" 22#include "pinctrl-mvebu.h"
23 23
24static void __iomem *mpp_base;
25
26static int kirkwood_mpp_ctrl_get(unsigned pid, unsigned long *config)
27{
28 return default_mpp_ctrl_get(mpp_base, pid, config);
29}
30
31static int kirkwood_mpp_ctrl_set(unsigned pid, unsigned long config)
32{
33 return default_mpp_ctrl_set(mpp_base, pid, config);
34}
35
24#define V(f6180, f6190, f6192, f6281, f6282, dx4122) \ 36#define V(f6180, f6190, f6192, f6281, f6282, dx4122) \
25 ((f6180 << 0) | (f6190 << 1) | (f6192 << 2) | \ 37 ((f6180 << 0) | (f6190 << 1) | (f6192 << 2) | \
26 (f6281 << 3) | (f6282 << 4) | (dx4122 << 5)) 38 (f6281 << 3) | (f6282 << 4) | (dx4122 << 5))
@@ -359,7 +371,7 @@ static struct mvebu_mpp_mode mv88f6xxx_mpp_modes[] = {
359}; 371};
360 372
361static struct mvebu_mpp_ctrl mv88f6180_mpp_controls[] = { 373static struct mvebu_mpp_ctrl mv88f6180_mpp_controls[] = {
362 MPP_REG_CTRL(0, 29), 374 MPP_FUNC_CTRL(0, 29, NULL, kirkwood_mpp_ctrl),
363}; 375};
364 376
365static struct pinctrl_gpio_range mv88f6180_gpio_ranges[] = { 377static struct pinctrl_gpio_range mv88f6180_gpio_ranges[] = {
@@ -367,7 +379,7 @@ static struct pinctrl_gpio_range mv88f6180_gpio_ranges[] = {
367}; 379};
368 380
369static struct mvebu_mpp_ctrl mv88f619x_mpp_controls[] = { 381static struct mvebu_mpp_ctrl mv88f619x_mpp_controls[] = {
370 MPP_REG_CTRL(0, 35), 382 MPP_FUNC_CTRL(0, 35, NULL, kirkwood_mpp_ctrl),
371}; 383};
372 384
373static struct pinctrl_gpio_range mv88f619x_gpio_ranges[] = { 385static struct pinctrl_gpio_range mv88f619x_gpio_ranges[] = {
@@ -376,7 +388,7 @@ static struct pinctrl_gpio_range mv88f619x_gpio_ranges[] = {
376}; 388};
377 389
378static struct mvebu_mpp_ctrl mv88f628x_mpp_controls[] = { 390static struct mvebu_mpp_ctrl mv88f628x_mpp_controls[] = {
379 MPP_REG_CTRL(0, 49), 391 MPP_FUNC_CTRL(0, 49, NULL, kirkwood_mpp_ctrl),
380}; 392};
381 393
382static struct pinctrl_gpio_range mv88f628x_gpio_ranges[] = { 394static struct pinctrl_gpio_range mv88f628x_gpio_ranges[] = {
@@ -456,9 +468,16 @@ static struct of_device_id kirkwood_pinctrl_of_match[] = {
456 468
457static int kirkwood_pinctrl_probe(struct platform_device *pdev) 469static int kirkwood_pinctrl_probe(struct platform_device *pdev)
458{ 470{
471 struct resource *res;
459 const struct of_device_id *match = 472 const struct of_device_id *match =
460 of_match_device(kirkwood_pinctrl_of_match, &pdev->dev); 473 of_match_device(kirkwood_pinctrl_of_match, &pdev->dev);
461 pdev->dev.platform_data = (void *)match->data; 474 pdev->dev.platform_data = (void *)match->data;
475
476 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
477 mpp_base = devm_ioremap_resource(&pdev->dev, res);
478 if (IS_ERR(mpp_base))
479 return PTR_ERR(mpp_base);
480
462 return mvebu_pinctrl_probe(pdev); 481 return mvebu_pinctrl_probe(pdev);
463} 482}
464 483
diff --git a/drivers/pinctrl/mvebu/pinctrl-mvebu.c b/drivers/pinctrl/mvebu/pinctrl-mvebu.c
index 0fd1ad31fbf9..9908374f8f92 100644
--- a/drivers/pinctrl/mvebu/pinctrl-mvebu.c
+++ b/drivers/pinctrl/mvebu/pinctrl-mvebu.c
@@ -50,7 +50,6 @@ struct mvebu_pinctrl {
50 struct device *dev; 50 struct device *dev;
51 struct pinctrl_dev *pctldev; 51 struct pinctrl_dev *pctldev;
52 struct pinctrl_desc desc; 52 struct pinctrl_desc desc;
53 void __iomem *base;
54 struct mvebu_pinctrl_group *groups; 53 struct mvebu_pinctrl_group *groups;
55 unsigned num_groups; 54 unsigned num_groups;
56 struct mvebu_pinctrl_function *functions; 55 struct mvebu_pinctrl_function *functions;
@@ -138,43 +137,6 @@ static struct mvebu_pinctrl_function *mvebu_pinctrl_find_function_by_name(
138 return NULL; 137 return NULL;
139} 138}
140 139
141/*
142 * Common mpp pin configuration registers on MVEBU are
143 * registers of eight 4-bit values for each mpp setting.
144 * Register offset and bit mask are calculated accordingly below.
145 */
146static int mvebu_common_mpp_get(struct mvebu_pinctrl *pctl,
147 struct mvebu_pinctrl_group *grp,
148 unsigned long *config)
149{
150 unsigned pin = grp->gid;
151 unsigned off = (pin / MPPS_PER_REG) * MPP_BITS;
152 unsigned shift = (pin % MPPS_PER_REG) * MPP_BITS;
153
154 *config = readl(pctl->base + off);
155 *config >>= shift;
156 *config &= MPP_MASK;
157
158 return 0;
159}
160
161static int mvebu_common_mpp_set(struct mvebu_pinctrl *pctl,
162 struct mvebu_pinctrl_group *grp,
163 unsigned long config)
164{
165 unsigned pin = grp->gid;
166 unsigned off = (pin / MPPS_PER_REG) * MPP_BITS;
167 unsigned shift = (pin % MPPS_PER_REG) * MPP_BITS;
168 unsigned long reg;
169
170 reg = readl(pctl->base + off);
171 reg &= ~(MPP_MASK << shift);
172 reg |= (config << shift);
173 writel(reg, pctl->base + off);
174
175 return 0;
176}
177
178static int mvebu_pinconf_group_get(struct pinctrl_dev *pctldev, 140static int mvebu_pinconf_group_get(struct pinctrl_dev *pctldev,
179 unsigned gid, unsigned long *config) 141 unsigned gid, unsigned long *config)
180{ 142{
@@ -184,10 +146,7 @@ static int mvebu_pinconf_group_get(struct pinctrl_dev *pctldev,
184 if (!grp->ctrl) 146 if (!grp->ctrl)
185 return -EINVAL; 147 return -EINVAL;
186 148
187 if (grp->ctrl->mpp_get) 149 return grp->ctrl->mpp_get(grp->pins[0], config);
188 return grp->ctrl->mpp_get(grp->ctrl, config);
189
190 return mvebu_common_mpp_get(pctl, grp, config);
191} 150}
192 151
193static int mvebu_pinconf_group_set(struct pinctrl_dev *pctldev, 152static int mvebu_pinconf_group_set(struct pinctrl_dev *pctldev,
@@ -202,11 +161,7 @@ static int mvebu_pinconf_group_set(struct pinctrl_dev *pctldev,
202 return -EINVAL; 161 return -EINVAL;
203 162
204 for (i = 0; i < num_configs; i++) { 163 for (i = 0; i < num_configs; i++) {
205 if (grp->ctrl->mpp_set) 164 ret = grp->ctrl->mpp_set(grp->pins[0], configs[i]);
206 ret = grp->ctrl->mpp_set(grp->ctrl, configs[i]);
207 else
208 ret = mvebu_common_mpp_set(pctl, grp, configs[i]);
209
210 if (ret) 165 if (ret)
211 return ret; 166 return ret;
212 } /* for each config */ 167 } /* for each config */
@@ -347,7 +302,7 @@ static int mvebu_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev,
347 return -EINVAL; 302 return -EINVAL;
348 303
349 if (grp->ctrl->mpp_gpio_req) 304 if (grp->ctrl->mpp_gpio_req)
350 return grp->ctrl->mpp_gpio_req(grp->ctrl, offset); 305 return grp->ctrl->mpp_gpio_req(offset);
351 306
352 setting = mvebu_pinctrl_find_gpio_setting(pctl, grp); 307 setting = mvebu_pinctrl_find_gpio_setting(pctl, grp);
353 if (!setting) 308 if (!setting)
@@ -370,7 +325,7 @@ static int mvebu_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,
370 return -EINVAL; 325 return -EINVAL;
371 326
372 if (grp->ctrl->mpp_gpio_dir) 327 if (grp->ctrl->mpp_gpio_dir)
373 return grp->ctrl->mpp_gpio_dir(grp->ctrl, offset, input); 328 return grp->ctrl->mpp_gpio_dir(offset, input);
374 329
375 setting = mvebu_pinctrl_find_gpio_setting(pctl, grp); 330 setting = mvebu_pinctrl_find_gpio_setting(pctl, grp);
376 if (!setting) 331 if (!setting)
@@ -593,11 +548,12 @@ static int mvebu_pinctrl_build_functions(struct platform_device *pdev,
593int mvebu_pinctrl_probe(struct platform_device *pdev) 548int mvebu_pinctrl_probe(struct platform_device *pdev)
594{ 549{
595 struct mvebu_pinctrl_soc_info *soc = dev_get_platdata(&pdev->dev); 550 struct mvebu_pinctrl_soc_info *soc = dev_get_platdata(&pdev->dev);
596 struct resource *res;
597 struct mvebu_pinctrl *pctl; 551 struct mvebu_pinctrl *pctl;
598 void __iomem *base;
599 struct pinctrl_pin_desc *pdesc; 552 struct pinctrl_pin_desc *pdesc;
600 unsigned gid, n, k; 553 unsigned gid, n, k;
554 unsigned size, noname = 0;
555 char *noname_buf;
556 void *p;
601 int ret; 557 int ret;
602 558
603 if (!soc || !soc->controls || !soc->modes) { 559 if (!soc || !soc->controls || !soc->modes) {
@@ -605,11 +561,6 @@ int mvebu_pinctrl_probe(struct platform_device *pdev)
605 return -EINVAL; 561 return -EINVAL;
606 } 562 }
607 563
608 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
609 base = devm_ioremap_resource(&pdev->dev, res);
610 if (IS_ERR(base))
611 return PTR_ERR(base);
612
613 pctl = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_pinctrl), 564 pctl = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_pinctrl),
614 GFP_KERNEL); 565 GFP_KERNEL);
615 if (!pctl) { 566 if (!pctl) {
@@ -623,7 +574,6 @@ int mvebu_pinctrl_probe(struct platform_device *pdev)
623 pctl->desc.pmxops = &mvebu_pinmux_ops; 574 pctl->desc.pmxops = &mvebu_pinmux_ops;
624 pctl->desc.confops = &mvebu_pinconf_ops; 575 pctl->desc.confops = &mvebu_pinconf_ops;
625 pctl->variant = soc->variant; 576 pctl->variant = soc->variant;
626 pctl->base = base;
627 pctl->dev = &pdev->dev; 577 pctl->dev = &pdev->dev;
628 platform_set_drvdata(pdev, pctl); 578 platform_set_drvdata(pdev, pctl);
629 579
@@ -633,33 +583,23 @@ int mvebu_pinctrl_probe(struct platform_device *pdev)
633 pctl->desc.npins = 0; 583 pctl->desc.npins = 0;
634 for (n = 0; n < soc->ncontrols; n++) { 584 for (n = 0; n < soc->ncontrols; n++) {
635 struct mvebu_mpp_ctrl *ctrl = &soc->controls[n]; 585 struct mvebu_mpp_ctrl *ctrl = &soc->controls[n];
636 char *names;
637 586
638 pctl->desc.npins += ctrl->npins; 587 pctl->desc.npins += ctrl->npins;
639 /* initial control pins */ 588 /* initialize control's pins[] array */
640 for (k = 0; k < ctrl->npins; k++) 589 for (k = 0; k < ctrl->npins; k++)
641 ctrl->pins[k] = ctrl->pid + k; 590 ctrl->pins[k] = ctrl->pid + k;
642 591
643 /* special soc specific control */ 592 /*
644 if (ctrl->mpp_get || ctrl->mpp_set) { 593 * We allow to pass controls with NULL name that we treat
645 if (!ctrl->name || !ctrl->mpp_get || !ctrl->mpp_set) { 594 * as a range of one-pin groups with generic mvebu register
646 dev_err(&pdev->dev, "wrong soc control info\n"); 595 * controls.
647 return -EINVAL; 596 */
648 } 597 if (!ctrl->name) {
598 pctl->num_groups += ctrl->npins;
599 noname += ctrl->npins;
600 } else {
649 pctl->num_groups += 1; 601 pctl->num_groups += 1;
650 continue;
651 } 602 }
652
653 /* generic mvebu register control */
654 names = devm_kzalloc(&pdev->dev, ctrl->npins * 8, GFP_KERNEL);
655 if (!names) {
656 dev_err(&pdev->dev, "failed to alloc mpp names\n");
657 return -ENOMEM;
658 }
659 for (k = 0; k < ctrl->npins; k++)
660 sprintf(names + 8*k, "mpp%d", ctrl->pid+k);
661 ctrl->name = names;
662 pctl->num_groups += ctrl->npins;
663 } 603 }
664 604
665 pdesc = devm_kzalloc(&pdev->dev, pctl->desc.npins * 605 pdesc = devm_kzalloc(&pdev->dev, pctl->desc.npins *
@@ -673,12 +613,17 @@ int mvebu_pinctrl_probe(struct platform_device *pdev)
673 pdesc[n].number = n; 613 pdesc[n].number = n;
674 pctl->desc.pins = pdesc; 614 pctl->desc.pins = pdesc;
675 615
676 pctl->groups = devm_kzalloc(&pdev->dev, pctl->num_groups * 616 /*
677 sizeof(struct mvebu_pinctrl_group), GFP_KERNEL); 617 * allocate groups and name buffers for unnamed groups.
678 if (!pctl->groups) { 618 */
679 dev_err(&pdev->dev, "failed to alloc pinctrl groups\n"); 619 size = pctl->num_groups * sizeof(*pctl->groups) + noname * 8;
620 p = devm_kzalloc(&pdev->dev, size, GFP_KERNEL);
621 if (!p) {
622 dev_err(&pdev->dev, "failed to alloc group data\n");
680 return -ENOMEM; 623 return -ENOMEM;
681 } 624 }
625 pctl->groups = p;
626 noname_buf = p + pctl->num_groups * sizeof(*pctl->groups);
682 627
683 /* assign mpp controls to groups */ 628 /* assign mpp controls to groups */
684 gid = 0; 629 gid = 0;
@@ -690,17 +635,26 @@ int mvebu_pinctrl_probe(struct platform_device *pdev)
690 pctl->groups[gid].pins = ctrl->pins; 635 pctl->groups[gid].pins = ctrl->pins;
691 pctl->groups[gid].npins = ctrl->npins; 636 pctl->groups[gid].npins = ctrl->npins;
692 637
693 /* generic mvebu register control maps to a number of groups */ 638 /*
694 if (!ctrl->mpp_get && !ctrl->mpp_set) { 639 * We treat unnamed controls as a range of one-pin groups
640 * with generic mvebu register controls. Use one group for
641 * each in this range and assign a default group name.
642 */
643 if (!ctrl->name) {
644 pctl->groups[gid].name = noname_buf;
695 pctl->groups[gid].npins = 1; 645 pctl->groups[gid].npins = 1;
646 sprintf(noname_buf, "mpp%d", ctrl->pid+0);
647 noname_buf += 8;
696 648
697 for (k = 1; k < ctrl->npins; k++) { 649 for (k = 1; k < ctrl->npins; k++) {
698 gid++; 650 gid++;
699 pctl->groups[gid].gid = gid; 651 pctl->groups[gid].gid = gid;
700 pctl->groups[gid].ctrl = ctrl; 652 pctl->groups[gid].ctrl = ctrl;
701 pctl->groups[gid].name = &ctrl->name[8*k]; 653 pctl->groups[gid].name = noname_buf;
702 pctl->groups[gid].pins = &ctrl->pins[k]; 654 pctl->groups[gid].pins = &ctrl->pins[k];
703 pctl->groups[gid].npins = 1; 655 pctl->groups[gid].npins = 1;
656 sprintf(noname_buf, "mpp%d", ctrl->pid+k);
657 noname_buf += 8;
704 } 658 }
705 } 659 }
706 gid++; 660 gid++;
diff --git a/drivers/pinctrl/mvebu/pinctrl-mvebu.h b/drivers/pinctrl/mvebu/pinctrl-mvebu.h
index 90bd3beee860..65a98e6f7265 100644
--- a/drivers/pinctrl/mvebu/pinctrl-mvebu.h
+++ b/drivers/pinctrl/mvebu/pinctrl-mvebu.h
@@ -28,20 +28,19 @@
28 * between two or more different settings, e.g. assign mpp pin 13 to 28 * between two or more different settings, e.g. assign mpp pin 13 to
29 * uart1 or sata. 29 * uart1 or sata.
30 * 30 *
31 * If optional mpp_get/_set functions are set these are used to get/set 31 * The mpp_get/_set functions are mandatory and are used to get/set a
32 * a specific mode. Otherwise it is assumed that the mpp control is based 32 * specific mode. The optional mpp_gpio_req/_dir functions can be used
33 * on 4-bit groups in subsequent registers. The optional mpp_gpio_req/_dir 33 * to allow pin settings with varying gpio pins.
34 * functions can be used to allow pin settings with varying gpio pins.
35 */ 34 */
36struct mvebu_mpp_ctrl { 35struct mvebu_mpp_ctrl {
37 const char *name; 36 const char *name;
38 u8 pid; 37 u8 pid;
39 u8 npins; 38 u8 npins;
40 unsigned *pins; 39 unsigned *pins;
41 int (*mpp_get)(struct mvebu_mpp_ctrl *ctrl, unsigned long *config); 40 int (*mpp_get)(unsigned pid, unsigned long *config);
42 int (*mpp_set)(struct mvebu_mpp_ctrl *ctrl, unsigned long config); 41 int (*mpp_set)(unsigned pid, unsigned long config);
43 int (*mpp_gpio_req)(struct mvebu_mpp_ctrl *ctrl, u8 pid); 42 int (*mpp_gpio_req)(unsigned pid);
44 int (*mpp_gpio_dir)(struct mvebu_mpp_ctrl *ctrl, u8 pid, bool input); 43 int (*mpp_gpio_dir)(unsigned pid, bool input);
45}; 44};
46 45
47/** 46/**
@@ -114,18 +113,6 @@ struct mvebu_pinctrl_soc_info {
114 int ngpioranges; 113 int ngpioranges;
115}; 114};
116 115
117#define MPP_REG_CTRL(_idl, _idh) \
118 { \
119 .name = NULL, \
120 .pid = _idl, \
121 .npins = _idh - _idl + 1, \
122 .pins = (unsigned[_idh - _idl + 1]) { }, \
123 .mpp_get = NULL, \
124 .mpp_set = NULL, \
125 .mpp_gpio_req = NULL, \
126 .mpp_gpio_dir = NULL, \
127 }
128
129#define MPP_FUNC_CTRL(_idl, _idh, _name, _func) \ 116#define MPP_FUNC_CTRL(_idl, _idh, _name, _func) \
130 { \ 117 { \
131 .name = _name, \ 118 .name = _name, \
@@ -186,6 +173,34 @@ struct mvebu_pinctrl_soc_info {
186 .npins = _npins, \ 173 .npins = _npins, \
187 } 174 }
188 175
176#define MVEBU_MPPS_PER_REG 8
177#define MVEBU_MPP_BITS 4
178#define MVEBU_MPP_MASK 0xf
179
180static inline int default_mpp_ctrl_get(void __iomem *base, unsigned int pid,
181 unsigned long *config)
182{
183 unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
184 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
185
186 *config = (readl(base + off) >> shift) & MVEBU_MPP_MASK;
187
188 return 0;
189}
190
191static inline int default_mpp_ctrl_set(void __iomem *base, unsigned int pid,
192 unsigned long config)
193{
194 unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
195 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
196 unsigned long reg;
197
198 reg = readl(base + off) & ~(MVEBU_MPP_MASK << shift);
199 writel(reg | (config << shift), base + off);
200
201 return 0;
202}
203
189int mvebu_pinctrl_probe(struct platform_device *pdev); 204int mvebu_pinctrl_probe(struct platform_device *pdev);
190int mvebu_pinctrl_remove(struct platform_device *pdev); 205int mvebu_pinctrl_remove(struct platform_device *pdev);
191 206