diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-05-10 15:00:53 -0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-05-10 15:00:53 -0400 |
| commit | 54b333529df25b21da462c7dcc16c7dc779d9f26 (patch) | |
| tree | b77d01cef2e259e30a7ce7570d5afb595dada172 | |
| parent | 675badfc48079e94adc55d6bb3557ea6e67bd831 (diff) | |
| parent | 780914c3cf691a75a0b7fe89f4466eeff8058165 (diff) | |
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus: (28 commits)
MIPS: Alchemy: fix xxs1500 build error
MIPS: Invalidate old TLB mappings when updating huge page PTEs.
MIPS: Hibernation: Fixes for PAGE_SIZE >= 64kb
MIPS: JZ4740: Set one-shot feature flag for the clockevent
MIPS: JZ4740: Export symbols to the watchdog driver module
MIPS: JZ4740: Fix GCC 4.6.0 build error.
MIPS: Audit: Fix success success argument pass to audit_syscall_exit
MIPS: Fix calc_vmlinuz_load_addr build warnings.
MIPS: Alchemy: Fix GCC 4.6.0 build error.
MIPS: Document former use of timerfd(2) syscall number.
MIPS: IP27: Fix GCC 4.6.0 build error.
MIPS: IP27: Fix GCC 4.6.0 build error.
MIPS: bcm63xx: Fix header_crc comment in bcm963xx_tag.h
MIPS: Octeon: Guard the Kconfig body with CPU_CAVIUM_OCTEON
MIPS: Octeon: Cleanup Kconfig IRQ_CPU* symbols.
MIPS: Rename .data..mostly and properly handle it in linker script
MIPS: MSP: Fix build error
MIPS: MSP71xx: Fix typo in msp_per_irq_controller
MIPS: Loongson: Fix GCC 2.6.0 build error.
MIPS: Jazz: Fix GCC 4.6.0 build error
...
32 files changed, 80 insertions, 97 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 8e256cc5dcd9..351c80fbba7e 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
| @@ -997,9 +997,6 @@ config IRQ_GT641XX | |||
| 997 | config IRQ_GIC | 997 | config IRQ_GIC |
| 998 | bool | 998 | bool |
| 999 | 999 | ||
| 1000 | config IRQ_CPU_OCTEON | ||
| 1001 | bool | ||
| 1002 | |||
| 1003 | config MIPS_BOARDS_GEN | 1000 | config MIPS_BOARDS_GEN |
| 1004 | bool | 1001 | bool |
| 1005 | 1002 | ||
| @@ -1359,8 +1356,6 @@ config CPU_SB1 | |||
| 1359 | config CPU_CAVIUM_OCTEON | 1356 | config CPU_CAVIUM_OCTEON |
| 1360 | bool "Cavium Octeon processor" | 1357 | bool "Cavium Octeon processor" |
| 1361 | depends on SYS_HAS_CPU_CAVIUM_OCTEON | 1358 | depends on SYS_HAS_CPU_CAVIUM_OCTEON |
| 1362 | select IRQ_CPU | ||
| 1363 | select IRQ_CPU_OCTEON | ||
| 1364 | select CPU_HAS_PREFETCH | 1359 | select CPU_HAS_PREFETCH |
| 1365 | select CPU_SUPPORTS_64BIT_KERNEL | 1360 | select CPU_SUPPORTS_64BIT_KERNEL |
| 1366 | select SYS_SUPPORTS_SMP | 1361 | select SYS_SUPPORTS_SMP |
diff --git a/arch/mips/alchemy/devboards/db1x00/board_setup.c b/arch/mips/alchemy/devboards/db1x00/board_setup.c index 05f120ff90f9..5c956fe8760f 100644 --- a/arch/mips/alchemy/devboards/db1x00/board_setup.c +++ b/arch/mips/alchemy/devboards/db1x00/board_setup.c | |||
| @@ -127,13 +127,10 @@ const char *get_system_type(void) | |||
| 127 | void __init board_setup(void) | 127 | void __init board_setup(void) |
| 128 | { | 128 | { |
| 129 | unsigned long bcsr1, bcsr2; | 129 | unsigned long bcsr1, bcsr2; |
| 130 | u32 pin_func; | ||
| 131 | 130 | ||
| 132 | bcsr1 = DB1000_BCSR_PHYS_ADDR; | 131 | bcsr1 = DB1000_BCSR_PHYS_ADDR; |
| 133 | bcsr2 = DB1000_BCSR_PHYS_ADDR + DB1000_BCSR_HEXLED_OFS; | 132 | bcsr2 = DB1000_BCSR_PHYS_ADDR + DB1000_BCSR_HEXLED_OFS; |
| 134 | 133 | ||
| 135 | pin_func = 0; | ||
| 136 | |||
| 137 | #ifdef CONFIG_MIPS_DB1000 | 134 | #ifdef CONFIG_MIPS_DB1000 |
| 138 | printk(KERN_INFO "AMD Alchemy Au1000/Db1000 Board\n"); | 135 | printk(KERN_INFO "AMD Alchemy Au1000/Db1000 Board\n"); |
| 139 | #endif | 136 | #endif |
| @@ -164,12 +161,16 @@ void __init board_setup(void) | |||
| 164 | /* Not valid for Au1550 */ | 161 | /* Not valid for Au1550 */ |
| 165 | #if defined(CONFIG_IRDA) && \ | 162 | #if defined(CONFIG_IRDA) && \ |
| 166 | (defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100)) | 163 | (defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100)) |
| 167 | /* Set IRFIRSEL instead of GPIO15 */ | 164 | { |
| 168 | pin_func = au_readl(SYS_PINFUNC) | SYS_PF_IRF; | 165 | u32 pin_func; |
| 169 | au_writel(pin_func, SYS_PINFUNC); | 166 | |
| 170 | /* Power off until the driver is in use */ | 167 | /* Set IRFIRSEL instead of GPIO15 */ |
| 171 | bcsr_mod(BCSR_RESETS, BCSR_RESETS_IRDA_MODE_MASK, | 168 | pin_func = au_readl(SYS_PINFUNC) | SYS_PF_IRF; |
| 172 | BCSR_RESETS_IRDA_MODE_OFF); | 169 | au_writel(pin_func, SYS_PINFUNC); |
| 170 | /* Power off until the driver is in use */ | ||
| 171 | bcsr_mod(BCSR_RESETS, BCSR_RESETS_IRDA_MODE_MASK, | ||
| 172 | BCSR_RESETS_IRDA_MODE_OFF); | ||
| 173 | } | ||
| 173 | #endif | 174 | #endif |
| 174 | bcsr_write(BCSR_PCMCIA, 0); /* turn off PCMCIA power */ | 175 | bcsr_write(BCSR_PCMCIA, 0); /* turn off PCMCIA power */ |
| 175 | 176 | ||
| @@ -177,31 +178,35 @@ void __init board_setup(void) | |||
| 177 | alchemy_gpio1_input_enable(); | 178 | alchemy_gpio1_input_enable(); |
| 178 | 179 | ||
| 179 | #ifdef CONFIG_MIPS_MIRAGE | 180 | #ifdef CONFIG_MIPS_MIRAGE |
| 180 | /* GPIO[20] is output */ | 181 | { |
| 181 | alchemy_gpio_direction_output(20, 0); | 182 | u32 pin_func; |
| 182 | 183 | ||
| 183 | /* Set GPIO[210:208] instead of SSI_0 */ | 184 | /* GPIO[20] is output */ |
| 184 | pin_func = au_readl(SYS_PINFUNC) | SYS_PF_S0; | 185 | alchemy_gpio_direction_output(20, 0); |
| 185 | 186 | ||
| 186 | /* Set GPIO[215:211] for LEDs */ | 187 | /* Set GPIO[210:208] instead of SSI_0 */ |
| 187 | pin_func |= 5 << 2; | 188 | pin_func = au_readl(SYS_PINFUNC) | SYS_PF_S0; |
| 188 | 189 | ||
| 189 | /* Set GPIO[214:213] for more LEDs */ | 190 | /* Set GPIO[215:211] for LEDs */ |
| 190 | pin_func |= 5 << 12; | 191 | pin_func |= 5 << 2; |
| 191 | 192 | ||
| 192 | /* Set GPIO[207:200] instead of PCMCIA/LCD */ | 193 | /* Set GPIO[214:213] for more LEDs */ |
| 193 | pin_func |= SYS_PF_LCD | SYS_PF_PC; | 194 | pin_func |= 5 << 12; |
| 194 | au_writel(pin_func, SYS_PINFUNC); | ||
| 195 | 195 | ||
| 196 | /* | 196 | /* Set GPIO[207:200] instead of PCMCIA/LCD */ |
| 197 | * Enable speaker amplifier. This should | 197 | pin_func |= SYS_PF_LCD | SYS_PF_PC; |
| 198 | * be part of the audio driver. | 198 | au_writel(pin_func, SYS_PINFUNC); |
| 199 | */ | ||
| 200 | alchemy_gpio_direction_output(209, 1); | ||
| 201 | 199 | ||
| 202 | pm_power_off = mirage_power_off; | 200 | /* |
| 203 | _machine_halt = mirage_power_off; | 201 | * Enable speaker amplifier. This should |
| 204 | _machine_restart = (void(*)(char *))mips_softreset; | 202 | * be part of the audio driver. |
| 203 | */ | ||
| 204 | alchemy_gpio_direction_output(209, 1); | ||
| 205 | |||
| 206 | pm_power_off = mirage_power_off; | ||
| 207 | _machine_halt = mirage_power_off; | ||
| 208 | _machine_restart = (void(*)(char *))mips_softreset; | ||
| 209 | } | ||
| 205 | #endif | 210 | #endif |
| 206 | 211 | ||
| 207 | #ifdef CONFIG_MIPS_BOSPORUS | 212 | #ifdef CONFIG_MIPS_BOSPORUS |
diff --git a/arch/mips/alchemy/xxs1500/init.c b/arch/mips/alchemy/xxs1500/init.c index 15125c2fda7d..34a90a4bb6f4 100644 --- a/arch/mips/alchemy/xxs1500/init.c +++ b/arch/mips/alchemy/xxs1500/init.c | |||
| @@ -51,10 +51,9 @@ void __init prom_init(void) | |||
| 51 | prom_init_cmdline(); | 51 | prom_init_cmdline(); |
| 52 | 52 | ||
| 53 | memsize_str = prom_getenv("memsize"); | 53 | memsize_str = prom_getenv("memsize"); |
| 54 | if (!memsize_str) | 54 | if (!memsize_str || strict_strtoul(memsize_str, 0, &memsize)) |
| 55 | memsize = 0x04000000; | 55 | memsize = 0x04000000; |
| 56 | else | 56 | |
| 57 | strict_strtoul(memsize_str, 0, &memsize); | ||
| 58 | add_memory_region(0, memsize, BOOT_MEM_RAM); | 57 | add_memory_region(0, memsize, BOOT_MEM_RAM); |
| 59 | } | 58 | } |
| 60 | 59 | ||
diff --git a/arch/mips/boot/compressed/calc_vmlinuz_load_addr.c b/arch/mips/boot/compressed/calc_vmlinuz_load_addr.c index 88c9d963be88..9a6243676e22 100644 --- a/arch/mips/boot/compressed/calc_vmlinuz_load_addr.c +++ b/arch/mips/boot/compressed/calc_vmlinuz_load_addr.c | |||
| @@ -16,8 +16,8 @@ | |||
| 16 | 16 | ||
| 17 | int main(int argc, char *argv[]) | 17 | int main(int argc, char *argv[]) |
| 18 | { | 18 | { |
| 19 | unsigned long long vmlinux_size, vmlinux_load_addr, vmlinuz_load_addr; | ||
| 19 | struct stat sb; | 20 | struct stat sb; |
| 20 | uint64_t vmlinux_size, vmlinux_load_addr, vmlinuz_load_addr; | ||
| 21 | 21 | ||
| 22 | if (argc != 3) { | 22 | if (argc != 3) { |
| 23 | fprintf(stderr, "Usage: %s <pathname> <vmlinux_load_addr>\n", | 23 | fprintf(stderr, "Usage: %s <pathname> <vmlinux_load_addr>\n", |
diff --git a/arch/mips/cavium-octeon/Kconfig b/arch/mips/cavium-octeon/Kconfig index caae22858163..cad555ebeca3 100644 --- a/arch/mips/cavium-octeon/Kconfig +++ b/arch/mips/cavium-octeon/Kconfig | |||
| @@ -1,11 +1,7 @@ | |||
| 1 | config CAVIUM_OCTEON_SPECIFIC_OPTIONS | 1 | if CPU_CAVIUM_OCTEON |
| 2 | bool "Enable Octeon specific options" | ||
| 3 | depends on CPU_CAVIUM_OCTEON | ||
| 4 | default "y" | ||
| 5 | 2 | ||
| 6 | config CAVIUM_CN63XXP1 | 3 | config CAVIUM_CN63XXP1 |
| 7 | bool "Enable CN63XXP1 errata worarounds" | 4 | bool "Enable CN63XXP1 errata worarounds" |
| 8 | depends on CAVIUM_OCTEON_SPECIFIC_OPTIONS | ||
| 9 | default "n" | 5 | default "n" |
| 10 | help | 6 | help |
| 11 | The CN63XXP1 chip requires build time workarounds to | 7 | The CN63XXP1 chip requires build time workarounds to |
| @@ -16,7 +12,6 @@ config CAVIUM_CN63XXP1 | |||
| 16 | 12 | ||
| 17 | config CAVIUM_OCTEON_2ND_KERNEL | 13 | config CAVIUM_OCTEON_2ND_KERNEL |
| 18 | bool "Build the kernel to be used as a 2nd kernel on the same chip" | 14 | bool "Build the kernel to be used as a 2nd kernel on the same chip" |
| 19 | depends on CAVIUM_OCTEON_SPECIFIC_OPTIONS | ||
| 20 | default "n" | 15 | default "n" |
| 21 | help | 16 | help |
| 22 | This option configures this kernel to be linked at a different | 17 | This option configures this kernel to be linked at a different |
| @@ -26,7 +21,6 @@ config CAVIUM_OCTEON_2ND_KERNEL | |||
| 26 | 21 | ||
| 27 | config CAVIUM_OCTEON_HW_FIX_UNALIGNED | 22 | config CAVIUM_OCTEON_HW_FIX_UNALIGNED |
| 28 | bool "Enable hardware fixups of unaligned loads and stores" | 23 | bool "Enable hardware fixups of unaligned loads and stores" |
| 29 | depends on CAVIUM_OCTEON_SPECIFIC_OPTIONS | ||
| 30 | default "y" | 24 | default "y" |
| 31 | help | 25 | help |
| 32 | Configure the Octeon hardware to automatically fix unaligned loads | 26 | Configure the Octeon hardware to automatically fix unaligned loads |
| @@ -38,7 +32,6 @@ config CAVIUM_OCTEON_HW_FIX_UNALIGNED | |||
| 38 | 32 | ||
| 39 | config CAVIUM_OCTEON_CVMSEG_SIZE | 33 | config CAVIUM_OCTEON_CVMSEG_SIZE |
| 40 | int "Number of L1 cache lines reserved for CVMSEG memory" | 34 | int "Number of L1 cache lines reserved for CVMSEG memory" |
| 41 | depends on CAVIUM_OCTEON_SPECIFIC_OPTIONS | ||
| 42 | range 0 54 | 35 | range 0 54 |
| 43 | default 1 | 36 | default 1 |
| 44 | help | 37 | help |
| @@ -50,7 +43,6 @@ config CAVIUM_OCTEON_CVMSEG_SIZE | |||
| 50 | 43 | ||
| 51 | config CAVIUM_OCTEON_LOCK_L2 | 44 | config CAVIUM_OCTEON_LOCK_L2 |
| 52 | bool "Lock often used kernel code in the L2" | 45 | bool "Lock often used kernel code in the L2" |
| 53 | depends on CAVIUM_OCTEON_SPECIFIC_OPTIONS | ||
| 54 | default "y" | 46 | default "y" |
| 55 | help | 47 | help |
| 56 | Enable locking parts of the kernel into the L2 cache. | 48 | Enable locking parts of the kernel into the L2 cache. |
| @@ -93,7 +85,6 @@ config CAVIUM_OCTEON_LOCK_L2_MEMCPY | |||
| 93 | config ARCH_SPARSEMEM_ENABLE | 85 | config ARCH_SPARSEMEM_ENABLE |
| 94 | def_bool y | 86 | def_bool y |
| 95 | select SPARSEMEM_STATIC | 87 | select SPARSEMEM_STATIC |
| 96 | depends on CPU_CAVIUM_OCTEON | ||
| 97 | 88 | ||
| 98 | config CAVIUM_OCTEON_HELPER | 89 | config CAVIUM_OCTEON_HELPER |
| 99 | def_bool y | 90 | def_bool y |
| @@ -107,6 +98,8 @@ config NEED_SG_DMA_LENGTH | |||
| 107 | 98 | ||
| 108 | config SWIOTLB | 99 | config SWIOTLB |
| 109 | def_bool y | 100 | def_bool y |
| 110 | depends on CPU_CAVIUM_OCTEON | ||
| 111 | select IOMMU_HELPER | 101 | select IOMMU_HELPER |
| 112 | select NEED_SG_DMA_LENGTH | 102 | select NEED_SG_DMA_LENGTH |
| 103 | |||
| 104 | |||
| 105 | endif # CPU_CAVIUM_OCTEON | ||
diff --git a/arch/mips/include/asm/cache.h b/arch/mips/include/asm/cache.h index 650ac9ba734c..b4db69fbc40c 100644 --- a/arch/mips/include/asm/cache.h +++ b/arch/mips/include/asm/cache.h | |||
| @@ -17,6 +17,6 @@ | |||
| 17 | #define SMP_CACHE_SHIFT L1_CACHE_SHIFT | 17 | #define SMP_CACHE_SHIFT L1_CACHE_SHIFT |
| 18 | #define SMP_CACHE_BYTES L1_CACHE_BYTES | 18 | #define SMP_CACHE_BYTES L1_CACHE_BYTES |
| 19 | 19 | ||
| 20 | #define __read_mostly __attribute__((__section__(".data.read_mostly"))) | 20 | #define __read_mostly __attribute__((__section__(".data..read_mostly"))) |
| 21 | 21 | ||
| 22 | #endif /* _ASM_CACHE_H */ | 22 | #endif /* _ASM_CACHE_H */ |
diff --git a/arch/mips/include/asm/cevt-r4k.h b/arch/mips/include/asm/cevt-r4k.h index fa4328f9124f..65f9bdd02f1f 100644 --- a/arch/mips/include/asm/cevt-r4k.h +++ b/arch/mips/include/asm/cevt-r4k.h | |||
| @@ -14,6 +14,9 @@ | |||
| 14 | #ifndef __ASM_CEVT_R4K_H | 14 | #ifndef __ASM_CEVT_R4K_H |
| 15 | #define __ASM_CEVT_R4K_H | 15 | #define __ASM_CEVT_R4K_H |
| 16 | 16 | ||
| 17 | #include <linux/clockchips.h> | ||
| 18 | #include <asm/time.h> | ||
| 19 | |||
| 17 | DECLARE_PER_CPU(struct clock_event_device, mips_clockevent_device); | 20 | DECLARE_PER_CPU(struct clock_event_device, mips_clockevent_device); |
| 18 | 21 | ||
| 19 | void mips_event_handler(struct clock_event_device *dev); | 22 | void mips_event_handler(struct clock_event_device *dev); |
diff --git a/arch/mips/include/asm/hugetlb.h b/arch/mips/include/asm/hugetlb.h index f5e856015329..c565b7c3f0b5 100644 --- a/arch/mips/include/asm/hugetlb.h +++ b/arch/mips/include/asm/hugetlb.h | |||
| @@ -70,6 +70,7 @@ static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm, | |||
| 70 | static inline void huge_ptep_clear_flush(struct vm_area_struct *vma, | 70 | static inline void huge_ptep_clear_flush(struct vm_area_struct *vma, |
| 71 | unsigned long addr, pte_t *ptep) | 71 | unsigned long addr, pte_t *ptep) |
| 72 | { | 72 | { |
| 73 | flush_tlb_mm(vma->vm_mm); | ||
| 73 | } | 74 | } |
| 74 | 75 | ||
| 75 | static inline int huge_pte_none(pte_t pte) | 76 | static inline int huge_pte_none(pte_t pte) |
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm963xx_tag.h b/arch/mips/include/asm/mach-bcm63xx/bcm963xx_tag.h index 32978d32561a..ed72e6a26b73 100644 --- a/arch/mips/include/asm/mach-bcm63xx/bcm963xx_tag.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm963xx_tag.h | |||
| @@ -88,7 +88,7 @@ struct bcm_tag { | |||
| 88 | char kernel_crc[CRC_LEN]; | 88 | char kernel_crc[CRC_LEN]; |
| 89 | /* 228-235: Unused at present */ | 89 | /* 228-235: Unused at present */ |
| 90 | char reserved1[8]; | 90 | char reserved1[8]; |
| 91 | /* 236-239: CRC32 of header excluding tagVersion */ | 91 | /* 236-239: CRC32 of header excluding last 20 bytes */ |
| 92 | char header_crc[CRC_LEN]; | 92 | char header_crc[CRC_LEN]; |
| 93 | /* 240-255: Unused at present */ | 93 | /* 240-255: Unused at present */ |
| 94 | char reserved2[16]; | 94 | char reserved2[16]; |
diff --git a/arch/mips/jazz/jazzdma.c b/arch/mips/jazz/jazzdma.c index 9ce9f64cb76f..2d8e447cb828 100644 --- a/arch/mips/jazz/jazzdma.c +++ b/arch/mips/jazz/jazzdma.c | |||
| @@ -211,7 +211,7 @@ EXPORT_SYMBOL(vdma_free); | |||
| 211 | */ | 211 | */ |
| 212 | int vdma_remap(unsigned long laddr, unsigned long paddr, unsigned long size) | 212 | int vdma_remap(unsigned long laddr, unsigned long paddr, unsigned long size) |
| 213 | { | 213 | { |
| 214 | int first, pages, npages; | 214 | int first, pages; |
| 215 | 215 | ||
| 216 | if (laddr > 0xffffff) { | 216 | if (laddr > 0xffffff) { |
| 217 | if (vdma_debug) | 217 | if (vdma_debug) |
| @@ -228,8 +228,7 @@ int vdma_remap(unsigned long laddr, unsigned long paddr, unsigned long size) | |||
| 228 | return -EINVAL; /* invalid physical address */ | 228 | return -EINVAL; /* invalid physical address */ |
| 229 | } | 229 | } |
| 230 | 230 | ||
| 231 | npages = pages = | 231 | pages = (((paddr & (VDMA_PAGESIZE - 1)) + size) >> 12) + 1; |
| 232 | (((paddr & (VDMA_PAGESIZE - 1)) + size) >> 12) + 1; | ||
| 233 | first = laddr >> 12; | 232 | first = laddr >> 12; |
| 234 | if (vdma_debug) | 233 | if (vdma_debug) |
| 235 | printk("vdma_remap: first=%x, pages=%x\n", first, pages); | 234 | printk("vdma_remap: first=%x, pages=%x\n", first, pages); |
diff --git a/arch/mips/jz4740/dma.c b/arch/mips/jz4740/dma.c index 5ebe75a68350..d7feb898692c 100644 --- a/arch/mips/jz4740/dma.c +++ b/arch/mips/jz4740/dma.c | |||
| @@ -242,9 +242,7 @@ EXPORT_SYMBOL_GPL(jz4740_dma_get_residue); | |||
| 242 | 242 | ||
| 243 | static void jz4740_dma_chan_irq(struct jz4740_dma_chan *dma) | 243 | static void jz4740_dma_chan_irq(struct jz4740_dma_chan *dma) |
| 244 | { | 244 | { |
| 245 | uint32_t status; | 245 | (void) jz4740_dma_read(JZ_REG_DMA_STATUS_CTRL(dma->id)); |
| 246 | |||
| 247 | status = jz4740_dma_read(JZ_REG_DMA_STATUS_CTRL(dma->id)); | ||
| 248 | 246 | ||
| 249 | jz4740_dma_write_mask(JZ_REG_DMA_STATUS_CTRL(dma->id), 0, | 247 | jz4740_dma_write_mask(JZ_REG_DMA_STATUS_CTRL(dma->id), 0, |
| 250 | JZ_DMA_STATUS_CTRL_ENABLE | JZ_DMA_STATUS_CTRL_TRANSFER_DONE); | 248 | JZ_DMA_STATUS_CTRL_ENABLE | JZ_DMA_STATUS_CTRL_TRANSFER_DONE); |
diff --git a/arch/mips/jz4740/time.c b/arch/mips/jz4740/time.c index fe01678d94fd..eaa853a54af6 100644 --- a/arch/mips/jz4740/time.c +++ b/arch/mips/jz4740/time.c | |||
| @@ -89,7 +89,7 @@ static int jz4740_clockevent_set_next(unsigned long evt, | |||
| 89 | 89 | ||
| 90 | static struct clock_event_device jz4740_clockevent = { | 90 | static struct clock_event_device jz4740_clockevent = { |
| 91 | .name = "jz4740-timer", | 91 | .name = "jz4740-timer", |
| 92 | .features = CLOCK_EVT_FEAT_PERIODIC, | 92 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, |
| 93 | .set_next_event = jz4740_clockevent_set_next, | 93 | .set_next_event = jz4740_clockevent_set_next, |
| 94 | .set_mode = jz4740_clockevent_set_mode, | 94 | .set_mode = jz4740_clockevent_set_mode, |
| 95 | .rating = 200, | 95 | .rating = 200, |
diff --git a/arch/mips/jz4740/timer.c b/arch/mips/jz4740/timer.c index b2c015129055..654d5c3900b6 100644 --- a/arch/mips/jz4740/timer.c +++ b/arch/mips/jz4740/timer.c | |||
| @@ -27,11 +27,13 @@ void jz4740_timer_enable_watchdog(void) | |||
| 27 | { | 27 | { |
| 28 | writel(BIT(16), jz4740_timer_base + JZ_REG_TIMER_STOP_CLEAR); | 28 | writel(BIT(16), jz4740_timer_base + JZ_REG_TIMER_STOP_CLEAR); |
| 29 | } | 29 | } |
| 30 | EXPORT_SYMBOL_GPL(jz4740_timer_enable_watchdog); | ||
| 30 | 31 | ||
| 31 | void jz4740_timer_disable_watchdog(void) | 32 | void jz4740_timer_disable_watchdog(void) |
| 32 | { | 33 | { |
| 33 | writel(BIT(16), jz4740_timer_base + JZ_REG_TIMER_STOP_SET); | 34 | writel(BIT(16), jz4740_timer_base + JZ_REG_TIMER_STOP_SET); |
| 34 | } | 35 | } |
| 36 | EXPORT_SYMBOL_GPL(jz4740_timer_disable_watchdog); | ||
| 35 | 37 | ||
| 36 | void __init jz4740_timer_init(void) | 38 | void __init jz4740_timer_init(void) |
| 37 | { | 39 | { |
diff --git a/arch/mips/kernel/ftrace.c b/arch/mips/kernel/ftrace.c index 94ca2b018af7..feb8021a305f 100644 --- a/arch/mips/kernel/ftrace.c +++ b/arch/mips/kernel/ftrace.c | |||
| @@ -23,6 +23,7 @@ | |||
| 23 | 23 | ||
| 24 | #define JAL 0x0c000000 /* jump & link: ip --> ra, jump to target */ | 24 | #define JAL 0x0c000000 /* jump & link: ip --> ra, jump to target */ |
| 25 | #define ADDR_MASK 0x03ffffff /* op_code|addr : 31...26|25 ....0 */ | 25 | #define ADDR_MASK 0x03ffffff /* op_code|addr : 31...26|25 ....0 */ |
| 26 | #define JUMP_RANGE_MASK ((1UL << 28) - 1) | ||
| 26 | 27 | ||
| 27 | #define INSN_NOP 0x00000000 /* nop */ | 28 | #define INSN_NOP 0x00000000 /* nop */ |
| 28 | #define INSN_JAL(addr) \ | 29 | #define INSN_JAL(addr) \ |
| @@ -44,12 +45,12 @@ static inline void ftrace_dyn_arch_init_insns(void) | |||
| 44 | 45 | ||
| 45 | /* jal (ftrace_caller + 8), jump over the first two instruction */ | 46 | /* jal (ftrace_caller + 8), jump over the first two instruction */ |
| 46 | buf = (u32 *)&insn_jal_ftrace_caller; | 47 | buf = (u32 *)&insn_jal_ftrace_caller; |
| 47 | uasm_i_jal(&buf, (FTRACE_ADDR + 8)); | 48 | uasm_i_jal(&buf, (FTRACE_ADDR + 8) & JUMP_RANGE_MASK); |
| 48 | 49 | ||
| 49 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER | 50 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER |
| 50 | /* j ftrace_graph_caller */ | 51 | /* j ftrace_graph_caller */ |
| 51 | buf = (u32 *)&insn_j_ftrace_graph_caller; | 52 | buf = (u32 *)&insn_j_ftrace_graph_caller; |
| 52 | uasm_i_j(&buf, (unsigned long)ftrace_graph_caller); | 53 | uasm_i_j(&buf, (unsigned long)ftrace_graph_caller & JUMP_RANGE_MASK); |
| 53 | #endif | 54 | #endif |
| 54 | } | 55 | } |
| 55 | 56 | ||
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c index d21c388c0116..584e6b55c865 100644 --- a/arch/mips/kernel/ptrace.c +++ b/arch/mips/kernel/ptrace.c | |||
| @@ -540,8 +540,8 @@ asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit) | |||
| 540 | secure_computing(regs->regs[2]); | 540 | secure_computing(regs->regs[2]); |
| 541 | 541 | ||
| 542 | if (unlikely(current->audit_context) && entryexit) | 542 | if (unlikely(current->audit_context) && entryexit) |
| 543 | audit_syscall_exit(AUDITSC_RESULT(regs->regs[2]), | 543 | audit_syscall_exit(AUDITSC_RESULT(regs->regs[7]), |
| 544 | regs->regs[2]); | 544 | -regs->regs[2]); |
| 545 | 545 | ||
| 546 | if (!(current->ptrace & PT_PTRACED)) | 546 | if (!(current->ptrace & PT_PTRACED)) |
| 547 | goto out; | 547 | goto out; |
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S index 7f5468b38d4c..7f1377eb22d3 100644 --- a/arch/mips/kernel/scall32-o32.S +++ b/arch/mips/kernel/scall32-o32.S | |||
| @@ -565,7 +565,7 @@ einval: li v0, -ENOSYS | |||
| 565 | sys sys_ioprio_get 2 /* 4315 */ | 565 | sys sys_ioprio_get 2 /* 4315 */ |
| 566 | sys sys_utimensat 4 | 566 | sys sys_utimensat 4 |
| 567 | sys sys_signalfd 3 | 567 | sys sys_signalfd 3 |
| 568 | sys sys_ni_syscall 0 | 568 | sys sys_ni_syscall 0 /* was timerfd */ |
| 569 | sys sys_eventfd 1 | 569 | sys sys_eventfd 1 |
| 570 | sys sys_fallocate 6 /* 4320 */ | 570 | sys sys_fallocate 6 /* 4320 */ |
| 571 | sys sys_timerfd_create 2 | 571 | sys sys_timerfd_create 2 |
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S index a2e1fcbc41dc..7c0ef7f128bf 100644 --- a/arch/mips/kernel/scall64-64.S +++ b/arch/mips/kernel/scall64-64.S | |||
| @@ -404,7 +404,7 @@ sys_call_table: | |||
| 404 | PTR sys_ioprio_get | 404 | PTR sys_ioprio_get |
| 405 | PTR sys_utimensat /* 5275 */ | 405 | PTR sys_utimensat /* 5275 */ |
| 406 | PTR sys_signalfd | 406 | PTR sys_signalfd |
| 407 | PTR sys_ni_syscall | 407 | PTR sys_ni_syscall /* was timerfd */ |
| 408 | PTR sys_eventfd | 408 | PTR sys_eventfd |
| 409 | PTR sys_fallocate | 409 | PTR sys_fallocate |
| 410 | PTR sys_timerfd_create /* 5280 */ | 410 | PTR sys_timerfd_create /* 5280 */ |
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S index b2c7624995b8..de6c5563beab 100644 --- a/arch/mips/kernel/scall64-n32.S +++ b/arch/mips/kernel/scall64-n32.S | |||
| @@ -403,7 +403,7 @@ EXPORT(sysn32_call_table) | |||
| 403 | PTR sys_ioprio_get | 403 | PTR sys_ioprio_get |
| 404 | PTR compat_sys_utimensat | 404 | PTR compat_sys_utimensat |
| 405 | PTR compat_sys_signalfd /* 6280 */ | 405 | PTR compat_sys_signalfd /* 6280 */ |
| 406 | PTR sys_ni_syscall | 406 | PTR sys_ni_syscall /* was timerfd */ |
| 407 | PTR sys_eventfd | 407 | PTR sys_eventfd |
| 408 | PTR sys_fallocate | 408 | PTR sys_fallocate |
| 409 | PTR sys_timerfd_create | 409 | PTR sys_timerfd_create |
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S index 049a9c8c49a0..b0541dda8830 100644 --- a/arch/mips/kernel/scall64-o32.S +++ b/arch/mips/kernel/scall64-o32.S | |||
| @@ -522,7 +522,7 @@ sys_call_table: | |||
| 522 | PTR sys_ioprio_get /* 4315 */ | 522 | PTR sys_ioprio_get /* 4315 */ |
| 523 | PTR compat_sys_utimensat | 523 | PTR compat_sys_utimensat |
| 524 | PTR compat_sys_signalfd | 524 | PTR compat_sys_signalfd |
| 525 | PTR sys_ni_syscall | 525 | PTR sys_ni_syscall /* was timerfd */ |
| 526 | PTR sys_eventfd | 526 | PTR sys_eventfd |
| 527 | PTR sys32_fallocate /* 4320 */ | 527 | PTR sys32_fallocate /* 4320 */ |
| 528 | PTR sys_timerfd_create | 528 | PTR sys_timerfd_create |
diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S index 832afbb87588..e4b0b0bec039 100644 --- a/arch/mips/kernel/vmlinux.lds.S +++ b/arch/mips/kernel/vmlinux.lds.S | |||
| @@ -74,6 +74,7 @@ SECTIONS | |||
| 74 | INIT_TASK_DATA(PAGE_SIZE) | 74 | INIT_TASK_DATA(PAGE_SIZE) |
| 75 | NOSAVE_DATA | 75 | NOSAVE_DATA |
| 76 | CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT) | 76 | CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT) |
| 77 | READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT) | ||
| 77 | DATA_DATA | 78 | DATA_DATA |
| 78 | CONSTRUCTORS | 79 | CONSTRUCTORS |
| 79 | } | 80 | } |
diff --git a/arch/mips/loongson/common/env.c b/arch/mips/loongson/common/env.c index 11b193f848f8..d93830ad6113 100644 --- a/arch/mips/loongson/common/env.c +++ b/arch/mips/loongson/common/env.c | |||
| @@ -29,9 +29,10 @@ unsigned long memsize, highmemsize; | |||
| 29 | 29 | ||
| 30 | #define parse_even_earlier(res, option, p) \ | 30 | #define parse_even_earlier(res, option, p) \ |
| 31 | do { \ | 31 | do { \ |
| 32 | int ret; \ | 32 | unsigned int tmp __maybe_unused; \ |
| 33 | \ | ||
| 33 | if (strncmp(option, (char *)p, strlen(option)) == 0) \ | 34 | if (strncmp(option, (char *)p, strlen(option)) == 0) \ |
| 34 | ret = strict_strtol((char *)p + strlen(option"="), 10, &res); \ | 35 | tmp = strict_strtol((char *)p + strlen(option"="), 10, &res); \ |
| 35 | } while (0) | 36 | } while (0) |
| 36 | 37 | ||
| 37 | void __init prom_init_env(void) | 38 | void __init prom_init_env(void) |
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index b4923a75cb4b..71bddf8f7d25 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c | |||
| @@ -1075,7 +1075,6 @@ static int __cpuinit probe_scache(void) | |||
| 1075 | unsigned long flags, addr, begin, end, pow2; | 1075 | unsigned long flags, addr, begin, end, pow2; |
| 1076 | unsigned int config = read_c0_config(); | 1076 | unsigned int config = read_c0_config(); |
| 1077 | struct cpuinfo_mips *c = ¤t_cpu_data; | 1077 | struct cpuinfo_mips *c = ¤t_cpu_data; |
| 1078 | int tmp; | ||
| 1079 | 1078 | ||
| 1080 | if (config & CONF_SC) | 1079 | if (config & CONF_SC) |
| 1081 | return 0; | 1080 | return 0; |
| @@ -1108,7 +1107,6 @@ static int __cpuinit probe_scache(void) | |||
| 1108 | 1107 | ||
| 1109 | /* Now search for the wrap around point. */ | 1108 | /* Now search for the wrap around point. */ |
| 1110 | pow2 = (128 * 1024); | 1109 | pow2 = (128 * 1024); |
| 1111 | tmp = 0; | ||
| 1112 | for (addr = begin + (128 * 1024); addr < end; addr = begin + pow2) { | 1110 | for (addr = begin + (128 * 1024); addr < end; addr = begin + pow2) { |
| 1113 | cache_op(Index_Load_Tag_SD, addr); | 1111 | cache_op(Index_Load_Tag_SD, addr); |
| 1114 | __asm__ __volatile__("nop; nop; nop; nop;"); /* hazard... */ | 1112 | __asm__ __volatile__("nop; nop; nop; nop;"); /* hazard... */ |
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index 5ef294fbb6e7..f5734c2c8097 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c | |||
| @@ -1151,8 +1151,8 @@ static void __cpuinit build_r4000_tlb_refill_handler(void) | |||
| 1151 | struct uasm_reloc *r = relocs; | 1151 | struct uasm_reloc *r = relocs; |
| 1152 | u32 *f; | 1152 | u32 *f; |
| 1153 | unsigned int final_len; | 1153 | unsigned int final_len; |
| 1154 | struct mips_huge_tlb_info htlb_info; | 1154 | struct mips_huge_tlb_info htlb_info __maybe_unused; |
| 1155 | enum vmalloc64_mode vmalloc_mode; | 1155 | enum vmalloc64_mode vmalloc_mode __maybe_unused; |
| 1156 | 1156 | ||
| 1157 | memset(tlb_handler, 0, sizeof(tlb_handler)); | 1157 | memset(tlb_handler, 0, sizeof(tlb_handler)); |
| 1158 | memset(labels, 0, sizeof(labels)); | 1158 | memset(labels, 0, sizeof(labels)); |
diff --git a/arch/mips/mti-malta/malta-init.c b/arch/mips/mti-malta/malta-init.c index 414f0c99b196..31180c321a1a 100644 --- a/arch/mips/mti-malta/malta-init.c +++ b/arch/mips/mti-malta/malta-init.c | |||
| @@ -193,8 +193,6 @@ extern struct plat_smp_ops msmtc_smp_ops; | |||
| 193 | 193 | ||
| 194 | void __init prom_init(void) | 194 | void __init prom_init(void) |
| 195 | { | 195 | { |
| 196 | int result; | ||
| 197 | |||
| 198 | prom_argc = fw_arg0; | 196 | prom_argc = fw_arg0; |
| 199 | _prom_argv = (int *) fw_arg1; | 197 | _prom_argv = (int *) fw_arg1; |
| 200 | _prom_envp = (int *) fw_arg2; | 198 | _prom_envp = (int *) fw_arg2; |
| @@ -360,20 +358,14 @@ void __init prom_init(void) | |||
| 360 | #ifdef CONFIG_SERIAL_8250_CONSOLE | 358 | #ifdef CONFIG_SERIAL_8250_CONSOLE |
| 361 | console_config(); | 359 | console_config(); |
| 362 | #endif | 360 | #endif |
| 363 | /* Early detection of CMP support */ | ||
| 364 | result = gcmp_probe(GCMP_BASE_ADDR, GCMP_ADDRSPACE_SZ); | ||
| 365 | |||
| 366 | #ifdef CONFIG_MIPS_CMP | 361 | #ifdef CONFIG_MIPS_CMP |
| 367 | if (result) | 362 | /* Early detection of CMP support */ |
| 363 | if (gcmp_probe(GCMP_BASE_ADDR, GCMP_ADDRSPACE_SZ)) | ||
| 368 | register_smp_ops(&cmp_smp_ops); | 364 | register_smp_ops(&cmp_smp_ops); |
| 365 | else | ||
| 369 | #endif | 366 | #endif |
| 370 | #ifdef CONFIG_MIPS_MT_SMP | 367 | #ifdef CONFIG_MIPS_MT_SMP |
| 371 | #ifdef CONFIG_MIPS_CMP | ||
| 372 | if (!result) | ||
| 373 | register_smp_ops(&vsmp_smp_ops); | 368 | register_smp_ops(&vsmp_smp_ops); |
| 374 | #else | ||
| 375 | register_smp_ops(&vsmp_smp_ops); | ||
| 376 | #endif | ||
| 377 | #endif | 369 | #endif |
| 378 | #ifdef CONFIG_MIPS_MT_SMTC | 370 | #ifdef CONFIG_MIPS_MT_SMTC |
| 379 | register_smp_ops(&msmtc_smp_ops); | 371 | register_smp_ops(&msmtc_smp_ops); |
diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c index 9027061f0ead..e85c977328da 100644 --- a/arch/mips/mti-malta/malta-int.c +++ b/arch/mips/mti-malta/malta-int.c | |||
| @@ -56,7 +56,6 @@ static DEFINE_RAW_SPINLOCK(mips_irq_lock); | |||
| 56 | static inline int mips_pcibios_iack(void) | 56 | static inline int mips_pcibios_iack(void) |
| 57 | { | 57 | { |
| 58 | int irq; | 58 | int irq; |
| 59 | u32 dummy; | ||
| 60 | 59 | ||
| 61 | /* | 60 | /* |
| 62 | * Determine highest priority pending interrupt by performing | 61 | * Determine highest priority pending interrupt by performing |
| @@ -83,7 +82,7 @@ static inline int mips_pcibios_iack(void) | |||
| 83 | BONITO_PCIMAP_CFG = 0x20000; | 82 | BONITO_PCIMAP_CFG = 0x20000; |
| 84 | 83 | ||
| 85 | /* Flush Bonito register block */ | 84 | /* Flush Bonito register block */ |
| 86 | dummy = BONITO_PCIMAP_CFG; | 85 | (void) BONITO_PCIMAP_CFG; |
| 87 | iob(); /* sync */ | 86 | iob(); /* sync */ |
| 88 | 87 | ||
| 89 | irq = __raw_readl((u32 *)_pcictrl_bonito_pcicfg); | 88 | irq = __raw_readl((u32 *)_pcictrl_bonito_pcicfg); |
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_irq_per.c b/arch/mips/pmc-sierra/msp71xx/msp_irq_per.c index f9b9dcdfa9dd..98fd0099d964 100644 --- a/arch/mips/pmc-sierra/msp71xx/msp_irq_per.c +++ b/arch/mips/pmc-sierra/msp71xx/msp_irq_per.c | |||
| @@ -97,7 +97,7 @@ static int msp_per_irq_set_affinity(struct irq_data *d, | |||
| 97 | 97 | ||
| 98 | static struct irq_chip msp_per_irq_controller = { | 98 | static struct irq_chip msp_per_irq_controller = { |
| 99 | .name = "MSP_PER", | 99 | .name = "MSP_PER", |
| 100 | .irq_enable = unmask_per_irq. | 100 | .irq_enable = unmask_per_irq, |
| 101 | .irq_disable = mask_per_irq, | 101 | .irq_disable = mask_per_irq, |
| 102 | .irq_ack = msp_per_irq_ack, | 102 | .irq_ack = msp_per_irq_ack, |
| 103 | #ifdef CONFIG_SMP | 103 | #ifdef CONFIG_SMP |
diff --git a/arch/mips/power/hibernate.S b/arch/mips/power/hibernate.S index dbb5c7b4b70f..f8a751c03282 100644 --- a/arch/mips/power/hibernate.S +++ b/arch/mips/power/hibernate.S | |||
| @@ -35,7 +35,7 @@ LEAF(swsusp_arch_resume) | |||
| 35 | 0: | 35 | 0: |
| 36 | PTR_L t1, PBE_ADDRESS(t0) /* source */ | 36 | PTR_L t1, PBE_ADDRESS(t0) /* source */ |
| 37 | PTR_L t2, PBE_ORIG_ADDRESS(t0) /* destination */ | 37 | PTR_L t2, PBE_ORIG_ADDRESS(t0) /* destination */ |
| 38 | PTR_ADDIU t3, t1, PAGE_SIZE | 38 | PTR_ADDU t3, t1, PAGE_SIZE |
| 39 | 1: | 39 | 1: |
| 40 | REG_L t8, (t1) | 40 | REG_L t8, (t1) |
| 41 | REG_S t8, (t2) | 41 | REG_S t8, (t2) |
diff --git a/arch/mips/sgi-ip22/ip22-platform.c b/arch/mips/sgi-ip22/ip22-platform.c index deddbf0ebe5c..698904daf901 100644 --- a/arch/mips/sgi-ip22/ip22-platform.c +++ b/arch/mips/sgi-ip22/ip22-platform.c | |||
| @@ -132,7 +132,7 @@ static struct platform_device eth1_device = { | |||
| 132 | */ | 132 | */ |
| 133 | static int __init sgiseeq_devinit(void) | 133 | static int __init sgiseeq_devinit(void) |
| 134 | { | 134 | { |
| 135 | unsigned int tmp; | 135 | unsigned int pbdma __maybe_unused; |
| 136 | int res, i; | 136 | int res, i; |
| 137 | 137 | ||
| 138 | eth0_pd.hpc = hpc3c0; | 138 | eth0_pd.hpc = hpc3c0; |
| @@ -151,7 +151,7 @@ static int __init sgiseeq_devinit(void) | |||
| 151 | 151 | ||
| 152 | /* Second HPC is missing? */ | 152 | /* Second HPC is missing? */ |
| 153 | if (ip22_is_fullhouse() || | 153 | if (ip22_is_fullhouse() || |
| 154 | get_dbe(tmp, (unsigned int *)&hpc3c1->pbdma[1])) | 154 | get_dbe(pbdma, (unsigned int *)&hpc3c1->pbdma[1])) |
| 155 | return 0; | 155 | return 0; |
| 156 | 156 | ||
| 157 | sgimc->giopar |= SGIMC_GIOPAR_MASTEREXP1 | SGIMC_GIOPAR_EXP164 | | 157 | sgimc->giopar |= SGIMC_GIOPAR_MASTEREXP1 | SGIMC_GIOPAR_EXP164 | |
diff --git a/arch/mips/sgi-ip22/ip22-time.c b/arch/mips/sgi-ip22/ip22-time.c index 603fc91c1030..1a94c9894188 100644 --- a/arch/mips/sgi-ip22/ip22-time.c +++ b/arch/mips/sgi-ip22/ip22-time.c | |||
| @@ -32,7 +32,7 @@ | |||
| 32 | static unsigned long dosample(void) | 32 | static unsigned long dosample(void) |
| 33 | { | 33 | { |
| 34 | u32 ct0, ct1; | 34 | u32 ct0, ct1; |
| 35 | u8 msb, lsb; | 35 | u8 msb; |
| 36 | 36 | ||
| 37 | /* Start the counter. */ | 37 | /* Start the counter. */ |
| 38 | sgint->tcword = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL | | 38 | sgint->tcword = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL | |
| @@ -46,7 +46,7 @@ static unsigned long dosample(void) | |||
| 46 | /* Latch and spin until top byte of counter2 is zero */ | 46 | /* Latch and spin until top byte of counter2 is zero */ |
| 47 | do { | 47 | do { |
| 48 | writeb(SGINT_TCWORD_CNT2 | SGINT_TCWORD_CLAT, &sgint->tcword); | 48 | writeb(SGINT_TCWORD_CNT2 | SGINT_TCWORD_CLAT, &sgint->tcword); |
| 49 | lsb = readb(&sgint->tcnt2); | 49 | (void) readb(&sgint->tcnt2); |
| 50 | msb = readb(&sgint->tcnt2); | 50 | msb = readb(&sgint->tcnt2); |
| 51 | ct1 = read_c0_count(); | 51 | ct1 = read_c0_count(); |
| 52 | } while (msb); | 52 | } while (msb); |
diff --git a/arch/mips/sgi-ip27/ip27-hubio.c b/arch/mips/sgi-ip27/ip27-hubio.c index a1fa4abb3f6a..cd0d5b06cd83 100644 --- a/arch/mips/sgi-ip27/ip27-hubio.c +++ b/arch/mips/sgi-ip27/ip27-hubio.c | |||
| @@ -29,7 +29,6 @@ unsigned long hub_pio_map(cnodeid_t cnode, xwidgetnum_t widget, | |||
| 29 | unsigned long xtalk_addr, size_t size) | 29 | unsigned long xtalk_addr, size_t size) |
| 30 | { | 30 | { |
| 31 | nasid_t nasid = COMPACT_TO_NASID_NODEID(cnode); | 31 | nasid_t nasid = COMPACT_TO_NASID_NODEID(cnode); |
| 32 | volatile hubreg_t junk; | ||
| 33 | unsigned i; | 32 | unsigned i; |
| 34 | 33 | ||
| 35 | /* use small-window mapping if possible */ | 34 | /* use small-window mapping if possible */ |
| @@ -64,7 +63,7 @@ unsigned long hub_pio_map(cnodeid_t cnode, xwidgetnum_t widget, | |||
| 64 | * after we write it. | 63 | * after we write it. |
| 65 | */ | 64 | */ |
| 66 | IIO_ITTE_PUT(nasid, i, HUB_PIO_MAP_TO_MEM, widget, xtalk_addr); | 65 | IIO_ITTE_PUT(nasid, i, HUB_PIO_MAP_TO_MEM, widget, xtalk_addr); |
| 67 | junk = HUB_L(IIO_ITTE_GET(nasid, i)); | 66 | (void) HUB_L(IIO_ITTE_GET(nasid, i)); |
| 68 | 67 | ||
| 69 | return NODE_BWIN_BASE(nasid, widget) + (xtalk_addr % BWIN_SIZE); | 68 | return NODE_BWIN_BASE(nasid, widget) + (xtalk_addr % BWIN_SIZE); |
| 70 | } | 69 | } |
diff --git a/arch/mips/sgi-ip27/ip27-klnuma.c b/arch/mips/sgi-ip27/ip27-klnuma.c index c3d30a88daf3..1d1919a44e88 100644 --- a/arch/mips/sgi-ip27/ip27-klnuma.c +++ b/arch/mips/sgi-ip27/ip27-klnuma.c | |||
| @@ -54,11 +54,8 @@ void __init setup_replication_mask(void) | |||
| 54 | 54 | ||
| 55 | static __init void set_ktext_source(nasid_t client_nasid, nasid_t server_nasid) | 55 | static __init void set_ktext_source(nasid_t client_nasid, nasid_t server_nasid) |
| 56 | { | 56 | { |
| 57 | cnodeid_t client_cnode; | ||
| 58 | kern_vars_t *kvp; | 57 | kern_vars_t *kvp; |
| 59 | 58 | ||
| 60 | client_cnode = NASID_TO_COMPACT_NODEID(client_nasid); | ||
| 61 | |||
| 62 | kvp = &hub_data(client_nasid)->kern_vars; | 59 | kvp = &hub_data(client_nasid)->kern_vars; |
| 63 | 60 | ||
| 64 | KERN_VARS_ADDR(client_nasid) = (unsigned long)kvp; | 61 | KERN_VARS_ADDR(client_nasid) = (unsigned long)kvp; |
diff --git a/arch/mips/sni/time.c b/arch/mips/sni/time.c index c76151b56568..0904d4d30cb3 100644 --- a/arch/mips/sni/time.c +++ b/arch/mips/sni/time.c | |||
| @@ -95,7 +95,7 @@ static void __init sni_a20r_timer_setup(void) | |||
| 95 | static __init unsigned long dosample(void) | 95 | static __init unsigned long dosample(void) |
| 96 | { | 96 | { |
| 97 | u32 ct0, ct1; | 97 | u32 ct0, ct1; |
| 98 | volatile u8 msb, lsb; | 98 | volatile u8 msb; |
| 99 | 99 | ||
| 100 | /* Start the counter. */ | 100 | /* Start the counter. */ |
| 101 | outb_p(0x34, 0x43); | 101 | outb_p(0x34, 0x43); |
| @@ -108,7 +108,7 @@ static __init unsigned long dosample(void) | |||
| 108 | /* Latch and spin until top byte of counter0 is zero */ | 108 | /* Latch and spin until top byte of counter0 is zero */ |
| 109 | do { | 109 | do { |
| 110 | outb(0x00, 0x43); | 110 | outb(0x00, 0x43); |
| 111 | lsb = inb(0x40); | 111 | (void) inb(0x40); |
| 112 | msb = inb(0x40); | 112 | msb = inb(0x40); |
| 113 | ct1 = read_c0_count(); | 113 | ct1 = read_c0_count(); |
| 114 | } while (msb); | 114 | } while (msb); |
