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authorRudolf Marek <r.marek@sh.cvut.cz>2006-04-25 07:06:41 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2006-06-22 14:10:32 -0400
commit54aaa1ca1022d95d854315743241bb6bf59f531f (patch)
treeaf43ffb4efb559b823b6ce6db30df3667ecfe194
parent5e9f4f2e5a02bb6908278a819952aa31fffefaa2 (diff)
[PATCH] I2C: i2c-piix4: Remove the fix_hstcfg parameter
This patch removes the fix_hstcfg option from the driver and related SMBus Interrupt Select register magic because now we know what are valid values for this register. This patch updates the documentation and adds new IRQ mode check so we are sure not to miss any new "unusual" value. The PCI quirk for users of fix_hstcfg was not developed because the chipset lacks of subsystem ID registers and DMI is stated "To be filled". Impact to existing systems is minimal because the problem showed up on motherboards like 10 years back. On the other hand users of newer Serverworks and HT1000 systems won't be misleaded by the message suggesting to try the fix_hstcfg any more. Signed-off-by: Rudolf Marek <r.marek@sh.cvut.cz> Signed-off-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-rw-r--r--Documentation/i2c/busses/i2c-piix422
-rw-r--r--drivers/i2c/busses/i2c-piix4.c25
2 files changed, 17 insertions, 30 deletions
diff --git a/Documentation/i2c/busses/i2c-piix4 b/Documentation/i2c/busses/i2c-piix4
index 6e6c905143a1..10957bee7f64 100644
--- a/Documentation/i2c/busses/i2c-piix4
+++ b/Documentation/i2c/busses/i2c-piix4
@@ -23,8 +23,6 @@ Module Parameters
23 Forcibly enable the PIIX4. DANGEROUS! 23 Forcibly enable the PIIX4. DANGEROUS!
24* force_addr: int 24* force_addr: int
25 Forcibly enable the PIIX4 at the given address. EXTREMELY DANGEROUS! 25 Forcibly enable the PIIX4 at the given address. EXTREMELY DANGEROUS!
26* fix_hstcfg: int
27 Fix config register. Needed on some boards (Force CPCI735).
28 26
29 27
30Description 28Description
@@ -68,7 +66,19 @@ this driver on those mainboards.
68The ServerWorks Southbridges, the Intel 440MX, and the Victory766 are 66The ServerWorks Southbridges, the Intel 440MX, and the Victory766 are
69identical to the PIIX4 in I2C/SMBus support. 67identical to the PIIX4 in I2C/SMBus support.
70 68
71A few OSB4 southbridges are known to be misconfigured by the BIOS. In this 69If you own Force CPCI735 motherboard or other OSB4 based systems you may need
72case, you have you use the fix_hstcfg module parameter. Do not use it 70to change the SMBus Interrupt Select register so the SMBus controller uses
73unless you know you have to, because in some cases it also breaks 71the SMI mode.
74configuration on southbridges that don't need it. 72
731) Use lspci command and locate the PCI device with the SMBus controller:
74 00:0f.0 ISA bridge: ServerWorks OSB4 South Bridge (rev 4f)
75 The line may vary for different chipsets. Please consult the driver source
76 for all possible PCI ids (and lspci -n to match them). Lets assume the
77 device is located at 00:0f.0.
782) Now you just need to change the value in 0xD2 register. Get it first with
79 command: lspci -xxx -s 00:0f.0
80 If the value is 0x3 then you need to change it to 0x1
81 setpci -s 00:0f.0 d2.b=1
82
83Please note that you don't need to do that in all cases, just when the SMBus is
84not working properly.
diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c
index 5f06e81a2087..05af7b0292f4 100644
--- a/drivers/i2c/busses/i2c-piix4.c
+++ b/drivers/i2c/busses/i2c-piix4.c
@@ -102,13 +102,6 @@ MODULE_PARM_DESC(force_addr,
102 "Forcibly enable the PIIX4 at the given address. " 102 "Forcibly enable the PIIX4 at the given address. "
103 "EXTREMELY DANGEROUS!"); 103 "EXTREMELY DANGEROUS!");
104 104
105/* If fix_hstcfg is set to anything different from 0, we reset one of the
106 registers to be a valid value. */
107static int fix_hstcfg;
108module_param (fix_hstcfg, int, 0);
109MODULE_PARM_DESC(fix_hstcfg,
110 "Fix config register. Needed on some boards (Force CPCI735).");
111
112static int piix4_transaction(void); 105static int piix4_transaction(void);
113 106
114static unsigned short piix4_smba; 107static unsigned short piix4_smba;
@@ -166,22 +159,6 @@ static int __devinit piix4_setup(struct pci_dev *PIIX4_dev,
166 159
167 pci_read_config_byte(PIIX4_dev, SMBHSTCFG, &temp); 160 pci_read_config_byte(PIIX4_dev, SMBHSTCFG, &temp);
168 161
169 /* Some BIOS will set up the chipset incorrectly and leave a register
170 in an undefined state (causing I2C to act very strangely). */
171 if (temp & 0x02) {
172 if (fix_hstcfg) {
173 dev_info(&PIIX4_dev->dev, "Working around buggy BIOS "
174 "(I2C)\n");
175 temp &= 0xfd;
176 pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp);
177 } else {
178 dev_info(&PIIX4_dev->dev, "Unusual config register "
179 "value\n");
180 dev_info(&PIIX4_dev->dev, "Try using fix_hstcfg=1 if "
181 "you experience problems\n");
182 }
183 }
184
185 /* If force_addr is set, we program the new address here. Just to make 162 /* If force_addr is set, we program the new address here. Just to make
186 sure, we disable the PIIX4 first. */ 163 sure, we disable the PIIX4 first. */
187 if (force_addr) { 164 if (force_addr) {
@@ -214,7 +191,7 @@ static int __devinit piix4_setup(struct pci_dev *PIIX4_dev,
214 } 191 }
215 } 192 }
216 193
217 if ((temp & 0x0E) == 8) 194 if (((temp & 0x0E) == 8) || ((temp & 0x0E) == 2))
218 dev_dbg(&PIIX4_dev->dev, "Using Interrupt 9 for SMBus.\n"); 195 dev_dbg(&PIIX4_dev->dev, "Using Interrupt 9 for SMBus.\n");
219 else if ((temp & 0x0E) == 0) 196 else if ((temp & 0x0E) == 0)
220 dev_dbg(&PIIX4_dev->dev, "Using Interrupt SMI# for SMBus.\n"); 197 dev_dbg(&PIIX4_dev->dev, "Using Interrupt SMI# for SMBus.\n");