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authorJaehoon Chung <jh80.chung@samsung.com>2011-01-11 21:59:12 -0500
committerChris Ball <cjb@laptop.org>2011-01-26 00:27:57 -0500
commit548f07d2a36a4b085c059edb25edb3cd8d71fe3e (patch)
tree59a60ef6ec54d26e271ba2deb6fc1466a60363c8
parent3119cbda858fc9ae10a69919e5f278abd6d93bb5 (diff)
mmc: sdhci-s3c: add platform_8bit_width() hook
We have 8-bit width support but is not a v3 controller. So we need platform_8bit_width() to support 8-bit buswidth. Also we need MMC_CAP_8_BIT_DATA, so we add it in platdata. This gets 8-bit support working again on s3c, after we previously disabled 8-bit by default on non-v3 controllers. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org>
-rw-r--r--drivers/mmc/host/sdhci-s3c.c36
1 files changed, 36 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
index 17203586305c..5309ab95aada 100644
--- a/drivers/mmc/host/sdhci-s3c.c
+++ b/drivers/mmc/host/sdhci-s3c.c
@@ -277,10 +277,43 @@ static void sdhci_cmu_set_clock(struct sdhci_host *host, unsigned int clock)
277 host->clock = clock; 277 host->clock = clock;
278} 278}
279 279
280/**
281 * sdhci_s3c_platform_8bit_width - support 8bit buswidth
282 * @host: The SDHCI host being queried
283 * @width: MMC_BUS_WIDTH_ macro for the bus width being requested
284 *
285 * We have 8-bit width support but is not a v3 controller.
286 * So we add platform_8bit_width() and support 8bit width.
287 */
288static int sdhci_s3c_platform_8bit_width(struct sdhci_host *host, int width)
289{
290 u8 ctrl;
291
292 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
293
294 switch (width) {
295 case MMC_BUS_WIDTH_8:
296 ctrl |= SDHCI_CTRL_8BITBUS;
297 ctrl &= ~SDHCI_CTRL_4BITBUS;
298 break;
299 case MMC_BUS_WIDTH_4:
300 ctrl |= SDHCI_CTRL_4BITBUS;
301 ctrl &= ~SDHCI_CTRL_8BITBUS;
302 break;
303 default:
304 break;
305 }
306
307 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
308
309 return 0;
310}
311
280static struct sdhci_ops sdhci_s3c_ops = { 312static struct sdhci_ops sdhci_s3c_ops = {
281 .get_max_clock = sdhci_s3c_get_max_clk, 313 .get_max_clock = sdhci_s3c_get_max_clk,
282 .set_clock = sdhci_s3c_set_clock, 314 .set_clock = sdhci_s3c_set_clock,
283 .get_min_clock = sdhci_s3c_get_min_clock, 315 .get_min_clock = sdhci_s3c_get_min_clock,
316 .platform_8bit_width = sdhci_s3c_platform_8bit_width,
284}; 317};
285 318
286static void sdhci_s3c_notify_change(struct platform_device *dev, int state) 319static void sdhci_s3c_notify_change(struct platform_device *dev, int state)
@@ -473,6 +506,9 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev)
473 if (pdata->cd_type == S3C_SDHCI_CD_PERMANENT) 506 if (pdata->cd_type == S3C_SDHCI_CD_PERMANENT)
474 host->mmc->caps = MMC_CAP_NONREMOVABLE; 507 host->mmc->caps = MMC_CAP_NONREMOVABLE;
475 508
509 if (pdata->host_caps)
510 host->mmc->caps |= pdata->host_caps;
511
476 host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR | 512 host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR |
477 SDHCI_QUIRK_32BIT_DMA_SIZE); 513 SDHCI_QUIRK_32BIT_DMA_SIZE);
478 514