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authorLee Jones <lee.jones@linaro.org>2013-03-28 12:11:14 -0400
committerMark Brown <broonie@opensource.wolfsonmicro.com>2013-04-01 08:23:38 -0400
commit547f384f33dbd6171607f925ab246e25e315961e (patch)
tree95ce40b8ffd846948718b980b58a13ac66e09031
parenta6324709ab4e8a06cb61aa4f7aa3374679d5f426 (diff)
regulator: ab8500: add support for ab8505
To obtain full AB8505 regulator support, the AB8500 regulator driver first needs to know its register layout and their initialisation values for each. That information is provided via a couple of large data structures which we provide here. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat
-rw-r--r--arch/arm/mach-ux500/board-mop500-regulators.c511
-rw-r--r--arch/arm/mach-ux500/board-mop500-regulators.h1
-rw-r--r--drivers/regulator/ab8500.c617
-rw-r--r--include/linux/regulator/ab8500.h75
4 files changed, 1195 insertions, 9 deletions
diff --git a/arch/arm/mach-ux500/board-mop500-regulators.c b/arch/arm/mach-ux500/board-mop500-regulators.c
index c1173a161a04..816151903d46 100644
--- a/arch/arm/mach-ux500/board-mop500-regulators.c
+++ b/arch/arm/mach-ux500/board-mop500-regulators.c
@@ -5,6 +5,7 @@
5 * 5 *
6 * Authors: Sundar Iyer <sundar.iyer@stericsson.com> 6 * Authors: Sundar Iyer <sundar.iyer@stericsson.com>
7 * Bengt Jonsson <bengt.g.jonsson@stericsson.com> 7 * Bengt Jonsson <bengt.g.jonsson@stericsson.com>
8 * Daniel Willerud <daniel.willerud@stericsson.com>
8 * 9 *
9 * MOP500 board specific initialization for regulators 10 * MOP500 board specific initialization for regulators
10 */ 11 */
@@ -99,6 +100,27 @@ static struct regulator_consumer_supply ab8500_vaux3_consumers[] = {
99 REGULATOR_SUPPLY("vmmc", "sdi0"), 100 REGULATOR_SUPPLY("vmmc", "sdi0"),
100}; 101};
101 102
103static struct regulator_consumer_supply ab8505_vaux4_consumers[] = {
104};
105
106static struct regulator_consumer_supply ab8505_vaux5_consumers[] = {
107};
108
109static struct regulator_consumer_supply ab8505_vaux6_consumers[] = {
110};
111
112static struct regulator_consumer_supply ab8505_vaux8_consumers[] = {
113 /* AB8500 audio codec device */
114 REGULATOR_SUPPLY("v-aux8", NULL),
115};
116
117static struct regulator_consumer_supply ab8505_vadc_consumers[] = {
118 /* Internal general-purpose ADC */
119 REGULATOR_SUPPLY("vddadc", "ab8500-gpadc.0"),
120 /* ADC for charger */
121 REGULATOR_SUPPLY("vddadc", "ab8500-charger.0"),
122};
123
102static struct regulator_consumer_supply ab8500_vtvout_consumers[] = { 124static struct regulator_consumer_supply ab8500_vtvout_consumers[] = {
103 /* TV-out DENC supply */ 125 /* TV-out DENC supply */
104 REGULATOR_SUPPLY("vtvout", "ab8500-denc.0"), 126 REGULATOR_SUPPLY("vtvout", "ab8500-denc.0"),
@@ -133,6 +155,11 @@ static struct regulator_consumer_supply ab8500_vintcore_consumers[] = {
133 REGULATOR_SUPPLY("vddulpivio18", "ab8500-usb.0"), 155 REGULATOR_SUPPLY("vddulpivio18", "ab8500-usb.0"),
134}; 156};
135 157
158static struct regulator_consumer_supply ab8505_usb_consumers[] = {
159 /* HS USB OTG physical interface */
160 REGULATOR_SUPPLY("v-ape", NULL),
161};
162
136static struct regulator_consumer_supply ab8500_vana_consumers[] = { 163static struct regulator_consumer_supply ab8500_vana_consumers[] = {
137 /* External displays, connector on board, 1v8 power supply */ 164 /* External displays, connector on board, 1v8 power supply */
138 REGULATOR_SUPPLY("vsmps2", "mcde.0"), 165 REGULATOR_SUPPLY("vsmps2", "mcde.0"),
@@ -469,6 +496,450 @@ static struct regulator_init_data ab8500_ext_regulators[] = {
469 }, 496 },
470}; 497};
471 498
499/* ab8505 regulator register initialization */
500static struct ab8500_regulator_reg_init ab8505_reg_init[] = {
501 /*
502 * VarmRequestCtrl
503 * VsmpsCRequestCtrl
504 * VsmpsARequestCtrl
505 * VsmpsBRequestCtrl
506 */
507 INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL1, 0x00, 0x00),
508 /*
509 * VsafeRequestCtrl
510 * VpllRequestCtrl
511 * VanaRequestCtrl = HP/LP depending on VxRequest
512 */
513 INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL2, 0x30, 0x00),
514 /*
515 * Vaux1RequestCtrl = HP/LP depending on VxRequest
516 * Vaux2RequestCtrl = HP/LP depending on VxRequest
517 */
518 INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL3, 0xf0, 0x00),
519 /*
520 * Vaux3RequestCtrl = HP/LP depending on VxRequest
521 * SwHPReq = Control through SWValid disabled
522 */
523 INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL4, 0x07, 0x00),
524 /*
525 * VsmpsASysClkReq1HPValid
526 * VsmpsBSysClkReq1HPValid
527 * VsafeSysClkReq1HPValid
528 * VanaSysClkReq1HPValid = disabled
529 * VpllSysClkReq1HPValid
530 * Vaux1SysClkReq1HPValid = disabled
531 * Vaux2SysClkReq1HPValid = disabled
532 * Vaux3SysClkReq1HPValid = disabled
533 */
534 INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQ1HPVALID1, 0xe8, 0x00),
535 /*
536 * VsmpsCSysClkReq1HPValid
537 * VarmSysClkReq1HPValid
538 * VbbSysClkReq1HPValid
539 * VsmpsMSysClkReq1HPValid
540 */
541 INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQ1HPVALID2, 0x00, 0x00),
542 /*
543 * VsmpsAHwHPReq1Valid
544 * VsmpsBHwHPReq1Valid
545 * VsafeHwHPReq1Valid
546 * VanaHwHPReq1Valid = disabled
547 * VpllHwHPReq1Valid
548 * Vaux1HwHPreq1Valid = disabled
549 * Vaux2HwHPReq1Valid = disabled
550 * Vaux3HwHPReqValid = disabled
551 */
552 INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ1VALID1, 0xe8, 0x00),
553 /*
554 * VsmpsMHwHPReq1Valid
555 */
556 INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ1VALID2, 0x00, 0x00),
557 /*
558 * VsmpsAHwHPReq2Valid
559 * VsmpsBHwHPReq2Valid
560 * VsafeHwHPReq2Valid
561 * VanaHwHPReq2Valid = disabled
562 * VpllHwHPReq2Valid
563 * Vaux1HwHPReq2Valid = disabled
564 * Vaux2HwHPReq2Valid = disabled
565 * Vaux3HwHPReq2Valid = disabled
566 */
567 INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ2VALID1, 0xe8, 0x00),
568 /*
569 * VsmpsMHwHPReq2Valid
570 */
571 INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ2VALID2, 0x00, 0x00),
572 /**
573 * VsmpsCSwHPReqValid
574 * VarmSwHPReqValid
575 * VsmpsASwHPReqValid
576 * VsmpsBSwHPReqValid
577 * VsafeSwHPReqValid
578 * VanaSwHPReqValid
579 * VanaSwHPReqValid = disabled
580 * VpllSwHPReqValid
581 * Vaux1SwHPReqValid = disabled
582 */
583 INIT_REGULATOR_REGISTER(AB8505_REGUSWHPREQVALID1, 0xa0, 0x00),
584 /*
585 * Vaux2SwHPReqValid = disabled
586 * Vaux3SwHPReqValid = disabled
587 * VsmpsMSwHPReqValid
588 */
589 INIT_REGULATOR_REGISTER(AB8505_REGUSWHPREQVALID2, 0x03, 0x00),
590 /*
591 * SysClkReq2Valid1 = SysClkReq2 controlled
592 * SysClkReq3Valid1 = disabled
593 * SysClkReq4Valid1 = SysClkReq4 controlled
594 */
595 INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQVALID1, 0x0e, 0x0a),
596 /*
597 * SysClkReq2Valid2 = disabled
598 * SysClkReq3Valid2 = disabled
599 * SysClkReq4Valid2 = disabled
600 */
601 INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQVALID2, 0x0e, 0x00),
602 /*
603 * Vaux4SwHPReqValid
604 * Vaux4HwHPReq2Valid
605 * Vaux4HwHPReq1Valid
606 * Vaux4SysClkReq1HPValid
607 */
608 INIT_REGULATOR_REGISTER(AB8505_REGUVAUX4REQVALID, 0x00, 0x00),
609 /*
610 * VadcEna = disabled
611 * VintCore12Ena = disabled
612 * VintCore12Sel = 1.25 V
613 * VintCore12LP = inactive (HP)
614 * VadcLP = inactive (HP)
615 */
616 INIT_REGULATOR_REGISTER(AB8505_REGUMISC1, 0xfe, 0x10),
617 /*
618 * VaudioEna = disabled
619 * Vaux8Ena = disabled
620 * Vamic1Ena = disabled
621 * Vamic2Ena = disabled
622 */
623 INIT_REGULATOR_REGISTER(AB8505_VAUDIOSUPPLY, 0x1e, 0x00),
624 /*
625 * Vamic1_dzout = high-Z when Vamic1 is disabled
626 * Vamic2_dzout = high-Z when Vamic2 is disabled
627 */
628 INIT_REGULATOR_REGISTER(AB8505_REGUCTRL1VAMIC, 0x03, 0x00),
629 /*
630 * VsmpsARegu
631 * VsmpsASelCtrl
632 * VsmpsAAutoMode
633 * VsmpsAPWMMode
634 */
635 INIT_REGULATOR_REGISTER(AB8505_VSMPSAREGU, 0x00, 0x00),
636 /*
637 * VsmpsBRegu
638 * VsmpsBSelCtrl
639 * VsmpsBAutoMode
640 * VsmpsBPWMMode
641 */
642 INIT_REGULATOR_REGISTER(AB8505_VSMPSBREGU, 0x00, 0x00),
643 /*
644 * VsafeRegu
645 * VsafeSelCtrl
646 * VsafeAutoMode
647 * VsafePWMMode
648 */
649 INIT_REGULATOR_REGISTER(AB8505_VSAFEREGU, 0x00, 0x00),
650 /*
651 * VPll = Hw controlled (NOTE! PRCMU bits)
652 * VanaRegu = force off
653 */
654 INIT_REGULATOR_REGISTER(AB8505_VPLLVANAREGU, 0x0f, 0x02),
655 /*
656 * VextSupply1Regu = force OFF (OTP_ExtSupply12LPnPolarity 1)
657 * VextSupply2Regu = force OFF (OTP_ExtSupply12LPnPolarity 1)
658 * VextSupply3Regu = force OFF (OTP_ExtSupply3LPnPolarity 0)
659 * ExtSupply2Bypass = ExtSupply12LPn ball is 0 when Ena is 0
660 * ExtSupply3Bypass = ExtSupply3LPn ball is 0 when Ena is 0
661 */
662 INIT_REGULATOR_REGISTER(AB8505_EXTSUPPLYREGU, 0xff, 0x30),
663 /*
664 * Vaux1Regu = force HP
665 * Vaux2Regu = force off
666 */
667 INIT_REGULATOR_REGISTER(AB8505_VAUX12REGU, 0x0f, 0x01),
668 /*
669 * Vaux3Regu = force off
670 */
671 INIT_REGULATOR_REGISTER(AB8505_VRF1VAUX3REGU, 0x03, 0x00),
672 /*
673 * VsmpsASel1
674 */
675 INIT_REGULATOR_REGISTER(AB8505_VSMPSASEL1, 0x00, 0x00),
676 /*
677 * VsmpsASel2
678 */
679 INIT_REGULATOR_REGISTER(AB8505_VSMPSASEL2, 0x00, 0x00),
680 /*
681 * VsmpsASel3
682 */
683 INIT_REGULATOR_REGISTER(AB8505_VSMPSASEL3, 0x00, 0x00),
684 /*
685 * VsmpsBSel1
686 */
687 INIT_REGULATOR_REGISTER(AB8505_VSMPSBSEL1, 0x00, 0x00),
688 /*
689 * VsmpsBSel2
690 */
691 INIT_REGULATOR_REGISTER(AB8505_VSMPSBSEL2, 0x00, 0x00),
692 /*
693 * VsmpsBSel3
694 */
695 INIT_REGULATOR_REGISTER(AB8505_VSMPSBSEL3, 0x00, 0x00),
696 /*
697 * VsafeSel1
698 */
699 INIT_REGULATOR_REGISTER(AB8505_VSAFESEL1, 0x00, 0x00),
700 /*
701 * VsafeSel2
702 */
703 INIT_REGULATOR_REGISTER(AB8505_VSAFESEL2, 0x00, 0x00),
704 /*
705 * VsafeSel3
706 */
707 INIT_REGULATOR_REGISTER(AB8505_VSAFESEL3, 0x00, 0x00),
708 /*
709 * Vaux1Sel = 2.8 V
710 */
711 INIT_REGULATOR_REGISTER(AB8505_VAUX1SEL, 0x0f, 0x0C),
712 /*
713 * Vaux2Sel = 2.9 V
714 */
715 INIT_REGULATOR_REGISTER(AB8505_VAUX2SEL, 0x0f, 0x0d),
716 /*
717 * Vaux3Sel = 2.91 V
718 */
719 INIT_REGULATOR_REGISTER(AB8505_VRF1VAUX3SEL, 0x07, 0x07),
720 /*
721 * Vaux4RequestCtrl
722 */
723 INIT_REGULATOR_REGISTER(AB8505_VAUX4REQCTRL, 0x00, 0x00),
724 /*
725 * Vaux4Regu
726 */
727 INIT_REGULATOR_REGISTER(AB8505_VAUX4REGU, 0x00, 0x00),
728 /*
729 * Vaux4Sel
730 */
731 INIT_REGULATOR_REGISTER(AB8505_VAUX4SEL, 0x00, 0x00),
732 /*
733 * Vaux1Disch = short discharge time
734 * Vaux2Disch = short discharge time
735 * Vaux3Disch = short discharge time
736 * Vintcore12Disch = short discharge time
737 * VTVoutDisch = short discharge time
738 * VaudioDisch = short discharge time
739 */
740 INIT_REGULATOR_REGISTER(AB8505_REGUCTRLDISCH, 0xfc, 0x00),
741 /*
742 * VanaDisch = short discharge time
743 * Vaux8PullDownEna = pulldown disabled when Vaux8 is disabled
744 * Vaux8Disch = short discharge time
745 */
746 INIT_REGULATOR_REGISTER(AB8505_REGUCTRLDISCH2, 0x16, 0x00),
747 /*
748 * Vaux4Disch = short discharge time
749 */
750 INIT_REGULATOR_REGISTER(AB8505_REGUCTRLDISCH3, 0x01, 0x00),
751 /*
752 * Vaux5Sel
753 * Vaux5LP
754 * Vaux5Ena
755 * Vaux5Disch
756 * Vaux5DisSfst
757 * Vaux5DisPulld
758 */
759 INIT_REGULATOR_REGISTER(AB8505_CTRLVAUX5, 0x00, 0x00),
760 /*
761 * Vaux6Sel
762 * Vaux6LP
763 * Vaux6Ena
764 * Vaux6DisPulld
765 */
766 INIT_REGULATOR_REGISTER(AB8505_CTRLVAUX6, 0x00, 0x00),
767};
768
769struct regulator_init_data ab8505_regulators[AB8505_NUM_REGULATORS] = {
770 /* supplies to the display/camera */
771 [AB8505_LDO_AUX1] = {
772 .constraints = {
773 .name = "V-DISPLAY",
774 .min_uV = 2800000,
775 .max_uV = 3300000,
776 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
777 REGULATOR_CHANGE_STATUS,
778 .boot_on = 1, /* display is on at boot */
779 },
780 .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux1_consumers),
781 .consumer_supplies = ab8500_vaux1_consumers,
782 },
783 /* supplies to the on-board eMMC */
784 [AB8505_LDO_AUX2] = {
785 .constraints = {
786 .name = "V-eMMC1",
787 .min_uV = 1100000,
788 .max_uV = 3300000,
789 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
790 REGULATOR_CHANGE_STATUS |
791 REGULATOR_CHANGE_MODE,
792 .valid_modes_mask = REGULATOR_MODE_NORMAL |
793 REGULATOR_MODE_IDLE,
794 },
795 .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux2_consumers),
796 .consumer_supplies = ab8500_vaux2_consumers,
797 },
798 /* supply for VAUX3, supplies to SDcard slots */
799 [AB8505_LDO_AUX3] = {
800 .constraints = {
801 .name = "V-MMC-SD",
802 .min_uV = 1100000,
803 .max_uV = 3300000,
804 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
805 REGULATOR_CHANGE_STATUS |
806 REGULATOR_CHANGE_MODE,
807 .valid_modes_mask = REGULATOR_MODE_NORMAL |
808 REGULATOR_MODE_IDLE,
809 },
810 .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux3_consumers),
811 .consumer_supplies = ab8500_vaux3_consumers,
812 },
813 /* supply for VAUX4, supplies to NFC and standalone secure element */
814 [AB8505_LDO_AUX4] = {
815 .constraints = {
816 .name = "V-NFC-SE",
817 .min_uV = 1100000,
818 .max_uV = 3300000,
819 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
820 REGULATOR_CHANGE_STATUS |
821 REGULATOR_CHANGE_MODE,
822 .valid_modes_mask = REGULATOR_MODE_NORMAL |
823 REGULATOR_MODE_IDLE,
824 },
825 .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux4_consumers),
826 .consumer_supplies = ab8505_vaux4_consumers,
827 },
828 /* supply for VAUX5, supplies to TBD */
829 [AB8505_LDO_AUX5] = {
830 .constraints = {
831 .name = "V-AUX5",
832 .min_uV = 1050000,
833 .max_uV = 2790000,
834 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
835 REGULATOR_CHANGE_STATUS |
836 REGULATOR_CHANGE_MODE,
837 .valid_modes_mask = REGULATOR_MODE_NORMAL |
838 REGULATOR_MODE_IDLE,
839 },
840 .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux5_consumers),
841 .consumer_supplies = ab8505_vaux5_consumers,
842 },
843 /* supply for VAUX6, supplies to TBD */
844 [AB8505_LDO_AUX6] = {
845 .constraints = {
846 .name = "V-AUX6",
847 .min_uV = 1050000,
848 .max_uV = 2790000,
849 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
850 REGULATOR_CHANGE_STATUS |
851 REGULATOR_CHANGE_MODE,
852 .valid_modes_mask = REGULATOR_MODE_NORMAL |
853 REGULATOR_MODE_IDLE,
854 },
855 .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux6_consumers),
856 .consumer_supplies = ab8505_vaux6_consumers,
857 },
858 /* supply for gpadc, ADC LDO */
859 [AB8505_LDO_ADC] = {
860 .constraints = {
861 .name = "V-ADC",
862 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
863 },
864 .num_consumer_supplies = ARRAY_SIZE(ab8505_vadc_consumers),
865 .consumer_supplies = ab8505_vadc_consumers,
866 },
867 /* supply for ab8500-vaudio, VAUDIO LDO */
868 [AB8505_LDO_AUDIO] = {
869 .constraints = {
870 .name = "V-AUD",
871 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
872 },
873 .num_consumer_supplies = ARRAY_SIZE(ab8500_vaud_consumers),
874 .consumer_supplies = ab8500_vaud_consumers,
875 },
876 /* supply for v-anamic1 VAMic1-LDO */
877 [AB8505_LDO_ANAMIC1] = {
878 .constraints = {
879 .name = "V-AMIC1",
880 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
881 },
882 .num_consumer_supplies = ARRAY_SIZE(ab8500_vamic1_consumers),
883 .consumer_supplies = ab8500_vamic1_consumers,
884 },
885 /* supply for v-amic2, VAMIC2 LDO, reuse constants for AMIC1 */
886 [AB8505_LDO_ANAMIC2] = {
887 .constraints = {
888 .name = "V-AMIC2",
889 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
890 },
891 .num_consumer_supplies = ARRAY_SIZE(ab8500_vamic2_consumers),
892 .consumer_supplies = ab8500_vamic2_consumers,
893 },
894 /* supply for v-aux8, VAUX8 LDO */
895 [AB8505_LDO_AUX8] = {
896 .constraints = {
897 .name = "V-AUX8",
898 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
899 },
900 .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux8_consumers),
901 .consumer_supplies = ab8505_vaux8_consumers,
902 },
903 /* supply for v-intcore12, VINTCORE12 LDO */
904 [AB8505_LDO_INTCORE] = {
905 .constraints = {
906 .name = "V-INTCORE",
907 .min_uV = 1250000,
908 .max_uV = 1350000,
909 .input_uV = 1800000,
910 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
911 REGULATOR_CHANGE_STATUS |
912 REGULATOR_CHANGE_MODE |
913 REGULATOR_CHANGE_DRMS,
914 .valid_modes_mask = REGULATOR_MODE_NORMAL |
915 REGULATOR_MODE_IDLE,
916 },
917 .num_consumer_supplies = ARRAY_SIZE(ab8500_vintcore_consumers),
918 .consumer_supplies = ab8500_vintcore_consumers,
919 },
920 /* supply for LDO USB */
921 [AB8505_LDO_USB] = {
922 .constraints = {
923 .name = "V-USB",
924 .valid_ops_mask = REGULATOR_CHANGE_STATUS |
925 REGULATOR_CHANGE_MODE,
926 .valid_modes_mask = REGULATOR_MODE_NORMAL |
927 REGULATOR_MODE_IDLE,
928 },
929 .num_consumer_supplies = ARRAY_SIZE(ab8505_usb_consumers),
930 .consumer_supplies = ab8505_usb_consumers,
931 },
932 /* supply for U8500 CSI-DSI, VANA LDO */
933 [AB8505_LDO_ANA] = {
934 .constraints = {
935 .name = "V-CSI-DSI",
936 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
937 },
938 .num_consumer_supplies = ARRAY_SIZE(ab8500_vana_consumers),
939 .consumer_supplies = ab8500_vana_consumers,
940 },
941};
942
472struct ab8500_regulator_platform_data ab8500_regulator_plat_data = { 943struct ab8500_regulator_platform_data ab8500_regulator_plat_data = {
473 .reg_init = ab8500_reg_init, 944 .reg_init = ab8500_reg_init,
474 .num_reg_init = ARRAY_SIZE(ab8500_reg_init), 945 .num_reg_init = ARRAY_SIZE(ab8500_reg_init),
@@ -478,18 +949,39 @@ struct ab8500_regulator_platform_data ab8500_regulator_plat_data = {
478 .num_ext_regulator = ARRAY_SIZE(ab8500_ext_regulators), 949 .num_ext_regulator = ARRAY_SIZE(ab8500_ext_regulators),
479}; 950};
480 951
952/* Use the AB8500 init settings for AB8505 as they are the same right now */
953struct ab8500_regulator_platform_data ab8505_regulator_plat_data = {
954 .reg_init = ab8505_reg_init,
955 .num_reg_init = ARRAY_SIZE(ab8505_reg_init),
956 .regulator = ab8505_regulators,
957 .num_regulator = ARRAY_SIZE(ab8505_regulators),
958};
959
481static void ab8500_modify_reg_init(int id, u8 mask, u8 value) 960static void ab8500_modify_reg_init(int id, u8 mask, u8 value)
482{ 961{
483 int i; 962 int i;
484 963
485 for (i = ARRAY_SIZE(ab8500_reg_init) - 1; i >= 0; i--) { 964 if (cpu_is_u8520()) {
486 if (ab8500_reg_init[i].id == id) { 965 for (i = ARRAY_SIZE(ab8505_reg_init) - 1; i >= 0; i--) {
487 u8 initval = ab8500_reg_init[i].value; 966 if (ab8505_reg_init[i].id == id) {
488 initval = (initval & ~mask) | (value & mask); 967 u8 initval = ab8505_reg_init[i].value;
489 ab8500_reg_init[i].value = initval; 968 initval = (initval & ~mask) | (value & mask);
969 ab8505_reg_init[i].value = initval;
490 970
491 BUG_ON(mask & ~ab8500_reg_init[i].mask); 971 BUG_ON(mask & ~ab8505_reg_init[i].mask);
492 return; 972 return;
973 }
974 }
975 } else {
976 for (i = ARRAY_SIZE(ab8500_reg_init) - 1; i >= 0; i--) {
977 if (ab8500_reg_init[i].id == id) {
978 u8 initval = ab8500_reg_init[i].value;
979 initval = (initval & ~mask) | (value & mask);
980 ab8500_reg_init[i].value = initval;
981
982 BUG_ON(mask & ~ab8500_reg_init[i].mask);
983 return;
984 }
493 } 985 }
494 } 986 }
495 987
@@ -511,6 +1003,11 @@ void mop500_regulator_init(void)
511 regulator->constraints.state_standby.disabled = 1; 1003 regulator->constraints.state_standby.disabled = 1;
512 } 1004 }
513 1005
1006 if (cpu_is_u8520()) {
1007 /* Vaux2 initialized to be on */
1008 ab8500_modify_reg_init(AB8505_VAUX12REGU, 0x0f, 0x05);
1009 }
1010
514 /* 1011 /*
515 * Handle AB8500_EXT_SUPPLY2 on HREFP_V20_V50 boards (do it for 1012 * Handle AB8500_EXT_SUPPLY2 on HREFP_V20_V50 boards (do it for
516 * all HREFP_V20 boards) 1013 * all HREFP_V20 boards)
diff --git a/arch/arm/mach-ux500/board-mop500-regulators.h b/arch/arm/mach-ux500/board-mop500-regulators.h
index 3d4c412d0b7a..9bece38fe933 100644
--- a/arch/arm/mach-ux500/board-mop500-regulators.h
+++ b/arch/arm/mach-ux500/board-mop500-regulators.h
@@ -15,6 +15,7 @@
15#include <linux/regulator/ab8500.h> 15#include <linux/regulator/ab8500.h>
16 16
17extern struct ab8500_regulator_platform_data ab8500_regulator_plat_data; 17extern struct ab8500_regulator_platform_data ab8500_regulator_plat_data;
18extern struct ab8500_regulator_platform_data ab8505_regulator_plat_data;
18extern struct regulator_init_data tps61052_regulator; 19extern struct regulator_init_data tps61052_regulator;
19extern struct regulator_init_data gpio_en_3v3_regulator; 20extern struct regulator_init_data gpio_en_3v3_regulator;
20 21
diff --git a/drivers/regulator/ab8500.c b/drivers/regulator/ab8500.c
index 9de3a211b0b4..1ab0f8a7c862 100644
--- a/drivers/regulator/ab8500.c
+++ b/drivers/regulator/ab8500.c
@@ -5,11 +5,15 @@
5 * 5 *
6 * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson 6 * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
7 * Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson 7 * Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
8 * Daniel Willerud <daniel.willerud@stericsson.com> for ST-Ericsson
8 * 9 *
9 * AB8500 peripheral regulators 10 * AB8500 peripheral regulators
10 * 11 *
11 * AB8500 supports the following regulators: 12 * AB8500 supports the following regulators:
12 * VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA 13 * VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
14 *
15 * AB8505 supports the following regulators:
16 * VAUX1/2/3/4/5/6, VINTCORE, VADC, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
13 */ 17 */
14#include <linux/init.h> 18#include <linux/init.h>
15#include <linux/kernel.h> 19#include <linux/kernel.h>
@@ -92,6 +96,17 @@ static const unsigned int ldo_vaux3_voltages[] = {
92 2910000, 96 2910000,
93}; 97};
94 98
99static const int ldo_vaux56_voltages[] = {
100 1800000,
101 1050000,
102 1100000,
103 1200000,
104 1500000,
105 2200000,
106 2500000,
107 2790000,
108};
109
95static const unsigned int ldo_vintcore_voltages[] = { 110static const unsigned int ldo_vintcore_voltages[] = {
96 1200000, 111 1200000,
97 1225000, 112 1225000,
@@ -589,6 +604,313 @@ static struct ab8500_regulator_info
589 }, 604 },
590}; 605};
591 606
607/* AB8505 regulator information */
608static struct ab8500_regulator_info
609 ab8505_regulator_info[AB8505_NUM_REGULATORS] = {
610 /*
611 * Variable Voltage Regulators
612 * name, min mV, max mV,
613 * update bank, reg, mask, enable val
614 * volt bank, reg, mask, table, table length
615 */
616 [AB8505_LDO_AUX1] = {
617 .desc = {
618 .name = "LDO-AUX1",
619 .ops = &ab8500_regulator_volt_mode_ops,
620 .type = REGULATOR_VOLTAGE,
621 .id = AB8500_LDO_AUX1,
622 .owner = THIS_MODULE,
623 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
624 },
625 .min_uV = 1100000,
626 .max_uV = 3300000,
627 .load_lp_uA = 5000,
628 .update_bank = 0x04,
629 .update_reg = 0x09,
630 .update_mask = 0x03,
631 .update_val = 0x01,
632 .update_val_idle = 0x03,
633 .update_val_normal = 0x01,
634 .voltage_bank = 0x04,
635 .voltage_reg = 0x1f,
636 .voltage_mask = 0x0f,
637 .voltages = ldo_vauxn_voltages,
638 .voltages_len = ARRAY_SIZE(ldo_vauxn_voltages),
639 },
640 [AB8505_LDO_AUX2] = {
641 .desc = {
642 .name = "LDO-AUX2",
643 .ops = &ab8500_regulator_volt_mode_ops,
644 .type = REGULATOR_VOLTAGE,
645 .id = AB8500_LDO_AUX2,
646 .owner = THIS_MODULE,
647 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
648 },
649 .min_uV = 1100000,
650 .max_uV = 3300000,
651 .load_lp_uA = 5000,
652 .update_bank = 0x04,
653 .update_reg = 0x09,
654 .update_mask = 0x0c,
655 .update_val = 0x04,
656 .update_val_idle = 0x0c,
657 .update_val_normal = 0x04,
658 .voltage_bank = 0x04,
659 .voltage_reg = 0x20,
660 .voltage_mask = 0x0f,
661 .voltages = ldo_vauxn_voltages,
662 .voltages_len = ARRAY_SIZE(ldo_vauxn_voltages),
663 },
664 [AB8505_LDO_AUX3] = {
665 .desc = {
666 .name = "LDO-AUX3",
667 .ops = &ab8500_regulator_volt_mode_ops,
668 .type = REGULATOR_VOLTAGE,
669 .id = AB8500_LDO_AUX3,
670 .owner = THIS_MODULE,
671 .n_voltages = ARRAY_SIZE(ldo_vaux3_voltages),
672 },
673 .min_uV = 1100000,
674 .max_uV = 3300000,
675 .load_lp_uA = 5000,
676 .update_bank = 0x04,
677 .update_reg = 0x0a,
678 .update_mask = 0x03,
679 .update_val = 0x01,
680 .update_val_idle = 0x03,
681 .update_val_normal = 0x01,
682 .voltage_bank = 0x04,
683 .voltage_reg = 0x21,
684 .voltage_mask = 0x07,
685 .voltages = ldo_vaux3_voltages,
686 .voltages_len = ARRAY_SIZE(ldo_vaux3_voltages),
687 },
688 [AB8505_LDO_AUX4] = {
689 .desc = {
690 .name = "LDO-AUX4",
691 .ops = &ab8500_regulator_volt_mode_ops,
692 .type = REGULATOR_VOLTAGE,
693 .id = AB9540_LDO_AUX4,
694 .owner = THIS_MODULE,
695 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
696 },
697 .min_uV = 1100000,
698 .max_uV = 3300000,
699 .load_lp_uA = 5000,
700 /* values for Vaux4Regu register */
701 .update_bank = 0x04,
702 .update_reg = 0x2e,
703 .update_mask = 0x03,
704 .update_val = 0x01,
705 .update_val_idle = 0x03,
706 .update_val_normal = 0x01,
707 /* values for Vaux4SEL register */
708 .voltage_bank = 0x04,
709 .voltage_reg = 0x2f,
710 .voltage_mask = 0x0f,
711 .voltages = ldo_vauxn_voltages,
712 .voltages_len = ARRAY_SIZE(ldo_vauxn_voltages),
713 },
714 [AB8505_LDO_AUX5] = {
715 .desc = {
716 .name = "LDO-AUX5",
717 .ops = &ab8500_regulator_volt_mode_ops,
718 .type = REGULATOR_VOLTAGE,
719 .id = AB8505_LDO_AUX5,
720 .owner = THIS_MODULE,
721 .n_voltages = ARRAY_SIZE(ldo_vaux56_voltages),
722 },
723 .min_uV = 1050000,
724 .max_uV = 2790000,
725 .load_lp_uA = 2000,
726 /* values for CtrlVaux5 register */
727 .update_bank = 0x01,
728 .update_reg = 0x55,
729 .update_mask = 0x08,
730 .update_val = 0x00,
731 .update_val_idle = 0x01,
732 .update_val_normal = 0x00,
733 .voltage_bank = 0x01,
734 .voltage_reg = 0x55,
735 .voltage_mask = 0x07,
736 .voltages = ldo_vaux56_voltages,
737 .voltages_len = ARRAY_SIZE(ldo_vaux56_voltages),
738 },
739 [AB8505_LDO_AUX6] = {
740 .desc = {
741 .name = "LDO-AUX6",
742 .ops = &ab8500_regulator_volt_mode_ops,
743 .type = REGULATOR_VOLTAGE,
744 .id = AB8505_LDO_AUX6,
745 .owner = THIS_MODULE,
746 .n_voltages = ARRAY_SIZE(ldo_vaux56_voltages),
747 },
748 .min_uV = 1050000,
749 .max_uV = 2790000,
750 .load_lp_uA = 2000,
751 /* values for CtrlVaux6 register */
752 .update_bank = 0x01,
753 .update_reg = 0x56,
754 .update_mask = 0x08,
755 .update_val = 0x00,
756 .update_val_idle = 0x01,
757 .update_val_normal = 0x00,
758 .voltage_bank = 0x01,
759 .voltage_reg = 0x56,
760 .voltage_mask = 0x07,
761 .voltages = ldo_vaux56_voltages,
762 .voltages_len = ARRAY_SIZE(ldo_vaux56_voltages),
763 },
764 [AB8505_LDO_INTCORE] = {
765 .desc = {
766 .name = "LDO-INTCORE",
767 .ops = &ab8500_regulator_volt_mode_ops,
768 .type = REGULATOR_VOLTAGE,
769 .id = AB8500_LDO_INTCORE,
770 .owner = THIS_MODULE,
771 .n_voltages = ARRAY_SIZE(ldo_vintcore_voltages),
772 },
773 .min_uV = 1100000,
774 .max_uV = 3300000,
775 .load_lp_uA = 5000,
776 .update_bank = 0x03,
777 .update_reg = 0x80,
778 .update_mask = 0x44,
779 .update_val = 0x04,
780 .update_val_idle = 0x44,
781 .update_val_normal = 0x04,
782 .voltage_bank = 0x03,
783 .voltage_reg = 0x80,
784 .voltage_mask = 0x38,
785 .voltages = ldo_vintcore_voltages,
786 .voltages_len = ARRAY_SIZE(ldo_vintcore_voltages),
787 .voltage_shift = 3,
788 },
789
790 /*
791 * Fixed Voltage Regulators
792 * name, fixed mV,
793 * update bank, reg, mask, enable val
794 */
795 [AB8505_LDO_ADC] = {
796 .desc = {
797 .name = "LDO-ADC",
798 .ops = &ab8500_regulator_mode_ops,
799 .type = REGULATOR_VOLTAGE,
800 .id = AB8505_LDO_ADC,
801 .owner = THIS_MODULE,
802 .n_voltages = 1,
803 },
804 .delay = 10000,
805 .fixed_uV = 2000000,
806 .load_lp_uA = 1000,
807 .update_bank = 0x03,
808 .update_reg = 0x80,
809 .update_mask = 0x82,
810 .update_val = 0x02,
811 .update_val_idle = 0x82,
812 .update_val_normal = 0x02,
813 },
814 [AB8505_LDO_USB] = {
815 .desc = {
816 .name = "LDO-USB",
817 .ops = &ab8500_regulator_mode_ops,
818 .type = REGULATOR_VOLTAGE,
819 .id = AB9540_LDO_USB,
820 .owner = THIS_MODULE,
821 .n_voltages = 1,
822 },
823 .fixed_uV = 3300000,
824 .update_bank = 0x03,
825 .update_reg = 0x82,
826 .update_mask = 0x03,
827 .update_val = 0x01,
828 .update_val_idle = 0x03,
829 .update_val_normal = 0x01,
830 },
831 [AB8505_LDO_AUDIO] = {
832 .desc = {
833 .name = "LDO-AUDIO",
834 .ops = &ab8500_regulator_ops,
835 .type = REGULATOR_VOLTAGE,
836 .id = AB8500_LDO_AUDIO,
837 .owner = THIS_MODULE,
838 .n_voltages = 1,
839 },
840 .fixed_uV = 2000000,
841 .update_bank = 0x03,
842 .update_reg = 0x83,
843 .update_mask = 0x02,
844 .update_val = 0x02,
845 },
846 [AB8505_LDO_ANAMIC1] = {
847 .desc = {
848 .name = "LDO-ANAMIC1",
849 .ops = &ab8500_regulator_ops,
850 .type = REGULATOR_VOLTAGE,
851 .id = AB8500_LDO_ANAMIC1,
852 .owner = THIS_MODULE,
853 .n_voltages = 1,
854 },
855 .fixed_uV = 2050000,
856 .update_bank = 0x03,
857 .update_reg = 0x83,
858 .update_mask = 0x08,
859 .update_val = 0x08,
860 },
861 [AB8505_LDO_ANAMIC2] = {
862 .desc = {
863 .name = "LDO-ANAMIC2",
864 .ops = &ab8500_regulator_ops,
865 .type = REGULATOR_VOLTAGE,
866 .id = AB8500_LDO_ANAMIC2,
867 .owner = THIS_MODULE,
868 .n_voltages = 1,
869 },
870 .fixed_uV = 2050000,
871 .update_bank = 0x03,
872 .update_reg = 0x83,
873 .update_mask = 0x10,
874 .update_val = 0x10,
875 },
876 [AB8505_LDO_AUX8] = {
877 .desc = {
878 .name = "LDO-AUX8",
879 .ops = &ab8500_regulator_ops,
880 .type = REGULATOR_VOLTAGE,
881 .id = AB8505_LDO_AUX8,
882 .owner = THIS_MODULE,
883 .n_voltages = 1,
884 },
885 .fixed_uV = 1800000,
886 .update_bank = 0x03,
887 .update_reg = 0x83,
888 .update_mask = 0x04,
889 .update_val = 0x04,
890 },
891 /*
892 * Regulators with fixed voltage and normal/idle modes
893 */
894 [AB8505_LDO_ANA] = {
895 .desc = {
896 .name = "LDO-ANA",
897 .ops = &ab8500_regulator_mode_ops,
898 .type = REGULATOR_VOLTAGE,
899 .id = AB8500_LDO_ANA,
900 .owner = THIS_MODULE,
901 .n_voltages = 1,
902 },
903 .fixed_uV = 1200000,
904 .load_lp_uA = 1000,
905 .update_bank = 0x04,
906 .update_reg = 0x06,
907 .update_mask = 0x0c,
908 .update_val = 0x04,
909 .update_val_idle = 0x0c,
910 .update_val_normal = 0x04,
911 },
912};
913
592/* AB9540 regulator information */ 914/* AB9540 regulator information */
593static struct ab8500_regulator_info 915static struct ab8500_regulator_info
594 ab9540_regulator_info[AB9540_NUM_REGULATORS] = { 916 ab9540_regulator_info[AB9540_NUM_REGULATORS] = {
@@ -1031,6 +1353,276 @@ static struct ab8500_reg_init ab8500_reg_init[] = {
1031 REG_INIT(AB8500_REGUCTRLDISCH2, 0x04, 0x44, 0x16), 1353 REG_INIT(AB8500_REGUCTRLDISCH2, 0x04, 0x44, 0x16),
1032}; 1354};
1033 1355
1356/* AB8505 register init */
1357static struct ab8500_reg_init ab8505_reg_init[] = {
1358 /*
1359 * 0x03, VarmRequestCtrl
1360 * 0x0c, VsmpsCRequestCtrl
1361 * 0x30, VsmpsARequestCtrl
1362 * 0xc0, VsmpsBRequestCtrl
1363 */
1364 REG_INIT(AB8505_REGUREQUESTCTRL1, 0x03, 0x03, 0xff),
1365 /*
1366 * 0x03, VsafeRequestCtrl
1367 * 0x0c, VpllRequestCtrl
1368 * 0x30, VanaRequestCtrl
1369 */
1370 REG_INIT(AB8505_REGUREQUESTCTRL2, 0x03, 0x04, 0x3f),
1371 /*
1372 * 0x30, Vaux1RequestCtrl
1373 * 0xc0, Vaux2RequestCtrl
1374 */
1375 REG_INIT(AB8505_REGUREQUESTCTRL3, 0x03, 0x05, 0xf0),
1376 /*
1377 * 0x03, Vaux3RequestCtrl
1378 * 0x04, SwHPReq
1379 */
1380 REG_INIT(AB8505_REGUREQUESTCTRL4, 0x03, 0x06, 0x07),
1381 /*
1382 * 0x01, VsmpsASysClkReq1HPValid
1383 * 0x02, VsmpsBSysClkReq1HPValid
1384 * 0x04, VsafeSysClkReq1HPValid
1385 * 0x08, VanaSysClkReq1HPValid
1386 * 0x10, VpllSysClkReq1HPValid
1387 * 0x20, Vaux1SysClkReq1HPValid
1388 * 0x40, Vaux2SysClkReq1HPValid
1389 * 0x80, Vaux3SysClkReq1HPValid
1390 */
1391 REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
1392 /*
1393 * 0x01, VsmpsCSysClkReq1HPValid
1394 * 0x02, VarmSysClkReq1HPValid
1395 * 0x04, VbbSysClkReq1HPValid
1396 * 0x08, VsmpsMSysClkReq1HPValid
1397 */
1398 REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x0f),
1399 /*
1400 * 0x01, VsmpsAHwHPReq1Valid
1401 * 0x02, VsmpsBHwHPReq1Valid
1402 * 0x04, VsafeHwHPReq1Valid
1403 * 0x08, VanaHwHPReq1Valid
1404 * 0x10, VpllHwHPReq1Valid
1405 * 0x20, Vaux1HwHPReq1Valid
1406 * 0x40, Vaux2HwHPReq1Valid
1407 * 0x80, Vaux3HwHPReq1Valid
1408 */
1409 REG_INIT(AB8505_REGUHWHPREQ1VALID1, 0x03, 0x09, 0xff),
1410 /*
1411 * 0x08, VsmpsMHwHPReq1Valid
1412 */
1413 REG_INIT(AB8505_REGUHWHPREQ1VALID2, 0x03, 0x0a, 0x08),
1414 /*
1415 * 0x01, VsmpsAHwHPReq2Valid
1416 * 0x02, VsmpsBHwHPReq2Valid
1417 * 0x04, VsafeHwHPReq2Valid
1418 * 0x08, VanaHwHPReq2Valid
1419 * 0x10, VpllHwHPReq2Valid
1420 * 0x20, Vaux1HwHPReq2Valid
1421 * 0x40, Vaux2HwHPReq2Valid
1422 * 0x80, Vaux3HwHPReq2Valid
1423 */
1424 REG_INIT(AB8505_REGUHWHPREQ2VALID1, 0x03, 0x0b, 0xff),
1425 /*
1426 * 0x08, VsmpsMHwHPReq2Valid
1427 */
1428 REG_INIT(AB8505_REGUHWHPREQ2VALID2, 0x03, 0x0c, 0x08),
1429 /*
1430 * 0x01, VsmpsCSwHPReqValid
1431 * 0x02, VarmSwHPReqValid
1432 * 0x04, VsmpsASwHPReqValid
1433 * 0x08, VsmpsBSwHPReqValid
1434 * 0x10, VsafeSwHPReqValid
1435 * 0x20, VanaSwHPReqValid
1436 * 0x40, VpllSwHPReqValid
1437 * 0x80, Vaux1SwHPReqValid
1438 */
1439 REG_INIT(AB8505_REGUSWHPREQVALID1, 0x03, 0x0d, 0xff),
1440 /*
1441 * 0x01, Vaux2SwHPReqValid
1442 * 0x02, Vaux3SwHPReqValid
1443 * 0x20, VsmpsMSwHPReqValid
1444 */
1445 REG_INIT(AB8505_REGUSWHPREQVALID2, 0x03, 0x0e, 0x23),
1446 /*
1447 * 0x02, SysClkReq2Valid1
1448 * 0x04, SysClkReq3Valid1
1449 * 0x08, SysClkReq4Valid1
1450 */
1451 REG_INIT(AB8505_REGUSYSCLKREQVALID1, 0x03, 0x0f, 0x0e),
1452 /*
1453 * 0x02, SysClkReq2Valid2
1454 * 0x04, SysClkReq3Valid2
1455 * 0x08, SysClkReq4Valid2
1456 */
1457 REG_INIT(AB8505_REGUSYSCLKREQVALID2, 0x03, 0x10, 0x0e),
1458 /*
1459 * 0x01, Vaux4SwHPReqValid
1460 * 0x02, Vaux4HwHPReq2Valid
1461 * 0x04, Vaux4HwHPReq1Valid
1462 * 0x08, Vaux4SysClkReq1HPValid
1463 */
1464 REG_INIT(AB8505_REGUVAUX4REQVALID, 0x03, 0x11, 0x0f),
1465 /*
1466 * 0x02, VadcEna
1467 * 0x04, VintCore12Ena
1468 * 0x38, VintCore12Sel
1469 * 0x40, VintCore12LP
1470 * 0x80, VadcLP
1471 */
1472 REG_INIT(AB8505_REGUMISC1, 0x03, 0x80, 0xfe),
1473 /*
1474 * 0x02, VaudioEna
1475 * 0x04, VdmicEna
1476 * 0x08, Vamic1Ena
1477 * 0x10, Vamic2Ena
1478 */
1479 REG_INIT(AB8505_VAUDIOSUPPLY, 0x03, 0x83, 0x1e),
1480 /*
1481 * 0x01, Vamic1_dzout
1482 * 0x02, Vamic2_dzout
1483 */
1484 REG_INIT(AB8505_REGUCTRL1VAMIC, 0x03, 0x84, 0x03),
1485 /*
1486 * 0x03, VsmpsARegu
1487 * 0x0c, VsmpsASelCtrl
1488 * 0x10, VsmpsAAutoMode
1489 * 0x20, VsmpsAPWMMode
1490 */
1491 REG_INIT(AB8505_VSMPSAREGU, 0x04, 0x03, 0x3f),
1492 /*
1493 * 0x03, VsmpsBRegu
1494 * 0x0c, VsmpsBSelCtrl
1495 * 0x10, VsmpsBAutoMode
1496 * 0x20, VsmpsBPWMMode
1497 */
1498 REG_INIT(AB8505_VSMPSBREGU, 0x04, 0x04, 0x3f),
1499 /*
1500 * 0x03, VsafeRegu
1501 * 0x0c, VsafeSelCtrl
1502 * 0x10, VsafeAutoMode
1503 * 0x20, VsafePWMMode
1504 */
1505 REG_INIT(AB8505_VSAFEREGU, 0x04, 0x05, 0x3f),
1506 /*
1507 * 0x03, VpllRegu (NOTE! PRCMU register bits)
1508 * 0x0c, VanaRegu
1509 */
1510 REG_INIT(AB8505_VPLLVANAREGU, 0x04, 0x06, 0x0f),
1511 /*
1512 * 0x03, VextSupply1Regu
1513 * 0x0c, VextSupply2Regu
1514 * 0x30, VextSupply3Regu
1515 * 0x40, ExtSupply2Bypass
1516 * 0x80, ExtSupply3Bypass
1517 */
1518 REG_INIT(AB8505_EXTSUPPLYREGU, 0x04, 0x08, 0xff),
1519 /*
1520 * 0x03, Vaux1Regu
1521 * 0x0c, Vaux2Regu
1522 */
1523 REG_INIT(AB8505_VAUX12REGU, 0x04, 0x09, 0x0f),
1524 /*
1525 * 0x0f, Vaux3Regu
1526 */
1527 REG_INIT(AB8505_VRF1VAUX3REGU, 0x04, 0x0a, 0x0f),
1528 /*
1529 * 0x3f, VsmpsASel1
1530 */
1531 REG_INIT(AB8505_VSMPSASEL1, 0x04, 0x13, 0x3f),
1532 /*
1533 * 0x3f, VsmpsASel2
1534 */
1535 REG_INIT(AB8505_VSMPSASEL2, 0x04, 0x14, 0x3f),
1536 /*
1537 * 0x3f, VsmpsASel3
1538 */
1539 REG_INIT(AB8505_VSMPSASEL3, 0x04, 0x15, 0x3f),
1540 /*
1541 * 0x3f, VsmpsBSel1
1542 */
1543 REG_INIT(AB8505_VSMPSBSEL1, 0x04, 0x17, 0x3f),
1544 /*
1545 * 0x3f, VsmpsBSel2
1546 */
1547 REG_INIT(AB8505_VSMPSBSEL2, 0x04, 0x18, 0x3f),
1548 /*
1549 * 0x3f, VsmpsBSel3
1550 */
1551 REG_INIT(AB8505_VSMPSBSEL3, 0x04, 0x19, 0x3f),
1552 /*
1553 * 0x7f, VsafeSel1
1554 */
1555 REG_INIT(AB8505_VSAFESEL1, 0x04, 0x1b, 0x7f),
1556 /*
1557 * 0x3f, VsafeSel2
1558 */
1559 REG_INIT(AB8505_VSAFESEL2, 0x04, 0x1c, 0x7f),
1560 /*
1561 * 0x3f, VsafeSel3
1562 */
1563 REG_INIT(AB8505_VSAFESEL3, 0x04, 0x1d, 0x7f),
1564 /*
1565 * 0x0f, Vaux1Sel
1566 */
1567 REG_INIT(AB8505_VAUX1SEL, 0x04, 0x1f, 0x0f),
1568 /*
1569 * 0x0f, Vaux2Sel
1570 */
1571 REG_INIT(AB8505_VAUX2SEL, 0x04, 0x20, 0x0f),
1572 /*
1573 * 0x07, Vaux3Sel
1574 * 0x30, VRF1Sel
1575 */
1576 REG_INIT(AB8505_VRF1VAUX3SEL, 0x04, 0x21, 0x37),
1577 /*
1578 * 0x03, Vaux4RequestCtrl
1579 */
1580 REG_INIT(AB8505_VAUX4REQCTRL, 0x04, 0x2d, 0x03),
1581 /*
1582 * 0x03, Vaux4Regu
1583 */
1584 REG_INIT(AB8505_VAUX4REGU, 0x04, 0x2e, 0x03),
1585 /*
1586 * 0x0f, Vaux4Sel
1587 */
1588 REG_INIT(AB8505_VAUX4SEL, 0x04, 0x2f, 0x0f),
1589 /*
1590 * 0x04, Vaux1Disch
1591 * 0x08, Vaux2Disch
1592 * 0x10, Vaux3Disch
1593 * 0x20, Vintcore12Disch
1594 * 0x40, VTVoutDisch
1595 * 0x80, VaudioDisch
1596 */
1597 REG_INIT(AB8505_REGUCTRLDISCH, 0x04, 0x43, 0xfc),
1598 /*
1599 * 0x02, VanaDisch
1600 * 0x04, VdmicPullDownEna
1601 * 0x10, VdmicDisch
1602 */
1603 REG_INIT(AB8505_REGUCTRLDISCH2, 0x04, 0x44, 0x16),
1604 /*
1605 * 0x01, Vaux4Disch
1606 */
1607 REG_INIT(AB8505_REGUCTRLDISCH3, 0x04, 0x48, 0x01),
1608 /*
1609 * 0x07, Vaux5Sel
1610 * 0x08, Vaux5LP
1611 * 0x10, Vaux5Ena
1612 * 0x20, Vaux5Disch
1613 * 0x40, Vaux5DisSfst
1614 * 0x80, Vaux5DisPulld
1615 */
1616 REG_INIT(AB8505_CTRLVAUX5, 0x01, 0x55, 0xff),
1617 /*
1618 * 0x07, Vaux6Sel
1619 * 0x08, Vaux6LP
1620 * 0x10, Vaux6Ena
1621 * 0x80, Vaux6DisPulld
1622 */
1623 REG_INIT(AB8505_CTRLVAUX6, 0x01, 0x56, 0x9f),
1624};
1625
1034/* AB9540 register init */ 1626/* AB9540 register init */
1035static struct ab8500_reg_init ab9540_reg_init[] = { 1627static struct ab8500_reg_init ab9540_reg_init[] = {
1036 /* 1628 /*
@@ -1396,6 +1988,22 @@ static struct of_regulator_match ab8500_regulator_match[] = {
1396 { .name = "ab8500_ldo_ana", .driver_data = (void *) AB8500_LDO_ANA, }, 1988 { .name = "ab8500_ldo_ana", .driver_data = (void *) AB8500_LDO_ANA, },
1397}; 1989};
1398 1990
1991static struct of_regulator_match ab8505_regulator_match[] = {
1992 { .name = "ab8500_ldo_aux1", .driver_data = (void *) AB8505_LDO_AUX1, },
1993 { .name = "ab8500_ldo_aux2", .driver_data = (void *) AB8505_LDO_AUX2, },
1994 { .name = "ab8500_ldo_aux3", .driver_data = (void *) AB8505_LDO_AUX3, },
1995 { .name = "ab8500_ldo_aux4", .driver_data = (void *) AB8505_LDO_AUX4, },
1996 { .name = "ab8500_ldo_aux5", .driver_data = (void *) AB8505_LDO_AUX5, },
1997 { .name = "ab8500_ldo_aux6", .driver_data = (void *) AB8505_LDO_AUX6, },
1998 { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8505_LDO_INTCORE, },
1999 { .name = "ab8500_ldo_adc", .driver_data = (void *) AB8505_LDO_ADC, },
2000 { .name = "ab8500_ldo_audio", .driver_data = (void *) AB8505_LDO_AUDIO, },
2001 { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8505_LDO_ANAMIC1, },
2002 { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB8505_LDO_ANAMIC2, },
2003 { .name = "ab8500_ldo_aux8", .driver_data = (void *) AB8505_LDO_AUX8, },
2004 { .name = "ab8500_ldo_ana", .driver_data = (void *) AB8505_LDO_ANA, },
2005};
2006
1399static struct of_regulator_match ab9540_regulator_match[] = { 2007static struct of_regulator_match ab9540_regulator_match[] = {
1400 { .name = "ab8500_ldo_aux1", .driver_data = (void *) AB9540_LDO_AUX1, }, 2008 { .name = "ab8500_ldo_aux1", .driver_data = (void *) AB9540_LDO_AUX1, },
1401 { .name = "ab8500_ldo_aux2", .driver_data = (void *) AB9540_LDO_AUX2, }, 2009 { .name = "ab8500_ldo_aux2", .driver_data = (void *) AB9540_LDO_AUX2, },
@@ -1450,6 +2058,11 @@ static int ab8500_regulator_probe(struct platform_device *pdev)
1450 reg_init_size = AB9540_NUM_REGULATOR_REGISTERS; 2058 reg_init_size = AB9540_NUM_REGULATOR_REGISTERS;
1451 match = ab9540_regulator_match; 2059 match = ab9540_regulator_match;
1452 match_size = ARRAY_SIZE(ab9540_regulator_match) 2060 match_size = ARRAY_SIZE(ab9540_regulator_match)
2061 } else if (is_ab8505(ab8500)) {
2062 regulator_info = ab8505_regulator_info;
2063 regulator_info_size = ARRAY_SIZE(ab8505_regulator_info);
2064 reg_init = ab8505_reg_init;
2065 reg_init_size = AB8505_NUM_REGULATOR_REGISTERS;
1453 } else { 2066 } else {
1454 regulator_info = ab8500_regulator_info; 2067 regulator_info = ab8500_regulator_info;
1455 regulator_info_size = ARRAY_SIZE(ab8500_regulator_info); 2068 regulator_info_size = ARRAY_SIZE(ab8500_regulator_info);
@@ -1543,6 +2156,9 @@ static int ab8500_regulator_remove(struct platform_device *pdev)
1543 if (is_ab9540(ab8500)) { 2156 if (is_ab9540(ab8500)) {
1544 regulator_info = ab9540_regulator_info; 2157 regulator_info = ab9540_regulator_info;
1545 regulator_info_size = ARRAY_SIZE(ab9540_regulator_info); 2158 regulator_info_size = ARRAY_SIZE(ab9540_regulator_info);
2159 } else if (is_ab8505(ab8500)) {
2160 regulator_info = ab8505_regulator_info;
2161 regulator_info_size = ARRAY_SIZE(ab8505_regulator_info);
1546 } else { 2162 } else {
1547 regulator_info = ab8500_regulator_info; 2163 regulator_info = ab8500_regulator_info;
1548 regulator_info_size = ARRAY_SIZE(ab8500_regulator_info); 2164 regulator_info_size = ARRAY_SIZE(ab8500_regulator_info);
@@ -1601,5 +2217,6 @@ module_exit(ab8500_regulator_exit);
1601MODULE_LICENSE("GPL v2"); 2217MODULE_LICENSE("GPL v2");
1602MODULE_AUTHOR("Sundar Iyer <sundar.iyer@stericsson.com>"); 2218MODULE_AUTHOR("Sundar Iyer <sundar.iyer@stericsson.com>");
1603MODULE_AUTHOR("Bengt Jonsson <bengt.g.jonsson@stericsson.com>"); 2219MODULE_AUTHOR("Bengt Jonsson <bengt.g.jonsson@stericsson.com>");
2220MODULE_AUTHOR("Daniel Willerud <daniel.willerud@stericsson.com>");
1604MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC"); 2221MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC");
1605MODULE_ALIAS("platform:ab8500-regulator"); 2222MODULE_ALIAS("platform:ab8500-regulator");
diff --git a/include/linux/regulator/ab8500.h b/include/linux/regulator/ab8500.h
index 592a3f3994c0..9a7cf97e5040 100644
--- a/include/linux/regulator/ab8500.h
+++ b/include/linux/regulator/ab8500.h
@@ -5,6 +5,7 @@
5 * 5 *
6 * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson 6 * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
7 * Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson 7 * Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
8 * Daniel Willerud <daniel.willerud@stericsson.com> for ST-Ericsson
8 */ 9 */
9 10
10#ifndef __LINUX_MFD_AB8500_REGULATOR_H 11#ifndef __LINUX_MFD_AB8500_REGULATOR_H
@@ -27,7 +28,28 @@ enum ab8500_regulator_id {
27 AB8500_NUM_REGULATORS, 28 AB8500_NUM_REGULATORS,
28}; 29};
29 30
30/* AB9450 regulators */ 31/* AB8505 regulators */
32enum ab8505_regulator_id {
33 AB8505_LDO_AUX1,
34 AB8505_LDO_AUX2,
35 AB8505_LDO_AUX3,
36 AB8505_LDO_AUX4,
37 AB8505_LDO_AUX5,
38 AB8505_LDO_AUX6,
39 AB8505_LDO_INTCORE,
40 AB8505_LDO_ADC,
41 AB8505_LDO_USB,
42 AB8505_LDO_AUDIO,
43 AB8505_LDO_ANAMIC1,
44 AB8505_LDO_ANAMIC2,
45 AB8505_LDO_AUX8,
46 AB8505_LDO_ANA,
47 AB8505_SYSCLKREQ_2,
48 AB8505_SYSCLKREQ_4,
49 AB8505_NUM_REGULATORS,
50};
51
52/* AB9540 regulators */
31enum ab9540_regulator_id { 53enum ab9540_regulator_id {
32 AB9540_LDO_AUX1, 54 AB9540_LDO_AUX1,
33 AB9540_LDO_AUX2, 55 AB9540_LDO_AUX2,
@@ -46,7 +68,7 @@ enum ab9540_regulator_id {
46 AB9540_NUM_REGULATORS, 68 AB9540_NUM_REGULATORS,
47}; 69};
48 70
49/* AB8500 and AB9540 register initialization */ 71/* AB8500, AB8505, and AB9540 register initialization */
50struct ab8500_regulator_reg_init { 72struct ab8500_regulator_reg_init {
51 int id; 73 int id;
52 u8 mask; 74 u8 mask;
@@ -92,6 +114,55 @@ enum ab8500_regulator_reg {
92 AB8500_NUM_REGULATOR_REGISTERS, 114 AB8500_NUM_REGULATOR_REGISTERS,
93}; 115};
94 116
117/* AB8505 registers */
118enum ab8505_regulator_reg {
119 AB8505_REGUREQUESTCTRL1,
120 AB8505_REGUREQUESTCTRL2,
121 AB8505_REGUREQUESTCTRL3,
122 AB8505_REGUREQUESTCTRL4,
123 AB8505_REGUSYSCLKREQ1HPVALID1,
124 AB8505_REGUSYSCLKREQ1HPVALID2,
125 AB8505_REGUHWHPREQ1VALID1,
126 AB8505_REGUHWHPREQ1VALID2,
127 AB8505_REGUHWHPREQ2VALID1,
128 AB8505_REGUHWHPREQ2VALID2,
129 AB8505_REGUSWHPREQVALID1,
130 AB8505_REGUSWHPREQVALID2,
131 AB8505_REGUSYSCLKREQVALID1,
132 AB8505_REGUSYSCLKREQVALID2,
133 AB8505_REGUVAUX4REQVALID,
134 AB8505_REGUMISC1,
135 AB8505_VAUDIOSUPPLY,
136 AB8505_REGUCTRL1VAMIC,
137 AB8505_VSMPSAREGU,
138 AB8505_VSMPSBREGU,
139 AB8505_VSAFEREGU, /* NOTE! PRCMU register */
140 AB8505_VPLLVANAREGU,
141 AB8505_EXTSUPPLYREGU,
142 AB8505_VAUX12REGU,
143 AB8505_VRF1VAUX3REGU,
144 AB8505_VSMPSASEL1,
145 AB8505_VSMPSASEL2,
146 AB8505_VSMPSASEL3,
147 AB8505_VSMPSBSEL1,
148 AB8505_VSMPSBSEL2,
149 AB8505_VSMPSBSEL3,
150 AB8505_VSAFESEL1, /* NOTE! PRCMU register */
151 AB8505_VSAFESEL2, /* NOTE! PRCMU register */
152 AB8505_VSAFESEL3, /* NOTE! PRCMU register */
153 AB8505_VAUX1SEL,
154 AB8505_VAUX2SEL,
155 AB8505_VRF1VAUX3SEL,
156 AB8505_VAUX4REQCTRL,
157 AB8505_VAUX4REGU,
158 AB8505_VAUX4SEL,
159 AB8505_REGUCTRLDISCH,
160 AB8505_REGUCTRLDISCH2,
161 AB8505_REGUCTRLDISCH3,
162 AB8505_CTRLVAUX5,
163 AB8505_CTRLVAUX6,
164 AB8505_NUM_REGULATOR_REGISTERS,
165};
95 166
96/* AB9540 registers */ 167/* AB9540 registers */
97enum ab9540_regulator_reg { 168enum ab9540_regulator_reg {
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