ARM: at91: at91sam9x5: add DT parameters to enable PMECC

Default ecc correctable setting is 2bits in 512 bytes.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>

2 files changed, 8 insertions, 1 deletions

diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 8ecca6948d81..8c8907757bf3 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -518,7 +518,11 @@
                         #address-cells = <1>;
                         #size-cells = <1>;
                         reg = <0x40000000 0x10000000
+                               0xffffe000 0x600         /* PMECC Registers */
+                               0xffffe600 0x200         /* PMECC Error Location Registers */
+                               0x00108000 0x18000       /* PMECC looup table in ROM code  */
                               >;
+                        atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
                         atmel,nand-addr-offset = <21>;
                         atmel,nand-cmd-offset = <22>;
                         pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/at91sam9x5cm.dtsi b/arch/arm/boot/dts/at91sam9x5cm.dtsi
index 31e7be23703d..4027ac7e4502 100644
--- a/arch/arm/boot/dts/at91sam9x5cm.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5cm.dtsi
@@ -26,7 +26,10 @@
         ahb {
                 nand0: nand@40000000 {
                         nand-bus-width = <8>;
-                        nand-ecc-mode = "soft";
+                        nand-ecc-mode = "hw";
+                        atmel,has-pmecc;        /* Enable PMECC */
+                        atmel,pmecc-cap = <2>;
+                        atmel,pmecc-sector-size = <512>;
                         nand-on-flash-bbt;
                         status = "okay";