diff options
author | Arnd Bergmann <arnd@arndb.de> | 2006-11-20 12:45:12 -0500 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2006-12-04 04:40:07 -0500 |
commit | 5231800c6fb99c106951a5e1a8e739ad9657e93f (patch) | |
tree | bed1dfa4ced8348314ea67363775c38ec3a8b3bc | |
parent | c6730ed4c280ff9e55766796523c94a7d111da09 (diff) |
[POWERPC] cell: Add symbol exports for oprofile
Add symbol-exports for the new routines in arch/powerpc/platforms/cell/pmu.c.
They are needed for Oprofile, which can be built as a module.
Signed-off-by: Kevin Corry <kevcorry@us.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
-rw-r--r-- | arch/powerpc/platforms/cell/pmu.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/powerpc/platforms/cell/pmu.c b/arch/powerpc/platforms/cell/pmu.c index 30d17ce236a7..22ac732b1f89 100644 --- a/arch/powerpc/platforms/cell/pmu.c +++ b/arch/powerpc/platforms/cell/pmu.c | |||
@@ -85,6 +85,7 @@ u32 cbe_read_phys_ctr(u32 cpu, u32 phys_ctr) | |||
85 | 85 | ||
86 | return val; | 86 | return val; |
87 | } | 87 | } |
88 | EXPORT_SYMBOL_GPL(cbe_read_phys_ctr); | ||
88 | 89 | ||
89 | void cbe_write_phys_ctr(u32 cpu, u32 phys_ctr, u32 val) | 90 | void cbe_write_phys_ctr(u32 cpu, u32 phys_ctr, u32 val) |
90 | { | 91 | { |
@@ -111,6 +112,7 @@ void cbe_write_phys_ctr(u32 cpu, u32 phys_ctr, u32 val) | |||
111 | } | 112 | } |
112 | } | 113 | } |
113 | } | 114 | } |
115 | EXPORT_SYMBOL_GPL(cbe_write_phys_ctr); | ||
114 | 116 | ||
115 | /* | 117 | /* |
116 | * "Logical" counter registers. | 118 | * "Logical" counter registers. |
@@ -130,6 +132,7 @@ u32 cbe_read_ctr(u32 cpu, u32 ctr) | |||
130 | 132 | ||
131 | return val; | 133 | return val; |
132 | } | 134 | } |
135 | EXPORT_SYMBOL_GPL(cbe_read_ctr); | ||
133 | 136 | ||
134 | void cbe_write_ctr(u32 cpu, u32 ctr, u32 val) | 137 | void cbe_write_ctr(u32 cpu, u32 ctr, u32 val) |
135 | { | 138 | { |
@@ -149,6 +152,7 @@ void cbe_write_ctr(u32 cpu, u32 ctr, u32 val) | |||
149 | 152 | ||
150 | cbe_write_phys_ctr(cpu, phys_ctr, val); | 153 | cbe_write_phys_ctr(cpu, phys_ctr, val); |
151 | } | 154 | } |
155 | EXPORT_SYMBOL_GPL(cbe_write_ctr); | ||
152 | 156 | ||
153 | /* | 157 | /* |
154 | * Counter-control registers. | 158 | * Counter-control registers. |
@@ -164,12 +168,14 @@ u32 cbe_read_pm07_control(u32 cpu, u32 ctr) | |||
164 | 168 | ||
165 | return pm07_control; | 169 | return pm07_control; |
166 | } | 170 | } |
171 | EXPORT_SYMBOL_GPL(cbe_read_pm07_control); | ||
167 | 172 | ||
168 | void cbe_write_pm07_control(u32 cpu, u32 ctr, u32 val) | 173 | void cbe_write_pm07_control(u32 cpu, u32 ctr, u32 val) |
169 | { | 174 | { |
170 | if (ctr < NR_CTRS) | 175 | if (ctr < NR_CTRS) |
171 | WRITE_WO_MMIO(pm07_control[ctr], val); | 176 | WRITE_WO_MMIO(pm07_control[ctr], val); |
172 | } | 177 | } |
178 | EXPORT_SYMBOL_GPL(cbe_write_pm07_control); | ||
173 | 179 | ||
174 | /* | 180 | /* |
175 | * Other PMU control registers. Most of these are write-only. | 181 | * Other PMU control registers. Most of these are write-only. |
@@ -215,6 +221,7 @@ u32 cbe_read_pm(u32 cpu, enum pm_reg_name reg) | |||
215 | 221 | ||
216 | return val; | 222 | return val; |
217 | } | 223 | } |
224 | EXPORT_SYMBOL_GPL(cbe_read_pm); | ||
218 | 225 | ||
219 | void cbe_write_pm(u32 cpu, enum pm_reg_name reg, u32 val) | 226 | void cbe_write_pm(u32 cpu, enum pm_reg_name reg, u32 val) |
220 | { | 227 | { |
@@ -252,6 +259,7 @@ void cbe_write_pm(u32 cpu, enum pm_reg_name reg, u32 val) | |||
252 | break; | 259 | break; |
253 | } | 260 | } |
254 | } | 261 | } |
262 | EXPORT_SYMBOL_GPL(cbe_write_pm); | ||
255 | 263 | ||
256 | /* | 264 | /* |
257 | * Get/set the size of a physical counter to either 16 or 32 bits. | 265 | * Get/set the size of a physical counter to either 16 or 32 bits. |
@@ -268,6 +276,7 @@ u32 cbe_get_ctr_size(u32 cpu, u32 phys_ctr) | |||
268 | 276 | ||
269 | return size; | 277 | return size; |
270 | } | 278 | } |
279 | EXPORT_SYMBOL_GPL(cbe_get_ctr_size); | ||
271 | 280 | ||
272 | void cbe_set_ctr_size(u32 cpu, u32 phys_ctr, u32 ctr_size) | 281 | void cbe_set_ctr_size(u32 cpu, u32 phys_ctr, u32 ctr_size) |
273 | { | 282 | { |
@@ -287,6 +296,7 @@ void cbe_set_ctr_size(u32 cpu, u32 phys_ctr, u32 ctr_size) | |||
287 | cbe_write_pm(cpu, pm_control, pm_ctrl); | 296 | cbe_write_pm(cpu, pm_control, pm_ctrl); |
288 | } | 297 | } |
289 | } | 298 | } |
299 | EXPORT_SYMBOL_GPL(cbe_set_ctr_size); | ||
290 | 300 | ||
291 | /* | 301 | /* |
292 | * Enable/disable the entire performance monitoring unit. | 302 | * Enable/disable the entire performance monitoring unit. |
@@ -304,6 +314,7 @@ void cbe_enable_pm(u32 cpu) | |||
304 | pm_ctrl = cbe_read_pm(cpu, pm_control) | CBE_PM_ENABLE_PERF_MON; | 314 | pm_ctrl = cbe_read_pm(cpu, pm_control) | CBE_PM_ENABLE_PERF_MON; |
305 | cbe_write_pm(cpu, pm_control, pm_ctrl); | 315 | cbe_write_pm(cpu, pm_control, pm_ctrl); |
306 | } | 316 | } |
317 | EXPORT_SYMBOL_GPL(cbe_enable_pm); | ||
307 | 318 | ||
308 | void cbe_disable_pm(u32 cpu) | 319 | void cbe_disable_pm(u32 cpu) |
309 | { | 320 | { |
@@ -311,6 +322,7 @@ void cbe_disable_pm(u32 cpu) | |||
311 | pm_ctrl = cbe_read_pm(cpu, pm_control) & ~CBE_PM_ENABLE_PERF_MON; | 322 | pm_ctrl = cbe_read_pm(cpu, pm_control) & ~CBE_PM_ENABLE_PERF_MON; |
312 | cbe_write_pm(cpu, pm_control, pm_ctrl); | 323 | cbe_write_pm(cpu, pm_control, pm_ctrl); |
313 | } | 324 | } |
325 | EXPORT_SYMBOL_GPL(cbe_disable_pm); | ||
314 | 326 | ||
315 | /* | 327 | /* |
316 | * Reading from the trace_buffer. | 328 | * Reading from the trace_buffer. |
@@ -325,4 +337,5 @@ void cbe_read_trace_buffer(u32 cpu, u64 *buf) | |||
325 | *buf++ = in_be64(&pmd_regs->trace_buffer_0_63); | 337 | *buf++ = in_be64(&pmd_regs->trace_buffer_0_63); |
326 | *buf++ = in_be64(&pmd_regs->trace_buffer_64_127); | 338 | *buf++ = in_be64(&pmd_regs->trace_buffer_64_127); |
327 | } | 339 | } |
340 | EXPORT_SYMBOL_GPL(cbe_read_trace_buffer); | ||
328 | 341 | ||