diff options
author | John W. Linville <linville@tuxdriver.com> | 2010-11-24 16:49:20 -0500 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2010-11-24 16:49:20 -0500 |
commit | 51cce8a590c4696d62bfacc63378d1036084cef7 (patch) | |
tree | dc24485bdff37ca6a83c69e93ffdbe5c5807b59d | |
parent | 2fe66ec242d3f76e3b0101f36419e7e5405bcff3 (diff) | |
parent | 4f8559383c41262b50dc758e2e310f257ce6a14d (diff) |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next-2.6 into for-davem
170 files changed, 12074 insertions, 1974 deletions
diff --git a/drivers/net/wireless/ath/ar9170/cmd.c b/drivers/net/wireless/ath/ar9170/cmd.c index 4604de09a8b2..6452c5055a63 100644 --- a/drivers/net/wireless/ath/ar9170/cmd.c +++ b/drivers/net/wireless/ath/ar9170/cmd.c | |||
@@ -54,7 +54,7 @@ int ar9170_write_mem(struct ar9170 *ar, const __le32 *data, size_t len) | |||
54 | 54 | ||
55 | int ar9170_write_reg(struct ar9170 *ar, const u32 reg, const u32 val) | 55 | int ar9170_write_reg(struct ar9170 *ar, const u32 reg, const u32 val) |
56 | { | 56 | { |
57 | __le32 buf[2] = { | 57 | const __le32 buf[2] = { |
58 | cpu_to_le32(reg), | 58 | cpu_to_le32(reg), |
59 | cpu_to_le32(val), | 59 | cpu_to_le32(val), |
60 | }; | 60 | }; |
diff --git a/drivers/net/wireless/ath/ath.h b/drivers/net/wireless/ath/ath.h index 501050c0296f..20ea68c59f7b 100644 --- a/drivers/net/wireless/ath/ath.h +++ b/drivers/net/wireless/ath/ath.h | |||
@@ -104,6 +104,11 @@ enum ath_cipher { | |||
104 | ATH_CIPHER_MIC = 127 | 104 | ATH_CIPHER_MIC = 127 |
105 | }; | 105 | }; |
106 | 106 | ||
107 | enum ath_drv_info { | ||
108 | AR7010_DEVICE = BIT(0), | ||
109 | AR9287_DEVICE = BIT(1), | ||
110 | }; | ||
111 | |||
107 | /** | 112 | /** |
108 | * struct ath_ops - Register read/write operations | 113 | * struct ath_ops - Register read/write operations |
109 | * | 114 | * |
@@ -147,6 +152,7 @@ struct ath_common { | |||
147 | u8 rx_chainmask; | 152 | u8 rx_chainmask; |
148 | 153 | ||
149 | u32 rx_bufsize; | 154 | u32 rx_bufsize; |
155 | u32 driver_info; | ||
150 | 156 | ||
151 | u32 keymax; | 157 | u32 keymax; |
152 | DECLARE_BITMAP(keymap, ATH_KEYMAX); | 158 | DECLARE_BITMAP(keymap, ATH_KEYMAX); |
diff --git a/drivers/net/wireless/ath/ath5k/Kconfig b/drivers/net/wireless/ath/ath5k/Kconfig index eb83b7b4d0e3..47844575caa3 100644 --- a/drivers/net/wireless/ath/ath5k/Kconfig +++ b/drivers/net/wireless/ath/ath5k/Kconfig | |||
@@ -4,6 +4,7 @@ config ATH5K | |||
4 | select MAC80211_LEDS | 4 | select MAC80211_LEDS |
5 | select LEDS_CLASS | 5 | select LEDS_CLASS |
6 | select NEW_LEDS | 6 | select NEW_LEDS |
7 | select AVERAGE | ||
7 | ---help--- | 8 | ---help--- |
8 | This module adds support for wireless adapters based on | 9 | This module adds support for wireless adapters based on |
9 | Atheros 5xxx chipset. | 10 | Atheros 5xxx chipset. |
diff --git a/drivers/net/wireless/ath/ath5k/ani.c b/drivers/net/wireless/ath/ath5k/ani.c index f1419198a479..6b75b22a929a 100644 --- a/drivers/net/wireless/ath/ath5k/ani.c +++ b/drivers/net/wireless/ath/ath5k/ani.c | |||
@@ -63,15 +63,15 @@ ath5k_ani_set_noise_immunity_level(struct ath5k_hw *ah, int level) | |||
63 | * so i stick with the HAL version for now... | 63 | * so i stick with the HAL version for now... |
64 | */ | 64 | */ |
65 | #if 0 | 65 | #if 0 |
66 | const s8 hi[] = { -18, -18, -16, -14, -12 }; | 66 | static const s8 hi[] = { -18, -18, -16, -14, -12 }; |
67 | const s8 lo[] = { -52, -56, -60, -64, -70 }; | 67 | static const s8 lo[] = { -52, -56, -60, -64, -70 }; |
68 | const s8 sz[] = { -34, -41, -48, -55, -62 }; | 68 | static const s8 sz[] = { -34, -41, -48, -55, -62 }; |
69 | const s8 fr[] = { -70, -72, -75, -78, -80 }; | 69 | static const s8 fr[] = { -70, -72, -75, -78, -80 }; |
70 | #else | 70 | #else |
71 | const s8 sz[] = { -55, -62 }; | 71 | static const s8 sz[] = { -55, -62 }; |
72 | const s8 lo[] = { -64, -70 }; | 72 | static const s8 lo[] = { -64, -70 }; |
73 | const s8 hi[] = { -14, -12 }; | 73 | static const s8 hi[] = { -14, -12 }; |
74 | const s8 fr[] = { -78, -80 }; | 74 | static const s8 fr[] = { -78, -80 }; |
75 | #endif | 75 | #endif |
76 | if (level < 0 || level >= ARRAY_SIZE(sz)) { | 76 | if (level < 0 || level >= ARRAY_SIZE(sz)) { |
77 | ATH5K_ERR(ah->ah_sc, "noise immuniy level %d out of range", | 77 | ATH5K_ERR(ah->ah_sc, "noise immuniy level %d out of range", |
@@ -102,7 +102,7 @@ ath5k_ani_set_noise_immunity_level(struct ath5k_hw *ah, int level) | |||
102 | void | 102 | void |
103 | ath5k_ani_set_spur_immunity_level(struct ath5k_hw *ah, int level) | 103 | ath5k_ani_set_spur_immunity_level(struct ath5k_hw *ah, int level) |
104 | { | 104 | { |
105 | const int val[] = { 2, 4, 6, 8, 10, 12, 14, 16 }; | 105 | static const int val[] = { 2, 4, 6, 8, 10, 12, 14, 16 }; |
106 | 106 | ||
107 | if (level < 0 || level >= ARRAY_SIZE(val) || | 107 | if (level < 0 || level >= ARRAY_SIZE(val) || |
108 | level > ah->ah_sc->ani_state.max_spur_level) { | 108 | level > ah->ah_sc->ani_state.max_spur_level) { |
@@ -127,7 +127,7 @@ ath5k_ani_set_spur_immunity_level(struct ath5k_hw *ah, int level) | |||
127 | void | 127 | void |
128 | ath5k_ani_set_firstep_level(struct ath5k_hw *ah, int level) | 128 | ath5k_ani_set_firstep_level(struct ath5k_hw *ah, int level) |
129 | { | 129 | { |
130 | const int val[] = { 0, 4, 8 }; | 130 | static const int val[] = { 0, 4, 8 }; |
131 | 131 | ||
132 | if (level < 0 || level >= ARRAY_SIZE(val)) { | 132 | if (level < 0 || level >= ARRAY_SIZE(val)) { |
133 | ATH5K_ERR(ah->ah_sc, "firstep level %d out of range", level); | 133 | ATH5K_ERR(ah->ah_sc, "firstep level %d out of range", level); |
@@ -151,12 +151,12 @@ ath5k_ani_set_firstep_level(struct ath5k_hw *ah, int level) | |||
151 | void | 151 | void |
152 | ath5k_ani_set_ofdm_weak_signal_detection(struct ath5k_hw *ah, bool on) | 152 | ath5k_ani_set_ofdm_weak_signal_detection(struct ath5k_hw *ah, bool on) |
153 | { | 153 | { |
154 | const int m1l[] = { 127, 50 }; | 154 | static const int m1l[] = { 127, 50 }; |
155 | const int m2l[] = { 127, 40 }; | 155 | static const int m2l[] = { 127, 40 }; |
156 | const int m1[] = { 127, 0x4d }; | 156 | static const int m1[] = { 127, 0x4d }; |
157 | const int m2[] = { 127, 0x40 }; | 157 | static const int m2[] = { 127, 0x40 }; |
158 | const int m2cnt[] = { 31, 16 }; | 158 | static const int m2cnt[] = { 31, 16 }; |
159 | const int m2lcnt[] = { 63, 48 }; | 159 | static const int m2lcnt[] = { 63, 48 }; |
160 | 160 | ||
161 | AR5K_REG_WRITE_BITS(ah, AR5K_PHY_WEAK_OFDM_LOW_THR, | 161 | AR5K_REG_WRITE_BITS(ah, AR5K_PHY_WEAK_OFDM_LOW_THR, |
162 | AR5K_PHY_WEAK_OFDM_LOW_THR_M1, m1l[on]); | 162 | AR5K_PHY_WEAK_OFDM_LOW_THR_M1, m1l[on]); |
@@ -192,7 +192,7 @@ ath5k_ani_set_ofdm_weak_signal_detection(struct ath5k_hw *ah, bool on) | |||
192 | void | 192 | void |
193 | ath5k_ani_set_cck_weak_signal_detection(struct ath5k_hw *ah, bool on) | 193 | ath5k_ani_set_cck_weak_signal_detection(struct ath5k_hw *ah, bool on) |
194 | { | 194 | { |
195 | const int val[] = { 8, 6 }; | 195 | static const int val[] = { 8, 6 }; |
196 | AR5K_REG_WRITE_BITS(ah, AR5K_PHY_CCK_CROSSCORR, | 196 | AR5K_REG_WRITE_BITS(ah, AR5K_PHY_CCK_CROSSCORR, |
197 | AR5K_PHY_CCK_CROSSCORR_WEAK_SIG_THR, val[on]); | 197 | AR5K_PHY_CCK_CROSSCORR_WEAK_SIG_THR, val[on]); |
198 | ah->ah_sc->ani_state.cck_weak_sig = on; | 198 | ah->ah_sc->ani_state.cck_weak_sig = on; |
@@ -216,7 +216,7 @@ static void | |||
216 | ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as, | 216 | ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as, |
217 | bool ofdm_trigger) | 217 | bool ofdm_trigger) |
218 | { | 218 | { |
219 | int rssi = ah->ah_beacon_rssi_avg.avg; | 219 | int rssi = ewma_read(&ah->ah_beacon_rssi_avg); |
220 | 220 | ||
221 | ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "raise immunity (%s)", | 221 | ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "raise immunity (%s)", |
222 | ofdm_trigger ? "ODFM" : "CCK"); | 222 | ofdm_trigger ? "ODFM" : "CCK"); |
@@ -301,7 +301,7 @@ ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as, | |||
301 | static void | 301 | static void |
302 | ath5k_ani_lower_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as) | 302 | ath5k_ani_lower_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as) |
303 | { | 303 | { |
304 | int rssi = ah->ah_beacon_rssi_avg.avg; | 304 | int rssi = ewma_read(&ah->ah_beacon_rssi_avg); |
305 | 305 | ||
306 | ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "lower immunity"); | 306 | ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "lower immunity"); |
307 | 307 | ||
diff --git a/drivers/net/wireless/ath/ath5k/ath5k.h b/drivers/net/wireless/ath/ath5k/ath5k.h index 308b79e1ff08..2718136e4886 100644 --- a/drivers/net/wireless/ath/ath5k/ath5k.h +++ b/drivers/net/wireless/ath/ath5k/ath5k.h | |||
@@ -25,6 +25,7 @@ | |||
25 | 25 | ||
26 | #include <linux/io.h> | 26 | #include <linux/io.h> |
27 | #include <linux/types.h> | 27 | #include <linux/types.h> |
28 | #include <linux/average.h> | ||
28 | #include <net/mac80211.h> | 29 | #include <net/mac80211.h> |
29 | 30 | ||
30 | /* RX/TX descriptor hw structs | 31 | /* RX/TX descriptor hw structs |
@@ -1102,7 +1103,7 @@ struct ath5k_hw { | |||
1102 | struct ath5k_nfcal_hist ah_nfcal_hist; | 1103 | struct ath5k_nfcal_hist ah_nfcal_hist; |
1103 | 1104 | ||
1104 | /* average beacon RSSI in our BSS (used by ANI) */ | 1105 | /* average beacon RSSI in our BSS (used by ANI) */ |
1105 | struct ath5k_avg_val ah_beacon_rssi_avg; | 1106 | struct ewma ah_beacon_rssi_avg; |
1106 | 1107 | ||
1107 | /* noise floor from last periodic calibration */ | 1108 | /* noise floor from last periodic calibration */ |
1108 | s32 ah_noise_floor; | 1109 | s32 ah_noise_floor; |
@@ -1315,27 +1316,4 @@ static inline u32 ath5k_hw_bitswap(u32 val, unsigned int bits) | |||
1315 | return retval; | 1316 | return retval; |
1316 | } | 1317 | } |
1317 | 1318 | ||
1318 | #define AVG_SAMPLES 8 | ||
1319 | #define AVG_FACTOR 1000 | ||
1320 | |||
1321 | /** | ||
1322 | * ath5k_moving_average - Exponentially weighted moving average | ||
1323 | * @avg: average structure | ||
1324 | * @val: current value | ||
1325 | * | ||
1326 | * This implementation make use of a struct ath5k_avg_val to prevent rounding | ||
1327 | * errors. | ||
1328 | */ | ||
1329 | static inline struct ath5k_avg_val | ||
1330 | ath5k_moving_average(const struct ath5k_avg_val avg, const int val) | ||
1331 | { | ||
1332 | struct ath5k_avg_val new; | ||
1333 | new.avg_weight = avg.avg_weight ? | ||
1334 | (((avg.avg_weight * ((AVG_SAMPLES) - 1)) + | ||
1335 | (val * (AVG_FACTOR))) / (AVG_SAMPLES)) : | ||
1336 | (val * (AVG_FACTOR)); | ||
1337 | new.avg = new.avg_weight / (AVG_FACTOR); | ||
1338 | return new; | ||
1339 | } | ||
1340 | |||
1341 | #endif | 1319 | #endif |
diff --git a/drivers/net/wireless/ath/ath5k/base.c b/drivers/net/wireless/ath/ath5k/base.c index b9f93fbd9728..7f783d9462aa 100644 --- a/drivers/net/wireless/ath/ath5k/base.c +++ b/drivers/net/wireless/ath/ath5k/base.c | |||
@@ -549,7 +549,7 @@ static void ath_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif) | |||
549 | /* Calculate combined mode - when APs are active, operate in AP mode. | 549 | /* Calculate combined mode - when APs are active, operate in AP mode. |
550 | * Otherwise use the mode of the new interface. This can currently | 550 | * Otherwise use the mode of the new interface. This can currently |
551 | * only deal with combinations of APs and STAs. Only one ad-hoc | 551 | * only deal with combinations of APs and STAs. Only one ad-hoc |
552 | * interfaces is allowed above. | 552 | * interfaces is allowed. |
553 | */ | 553 | */ |
554 | if (avf->opmode == NL80211_IFTYPE_AP) | 554 | if (avf->opmode == NL80211_IFTYPE_AP) |
555 | iter_data->opmode = NL80211_IFTYPE_AP; | 555 | iter_data->opmode = NL80211_IFTYPE_AP; |
@@ -558,14 +558,6 @@ static void ath_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif) | |||
558 | iter_data->opmode = avf->opmode; | 558 | iter_data->opmode = avf->opmode; |
559 | } | 559 | } |
560 | 560 | ||
561 | static void ath_do_set_opmode(struct ath5k_softc *sc) | ||
562 | { | ||
563 | struct ath5k_hw *ah = sc->ah; | ||
564 | ath5k_hw_set_opmode(ah, sc->opmode); | ||
565 | ATH5K_DBG(sc, ATH5K_DEBUG_MODE, "mode setup opmode %d (%s)\n", | ||
566 | sc->opmode, ath_opmode_to_string(sc->opmode)); | ||
567 | } | ||
568 | |||
569 | static void ath5k_update_bssid_mask_and_opmode(struct ath5k_softc *sc, | 561 | static void ath5k_update_bssid_mask_and_opmode(struct ath5k_softc *sc, |
570 | struct ieee80211_vif *vif) | 562 | struct ieee80211_vif *vif) |
571 | { | 563 | { |
@@ -595,7 +587,9 @@ static void ath5k_update_bssid_mask_and_opmode(struct ath5k_softc *sc, | |||
595 | /* Nothing active, default to station mode */ | 587 | /* Nothing active, default to station mode */ |
596 | sc->opmode = NL80211_IFTYPE_STATION; | 588 | sc->opmode = NL80211_IFTYPE_STATION; |
597 | 589 | ||
598 | ath_do_set_opmode(sc); | 590 | ath5k_hw_set_opmode(sc->ah, sc->opmode); |
591 | ATH5K_DBG(sc, ATH5K_DEBUG_MODE, "mode setup opmode %d (%s)\n", | ||
592 | sc->opmode, ath_opmode_to_string(sc->opmode)); | ||
599 | 593 | ||
600 | if (iter_data.need_set_hw_addr && iter_data.found_active) | 594 | if (iter_data.need_set_hw_addr && iter_data.found_active) |
601 | ath5k_hw_set_lladdr(sc->ah, iter_data.active_mac); | 595 | ath5k_hw_set_lladdr(sc->ah, iter_data.active_mac); |
@@ -1307,8 +1301,7 @@ ath5k_update_beacon_rssi(struct ath5k_softc *sc, struct sk_buff *skb, int rssi) | |||
1307 | memcmp(mgmt->bssid, common->curbssid, ETH_ALEN) != 0) | 1301 | memcmp(mgmt->bssid, common->curbssid, ETH_ALEN) != 0) |
1308 | return; | 1302 | return; |
1309 | 1303 | ||
1310 | ah->ah_beacon_rssi_avg = ath5k_moving_average(ah->ah_beacon_rssi_avg, | 1304 | ewma_add(&ah->ah_beacon_rssi_avg, rssi); |
1311 | rssi); | ||
1312 | 1305 | ||
1313 | /* in IBSS mode we should keep RSSI statistics per neighbour */ | 1306 | /* in IBSS mode we should keep RSSI statistics per neighbour */ |
1314 | /* le16_to_cpu(mgmt->u.beacon.capab_info) & WLAN_CAPABILITY_IBSS */ | 1307 | /* le16_to_cpu(mgmt->u.beacon.capab_info) & WLAN_CAPABILITY_IBSS */ |
@@ -2562,6 +2555,7 @@ ath5k_reset(struct ath5k_softc *sc, struct ieee80211_channel *chan) | |||
2562 | ah->ah_cal_next_full = jiffies; | 2555 | ah->ah_cal_next_full = jiffies; |
2563 | ah->ah_cal_next_ani = jiffies; | 2556 | ah->ah_cal_next_ani = jiffies; |
2564 | ah->ah_cal_next_nf = jiffies; | 2557 | ah->ah_cal_next_nf = jiffies; |
2558 | ewma_init(&ah->ah_beacon_rssi_avg, 1000, 8); | ||
2565 | 2559 | ||
2566 | /* | 2560 | /* |
2567 | * Change channels and update the h/w rate map if we're switching; | 2561 | * Change channels and update the h/w rate map if we're switching; |
@@ -3413,6 +3407,36 @@ static int ath5k_conf_tx(struct ieee80211_hw *hw, u16 queue, | |||
3413 | return ret; | 3407 | return ret; |
3414 | } | 3408 | } |
3415 | 3409 | ||
3410 | static int ath5k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant) | ||
3411 | { | ||
3412 | struct ath5k_softc *sc = hw->priv; | ||
3413 | |||
3414 | if (tx_ant == 1 && rx_ant == 1) | ||
3415 | ath5k_hw_set_antenna_mode(sc->ah, AR5K_ANTMODE_FIXED_A); | ||
3416 | else if (tx_ant == 2 && rx_ant == 2) | ||
3417 | ath5k_hw_set_antenna_mode(sc->ah, AR5K_ANTMODE_FIXED_B); | ||
3418 | else if ((tx_ant & 3) == 3 && (rx_ant & 3) == 3) | ||
3419 | ath5k_hw_set_antenna_mode(sc->ah, AR5K_ANTMODE_DEFAULT); | ||
3420 | else | ||
3421 | return -EINVAL; | ||
3422 | return 0; | ||
3423 | } | ||
3424 | |||
3425 | static int ath5k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant) | ||
3426 | { | ||
3427 | struct ath5k_softc *sc = hw->priv; | ||
3428 | |||
3429 | switch (sc->ah->ah_ant_mode) { | ||
3430 | case AR5K_ANTMODE_FIXED_A: | ||
3431 | *tx_ant = 1; *rx_ant = 1; break; | ||
3432 | case AR5K_ANTMODE_FIXED_B: | ||
3433 | *tx_ant = 2; *rx_ant = 2; break; | ||
3434 | case AR5K_ANTMODE_DEFAULT: | ||
3435 | *tx_ant = 3; *rx_ant = 3; break; | ||
3436 | } | ||
3437 | return 0; | ||
3438 | } | ||
3439 | |||
3416 | static const struct ieee80211_ops ath5k_hw_ops = { | 3440 | static const struct ieee80211_ops ath5k_hw_ops = { |
3417 | .tx = ath5k_tx, | 3441 | .tx = ath5k_tx, |
3418 | .start = ath5k_start, | 3442 | .start = ath5k_start, |
@@ -3433,6 +3457,8 @@ static const struct ieee80211_ops ath5k_hw_ops = { | |||
3433 | .sw_scan_start = ath5k_sw_scan_start, | 3457 | .sw_scan_start = ath5k_sw_scan_start, |
3434 | .sw_scan_complete = ath5k_sw_scan_complete, | 3458 | .sw_scan_complete = ath5k_sw_scan_complete, |
3435 | .set_coverage_class = ath5k_set_coverage_class, | 3459 | .set_coverage_class = ath5k_set_coverage_class, |
3460 | .set_antenna = ath5k_set_antenna, | ||
3461 | .get_antenna = ath5k_get_antenna, | ||
3436 | }; | 3462 | }; |
3437 | 3463 | ||
3438 | /********************\ | 3464 | /********************\ |
diff --git a/drivers/net/wireless/ath/ath5k/debug.c b/drivers/net/wireless/ath/ath5k/debug.c index 54dcf77e9646..7d785cb60ce0 100644 --- a/drivers/net/wireless/ath/ath5k/debug.c +++ b/drivers/net/wireless/ath/ath5k/debug.c | |||
@@ -719,7 +719,7 @@ static ssize_t read_file_ani(struct file *file, char __user *user_buf, | |||
719 | st->mib_intr); | 719 | st->mib_intr); |
720 | len += snprintf(buf+len, sizeof(buf)-len, | 720 | len += snprintf(buf+len, sizeof(buf)-len, |
721 | "beacon RSSI average:\t%d\n", | 721 | "beacon RSSI average:\t%d\n", |
722 | sc->ah->ah_beacon_rssi_avg.avg); | 722 | (int)ewma_read(&sc->ah->ah_beacon_rssi_avg)); |
723 | 723 | ||
724 | #define CC_PRINT(_struct, _field) \ | 724 | #define CC_PRINT(_struct, _field) \ |
725 | _struct._field, \ | 725 | _struct._field, \ |
diff --git a/drivers/net/wireless/ath/ath9k/ani.c b/drivers/net/wireless/ath/ath9k/ani.c index 63ccb39cdcd4..29a045da184b 100644 --- a/drivers/net/wireless/ath/ath9k/ani.c +++ b/drivers/net/wireless/ath/ath9k/ani.c | |||
@@ -834,10 +834,10 @@ void ath9k_hw_ani_setup(struct ath_hw *ah) | |||
834 | { | 834 | { |
835 | int i; | 835 | int i; |
836 | 836 | ||
837 | const int totalSizeDesired[] = { -55, -55, -55, -55, -62 }; | 837 | static const int totalSizeDesired[] = { -55, -55, -55, -55, -62 }; |
838 | const int coarseHigh[] = { -14, -14, -14, -14, -12 }; | 838 | static const int coarseHigh[] = { -14, -14, -14, -14, -12 }; |
839 | const int coarseLow[] = { -64, -64, -64, -64, -70 }; | 839 | static const int coarseLow[] = { -64, -64, -64, -64, -70 }; |
840 | const int firpwr[] = { -78, -78, -78, -78, -80 }; | 840 | static const int firpwr[] = { -78, -78, -78, -78, -80 }; |
841 | 841 | ||
842 | for (i = 0; i < 5; i++) { | 842 | for (i = 0; i < 5; i++) { |
843 | ah->totalSizeDesired[i] = totalSizeDesired[i]; | 843 | ah->totalSizeDesired[i] = totalSizeDesired[i]; |
diff --git a/drivers/net/wireless/ath/ath9k/ar5008_phy.c b/drivers/net/wireless/ath/ath9k/ar5008_phy.c index c83a22cfbe1e..06e34d293dc8 100644 --- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c +++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c | |||
@@ -244,13 +244,15 @@ static void ar5008_hw_spur_mitigate(struct ath_hw *ah, | |||
244 | int upper, lower, cur_vit_mask; | 244 | int upper, lower, cur_vit_mask; |
245 | int tmp, new; | 245 | int tmp, new; |
246 | int i; | 246 | int i; |
247 | int pilot_mask_reg[4] = { AR_PHY_TIMING7, AR_PHY_TIMING8, | 247 | static int pilot_mask_reg[4] = { |
248 | AR_PHY_PILOT_MASK_01_30, AR_PHY_PILOT_MASK_31_60 | 248 | AR_PHY_TIMING7, AR_PHY_TIMING8, |
249 | AR_PHY_PILOT_MASK_01_30, AR_PHY_PILOT_MASK_31_60 | ||
249 | }; | 250 | }; |
250 | int chan_mask_reg[4] = { AR_PHY_TIMING9, AR_PHY_TIMING10, | 251 | static int chan_mask_reg[4] = { |
251 | AR_PHY_CHANNEL_MASK_01_30, AR_PHY_CHANNEL_MASK_31_60 | 252 | AR_PHY_TIMING9, AR_PHY_TIMING10, |
253 | AR_PHY_CHANNEL_MASK_01_30, AR_PHY_CHANNEL_MASK_31_60 | ||
252 | }; | 254 | }; |
253 | int inc[4] = { 0, 100, 0, 0 }; | 255 | static int inc[4] = { 0, 100, 0, 0 }; |
254 | 256 | ||
255 | int8_t mask_m[123]; | 257 | int8_t mask_m[123]; |
256 | int8_t mask_p[123]; | 258 | int8_t mask_p[123]; |
@@ -1084,12 +1086,12 @@ static bool ar5008_hw_ani_control_old(struct ath_hw *ah, | |||
1084 | break; | 1086 | break; |
1085 | } | 1087 | } |
1086 | case ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION:{ | 1088 | case ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION:{ |
1087 | const int m1ThreshLow[] = { 127, 50 }; | 1089 | static const int m1ThreshLow[] = { 127, 50 }; |
1088 | const int m2ThreshLow[] = { 127, 40 }; | 1090 | static const int m2ThreshLow[] = { 127, 40 }; |
1089 | const int m1Thresh[] = { 127, 0x4d }; | 1091 | static const int m1Thresh[] = { 127, 0x4d }; |
1090 | const int m2Thresh[] = { 127, 0x40 }; | 1092 | static const int m2Thresh[] = { 127, 0x40 }; |
1091 | const int m2CountThr[] = { 31, 16 }; | 1093 | static const int m2CountThr[] = { 31, 16 }; |
1092 | const int m2CountThrLow[] = { 63, 48 }; | 1094 | static const int m2CountThrLow[] = { 63, 48 }; |
1093 | u32 on = param ? 1 : 0; | 1095 | u32 on = param ? 1 : 0; |
1094 | 1096 | ||
1095 | REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW, | 1097 | REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW, |
@@ -1141,7 +1143,7 @@ static bool ar5008_hw_ani_control_old(struct ath_hw *ah, | |||
1141 | break; | 1143 | break; |
1142 | } | 1144 | } |
1143 | case ATH9K_ANI_CCK_WEAK_SIGNAL_THR:{ | 1145 | case ATH9K_ANI_CCK_WEAK_SIGNAL_THR:{ |
1144 | const int weakSigThrCck[] = { 8, 6 }; | 1146 | static const int weakSigThrCck[] = { 8, 6 }; |
1145 | u32 high = param ? 1 : 0; | 1147 | u32 high = param ? 1 : 0; |
1146 | 1148 | ||
1147 | REG_RMW_FIELD(ah, AR_PHY_CCK_DETECT, | 1149 | REG_RMW_FIELD(ah, AR_PHY_CCK_DETECT, |
@@ -1157,7 +1159,7 @@ static bool ar5008_hw_ani_control_old(struct ath_hw *ah, | |||
1157 | break; | 1159 | break; |
1158 | } | 1160 | } |
1159 | case ATH9K_ANI_FIRSTEP_LEVEL:{ | 1161 | case ATH9K_ANI_FIRSTEP_LEVEL:{ |
1160 | const int firstep[] = { 0, 4, 8 }; | 1162 | static const int firstep[] = { 0, 4, 8 }; |
1161 | u32 level = param; | 1163 | u32 level = param; |
1162 | 1164 | ||
1163 | if (level >= ARRAY_SIZE(firstep)) { | 1165 | if (level >= ARRAY_SIZE(firstep)) { |
@@ -1178,7 +1180,7 @@ static bool ar5008_hw_ani_control_old(struct ath_hw *ah, | |||
1178 | break; | 1180 | break; |
1179 | } | 1181 | } |
1180 | case ATH9K_ANI_SPUR_IMMUNITY_LEVEL:{ | 1182 | case ATH9K_ANI_SPUR_IMMUNITY_LEVEL:{ |
1181 | const int cycpwrThr1[] = { 2, 4, 6, 8, 10, 12, 14, 16 }; | 1183 | static const int cycpwrThr1[] = { 2, 4, 6, 8, 10, 12, 14, 16 }; |
1182 | u32 level = param; | 1184 | u32 level = param; |
1183 | 1185 | ||
1184 | if (level >= ARRAY_SIZE(cycpwrThr1)) { | 1186 | if (level >= ARRAY_SIZE(cycpwrThr1)) { |
@@ -1579,10 +1581,55 @@ static void ar5008_hw_set_nf_limits(struct ath_hw *ah) | |||
1579 | ah->nf_5g.nominal = AR_PHY_CCA_NOM_VAL_5416_5GHZ; | 1581 | ah->nf_5g.nominal = AR_PHY_CCA_NOM_VAL_5416_5GHZ; |
1580 | } | 1582 | } |
1581 | 1583 | ||
1584 | static void ar5008_hw_set_radar_params(struct ath_hw *ah, | ||
1585 | struct ath_hw_radar_conf *conf) | ||
1586 | { | ||
1587 | u32 radar_0 = 0, radar_1 = 0; | ||
1588 | |||
1589 | if (!conf) { | ||
1590 | REG_CLR_BIT(ah, AR_PHY_RADAR_0, AR_PHY_RADAR_0_ENA); | ||
1591 | return; | ||
1592 | } | ||
1593 | |||
1594 | radar_0 |= AR_PHY_RADAR_0_ENA | AR_PHY_RADAR_0_FFT_ENA; | ||
1595 | radar_0 |= SM(conf->fir_power, AR_PHY_RADAR_0_FIRPWR); | ||
1596 | radar_0 |= SM(conf->radar_rssi, AR_PHY_RADAR_0_RRSSI); | ||
1597 | radar_0 |= SM(conf->pulse_height, AR_PHY_RADAR_0_HEIGHT); | ||
1598 | radar_0 |= SM(conf->pulse_rssi, AR_PHY_RADAR_0_PRSSI); | ||
1599 | radar_0 |= SM(conf->pulse_inband, AR_PHY_RADAR_0_INBAND); | ||
1600 | |||
1601 | radar_1 |= AR_PHY_RADAR_1_MAX_RRSSI; | ||
1602 | radar_1 |= AR_PHY_RADAR_1_BLOCK_CHECK; | ||
1603 | radar_1 |= SM(conf->pulse_maxlen, AR_PHY_RADAR_1_MAXLEN); | ||
1604 | radar_1 |= SM(conf->pulse_inband_step, AR_PHY_RADAR_1_RELSTEP_THRESH); | ||
1605 | radar_1 |= SM(conf->radar_inband, AR_PHY_RADAR_1_RELPWR_THRESH); | ||
1606 | |||
1607 | REG_WRITE(ah, AR_PHY_RADAR_0, radar_0); | ||
1608 | REG_WRITE(ah, AR_PHY_RADAR_1, radar_1); | ||
1609 | if (conf->ext_channel) | ||
1610 | REG_SET_BIT(ah, AR_PHY_RADAR_EXT, AR_PHY_RADAR_EXT_ENA); | ||
1611 | else | ||
1612 | REG_CLR_BIT(ah, AR_PHY_RADAR_EXT, AR_PHY_RADAR_EXT_ENA); | ||
1613 | } | ||
1614 | |||
1615 | static void ar5008_hw_set_radar_conf(struct ath_hw *ah) | ||
1616 | { | ||
1617 | struct ath_hw_radar_conf *conf = &ah->radar_conf; | ||
1618 | |||
1619 | conf->fir_power = -33; | ||
1620 | conf->radar_rssi = 20; | ||
1621 | conf->pulse_height = 10; | ||
1622 | conf->pulse_rssi = 24; | ||
1623 | conf->pulse_inband = 15; | ||
1624 | conf->pulse_maxlen = 255; | ||
1625 | conf->pulse_inband_step = 12; | ||
1626 | conf->radar_inband = 8; | ||
1627 | } | ||
1628 | |||
1582 | void ar5008_hw_attach_phy_ops(struct ath_hw *ah) | 1629 | void ar5008_hw_attach_phy_ops(struct ath_hw *ah) |
1583 | { | 1630 | { |
1584 | struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah); | 1631 | struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah); |
1585 | const u32 ar5416_cca_regs[6] = { | 1632 | static const u32 ar5416_cca_regs[6] = { |
1586 | AR_PHY_CCA, | 1633 | AR_PHY_CCA, |
1587 | AR_PHY_CH1_CCA, | 1634 | AR_PHY_CH1_CCA, |
1588 | AR_PHY_CH2_CCA, | 1635 | AR_PHY_CH2_CCA, |
@@ -1609,6 +1656,7 @@ void ar5008_hw_attach_phy_ops(struct ath_hw *ah) | |||
1609 | priv_ops->restore_chainmask = ar5008_restore_chainmask; | 1656 | priv_ops->restore_chainmask = ar5008_restore_chainmask; |
1610 | priv_ops->set_diversity = ar5008_set_diversity; | 1657 | priv_ops->set_diversity = ar5008_set_diversity; |
1611 | priv_ops->do_getnf = ar5008_hw_do_getnf; | 1658 | priv_ops->do_getnf = ar5008_hw_do_getnf; |
1659 | priv_ops->set_radar_params = ar5008_hw_set_radar_params; | ||
1612 | 1660 | ||
1613 | if (modparam_force_new_ani) { | 1661 | if (modparam_force_new_ani) { |
1614 | priv_ops->ani_control = ar5008_hw_ani_control_new; | 1662 | priv_ops->ani_control = ar5008_hw_ani_control_new; |
@@ -1624,5 +1672,6 @@ void ar5008_hw_attach_phy_ops(struct ath_hw *ah) | |||
1624 | priv_ops->compute_pll_control = ar5008_hw_compute_pll_control; | 1672 | priv_ops->compute_pll_control = ar5008_hw_compute_pll_control; |
1625 | 1673 | ||
1626 | ar5008_hw_set_nf_limits(ah); | 1674 | ar5008_hw_set_nf_limits(ah); |
1675 | ar5008_hw_set_radar_conf(ah); | ||
1627 | memcpy(ah->nf_regs, ar5416_cca_regs, sizeof(ah->nf_regs)); | 1676 | memcpy(ah->nf_regs, ar5416_cca_regs, sizeof(ah->nf_regs)); |
1628 | } | 1677 | } |
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_phy.c b/drivers/net/wireless/ath/ath9k/ar9002_phy.c index 3fb97fdc1240..7ae66a889f5a 100644 --- a/drivers/net/wireless/ath/ath9k/ar9002_phy.c +++ b/drivers/net/wireless/ath/ath9k/ar9002_phy.c | |||
@@ -175,13 +175,15 @@ static void ar9002_hw_spur_mitigate(struct ath_hw *ah, | |||
175 | int upper, lower, cur_vit_mask; | 175 | int upper, lower, cur_vit_mask; |
176 | int tmp, newVal; | 176 | int tmp, newVal; |
177 | int i; | 177 | int i; |
178 | int pilot_mask_reg[4] = { AR_PHY_TIMING7, AR_PHY_TIMING8, | 178 | static const int pilot_mask_reg[4] = { |
179 | AR_PHY_PILOT_MASK_01_30, AR_PHY_PILOT_MASK_31_60 | 179 | AR_PHY_TIMING7, AR_PHY_TIMING8, |
180 | AR_PHY_PILOT_MASK_01_30, AR_PHY_PILOT_MASK_31_60 | ||
180 | }; | 181 | }; |
181 | int chan_mask_reg[4] = { AR_PHY_TIMING9, AR_PHY_TIMING10, | 182 | static const int chan_mask_reg[4] = { |
182 | AR_PHY_CHANNEL_MASK_01_30, AR_PHY_CHANNEL_MASK_31_60 | 183 | AR_PHY_TIMING9, AR_PHY_TIMING10, |
184 | AR_PHY_CHANNEL_MASK_01_30, AR_PHY_CHANNEL_MASK_31_60 | ||
183 | }; | 185 | }; |
184 | int inc[4] = { 0, 100, 0, 0 }; | 186 | static const int inc[4] = { 0, 100, 0, 0 }; |
185 | struct chan_centers centers; | 187 | struct chan_centers centers; |
186 | 188 | ||
187 | int8_t mask_m[123]; | 189 | int8_t mask_m[123]; |
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_calib.c b/drivers/net/wireless/ath/ath9k/ar9003_calib.c index 9e6edffe0bd1..4c94c9ed5f81 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c | |||
@@ -196,7 +196,7 @@ static void ar9003_hw_iqcalibrate(struct ath_hw *ah, u8 numChains) | |||
196 | u32 qCoffDenom, iCoffDenom; | 196 | u32 qCoffDenom, iCoffDenom; |
197 | int32_t qCoff, iCoff; | 197 | int32_t qCoff, iCoff; |
198 | int iqCorrNeg, i; | 198 | int iqCorrNeg, i; |
199 | const u_int32_t offset_array[3] = { | 199 | static const u_int32_t offset_array[3] = { |
200 | AR_PHY_RX_IQCAL_CORR_B0, | 200 | AR_PHY_RX_IQCAL_CORR_B0, |
201 | AR_PHY_RX_IQCAL_CORR_B1, | 201 | AR_PHY_RX_IQCAL_CORR_B1, |
202 | AR_PHY_RX_IQCAL_CORR_B2, | 202 | AR_PHY_RX_IQCAL_CORR_B2, |
@@ -603,22 +603,22 @@ static bool ar9003_hw_calc_iq_corr(struct ath_hw *ah, | |||
603 | static void ar9003_hw_tx_iq_cal(struct ath_hw *ah) | 603 | static void ar9003_hw_tx_iq_cal(struct ath_hw *ah) |
604 | { | 604 | { |
605 | struct ath_common *common = ath9k_hw_common(ah); | 605 | struct ath_common *common = ath9k_hw_common(ah); |
606 | const u32 txiqcal_status[AR9300_MAX_CHAINS] = { | 606 | static const u32 txiqcal_status[AR9300_MAX_CHAINS] = { |
607 | AR_PHY_TX_IQCAL_STATUS_B0, | 607 | AR_PHY_TX_IQCAL_STATUS_B0, |
608 | AR_PHY_TX_IQCAL_STATUS_B1, | 608 | AR_PHY_TX_IQCAL_STATUS_B1, |
609 | AR_PHY_TX_IQCAL_STATUS_B2, | 609 | AR_PHY_TX_IQCAL_STATUS_B2, |
610 | }; | 610 | }; |
611 | const u32 tx_corr_coeff[AR9300_MAX_CHAINS] = { | 611 | static const u32 tx_corr_coeff[AR9300_MAX_CHAINS] = { |
612 | AR_PHY_TX_IQCAL_CORR_COEFF_01_B0, | 612 | AR_PHY_TX_IQCAL_CORR_COEFF_01_B0, |
613 | AR_PHY_TX_IQCAL_CORR_COEFF_01_B1, | 613 | AR_PHY_TX_IQCAL_CORR_COEFF_01_B1, |
614 | AR_PHY_TX_IQCAL_CORR_COEFF_01_B2, | 614 | AR_PHY_TX_IQCAL_CORR_COEFF_01_B2, |
615 | }; | 615 | }; |
616 | const u32 rx_corr[AR9300_MAX_CHAINS] = { | 616 | static const u32 rx_corr[AR9300_MAX_CHAINS] = { |
617 | AR_PHY_RX_IQCAL_CORR_B0, | 617 | AR_PHY_RX_IQCAL_CORR_B0, |
618 | AR_PHY_RX_IQCAL_CORR_B1, | 618 | AR_PHY_RX_IQCAL_CORR_B1, |
619 | AR_PHY_RX_IQCAL_CORR_B2, | 619 | AR_PHY_RX_IQCAL_CORR_B2, |
620 | }; | 620 | }; |
621 | const u_int32_t chan_info_tab[] = { | 621 | static const u_int32_t chan_info_tab[] = { |
622 | AR_PHY_CHAN_INFO_TAB_0, | 622 | AR_PHY_CHAN_INFO_TAB_0, |
623 | AR_PHY_CHAN_INFO_TAB_1, | 623 | AR_PHY_CHAN_INFO_TAB_1, |
624 | AR_PHY_CHAN_INFO_TAB_2, | 624 | AR_PHY_CHAN_INFO_TAB_2, |
@@ -718,12 +718,19 @@ static bool ar9003_hw_init_cal(struct ath_hw *ah, | |||
718 | struct ath9k_channel *chan) | 718 | struct ath9k_channel *chan) |
719 | { | 719 | { |
720 | struct ath_common *common = ath9k_hw_common(ah); | 720 | struct ath_common *common = ath9k_hw_common(ah); |
721 | int val; | ||
721 | 722 | ||
722 | /* | 723 | val = REG_READ(ah, AR_ENT_OTP); |
723 | * 0x7 = 0b111 , AR9003 needs to be configured for 3-chain mode before | 724 | ath_print(common, ATH_DBG_CALIBRATE, "ath9k: AR_ENT_OTP 0x%x\n", val); |
724 | * running AGC/TxIQ cals | 725 | |
725 | */ | 726 | if (val & AR_ENT_OTP_CHAIN2_DISABLE) |
726 | ar9003_hw_set_chain_masks(ah, 0x7, 0x7); | 727 | ar9003_hw_set_chain_masks(ah, 0x3, 0x3); |
728 | else | ||
729 | /* | ||
730 | * 0x7 = 0b111 , AR9003 needs to be configured for 3-chain | ||
731 | * mode before running AGC/TxIQ cals | ||
732 | */ | ||
733 | ar9003_hw_set_chain_masks(ah, 0x7, 0x7); | ||
727 | 734 | ||
728 | /* Do Tx IQ Calibration */ | 735 | /* Do Tx IQ Calibration */ |
729 | ar9003_hw_tx_iq_cal(ah); | 736 | ar9003_hw_tx_iq_cal(ah); |
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c index a88fe0d6142f..3161a5901a7a 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c | |||
@@ -22,12 +22,14 @@ | |||
22 | #define COMP_CKSUM_LEN 2 | 22 | #define COMP_CKSUM_LEN 2 |
23 | 23 | ||
24 | #define AR_CH0_TOP (0x00016288) | 24 | #define AR_CH0_TOP (0x00016288) |
25 | #define AR_CH0_TOP_XPABIASLVL (0x3) | 25 | #define AR_CH0_TOP_XPABIASLVL (0x300) |
26 | #define AR_CH0_TOP_XPABIASLVL_S (8) | 26 | #define AR_CH0_TOP_XPABIASLVL_S (8) |
27 | 27 | ||
28 | #define AR_CH0_THERM (0x00016290) | 28 | #define AR_CH0_THERM (0x00016290) |
29 | #define AR_CH0_THERM_SPARE (0x3f) | 29 | #define AR_CH0_THERM_XPABIASLVL_MSB 0x3 |
30 | #define AR_CH0_THERM_SPARE_S (0) | 30 | #define AR_CH0_THERM_XPABIASLVL_MSB_S 0 |
31 | #define AR_CH0_THERM_XPASHORT2GND 0x4 | ||
32 | #define AR_CH0_THERM_XPASHORT2GND_S 2 | ||
31 | 33 | ||
32 | #define AR_SWITCH_TABLE_COM_ALL (0xffff) | 34 | #define AR_SWITCH_TABLE_COM_ALL (0xffff) |
33 | #define AR_SWITCH_TABLE_COM_ALL_S (0) | 35 | #define AR_SWITCH_TABLE_COM_ALL_S (0) |
@@ -55,6 +57,8 @@ | |||
55 | #define SUB_NUM_CTL_MODES_AT_5G_40 2 /* excluding HT40, EXT-OFDM */ | 57 | #define SUB_NUM_CTL_MODES_AT_5G_40 2 /* excluding HT40, EXT-OFDM */ |
56 | #define SUB_NUM_CTL_MODES_AT_2G_40 3 /* excluding HT40, EXT-OFDM, EXT-CCK */ | 58 | #define SUB_NUM_CTL_MODES_AT_2G_40 3 /* excluding HT40, EXT-OFDM, EXT-CCK */ |
57 | 59 | ||
60 | static int ar9003_hw_power_interpolate(int32_t x, | ||
61 | int32_t *px, int32_t *py, u_int16_t np); | ||
58 | static const struct ar9300_eeprom ar9300_default = { | 62 | static const struct ar9300_eeprom ar9300_default = { |
59 | .eepromVersion = 2, | 63 | .eepromVersion = 2, |
60 | .templateVersion = 2, | 64 | .templateVersion = 2, |
@@ -144,13 +148,16 @@ static const struct ar9300_eeprom ar9300_default = { | |||
144 | .txEndToRxOn = 0x2, | 148 | .txEndToRxOn = 0x2, |
145 | .txFrameToXpaOn = 0xe, | 149 | .txFrameToXpaOn = 0xe, |
146 | .thresh62 = 28, | 150 | .thresh62 = 28, |
147 | .papdRateMaskHt20 = LE32(0x80c080), | 151 | .papdRateMaskHt20 = LE32(0x0cf0e0e0), |
148 | .papdRateMaskHt40 = LE32(0x80c080), | 152 | .papdRateMaskHt40 = LE32(0x6cf0e0e0), |
149 | .futureModal = { | 153 | .futureModal = { |
150 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, | 154 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
151 | 0, 0, 0, 0, 0, 0, 0, 0 | ||
152 | }, | 155 | }, |
153 | }, | 156 | }, |
157 | .base_ext1 = { | ||
158 | .ant_div_control = 0, | ||
159 | .future = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} | ||
160 | }, | ||
154 | .calFreqPier2G = { | 161 | .calFreqPier2G = { |
155 | FREQ2FBIN(2412, 1), | 162 | FREQ2FBIN(2412, 1), |
156 | FREQ2FBIN(2437, 1), | 163 | FREQ2FBIN(2437, 1), |
@@ -285,8 +292,7 @@ static const struct ar9300_eeprom ar9300_default = { | |||
285 | /* Data[11].ctlEdges[0].bChannel */ FREQ2FBIN(2422, 1), | 292 | /* Data[11].ctlEdges[0].bChannel */ FREQ2FBIN(2422, 1), |
286 | /* Data[11].ctlEdges[1].bChannel */ FREQ2FBIN(2427, 1), | 293 | /* Data[11].ctlEdges[1].bChannel */ FREQ2FBIN(2427, 1), |
287 | /* Data[11].ctlEdges[2].bChannel */ FREQ2FBIN(2447, 1), | 294 | /* Data[11].ctlEdges[2].bChannel */ FREQ2FBIN(2447, 1), |
288 | /* Data[11].ctlEdges[3].bChannel */ | 295 | /* Data[11].ctlEdges[3].bChannel */ FREQ2FBIN(2462, 1), |
289 | FREQ2FBIN(2462, 1), | ||
290 | } | 296 | } |
291 | }, | 297 | }, |
292 | .ctlPowerData_2G = { | 298 | .ctlPowerData_2G = { |
@@ -304,6 +310,7 @@ static const struct ar9300_eeprom ar9300_default = { | |||
304 | 310 | ||
305 | { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, | 311 | { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, |
306 | { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } }, | 312 | { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } }, |
313 | { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } }, | ||
307 | }, | 314 | }, |
308 | .modalHeader5G = { | 315 | .modalHeader5G = { |
309 | /* 4 idle,t1,t2,b (4 bits per setting) */ | 316 | /* 4 idle,t1,t2,b (4 bits per setting) */ |
@@ -343,13 +350,20 @@ static const struct ar9300_eeprom ar9300_default = { | |||
343 | .txEndToRxOn = 0x2, | 350 | .txEndToRxOn = 0x2, |
344 | .txFrameToXpaOn = 0xe, | 351 | .txFrameToXpaOn = 0xe, |
345 | .thresh62 = 28, | 352 | .thresh62 = 28, |
346 | .papdRateMaskHt20 = LE32(0xf0e0e0), | 353 | .papdRateMaskHt20 = LE32(0x0c80c080), |
347 | .papdRateMaskHt40 = LE32(0xf0e0e0), | 354 | .papdRateMaskHt40 = LE32(0x0080c080), |
348 | .futureModal = { | 355 | .futureModal = { |
349 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, | 356 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
350 | 0, 0, 0, 0, 0, 0, 0, 0 | ||
351 | }, | 357 | }, |
352 | }, | 358 | }, |
359 | .base_ext2 = { | ||
360 | .tempSlopeLow = 0, | ||
361 | .tempSlopeHigh = 0, | ||
362 | .xatten1DBLow = {0, 0, 0}, | ||
363 | .xatten1MarginLow = {0, 0, 0}, | ||
364 | .xatten1DBHigh = {0, 0, 0}, | ||
365 | .xatten1MarginHigh = {0, 0, 0} | ||
366 | }, | ||
353 | .calFreqPier5G = { | 367 | .calFreqPier5G = { |
354 | FREQ2FBIN(5180, 0), | 368 | FREQ2FBIN(5180, 0), |
355 | FREQ2FBIN(5220, 0), | 369 | FREQ2FBIN(5220, 0), |
@@ -623,6 +637,2338 @@ static const struct ar9300_eeprom ar9300_default = { | |||
623 | } | 637 | } |
624 | }; | 638 | }; |
625 | 639 | ||
640 | static const struct ar9300_eeprom ar9300_x113 = { | ||
641 | .eepromVersion = 2, | ||
642 | .templateVersion = 6, | ||
643 | .macAddr = {0x00, 0x03, 0x7f, 0x0, 0x0, 0x0}, | ||
644 | .custData = {"x113-023-f0000"}, | ||
645 | .baseEepHeader = { | ||
646 | .regDmn = { LE16(0), LE16(0x1f) }, | ||
647 | .txrxMask = 0x77, /* 4 bits tx and 4 bits rx */ | ||
648 | .opCapFlags = { | ||
649 | .opFlags = AR9300_OPFLAGS_11G | AR9300_OPFLAGS_11A, | ||
650 | .eepMisc = 0, | ||
651 | }, | ||
652 | .rfSilent = 0, | ||
653 | .blueToothOptions = 0, | ||
654 | .deviceCap = 0, | ||
655 | .deviceType = 5, /* takes lower byte in eeprom location */ | ||
656 | .pwrTableOffset = AR9300_PWR_TABLE_OFFSET, | ||
657 | .params_for_tuning_caps = {0, 0}, | ||
658 | .featureEnable = 0x0d, | ||
659 | /* | ||
660 | * bit0 - enable tx temp comp - disabled | ||
661 | * bit1 - enable tx volt comp - disabled | ||
662 | * bit2 - enable fastClock - enabled | ||
663 | * bit3 - enable doubling - enabled | ||
664 | * bit4 - enable internal regulator - disabled | ||
665 | * bit5 - enable pa predistortion - disabled | ||
666 | */ | ||
667 | .miscConfiguration = 0, /* bit0 - turn down drivestrength */ | ||
668 | .eepromWriteEnableGpio = 6, | ||
669 | .wlanDisableGpio = 0, | ||
670 | .wlanLedGpio = 8, | ||
671 | .rxBandSelectGpio = 0xff, | ||
672 | .txrxgain = 0x21, | ||
673 | .swreg = 0, | ||
674 | }, | ||
675 | .modalHeader2G = { | ||
676 | /* ar9300_modal_eep_header 2g */ | ||
677 | /* 4 idle,t1,t2,b(4 bits per setting) */ | ||
678 | .antCtrlCommon = LE32(0x110), | ||
679 | /* 4 ra1l1, ra2l1, ra1l2, ra2l2, ra12 */ | ||
680 | .antCtrlCommon2 = LE32(0x44444), | ||
681 | |||
682 | /* | ||
683 | * antCtrlChain[AR9300_MAX_CHAINS]; 6 idle, t, r, | ||
684 | * rx1, rx12, b (2 bits each) | ||
685 | */ | ||
686 | .antCtrlChain = { LE16(0x150), LE16(0x150), LE16(0x150) }, | ||
687 | |||
688 | /* | ||
689 | * xatten1DB[AR9300_MAX_CHAINS]; 3 xatten1_db | ||
690 | * for ar9280 (0xa20c/b20c 5:0) | ||
691 | */ | ||
692 | .xatten1DB = {0, 0, 0}, | ||
693 | |||
694 | /* | ||
695 | * xatten1Margin[AR9300_MAX_CHAINS]; 3 xatten1_margin | ||
696 | * for ar9280 (0xa20c/b20c 16:12 | ||
697 | */ | ||
698 | .xatten1Margin = {0, 0, 0}, | ||
699 | .tempSlope = 25, | ||
700 | .voltSlope = 0, | ||
701 | |||
702 | /* | ||
703 | * spurChans[OSPREY_EEPROM_MODAL_SPURS]; spur | ||
704 | * channels in usual fbin coding format | ||
705 | */ | ||
706 | .spurChans = {FREQ2FBIN(2464, 1), 0, 0, 0, 0}, | ||
707 | |||
708 | /* | ||
709 | * noiseFloorThreshCh[AR9300_MAX_CHAINS]; 3 Check | ||
710 | * if the register is per chain | ||
711 | */ | ||
712 | .noiseFloorThreshCh = {-1, 0, 0}, | ||
713 | .ob = {1, 1, 1},/* 3 chain */ | ||
714 | .db_stage2 = {1, 1, 1}, /* 3 chain */ | ||
715 | .db_stage3 = {0, 0, 0}, | ||
716 | .db_stage4 = {0, 0, 0}, | ||
717 | .xpaBiasLvl = 0, | ||
718 | .txFrameToDataStart = 0x0e, | ||
719 | .txFrameToPaOn = 0x0e, | ||
720 | .txClip = 3, /* 4 bits tx_clip, 4 bits dac_scale_cck */ | ||
721 | .antennaGain = 0, | ||
722 | .switchSettling = 0x2c, | ||
723 | .adcDesiredSize = -30, | ||
724 | .txEndToXpaOff = 0, | ||
725 | .txEndToRxOn = 0x2, | ||
726 | .txFrameToXpaOn = 0xe, | ||
727 | .thresh62 = 28, | ||
728 | .papdRateMaskHt20 = LE32(0x0c80c080), | ||
729 | .papdRateMaskHt40 = LE32(0x0080c080), | ||
730 | .futureModal = { | ||
731 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, | ||
732 | }, | ||
733 | }, | ||
734 | .base_ext1 = { | ||
735 | .ant_div_control = 0, | ||
736 | .future = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} | ||
737 | }, | ||
738 | .calFreqPier2G = { | ||
739 | FREQ2FBIN(2412, 1), | ||
740 | FREQ2FBIN(2437, 1), | ||
741 | FREQ2FBIN(2472, 1), | ||
742 | }, | ||
743 | /* ar9300_cal_data_per_freq_op_loop 2g */ | ||
744 | .calPierData2G = { | ||
745 | { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} }, | ||
746 | { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} }, | ||
747 | { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} }, | ||
748 | }, | ||
749 | .calTarget_freqbin_Cck = { | ||
750 | FREQ2FBIN(2412, 1), | ||
751 | FREQ2FBIN(2472, 1), | ||
752 | }, | ||
753 | .calTarget_freqbin_2G = { | ||
754 | FREQ2FBIN(2412, 1), | ||
755 | FREQ2FBIN(2437, 1), | ||
756 | FREQ2FBIN(2472, 1) | ||
757 | }, | ||
758 | .calTarget_freqbin_2GHT20 = { | ||
759 | FREQ2FBIN(2412, 1), | ||
760 | FREQ2FBIN(2437, 1), | ||
761 | FREQ2FBIN(2472, 1) | ||
762 | }, | ||
763 | .calTarget_freqbin_2GHT40 = { | ||
764 | FREQ2FBIN(2412, 1), | ||
765 | FREQ2FBIN(2437, 1), | ||
766 | FREQ2FBIN(2472, 1) | ||
767 | }, | ||
768 | .calTargetPowerCck = { | ||
769 | /* 1L-5L,5S,11L,11S */ | ||
770 | { {34, 34, 34, 34} }, | ||
771 | { {34, 34, 34, 34} }, | ||
772 | }, | ||
773 | .calTargetPower2G = { | ||
774 | /* 6-24,36,48,54 */ | ||
775 | { {34, 34, 32, 32} }, | ||
776 | { {34, 34, 32, 32} }, | ||
777 | { {34, 34, 32, 32} }, | ||
778 | }, | ||
779 | .calTargetPower2GHT20 = { | ||
780 | { {32, 32, 32, 32, 32, 28, 32, 32, 30, 28, 0, 0, 0, 0} }, | ||
781 | { {32, 32, 32, 32, 32, 28, 32, 32, 30, 28, 0, 0, 0, 0} }, | ||
782 | { {32, 32, 32, 32, 32, 28, 32, 32, 30, 28, 0, 0, 0, 0} }, | ||
783 | }, | ||
784 | .calTargetPower2GHT40 = { | ||
785 | { {30, 30, 30, 30, 30, 28, 30, 30, 28, 26, 0, 0, 0, 0} }, | ||
786 | { {30, 30, 30, 30, 30, 28, 30, 30, 28, 26, 0, 0, 0, 0} }, | ||
787 | { {30, 30, 30, 30, 30, 28, 30, 30, 28, 26, 0, 0, 0, 0} }, | ||
788 | }, | ||
789 | .ctlIndex_2G = { | ||
790 | 0x11, 0x12, 0x15, 0x17, 0x41, 0x42, | ||
791 | 0x45, 0x47, 0x31, 0x32, 0x35, 0x37, | ||
792 | }, | ||
793 | .ctl_freqbin_2G = { | ||
794 | { | ||
795 | FREQ2FBIN(2412, 1), | ||
796 | FREQ2FBIN(2417, 1), | ||
797 | FREQ2FBIN(2457, 1), | ||
798 | FREQ2FBIN(2462, 1) | ||
799 | }, | ||
800 | { | ||
801 | FREQ2FBIN(2412, 1), | ||
802 | FREQ2FBIN(2417, 1), | ||
803 | FREQ2FBIN(2462, 1), | ||
804 | 0xFF, | ||
805 | }, | ||
806 | |||
807 | { | ||
808 | FREQ2FBIN(2412, 1), | ||
809 | FREQ2FBIN(2417, 1), | ||
810 | FREQ2FBIN(2462, 1), | ||
811 | 0xFF, | ||
812 | }, | ||
813 | { | ||
814 | FREQ2FBIN(2422, 1), | ||
815 | FREQ2FBIN(2427, 1), | ||
816 | FREQ2FBIN(2447, 1), | ||
817 | FREQ2FBIN(2452, 1) | ||
818 | }, | ||
819 | |||
820 | { | ||
821 | /* Data[4].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1), | ||
822 | /* Data[4].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1), | ||
823 | /* Data[4].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1), | ||
824 | /* Data[4].ctlEdges[3].bChannel */ FREQ2FBIN(2484, 1), | ||
825 | }, | ||
826 | |||
827 | { | ||
828 | /* Data[5].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1), | ||
829 | /* Data[5].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1), | ||
830 | /* Data[5].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1), | ||
831 | 0, | ||
832 | }, | ||
833 | |||
834 | { | ||
835 | /* Data[6].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1), | ||
836 | /* Data[6].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1), | ||
837 | FREQ2FBIN(2472, 1), | ||
838 | 0, | ||
839 | }, | ||
840 | |||
841 | { | ||
842 | /* Data[7].ctlEdges[0].bChannel */ FREQ2FBIN(2422, 1), | ||
843 | /* Data[7].ctlEdges[1].bChannel */ FREQ2FBIN(2427, 1), | ||
844 | /* Data[7].ctlEdges[2].bChannel */ FREQ2FBIN(2447, 1), | ||
845 | /* Data[7].ctlEdges[3].bChannel */ FREQ2FBIN(2462, 1), | ||
846 | }, | ||
847 | |||
848 | { | ||
849 | /* Data[8].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1), | ||
850 | /* Data[8].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1), | ||
851 | /* Data[8].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1), | ||
852 | }, | ||
853 | |||
854 | { | ||
855 | /* Data[9].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1), | ||
856 | /* Data[9].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1), | ||
857 | /* Data[9].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1), | ||
858 | 0 | ||
859 | }, | ||
860 | |||
861 | { | ||
862 | /* Data[10].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1), | ||
863 | /* Data[10].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1), | ||
864 | /* Data[10].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1), | ||
865 | 0 | ||
866 | }, | ||
867 | |||
868 | { | ||
869 | /* Data[11].ctlEdges[0].bChannel */ FREQ2FBIN(2422, 1), | ||
870 | /* Data[11].ctlEdges[1].bChannel */ FREQ2FBIN(2427, 1), | ||
871 | /* Data[11].ctlEdges[2].bChannel */ FREQ2FBIN(2447, 1), | ||
872 | /* Data[11].ctlEdges[3].bChannel */ FREQ2FBIN(2462, 1), | ||
873 | } | ||
874 | }, | ||
875 | .ctlPowerData_2G = { | ||
876 | { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, | ||
877 | { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, | ||
878 | { { {60, 1}, {60, 0}, {60, 0}, {60, 1} } }, | ||
879 | |||
880 | { { {60, 1}, {60, 0}, {0, 0}, {0, 0} } }, | ||
881 | { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, | ||
882 | { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, | ||
883 | |||
884 | { { {60, 0}, {60, 1}, {60, 1}, {60, 0} } }, | ||
885 | { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, | ||
886 | { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, | ||
887 | |||
888 | { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, | ||
889 | { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } }, | ||
890 | { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } }, | ||
891 | }, | ||
892 | .modalHeader5G = { | ||
893 | /* 4 idle,t1,t2,b (4 bits per setting) */ | ||
894 | .antCtrlCommon = LE32(0x220), | ||
895 | /* 4 ra1l1, ra2l1, ra1l2,ra2l2,ra12 */ | ||
896 | .antCtrlCommon2 = LE32(0x11111), | ||
897 | /* antCtrlChain 6 idle, t,r,rx1,rx12,b (2 bits each) */ | ||
898 | .antCtrlChain = { | ||
899 | LE16(0x150), LE16(0x150), LE16(0x150), | ||
900 | }, | ||
901 | /* xatten1DB 3 xatten1_db for AR9280 (0xa20c/b20c 5:0) */ | ||
902 | .xatten1DB = {0, 0, 0}, | ||
903 | |||
904 | /* | ||
905 | * xatten1Margin[AR9300_MAX_CHAINS]; 3 xatten1_margin | ||
906 | * for merlin (0xa20c/b20c 16:12 | ||
907 | */ | ||
908 | .xatten1Margin = {0, 0, 0}, | ||
909 | .tempSlope = 68, | ||
910 | .voltSlope = 0, | ||
911 | /* spurChans spur channels in usual fbin coding format */ | ||
912 | .spurChans = {FREQ2FBIN(5500, 0), 0, 0, 0, 0}, | ||
913 | /* noiseFloorThreshCh Check if the register is per chain */ | ||
914 | .noiseFloorThreshCh = {-1, 0, 0}, | ||
915 | .ob = {3, 3, 3}, /* 3 chain */ | ||
916 | .db_stage2 = {3, 3, 3}, /* 3 chain */ | ||
917 | .db_stage3 = {3, 3, 3}, /* doesn't exist for 2G */ | ||
918 | .db_stage4 = {3, 3, 3}, /* don't exist for 2G */ | ||
919 | .xpaBiasLvl = 0, | ||
920 | .txFrameToDataStart = 0x0e, | ||
921 | .txFrameToPaOn = 0x0e, | ||
922 | .txClip = 3, /* 4 bits tx_clip, 4 bits dac_scale_cck */ | ||
923 | .antennaGain = 0, | ||
924 | .switchSettling = 0x2d, | ||
925 | .adcDesiredSize = -30, | ||
926 | .txEndToXpaOff = 0, | ||
927 | .txEndToRxOn = 0x2, | ||
928 | .txFrameToXpaOn = 0xe, | ||
929 | .thresh62 = 28, | ||
930 | .papdRateMaskHt20 = LE32(0x0cf0e0e0), | ||
931 | .papdRateMaskHt40 = LE32(0x6cf0e0e0), | ||
932 | .futureModal = { | ||
933 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, | ||
934 | }, | ||
935 | }, | ||
936 | .base_ext2 = { | ||
937 | .tempSlopeLow = 72, | ||
938 | .tempSlopeHigh = 105, | ||
939 | .xatten1DBLow = {0, 0, 0}, | ||
940 | .xatten1MarginLow = {0, 0, 0}, | ||
941 | .xatten1DBHigh = {0, 0, 0}, | ||
942 | .xatten1MarginHigh = {0, 0, 0} | ||
943 | }, | ||
944 | .calFreqPier5G = { | ||
945 | FREQ2FBIN(5180, 0), | ||
946 | FREQ2FBIN(5240, 0), | ||
947 | FREQ2FBIN(5320, 0), | ||
948 | FREQ2FBIN(5400, 0), | ||
949 | FREQ2FBIN(5500, 0), | ||
950 | FREQ2FBIN(5600, 0), | ||
951 | FREQ2FBIN(5745, 0), | ||
952 | FREQ2FBIN(5785, 0) | ||
953 | }, | ||
954 | .calPierData5G = { | ||
955 | { | ||
956 | {0, 0, 0, 0, 0}, | ||
957 | {0, 0, 0, 0, 0}, | ||
958 | {0, 0, 0, 0, 0}, | ||
959 | {0, 0, 0, 0, 0}, | ||
960 | {0, 0, 0, 0, 0}, | ||
961 | {0, 0, 0, 0, 0}, | ||
962 | {0, 0, 0, 0, 0}, | ||
963 | {0, 0, 0, 0, 0}, | ||
964 | }, | ||
965 | { | ||
966 | {0, 0, 0, 0, 0}, | ||
967 | {0, 0, 0, 0, 0}, | ||
968 | {0, 0, 0, 0, 0}, | ||
969 | {0, 0, 0, 0, 0}, | ||
970 | {0, 0, 0, 0, 0}, | ||
971 | {0, 0, 0, 0, 0}, | ||
972 | {0, 0, 0, 0, 0}, | ||
973 | {0, 0, 0, 0, 0}, | ||
974 | }, | ||
975 | { | ||
976 | {0, 0, 0, 0, 0}, | ||
977 | {0, 0, 0, 0, 0}, | ||
978 | {0, 0, 0, 0, 0}, | ||
979 | {0, 0, 0, 0, 0}, | ||
980 | {0, 0, 0, 0, 0}, | ||
981 | {0, 0, 0, 0, 0}, | ||
982 | {0, 0, 0, 0, 0}, | ||
983 | {0, 0, 0, 0, 0}, | ||
984 | }, | ||
985 | |||
986 | }, | ||
987 | .calTarget_freqbin_5G = { | ||
988 | FREQ2FBIN(5180, 0), | ||
989 | FREQ2FBIN(5220, 0), | ||
990 | FREQ2FBIN(5320, 0), | ||
991 | FREQ2FBIN(5400, 0), | ||
992 | FREQ2FBIN(5500, 0), | ||
993 | FREQ2FBIN(5600, 0), | ||
994 | FREQ2FBIN(5745, 0), | ||
995 | FREQ2FBIN(5785, 0) | ||
996 | }, | ||
997 | .calTarget_freqbin_5GHT20 = { | ||
998 | FREQ2FBIN(5180, 0), | ||
999 | FREQ2FBIN(5240, 0), | ||
1000 | FREQ2FBIN(5320, 0), | ||
1001 | FREQ2FBIN(5400, 0), | ||
1002 | FREQ2FBIN(5500, 0), | ||
1003 | FREQ2FBIN(5700, 0), | ||
1004 | FREQ2FBIN(5745, 0), | ||
1005 | FREQ2FBIN(5825, 0) | ||
1006 | }, | ||
1007 | .calTarget_freqbin_5GHT40 = { | ||
1008 | FREQ2FBIN(5190, 0), | ||
1009 | FREQ2FBIN(5230, 0), | ||
1010 | FREQ2FBIN(5320, 0), | ||
1011 | FREQ2FBIN(5410, 0), | ||
1012 | FREQ2FBIN(5510, 0), | ||
1013 | FREQ2FBIN(5670, 0), | ||
1014 | FREQ2FBIN(5755, 0), | ||
1015 | FREQ2FBIN(5825, 0) | ||
1016 | }, | ||
1017 | .calTargetPower5G = { | ||
1018 | /* 6-24,36,48,54 */ | ||
1019 | { {42, 40, 40, 34} }, | ||
1020 | { {42, 40, 40, 34} }, | ||
1021 | { {42, 40, 40, 34} }, | ||
1022 | { {42, 40, 40, 34} }, | ||
1023 | { {42, 40, 40, 34} }, | ||
1024 | { {42, 40, 40, 34} }, | ||
1025 | { {42, 40, 40, 34} }, | ||
1026 | { {42, 40, 40, 34} }, | ||
1027 | }, | ||
1028 | .calTargetPower5GHT20 = { | ||
1029 | /* | ||
1030 | * 0_8_16,1-3_9-11_17-19, | ||
1031 | * 4,5,6,7,12,13,14,15,20,21,22,23 | ||
1032 | */ | ||
1033 | { {40, 40, 40, 40, 32, 28, 40, 40, 32, 28, 40, 40, 32, 20} }, | ||
1034 | { {40, 40, 40, 40, 32, 28, 40, 40, 32, 28, 40, 40, 32, 20} }, | ||
1035 | { {40, 40, 40, 40, 32, 28, 40, 40, 32, 28, 40, 40, 32, 20} }, | ||
1036 | { {40, 40, 40, 40, 32, 28, 40, 40, 32, 28, 40, 40, 32, 20} }, | ||
1037 | { {40, 40, 40, 40, 32, 28, 40, 40, 32, 28, 40, 40, 32, 20} }, | ||
1038 | { {40, 40, 40, 40, 32, 28, 40, 40, 32, 28, 40, 40, 32, 20} }, | ||
1039 | { {38, 38, 38, 38, 32, 28, 38, 38, 32, 28, 38, 38, 32, 26} }, | ||
1040 | { {36, 36, 36, 36, 32, 28, 36, 36, 32, 28, 36, 36, 32, 26} }, | ||
1041 | }, | ||
1042 | .calTargetPower5GHT40 = { | ||
1043 | /* | ||
1044 | * 0_8_16,1-3_9-11_17-19, | ||
1045 | * 4,5,6,7,12,13,14,15,20,21,22,23 | ||
1046 | */ | ||
1047 | { {40, 40, 40, 38, 30, 26, 40, 40, 30, 26, 40, 40, 30, 24} }, | ||
1048 | { {40, 40, 40, 38, 30, 26, 40, 40, 30, 26, 40, 40, 30, 24} }, | ||
1049 | { {40, 40, 40, 38, 30, 26, 40, 40, 30, 26, 40, 40, 30, 24} }, | ||
1050 | { {40, 40, 40, 38, 30, 26, 40, 40, 30, 26, 40, 40, 30, 24} }, | ||
1051 | { {40, 40, 40, 38, 30, 26, 40, 40, 30, 26, 40, 40, 30, 24} }, | ||
1052 | { {40, 40, 40, 38, 30, 26, 40, 40, 30, 26, 40, 40, 30, 24} }, | ||
1053 | { {36, 36, 36, 36, 30, 26, 36, 36, 30, 26, 36, 36, 30, 24} }, | ||
1054 | { {34, 34, 34, 34, 30, 26, 34, 34, 30, 26, 34, 34, 30, 24} }, | ||
1055 | }, | ||
1056 | .ctlIndex_5G = { | ||
1057 | 0x10, 0x16, 0x18, 0x40, 0x46, | ||
1058 | 0x48, 0x30, 0x36, 0x38 | ||
1059 | }, | ||
1060 | .ctl_freqbin_5G = { | ||
1061 | { | ||
1062 | /* Data[0].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0), | ||
1063 | /* Data[0].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0), | ||
1064 | /* Data[0].ctlEdges[2].bChannel */ FREQ2FBIN(5280, 0), | ||
1065 | /* Data[0].ctlEdges[3].bChannel */ FREQ2FBIN(5500, 0), | ||
1066 | /* Data[0].ctlEdges[4].bChannel */ FREQ2FBIN(5600, 0), | ||
1067 | /* Data[0].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0), | ||
1068 | /* Data[0].ctlEdges[6].bChannel */ FREQ2FBIN(5745, 0), | ||
1069 | /* Data[0].ctlEdges[7].bChannel */ FREQ2FBIN(5825, 0) | ||
1070 | }, | ||
1071 | { | ||
1072 | /* Data[1].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0), | ||
1073 | /* Data[1].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0), | ||
1074 | /* Data[1].ctlEdges[2].bChannel */ FREQ2FBIN(5280, 0), | ||
1075 | /* Data[1].ctlEdges[3].bChannel */ FREQ2FBIN(5500, 0), | ||
1076 | /* Data[1].ctlEdges[4].bChannel */ FREQ2FBIN(5520, 0), | ||
1077 | /* Data[1].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0), | ||
1078 | /* Data[1].ctlEdges[6].bChannel */ FREQ2FBIN(5745, 0), | ||
1079 | /* Data[1].ctlEdges[7].bChannel */ FREQ2FBIN(5825, 0) | ||
1080 | }, | ||
1081 | |||
1082 | { | ||
1083 | /* Data[2].ctlEdges[0].bChannel */ FREQ2FBIN(5190, 0), | ||
1084 | /* Data[2].ctlEdges[1].bChannel */ FREQ2FBIN(5230, 0), | ||
1085 | /* Data[2].ctlEdges[2].bChannel */ FREQ2FBIN(5270, 0), | ||
1086 | /* Data[2].ctlEdges[3].bChannel */ FREQ2FBIN(5310, 0), | ||
1087 | /* Data[2].ctlEdges[4].bChannel */ FREQ2FBIN(5510, 0), | ||
1088 | /* Data[2].ctlEdges[5].bChannel */ FREQ2FBIN(5550, 0), | ||
1089 | /* Data[2].ctlEdges[6].bChannel */ FREQ2FBIN(5670, 0), | ||
1090 | /* Data[2].ctlEdges[7].bChannel */ FREQ2FBIN(5755, 0) | ||
1091 | }, | ||
1092 | |||
1093 | { | ||
1094 | /* Data[3].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0), | ||
1095 | /* Data[3].ctlEdges[1].bChannel */ FREQ2FBIN(5200, 0), | ||
1096 | /* Data[3].ctlEdges[2].bChannel */ FREQ2FBIN(5260, 0), | ||
1097 | /* Data[3].ctlEdges[3].bChannel */ FREQ2FBIN(5320, 0), | ||
1098 | /* Data[3].ctlEdges[4].bChannel */ FREQ2FBIN(5500, 0), | ||
1099 | /* Data[3].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0), | ||
1100 | /* Data[3].ctlEdges[6].bChannel */ 0xFF, | ||
1101 | /* Data[3].ctlEdges[7].bChannel */ 0xFF, | ||
1102 | }, | ||
1103 | |||
1104 | { | ||
1105 | /* Data[4].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0), | ||
1106 | /* Data[4].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0), | ||
1107 | /* Data[4].ctlEdges[2].bChannel */ FREQ2FBIN(5500, 0), | ||
1108 | /* Data[4].ctlEdges[3].bChannel */ FREQ2FBIN(5700, 0), | ||
1109 | /* Data[4].ctlEdges[4].bChannel */ 0xFF, | ||
1110 | /* Data[4].ctlEdges[5].bChannel */ 0xFF, | ||
1111 | /* Data[4].ctlEdges[6].bChannel */ 0xFF, | ||
1112 | /* Data[4].ctlEdges[7].bChannel */ 0xFF, | ||
1113 | }, | ||
1114 | |||
1115 | { | ||
1116 | /* Data[5].ctlEdges[0].bChannel */ FREQ2FBIN(5190, 0), | ||
1117 | /* Data[5].ctlEdges[1].bChannel */ FREQ2FBIN(5270, 0), | ||
1118 | /* Data[5].ctlEdges[2].bChannel */ FREQ2FBIN(5310, 0), | ||
1119 | /* Data[5].ctlEdges[3].bChannel */ FREQ2FBIN(5510, 0), | ||
1120 | /* Data[5].ctlEdges[4].bChannel */ FREQ2FBIN(5590, 0), | ||
1121 | /* Data[5].ctlEdges[5].bChannel */ FREQ2FBIN(5670, 0), | ||
1122 | /* Data[5].ctlEdges[6].bChannel */ 0xFF, | ||
1123 | /* Data[5].ctlEdges[7].bChannel */ 0xFF | ||
1124 | }, | ||
1125 | |||
1126 | { | ||
1127 | /* Data[6].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0), | ||
1128 | /* Data[6].ctlEdges[1].bChannel */ FREQ2FBIN(5200, 0), | ||
1129 | /* Data[6].ctlEdges[2].bChannel */ FREQ2FBIN(5220, 0), | ||
1130 | /* Data[6].ctlEdges[3].bChannel */ FREQ2FBIN(5260, 0), | ||
1131 | /* Data[6].ctlEdges[4].bChannel */ FREQ2FBIN(5500, 0), | ||
1132 | /* Data[6].ctlEdges[5].bChannel */ FREQ2FBIN(5600, 0), | ||
1133 | /* Data[6].ctlEdges[6].bChannel */ FREQ2FBIN(5700, 0), | ||
1134 | /* Data[6].ctlEdges[7].bChannel */ FREQ2FBIN(5745, 0) | ||
1135 | }, | ||
1136 | |||
1137 | { | ||
1138 | /* Data[7].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0), | ||
1139 | /* Data[7].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0), | ||
1140 | /* Data[7].ctlEdges[2].bChannel */ FREQ2FBIN(5320, 0), | ||
1141 | /* Data[7].ctlEdges[3].bChannel */ FREQ2FBIN(5500, 0), | ||
1142 | /* Data[7].ctlEdges[4].bChannel */ FREQ2FBIN(5560, 0), | ||
1143 | /* Data[7].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0), | ||
1144 | /* Data[7].ctlEdges[6].bChannel */ FREQ2FBIN(5745, 0), | ||
1145 | /* Data[7].ctlEdges[7].bChannel */ FREQ2FBIN(5825, 0) | ||
1146 | }, | ||
1147 | |||
1148 | { | ||
1149 | /* Data[8].ctlEdges[0].bChannel */ FREQ2FBIN(5190, 0), | ||
1150 | /* Data[8].ctlEdges[1].bChannel */ FREQ2FBIN(5230, 0), | ||
1151 | /* Data[8].ctlEdges[2].bChannel */ FREQ2FBIN(5270, 0), | ||
1152 | /* Data[8].ctlEdges[3].bChannel */ FREQ2FBIN(5510, 0), | ||
1153 | /* Data[8].ctlEdges[4].bChannel */ FREQ2FBIN(5550, 0), | ||
1154 | /* Data[8].ctlEdges[5].bChannel */ FREQ2FBIN(5670, 0), | ||
1155 | /* Data[8].ctlEdges[6].bChannel */ FREQ2FBIN(5755, 0), | ||
1156 | /* Data[8].ctlEdges[7].bChannel */ FREQ2FBIN(5795, 0) | ||
1157 | } | ||
1158 | }, | ||
1159 | .ctlPowerData_5G = { | ||
1160 | { | ||
1161 | { | ||
1162 | {60, 1}, {60, 1}, {60, 1}, {60, 1}, | ||
1163 | {60, 1}, {60, 1}, {60, 1}, {60, 0}, | ||
1164 | } | ||
1165 | }, | ||
1166 | { | ||
1167 | { | ||
1168 | {60, 1}, {60, 1}, {60, 1}, {60, 1}, | ||
1169 | {60, 1}, {60, 1}, {60, 1}, {60, 0}, | ||
1170 | } | ||
1171 | }, | ||
1172 | { | ||
1173 | { | ||
1174 | {60, 0}, {60, 1}, {60, 0}, {60, 1}, | ||
1175 | {60, 1}, {60, 1}, {60, 1}, {60, 1}, | ||
1176 | } | ||
1177 | }, | ||
1178 | { | ||
1179 | { | ||
1180 | {60, 0}, {60, 1}, {60, 1}, {60, 0}, | ||
1181 | {60, 1}, {60, 0}, {60, 0}, {60, 0}, | ||
1182 | } | ||
1183 | }, | ||
1184 | { | ||
1185 | { | ||
1186 | {60, 1}, {60, 1}, {60, 1}, {60, 0}, | ||
1187 | {60, 0}, {60, 0}, {60, 0}, {60, 0}, | ||
1188 | } | ||
1189 | }, | ||
1190 | { | ||
1191 | { | ||
1192 | {60, 1}, {60, 1}, {60, 1}, {60, 1}, | ||
1193 | {60, 1}, {60, 0}, {60, 0}, {60, 0}, | ||
1194 | } | ||
1195 | }, | ||
1196 | { | ||
1197 | { | ||
1198 | {60, 1}, {60, 1}, {60, 1}, {60, 1}, | ||
1199 | {60, 1}, {60, 1}, {60, 1}, {60, 1}, | ||
1200 | } | ||
1201 | }, | ||
1202 | { | ||
1203 | { | ||
1204 | {60, 1}, {60, 1}, {60, 0}, {60, 1}, | ||
1205 | {60, 1}, {60, 1}, {60, 1}, {60, 0}, | ||
1206 | } | ||
1207 | }, | ||
1208 | { | ||
1209 | { | ||
1210 | {60, 1}, {60, 0}, {60, 1}, {60, 1}, | ||
1211 | {60, 1}, {60, 1}, {60, 0}, {60, 1}, | ||
1212 | } | ||
1213 | }, | ||
1214 | } | ||
1215 | }; | ||
1216 | |||
1217 | |||
1218 | static const struct ar9300_eeprom ar9300_h112 = { | ||
1219 | .eepromVersion = 2, | ||
1220 | .templateVersion = 3, | ||
1221 | .macAddr = {0x00, 0x03, 0x7f, 0x0, 0x0, 0x0}, | ||
1222 | .custData = {"h112-241-f0000"}, | ||
1223 | .baseEepHeader = { | ||
1224 | .regDmn = { LE16(0), LE16(0x1f) }, | ||
1225 | .txrxMask = 0x77, /* 4 bits tx and 4 bits rx */ | ||
1226 | .opCapFlags = { | ||
1227 | .opFlags = AR9300_OPFLAGS_11G | AR9300_OPFLAGS_11A, | ||
1228 | .eepMisc = 0, | ||
1229 | }, | ||
1230 | .rfSilent = 0, | ||
1231 | .blueToothOptions = 0, | ||
1232 | .deviceCap = 0, | ||
1233 | .deviceType = 5, /* takes lower byte in eeprom location */ | ||
1234 | .pwrTableOffset = AR9300_PWR_TABLE_OFFSET, | ||
1235 | .params_for_tuning_caps = {0, 0}, | ||
1236 | .featureEnable = 0x0d, | ||
1237 | /* | ||
1238 | * bit0 - enable tx temp comp - disabled | ||
1239 | * bit1 - enable tx volt comp - disabled | ||
1240 | * bit2 - enable fastClock - enabled | ||
1241 | * bit3 - enable doubling - enabled | ||
1242 | * bit4 - enable internal regulator - disabled | ||
1243 | * bit5 - enable pa predistortion - disabled | ||
1244 | */ | ||
1245 | .miscConfiguration = 0, /* bit0 - turn down drivestrength */ | ||
1246 | .eepromWriteEnableGpio = 6, | ||
1247 | .wlanDisableGpio = 0, | ||
1248 | .wlanLedGpio = 8, | ||
1249 | .rxBandSelectGpio = 0xff, | ||
1250 | .txrxgain = 0x10, | ||
1251 | .swreg = 0, | ||
1252 | }, | ||
1253 | .modalHeader2G = { | ||
1254 | /* ar9300_modal_eep_header 2g */ | ||
1255 | /* 4 idle,t1,t2,b(4 bits per setting) */ | ||
1256 | .antCtrlCommon = LE32(0x110), | ||
1257 | /* 4 ra1l1, ra2l1, ra1l2, ra2l2, ra12 */ | ||
1258 | .antCtrlCommon2 = LE32(0x44444), | ||
1259 | |||
1260 | /* | ||
1261 | * antCtrlChain[AR9300_MAX_CHAINS]; 6 idle, t, r, | ||
1262 | * rx1, rx12, b (2 bits each) | ||
1263 | */ | ||
1264 | .antCtrlChain = { LE16(0x150), LE16(0x150), LE16(0x150) }, | ||
1265 | |||
1266 | /* | ||
1267 | * xatten1DB[AR9300_MAX_CHAINS]; 3 xatten1_db | ||
1268 | * for ar9280 (0xa20c/b20c 5:0) | ||
1269 | */ | ||
1270 | .xatten1DB = {0, 0, 0}, | ||
1271 | |||
1272 | /* | ||
1273 | * xatten1Margin[AR9300_MAX_CHAINS]; 3 xatten1_margin | ||
1274 | * for ar9280 (0xa20c/b20c 16:12 | ||
1275 | */ | ||
1276 | .xatten1Margin = {0, 0, 0}, | ||
1277 | .tempSlope = 25, | ||
1278 | .voltSlope = 0, | ||
1279 | |||
1280 | /* | ||
1281 | * spurChans[OSPREY_EEPROM_MODAL_SPURS]; spur | ||
1282 | * channels in usual fbin coding format | ||
1283 | */ | ||
1284 | .spurChans = {FREQ2FBIN(2464, 1), 0, 0, 0, 0}, | ||
1285 | |||
1286 | /* | ||
1287 | * noiseFloorThreshCh[AR9300_MAX_CHAINS]; 3 Check | ||
1288 | * if the register is per chain | ||
1289 | */ | ||
1290 | .noiseFloorThreshCh = {-1, 0, 0}, | ||
1291 | .ob = {1, 1, 1},/* 3 chain */ | ||
1292 | .db_stage2 = {1, 1, 1}, /* 3 chain */ | ||
1293 | .db_stage3 = {0, 0, 0}, | ||
1294 | .db_stage4 = {0, 0, 0}, | ||
1295 | .xpaBiasLvl = 0, | ||
1296 | .txFrameToDataStart = 0x0e, | ||
1297 | .txFrameToPaOn = 0x0e, | ||
1298 | .txClip = 3, /* 4 bits tx_clip, 4 bits dac_scale_cck */ | ||
1299 | .antennaGain = 0, | ||
1300 | .switchSettling = 0x2c, | ||
1301 | .adcDesiredSize = -30, | ||
1302 | .txEndToXpaOff = 0, | ||
1303 | .txEndToRxOn = 0x2, | ||
1304 | .txFrameToXpaOn = 0xe, | ||
1305 | .thresh62 = 28, | ||
1306 | .papdRateMaskHt20 = LE32(0x80c080), | ||
1307 | .papdRateMaskHt40 = LE32(0x80c080), | ||
1308 | .futureModal = { | ||
1309 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, | ||
1310 | }, | ||
1311 | }, | ||
1312 | .base_ext1 = { | ||
1313 | .ant_div_control = 0, | ||
1314 | .future = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} | ||
1315 | }, | ||
1316 | .calFreqPier2G = { | ||
1317 | FREQ2FBIN(2412, 1), | ||
1318 | FREQ2FBIN(2437, 1), | ||
1319 | FREQ2FBIN(2472, 1), | ||
1320 | }, | ||
1321 | /* ar9300_cal_data_per_freq_op_loop 2g */ | ||
1322 | .calPierData2G = { | ||
1323 | { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} }, | ||
1324 | { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} }, | ||
1325 | { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} }, | ||
1326 | }, | ||
1327 | .calTarget_freqbin_Cck = { | ||
1328 | FREQ2FBIN(2412, 1), | ||
1329 | FREQ2FBIN(2484, 1), | ||
1330 | }, | ||
1331 | .calTarget_freqbin_2G = { | ||
1332 | FREQ2FBIN(2412, 1), | ||
1333 | FREQ2FBIN(2437, 1), | ||
1334 | FREQ2FBIN(2472, 1) | ||
1335 | }, | ||
1336 | .calTarget_freqbin_2GHT20 = { | ||
1337 | FREQ2FBIN(2412, 1), | ||
1338 | FREQ2FBIN(2437, 1), | ||
1339 | FREQ2FBIN(2472, 1) | ||
1340 | }, | ||
1341 | .calTarget_freqbin_2GHT40 = { | ||
1342 | FREQ2FBIN(2412, 1), | ||
1343 | FREQ2FBIN(2437, 1), | ||
1344 | FREQ2FBIN(2472, 1) | ||
1345 | }, | ||
1346 | .calTargetPowerCck = { | ||
1347 | /* 1L-5L,5S,11L,11S */ | ||
1348 | { {34, 34, 34, 34} }, | ||
1349 | { {34, 34, 34, 34} }, | ||
1350 | }, | ||
1351 | .calTargetPower2G = { | ||
1352 | /* 6-24,36,48,54 */ | ||
1353 | { {34, 34, 32, 32} }, | ||
1354 | { {34, 34, 32, 32} }, | ||
1355 | { {34, 34, 32, 32} }, | ||
1356 | }, | ||
1357 | .calTargetPower2GHT20 = { | ||
1358 | { {32, 32, 32, 32, 32, 30, 32, 32, 30, 28, 28, 28, 28, 24} }, | ||
1359 | { {32, 32, 32, 32, 32, 30, 32, 32, 30, 28, 28, 28, 28, 24} }, | ||
1360 | { {32, 32, 32, 32, 32, 30, 32, 32, 30, 28, 28, 28, 28, 24} }, | ||
1361 | }, | ||
1362 | .calTargetPower2GHT40 = { | ||
1363 | { {30, 30, 30, 30, 30, 28, 30, 30, 28, 26, 26, 26, 26, 22} }, | ||
1364 | { {30, 30, 30, 30, 30, 28, 30, 30, 28, 26, 26, 26, 26, 22} }, | ||
1365 | { {30, 30, 30, 30, 30, 28, 30, 30, 28, 26, 26, 26, 26, 22} }, | ||
1366 | }, | ||
1367 | .ctlIndex_2G = { | ||
1368 | 0x11, 0x12, 0x15, 0x17, 0x41, 0x42, | ||
1369 | 0x45, 0x47, 0x31, 0x32, 0x35, 0x37, | ||
1370 | }, | ||
1371 | .ctl_freqbin_2G = { | ||
1372 | { | ||
1373 | FREQ2FBIN(2412, 1), | ||
1374 | FREQ2FBIN(2417, 1), | ||
1375 | FREQ2FBIN(2457, 1), | ||
1376 | FREQ2FBIN(2462, 1) | ||
1377 | }, | ||
1378 | { | ||
1379 | FREQ2FBIN(2412, 1), | ||
1380 | FREQ2FBIN(2417, 1), | ||
1381 | FREQ2FBIN(2462, 1), | ||
1382 | 0xFF, | ||
1383 | }, | ||
1384 | |||
1385 | { | ||
1386 | FREQ2FBIN(2412, 1), | ||
1387 | FREQ2FBIN(2417, 1), | ||
1388 | FREQ2FBIN(2462, 1), | ||
1389 | 0xFF, | ||
1390 | }, | ||
1391 | { | ||
1392 | FREQ2FBIN(2422, 1), | ||
1393 | FREQ2FBIN(2427, 1), | ||
1394 | FREQ2FBIN(2447, 1), | ||
1395 | FREQ2FBIN(2452, 1) | ||
1396 | }, | ||
1397 | |||
1398 | { | ||
1399 | /* Data[4].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1), | ||
1400 | /* Data[4].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1), | ||
1401 | /* Data[4].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1), | ||
1402 | /* Data[4].ctlEdges[3].bChannel */ FREQ2FBIN(2484, 1), | ||
1403 | }, | ||
1404 | |||
1405 | { | ||
1406 | /* Data[5].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1), | ||
1407 | /* Data[5].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1), | ||
1408 | /* Data[5].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1), | ||
1409 | 0, | ||
1410 | }, | ||
1411 | |||
1412 | { | ||
1413 | /* Data[6].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1), | ||
1414 | /* Data[6].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1), | ||
1415 | FREQ2FBIN(2472, 1), | ||
1416 | 0, | ||
1417 | }, | ||
1418 | |||
1419 | { | ||
1420 | /* Data[7].ctlEdges[0].bChannel */ FREQ2FBIN(2422, 1), | ||
1421 | /* Data[7].ctlEdges[1].bChannel */ FREQ2FBIN(2427, 1), | ||
1422 | /* Data[7].ctlEdges[2].bChannel */ FREQ2FBIN(2447, 1), | ||
1423 | /* Data[7].ctlEdges[3].bChannel */ FREQ2FBIN(2462, 1), | ||
1424 | }, | ||
1425 | |||
1426 | { | ||
1427 | /* Data[8].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1), | ||
1428 | /* Data[8].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1), | ||
1429 | /* Data[8].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1), | ||
1430 | }, | ||
1431 | |||
1432 | { | ||
1433 | /* Data[9].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1), | ||
1434 | /* Data[9].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1), | ||
1435 | /* Data[9].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1), | ||
1436 | 0 | ||
1437 | }, | ||
1438 | |||
1439 | { | ||
1440 | /* Data[10].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1), | ||
1441 | /* Data[10].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1), | ||
1442 | /* Data[10].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1), | ||
1443 | 0 | ||
1444 | }, | ||
1445 | |||
1446 | { | ||
1447 | /* Data[11].ctlEdges[0].bChannel */ FREQ2FBIN(2422, 1), | ||
1448 | /* Data[11].ctlEdges[1].bChannel */ FREQ2FBIN(2427, 1), | ||
1449 | /* Data[11].ctlEdges[2].bChannel */ FREQ2FBIN(2447, 1), | ||
1450 | /* Data[11].ctlEdges[3].bChannel */ FREQ2FBIN(2462, 1), | ||
1451 | } | ||
1452 | }, | ||
1453 | .ctlPowerData_2G = { | ||
1454 | { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, | ||
1455 | { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, | ||
1456 | { { {60, 1}, {60, 0}, {60, 0}, {60, 1} } }, | ||
1457 | |||
1458 | { { {60, 1}, {60, 0}, {0, 0}, {0, 0} } }, | ||
1459 | { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, | ||
1460 | { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, | ||
1461 | |||
1462 | { { {60, 0}, {60, 1}, {60, 1}, {60, 0} } }, | ||
1463 | { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, | ||
1464 | { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, | ||
1465 | |||
1466 | { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, | ||
1467 | { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } }, | ||
1468 | { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } }, | ||
1469 | }, | ||
1470 | .modalHeader5G = { | ||
1471 | /* 4 idle,t1,t2,b (4 bits per setting) */ | ||
1472 | .antCtrlCommon = LE32(0x220), | ||
1473 | /* 4 ra1l1, ra2l1, ra1l2,ra2l2,ra12 */ | ||
1474 | .antCtrlCommon2 = LE32(0x44444), | ||
1475 | /* antCtrlChain 6 idle, t,r,rx1,rx12,b (2 bits each) */ | ||
1476 | .antCtrlChain = { | ||
1477 | LE16(0x150), LE16(0x150), LE16(0x150), | ||
1478 | }, | ||
1479 | /* xatten1DB 3 xatten1_db for AR9280 (0xa20c/b20c 5:0) */ | ||
1480 | .xatten1DB = {0, 0, 0}, | ||
1481 | |||
1482 | /* | ||
1483 | * xatten1Margin[AR9300_MAX_CHAINS]; 3 xatten1_margin | ||
1484 | * for merlin (0xa20c/b20c 16:12 | ||
1485 | */ | ||
1486 | .xatten1Margin = {0, 0, 0}, | ||
1487 | .tempSlope = 45, | ||
1488 | .voltSlope = 0, | ||
1489 | /* spurChans spur channels in usual fbin coding format */ | ||
1490 | .spurChans = {0, 0, 0, 0, 0}, | ||
1491 | /* noiseFloorThreshCh Check if the register is per chain */ | ||
1492 | .noiseFloorThreshCh = {-1, 0, 0}, | ||
1493 | .ob = {3, 3, 3}, /* 3 chain */ | ||
1494 | .db_stage2 = {3, 3, 3}, /* 3 chain */ | ||
1495 | .db_stage3 = {3, 3, 3}, /* doesn't exist for 2G */ | ||
1496 | .db_stage4 = {3, 3, 3}, /* don't exist for 2G */ | ||
1497 | .xpaBiasLvl = 0, | ||
1498 | .txFrameToDataStart = 0x0e, | ||
1499 | .txFrameToPaOn = 0x0e, | ||
1500 | .txClip = 3, /* 4 bits tx_clip, 4 bits dac_scale_cck */ | ||
1501 | .antennaGain = 0, | ||
1502 | .switchSettling = 0x2d, | ||
1503 | .adcDesiredSize = -30, | ||
1504 | .txEndToXpaOff = 0, | ||
1505 | .txEndToRxOn = 0x2, | ||
1506 | .txFrameToXpaOn = 0xe, | ||
1507 | .thresh62 = 28, | ||
1508 | .papdRateMaskHt20 = LE32(0x0cf0e0e0), | ||
1509 | .papdRateMaskHt40 = LE32(0x6cf0e0e0), | ||
1510 | .futureModal = { | ||
1511 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, | ||
1512 | }, | ||
1513 | }, | ||
1514 | .base_ext2 = { | ||
1515 | .tempSlopeLow = 40, | ||
1516 | .tempSlopeHigh = 50, | ||
1517 | .xatten1DBLow = {0, 0, 0}, | ||
1518 | .xatten1MarginLow = {0, 0, 0}, | ||
1519 | .xatten1DBHigh = {0, 0, 0}, | ||
1520 | .xatten1MarginHigh = {0, 0, 0} | ||
1521 | }, | ||
1522 | .calFreqPier5G = { | ||
1523 | FREQ2FBIN(5180, 0), | ||
1524 | FREQ2FBIN(5220, 0), | ||
1525 | FREQ2FBIN(5320, 0), | ||
1526 | FREQ2FBIN(5400, 0), | ||
1527 | FREQ2FBIN(5500, 0), | ||
1528 | FREQ2FBIN(5600, 0), | ||
1529 | FREQ2FBIN(5700, 0), | ||
1530 | FREQ2FBIN(5825, 0) | ||
1531 | }, | ||
1532 | .calPierData5G = { | ||
1533 | { | ||
1534 | {0, 0, 0, 0, 0}, | ||
1535 | {0, 0, 0, 0, 0}, | ||
1536 | {0, 0, 0, 0, 0}, | ||
1537 | {0, 0, 0, 0, 0}, | ||
1538 | {0, 0, 0, 0, 0}, | ||
1539 | {0, 0, 0, 0, 0}, | ||
1540 | {0, 0, 0, 0, 0}, | ||
1541 | {0, 0, 0, 0, 0}, | ||
1542 | }, | ||
1543 | { | ||
1544 | {0, 0, 0, 0, 0}, | ||
1545 | {0, 0, 0, 0, 0}, | ||
1546 | {0, 0, 0, 0, 0}, | ||
1547 | {0, 0, 0, 0, 0}, | ||
1548 | {0, 0, 0, 0, 0}, | ||
1549 | {0, 0, 0, 0, 0}, | ||
1550 | {0, 0, 0, 0, 0}, | ||
1551 | {0, 0, 0, 0, 0}, | ||
1552 | }, | ||
1553 | { | ||
1554 | {0, 0, 0, 0, 0}, | ||
1555 | {0, 0, 0, 0, 0}, | ||
1556 | {0, 0, 0, 0, 0}, | ||
1557 | {0, 0, 0, 0, 0}, | ||
1558 | {0, 0, 0, 0, 0}, | ||
1559 | {0, 0, 0, 0, 0}, | ||
1560 | {0, 0, 0, 0, 0}, | ||
1561 | {0, 0, 0, 0, 0}, | ||
1562 | }, | ||
1563 | |||
1564 | }, | ||
1565 | .calTarget_freqbin_5G = { | ||
1566 | FREQ2FBIN(5180, 0), | ||
1567 | FREQ2FBIN(5240, 0), | ||
1568 | FREQ2FBIN(5320, 0), | ||
1569 | FREQ2FBIN(5400, 0), | ||
1570 | FREQ2FBIN(5500, 0), | ||
1571 | FREQ2FBIN(5600, 0), | ||
1572 | FREQ2FBIN(5700, 0), | ||
1573 | FREQ2FBIN(5825, 0) | ||
1574 | }, | ||
1575 | .calTarget_freqbin_5GHT20 = { | ||
1576 | FREQ2FBIN(5180, 0), | ||
1577 | FREQ2FBIN(5240, 0), | ||
1578 | FREQ2FBIN(5320, 0), | ||
1579 | FREQ2FBIN(5400, 0), | ||
1580 | FREQ2FBIN(5500, 0), | ||
1581 | FREQ2FBIN(5700, 0), | ||
1582 | FREQ2FBIN(5745, 0), | ||
1583 | FREQ2FBIN(5825, 0) | ||
1584 | }, | ||
1585 | .calTarget_freqbin_5GHT40 = { | ||
1586 | FREQ2FBIN(5180, 0), | ||
1587 | FREQ2FBIN(5240, 0), | ||
1588 | FREQ2FBIN(5320, 0), | ||
1589 | FREQ2FBIN(5400, 0), | ||
1590 | FREQ2FBIN(5500, 0), | ||
1591 | FREQ2FBIN(5700, 0), | ||
1592 | FREQ2FBIN(5745, 0), | ||
1593 | FREQ2FBIN(5825, 0) | ||
1594 | }, | ||
1595 | .calTargetPower5G = { | ||
1596 | /* 6-24,36,48,54 */ | ||
1597 | { {30, 30, 28, 24} }, | ||
1598 | { {30, 30, 28, 24} }, | ||
1599 | { {30, 30, 28, 24} }, | ||
1600 | { {30, 30, 28, 24} }, | ||
1601 | { {30, 30, 28, 24} }, | ||
1602 | { {30, 30, 28, 24} }, | ||
1603 | { {30, 30, 28, 24} }, | ||
1604 | { {30, 30, 28, 24} }, | ||
1605 | }, | ||
1606 | .calTargetPower5GHT20 = { | ||
1607 | /* | ||
1608 | * 0_8_16,1-3_9-11_17-19, | ||
1609 | * 4,5,6,7,12,13,14,15,20,21,22,23 | ||
1610 | */ | ||
1611 | { {30, 30, 30, 28, 24, 20, 30, 28, 24, 20, 20, 20, 20, 16} }, | ||
1612 | { {30, 30, 30, 28, 24, 20, 30, 28, 24, 20, 20, 20, 20, 16} }, | ||
1613 | { {30, 30, 30, 26, 22, 18, 30, 26, 22, 18, 18, 18, 18, 16} }, | ||
1614 | { {30, 30, 30, 26, 22, 18, 30, 26, 22, 18, 18, 18, 18, 16} }, | ||
1615 | { {30, 30, 30, 24, 20, 16, 30, 24, 20, 16, 16, 16, 16, 14} }, | ||
1616 | { {30, 30, 30, 24, 20, 16, 30, 24, 20, 16, 16, 16, 16, 14} }, | ||
1617 | { {30, 30, 30, 22, 18, 14, 30, 22, 18, 14, 14, 14, 14, 12} }, | ||
1618 | { {30, 30, 30, 22, 18, 14, 30, 22, 18, 14, 14, 14, 14, 12} }, | ||
1619 | }, | ||
1620 | .calTargetPower5GHT40 = { | ||
1621 | /* | ||
1622 | * 0_8_16,1-3_9-11_17-19, | ||
1623 | * 4,5,6,7,12,13,14,15,20,21,22,23 | ||
1624 | */ | ||
1625 | { {28, 28, 28, 26, 22, 18, 28, 26, 22, 18, 18, 18, 18, 14} }, | ||
1626 | { {28, 28, 28, 26, 22, 18, 28, 26, 22, 18, 18, 18, 18, 14} }, | ||
1627 | { {28, 28, 28, 24, 20, 16, 28, 24, 20, 16, 16, 16, 16, 12} }, | ||
1628 | { {28, 28, 28, 24, 20, 16, 28, 24, 20, 16, 16, 16, 16, 12} }, | ||
1629 | { {28, 28, 28, 22, 18, 14, 28, 22, 18, 14, 14, 14, 14, 10} }, | ||
1630 | { {28, 28, 28, 22, 18, 14, 28, 22, 18, 14, 14, 14, 14, 10} }, | ||
1631 | { {28, 28, 28, 20, 16, 12, 28, 20, 16, 12, 12, 12, 12, 8} }, | ||
1632 | { {28, 28, 28, 20, 16, 12, 28, 20, 16, 12, 12, 12, 12, 8} }, | ||
1633 | }, | ||
1634 | .ctlIndex_5G = { | ||
1635 | 0x10, 0x16, 0x18, 0x40, 0x46, | ||
1636 | 0x48, 0x30, 0x36, 0x38 | ||
1637 | }, | ||
1638 | .ctl_freqbin_5G = { | ||
1639 | { | ||
1640 | /* Data[0].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0), | ||
1641 | /* Data[0].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0), | ||
1642 | /* Data[0].ctlEdges[2].bChannel */ FREQ2FBIN(5280, 0), | ||
1643 | /* Data[0].ctlEdges[3].bChannel */ FREQ2FBIN(5500, 0), | ||
1644 | /* Data[0].ctlEdges[4].bChannel */ FREQ2FBIN(5600, 0), | ||
1645 | /* Data[0].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0), | ||
1646 | /* Data[0].ctlEdges[6].bChannel */ FREQ2FBIN(5745, 0), | ||
1647 | /* Data[0].ctlEdges[7].bChannel */ FREQ2FBIN(5825, 0) | ||
1648 | }, | ||
1649 | { | ||
1650 | /* Data[1].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0), | ||
1651 | /* Data[1].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0), | ||
1652 | /* Data[1].ctlEdges[2].bChannel */ FREQ2FBIN(5280, 0), | ||
1653 | /* Data[1].ctlEdges[3].bChannel */ FREQ2FBIN(5500, 0), | ||
1654 | /* Data[1].ctlEdges[4].bChannel */ FREQ2FBIN(5520, 0), | ||
1655 | /* Data[1].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0), | ||
1656 | /* Data[1].ctlEdges[6].bChannel */ FREQ2FBIN(5745, 0), | ||
1657 | /* Data[1].ctlEdges[7].bChannel */ FREQ2FBIN(5825, 0) | ||
1658 | }, | ||
1659 | |||
1660 | { | ||
1661 | /* Data[2].ctlEdges[0].bChannel */ FREQ2FBIN(5190, 0), | ||
1662 | /* Data[2].ctlEdges[1].bChannel */ FREQ2FBIN(5230, 0), | ||
1663 | /* Data[2].ctlEdges[2].bChannel */ FREQ2FBIN(5270, 0), | ||
1664 | /* Data[2].ctlEdges[3].bChannel */ FREQ2FBIN(5310, 0), | ||
1665 | /* Data[2].ctlEdges[4].bChannel */ FREQ2FBIN(5510, 0), | ||
1666 | /* Data[2].ctlEdges[5].bChannel */ FREQ2FBIN(5550, 0), | ||
1667 | /* Data[2].ctlEdges[6].bChannel */ FREQ2FBIN(5670, 0), | ||
1668 | /* Data[2].ctlEdges[7].bChannel */ FREQ2FBIN(5755, 0) | ||
1669 | }, | ||
1670 | |||
1671 | { | ||
1672 | /* Data[3].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0), | ||
1673 | /* Data[3].ctlEdges[1].bChannel */ FREQ2FBIN(5200, 0), | ||
1674 | /* Data[3].ctlEdges[2].bChannel */ FREQ2FBIN(5260, 0), | ||
1675 | /* Data[3].ctlEdges[3].bChannel */ FREQ2FBIN(5320, 0), | ||
1676 | /* Data[3].ctlEdges[4].bChannel */ FREQ2FBIN(5500, 0), | ||
1677 | /* Data[3].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0), | ||
1678 | /* Data[3].ctlEdges[6].bChannel */ 0xFF, | ||
1679 | /* Data[3].ctlEdges[7].bChannel */ 0xFF, | ||
1680 | }, | ||
1681 | |||
1682 | { | ||
1683 | /* Data[4].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0), | ||
1684 | /* Data[4].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0), | ||
1685 | /* Data[4].ctlEdges[2].bChannel */ FREQ2FBIN(5500, 0), | ||
1686 | /* Data[4].ctlEdges[3].bChannel */ FREQ2FBIN(5700, 0), | ||
1687 | /* Data[4].ctlEdges[4].bChannel */ 0xFF, | ||
1688 | /* Data[4].ctlEdges[5].bChannel */ 0xFF, | ||
1689 | /* Data[4].ctlEdges[6].bChannel */ 0xFF, | ||
1690 | /* Data[4].ctlEdges[7].bChannel */ 0xFF, | ||
1691 | }, | ||
1692 | |||
1693 | { | ||
1694 | /* Data[5].ctlEdges[0].bChannel */ FREQ2FBIN(5190, 0), | ||
1695 | /* Data[5].ctlEdges[1].bChannel */ FREQ2FBIN(5270, 0), | ||
1696 | /* Data[5].ctlEdges[2].bChannel */ FREQ2FBIN(5310, 0), | ||
1697 | /* Data[5].ctlEdges[3].bChannel */ FREQ2FBIN(5510, 0), | ||
1698 | /* Data[5].ctlEdges[4].bChannel */ FREQ2FBIN(5590, 0), | ||
1699 | /* Data[5].ctlEdges[5].bChannel */ FREQ2FBIN(5670, 0), | ||
1700 | /* Data[5].ctlEdges[6].bChannel */ 0xFF, | ||
1701 | /* Data[5].ctlEdges[7].bChannel */ 0xFF | ||
1702 | }, | ||
1703 | |||
1704 | { | ||
1705 | /* Data[6].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0), | ||
1706 | /* Data[6].ctlEdges[1].bChannel */ FREQ2FBIN(5200, 0), | ||
1707 | /* Data[6].ctlEdges[2].bChannel */ FREQ2FBIN(5220, 0), | ||
1708 | /* Data[6].ctlEdges[3].bChannel */ FREQ2FBIN(5260, 0), | ||
1709 | /* Data[6].ctlEdges[4].bChannel */ FREQ2FBIN(5500, 0), | ||
1710 | /* Data[6].ctlEdges[5].bChannel */ FREQ2FBIN(5600, 0), | ||
1711 | /* Data[6].ctlEdges[6].bChannel */ FREQ2FBIN(5700, 0), | ||
1712 | /* Data[6].ctlEdges[7].bChannel */ FREQ2FBIN(5745, 0) | ||
1713 | }, | ||
1714 | |||
1715 | { | ||
1716 | /* Data[7].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0), | ||
1717 | /* Data[7].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0), | ||
1718 | /* Data[7].ctlEdges[2].bChannel */ FREQ2FBIN(5320, 0), | ||
1719 | /* Data[7].ctlEdges[3].bChannel */ FREQ2FBIN(5500, 0), | ||
1720 | /* Data[7].ctlEdges[4].bChannel */ FREQ2FBIN(5560, 0), | ||
1721 | /* Data[7].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0), | ||
1722 | /* Data[7].ctlEdges[6].bChannel */ FREQ2FBIN(5745, 0), | ||
1723 | /* Data[7].ctlEdges[7].bChannel */ FREQ2FBIN(5825, 0) | ||
1724 | }, | ||
1725 | |||
1726 | { | ||
1727 | /* Data[8].ctlEdges[0].bChannel */ FREQ2FBIN(5190, 0), | ||
1728 | /* Data[8].ctlEdges[1].bChannel */ FREQ2FBIN(5230, 0), | ||
1729 | /* Data[8].ctlEdges[2].bChannel */ FREQ2FBIN(5270, 0), | ||
1730 | /* Data[8].ctlEdges[3].bChannel */ FREQ2FBIN(5510, 0), | ||
1731 | /* Data[8].ctlEdges[4].bChannel */ FREQ2FBIN(5550, 0), | ||
1732 | /* Data[8].ctlEdges[5].bChannel */ FREQ2FBIN(5670, 0), | ||
1733 | /* Data[8].ctlEdges[6].bChannel */ FREQ2FBIN(5755, 0), | ||
1734 | /* Data[8].ctlEdges[7].bChannel */ FREQ2FBIN(5795, 0) | ||
1735 | } | ||
1736 | }, | ||
1737 | .ctlPowerData_5G = { | ||
1738 | { | ||
1739 | { | ||
1740 | {60, 1}, {60, 1}, {60, 1}, {60, 1}, | ||
1741 | {60, 1}, {60, 1}, {60, 1}, {60, 0}, | ||
1742 | } | ||
1743 | }, | ||
1744 | { | ||
1745 | { | ||
1746 | {60, 1}, {60, 1}, {60, 1}, {60, 1}, | ||
1747 | {60, 1}, {60, 1}, {60, 1}, {60, 0}, | ||
1748 | } | ||
1749 | }, | ||
1750 | { | ||
1751 | { | ||
1752 | {60, 0}, {60, 1}, {60, 0}, {60, 1}, | ||
1753 | {60, 1}, {60, 1}, {60, 1}, {60, 1}, | ||
1754 | } | ||
1755 | }, | ||
1756 | { | ||
1757 | { | ||
1758 | {60, 0}, {60, 1}, {60, 1}, {60, 0}, | ||
1759 | {60, 1}, {60, 0}, {60, 0}, {60, 0}, | ||
1760 | } | ||
1761 | }, | ||
1762 | { | ||
1763 | { | ||
1764 | {60, 1}, {60, 1}, {60, 1}, {60, 0}, | ||
1765 | {60, 0}, {60, 0}, {60, 0}, {60, 0}, | ||
1766 | } | ||
1767 | }, | ||
1768 | { | ||
1769 | { | ||
1770 | {60, 1}, {60, 1}, {60, 1}, {60, 1}, | ||
1771 | {60, 1}, {60, 0}, {60, 0}, {60, 0}, | ||
1772 | } | ||
1773 | }, | ||
1774 | { | ||
1775 | { | ||
1776 | {60, 1}, {60, 1}, {60, 1}, {60, 1}, | ||
1777 | {60, 1}, {60, 1}, {60, 1}, {60, 1}, | ||
1778 | } | ||
1779 | }, | ||
1780 | { | ||
1781 | { | ||
1782 | {60, 1}, {60, 1}, {60, 0}, {60, 1}, | ||
1783 | {60, 1}, {60, 1}, {60, 1}, {60, 0}, | ||
1784 | } | ||
1785 | }, | ||
1786 | { | ||
1787 | { | ||
1788 | {60, 1}, {60, 0}, {60, 1}, {60, 1}, | ||
1789 | {60, 1}, {60, 1}, {60, 0}, {60, 1}, | ||
1790 | } | ||
1791 | }, | ||
1792 | } | ||
1793 | }; | ||
1794 | |||
1795 | |||
1796 | static const struct ar9300_eeprom ar9300_x112 = { | ||
1797 | .eepromVersion = 2, | ||
1798 | .templateVersion = 5, | ||
1799 | .macAddr = {0x00, 0x03, 0x7f, 0x0, 0x0, 0x0}, | ||
1800 | .custData = {"x112-041-f0000"}, | ||
1801 | .baseEepHeader = { | ||
1802 | .regDmn = { LE16(0), LE16(0x1f) }, | ||
1803 | .txrxMask = 0x77, /* 4 bits tx and 4 bits rx */ | ||
1804 | .opCapFlags = { | ||
1805 | .opFlags = AR9300_OPFLAGS_11G | AR9300_OPFLAGS_11A, | ||
1806 | .eepMisc = 0, | ||
1807 | }, | ||
1808 | .rfSilent = 0, | ||
1809 | .blueToothOptions = 0, | ||
1810 | .deviceCap = 0, | ||
1811 | .deviceType = 5, /* takes lower byte in eeprom location */ | ||
1812 | .pwrTableOffset = AR9300_PWR_TABLE_OFFSET, | ||
1813 | .params_for_tuning_caps = {0, 0}, | ||
1814 | .featureEnable = 0x0d, | ||
1815 | /* | ||
1816 | * bit0 - enable tx temp comp - disabled | ||
1817 | * bit1 - enable tx volt comp - disabled | ||
1818 | * bit2 - enable fastclock - enabled | ||
1819 | * bit3 - enable doubling - enabled | ||
1820 | * bit4 - enable internal regulator - disabled | ||
1821 | * bit5 - enable pa predistortion - disabled | ||
1822 | */ | ||
1823 | .miscConfiguration = 0, /* bit0 - turn down drivestrength */ | ||
1824 | .eepromWriteEnableGpio = 6, | ||
1825 | .wlanDisableGpio = 0, | ||
1826 | .wlanLedGpio = 8, | ||
1827 | .rxBandSelectGpio = 0xff, | ||
1828 | .txrxgain = 0x0, | ||
1829 | .swreg = 0, | ||
1830 | }, | ||
1831 | .modalHeader2G = { | ||
1832 | /* ar9300_modal_eep_header 2g */ | ||
1833 | /* 4 idle,t1,t2,b(4 bits per setting) */ | ||
1834 | .antCtrlCommon = LE32(0x110), | ||
1835 | /* 4 ra1l1, ra2l1, ra1l2, ra2l2, ra12 */ | ||
1836 | .antCtrlCommon2 = LE32(0x22222), | ||
1837 | |||
1838 | /* | ||
1839 | * antCtrlChain[ar9300_max_chains]; 6 idle, t, r, | ||
1840 | * rx1, rx12, b (2 bits each) | ||
1841 | */ | ||
1842 | .antCtrlChain = { LE16(0x10), LE16(0x10), LE16(0x10) }, | ||
1843 | |||
1844 | /* | ||
1845 | * xatten1DB[AR9300_max_chains]; 3 xatten1_db | ||
1846 | * for ar9280 (0xa20c/b20c 5:0) | ||
1847 | */ | ||
1848 | .xatten1DB = {0x1b, 0x1b, 0x1b}, | ||
1849 | |||
1850 | /* | ||
1851 | * xatten1Margin[ar9300_max_chains]; 3 xatten1_margin | ||
1852 | * for ar9280 (0xa20c/b20c 16:12 | ||
1853 | */ | ||
1854 | .xatten1Margin = {0x15, 0x15, 0x15}, | ||
1855 | .tempSlope = 50, | ||
1856 | .voltSlope = 0, | ||
1857 | |||
1858 | /* | ||
1859 | * spurChans[OSPrey_eeprom_modal_sPURS]; spur | ||
1860 | * channels in usual fbin coding format | ||
1861 | */ | ||
1862 | .spurChans = {FREQ2FBIN(2464, 1), 0, 0, 0, 0}, | ||
1863 | |||
1864 | /* | ||
1865 | * noiseFloorThreshch[ar9300_max_cHAINS]; 3 Check | ||
1866 | * if the register is per chain | ||
1867 | */ | ||
1868 | .noiseFloorThreshCh = {-1, 0, 0}, | ||
1869 | .ob = {1, 1, 1},/* 3 chain */ | ||
1870 | .db_stage2 = {1, 1, 1}, /* 3 chain */ | ||
1871 | .db_stage3 = {0, 0, 0}, | ||
1872 | .db_stage4 = {0, 0, 0}, | ||
1873 | .xpaBiasLvl = 0, | ||
1874 | .txFrameToDataStart = 0x0e, | ||
1875 | .txFrameToPaOn = 0x0e, | ||
1876 | .txClip = 3, /* 4 bits tx_clip, 4 bits dac_scale_cck */ | ||
1877 | .antennaGain = 0, | ||
1878 | .switchSettling = 0x2c, | ||
1879 | .adcDesiredSize = -30, | ||
1880 | .txEndToXpaOff = 0, | ||
1881 | .txEndToRxOn = 0x2, | ||
1882 | .txFrameToXpaOn = 0xe, | ||
1883 | .thresh62 = 28, | ||
1884 | .papdRateMaskHt20 = LE32(0x0c80c080), | ||
1885 | .papdRateMaskHt40 = LE32(0x0080c080), | ||
1886 | .futureModal = { | ||
1887 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, | ||
1888 | }, | ||
1889 | }, | ||
1890 | .base_ext1 = { | ||
1891 | .ant_div_control = 0, | ||
1892 | .future = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} | ||
1893 | }, | ||
1894 | .calFreqPier2G = { | ||
1895 | FREQ2FBIN(2412, 1), | ||
1896 | FREQ2FBIN(2437, 1), | ||
1897 | FREQ2FBIN(2472, 1), | ||
1898 | }, | ||
1899 | /* ar9300_cal_data_per_freq_op_loop 2g */ | ||
1900 | .calPierData2G = { | ||
1901 | { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} }, | ||
1902 | { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} }, | ||
1903 | { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} }, | ||
1904 | }, | ||
1905 | .calTarget_freqbin_Cck = { | ||
1906 | FREQ2FBIN(2412, 1), | ||
1907 | FREQ2FBIN(2472, 1), | ||
1908 | }, | ||
1909 | .calTarget_freqbin_2G = { | ||
1910 | FREQ2FBIN(2412, 1), | ||
1911 | FREQ2FBIN(2437, 1), | ||
1912 | FREQ2FBIN(2472, 1) | ||
1913 | }, | ||
1914 | .calTarget_freqbin_2GHT20 = { | ||
1915 | FREQ2FBIN(2412, 1), | ||
1916 | FREQ2FBIN(2437, 1), | ||
1917 | FREQ2FBIN(2472, 1) | ||
1918 | }, | ||
1919 | .calTarget_freqbin_2GHT40 = { | ||
1920 | FREQ2FBIN(2412, 1), | ||
1921 | FREQ2FBIN(2437, 1), | ||
1922 | FREQ2FBIN(2472, 1) | ||
1923 | }, | ||
1924 | .calTargetPowerCck = { | ||
1925 | /* 1L-5L,5S,11L,11s */ | ||
1926 | { {38, 38, 38, 38} }, | ||
1927 | { {38, 38, 38, 38} }, | ||
1928 | }, | ||
1929 | .calTargetPower2G = { | ||
1930 | /* 6-24,36,48,54 */ | ||
1931 | { {38, 38, 36, 34} }, | ||
1932 | { {38, 38, 36, 34} }, | ||
1933 | { {38, 38, 34, 32} }, | ||
1934 | }, | ||
1935 | .calTargetPower2GHT20 = { | ||
1936 | { {36, 36, 36, 36, 36, 34, 34, 32, 30, 28, 28, 28, 28, 26} }, | ||
1937 | { {36, 36, 36, 36, 36, 34, 36, 34, 32, 30, 30, 30, 28, 26} }, | ||
1938 | { {36, 36, 36, 36, 36, 34, 34, 32, 30, 28, 28, 28, 28, 26} }, | ||
1939 | }, | ||
1940 | .calTargetPower2GHT40 = { | ||
1941 | { {36, 36, 36, 36, 34, 32, 32, 30, 28, 26, 26, 26, 26, 24} }, | ||
1942 | { {36, 36, 36, 36, 34, 32, 34, 32, 30, 28, 28, 28, 28, 24} }, | ||
1943 | { {36, 36, 36, 36, 34, 32, 32, 30, 28, 26, 26, 26, 26, 24} }, | ||
1944 | }, | ||
1945 | .ctlIndex_2G = { | ||
1946 | 0x11, 0x12, 0x15, 0x17, 0x41, 0x42, | ||
1947 | 0x45, 0x47, 0x31, 0x32, 0x35, 0x37, | ||
1948 | }, | ||
1949 | .ctl_freqbin_2G = { | ||
1950 | { | ||
1951 | FREQ2FBIN(2412, 1), | ||
1952 | FREQ2FBIN(2417, 1), | ||
1953 | FREQ2FBIN(2457, 1), | ||
1954 | FREQ2FBIN(2462, 1) | ||
1955 | }, | ||
1956 | { | ||
1957 | FREQ2FBIN(2412, 1), | ||
1958 | FREQ2FBIN(2417, 1), | ||
1959 | FREQ2FBIN(2462, 1), | ||
1960 | 0xFF, | ||
1961 | }, | ||
1962 | |||
1963 | { | ||
1964 | FREQ2FBIN(2412, 1), | ||
1965 | FREQ2FBIN(2417, 1), | ||
1966 | FREQ2FBIN(2462, 1), | ||
1967 | 0xFF, | ||
1968 | }, | ||
1969 | { | ||
1970 | FREQ2FBIN(2422, 1), | ||
1971 | FREQ2FBIN(2427, 1), | ||
1972 | FREQ2FBIN(2447, 1), | ||
1973 | FREQ2FBIN(2452, 1) | ||
1974 | }, | ||
1975 | |||
1976 | { | ||
1977 | /* Data[4].ctledges[0].bchannel */ FREQ2FBIN(2412, 1), | ||
1978 | /* Data[4].ctledges[1].bchannel */ FREQ2FBIN(2417, 1), | ||
1979 | /* Data[4].ctledges[2].bchannel */ FREQ2FBIN(2472, 1), | ||
1980 | /* Data[4].ctledges[3].bchannel */ FREQ2FBIN(2484, 1), | ||
1981 | }, | ||
1982 | |||
1983 | { | ||
1984 | /* Data[5].ctledges[0].bchannel */ FREQ2FBIN(2412, 1), | ||
1985 | /* Data[5].ctledges[1].bchannel */ FREQ2FBIN(2417, 1), | ||
1986 | /* Data[5].ctledges[2].bchannel */ FREQ2FBIN(2472, 1), | ||
1987 | 0, | ||
1988 | }, | ||
1989 | |||
1990 | { | ||
1991 | /* Data[6].ctledges[0].bchannel */ FREQ2FBIN(2412, 1), | ||
1992 | /* Data[6].ctledges[1].bchannel */ FREQ2FBIN(2417, 1), | ||
1993 | FREQ2FBIN(2472, 1), | ||
1994 | 0, | ||
1995 | }, | ||
1996 | |||
1997 | { | ||
1998 | /* Data[7].ctledges[0].bchannel */ FREQ2FBIN(2422, 1), | ||
1999 | /* Data[7].ctledges[1].bchannel */ FREQ2FBIN(2427, 1), | ||
2000 | /* Data[7].ctledges[2].bchannel */ FREQ2FBIN(2447, 1), | ||
2001 | /* Data[7].ctledges[3].bchannel */ FREQ2FBIN(2462, 1), | ||
2002 | }, | ||
2003 | |||
2004 | { | ||
2005 | /* Data[8].ctledges[0].bchannel */ FREQ2FBIN(2412, 1), | ||
2006 | /* Data[8].ctledges[1].bchannel */ FREQ2FBIN(2417, 1), | ||
2007 | /* Data[8].ctledges[2].bchannel */ FREQ2FBIN(2472, 1), | ||
2008 | }, | ||
2009 | |||
2010 | { | ||
2011 | /* Data[9].ctledges[0].bchannel */ FREQ2FBIN(2412, 1), | ||
2012 | /* Data[9].ctledges[1].bchannel */ FREQ2FBIN(2417, 1), | ||
2013 | /* Data[9].ctledges[2].bchannel */ FREQ2FBIN(2472, 1), | ||
2014 | 0 | ||
2015 | }, | ||
2016 | |||
2017 | { | ||
2018 | /* Data[10].ctledges[0].bchannel */ FREQ2FBIN(2412, 1), | ||
2019 | /* Data[10].ctledges[1].bchannel */ FREQ2FBIN(2417, 1), | ||
2020 | /* Data[10].ctledges[2].bchannel */ FREQ2FBIN(2472, 1), | ||
2021 | 0 | ||
2022 | }, | ||
2023 | |||
2024 | { | ||
2025 | /* Data[11].ctledges[0].bchannel */ FREQ2FBIN(2422, 1), | ||
2026 | /* Data[11].ctledges[1].bchannel */ FREQ2FBIN(2427, 1), | ||
2027 | /* Data[11].ctledges[2].bchannel */ FREQ2FBIN(2447, 1), | ||
2028 | /* Data[11].ctledges[3].bchannel */ FREQ2FBIN(2462, 1), | ||
2029 | } | ||
2030 | }, | ||
2031 | .ctlPowerData_2G = { | ||
2032 | { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, | ||
2033 | { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, | ||
2034 | { { {60, 1}, {60, 0}, {60, 0}, {60, 1} } }, | ||
2035 | |||
2036 | { { {60, 1}, {60, 0}, {0, 0}, {0, 0} } }, | ||
2037 | { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, | ||
2038 | { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, | ||
2039 | |||
2040 | { { {60, 0}, {60, 1}, {60, 1}, {60, 0} } }, | ||
2041 | { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, | ||
2042 | { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, | ||
2043 | |||
2044 | { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, | ||
2045 | { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } }, | ||
2046 | { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } }, | ||
2047 | }, | ||
2048 | .modalHeader5G = { | ||
2049 | /* 4 idle,t1,t2,b (4 bits per setting) */ | ||
2050 | .antCtrlCommon = LE32(0x110), | ||
2051 | /* 4 ra1l1, ra2l1, ra1l2,ra2l2,ra12 */ | ||
2052 | .antCtrlCommon2 = LE32(0x22222), | ||
2053 | /* antCtrlChain 6 idle, t,r,rx1,rx12,b (2 bits each) */ | ||
2054 | .antCtrlChain = { | ||
2055 | LE16(0x0), LE16(0x0), LE16(0x0), | ||
2056 | }, | ||
2057 | /* xatten1DB 3 xatten1_db for ar9280 (0xa20c/b20c 5:0) */ | ||
2058 | .xatten1DB = {0x13, 0x19, 0x17}, | ||
2059 | |||
2060 | /* | ||
2061 | * xatten1Margin[ar9300_max_chains]; 3 xatten1_margin | ||
2062 | * for merlin (0xa20c/b20c 16:12 | ||
2063 | */ | ||
2064 | .xatten1Margin = {0x19, 0x19, 0x19}, | ||
2065 | .tempSlope = 70, | ||
2066 | .voltSlope = 15, | ||
2067 | /* spurChans spur channels in usual fbin coding format */ | ||
2068 | .spurChans = {0, 0, 0, 0, 0}, | ||
2069 | /* noiseFloorThreshch check if the register is per chain */ | ||
2070 | .noiseFloorThreshCh = {-1, 0, 0}, | ||
2071 | .ob = {3, 3, 3}, /* 3 chain */ | ||
2072 | .db_stage2 = {3, 3, 3}, /* 3 chain */ | ||
2073 | .db_stage3 = {3, 3, 3}, /* doesn't exist for 2G */ | ||
2074 | .db_stage4 = {3, 3, 3}, /* don't exist for 2G */ | ||
2075 | .xpaBiasLvl = 0, | ||
2076 | .txFrameToDataStart = 0x0e, | ||
2077 | .txFrameToPaOn = 0x0e, | ||
2078 | .txClip = 3, /* 4 bits tx_clip, 4 bits dac_scale_cck */ | ||
2079 | .antennaGain = 0, | ||
2080 | .switchSettling = 0x2d, | ||
2081 | .adcDesiredSize = -30, | ||
2082 | .txEndToXpaOff = 0, | ||
2083 | .txEndToRxOn = 0x2, | ||
2084 | .txFrameToXpaOn = 0xe, | ||
2085 | .thresh62 = 28, | ||
2086 | .papdRateMaskHt20 = LE32(0x0cf0e0e0), | ||
2087 | .papdRateMaskHt40 = LE32(0x6cf0e0e0), | ||
2088 | .futureModal = { | ||
2089 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, | ||
2090 | }, | ||
2091 | }, | ||
2092 | .base_ext2 = { | ||
2093 | .tempSlopeLow = 72, | ||
2094 | .tempSlopeHigh = 105, | ||
2095 | .xatten1DBLow = {0x10, 0x14, 0x10}, | ||
2096 | .xatten1MarginLow = {0x19, 0x19 , 0x19}, | ||
2097 | .xatten1DBHigh = {0x1d, 0x20, 0x24}, | ||
2098 | .xatten1MarginHigh = {0x10, 0x10, 0x10} | ||
2099 | }, | ||
2100 | .calFreqPier5G = { | ||
2101 | FREQ2FBIN(5180, 0), | ||
2102 | FREQ2FBIN(5220, 0), | ||
2103 | FREQ2FBIN(5320, 0), | ||
2104 | FREQ2FBIN(5400, 0), | ||
2105 | FREQ2FBIN(5500, 0), | ||
2106 | FREQ2FBIN(5600, 0), | ||
2107 | FREQ2FBIN(5700, 0), | ||
2108 | FREQ2FBIN(5785, 0) | ||
2109 | }, | ||
2110 | .calPierData5G = { | ||
2111 | { | ||
2112 | {0, 0, 0, 0, 0}, | ||
2113 | {0, 0, 0, 0, 0}, | ||
2114 | {0, 0, 0, 0, 0}, | ||
2115 | {0, 0, 0, 0, 0}, | ||
2116 | {0, 0, 0, 0, 0}, | ||
2117 | {0, 0, 0, 0, 0}, | ||
2118 | {0, 0, 0, 0, 0}, | ||
2119 | {0, 0, 0, 0, 0}, | ||
2120 | }, | ||
2121 | { | ||
2122 | {0, 0, 0, 0, 0}, | ||
2123 | {0, 0, 0, 0, 0}, | ||
2124 | {0, 0, 0, 0, 0}, | ||
2125 | {0, 0, 0, 0, 0}, | ||
2126 | {0, 0, 0, 0, 0}, | ||
2127 | {0, 0, 0, 0, 0}, | ||
2128 | {0, 0, 0, 0, 0}, | ||
2129 | {0, 0, 0, 0, 0}, | ||
2130 | }, | ||
2131 | { | ||
2132 | {0, 0, 0, 0, 0}, | ||
2133 | {0, 0, 0, 0, 0}, | ||
2134 | {0, 0, 0, 0, 0}, | ||
2135 | {0, 0, 0, 0, 0}, | ||
2136 | {0, 0, 0, 0, 0}, | ||
2137 | {0, 0, 0, 0, 0}, | ||
2138 | {0, 0, 0, 0, 0}, | ||
2139 | {0, 0, 0, 0, 0}, | ||
2140 | }, | ||
2141 | |||
2142 | }, | ||
2143 | .calTarget_freqbin_5G = { | ||
2144 | FREQ2FBIN(5180, 0), | ||
2145 | FREQ2FBIN(5220, 0), | ||
2146 | FREQ2FBIN(5320, 0), | ||
2147 | FREQ2FBIN(5400, 0), | ||
2148 | FREQ2FBIN(5500, 0), | ||
2149 | FREQ2FBIN(5600, 0), | ||
2150 | FREQ2FBIN(5725, 0), | ||
2151 | FREQ2FBIN(5825, 0) | ||
2152 | }, | ||
2153 | .calTarget_freqbin_5GHT20 = { | ||
2154 | FREQ2FBIN(5180, 0), | ||
2155 | FREQ2FBIN(5220, 0), | ||
2156 | FREQ2FBIN(5320, 0), | ||
2157 | FREQ2FBIN(5400, 0), | ||
2158 | FREQ2FBIN(5500, 0), | ||
2159 | FREQ2FBIN(5600, 0), | ||
2160 | FREQ2FBIN(5725, 0), | ||
2161 | FREQ2FBIN(5825, 0) | ||
2162 | }, | ||
2163 | .calTarget_freqbin_5GHT40 = { | ||
2164 | FREQ2FBIN(5180, 0), | ||
2165 | FREQ2FBIN(5220, 0), | ||
2166 | FREQ2FBIN(5320, 0), | ||
2167 | FREQ2FBIN(5400, 0), | ||
2168 | FREQ2FBIN(5500, 0), | ||
2169 | FREQ2FBIN(5600, 0), | ||
2170 | FREQ2FBIN(5725, 0), | ||
2171 | FREQ2FBIN(5825, 0) | ||
2172 | }, | ||
2173 | .calTargetPower5G = { | ||
2174 | /* 6-24,36,48,54 */ | ||
2175 | { {32, 32, 28, 26} }, | ||
2176 | { {32, 32, 28, 26} }, | ||
2177 | { {32, 32, 28, 26} }, | ||
2178 | { {32, 32, 26, 24} }, | ||
2179 | { {32, 32, 26, 24} }, | ||
2180 | { {32, 32, 24, 22} }, | ||
2181 | { {30, 30, 24, 22} }, | ||
2182 | { {30, 30, 24, 22} }, | ||
2183 | }, | ||
2184 | .calTargetPower5GHT20 = { | ||
2185 | /* | ||
2186 | * 0_8_16,1-3_9-11_17-19, | ||
2187 | * 4,5,6,7,12,13,14,15,20,21,22,23 | ||
2188 | */ | ||
2189 | { {32, 32, 32, 32, 28, 26, 32, 28, 26, 24, 24, 24, 22, 22} }, | ||
2190 | { {32, 32, 32, 32, 28, 26, 32, 28, 26, 24, 24, 24, 22, 22} }, | ||
2191 | { {32, 32, 32, 32, 28, 26, 32, 28, 26, 24, 24, 24, 22, 22} }, | ||
2192 | { {32, 32, 32, 32, 28, 26, 32, 26, 24, 22, 22, 22, 20, 20} }, | ||
2193 | { {32, 32, 32, 32, 28, 26, 32, 26, 24, 22, 20, 18, 16, 16} }, | ||
2194 | { {32, 32, 32, 32, 28, 26, 32, 24, 20, 16, 18, 16, 14, 14} }, | ||
2195 | { {30, 30, 30, 30, 28, 26, 30, 24, 20, 16, 18, 16, 14, 14} }, | ||
2196 | { {30, 30, 30, 30, 28, 26, 30, 24, 20, 16, 18, 16, 14, 14} }, | ||
2197 | }, | ||
2198 | .calTargetPower5GHT40 = { | ||
2199 | /* | ||
2200 | * 0_8_16,1-3_9-11_17-19, | ||
2201 | * 4,5,6,7,12,13,14,15,20,21,22,23 | ||
2202 | */ | ||
2203 | { {32, 32, 32, 30, 28, 26, 30, 28, 26, 24, 24, 24, 22, 22} }, | ||
2204 | { {32, 32, 32, 30, 28, 26, 30, 28, 26, 24, 24, 24, 22, 22} }, | ||
2205 | { {32, 32, 32, 30, 28, 26, 30, 28, 26, 24, 24, 24, 22, 22} }, | ||
2206 | { {32, 32, 32, 30, 28, 26, 30, 26, 24, 22, 22, 22, 20, 20} }, | ||
2207 | { {32, 32, 32, 30, 28, 26, 30, 26, 24, 22, 20, 18, 16, 16} }, | ||
2208 | { {32, 32, 32, 30, 28, 26, 30, 22, 20, 16, 18, 16, 14, 14} }, | ||
2209 | { {30, 30, 30, 30, 28, 26, 30, 22, 20, 16, 18, 16, 14, 14} }, | ||
2210 | { {30, 30, 30, 30, 28, 26, 30, 22, 20, 16, 18, 16, 14, 14} }, | ||
2211 | }, | ||
2212 | .ctlIndex_5G = { | ||
2213 | 0x10, 0x16, 0x18, 0x40, 0x46, | ||
2214 | 0x48, 0x30, 0x36, 0x38 | ||
2215 | }, | ||
2216 | .ctl_freqbin_5G = { | ||
2217 | { | ||
2218 | /* Data[0].ctledges[0].bchannel */ FREQ2FBIN(5180, 0), | ||
2219 | /* Data[0].ctledges[1].bchannel */ FREQ2FBIN(5260, 0), | ||
2220 | /* Data[0].ctledges[2].bchannel */ FREQ2FBIN(5280, 0), | ||
2221 | /* Data[0].ctledges[3].bchannel */ FREQ2FBIN(5500, 0), | ||
2222 | /* Data[0].ctledges[4].bchannel */ FREQ2FBIN(5600, 0), | ||
2223 | /* Data[0].ctledges[5].bchannel */ FREQ2FBIN(5700, 0), | ||
2224 | /* Data[0].ctledges[6].bchannel */ FREQ2FBIN(5745, 0), | ||
2225 | /* Data[0].ctledges[7].bchannel */ FREQ2FBIN(5825, 0) | ||
2226 | }, | ||
2227 | { | ||
2228 | /* Data[1].ctledges[0].bchannel */ FREQ2FBIN(5180, 0), | ||
2229 | /* Data[1].ctledges[1].bchannel */ FREQ2FBIN(5260, 0), | ||
2230 | /* Data[1].ctledges[2].bchannel */ FREQ2FBIN(5280, 0), | ||
2231 | /* Data[1].ctledges[3].bchannel */ FREQ2FBIN(5500, 0), | ||
2232 | /* Data[1].ctledges[4].bchannel */ FREQ2FBIN(5520, 0), | ||
2233 | /* Data[1].ctledges[5].bchannel */ FREQ2FBIN(5700, 0), | ||
2234 | /* Data[1].ctledges[6].bchannel */ FREQ2FBIN(5745, 0), | ||
2235 | /* Data[1].ctledges[7].bchannel */ FREQ2FBIN(5825, 0) | ||
2236 | }, | ||
2237 | |||
2238 | { | ||
2239 | /* Data[2].ctledges[0].bchannel */ FREQ2FBIN(5190, 0), | ||
2240 | /* Data[2].ctledges[1].bchannel */ FREQ2FBIN(5230, 0), | ||
2241 | /* Data[2].ctledges[2].bchannel */ FREQ2FBIN(5270, 0), | ||
2242 | /* Data[2].ctledges[3].bchannel */ FREQ2FBIN(5310, 0), | ||
2243 | /* Data[2].ctledges[4].bchannel */ FREQ2FBIN(5510, 0), | ||
2244 | /* Data[2].ctledges[5].bchannel */ FREQ2FBIN(5550, 0), | ||
2245 | /* Data[2].ctledges[6].bchannel */ FREQ2FBIN(5670, 0), | ||
2246 | /* Data[2].ctledges[7].bchannel */ FREQ2FBIN(5755, 0) | ||
2247 | }, | ||
2248 | |||
2249 | { | ||
2250 | /* Data[3].ctledges[0].bchannel */ FREQ2FBIN(5180, 0), | ||
2251 | /* Data[3].ctledges[1].bchannel */ FREQ2FBIN(5200, 0), | ||
2252 | /* Data[3].ctledges[2].bchannel */ FREQ2FBIN(5260, 0), | ||
2253 | /* Data[3].ctledges[3].bchannel */ FREQ2FBIN(5320, 0), | ||
2254 | /* Data[3].ctledges[4].bchannel */ FREQ2FBIN(5500, 0), | ||
2255 | /* Data[3].ctledges[5].bchannel */ FREQ2FBIN(5700, 0), | ||
2256 | /* Data[3].ctledges[6].bchannel */ 0xFF, | ||
2257 | /* Data[3].ctledges[7].bchannel */ 0xFF, | ||
2258 | }, | ||
2259 | |||
2260 | { | ||
2261 | /* Data[4].ctledges[0].bchannel */ FREQ2FBIN(5180, 0), | ||
2262 | /* Data[4].ctledges[1].bchannel */ FREQ2FBIN(5260, 0), | ||
2263 | /* Data[4].ctledges[2].bchannel */ FREQ2FBIN(5500, 0), | ||
2264 | /* Data[4].ctledges[3].bchannel */ FREQ2FBIN(5700, 0), | ||
2265 | /* Data[4].ctledges[4].bchannel */ 0xFF, | ||
2266 | /* Data[4].ctledges[5].bchannel */ 0xFF, | ||
2267 | /* Data[4].ctledges[6].bchannel */ 0xFF, | ||
2268 | /* Data[4].ctledges[7].bchannel */ 0xFF, | ||
2269 | }, | ||
2270 | |||
2271 | { | ||
2272 | /* Data[5].ctledges[0].bchannel */ FREQ2FBIN(5190, 0), | ||
2273 | /* Data[5].ctledges[1].bchannel */ FREQ2FBIN(5270, 0), | ||
2274 | /* Data[5].ctledges[2].bchannel */ FREQ2FBIN(5310, 0), | ||
2275 | /* Data[5].ctledges[3].bchannel */ FREQ2FBIN(5510, 0), | ||
2276 | /* Data[5].ctledges[4].bchannel */ FREQ2FBIN(5590, 0), | ||
2277 | /* Data[5].ctledges[5].bchannel */ FREQ2FBIN(5670, 0), | ||
2278 | /* Data[5].ctledges[6].bchannel */ 0xFF, | ||
2279 | /* Data[5].ctledges[7].bchannel */ 0xFF | ||
2280 | }, | ||
2281 | |||
2282 | { | ||
2283 | /* Data[6].ctledges[0].bchannel */ FREQ2FBIN(5180, 0), | ||
2284 | /* Data[6].ctledges[1].bchannel */ FREQ2FBIN(5200, 0), | ||
2285 | /* Data[6].ctledges[2].bchannel */ FREQ2FBIN(5220, 0), | ||
2286 | /* Data[6].ctledges[3].bchannel */ FREQ2FBIN(5260, 0), | ||
2287 | /* Data[6].ctledges[4].bchannel */ FREQ2FBIN(5500, 0), | ||
2288 | /* Data[6].ctledges[5].bchannel */ FREQ2FBIN(5600, 0), | ||
2289 | /* Data[6].ctledges[6].bchannel */ FREQ2FBIN(5700, 0), | ||
2290 | /* Data[6].ctledges[7].bchannel */ FREQ2FBIN(5745, 0) | ||
2291 | }, | ||
2292 | |||
2293 | { | ||
2294 | /* Data[7].ctledges[0].bchannel */ FREQ2FBIN(5180, 0), | ||
2295 | /* Data[7].ctledges[1].bchannel */ FREQ2FBIN(5260, 0), | ||
2296 | /* Data[7].ctledges[2].bchannel */ FREQ2FBIN(5320, 0), | ||
2297 | /* Data[7].ctledges[3].bchannel */ FREQ2FBIN(5500, 0), | ||
2298 | /* Data[7].ctledges[4].bchannel */ FREQ2FBIN(5560, 0), | ||
2299 | /* Data[7].ctledges[5].bchannel */ FREQ2FBIN(5700, 0), | ||
2300 | /* Data[7].ctledges[6].bchannel */ FREQ2FBIN(5745, 0), | ||
2301 | /* Data[7].ctledges[7].bchannel */ FREQ2FBIN(5825, 0) | ||
2302 | }, | ||
2303 | |||
2304 | { | ||
2305 | /* Data[8].ctledges[0].bchannel */ FREQ2FBIN(5190, 0), | ||
2306 | /* Data[8].ctledges[1].bchannel */ FREQ2FBIN(5230, 0), | ||
2307 | /* Data[8].ctledges[2].bchannel */ FREQ2FBIN(5270, 0), | ||
2308 | /* Data[8].ctledges[3].bchannel */ FREQ2FBIN(5510, 0), | ||
2309 | /* Data[8].ctledges[4].bchannel */ FREQ2FBIN(5550, 0), | ||
2310 | /* Data[8].ctledges[5].bchannel */ FREQ2FBIN(5670, 0), | ||
2311 | /* Data[8].ctledges[6].bchannel */ FREQ2FBIN(5755, 0), | ||
2312 | /* Data[8].ctledges[7].bchannel */ FREQ2FBIN(5795, 0) | ||
2313 | } | ||
2314 | }, | ||
2315 | .ctlPowerData_5G = { | ||
2316 | { | ||
2317 | { | ||
2318 | {60, 1}, {60, 1}, {60, 1}, {60, 1}, | ||
2319 | {60, 1}, {60, 1}, {60, 1}, {60, 0}, | ||
2320 | } | ||
2321 | }, | ||
2322 | { | ||
2323 | { | ||
2324 | {60, 1}, {60, 1}, {60, 1}, {60, 1}, | ||
2325 | {60, 1}, {60, 1}, {60, 1}, {60, 0}, | ||
2326 | } | ||
2327 | }, | ||
2328 | { | ||
2329 | { | ||
2330 | {60, 0}, {60, 1}, {60, 0}, {60, 1}, | ||
2331 | {60, 1}, {60, 1}, {60, 1}, {60, 1}, | ||
2332 | } | ||
2333 | }, | ||
2334 | { | ||
2335 | { | ||
2336 | {60, 0}, {60, 1}, {60, 1}, {60, 0}, | ||
2337 | {60, 1}, {60, 0}, {60, 0}, {60, 0}, | ||
2338 | } | ||
2339 | }, | ||
2340 | { | ||
2341 | { | ||
2342 | {60, 1}, {60, 1}, {60, 1}, {60, 0}, | ||
2343 | {60, 0}, {60, 0}, {60, 0}, {60, 0}, | ||
2344 | } | ||
2345 | }, | ||
2346 | { | ||
2347 | { | ||
2348 | {60, 1}, {60, 1}, {60, 1}, {60, 1}, | ||
2349 | {60, 1}, {60, 0}, {60, 0}, {60, 0}, | ||
2350 | } | ||
2351 | }, | ||
2352 | { | ||
2353 | { | ||
2354 | {60, 1}, {60, 1}, {60, 1}, {60, 1}, | ||
2355 | {60, 1}, {60, 1}, {60, 1}, {60, 1}, | ||
2356 | } | ||
2357 | }, | ||
2358 | { | ||
2359 | { | ||
2360 | {60, 1}, {60, 1}, {60, 0}, {60, 1}, | ||
2361 | {60, 1}, {60, 1}, {60, 1}, {60, 0}, | ||
2362 | } | ||
2363 | }, | ||
2364 | { | ||
2365 | { | ||
2366 | {60, 1}, {60, 0}, {60, 1}, {60, 1}, | ||
2367 | {60, 1}, {60, 1}, {60, 0}, {60, 1}, | ||
2368 | } | ||
2369 | }, | ||
2370 | } | ||
2371 | }; | ||
2372 | |||
2373 | static const struct ar9300_eeprom ar9300_h116 = { | ||
2374 | .eepromVersion = 2, | ||
2375 | .templateVersion = 4, | ||
2376 | .macAddr = {0x00, 0x03, 0x7f, 0x0, 0x0, 0x0}, | ||
2377 | .custData = {"h116-041-f0000"}, | ||
2378 | .baseEepHeader = { | ||
2379 | .regDmn = { LE16(0), LE16(0x1f) }, | ||
2380 | .txrxMask = 0x33, /* 4 bits tx and 4 bits rx */ | ||
2381 | .opCapFlags = { | ||
2382 | .opFlags = AR9300_OPFLAGS_11G | AR9300_OPFLAGS_11A, | ||
2383 | .eepMisc = 0, | ||
2384 | }, | ||
2385 | .rfSilent = 0, | ||
2386 | .blueToothOptions = 0, | ||
2387 | .deviceCap = 0, | ||
2388 | .deviceType = 5, /* takes lower byte in eeprom location */ | ||
2389 | .pwrTableOffset = AR9300_PWR_TABLE_OFFSET, | ||
2390 | .params_for_tuning_caps = {0, 0}, | ||
2391 | .featureEnable = 0x0d, | ||
2392 | /* | ||
2393 | * bit0 - enable tx temp comp - disabled | ||
2394 | * bit1 - enable tx volt comp - disabled | ||
2395 | * bit2 - enable fastClock - enabled | ||
2396 | * bit3 - enable doubling - enabled | ||
2397 | * bit4 - enable internal regulator - disabled | ||
2398 | * bit5 - enable pa predistortion - disabled | ||
2399 | */ | ||
2400 | .miscConfiguration = 0, /* bit0 - turn down drivestrength */ | ||
2401 | .eepromWriteEnableGpio = 6, | ||
2402 | .wlanDisableGpio = 0, | ||
2403 | .wlanLedGpio = 8, | ||
2404 | .rxBandSelectGpio = 0xff, | ||
2405 | .txrxgain = 0x10, | ||
2406 | .swreg = 0, | ||
2407 | }, | ||
2408 | .modalHeader2G = { | ||
2409 | /* ar9300_modal_eep_header 2g */ | ||
2410 | /* 4 idle,t1,t2,b(4 bits per setting) */ | ||
2411 | .antCtrlCommon = LE32(0x110), | ||
2412 | /* 4 ra1l1, ra2l1, ra1l2, ra2l2, ra12 */ | ||
2413 | .antCtrlCommon2 = LE32(0x44444), | ||
2414 | |||
2415 | /* | ||
2416 | * antCtrlChain[AR9300_MAX_CHAINS]; 6 idle, t, r, | ||
2417 | * rx1, rx12, b (2 bits each) | ||
2418 | */ | ||
2419 | .antCtrlChain = { LE16(0x10), LE16(0x10), LE16(0x10) }, | ||
2420 | |||
2421 | /* | ||
2422 | * xatten1DB[AR9300_MAX_CHAINS]; 3 xatten1_db | ||
2423 | * for ar9280 (0xa20c/b20c 5:0) | ||
2424 | */ | ||
2425 | .xatten1DB = {0x1f, 0x1f, 0x1f}, | ||
2426 | |||
2427 | /* | ||
2428 | * xatten1Margin[AR9300_MAX_CHAINS]; 3 xatten1_margin | ||
2429 | * for ar9280 (0xa20c/b20c 16:12 | ||
2430 | */ | ||
2431 | .xatten1Margin = {0x12, 0x12, 0x12}, | ||
2432 | .tempSlope = 25, | ||
2433 | .voltSlope = 0, | ||
2434 | |||
2435 | /* | ||
2436 | * spurChans[OSPREY_EEPROM_MODAL_SPURS]; spur | ||
2437 | * channels in usual fbin coding format | ||
2438 | */ | ||
2439 | .spurChans = {FREQ2FBIN(2464, 1), 0, 0, 0, 0}, | ||
2440 | |||
2441 | /* | ||
2442 | * noiseFloorThreshCh[AR9300_MAX_CHAINS]; 3 Check | ||
2443 | * if the register is per chain | ||
2444 | */ | ||
2445 | .noiseFloorThreshCh = {-1, 0, 0}, | ||
2446 | .ob = {1, 1, 1},/* 3 chain */ | ||
2447 | .db_stage2 = {1, 1, 1}, /* 3 chain */ | ||
2448 | .db_stage3 = {0, 0, 0}, | ||
2449 | .db_stage4 = {0, 0, 0}, | ||
2450 | .xpaBiasLvl = 0, | ||
2451 | .txFrameToDataStart = 0x0e, | ||
2452 | .txFrameToPaOn = 0x0e, | ||
2453 | .txClip = 3, /* 4 bits tx_clip, 4 bits dac_scale_cck */ | ||
2454 | .antennaGain = 0, | ||
2455 | .switchSettling = 0x2c, | ||
2456 | .adcDesiredSize = -30, | ||
2457 | .txEndToXpaOff = 0, | ||
2458 | .txEndToRxOn = 0x2, | ||
2459 | .txFrameToXpaOn = 0xe, | ||
2460 | .thresh62 = 28, | ||
2461 | .papdRateMaskHt20 = LE32(0x0c80C080), | ||
2462 | .papdRateMaskHt40 = LE32(0x0080C080), | ||
2463 | .futureModal = { | ||
2464 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, | ||
2465 | }, | ||
2466 | }, | ||
2467 | .base_ext1 = { | ||
2468 | .ant_div_control = 0, | ||
2469 | .future = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} | ||
2470 | }, | ||
2471 | .calFreqPier2G = { | ||
2472 | FREQ2FBIN(2412, 1), | ||
2473 | FREQ2FBIN(2437, 1), | ||
2474 | FREQ2FBIN(2472, 1), | ||
2475 | }, | ||
2476 | /* ar9300_cal_data_per_freq_op_loop 2g */ | ||
2477 | .calPierData2G = { | ||
2478 | { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} }, | ||
2479 | { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} }, | ||
2480 | { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} }, | ||
2481 | }, | ||
2482 | .calTarget_freqbin_Cck = { | ||
2483 | FREQ2FBIN(2412, 1), | ||
2484 | FREQ2FBIN(2472, 1), | ||
2485 | }, | ||
2486 | .calTarget_freqbin_2G = { | ||
2487 | FREQ2FBIN(2412, 1), | ||
2488 | FREQ2FBIN(2437, 1), | ||
2489 | FREQ2FBIN(2472, 1) | ||
2490 | }, | ||
2491 | .calTarget_freqbin_2GHT20 = { | ||
2492 | FREQ2FBIN(2412, 1), | ||
2493 | FREQ2FBIN(2437, 1), | ||
2494 | FREQ2FBIN(2472, 1) | ||
2495 | }, | ||
2496 | .calTarget_freqbin_2GHT40 = { | ||
2497 | FREQ2FBIN(2412, 1), | ||
2498 | FREQ2FBIN(2437, 1), | ||
2499 | FREQ2FBIN(2472, 1) | ||
2500 | }, | ||
2501 | .calTargetPowerCck = { | ||
2502 | /* 1L-5L,5S,11L,11S */ | ||
2503 | { {34, 34, 34, 34} }, | ||
2504 | { {34, 34, 34, 34} }, | ||
2505 | }, | ||
2506 | .calTargetPower2G = { | ||
2507 | /* 6-24,36,48,54 */ | ||
2508 | { {34, 34, 32, 32} }, | ||
2509 | { {34, 34, 32, 32} }, | ||
2510 | { {34, 34, 32, 32} }, | ||
2511 | }, | ||
2512 | .calTargetPower2GHT20 = { | ||
2513 | { {32, 32, 32, 32, 32, 30, 32, 32, 30, 28, 0, 0, 0, 0} }, | ||
2514 | { {32, 32, 32, 32, 32, 30, 32, 32, 30, 28, 0, 0, 0, 0} }, | ||
2515 | { {32, 32, 32, 32, 32, 30, 32, 32, 30, 28, 0, 0, 0, 0} }, | ||
2516 | }, | ||
2517 | .calTargetPower2GHT40 = { | ||
2518 | { {30, 30, 30, 30, 30, 28, 30, 30, 28, 26, 0, 0, 0, 0} }, | ||
2519 | { {30, 30, 30, 30, 30, 28, 30, 30, 28, 26, 0, 0, 0, 0} }, | ||
2520 | { {30, 30, 30, 30, 30, 28, 30, 30, 28, 26, 0, 0, 0, 0} }, | ||
2521 | }, | ||
2522 | .ctlIndex_2G = { | ||
2523 | 0x11, 0x12, 0x15, 0x17, 0x41, 0x42, | ||
2524 | 0x45, 0x47, 0x31, 0x32, 0x35, 0x37, | ||
2525 | }, | ||
2526 | .ctl_freqbin_2G = { | ||
2527 | { | ||
2528 | FREQ2FBIN(2412, 1), | ||
2529 | FREQ2FBIN(2417, 1), | ||
2530 | FREQ2FBIN(2457, 1), | ||
2531 | FREQ2FBIN(2462, 1) | ||
2532 | }, | ||
2533 | { | ||
2534 | FREQ2FBIN(2412, 1), | ||
2535 | FREQ2FBIN(2417, 1), | ||
2536 | FREQ2FBIN(2462, 1), | ||
2537 | 0xFF, | ||
2538 | }, | ||
2539 | |||
2540 | { | ||
2541 | FREQ2FBIN(2412, 1), | ||
2542 | FREQ2FBIN(2417, 1), | ||
2543 | FREQ2FBIN(2462, 1), | ||
2544 | 0xFF, | ||
2545 | }, | ||
2546 | { | ||
2547 | FREQ2FBIN(2422, 1), | ||
2548 | FREQ2FBIN(2427, 1), | ||
2549 | FREQ2FBIN(2447, 1), | ||
2550 | FREQ2FBIN(2452, 1) | ||
2551 | }, | ||
2552 | |||
2553 | { | ||
2554 | /* Data[4].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1), | ||
2555 | /* Data[4].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1), | ||
2556 | /* Data[4].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1), | ||
2557 | /* Data[4].ctlEdges[3].bChannel */ FREQ2FBIN(2484, 1), | ||
2558 | }, | ||
2559 | |||
2560 | { | ||
2561 | /* Data[5].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1), | ||
2562 | /* Data[5].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1), | ||
2563 | /* Data[5].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1), | ||
2564 | 0, | ||
2565 | }, | ||
2566 | |||
2567 | { | ||
2568 | /* Data[6].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1), | ||
2569 | /* Data[6].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1), | ||
2570 | FREQ2FBIN(2472, 1), | ||
2571 | 0, | ||
2572 | }, | ||
2573 | |||
2574 | { | ||
2575 | /* Data[7].ctlEdges[0].bChannel */ FREQ2FBIN(2422, 1), | ||
2576 | /* Data[7].ctlEdges[1].bChannel */ FREQ2FBIN(2427, 1), | ||
2577 | /* Data[7].ctlEdges[2].bChannel */ FREQ2FBIN(2447, 1), | ||
2578 | /* Data[7].ctlEdges[3].bChannel */ FREQ2FBIN(2462, 1), | ||
2579 | }, | ||
2580 | |||
2581 | { | ||
2582 | /* Data[8].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1), | ||
2583 | /* Data[8].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1), | ||
2584 | /* Data[8].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1), | ||
2585 | }, | ||
2586 | |||
2587 | { | ||
2588 | /* Data[9].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1), | ||
2589 | /* Data[9].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1), | ||
2590 | /* Data[9].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1), | ||
2591 | 0 | ||
2592 | }, | ||
2593 | |||
2594 | { | ||
2595 | /* Data[10].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1), | ||
2596 | /* Data[10].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1), | ||
2597 | /* Data[10].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1), | ||
2598 | 0 | ||
2599 | }, | ||
2600 | |||
2601 | { | ||
2602 | /* Data[11].ctlEdges[0].bChannel */ FREQ2FBIN(2422, 1), | ||
2603 | /* Data[11].ctlEdges[1].bChannel */ FREQ2FBIN(2427, 1), | ||
2604 | /* Data[11].ctlEdges[2].bChannel */ FREQ2FBIN(2447, 1), | ||
2605 | /* Data[11].ctlEdges[3].bChannel */ FREQ2FBIN(2462, 1), | ||
2606 | } | ||
2607 | }, | ||
2608 | .ctlPowerData_2G = { | ||
2609 | { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, | ||
2610 | { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, | ||
2611 | { { {60, 1}, {60, 0}, {60, 0}, {60, 1} } }, | ||
2612 | |||
2613 | { { {60, 1}, {60, 0}, {0, 0}, {0, 0} } }, | ||
2614 | { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, | ||
2615 | { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, | ||
2616 | |||
2617 | { { {60, 0}, {60, 1}, {60, 1}, {60, 0} } }, | ||
2618 | { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, | ||
2619 | { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, | ||
2620 | |||
2621 | { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, | ||
2622 | { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } }, | ||
2623 | { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } }, | ||
2624 | }, | ||
2625 | .modalHeader5G = { | ||
2626 | /* 4 idle,t1,t2,b (4 bits per setting) */ | ||
2627 | .antCtrlCommon = LE32(0x220), | ||
2628 | /* 4 ra1l1, ra2l1, ra1l2,ra2l2,ra12 */ | ||
2629 | .antCtrlCommon2 = LE32(0x44444), | ||
2630 | /* antCtrlChain 6 idle, t,r,rx1,rx12,b (2 bits each) */ | ||
2631 | .antCtrlChain = { | ||
2632 | LE16(0x150), LE16(0x150), LE16(0x150), | ||
2633 | }, | ||
2634 | /* xatten1DB 3 xatten1_db for AR9280 (0xa20c/b20c 5:0) */ | ||
2635 | .xatten1DB = {0x19, 0x19, 0x19}, | ||
2636 | |||
2637 | /* | ||
2638 | * xatten1Margin[AR9300_MAX_CHAINS]; 3 xatten1_margin | ||
2639 | * for merlin (0xa20c/b20c 16:12 | ||
2640 | */ | ||
2641 | .xatten1Margin = {0x14, 0x14, 0x14}, | ||
2642 | .tempSlope = 70, | ||
2643 | .voltSlope = 0, | ||
2644 | /* spurChans spur channels in usual fbin coding format */ | ||
2645 | .spurChans = {0, 0, 0, 0, 0}, | ||
2646 | /* noiseFloorThreshCh Check if the register is per chain */ | ||
2647 | .noiseFloorThreshCh = {-1, 0, 0}, | ||
2648 | .ob = {3, 3, 3}, /* 3 chain */ | ||
2649 | .db_stage2 = {3, 3, 3}, /* 3 chain */ | ||
2650 | .db_stage3 = {3, 3, 3}, /* doesn't exist for 2G */ | ||
2651 | .db_stage4 = {3, 3, 3}, /* don't exist for 2G */ | ||
2652 | .xpaBiasLvl = 0, | ||
2653 | .txFrameToDataStart = 0x0e, | ||
2654 | .txFrameToPaOn = 0x0e, | ||
2655 | .txClip = 3, /* 4 bits tx_clip, 4 bits dac_scale_cck */ | ||
2656 | .antennaGain = 0, | ||
2657 | .switchSettling = 0x2d, | ||
2658 | .adcDesiredSize = -30, | ||
2659 | .txEndToXpaOff = 0, | ||
2660 | .txEndToRxOn = 0x2, | ||
2661 | .txFrameToXpaOn = 0xe, | ||
2662 | .thresh62 = 28, | ||
2663 | .papdRateMaskHt20 = LE32(0x0cf0e0e0), | ||
2664 | .papdRateMaskHt40 = LE32(0x6cf0e0e0), | ||
2665 | .futureModal = { | ||
2666 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, | ||
2667 | }, | ||
2668 | }, | ||
2669 | .base_ext2 = { | ||
2670 | .tempSlopeLow = 35, | ||
2671 | .tempSlopeHigh = 50, | ||
2672 | .xatten1DBLow = {0, 0, 0}, | ||
2673 | .xatten1MarginLow = {0, 0, 0}, | ||
2674 | .xatten1DBHigh = {0, 0, 0}, | ||
2675 | .xatten1MarginHigh = {0, 0, 0} | ||
2676 | }, | ||
2677 | .calFreqPier5G = { | ||
2678 | FREQ2FBIN(5180, 0), | ||
2679 | FREQ2FBIN(5220, 0), | ||
2680 | FREQ2FBIN(5320, 0), | ||
2681 | FREQ2FBIN(5400, 0), | ||
2682 | FREQ2FBIN(5500, 0), | ||
2683 | FREQ2FBIN(5600, 0), | ||
2684 | FREQ2FBIN(5700, 0), | ||
2685 | FREQ2FBIN(5785, 0) | ||
2686 | }, | ||
2687 | .calPierData5G = { | ||
2688 | { | ||
2689 | {0, 0, 0, 0, 0}, | ||
2690 | {0, 0, 0, 0, 0}, | ||
2691 | {0, 0, 0, 0, 0}, | ||
2692 | {0, 0, 0, 0, 0}, | ||
2693 | {0, 0, 0, 0, 0}, | ||
2694 | {0, 0, 0, 0, 0}, | ||
2695 | {0, 0, 0, 0, 0}, | ||
2696 | {0, 0, 0, 0, 0}, | ||
2697 | }, | ||
2698 | { | ||
2699 | {0, 0, 0, 0, 0}, | ||
2700 | {0, 0, 0, 0, 0}, | ||
2701 | {0, 0, 0, 0, 0}, | ||
2702 | {0, 0, 0, 0, 0}, | ||
2703 | {0, 0, 0, 0, 0}, | ||
2704 | {0, 0, 0, 0, 0}, | ||
2705 | {0, 0, 0, 0, 0}, | ||
2706 | {0, 0, 0, 0, 0}, | ||
2707 | }, | ||
2708 | { | ||
2709 | {0, 0, 0, 0, 0}, | ||
2710 | {0, 0, 0, 0, 0}, | ||
2711 | {0, 0, 0, 0, 0}, | ||
2712 | {0, 0, 0, 0, 0}, | ||
2713 | {0, 0, 0, 0, 0}, | ||
2714 | {0, 0, 0, 0, 0}, | ||
2715 | {0, 0, 0, 0, 0}, | ||
2716 | {0, 0, 0, 0, 0}, | ||
2717 | }, | ||
2718 | |||
2719 | }, | ||
2720 | .calTarget_freqbin_5G = { | ||
2721 | FREQ2FBIN(5180, 0), | ||
2722 | FREQ2FBIN(5240, 0), | ||
2723 | FREQ2FBIN(5320, 0), | ||
2724 | FREQ2FBIN(5400, 0), | ||
2725 | FREQ2FBIN(5500, 0), | ||
2726 | FREQ2FBIN(5600, 0), | ||
2727 | FREQ2FBIN(5700, 0), | ||
2728 | FREQ2FBIN(5825, 0) | ||
2729 | }, | ||
2730 | .calTarget_freqbin_5GHT20 = { | ||
2731 | FREQ2FBIN(5180, 0), | ||
2732 | FREQ2FBIN(5240, 0), | ||
2733 | FREQ2FBIN(5320, 0), | ||
2734 | FREQ2FBIN(5400, 0), | ||
2735 | FREQ2FBIN(5500, 0), | ||
2736 | FREQ2FBIN(5700, 0), | ||
2737 | FREQ2FBIN(5745, 0), | ||
2738 | FREQ2FBIN(5825, 0) | ||
2739 | }, | ||
2740 | .calTarget_freqbin_5GHT40 = { | ||
2741 | FREQ2FBIN(5180, 0), | ||
2742 | FREQ2FBIN(5240, 0), | ||
2743 | FREQ2FBIN(5320, 0), | ||
2744 | FREQ2FBIN(5400, 0), | ||
2745 | FREQ2FBIN(5500, 0), | ||
2746 | FREQ2FBIN(5700, 0), | ||
2747 | FREQ2FBIN(5745, 0), | ||
2748 | FREQ2FBIN(5825, 0) | ||
2749 | }, | ||
2750 | .calTargetPower5G = { | ||
2751 | /* 6-24,36,48,54 */ | ||
2752 | { {30, 30, 28, 24} }, | ||
2753 | { {30, 30, 28, 24} }, | ||
2754 | { {30, 30, 28, 24} }, | ||
2755 | { {30, 30, 28, 24} }, | ||
2756 | { {30, 30, 28, 24} }, | ||
2757 | { {30, 30, 28, 24} }, | ||
2758 | { {30, 30, 28, 24} }, | ||
2759 | { {30, 30, 28, 24} }, | ||
2760 | }, | ||
2761 | .calTargetPower5GHT20 = { | ||
2762 | /* | ||
2763 | * 0_8_16,1-3_9-11_17-19, | ||
2764 | * 4,5,6,7,12,13,14,15,20,21,22,23 | ||
2765 | */ | ||
2766 | { {30, 30, 30, 28, 24, 20, 30, 28, 24, 20, 0, 0, 0, 0} }, | ||
2767 | { {30, 30, 30, 28, 24, 20, 30, 28, 24, 20, 0, 0, 0, 0} }, | ||
2768 | { {30, 30, 30, 26, 22, 18, 30, 26, 22, 18, 0, 0, 0, 0} }, | ||
2769 | { {30, 30, 30, 26, 22, 18, 30, 26, 22, 18, 0, 0, 0, 0} }, | ||
2770 | { {30, 30, 30, 24, 20, 16, 30, 24, 20, 16, 0, 0, 0, 0} }, | ||
2771 | { {30, 30, 30, 24, 20, 16, 30, 24, 20, 16, 0, 0, 0, 0} }, | ||
2772 | { {30, 30, 30, 22, 18, 14, 30, 22, 18, 14, 0, 0, 0, 0} }, | ||
2773 | { {30, 30, 30, 22, 18, 14, 30, 22, 18, 14, 0, 0, 0, 0} }, | ||
2774 | }, | ||
2775 | .calTargetPower5GHT40 = { | ||
2776 | /* | ||
2777 | * 0_8_16,1-3_9-11_17-19, | ||
2778 | * 4,5,6,7,12,13,14,15,20,21,22,23 | ||
2779 | */ | ||
2780 | { {28, 28, 28, 26, 22, 18, 28, 26, 22, 18, 0, 0, 0, 0} }, | ||
2781 | { {28, 28, 28, 26, 22, 18, 28, 26, 22, 18, 0, 0, 0, 0} }, | ||
2782 | { {28, 28, 28, 24, 20, 16, 28, 24, 20, 16, 0, 0, 0, 0} }, | ||
2783 | { {28, 28, 28, 24, 20, 16, 28, 24, 20, 16, 0, 0, 0, 0} }, | ||
2784 | { {28, 28, 28, 22, 18, 14, 28, 22, 18, 14, 0, 0, 0, 0} }, | ||
2785 | { {28, 28, 28, 22, 18, 14, 28, 22, 18, 14, 0, 0, 0, 0} }, | ||
2786 | { {28, 28, 28, 20, 16, 12, 28, 20, 16, 12, 0, 0, 0, 0} }, | ||
2787 | { {28, 28, 28, 20, 16, 12, 28, 20, 16, 12, 0, 0, 0, 0} }, | ||
2788 | }, | ||
2789 | .ctlIndex_5G = { | ||
2790 | 0x10, 0x16, 0x18, 0x40, 0x46, | ||
2791 | 0x48, 0x30, 0x36, 0x38 | ||
2792 | }, | ||
2793 | .ctl_freqbin_5G = { | ||
2794 | { | ||
2795 | /* Data[0].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0), | ||
2796 | /* Data[0].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0), | ||
2797 | /* Data[0].ctlEdges[2].bChannel */ FREQ2FBIN(5280, 0), | ||
2798 | /* Data[0].ctlEdges[3].bChannel */ FREQ2FBIN(5500, 0), | ||
2799 | /* Data[0].ctlEdges[4].bChannel */ FREQ2FBIN(5600, 0), | ||
2800 | /* Data[0].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0), | ||
2801 | /* Data[0].ctlEdges[6].bChannel */ FREQ2FBIN(5745, 0), | ||
2802 | /* Data[0].ctlEdges[7].bChannel */ FREQ2FBIN(5825, 0) | ||
2803 | }, | ||
2804 | { | ||
2805 | /* Data[1].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0), | ||
2806 | /* Data[1].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0), | ||
2807 | /* Data[1].ctlEdges[2].bChannel */ FREQ2FBIN(5280, 0), | ||
2808 | /* Data[1].ctlEdges[3].bChannel */ FREQ2FBIN(5500, 0), | ||
2809 | /* Data[1].ctlEdges[4].bChannel */ FREQ2FBIN(5520, 0), | ||
2810 | /* Data[1].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0), | ||
2811 | /* Data[1].ctlEdges[6].bChannel */ FREQ2FBIN(5745, 0), | ||
2812 | /* Data[1].ctlEdges[7].bChannel */ FREQ2FBIN(5825, 0) | ||
2813 | }, | ||
2814 | |||
2815 | { | ||
2816 | /* Data[2].ctlEdges[0].bChannel */ FREQ2FBIN(5190, 0), | ||
2817 | /* Data[2].ctlEdges[1].bChannel */ FREQ2FBIN(5230, 0), | ||
2818 | /* Data[2].ctlEdges[2].bChannel */ FREQ2FBIN(5270, 0), | ||
2819 | /* Data[2].ctlEdges[3].bChannel */ FREQ2FBIN(5310, 0), | ||
2820 | /* Data[2].ctlEdges[4].bChannel */ FREQ2FBIN(5510, 0), | ||
2821 | /* Data[2].ctlEdges[5].bChannel */ FREQ2FBIN(5550, 0), | ||
2822 | /* Data[2].ctlEdges[6].bChannel */ FREQ2FBIN(5670, 0), | ||
2823 | /* Data[2].ctlEdges[7].bChannel */ FREQ2FBIN(5755, 0) | ||
2824 | }, | ||
2825 | |||
2826 | { | ||
2827 | /* Data[3].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0), | ||
2828 | /* Data[3].ctlEdges[1].bChannel */ FREQ2FBIN(5200, 0), | ||
2829 | /* Data[3].ctlEdges[2].bChannel */ FREQ2FBIN(5260, 0), | ||
2830 | /* Data[3].ctlEdges[3].bChannel */ FREQ2FBIN(5320, 0), | ||
2831 | /* Data[3].ctlEdges[4].bChannel */ FREQ2FBIN(5500, 0), | ||
2832 | /* Data[3].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0), | ||
2833 | /* Data[3].ctlEdges[6].bChannel */ 0xFF, | ||
2834 | /* Data[3].ctlEdges[7].bChannel */ 0xFF, | ||
2835 | }, | ||
2836 | |||
2837 | { | ||
2838 | /* Data[4].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0), | ||
2839 | /* Data[4].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0), | ||
2840 | /* Data[4].ctlEdges[2].bChannel */ FREQ2FBIN(5500, 0), | ||
2841 | /* Data[4].ctlEdges[3].bChannel */ FREQ2FBIN(5700, 0), | ||
2842 | /* Data[4].ctlEdges[4].bChannel */ 0xFF, | ||
2843 | /* Data[4].ctlEdges[5].bChannel */ 0xFF, | ||
2844 | /* Data[4].ctlEdges[6].bChannel */ 0xFF, | ||
2845 | /* Data[4].ctlEdges[7].bChannel */ 0xFF, | ||
2846 | }, | ||
2847 | |||
2848 | { | ||
2849 | /* Data[5].ctlEdges[0].bChannel */ FREQ2FBIN(5190, 0), | ||
2850 | /* Data[5].ctlEdges[1].bChannel */ FREQ2FBIN(5270, 0), | ||
2851 | /* Data[5].ctlEdges[2].bChannel */ FREQ2FBIN(5310, 0), | ||
2852 | /* Data[5].ctlEdges[3].bChannel */ FREQ2FBIN(5510, 0), | ||
2853 | /* Data[5].ctlEdges[4].bChannel */ FREQ2FBIN(5590, 0), | ||
2854 | /* Data[5].ctlEdges[5].bChannel */ FREQ2FBIN(5670, 0), | ||
2855 | /* Data[5].ctlEdges[6].bChannel */ 0xFF, | ||
2856 | /* Data[5].ctlEdges[7].bChannel */ 0xFF | ||
2857 | }, | ||
2858 | |||
2859 | { | ||
2860 | /* Data[6].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0), | ||
2861 | /* Data[6].ctlEdges[1].bChannel */ FREQ2FBIN(5200, 0), | ||
2862 | /* Data[6].ctlEdges[2].bChannel */ FREQ2FBIN(5220, 0), | ||
2863 | /* Data[6].ctlEdges[3].bChannel */ FREQ2FBIN(5260, 0), | ||
2864 | /* Data[6].ctlEdges[4].bChannel */ FREQ2FBIN(5500, 0), | ||
2865 | /* Data[6].ctlEdges[5].bChannel */ FREQ2FBIN(5600, 0), | ||
2866 | /* Data[6].ctlEdges[6].bChannel */ FREQ2FBIN(5700, 0), | ||
2867 | /* Data[6].ctlEdges[7].bChannel */ FREQ2FBIN(5745, 0) | ||
2868 | }, | ||
2869 | |||
2870 | { | ||
2871 | /* Data[7].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0), | ||
2872 | /* Data[7].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0), | ||
2873 | /* Data[7].ctlEdges[2].bChannel */ FREQ2FBIN(5320, 0), | ||
2874 | /* Data[7].ctlEdges[3].bChannel */ FREQ2FBIN(5500, 0), | ||
2875 | /* Data[7].ctlEdges[4].bChannel */ FREQ2FBIN(5560, 0), | ||
2876 | /* Data[7].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0), | ||
2877 | /* Data[7].ctlEdges[6].bChannel */ FREQ2FBIN(5745, 0), | ||
2878 | /* Data[7].ctlEdges[7].bChannel */ FREQ2FBIN(5825, 0) | ||
2879 | }, | ||
2880 | |||
2881 | { | ||
2882 | /* Data[8].ctlEdges[0].bChannel */ FREQ2FBIN(5190, 0), | ||
2883 | /* Data[8].ctlEdges[1].bChannel */ FREQ2FBIN(5230, 0), | ||
2884 | /* Data[8].ctlEdges[2].bChannel */ FREQ2FBIN(5270, 0), | ||
2885 | /* Data[8].ctlEdges[3].bChannel */ FREQ2FBIN(5510, 0), | ||
2886 | /* Data[8].ctlEdges[4].bChannel */ FREQ2FBIN(5550, 0), | ||
2887 | /* Data[8].ctlEdges[5].bChannel */ FREQ2FBIN(5670, 0), | ||
2888 | /* Data[8].ctlEdges[6].bChannel */ FREQ2FBIN(5755, 0), | ||
2889 | /* Data[8].ctlEdges[7].bChannel */ FREQ2FBIN(5795, 0) | ||
2890 | } | ||
2891 | }, | ||
2892 | .ctlPowerData_5G = { | ||
2893 | { | ||
2894 | { | ||
2895 | {60, 1}, {60, 1}, {60, 1}, {60, 1}, | ||
2896 | {60, 1}, {60, 1}, {60, 1}, {60, 0}, | ||
2897 | } | ||
2898 | }, | ||
2899 | { | ||
2900 | { | ||
2901 | {60, 1}, {60, 1}, {60, 1}, {60, 1}, | ||
2902 | {60, 1}, {60, 1}, {60, 1}, {60, 0}, | ||
2903 | } | ||
2904 | }, | ||
2905 | { | ||
2906 | { | ||
2907 | {60, 0}, {60, 1}, {60, 0}, {60, 1}, | ||
2908 | {60, 1}, {60, 1}, {60, 1}, {60, 1}, | ||
2909 | } | ||
2910 | }, | ||
2911 | { | ||
2912 | { | ||
2913 | {60, 0}, {60, 1}, {60, 1}, {60, 0}, | ||
2914 | {60, 1}, {60, 0}, {60, 0}, {60, 0}, | ||
2915 | } | ||
2916 | }, | ||
2917 | { | ||
2918 | { | ||
2919 | {60, 1}, {60, 1}, {60, 1}, {60, 0}, | ||
2920 | {60, 0}, {60, 0}, {60, 0}, {60, 0}, | ||
2921 | } | ||
2922 | }, | ||
2923 | { | ||
2924 | { | ||
2925 | {60, 1}, {60, 1}, {60, 1}, {60, 1}, | ||
2926 | {60, 1}, {60, 0}, {60, 0}, {60, 0}, | ||
2927 | } | ||
2928 | }, | ||
2929 | { | ||
2930 | { | ||
2931 | {60, 1}, {60, 1}, {60, 1}, {60, 1}, | ||
2932 | {60, 1}, {60, 1}, {60, 1}, {60, 1}, | ||
2933 | } | ||
2934 | }, | ||
2935 | { | ||
2936 | { | ||
2937 | {60, 1}, {60, 1}, {60, 0}, {60, 1}, | ||
2938 | {60, 1}, {60, 1}, {60, 1}, {60, 0}, | ||
2939 | } | ||
2940 | }, | ||
2941 | { | ||
2942 | { | ||
2943 | {60, 1}, {60, 0}, {60, 1}, {60, 1}, | ||
2944 | {60, 1}, {60, 1}, {60, 0}, {60, 1}, | ||
2945 | } | ||
2946 | }, | ||
2947 | } | ||
2948 | }; | ||
2949 | |||
2950 | |||
2951 | static const struct ar9300_eeprom *ar9300_eep_templates[] = { | ||
2952 | &ar9300_default, | ||
2953 | &ar9300_x112, | ||
2954 | &ar9300_h116, | ||
2955 | &ar9300_h112, | ||
2956 | &ar9300_x113, | ||
2957 | }; | ||
2958 | |||
2959 | static const struct ar9300_eeprom *ar9003_eeprom_struct_find_by_id(int id) | ||
2960 | { | ||
2961 | #define N_LOOP (sizeof(ar9300_eep_templates) / sizeof(ar9300_eep_templates[0])) | ||
2962 | int it; | ||
2963 | |||
2964 | for (it = 0; it < N_LOOP; it++) | ||
2965 | if (ar9300_eep_templates[it]->templateVersion == id) | ||
2966 | return ar9300_eep_templates[it]; | ||
2967 | return NULL; | ||
2968 | #undef N_LOOP | ||
2969 | } | ||
2970 | |||
2971 | |||
626 | static u16 ath9k_hw_fbin2freq(u8 fbin, bool is2GHz) | 2972 | static u16 ath9k_hw_fbin2freq(u8 fbin, bool is2GHz) |
627 | { | 2973 | { |
628 | if (fbin == AR9300_BCHAN_UNUSED) | 2974 | if (fbin == AR9300_BCHAN_UNUSED) |
@@ -636,6 +2982,16 @@ static int ath9k_hw_ar9300_check_eeprom(struct ath_hw *ah) | |||
636 | return 0; | 2982 | return 0; |
637 | } | 2983 | } |
638 | 2984 | ||
2985 | static int interpolate(int x, int xa, int xb, int ya, int yb) | ||
2986 | { | ||
2987 | int bf, factor, plus; | ||
2988 | |||
2989 | bf = 2 * (yb - ya) * (x - xa) / (xb - xa); | ||
2990 | factor = bf / 2; | ||
2991 | plus = bf % 2; | ||
2992 | return ya + factor + plus; | ||
2993 | } | ||
2994 | |||
639 | static u32 ath9k_hw_ar9300_get_eeprom(struct ath_hw *ah, | 2995 | static u32 ath9k_hw_ar9300_get_eeprom(struct ath_hw *ah, |
640 | enum eeprom_param param) | 2996 | enum eeprom_param param) |
641 | { | 2997 | { |
@@ -748,6 +3104,36 @@ error: | |||
748 | return false; | 3104 | return false; |
749 | } | 3105 | } |
750 | 3106 | ||
3107 | static bool ar9300_otp_read_word(struct ath_hw *ah, int addr, u32 *data) | ||
3108 | { | ||
3109 | REG_READ(ah, AR9300_OTP_BASE + (4 * addr)); | ||
3110 | |||
3111 | if (!ath9k_hw_wait(ah, AR9300_OTP_STATUS, AR9300_OTP_STATUS_TYPE, | ||
3112 | AR9300_OTP_STATUS_VALID, 1000)) | ||
3113 | return false; | ||
3114 | |||
3115 | *data = REG_READ(ah, AR9300_OTP_READ_DATA); | ||
3116 | return true; | ||
3117 | } | ||
3118 | |||
3119 | static bool ar9300_read_otp(struct ath_hw *ah, int address, u8 *buffer, | ||
3120 | int count) | ||
3121 | { | ||
3122 | u32 data; | ||
3123 | int i; | ||
3124 | |||
3125 | for (i = 0; i < count; i++) { | ||
3126 | int offset = 8 * ((address - i) % 4); | ||
3127 | if (!ar9300_otp_read_word(ah, (address - i) / 4, &data)) | ||
3128 | return false; | ||
3129 | |||
3130 | buffer[i] = (data >> offset) & 0xff; | ||
3131 | } | ||
3132 | |||
3133 | return true; | ||
3134 | } | ||
3135 | |||
3136 | |||
751 | static void ar9300_comp_hdr_unpack(u8 *best, int *code, int *reference, | 3137 | static void ar9300_comp_hdr_unpack(u8 *best, int *code, int *reference, |
752 | int *length, int *major, int *minor) | 3138 | int *length, int *major, int *minor) |
753 | { | 3139 | { |
@@ -824,6 +3210,7 @@ static int ar9300_compress_decision(struct ath_hw *ah, | |||
824 | { | 3210 | { |
825 | struct ath_common *common = ath9k_hw_common(ah); | 3211 | struct ath_common *common = ath9k_hw_common(ah); |
826 | u8 *dptr; | 3212 | u8 *dptr; |
3213 | const struct ar9300_eeprom *eep = NULL; | ||
827 | 3214 | ||
828 | switch (code) { | 3215 | switch (code) { |
829 | case _CompressNone: | 3216 | case _CompressNone: |
@@ -841,13 +3228,14 @@ static int ar9300_compress_decision(struct ath_hw *ah, | |||
841 | if (reference == 0) { | 3228 | if (reference == 0) { |
842 | dptr = mptr; | 3229 | dptr = mptr; |
843 | } else { | 3230 | } else { |
844 | if (reference != 2) { | 3231 | eep = ar9003_eeprom_struct_find_by_id(reference); |
3232 | if (eep == NULL) { | ||
845 | ath_print(common, ATH_DBG_EEPROM, | 3233 | ath_print(common, ATH_DBG_EEPROM, |
846 | "cant find reference eeprom" | 3234 | "cant find reference eeprom" |
847 | "struct %d\n", reference); | 3235 | "struct %d\n", reference); |
848 | return -1; | 3236 | return -1; |
849 | } | 3237 | } |
850 | memcpy(mptr, &ar9300_default, mdata_size); | 3238 | memcpy(mptr, eep, mdata_size); |
851 | } | 3239 | } |
852 | ath_print(common, ATH_DBG_EEPROM, | 3240 | ath_print(common, ATH_DBG_EEPROM, |
853 | "restore eeprom %d: block, reference %d," | 3241 | "restore eeprom %d: block, reference %d," |
@@ -863,6 +3251,38 @@ static int ar9300_compress_decision(struct ath_hw *ah, | |||
863 | return 0; | 3251 | return 0; |
864 | } | 3252 | } |
865 | 3253 | ||
3254 | typedef bool (*eeprom_read_op)(struct ath_hw *ah, int address, u8 *buffer, | ||
3255 | int count); | ||
3256 | |||
3257 | static bool ar9300_check_header(void *data) | ||
3258 | { | ||
3259 | u32 *word = data; | ||
3260 | return !(*word == 0 || *word == ~0); | ||
3261 | } | ||
3262 | |||
3263 | static bool ar9300_check_eeprom_header(struct ath_hw *ah, eeprom_read_op read, | ||
3264 | int base_addr) | ||
3265 | { | ||
3266 | u8 header[4]; | ||
3267 | |||
3268 | if (!read(ah, base_addr, header, 4)) | ||
3269 | return false; | ||
3270 | |||
3271 | return ar9300_check_header(header); | ||
3272 | } | ||
3273 | |||
3274 | static int ar9300_eeprom_restore_flash(struct ath_hw *ah, u8 *mptr, | ||
3275 | int mdata_size) | ||
3276 | { | ||
3277 | struct ath_common *common = ath9k_hw_common(ah); | ||
3278 | u16 *data = (u16 *) mptr; | ||
3279 | int i; | ||
3280 | |||
3281 | for (i = 0; i < mdata_size / 2; i++, data++) | ||
3282 | ath9k_hw_nvram_read(common, i, data); | ||
3283 | |||
3284 | return 0; | ||
3285 | } | ||
866 | /* | 3286 | /* |
867 | * Read the configuration data from the eeprom. | 3287 | * Read the configuration data from the eeprom. |
868 | * The data can be put in any specified memory buffer. | 3288 | * The data can be put in any specified memory buffer. |
@@ -883,6 +3303,10 @@ static int ar9300_eeprom_restore_internal(struct ath_hw *ah, | |||
883 | int it; | 3303 | int it; |
884 | u16 checksum, mchecksum; | 3304 | u16 checksum, mchecksum; |
885 | struct ath_common *common = ath9k_hw_common(ah); | 3305 | struct ath_common *common = ath9k_hw_common(ah); |
3306 | eeprom_read_op read; | ||
3307 | |||
3308 | if (ath9k_hw_use_flash(ah)) | ||
3309 | return ar9300_eeprom_restore_flash(ah, mptr, mdata_size); | ||
886 | 3310 | ||
887 | word = kzalloc(2048, GFP_KERNEL); | 3311 | word = kzalloc(2048, GFP_KERNEL); |
888 | if (!word) | 3312 | if (!word) |
@@ -890,14 +3314,42 @@ static int ar9300_eeprom_restore_internal(struct ath_hw *ah, | |||
890 | 3314 | ||
891 | memcpy(mptr, &ar9300_default, mdata_size); | 3315 | memcpy(mptr, &ar9300_default, mdata_size); |
892 | 3316 | ||
3317 | read = ar9300_read_eeprom; | ||
3318 | cptr = AR9300_BASE_ADDR; | ||
3319 | ath_print(common, ATH_DBG_EEPROM, | ||
3320 | "Trying EEPROM accesss at Address 0x%04x\n", cptr); | ||
3321 | if (ar9300_check_eeprom_header(ah, read, cptr)) | ||
3322 | goto found; | ||
3323 | |||
3324 | cptr = AR9300_BASE_ADDR_512; | ||
3325 | ath_print(common, ATH_DBG_EEPROM, | ||
3326 | "Trying EEPROM accesss at Address 0x%04x\n", cptr); | ||
3327 | if (ar9300_check_eeprom_header(ah, read, cptr)) | ||
3328 | goto found; | ||
3329 | |||
3330 | read = ar9300_read_otp; | ||
893 | cptr = AR9300_BASE_ADDR; | 3331 | cptr = AR9300_BASE_ADDR; |
3332 | ath_print(common, ATH_DBG_EEPROM, | ||
3333 | "Trying OTP accesss at Address 0x%04x\n", cptr); | ||
3334 | if (ar9300_check_eeprom_header(ah, read, cptr)) | ||
3335 | goto found; | ||
3336 | |||
3337 | cptr = AR9300_BASE_ADDR_512; | ||
3338 | ath_print(common, ATH_DBG_EEPROM, | ||
3339 | "Trying OTP accesss at Address 0x%04x\n", cptr); | ||
3340 | if (ar9300_check_eeprom_header(ah, read, cptr)) | ||
3341 | goto found; | ||
3342 | |||
3343 | goto fail; | ||
3344 | |||
3345 | found: | ||
3346 | ath_print(common, ATH_DBG_EEPROM, "Found valid EEPROM data"); | ||
3347 | |||
894 | for (it = 0; it < MSTATE; it++) { | 3348 | for (it = 0; it < MSTATE; it++) { |
895 | if (!ar9300_read_eeprom(ah, cptr, word, COMP_HDR_LEN)) | 3349 | if (!read(ah, cptr, word, COMP_HDR_LEN)) |
896 | goto fail; | 3350 | goto fail; |
897 | 3351 | ||
898 | if ((word[0] == 0 && word[1] == 0 && word[2] == 0 && | 3352 | if (!ar9300_check_header(word)) |
899 | word[3] == 0) || (word[0] == 0xff && word[1] == 0xff | ||
900 | && word[2] == 0xff && word[3] == 0xff)) | ||
901 | break; | 3353 | break; |
902 | 3354 | ||
903 | ar9300_comp_hdr_unpack(word, &code, &reference, | 3355 | ar9300_comp_hdr_unpack(word, &code, &reference, |
@@ -914,8 +3366,7 @@ static int ar9300_eeprom_restore_internal(struct ath_hw *ah, | |||
914 | } | 3366 | } |
915 | 3367 | ||
916 | osize = length; | 3368 | osize = length; |
917 | ar9300_read_eeprom(ah, cptr, word, | 3369 | read(ah, cptr, word, COMP_HDR_LEN + osize + COMP_CKSUM_LEN); |
918 | COMP_HDR_LEN + osize + COMP_CKSUM_LEN); | ||
919 | checksum = ar9300_comp_cksum(&word[COMP_HDR_LEN], length); | 3370 | checksum = ar9300_comp_cksum(&word[COMP_HDR_LEN], length); |
920 | mchecksum = word[COMP_HDR_LEN + osize] | | 3371 | mchecksum = word[COMP_HDR_LEN + osize] | |
921 | (word[COMP_HDR_LEN + osize + 1] << 8); | 3372 | (word[COMP_HDR_LEN + osize + 1] << 8); |
@@ -992,9 +3443,9 @@ static s32 ar9003_hw_xpa_bias_level_get(struct ath_hw *ah, bool is2ghz) | |||
992 | static void ar9003_hw_xpa_bias_level_apply(struct ath_hw *ah, bool is2ghz) | 3443 | static void ar9003_hw_xpa_bias_level_apply(struct ath_hw *ah, bool is2ghz) |
993 | { | 3444 | { |
994 | int bias = ar9003_hw_xpa_bias_level_get(ah, is2ghz); | 3445 | int bias = ar9003_hw_xpa_bias_level_get(ah, is2ghz); |
995 | REG_RMW_FIELD(ah, AR_CH0_TOP, AR_CH0_TOP_XPABIASLVL, (bias & 0x3)); | 3446 | REG_RMW_FIELD(ah, AR_CH0_TOP, AR_CH0_TOP_XPABIASLVL, bias); |
996 | REG_RMW_FIELD(ah, AR_CH0_THERM, AR_CH0_THERM_SPARE, | 3447 | REG_RMW_FIELD(ah, AR_CH0_THERM, AR_CH0_THERM_XPABIASLVL_MSB, bias >> 2); |
997 | ((bias >> 2) & 0x3)); | 3448 | REG_RMW_FIELD(ah, AR_CH0_THERM, AR_CH0_THERM_XPASHORT2GND, 1); |
998 | } | 3449 | } |
999 | 3450 | ||
1000 | static u32 ar9003_hw_ant_ctrl_common_get(struct ath_hw *ah, bool is2ghz) | 3451 | static u32 ar9003_hw_ant_ctrl_common_get(struct ath_hw *ah, bool is2ghz) |
@@ -1097,6 +3548,82 @@ static void ar9003_hw_drive_strength_apply(struct ath_hw *ah) | |||
1097 | REG_WRITE(ah, AR_PHY_65NM_CH0_BIAS4, reg); | 3548 | REG_WRITE(ah, AR_PHY_65NM_CH0_BIAS4, reg); |
1098 | } | 3549 | } |
1099 | 3550 | ||
3551 | static u16 ar9003_hw_atten_chain_get(struct ath_hw *ah, int chain, | ||
3552 | struct ath9k_channel *chan) | ||
3553 | { | ||
3554 | int f[3], t[3]; | ||
3555 | u16 value; | ||
3556 | struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep; | ||
3557 | |||
3558 | if (chain >= 0 && chain < 3) { | ||
3559 | if (IS_CHAN_2GHZ(chan)) | ||
3560 | return eep->modalHeader2G.xatten1DB[chain]; | ||
3561 | else if (eep->base_ext2.xatten1DBLow[chain] != 0) { | ||
3562 | t[0] = eep->base_ext2.xatten1DBLow[chain]; | ||
3563 | f[0] = 5180; | ||
3564 | t[1] = eep->modalHeader5G.xatten1DB[chain]; | ||
3565 | f[1] = 5500; | ||
3566 | t[2] = eep->base_ext2.xatten1DBHigh[chain]; | ||
3567 | f[2] = 5785; | ||
3568 | value = ar9003_hw_power_interpolate((s32) chan->channel, | ||
3569 | f, t, 3); | ||
3570 | return value; | ||
3571 | } else | ||
3572 | return eep->modalHeader5G.xatten1DB[chain]; | ||
3573 | } | ||
3574 | |||
3575 | return 0; | ||
3576 | } | ||
3577 | |||
3578 | |||
3579 | static u16 ar9003_hw_atten_chain_get_margin(struct ath_hw *ah, int chain, | ||
3580 | struct ath9k_channel *chan) | ||
3581 | { | ||
3582 | int f[3], t[3]; | ||
3583 | u16 value; | ||
3584 | struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep; | ||
3585 | |||
3586 | if (chain >= 0 && chain < 3) { | ||
3587 | if (IS_CHAN_2GHZ(chan)) | ||
3588 | return eep->modalHeader2G.xatten1Margin[chain]; | ||
3589 | else if (eep->base_ext2.xatten1MarginLow[chain] != 0) { | ||
3590 | t[0] = eep->base_ext2.xatten1MarginLow[chain]; | ||
3591 | f[0] = 5180; | ||
3592 | t[1] = eep->modalHeader5G.xatten1Margin[chain]; | ||
3593 | f[1] = 5500; | ||
3594 | t[2] = eep->base_ext2.xatten1MarginHigh[chain]; | ||
3595 | f[2] = 5785; | ||
3596 | value = ar9003_hw_power_interpolate((s32) chan->channel, | ||
3597 | f, t, 3); | ||
3598 | return value; | ||
3599 | } else | ||
3600 | return eep->modalHeader5G.xatten1Margin[chain]; | ||
3601 | } | ||
3602 | |||
3603 | return 0; | ||
3604 | } | ||
3605 | |||
3606 | static void ar9003_hw_atten_apply(struct ath_hw *ah, struct ath9k_channel *chan) | ||
3607 | { | ||
3608 | int i; | ||
3609 | u16 value; | ||
3610 | unsigned long ext_atten_reg[3] = {AR_PHY_EXT_ATTEN_CTL_0, | ||
3611 | AR_PHY_EXT_ATTEN_CTL_1, | ||
3612 | AR_PHY_EXT_ATTEN_CTL_2, | ||
3613 | }; | ||
3614 | |||
3615 | /* Test value. if 0 then attenuation is unused. Don't load anything. */ | ||
3616 | for (i = 0; i < 3; i++) { | ||
3617 | value = ar9003_hw_atten_chain_get(ah, i, chan); | ||
3618 | REG_RMW_FIELD(ah, ext_atten_reg[i], | ||
3619 | AR_PHY_EXT_ATTEN_CTL_XATTEN1_DB, value); | ||
3620 | |||
3621 | value = ar9003_hw_atten_chain_get_margin(ah, i, chan); | ||
3622 | REG_RMW_FIELD(ah, ext_atten_reg[i], | ||
3623 | AR_PHY_EXT_ATTEN_CTL_XATTEN1_MARGIN, value); | ||
3624 | } | ||
3625 | } | ||
3626 | |||
1100 | static void ar9003_hw_internal_regulator_apply(struct ath_hw *ah) | 3627 | static void ar9003_hw_internal_regulator_apply(struct ath_hw *ah) |
1101 | { | 3628 | { |
1102 | int internal_regulator = | 3629 | int internal_regulator = |
@@ -1128,6 +3655,7 @@ static void ath9k_hw_ar9300_set_board_values(struct ath_hw *ah, | |||
1128 | ar9003_hw_xpa_bias_level_apply(ah, IS_CHAN_2GHZ(chan)); | 3655 | ar9003_hw_xpa_bias_level_apply(ah, IS_CHAN_2GHZ(chan)); |
1129 | ar9003_hw_ant_ctrl_apply(ah, IS_CHAN_2GHZ(chan)); | 3656 | ar9003_hw_ant_ctrl_apply(ah, IS_CHAN_2GHZ(chan)); |
1130 | ar9003_hw_drive_strength_apply(ah); | 3657 | ar9003_hw_drive_strength_apply(ah); |
3658 | ar9003_hw_atten_apply(ah, chan); | ||
1131 | ar9003_hw_internal_regulator_apply(ah); | 3659 | ar9003_hw_internal_regulator_apply(ah); |
1132 | } | 3660 | } |
1133 | 3661 | ||
@@ -1189,7 +3717,7 @@ static int ar9003_hw_power_interpolate(int32_t x, | |||
1189 | if (hx == lx) | 3717 | if (hx == lx) |
1190 | y = ly; | 3718 | y = ly; |
1191 | else /* interpolate */ | 3719 | else /* interpolate */ |
1192 | y = ly + (((x - lx) * (hy - ly)) / (hx - lx)); | 3720 | y = interpolate(x, lx, hx, ly, hy); |
1193 | } else /* only low is good, use it */ | 3721 | } else /* only low is good, use it */ |
1194 | y = ly; | 3722 | y = ly; |
1195 | } else if (hhave) /* only high is good, use it */ | 3723 | } else if (hhave) /* only high is good, use it */ |
@@ -1637,6 +4165,7 @@ static int ar9003_hw_power_control_override(struct ath_hw *ah, | |||
1637 | { | 4165 | { |
1638 | int tempSlope = 0; | 4166 | int tempSlope = 0; |
1639 | struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep; | 4167 | struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep; |
4168 | int f[3], t[3]; | ||
1640 | 4169 | ||
1641 | REG_RMW(ah, AR_PHY_TPC_11_B0, | 4170 | REG_RMW(ah, AR_PHY_TPC_11_B0, |
1642 | (correction[0] << AR_PHY_TPC_OLPC_GAIN_DELTA_S), | 4171 | (correction[0] << AR_PHY_TPC_OLPC_GAIN_DELTA_S), |
@@ -1665,7 +4194,16 @@ static int ar9003_hw_power_control_override(struct ath_hw *ah, | |||
1665 | */ | 4194 | */ |
1666 | if (frequency < 4000) | 4195 | if (frequency < 4000) |
1667 | tempSlope = eep->modalHeader2G.tempSlope; | 4196 | tempSlope = eep->modalHeader2G.tempSlope; |
1668 | else | 4197 | else if (eep->base_ext2.tempSlopeLow != 0) { |
4198 | t[0] = eep->base_ext2.tempSlopeLow; | ||
4199 | f[0] = 5180; | ||
4200 | t[1] = eep->modalHeader5G.tempSlope; | ||
4201 | f[1] = 5500; | ||
4202 | t[2] = eep->base_ext2.tempSlopeHigh; | ||
4203 | f[2] = 5785; | ||
4204 | tempSlope = ar9003_hw_power_interpolate((s32) frequency, | ||
4205 | f, t, 3); | ||
4206 | } else | ||
1669 | tempSlope = eep->modalHeader5G.tempSlope; | 4207 | tempSlope = eep->modalHeader5G.tempSlope; |
1670 | 4208 | ||
1671 | REG_RMW_FIELD(ah, AR_PHY_TPC_19, AR_PHY_TPC_19_ALPHA_THERM, tempSlope); | 4209 | REG_RMW_FIELD(ah, AR_PHY_TPC_19, AR_PHY_TPC_19_ALPHA_THERM, tempSlope); |
@@ -1769,25 +4307,23 @@ static int ar9003_hw_calibration_apply(struct ath_hw *ah, int frequency) | |||
1769 | /* so is the high frequency, interpolate */ | 4307 | /* so is the high frequency, interpolate */ |
1770 | if (hfrequency[ichain] - frequency < 1000) { | 4308 | if (hfrequency[ichain] - frequency < 1000) { |
1771 | 4309 | ||
1772 | correction[ichain] = lcorrection[ichain] + | 4310 | correction[ichain] = interpolate(frequency, |
1773 | (((frequency - lfrequency[ichain]) * | 4311 | lfrequency[ichain], |
1774 | (hcorrection[ichain] - | 4312 | hfrequency[ichain], |
1775 | lcorrection[ichain])) / | 4313 | lcorrection[ichain], |
1776 | (hfrequency[ichain] - lfrequency[ichain])); | 4314 | hcorrection[ichain]); |
1777 | 4315 | ||
1778 | temperature[ichain] = ltemperature[ichain] + | 4316 | temperature[ichain] = interpolate(frequency, |
1779 | (((frequency - lfrequency[ichain]) * | 4317 | lfrequency[ichain], |
1780 | (htemperature[ichain] - | 4318 | hfrequency[ichain], |
1781 | ltemperature[ichain])) / | 4319 | ltemperature[ichain], |
1782 | (hfrequency[ichain] - lfrequency[ichain])); | 4320 | htemperature[ichain]); |
1783 | 4321 | ||
1784 | voltage[ichain] = | 4322 | voltage[ichain] = interpolate(frequency, |
1785 | lvoltage[ichain] + | 4323 | lfrequency[ichain], |
1786 | (((frequency - | 4324 | hfrequency[ichain], |
1787 | lfrequency[ichain]) * (hvoltage[ichain] - | 4325 | lvoltage[ichain], |
1788 | lvoltage[ichain])) | 4326 | hvoltage[ichain]); |
1789 | / (hfrequency[ichain] - | ||
1790 | lfrequency[ichain])); | ||
1791 | } | 4327 | } |
1792 | /* only low is good, use it */ | 4328 | /* only low is good, use it */ |
1793 | else { | 4329 | else { |
@@ -1919,14 +4455,16 @@ static void ar9003_hw_set_power_per_rate_table(struct ath_hw *ah, | |||
1919 | int i; | 4455 | int i; |
1920 | int16_t twiceLargestAntenna; | 4456 | int16_t twiceLargestAntenna; |
1921 | u16 scaledPower = 0, minCtlPower, maxRegAllowedPower; | 4457 | u16 scaledPower = 0, minCtlPower, maxRegAllowedPower; |
1922 | u16 ctlModesFor11a[] = { | 4458 | static const u16 ctlModesFor11a[] = { |
1923 | CTL_11A, CTL_5GHT20, CTL_11A_EXT, CTL_5GHT40 | 4459 | CTL_11A, CTL_5GHT20, CTL_11A_EXT, CTL_5GHT40 |
1924 | }; | 4460 | }; |
1925 | u16 ctlModesFor11g[] = { | 4461 | static const u16 ctlModesFor11g[] = { |
1926 | CTL_11B, CTL_11G, CTL_2GHT20, CTL_11B_EXT, | 4462 | CTL_11B, CTL_11G, CTL_2GHT20, CTL_11B_EXT, |
1927 | CTL_11G_EXT, CTL_2GHT40 | 4463 | CTL_11G_EXT, CTL_2GHT40 |
1928 | }; | 4464 | }; |
1929 | u16 numCtlModes, *pCtlMode, ctlMode, freq; | 4465 | u16 numCtlModes; |
4466 | const u16 *pCtlMode; | ||
4467 | u16 ctlMode, freq; | ||
1930 | struct chan_centers centers; | 4468 | struct chan_centers centers; |
1931 | u8 *ctlIndex; | 4469 | u8 *ctlIndex; |
1932 | u8 ctlNum; | 4470 | u8 ctlNum; |
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h index 3c533bb983c7..57f64dbbcd89 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h +++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h | |||
@@ -79,6 +79,15 @@ | |||
79 | #define FIXED_CCA_THRESHOLD 15 | 79 | #define FIXED_CCA_THRESHOLD 15 |
80 | 80 | ||
81 | #define AR9300_BASE_ADDR 0x3ff | 81 | #define AR9300_BASE_ADDR 0x3ff |
82 | #define AR9300_BASE_ADDR_512 0x1ff | ||
83 | |||
84 | #define AR9300_OTP_BASE 0x14000 | ||
85 | #define AR9300_OTP_STATUS 0x15f18 | ||
86 | #define AR9300_OTP_STATUS_TYPE 0x7 | ||
87 | #define AR9300_OTP_STATUS_VALID 0x4 | ||
88 | #define AR9300_OTP_STATUS_ACCESS_BUSY 0x2 | ||
89 | #define AR9300_OTP_STATUS_SM_BUSY 0x1 | ||
90 | #define AR9300_OTP_READ_DATA 0x15f1c | ||
82 | 91 | ||
83 | enum targetPowerHTRates { | 92 | enum targetPowerHTRates { |
84 | HT_TARGET_RATE_0_8_16, | 93 | HT_TARGET_RATE_0_8_16, |
@@ -236,7 +245,7 @@ struct ar9300_modal_eep_header { | |||
236 | u8 thresh62; | 245 | u8 thresh62; |
237 | __le32 papdRateMaskHt20; | 246 | __le32 papdRateMaskHt20; |
238 | __le32 papdRateMaskHt40; | 247 | __le32 papdRateMaskHt40; |
239 | u8 futureModal[24]; | 248 | u8 futureModal[10]; |
240 | } __packed; | 249 | } __packed; |
241 | 250 | ||
242 | struct ar9300_cal_data_per_freq_op_loop { | 251 | struct ar9300_cal_data_per_freq_op_loop { |
@@ -274,6 +283,20 @@ struct cal_ctl_data_5g { | |||
274 | struct cal_ctl_edge_pwr ctlEdges[AR9300_NUM_BAND_EDGES_5G]; | 283 | struct cal_ctl_edge_pwr ctlEdges[AR9300_NUM_BAND_EDGES_5G]; |
275 | } __packed; | 284 | } __packed; |
276 | 285 | ||
286 | struct ar9300_BaseExtension_1 { | ||
287 | u8 ant_div_control; | ||
288 | u8 future[13]; | ||
289 | } __packed; | ||
290 | |||
291 | struct ar9300_BaseExtension_2 { | ||
292 | int8_t tempSlopeLow; | ||
293 | int8_t tempSlopeHigh; | ||
294 | u8 xatten1DBLow[AR9300_MAX_CHAINS]; | ||
295 | u8 xatten1MarginLow[AR9300_MAX_CHAINS]; | ||
296 | u8 xatten1DBHigh[AR9300_MAX_CHAINS]; | ||
297 | u8 xatten1MarginHigh[AR9300_MAX_CHAINS]; | ||
298 | } __packed; | ||
299 | |||
277 | struct ar9300_eeprom { | 300 | struct ar9300_eeprom { |
278 | u8 eepromVersion; | 301 | u8 eepromVersion; |
279 | u8 templateVersion; | 302 | u8 templateVersion; |
@@ -283,6 +306,7 @@ struct ar9300_eeprom { | |||
283 | struct ar9300_base_eep_hdr baseEepHeader; | 306 | struct ar9300_base_eep_hdr baseEepHeader; |
284 | 307 | ||
285 | struct ar9300_modal_eep_header modalHeader2G; | 308 | struct ar9300_modal_eep_header modalHeader2G; |
309 | struct ar9300_BaseExtension_1 base_ext1; | ||
286 | u8 calFreqPier2G[AR9300_NUM_2G_CAL_PIERS]; | 310 | u8 calFreqPier2G[AR9300_NUM_2G_CAL_PIERS]; |
287 | struct ar9300_cal_data_per_freq_op_loop | 311 | struct ar9300_cal_data_per_freq_op_loop |
288 | calPierData2G[AR9300_MAX_CHAINS][AR9300_NUM_2G_CAL_PIERS]; | 312 | calPierData2G[AR9300_MAX_CHAINS][AR9300_NUM_2G_CAL_PIERS]; |
@@ -302,6 +326,7 @@ struct ar9300_eeprom { | |||
302 | u8 ctl_freqbin_2G[AR9300_NUM_CTLS_2G][AR9300_NUM_BAND_EDGES_2G]; | 326 | u8 ctl_freqbin_2G[AR9300_NUM_CTLS_2G][AR9300_NUM_BAND_EDGES_2G]; |
303 | struct cal_ctl_data_2g ctlPowerData_2G[AR9300_NUM_CTLS_2G]; | 327 | struct cal_ctl_data_2g ctlPowerData_2G[AR9300_NUM_CTLS_2G]; |
304 | struct ar9300_modal_eep_header modalHeader5G; | 328 | struct ar9300_modal_eep_header modalHeader5G; |
329 | struct ar9300_BaseExtension_2 base_ext2; | ||
305 | u8 calFreqPier5G[AR9300_NUM_5G_CAL_PIERS]; | 330 | u8 calFreqPier5G[AR9300_NUM_5G_CAL_PIERS]; |
306 | struct ar9300_cal_data_per_freq_op_loop | 331 | struct ar9300_cal_data_per_freq_op_loop |
307 | calPierData5G[AR9300_MAX_CHAINS][AR9300_NUM_5G_CAL_PIERS]; | 332 | calPierData5G[AR9300_MAX_CHAINS][AR9300_NUM_5G_CAL_PIERS]; |
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_mac.c b/drivers/net/wireless/ath/ath9k/ar9003_mac.c index 10c812e353a6..f5896aa30005 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_mac.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_mac.c | |||
@@ -410,12 +410,36 @@ static void ar9003_hw_set11n_ratescenario(struct ath_hw *ah, void *ds, | |||
410 | static void ar9003_hw_set11n_aggr_first(struct ath_hw *ah, void *ds, | 410 | static void ar9003_hw_set11n_aggr_first(struct ath_hw *ah, void *ds, |
411 | u32 aggrLen) | 411 | u32 aggrLen) |
412 | { | 412 | { |
413 | #define FIRST_DESC_NDELIMS 60 | ||
413 | struct ar9003_txc *ads = (struct ar9003_txc *) ds; | 414 | struct ar9003_txc *ads = (struct ar9003_txc *) ds; |
414 | 415 | ||
415 | ads->ctl12 |= (AR_IsAggr | AR_MoreAggr); | 416 | ads->ctl12 |= (AR_IsAggr | AR_MoreAggr); |
416 | 417 | ||
417 | ads->ctl17 &= ~AR_AggrLen; | 418 | if (ah->ent_mode & AR_ENT_OTP_MPSD) { |
418 | ads->ctl17 |= SM(aggrLen, AR_AggrLen); | 419 | u32 ctl17, ndelim; |
420 | /* | ||
421 | * Add delimiter when using RTS/CTS with aggregation | ||
422 | * and non enterprise AR9003 card | ||
423 | */ | ||
424 | ctl17 = ads->ctl17; | ||
425 | ndelim = MS(ctl17, AR_PadDelim); | ||
426 | |||
427 | if (ndelim < FIRST_DESC_NDELIMS) { | ||
428 | aggrLen += (FIRST_DESC_NDELIMS - ndelim) * 4; | ||
429 | ndelim = FIRST_DESC_NDELIMS; | ||
430 | } | ||
431 | |||
432 | ctl17 &= ~AR_AggrLen; | ||
433 | ctl17 |= SM(aggrLen, AR_AggrLen); | ||
434 | |||
435 | ctl17 &= ~AR_PadDelim; | ||
436 | ctl17 |= SM(ndelim, AR_PadDelim); | ||
437 | |||
438 | ads->ctl17 = ctl17; | ||
439 | } else { | ||
440 | ads->ctl17 &= ~AR_AggrLen; | ||
441 | ads->ctl17 |= SM(aggrLen, AR_AggrLen); | ||
442 | } | ||
419 | } | 443 | } |
420 | 444 | ||
421 | static void ar9003_hw_set11n_aggr_middle(struct ath_hw *ah, void *ds, | 445 | static void ar9003_hw_set11n_aggr_middle(struct ath_hw *ah, void *ds, |
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_paprd.c b/drivers/net/wireless/ath/ath9k/ar9003_paprd.c index 716db414c258..850bc9866c19 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_paprd.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_paprd.c | |||
@@ -32,12 +32,12 @@ static void ar9003_paprd_setup_single_table(struct ath_hw *ah) | |||
32 | { | 32 | { |
33 | struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep; | 33 | struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep; |
34 | struct ar9300_modal_eep_header *hdr; | 34 | struct ar9300_modal_eep_header *hdr; |
35 | const u32 ctrl0[3] = { | 35 | static const u32 ctrl0[3] = { |
36 | AR_PHY_PAPRD_CTRL0_B0, | 36 | AR_PHY_PAPRD_CTRL0_B0, |
37 | AR_PHY_PAPRD_CTRL0_B1, | 37 | AR_PHY_PAPRD_CTRL0_B1, |
38 | AR_PHY_PAPRD_CTRL0_B2 | 38 | AR_PHY_PAPRD_CTRL0_B2 |
39 | }; | 39 | }; |
40 | const u32 ctrl1[3] = { | 40 | static const u32 ctrl1[3] = { |
41 | AR_PHY_PAPRD_CTRL1_B0, | 41 | AR_PHY_PAPRD_CTRL1_B0, |
42 | AR_PHY_PAPRD_CTRL1_B1, | 42 | AR_PHY_PAPRD_CTRL1_B1, |
43 | AR_PHY_PAPRD_CTRL1_B2 | 43 | AR_PHY_PAPRD_CTRL1_B2 |
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c index 44c5454b2ad8..656d8ce251a7 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c | |||
@@ -128,7 +128,7 @@ static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan) | |||
128 | static void ar9003_hw_spur_mitigate_mrc_cck(struct ath_hw *ah, | 128 | static void ar9003_hw_spur_mitigate_mrc_cck(struct ath_hw *ah, |
129 | struct ath9k_channel *chan) | 129 | struct ath9k_channel *chan) |
130 | { | 130 | { |
131 | u32 spur_freq[4] = { 2420, 2440, 2464, 2480 }; | 131 | static const u32 spur_freq[4] = { 2420, 2440, 2464, 2480 }; |
132 | int cur_bb_spur, negative = 0, cck_spur_freq; | 132 | int cur_bb_spur, negative = 0, cck_spur_freq; |
133 | int i; | 133 | int i; |
134 | 134 | ||
@@ -1113,10 +1113,55 @@ static void ar9003_hw_ani_cache_ini_regs(struct ath_hw *ah) | |||
1113 | aniState->mrcCCKOff = !ATH9K_ANI_ENABLE_MRC_CCK; | 1113 | aniState->mrcCCKOff = !ATH9K_ANI_ENABLE_MRC_CCK; |
1114 | } | 1114 | } |
1115 | 1115 | ||
1116 | static void ar9003_hw_set_radar_params(struct ath_hw *ah, | ||
1117 | struct ath_hw_radar_conf *conf) | ||
1118 | { | ||
1119 | u32 radar_0 = 0, radar_1 = 0; | ||
1120 | |||
1121 | if (!conf) { | ||
1122 | REG_CLR_BIT(ah, AR_PHY_RADAR_0, AR_PHY_RADAR_0_ENA); | ||
1123 | return; | ||
1124 | } | ||
1125 | |||
1126 | radar_0 |= AR_PHY_RADAR_0_ENA | AR_PHY_RADAR_0_FFT_ENA; | ||
1127 | radar_0 |= SM(conf->fir_power, AR_PHY_RADAR_0_FIRPWR); | ||
1128 | radar_0 |= SM(conf->radar_rssi, AR_PHY_RADAR_0_RRSSI); | ||
1129 | radar_0 |= SM(conf->pulse_height, AR_PHY_RADAR_0_HEIGHT); | ||
1130 | radar_0 |= SM(conf->pulse_rssi, AR_PHY_RADAR_0_PRSSI); | ||
1131 | radar_0 |= SM(conf->pulse_inband, AR_PHY_RADAR_0_INBAND); | ||
1132 | |||
1133 | radar_1 |= AR_PHY_RADAR_1_MAX_RRSSI; | ||
1134 | radar_1 |= AR_PHY_RADAR_1_BLOCK_CHECK; | ||
1135 | radar_1 |= SM(conf->pulse_maxlen, AR_PHY_RADAR_1_MAXLEN); | ||
1136 | radar_1 |= SM(conf->pulse_inband_step, AR_PHY_RADAR_1_RELSTEP_THRESH); | ||
1137 | radar_1 |= SM(conf->radar_inband, AR_PHY_RADAR_1_RELPWR_THRESH); | ||
1138 | |||
1139 | REG_WRITE(ah, AR_PHY_RADAR_0, radar_0); | ||
1140 | REG_WRITE(ah, AR_PHY_RADAR_1, radar_1); | ||
1141 | if (conf->ext_channel) | ||
1142 | REG_SET_BIT(ah, AR_PHY_RADAR_EXT, AR_PHY_RADAR_EXT_ENA); | ||
1143 | else | ||
1144 | REG_CLR_BIT(ah, AR_PHY_RADAR_EXT, AR_PHY_RADAR_EXT_ENA); | ||
1145 | } | ||
1146 | |||
1147 | static void ar9003_hw_set_radar_conf(struct ath_hw *ah) | ||
1148 | { | ||
1149 | struct ath_hw_radar_conf *conf = &ah->radar_conf; | ||
1150 | |||
1151 | conf->fir_power = -28; | ||
1152 | conf->radar_rssi = 0; | ||
1153 | conf->pulse_height = 10; | ||
1154 | conf->pulse_rssi = 24; | ||
1155 | conf->pulse_inband = 8; | ||
1156 | conf->pulse_maxlen = 255; | ||
1157 | conf->pulse_inband_step = 12; | ||
1158 | conf->radar_inband = 8; | ||
1159 | } | ||
1160 | |||
1116 | void ar9003_hw_attach_phy_ops(struct ath_hw *ah) | 1161 | void ar9003_hw_attach_phy_ops(struct ath_hw *ah) |
1117 | { | 1162 | { |
1118 | struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah); | 1163 | struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah); |
1119 | const u32 ar9300_cca_regs[6] = { | 1164 | static const u32 ar9300_cca_regs[6] = { |
1120 | AR_PHY_CCA_0, | 1165 | AR_PHY_CCA_0, |
1121 | AR_PHY_CCA_1, | 1166 | AR_PHY_CCA_1, |
1122 | AR_PHY_CCA_2, | 1167 | AR_PHY_CCA_2, |
@@ -1141,8 +1186,10 @@ void ar9003_hw_attach_phy_ops(struct ath_hw *ah) | |||
1141 | priv_ops->ani_control = ar9003_hw_ani_control; | 1186 | priv_ops->ani_control = ar9003_hw_ani_control; |
1142 | priv_ops->do_getnf = ar9003_hw_do_getnf; | 1187 | priv_ops->do_getnf = ar9003_hw_do_getnf; |
1143 | priv_ops->ani_cache_ini_regs = ar9003_hw_ani_cache_ini_regs; | 1188 | priv_ops->ani_cache_ini_regs = ar9003_hw_ani_cache_ini_regs; |
1189 | priv_ops->set_radar_params = ar9003_hw_set_radar_params; | ||
1144 | 1190 | ||
1145 | ar9003_hw_set_nf_limits(ah); | 1191 | ar9003_hw_set_nf_limits(ah); |
1192 | ar9003_hw_set_radar_conf(ah); | ||
1146 | memcpy(ah->nf_regs, ar9300_cca_regs, sizeof(ah->nf_regs)); | 1193 | memcpy(ah->nf_regs, ar9300_cca_regs, sizeof(ah->nf_regs)); |
1147 | } | 1194 | } |
1148 | 1195 | ||
diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h index b3180935875d..6f90acc5cca7 100644 --- a/drivers/net/wireless/ath/ath9k/ath9k.h +++ b/drivers/net/wireless/ath/ath9k/ath9k.h | |||
@@ -86,33 +86,19 @@ struct ath_config { | |||
86 | /** | 86 | /** |
87 | * enum buffer_type - Buffer type flags | 87 | * enum buffer_type - Buffer type flags |
88 | * | 88 | * |
89 | * @BUF_HT: Send this buffer using HT capabilities | ||
90 | * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX) | 89 | * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX) |
91 | * @BUF_AGGR: Indicates whether the buffer can be aggregated | 90 | * @BUF_AGGR: Indicates whether the buffer can be aggregated |
92 | * (used in aggregation scheduling) | 91 | * (used in aggregation scheduling) |
93 | * @BUF_RETRY: Indicates whether the buffer is retried | ||
94 | * @BUF_XRETRY: To denote excessive retries of the buffer | 92 | * @BUF_XRETRY: To denote excessive retries of the buffer |
95 | */ | 93 | */ |
96 | enum buffer_type { | 94 | enum buffer_type { |
97 | BUF_HT = BIT(1), | ||
98 | BUF_AMPDU = BIT(2), | 95 | BUF_AMPDU = BIT(2), |
99 | BUF_AGGR = BIT(3), | 96 | BUF_AGGR = BIT(3), |
100 | BUF_RETRY = BIT(4), | ||
101 | BUF_XRETRY = BIT(5), | 97 | BUF_XRETRY = BIT(5), |
102 | }; | 98 | }; |
103 | 99 | ||
104 | #define bf_nframes bf_state.bfs_nframes | ||
105 | #define bf_al bf_state.bfs_al | ||
106 | #define bf_frmlen bf_state.bfs_frmlen | ||
107 | #define bf_retries bf_state.bfs_retries | ||
108 | #define bf_seqno bf_state.bfs_seqno | ||
109 | #define bf_tidno bf_state.bfs_tidno | ||
110 | #define bf_keyix bf_state.bfs_keyix | ||
111 | #define bf_keytype bf_state.bfs_keytype | ||
112 | #define bf_isht(bf) (bf->bf_state.bf_type & BUF_HT) | ||
113 | #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU) | 100 | #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU) |
114 | #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR) | 101 | #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR) |
115 | #define bf_isretried(bf) (bf->bf_state.bf_type & BUF_RETRY) | ||
116 | #define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY) | 102 | #define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY) |
117 | 103 | ||
118 | #define ATH_TXSTATUS_RING_SIZE 64 | 104 | #define ATH_TXSTATUS_RING_SIZE 64 |
@@ -177,8 +163,8 @@ void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd, | |||
177 | 163 | ||
178 | /* returns delimiter padding required given the packet length */ | 164 | /* returns delimiter padding required given the packet length */ |
179 | #define ATH_AGGR_GET_NDELIM(_len) \ | 165 | #define ATH_AGGR_GET_NDELIM(_len) \ |
180 | (((((_len) + ATH_AGGR_DELIM_SZ) < ATH_AGGR_MINPLEN) ? \ | 166 | (((_len) >= ATH_AGGR_MINPLEN) ? 0 : \ |
181 | (ATH_AGGR_MINPLEN - (_len) - ATH_AGGR_DELIM_SZ) : 0) >> 2) | 167 | DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ)) |
182 | 168 | ||
183 | #define BAW_WITHIN(_start, _bawsz, _seqno) \ | 169 | #define BAW_WITHIN(_start, _bawsz, _seqno) \ |
184 | ((((_seqno) - (_start)) & 4095) < (_bawsz)) | 170 | ((((_seqno) - (_start)) & 4095) < (_bawsz)) |
@@ -217,18 +203,18 @@ struct ath_atx_ac { | |||
217 | struct list_head tid_q; | 203 | struct list_head tid_q; |
218 | }; | 204 | }; |
219 | 205 | ||
206 | struct ath_frame_info { | ||
207 | int framelen; | ||
208 | u32 keyix; | ||
209 | enum ath9k_key_type keytype; | ||
210 | u8 retries; | ||
211 | u16 seqno; | ||
212 | }; | ||
213 | |||
220 | struct ath_buf_state { | 214 | struct ath_buf_state { |
221 | int bfs_nframes; | ||
222 | u16 bfs_al; | ||
223 | u16 bfs_frmlen; | ||
224 | int bfs_seqno; | ||
225 | int bfs_tidno; | ||
226 | int bfs_retries; | ||
227 | u8 bf_type; | 215 | u8 bf_type; |
228 | u8 bfs_paprd; | 216 | u8 bfs_paprd; |
229 | unsigned long bfs_paprd_timestamp; | 217 | enum ath9k_internal_frame_type bfs_ftype; |
230 | u32 bfs_keyix; | ||
231 | enum ath9k_key_type bfs_keytype; | ||
232 | }; | 218 | }; |
233 | 219 | ||
234 | struct ath_buf { | 220 | struct ath_buf { |
@@ -241,7 +227,6 @@ struct ath_buf { | |||
241 | dma_addr_t bf_daddr; /* physical addr of desc */ | 227 | dma_addr_t bf_daddr; /* physical addr of desc */ |
242 | dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */ | 228 | dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */ |
243 | bool bf_stale; | 229 | bool bf_stale; |
244 | bool bf_tx_aborted; | ||
245 | u16 bf_flags; | 230 | u16 bf_flags; |
246 | struct ath_buf_state bf_state; | 231 | struct ath_buf_state bf_state; |
247 | struct ath_wiphy *aphy; | 232 | struct ath_wiphy *aphy; |
@@ -278,6 +263,7 @@ struct ath_node { | |||
278 | 263 | ||
279 | struct ath_tx_control { | 264 | struct ath_tx_control { |
280 | struct ath_txq *txq; | 265 | struct ath_txq *txq; |
266 | struct ath_node *an; | ||
281 | int if_id; | 267 | int if_id; |
282 | enum ath9k_internal_frame_type frame_type; | 268 | enum ath9k_internal_frame_type frame_type; |
283 | u8 paprd; | 269 | u8 paprd; |
@@ -338,7 +324,6 @@ int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb, | |||
338 | struct ath_tx_control *txctl); | 324 | struct ath_tx_control *txctl); |
339 | void ath_tx_tasklet(struct ath_softc *sc); | 325 | void ath_tx_tasklet(struct ath_softc *sc); |
340 | void ath_tx_edma_tasklet(struct ath_softc *sc); | 326 | void ath_tx_edma_tasklet(struct ath_softc *sc); |
341 | void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb); | ||
342 | int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta, | 327 | int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta, |
343 | u16 tid, u16 *ssn); | 328 | u16 tid, u16 *ssn); |
344 | void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid); | 329 | void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid); |
@@ -603,6 +588,7 @@ struct ath_softc { | |||
603 | struct work_struct paprd_work; | 588 | struct work_struct paprd_work; |
604 | struct work_struct hw_check_work; | 589 | struct work_struct hw_check_work; |
605 | struct completion paprd_complete; | 590 | struct completion paprd_complete; |
591 | bool paprd_pending; | ||
606 | 592 | ||
607 | u32 intrstatus; | 593 | u32 intrstatus; |
608 | u32 sc_flags; /* SC_OP_* */ | 594 | u32 sc_flags; /* SC_OP_* */ |
@@ -712,7 +698,7 @@ void ath9k_ps_restore(struct ath_softc *sc); | |||
712 | void ath9k_set_bssid_mask(struct ieee80211_hw *hw, struct ieee80211_vif *vif); | 698 | void ath9k_set_bssid_mask(struct ieee80211_hw *hw, struct ieee80211_vif *vif); |
713 | int ath9k_wiphy_add(struct ath_softc *sc); | 699 | int ath9k_wiphy_add(struct ath_softc *sc); |
714 | int ath9k_wiphy_del(struct ath_wiphy *aphy); | 700 | int ath9k_wiphy_del(struct ath_wiphy *aphy); |
715 | void ath9k_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb); | 701 | void ath9k_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb, int ftype); |
716 | int ath9k_wiphy_pause(struct ath_wiphy *aphy); | 702 | int ath9k_wiphy_pause(struct ath_wiphy *aphy); |
717 | int ath9k_wiphy_unpause(struct ath_wiphy *aphy); | 703 | int ath9k_wiphy_unpause(struct ath_wiphy *aphy); |
718 | int ath9k_wiphy_select(struct ath_wiphy *aphy); | 704 | int ath9k_wiphy_select(struct ath_wiphy *aphy); |
diff --git a/drivers/net/wireless/ath/ath9k/beacon.c b/drivers/net/wireless/ath/ath9k/beacon.c index 2377376c8d4d..30724a4e8bb2 100644 --- a/drivers/net/wireless/ath/ath9k/beacon.c +++ b/drivers/net/wireless/ath/ath9k/beacon.c | |||
@@ -109,6 +109,25 @@ static void ath_beacon_setup(struct ath_softc *sc, struct ath_vif *avp, | |||
109 | series, 4, 0); | 109 | series, 4, 0); |
110 | } | 110 | } |
111 | 111 | ||
112 | static void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb) | ||
113 | { | ||
114 | struct ath_wiphy *aphy = hw->priv; | ||
115 | struct ath_softc *sc = aphy->sc; | ||
116 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); | ||
117 | struct ath_tx_control txctl; | ||
118 | |||
119 | memset(&txctl, 0, sizeof(struct ath_tx_control)); | ||
120 | txctl.txq = sc->beacon.cabq; | ||
121 | |||
122 | ath_print(common, ATH_DBG_XMIT, | ||
123 | "transmitting CABQ packet, skb: %p\n", skb); | ||
124 | |||
125 | if (ath_tx_start(hw, skb, &txctl) != 0) { | ||
126 | ath_print(common, ATH_DBG_XMIT, "CABQ TX failed\n"); | ||
127 | dev_kfree_skb_any(skb); | ||
128 | } | ||
129 | } | ||
130 | |||
112 | static struct ath_buf *ath_beacon_generate(struct ieee80211_hw *hw, | 131 | static struct ath_buf *ath_beacon_generate(struct ieee80211_hw *hw, |
113 | struct ieee80211_vif *vif) | 132 | struct ieee80211_vif *vif) |
114 | { | 133 | { |
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_4k.c b/drivers/net/wireless/ath/ath9k/eeprom_4k.c index c40c534c6662..c2481b3ac7e6 100644 --- a/drivers/net/wireless/ath/ath9k/eeprom_4k.c +++ b/drivers/net/wireless/ath/ath9k/eeprom_4k.c | |||
@@ -534,7 +534,9 @@ static void ath9k_hw_set_4k_power_per_rate_table(struct ath_hw *ah, | |||
534 | u16 twiceMinEdgePower; | 534 | u16 twiceMinEdgePower; |
535 | u16 twiceMaxEdgePower = AR5416_MAX_RATE_POWER; | 535 | u16 twiceMaxEdgePower = AR5416_MAX_RATE_POWER; |
536 | u16 scaledPower = 0, minCtlPower, maxRegAllowedPower; | 536 | u16 scaledPower = 0, minCtlPower, maxRegAllowedPower; |
537 | u16 numCtlModes, *pCtlMode, ctlMode, freq; | 537 | u16 numCtlModes; |
538 | const u16 *pCtlMode; | ||
539 | u16 ctlMode, freq; | ||
538 | struct chan_centers centers; | 540 | struct chan_centers centers; |
539 | struct cal_ctl_data_4k *rep; | 541 | struct cal_ctl_data_4k *rep; |
540 | struct ar5416_eeprom_4k *pEepData = &ah->eeprom.map4k; | 542 | struct ar5416_eeprom_4k *pEepData = &ah->eeprom.map4k; |
@@ -550,10 +552,10 @@ static void ath9k_hw_set_4k_power_per_rate_table(struct ath_hw *ah, | |||
550 | struct cal_target_power_ht targetPowerHt20, targetPowerHt40 = { | 552 | struct cal_target_power_ht targetPowerHt20, targetPowerHt40 = { |
551 | 0, {0, 0, 0, 0} | 553 | 0, {0, 0, 0, 0} |
552 | }; | 554 | }; |
553 | u16 ctlModesFor11g[] = | 555 | static const u16 ctlModesFor11g[] = { |
554 | { CTL_11B, CTL_11G, CTL_2GHT20, CTL_11B_EXT, CTL_11G_EXT, | 556 | CTL_11B, CTL_11G, CTL_2GHT20, |
555 | CTL_2GHT40 | 557 | CTL_11B_EXT, CTL_11G_EXT, CTL_2GHT40 |
556 | }; | 558 | }; |
557 | 559 | ||
558 | ath9k_hw_get_channel_centers(ah, chan, ¢ers); | 560 | ath9k_hw_get_channel_centers(ah, chan, ¢ers); |
559 | 561 | ||
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_9287.c b/drivers/net/wireless/ath/ath9k/eeprom_9287.c index 3ad1de253c8a..bcb9ed39c047 100644 --- a/drivers/net/wireless/ath/ath9k/eeprom_9287.c +++ b/drivers/net/wireless/ath/ath9k/eeprom_9287.c | |||
@@ -37,10 +37,10 @@ static bool ath9k_hw_ar9287_fill_eeprom(struct ath_hw *ah) | |||
37 | int addr, eep_start_loc; | 37 | int addr, eep_start_loc; |
38 | eep_data = (u16 *)eep; | 38 | eep_data = (u16 *)eep; |
39 | 39 | ||
40 | if (AR9287_HTC_DEVID(ah)) | 40 | if (!common->driver_info) |
41 | eep_start_loc = AR9287_HTC_EEP_START_LOC; | ||
42 | else | ||
43 | eep_start_loc = AR9287_EEP_START_LOC; | 41 | eep_start_loc = AR9287_EEP_START_LOC; |
42 | else | ||
43 | eep_start_loc = AR9287_HTC_EEP_START_LOC; | ||
44 | 44 | ||
45 | if (!ath9k_hw_use_flash(ah)) { | 45 | if (!ath9k_hw_use_flash(ah)) { |
46 | ath_print(common, ATH_DBG_EEPROM, | 46 | ath_print(common, ATH_DBG_EEPROM, |
@@ -626,13 +626,13 @@ static void ath9k_hw_set_ar9287_power_per_rate_table(struct ath_hw *ah, | |||
626 | struct cal_target_power_ht targetPowerHt20, | 626 | struct cal_target_power_ht targetPowerHt20, |
627 | targetPowerHt40 = {0, {0, 0, 0, 0} }; | 627 | targetPowerHt40 = {0, {0, 0, 0, 0} }; |
628 | u16 scaledPower = 0, minCtlPower, maxRegAllowedPower; | 628 | u16 scaledPower = 0, minCtlPower, maxRegAllowedPower; |
629 | u16 ctlModesFor11g[] = {CTL_11B, | 629 | static const u16 ctlModesFor11g[] = { |
630 | CTL_11G, | 630 | CTL_11B, CTL_11G, CTL_2GHT20, |
631 | CTL_2GHT20, | 631 | CTL_11B_EXT, CTL_11G_EXT, CTL_2GHT40 |
632 | CTL_11B_EXT, | 632 | }; |
633 | CTL_11G_EXT, | 633 | u16 numCtlModes = 0; |
634 | CTL_2GHT40}; | 634 | const u16 *pCtlMode = NULL; |
635 | u16 numCtlModes = 0, *pCtlMode = NULL, ctlMode, freq; | 635 | u16 ctlMode, freq; |
636 | struct chan_centers centers; | 636 | struct chan_centers centers; |
637 | int tx_chainmask; | 637 | int tx_chainmask; |
638 | u16 twiceMinEdgePower; | 638 | u16 twiceMinEdgePower; |
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_def.c b/drivers/net/wireless/ath/ath9k/eeprom_def.c index a819ddc9fdbc..e94216e1e107 100644 --- a/drivers/net/wireless/ath/ath9k/eeprom_def.c +++ b/drivers/net/wireless/ath/ath9k/eeprom_def.c | |||
@@ -1021,13 +1021,16 @@ static void ath9k_hw_set_def_power_per_rate_table(struct ath_hw *ah, | |||
1021 | 0, {0, 0, 0, 0} | 1021 | 0, {0, 0, 0, 0} |
1022 | }; | 1022 | }; |
1023 | u16 scaledPower = 0, minCtlPower, maxRegAllowedPower; | 1023 | u16 scaledPower = 0, minCtlPower, maxRegAllowedPower; |
1024 | u16 ctlModesFor11a[] = | 1024 | static const u16 ctlModesFor11a[] = { |
1025 | { CTL_11A, CTL_5GHT20, CTL_11A_EXT, CTL_5GHT40 }; | 1025 | CTL_11A, CTL_5GHT20, CTL_11A_EXT, CTL_5GHT40 |
1026 | u16 ctlModesFor11g[] = | 1026 | }; |
1027 | { CTL_11B, CTL_11G, CTL_2GHT20, CTL_11B_EXT, CTL_11G_EXT, | 1027 | static const u16 ctlModesFor11g[] = { |
1028 | CTL_2GHT40 | 1028 | CTL_11B, CTL_11G, CTL_2GHT20, |
1029 | }; | 1029 | CTL_11B_EXT, CTL_11G_EXT, CTL_2GHT40 |
1030 | u16 numCtlModes, *pCtlMode, ctlMode, freq; | 1030 | }; |
1031 | u16 numCtlModes; | ||
1032 | const u16 *pCtlMode; | ||
1033 | u16 ctlMode, freq; | ||
1031 | struct chan_centers centers; | 1034 | struct chan_centers centers; |
1032 | int tx_chainmask; | 1035 | int tx_chainmask; |
1033 | u16 twiceMinEdgePower; | 1036 | u16 twiceMinEdgePower; |
diff --git a/drivers/net/wireless/ath/ath9k/hif_usb.c b/drivers/net/wireless/ath/ath9k/hif_usb.c index dfb6560dab92..ae842dbf9b50 100644 --- a/drivers/net/wireless/ath/ath9k/hif_usb.c +++ b/drivers/net/wireless/ath/ath9k/hif_usb.c | |||
@@ -28,10 +28,16 @@ MODULE_FIRMWARE(FIRMWARE_AR9271); | |||
28 | static struct usb_device_id ath9k_hif_usb_ids[] = { | 28 | static struct usb_device_id ath9k_hif_usb_ids[] = { |
29 | { USB_DEVICE(0x0cf3, 0x9271) }, /* Atheros */ | 29 | { USB_DEVICE(0x0cf3, 0x9271) }, /* Atheros */ |
30 | { USB_DEVICE(0x0cf3, 0x1006) }, /* Atheros */ | 30 | { USB_DEVICE(0x0cf3, 0x1006) }, /* Atheros */ |
31 | { USB_DEVICE(0x0cf3, 0x7010) }, /* Atheros */ | 31 | { USB_DEVICE(0x0cf3, 0x7010), |
32 | { USB_DEVICE(0x0cf3, 0x7015) }, /* Atheros */ | 32 | .driver_info = AR7010_DEVICE }, |
33 | /* Atheros */ | ||
34 | { USB_DEVICE(0x0cf3, 0x7015), | ||
35 | .driver_info = AR7010_DEVICE | AR9287_DEVICE }, | ||
36 | /* Atheros */ | ||
33 | { USB_DEVICE(0x0846, 0x9030) }, /* Netgear N150 */ | 37 | { USB_DEVICE(0x0846, 0x9030) }, /* Netgear N150 */ |
34 | { USB_DEVICE(0x0846, 0x9018) }, /* Netgear WNDA3200 */ | 38 | { USB_DEVICE(0x0846, 0x9018), |
39 | .driver_info = AR7010_DEVICE }, | ||
40 | /* Netgear WNDA3200 */ | ||
35 | { USB_DEVICE(0x07D1, 0x3A10) }, /* Dlink Wireless 150 */ | 41 | { USB_DEVICE(0x07D1, 0x3A10) }, /* Dlink Wireless 150 */ |
36 | { USB_DEVICE(0x13D3, 0x3327) }, /* Azurewave */ | 42 | { USB_DEVICE(0x13D3, 0x3327) }, /* Azurewave */ |
37 | { USB_DEVICE(0x13D3, 0x3328) }, /* Azurewave */ | 43 | { USB_DEVICE(0x13D3, 0x3328) }, /* Azurewave */ |
@@ -40,9 +46,13 @@ static struct usb_device_id ath9k_hif_usb_ids[] = { | |||
40 | { USB_DEVICE(0x13D3, 0x3349) }, /* Azurewave */ | 46 | { USB_DEVICE(0x13D3, 0x3349) }, /* Azurewave */ |
41 | { USB_DEVICE(0x13D3, 0x3350) }, /* Azurewave */ | 47 | { USB_DEVICE(0x13D3, 0x3350) }, /* Azurewave */ |
42 | { USB_DEVICE(0x04CA, 0x4605) }, /* Liteon */ | 48 | { USB_DEVICE(0x04CA, 0x4605) }, /* Liteon */ |
43 | { USB_DEVICE(0x083A, 0xA704) }, /* SMC Networks */ | 49 | { USB_DEVICE(0x083A, 0xA704), |
50 | .driver_info = AR7010_DEVICE }, | ||
51 | /* SMC Networks */ | ||
44 | { USB_DEVICE(0x040D, 0x3801) }, /* VIA */ | 52 | { USB_DEVICE(0x040D, 0x3801) }, /* VIA */ |
45 | { USB_DEVICE(0x1668, 0x1200) }, /* Verizon */ | 53 | { USB_DEVICE(0x1668, 0x1200), |
54 | .driver_info = AR7010_DEVICE | AR9287_DEVICE }, | ||
55 | /* Verizon */ | ||
46 | { }, | 56 | { }, |
47 | }; | 57 | }; |
48 | 58 | ||
@@ -776,7 +786,8 @@ static void ath9k_hif_usb_dealloc_urbs(struct hif_device_usb *hif_dev) | |||
776 | ath9k_hif_usb_dealloc_rx_urbs(hif_dev); | 786 | ath9k_hif_usb_dealloc_rx_urbs(hif_dev); |
777 | } | 787 | } |
778 | 788 | ||
779 | static int ath9k_hif_usb_download_fw(struct hif_device_usb *hif_dev) | 789 | static int ath9k_hif_usb_download_fw(struct hif_device_usb *hif_dev, |
790 | u32 drv_info) | ||
780 | { | 791 | { |
781 | int transfer, err; | 792 | int transfer, err; |
782 | const void *data = hif_dev->firmware->data; | 793 | const void *data = hif_dev->firmware->data; |
@@ -807,18 +818,10 @@ static int ath9k_hif_usb_download_fw(struct hif_device_usb *hif_dev) | |||
807 | } | 818 | } |
808 | kfree(buf); | 819 | kfree(buf); |
809 | 820 | ||
810 | switch (hif_dev->device_id) { | 821 | if (drv_info & AR7010_DEVICE) |
811 | case 0x7010: | ||
812 | case 0x7015: | ||
813 | case 0x9018: | ||
814 | case 0xA704: | ||
815 | case 0x1200: | ||
816 | firm_offset = AR7010_FIRMWARE_TEXT; | 822 | firm_offset = AR7010_FIRMWARE_TEXT; |
817 | break; | 823 | else |
818 | default: | ||
819 | firm_offset = AR9271_FIRMWARE_TEXT; | 824 | firm_offset = AR9271_FIRMWARE_TEXT; |
820 | break; | ||
821 | } | ||
822 | 825 | ||
823 | /* | 826 | /* |
824 | * Issue FW download complete command to firmware. | 827 | * Issue FW download complete command to firmware. |
@@ -836,7 +839,7 @@ static int ath9k_hif_usb_download_fw(struct hif_device_usb *hif_dev) | |||
836 | return 0; | 839 | return 0; |
837 | } | 840 | } |
838 | 841 | ||
839 | static int ath9k_hif_usb_dev_init(struct hif_device_usb *hif_dev) | 842 | static int ath9k_hif_usb_dev_init(struct hif_device_usb *hif_dev, u32 drv_info) |
840 | { | 843 | { |
841 | int ret, idx; | 844 | int ret, idx; |
842 | struct usb_host_interface *alt = &hif_dev->interface->altsetting[0]; | 845 | struct usb_host_interface *alt = &hif_dev->interface->altsetting[0]; |
@@ -852,7 +855,7 @@ static int ath9k_hif_usb_dev_init(struct hif_device_usb *hif_dev) | |||
852 | } | 855 | } |
853 | 856 | ||
854 | /* Download firmware */ | 857 | /* Download firmware */ |
855 | ret = ath9k_hif_usb_download_fw(hif_dev); | 858 | ret = ath9k_hif_usb_download_fw(hif_dev, drv_info); |
856 | if (ret) { | 859 | if (ret) { |
857 | dev_err(&hif_dev->udev->dev, | 860 | dev_err(&hif_dev->udev->dev, |
858 | "ath9k_htc: Firmware - %s download failed\n", | 861 | "ath9k_htc: Firmware - %s download failed\n", |
@@ -931,23 +934,15 @@ static int ath9k_hif_usb_probe(struct usb_interface *interface, | |||
931 | 934 | ||
932 | /* Find out which firmware to load */ | 935 | /* Find out which firmware to load */ |
933 | 936 | ||
934 | switch(hif_dev->device_id) { | 937 | if (id->driver_info & AR7010_DEVICE) |
935 | case 0x7010: | ||
936 | case 0x7015: | ||
937 | case 0x9018: | ||
938 | case 0xA704: | ||
939 | case 0x1200: | ||
940 | if (le16_to_cpu(udev->descriptor.bcdDevice) == 0x0202) | 938 | if (le16_to_cpu(udev->descriptor.bcdDevice) == 0x0202) |
941 | hif_dev->fw_name = FIRMWARE_AR7010_1_1; | 939 | hif_dev->fw_name = FIRMWARE_AR7010_1_1; |
942 | else | 940 | else |
943 | hif_dev->fw_name = FIRMWARE_AR7010; | 941 | hif_dev->fw_name = FIRMWARE_AR7010; |
944 | break; | 942 | else |
945 | default: | ||
946 | hif_dev->fw_name = FIRMWARE_AR9271; | 943 | hif_dev->fw_name = FIRMWARE_AR9271; |
947 | break; | ||
948 | } | ||
949 | 944 | ||
950 | ret = ath9k_hif_usb_dev_init(hif_dev); | 945 | ret = ath9k_hif_usb_dev_init(hif_dev, id->driver_info); |
951 | if (ret) { | 946 | if (ret) { |
952 | ret = -EINVAL; | 947 | ret = -EINVAL; |
953 | goto err_hif_init_usb; | 948 | goto err_hif_init_usb; |
@@ -955,7 +950,7 @@ static int ath9k_hif_usb_probe(struct usb_interface *interface, | |||
955 | 950 | ||
956 | ret = ath9k_htc_hw_init(hif_dev->htc_handle, | 951 | ret = ath9k_htc_hw_init(hif_dev->htc_handle, |
957 | &hif_dev->udev->dev, hif_dev->device_id, | 952 | &hif_dev->udev->dev, hif_dev->device_id, |
958 | hif_dev->udev->product); | 953 | hif_dev->udev->product, id->driver_info); |
959 | if (ret) { | 954 | if (ret) { |
960 | ret = -EINVAL; | 955 | ret = -EINVAL; |
961 | goto err_htc_hw_init; | 956 | goto err_htc_hw_init; |
@@ -1033,6 +1028,7 @@ static int ath9k_hif_usb_resume(struct usb_interface *interface) | |||
1033 | { | 1028 | { |
1034 | struct hif_device_usb *hif_dev = | 1029 | struct hif_device_usb *hif_dev = |
1035 | (struct hif_device_usb *) usb_get_intfdata(interface); | 1030 | (struct hif_device_usb *) usb_get_intfdata(interface); |
1031 | struct htc_target *htc_handle = hif_dev->htc_handle; | ||
1036 | int ret; | 1032 | int ret; |
1037 | 1033 | ||
1038 | ret = ath9k_hif_usb_alloc_urbs(hif_dev); | 1034 | ret = ath9k_hif_usb_alloc_urbs(hif_dev); |
@@ -1040,7 +1036,8 @@ static int ath9k_hif_usb_resume(struct usb_interface *interface) | |||
1040 | return ret; | 1036 | return ret; |
1041 | 1037 | ||
1042 | if (hif_dev->firmware) { | 1038 | if (hif_dev->firmware) { |
1043 | ret = ath9k_hif_usb_download_fw(hif_dev); | 1039 | ret = ath9k_hif_usb_download_fw(hif_dev, |
1040 | htc_handle->drv_priv->ah->common.driver_info); | ||
1044 | if (ret) | 1041 | if (ret) |
1045 | goto fail_resume; | 1042 | goto fail_resume; |
1046 | } else { | 1043 | } else { |
@@ -1050,7 +1047,7 @@ static int ath9k_hif_usb_resume(struct usb_interface *interface) | |||
1050 | 1047 | ||
1051 | mdelay(100); | 1048 | mdelay(100); |
1052 | 1049 | ||
1053 | ret = ath9k_htc_resume(hif_dev->htc_handle); | 1050 | ret = ath9k_htc_resume(htc_handle); |
1054 | 1051 | ||
1055 | if (ret) | 1052 | if (ret) |
1056 | goto fail_resume; | 1053 | goto fail_resume; |
diff --git a/drivers/net/wireless/ath/ath9k/htc.h b/drivers/net/wireless/ath/ath9k/htc.h index 75ecf6a30d25..afe39a911906 100644 --- a/drivers/net/wireless/ath/ath9k/htc.h +++ b/drivers/net/wireless/ath/ath9k/htc.h | |||
@@ -368,7 +368,7 @@ struct ath9k_htc_priv { | |||
368 | u16 seq_no; | 368 | u16 seq_no; |
369 | u32 bmiss_cnt; | 369 | u32 bmiss_cnt; |
370 | 370 | ||
371 | struct ath9k_hw_cal_data caldata[38]; | 371 | struct ath9k_hw_cal_data caldata[ATH9K_NUM_CHANNELS]; |
372 | 372 | ||
373 | spinlock_t beacon_lock; | 373 | spinlock_t beacon_lock; |
374 | 374 | ||
@@ -461,7 +461,7 @@ void ath9k_init_leds(struct ath9k_htc_priv *priv); | |||
461 | void ath9k_deinit_leds(struct ath9k_htc_priv *priv); | 461 | void ath9k_deinit_leds(struct ath9k_htc_priv *priv); |
462 | 462 | ||
463 | int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev, | 463 | int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev, |
464 | u16 devid, char *product); | 464 | u16 devid, char *product, u32 drv_info); |
465 | void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug); | 465 | void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug); |
466 | #ifdef CONFIG_PM | 466 | #ifdef CONFIG_PM |
467 | int ath9k_htc_resume(struct htc_target *htc_handle); | 467 | int ath9k_htc_resume(struct htc_target *htc_handle); |
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_init.c b/drivers/net/wireless/ath/ath9k/htc_drv_init.c index 7c8a38d04561..071d0c974747 100644 --- a/drivers/net/wireless/ath/ath9k/htc_drv_init.c +++ b/drivers/net/wireless/ath/ath9k/htc_drv_init.c | |||
@@ -181,7 +181,8 @@ static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv, | |||
181 | return htc_connect_service(priv->htc, &req, ep_id); | 181 | return htc_connect_service(priv->htc, &req, ep_id); |
182 | } | 182 | } |
183 | 183 | ||
184 | static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid) | 184 | static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid, |
185 | u32 drv_info) | ||
185 | { | 186 | { |
186 | int ret; | 187 | int ret; |
187 | 188 | ||
@@ -245,17 +246,10 @@ static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid) | |||
245 | * the HIF layer, shouldn't matter much. | 246 | * the HIF layer, shouldn't matter much. |
246 | */ | 247 | */ |
247 | 248 | ||
248 | switch(devid) { | 249 | if (drv_info & AR7010_DEVICE) |
249 | case 0x7010: | ||
250 | case 0x7015: | ||
251 | case 0x9018: | ||
252 | case 0xA704: | ||
253 | case 0x1200: | ||
254 | priv->htc->credits = 45; | 250 | priv->htc->credits = 45; |
255 | break; | 251 | else |
256 | default: | ||
257 | priv->htc->credits = 33; | 252 | priv->htc->credits = 33; |
258 | } | ||
259 | 253 | ||
260 | ret = htc_init(priv->htc); | 254 | ret = htc_init(priv->htc); |
261 | if (ret) | 255 | if (ret) |
@@ -308,7 +302,7 @@ static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset) | |||
308 | struct ath_hw *ah = (struct ath_hw *) hw_priv; | 302 | struct ath_hw *ah = (struct ath_hw *) hw_priv; |
309 | struct ath_common *common = ath9k_hw_common(ah); | 303 | struct ath_common *common = ath9k_hw_common(ah); |
310 | struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; | 304 | struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; |
311 | __be32 buf[2] = { | 305 | const __be32 buf[2] = { |
312 | cpu_to_be32(reg_offset), | 306 | cpu_to_be32(reg_offset), |
313 | cpu_to_be32(val), | 307 | cpu_to_be32(val), |
314 | }; | 308 | }; |
@@ -627,7 +621,8 @@ static void ath9k_init_btcoex(struct ath9k_htc_priv *priv) | |||
627 | } | 621 | } |
628 | 622 | ||
629 | static int ath9k_init_priv(struct ath9k_htc_priv *priv, | 623 | static int ath9k_init_priv(struct ath9k_htc_priv *priv, |
630 | u16 devid, char *product) | 624 | u16 devid, char *product, |
625 | u32 drv_info) | ||
631 | { | 626 | { |
632 | struct ath_hw *ah = NULL; | 627 | struct ath_hw *ah = NULL; |
633 | struct ath_common *common; | 628 | struct ath_common *common; |
@@ -641,6 +636,7 @@ static int ath9k_init_priv(struct ath9k_htc_priv *priv, | |||
641 | 636 | ||
642 | ah->hw_version.devid = devid; | 637 | ah->hw_version.devid = devid; |
643 | ah->hw_version.subsysid = 0; /* FIXME */ | 638 | ah->hw_version.subsysid = 0; /* FIXME */ |
639 | ah->ah_flags |= AH_USE_EEPROM; | ||
644 | priv->ah = ah; | 640 | priv->ah = ah; |
645 | 641 | ||
646 | common = ath9k_hw_common(ah); | 642 | common = ath9k_hw_common(ah); |
@@ -650,6 +646,7 @@ static int ath9k_init_priv(struct ath9k_htc_priv *priv, | |||
650 | common->hw = priv->hw; | 646 | common->hw = priv->hw; |
651 | common->priv = priv; | 647 | common->priv = priv; |
652 | common->debug_mask = ath9k_debug; | 648 | common->debug_mask = ath9k_debug; |
649 | common->driver_info = drv_info; | ||
653 | 650 | ||
654 | spin_lock_init(&priv->wmi->wmi_lock); | 651 | spin_lock_init(&priv->wmi->wmi_lock); |
655 | spin_lock_init(&priv->beacon_lock); | 652 | spin_lock_init(&priv->beacon_lock); |
@@ -762,7 +759,7 @@ static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv, | |||
762 | } | 759 | } |
763 | 760 | ||
764 | static int ath9k_init_device(struct ath9k_htc_priv *priv, | 761 | static int ath9k_init_device(struct ath9k_htc_priv *priv, |
765 | u16 devid, char *product) | 762 | u16 devid, char *product, u32 drv_info) |
766 | { | 763 | { |
767 | struct ieee80211_hw *hw = priv->hw; | 764 | struct ieee80211_hw *hw = priv->hw; |
768 | struct ath_common *common; | 765 | struct ath_common *common; |
@@ -771,7 +768,7 @@ static int ath9k_init_device(struct ath9k_htc_priv *priv, | |||
771 | struct ath_regulatory *reg; | 768 | struct ath_regulatory *reg; |
772 | 769 | ||
773 | /* Bring up device */ | 770 | /* Bring up device */ |
774 | error = ath9k_init_priv(priv, devid, product); | 771 | error = ath9k_init_priv(priv, devid, product, drv_info); |
775 | if (error != 0) | 772 | if (error != 0) |
776 | goto err_init; | 773 | goto err_init; |
777 | 774 | ||
@@ -829,7 +826,7 @@ err_init: | |||
829 | } | 826 | } |
830 | 827 | ||
831 | int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev, | 828 | int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev, |
832 | u16 devid, char *product) | 829 | u16 devid, char *product, u32 drv_info) |
833 | { | 830 | { |
834 | struct ieee80211_hw *hw; | 831 | struct ieee80211_hw *hw; |
835 | struct ath9k_htc_priv *priv; | 832 | struct ath9k_htc_priv *priv; |
@@ -856,14 +853,14 @@ int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev, | |||
856 | goto err_free; | 853 | goto err_free; |
857 | } | 854 | } |
858 | 855 | ||
859 | ret = ath9k_init_htc_services(priv, devid); | 856 | ret = ath9k_init_htc_services(priv, devid, drv_info); |
860 | if (ret) | 857 | if (ret) |
861 | goto err_init; | 858 | goto err_init; |
862 | 859 | ||
863 | /* The device may have been unplugged earlier. */ | 860 | /* The device may have been unplugged earlier. */ |
864 | priv->op_flags &= ~OP_UNPLUGGED; | 861 | priv->op_flags &= ~OP_UNPLUGGED; |
865 | 862 | ||
866 | ret = ath9k_init_device(priv, devid, product); | 863 | ret = ath9k_init_device(priv, devid, product, drv_info); |
867 | if (ret) | 864 | if (ret) |
868 | goto err_init; | 865 | goto err_init; |
869 | 866 | ||
@@ -893,14 +890,15 @@ void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug) | |||
893 | #ifdef CONFIG_PM | 890 | #ifdef CONFIG_PM |
894 | int ath9k_htc_resume(struct htc_target *htc_handle) | 891 | int ath9k_htc_resume(struct htc_target *htc_handle) |
895 | { | 892 | { |
893 | struct ath9k_htc_priv *priv = htc_handle->drv_priv; | ||
896 | int ret; | 894 | int ret; |
897 | 895 | ||
898 | ret = ath9k_htc_wait_for_target(htc_handle->drv_priv); | 896 | ret = ath9k_htc_wait_for_target(priv); |
899 | if (ret) | 897 | if (ret) |
900 | return ret; | 898 | return ret; |
901 | 899 | ||
902 | ret = ath9k_init_htc_services(htc_handle->drv_priv, | 900 | ret = ath9k_init_htc_services(priv, priv->ah->hw_version.devid, |
903 | htc_handle->drv_priv->ah->hw_version.devid); | 901 | priv->ah->common.driver_info); |
904 | return ret; | 902 | return ret; |
905 | } | 903 | } |
906 | #endif | 904 | #endif |
diff --git a/drivers/net/wireless/ath/ath9k/htc_hst.c b/drivers/net/wireless/ath/ath9k/htc_hst.c index 861ec9269309..c41ab8c30161 100644 --- a/drivers/net/wireless/ath/ath9k/htc_hst.c +++ b/drivers/net/wireless/ath/ath9k/htc_hst.c | |||
@@ -462,9 +462,10 @@ void ath9k_htc_hw_free(struct htc_target *htc) | |||
462 | } | 462 | } |
463 | 463 | ||
464 | int ath9k_htc_hw_init(struct htc_target *target, | 464 | int ath9k_htc_hw_init(struct htc_target *target, |
465 | struct device *dev, u16 devid, char *product) | 465 | struct device *dev, u16 devid, |
466 | char *product, u32 drv_info) | ||
466 | { | 467 | { |
467 | if (ath9k_htc_probe_device(target, dev, devid, product)) { | 468 | if (ath9k_htc_probe_device(target, dev, devid, product, drv_info)) { |
468 | printk(KERN_ERR "Failed to initialize the device\n"); | 469 | printk(KERN_ERR "Failed to initialize the device\n"); |
469 | return -ENODEV; | 470 | return -ENODEV; |
470 | } | 471 | } |
diff --git a/drivers/net/wireless/ath/ath9k/htc_hst.h b/drivers/net/wireless/ath/ath9k/htc_hst.h index 07b6509d5896..6fc1b21faa5d 100644 --- a/drivers/net/wireless/ath/ath9k/htc_hst.h +++ b/drivers/net/wireless/ath/ath9k/htc_hst.h | |||
@@ -239,7 +239,8 @@ struct htc_target *ath9k_htc_hw_alloc(void *hif_handle, | |||
239 | struct device *dev); | 239 | struct device *dev); |
240 | void ath9k_htc_hw_free(struct htc_target *htc); | 240 | void ath9k_htc_hw_free(struct htc_target *htc); |
241 | int ath9k_htc_hw_init(struct htc_target *target, | 241 | int ath9k_htc_hw_init(struct htc_target *target, |
242 | struct device *dev, u16 devid, char *product); | 242 | struct device *dev, u16 devid, char *product, |
243 | u32 drv_info); | ||
243 | void ath9k_htc_hw_deinit(struct htc_target *target, bool hot_unplug); | 244 | void ath9k_htc_hw_deinit(struct htc_target *target, bool hot_unplug); |
244 | 245 | ||
245 | #endif /* HTC_HST_H */ | 246 | #endif /* HTC_HST_H */ |
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c index 5fb1bf33faa0..ce9e59f4cd3d 100644 --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c | |||
@@ -310,10 +310,9 @@ static bool ath9k_hw_chip_test(struct ath_hw *ah) | |||
310 | struct ath_common *common = ath9k_hw_common(ah); | 310 | struct ath_common *common = ath9k_hw_common(ah); |
311 | u32 regAddr[2] = { AR_STA_ID0 }; | 311 | u32 regAddr[2] = { AR_STA_ID0 }; |
312 | u32 regHold[2]; | 312 | u32 regHold[2]; |
313 | u32 patternData[4] = { 0x55555555, | 313 | static const u32 patternData[4] = { |
314 | 0xaaaaaaaa, | 314 | 0x55555555, 0xaaaaaaaa, 0x66666666, 0x99999999 |
315 | 0x66666666, | 315 | }; |
316 | 0x99999999 }; | ||
317 | int i, j, loop_max; | 316 | int i, j, loop_max; |
318 | 317 | ||
319 | if (!AR_SREV_9300_20_OR_LATER(ah)) { | 318 | if (!AR_SREV_9300_20_OR_LATER(ah)) { |
@@ -419,10 +418,6 @@ static void ath9k_hw_init_defaults(struct ath_hw *ah) | |||
419 | ah->hw_version.magic = AR5416_MAGIC; | 418 | ah->hw_version.magic = AR5416_MAGIC; |
420 | ah->hw_version.subvendorid = 0; | 419 | ah->hw_version.subvendorid = 0; |
421 | 420 | ||
422 | ah->ah_flags = 0; | ||
423 | if (!AR_SREV_9100(ah)) | ||
424 | ah->ah_flags = AH_USE_EEPROM; | ||
425 | |||
426 | ah->atim_window = 0; | 421 | ah->atim_window = 0; |
427 | ah->sta_id1_defaults = | 422 | ah->sta_id1_defaults = |
428 | AR_STA_ID1_CRPT_MIC_ENABLE | | 423 | AR_STA_ID1_CRPT_MIC_ENABLE | |
@@ -440,7 +435,7 @@ static int ath9k_hw_init_macaddr(struct ath_hw *ah) | |||
440 | u32 sum; | 435 | u32 sum; |
441 | int i; | 436 | int i; |
442 | u16 eeval; | 437 | u16 eeval; |
443 | u32 EEP_MAC[] = { EEP_MAC_LSW, EEP_MAC_MID, EEP_MAC_MSW }; | 438 | static const u32 EEP_MAC[] = { EEP_MAC_LSW, EEP_MAC_MID, EEP_MAC_MSW }; |
444 | 439 | ||
445 | sum = 0; | 440 | sum = 0; |
446 | for (i = 0; i < 3; i++) { | 441 | for (i = 0; i < 3; i++) { |
@@ -1833,6 +1828,10 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah) | |||
1833 | 1828 | ||
1834 | ah->misc_mode |= AR_PCU_MIC_NEW_LOC_ENA; | 1829 | ah->misc_mode |= AR_PCU_MIC_NEW_LOC_ENA; |
1835 | 1830 | ||
1831 | /* enable key search for every frame in an aggregate */ | ||
1832 | if (AR_SREV_9300_20_OR_LATER(ah)) | ||
1833 | ah->misc_mode |= AR_PCU_ALWAYS_PERFORM_KEYSEARCH; | ||
1834 | |||
1836 | pCap->low_2ghz_chan = 2312; | 1835 | pCap->low_2ghz_chan = 2312; |
1837 | pCap->high_2ghz_chan = 2732; | 1836 | pCap->high_2ghz_chan = 2732; |
1838 | 1837 | ||
@@ -1963,6 +1962,9 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah) | |||
1963 | if (AR_SREV_9300_20_OR_LATER(ah)) | 1962 | if (AR_SREV_9300_20_OR_LATER(ah)) |
1964 | pCap->hw_caps |= ATH9K_HW_CAP_RAC_SUPPORTED; | 1963 | pCap->hw_caps |= ATH9K_HW_CAP_RAC_SUPPORTED; |
1965 | 1964 | ||
1965 | if (AR_SREV_9300_20_OR_LATER(ah)) | ||
1966 | ah->ent_mode = REG_READ(ah, AR_ENT_OTP); | ||
1967 | |||
1966 | if (AR_SREV_9287_11_OR_LATER(ah) || AR_SREV_9271(ah)) | 1968 | if (AR_SREV_9287_11_OR_LATER(ah) || AR_SREV_9271(ah)) |
1967 | pCap->hw_caps |= ATH9K_HW_CAP_SGI_20; | 1969 | pCap->hw_caps |= ATH9K_HW_CAP_SGI_20; |
1968 | 1970 | ||
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h index e29c7122f466..cc8f3b9af71f 100644 --- a/drivers/net/wireless/ath/ath9k/hw.h +++ b/drivers/net/wireless/ath/ath9k/hw.h | |||
@@ -485,6 +485,40 @@ struct ath_hw_antcomb_conf { | |||
485 | }; | 485 | }; |
486 | 486 | ||
487 | /** | 487 | /** |
488 | * struct ath_hw_radar_conf - radar detection initialization parameters | ||
489 | * | ||
490 | * @pulse_inband: threshold for checking the ratio of in-band power | ||
491 | * to total power for short radar pulses (half dB steps) | ||
492 | * @pulse_inband_step: threshold for checking an in-band power to total | ||
493 | * power ratio increase for short radar pulses (half dB steps) | ||
494 | * @pulse_height: threshold for detecting the beginning of a short | ||
495 | * radar pulse (dB step) | ||
496 | * @pulse_rssi: threshold for detecting if a short radar pulse is | ||
497 | * gone (dB step) | ||
498 | * @pulse_maxlen: maximum pulse length (0.8 us steps) | ||
499 | * | ||
500 | * @radar_rssi: RSSI threshold for starting long radar detection (dB steps) | ||
501 | * @radar_inband: threshold for checking the ratio of in-band power | ||
502 | * to total power for long radar pulses (half dB steps) | ||
503 | * @fir_power: threshold for detecting the end of a long radar pulse (dB) | ||
504 | * | ||
505 | * @ext_channel: enable extension channel radar detection | ||
506 | */ | ||
507 | struct ath_hw_radar_conf { | ||
508 | unsigned int pulse_inband; | ||
509 | unsigned int pulse_inband_step; | ||
510 | unsigned int pulse_height; | ||
511 | unsigned int pulse_rssi; | ||
512 | unsigned int pulse_maxlen; | ||
513 | |||
514 | unsigned int radar_rssi; | ||
515 | unsigned int radar_inband; | ||
516 | int fir_power; | ||
517 | |||
518 | bool ext_channel; | ||
519 | }; | ||
520 | |||
521 | /** | ||
488 | * struct ath_hw_private_ops - callbacks used internally by hardware code | 522 | * struct ath_hw_private_ops - callbacks used internally by hardware code |
489 | * | 523 | * |
490 | * This structure contains private callbacks designed to only be used internally | 524 | * This structure contains private callbacks designed to only be used internally |
@@ -549,6 +583,8 @@ struct ath_hw_private_ops { | |||
549 | bool (*ani_control)(struct ath_hw *ah, enum ath9k_ani_cmd cmd, | 583 | bool (*ani_control)(struct ath_hw *ah, enum ath9k_ani_cmd cmd, |
550 | int param); | 584 | int param); |
551 | void (*do_getnf)(struct ath_hw *ah, int16_t nfarray[NUM_NF_READINGS]); | 585 | void (*do_getnf)(struct ath_hw *ah, int16_t nfarray[NUM_NF_READINGS]); |
586 | void (*set_radar_params)(struct ath_hw *ah, | ||
587 | struct ath_hw_radar_conf *conf); | ||
552 | 588 | ||
553 | /* ANI */ | 589 | /* ANI */ |
554 | void (*ani_cache_ini_regs)(struct ath_hw *ah); | 590 | void (*ani_cache_ini_regs)(struct ath_hw *ah); |
@@ -747,6 +783,8 @@ struct ath_hw { | |||
747 | u8 txchainmask; | 783 | u8 txchainmask; |
748 | u8 rxchainmask; | 784 | u8 rxchainmask; |
749 | 785 | ||
786 | struct ath_hw_radar_conf radar_conf; | ||
787 | |||
750 | u32 originalGain[22]; | 788 | u32 originalGain[22]; |
751 | int initPDADC; | 789 | int initPDADC; |
752 | int PDADCdelta; | 790 | int PDADCdelta; |
@@ -804,6 +842,9 @@ struct ath_hw { | |||
804 | * this register when in sleep states. | 842 | * this register when in sleep states. |
805 | */ | 843 | */ |
806 | u32 WARegVal; | 844 | u32 WARegVal; |
845 | |||
846 | /* Enterprise mode cap */ | ||
847 | u32 ent_mode; | ||
807 | }; | 848 | }; |
808 | 849 | ||
809 | static inline struct ath_common *ath9k_hw_common(struct ath_hw *ah) | 850 | static inline struct ath_common *ath9k_hw_common(struct ath_hw *ah) |
diff --git a/drivers/net/wireless/ath/ath9k/init.c b/drivers/net/wireless/ath/ath9k/init.c index 5c26818d79ec..7eef1faee668 100644 --- a/drivers/net/wireless/ath/ath9k/init.c +++ b/drivers/net/wireless/ath/ath9k/init.c | |||
@@ -533,6 +533,9 @@ static int ath9k_init_softc(u16 devid, struct ath_softc *sc, u16 subsysid, | |||
533 | ah->hw_version.subsysid = subsysid; | 533 | ah->hw_version.subsysid = subsysid; |
534 | sc->sc_ah = ah; | 534 | sc->sc_ah = ah; |
535 | 535 | ||
536 | if (!sc->dev->platform_data) | ||
537 | ah->ah_flags |= AH_USE_EEPROM; | ||
538 | |||
536 | common = ath9k_hw_common(ah); | 539 | common = ath9k_hw_common(ah); |
537 | common->ops = &ath9k_common_ops; | 540 | common->ops = &ath9k_common_ops; |
538 | common->bus_ops = bus_ops; | 541 | common->bus_ops = bus_ops; |
diff --git a/drivers/net/wireless/ath/ath9k/mac.c b/drivers/net/wireless/ath/ath9k/mac.c index 65b1ee2a9792..b04b37b1124b 100644 --- a/drivers/net/wireless/ath/ath9k/mac.c +++ b/drivers/net/wireless/ath/ath9k/mac.c | |||
@@ -766,14 +766,6 @@ void ath9k_hw_startpcureceive(struct ath_hw *ah, bool is_scanning) | |||
766 | } | 766 | } |
767 | EXPORT_SYMBOL(ath9k_hw_startpcureceive); | 767 | EXPORT_SYMBOL(ath9k_hw_startpcureceive); |
768 | 768 | ||
769 | void ath9k_hw_stoppcurecv(struct ath_hw *ah) | ||
770 | { | ||
771 | REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_DIS); | ||
772 | |||
773 | ath9k_hw_disable_mib_counters(ah); | ||
774 | } | ||
775 | EXPORT_SYMBOL(ath9k_hw_stoppcurecv); | ||
776 | |||
777 | void ath9k_hw_abortpcurecv(struct ath_hw *ah) | 769 | void ath9k_hw_abortpcurecv(struct ath_hw *ah) |
778 | { | 770 | { |
779 | REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_ABORT | AR_DIAG_RX_DIS); | 771 | REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_ABORT | AR_DIAG_RX_DIS); |
diff --git a/drivers/net/wireless/ath/ath9k/mac.h b/drivers/net/wireless/ath/ath9k/mac.h index 22907e21cc46..7512f97e8f49 100644 --- a/drivers/net/wireless/ath/ath9k/mac.h +++ b/drivers/net/wireless/ath/ath9k/mac.h | |||
@@ -691,7 +691,6 @@ void ath9k_hw_setuprxdesc(struct ath_hw *ah, struct ath_desc *ds, | |||
691 | bool ath9k_hw_setrxabort(struct ath_hw *ah, bool set); | 691 | bool ath9k_hw_setrxabort(struct ath_hw *ah, bool set); |
692 | void ath9k_hw_putrxbuf(struct ath_hw *ah, u32 rxdp); | 692 | void ath9k_hw_putrxbuf(struct ath_hw *ah, u32 rxdp); |
693 | void ath9k_hw_startpcureceive(struct ath_hw *ah, bool is_scanning); | 693 | void ath9k_hw_startpcureceive(struct ath_hw *ah, bool is_scanning); |
694 | void ath9k_hw_stoppcurecv(struct ath_hw *ah); | ||
695 | void ath9k_hw_abortpcurecv(struct ath_hw *ah); | 694 | void ath9k_hw_abortpcurecv(struct ath_hw *ah); |
696 | bool ath9k_hw_stopdmarecv(struct ath_hw *ah); | 695 | bool ath9k_hw_stopdmarecv(struct ath_hw *ah); |
697 | int ath9k_hw_beaconq_setup(struct ath_hw *ah); | 696 | int ath9k_hw_beaconq_setup(struct ath_hw *ah); |
diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c index f8c811af312d..50bdb5db23b4 100644 --- a/drivers/net/wireless/ath/ath9k/main.c +++ b/drivers/net/wireless/ath/ath9k/main.c | |||
@@ -380,6 +380,7 @@ void ath_paprd_calibrate(struct work_struct *work) | |||
380 | } | 380 | } |
381 | 381 | ||
382 | init_completion(&sc->paprd_complete); | 382 | init_completion(&sc->paprd_complete); |
383 | sc->paprd_pending = true; | ||
383 | ar9003_paprd_setup_gain_table(ah, chain); | 384 | ar9003_paprd_setup_gain_table(ah, chain); |
384 | txctl.paprd = BIT(chain); | 385 | txctl.paprd = BIT(chain); |
385 | if (ath_tx_start(hw, skb, &txctl) != 0) | 386 | if (ath_tx_start(hw, skb, &txctl) != 0) |
@@ -387,6 +388,7 @@ void ath_paprd_calibrate(struct work_struct *work) | |||
387 | 388 | ||
388 | time_left = wait_for_completion_timeout(&sc->paprd_complete, | 389 | time_left = wait_for_completion_timeout(&sc->paprd_complete, |
389 | msecs_to_jiffies(ATH_PAPRD_TIMEOUT)); | 390 | msecs_to_jiffies(ATH_PAPRD_TIMEOUT)); |
391 | sc->paprd_pending = false; | ||
390 | if (!time_left) { | 392 | if (!time_left) { |
391 | ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE, | 393 | ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE, |
392 | "Timeout waiting for paprd training on " | 394 | "Timeout waiting for paprd training on " |
@@ -1193,12 +1195,10 @@ mutex_unlock: | |||
1193 | static int ath9k_tx(struct ieee80211_hw *hw, | 1195 | static int ath9k_tx(struct ieee80211_hw *hw, |
1194 | struct sk_buff *skb) | 1196 | struct sk_buff *skb) |
1195 | { | 1197 | { |
1196 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); | ||
1197 | struct ath_wiphy *aphy = hw->priv; | 1198 | struct ath_wiphy *aphy = hw->priv; |
1198 | struct ath_softc *sc = aphy->sc; | 1199 | struct ath_softc *sc = aphy->sc; |
1199 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); | 1200 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); |
1200 | struct ath_tx_control txctl; | 1201 | struct ath_tx_control txctl; |
1201 | int padpos, padsize; | ||
1202 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data; | 1202 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data; |
1203 | 1203 | ||
1204 | if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) { | 1204 | if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) { |
@@ -1249,29 +1249,6 @@ static int ath9k_tx(struct ieee80211_hw *hw, | |||
1249 | } | 1249 | } |
1250 | 1250 | ||
1251 | memset(&txctl, 0, sizeof(struct ath_tx_control)); | 1251 | memset(&txctl, 0, sizeof(struct ath_tx_control)); |
1252 | |||
1253 | /* | ||
1254 | * As a temporary workaround, assign seq# here; this will likely need | ||
1255 | * to be cleaned up to work better with Beacon transmission and virtual | ||
1256 | * BSSes. | ||
1257 | */ | ||
1258 | if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { | ||
1259 | if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) | ||
1260 | sc->tx.seq_no += 0x10; | ||
1261 | hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); | ||
1262 | hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no); | ||
1263 | } | ||
1264 | |||
1265 | /* Add the padding after the header if this is not already done */ | ||
1266 | padpos = ath9k_cmn_padpos(hdr->frame_control); | ||
1267 | padsize = padpos & 3; | ||
1268 | if (padsize && skb->len>padpos) { | ||
1269 | if (skb_headroom(skb) < padsize) | ||
1270 | return -1; | ||
1271 | skb_push(skb, padsize); | ||
1272 | memmove(skb->data, skb->data + padsize, padpos); | ||
1273 | } | ||
1274 | |||
1275 | txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)]; | 1252 | txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)]; |
1276 | 1253 | ||
1277 | ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb); | 1254 | ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb); |
@@ -2015,6 +1992,9 @@ static int ath9k_ampdu_action(struct ieee80211_hw *hw, | |||
2015 | case IEEE80211_AMPDU_RX_STOP: | 1992 | case IEEE80211_AMPDU_RX_STOP: |
2016 | break; | 1993 | break; |
2017 | case IEEE80211_AMPDU_TX_START: | 1994 | case IEEE80211_AMPDU_TX_START: |
1995 | if (!(sc->sc_flags & SC_OP_TXAGGR)) | ||
1996 | return -EOPNOTSUPP; | ||
1997 | |||
2018 | ath9k_ps_wakeup(sc); | 1998 | ath9k_ps_wakeup(sc); |
2019 | ret = ath_tx_aggr_start(sc, sta, tid, ssn); | 1999 | ret = ath_tx_aggr_start(sc, sta, tid, ssn); |
2020 | if (!ret) | 2000 | if (!ret) |
diff --git a/drivers/net/wireless/ath/ath9k/pci.c b/drivers/net/wireless/ath/ath9k/pci.c index 6605bc2c2036..09f69a9617f4 100644 --- a/drivers/net/wireless/ath/ath9k/pci.c +++ b/drivers/net/wireless/ath/ath9k/pci.c | |||
@@ -16,6 +16,7 @@ | |||
16 | 16 | ||
17 | #include <linux/nl80211.h> | 17 | #include <linux/nl80211.h> |
18 | #include <linux/pci.h> | 18 | #include <linux/pci.h> |
19 | #include <linux/ath9k_platform.h> | ||
19 | #include "ath9k.h" | 20 | #include "ath9k.h" |
20 | 21 | ||
21 | static DEFINE_PCI_DEVICE_TABLE(ath_pci_id_table) = { | 22 | static DEFINE_PCI_DEVICE_TABLE(ath_pci_id_table) = { |
@@ -53,21 +54,36 @@ static void ath_pci_read_cachesize(struct ath_common *common, int *csz) | |||
53 | 54 | ||
54 | static bool ath_pci_eeprom_read(struct ath_common *common, u32 off, u16 *data) | 55 | static bool ath_pci_eeprom_read(struct ath_common *common, u32 off, u16 *data) |
55 | { | 56 | { |
56 | struct ath_hw *ah = (struct ath_hw *) common->ah; | 57 | struct ath_softc *sc = (struct ath_softc *) common->priv; |
57 | 58 | struct ath9k_platform_data *pdata = sc->dev->platform_data; | |
58 | common->ops->read(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S)); | 59 | |
59 | 60 | if (pdata) { | |
60 | if (!ath9k_hw_wait(ah, | 61 | if (off >= (ARRAY_SIZE(pdata->eeprom_data))) { |
61 | AR_EEPROM_STATUS_DATA, | 62 | ath_print(common, ATH_DBG_FATAL, |
62 | AR_EEPROM_STATUS_DATA_BUSY | | 63 | "%s: eeprom read failed, offset %08x " |
63 | AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0, | 64 | "is out of range\n", |
64 | AH_WAIT_TIMEOUT)) { | 65 | __func__, off); |
65 | return false; | 66 | } |
67 | |||
68 | *data = pdata->eeprom_data[off]; | ||
69 | } else { | ||
70 | struct ath_hw *ah = (struct ath_hw *) common->ah; | ||
71 | |||
72 | common->ops->read(ah, AR5416_EEPROM_OFFSET + | ||
73 | (off << AR5416_EEPROM_S)); | ||
74 | |||
75 | if (!ath9k_hw_wait(ah, | ||
76 | AR_EEPROM_STATUS_DATA, | ||
77 | AR_EEPROM_STATUS_DATA_BUSY | | ||
78 | AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0, | ||
79 | AH_WAIT_TIMEOUT)) { | ||
80 | return false; | ||
81 | } | ||
82 | |||
83 | *data = MS(common->ops->read(ah, AR_EEPROM_STATUS_DATA), | ||
84 | AR_EEPROM_STATUS_DATA_VAL); | ||
66 | } | 85 | } |
67 | 86 | ||
68 | *data = MS(common->ops->read(ah, AR_EEPROM_STATUS_DATA), | ||
69 | AR_EEPROM_STATUS_DATA_VAL); | ||
70 | |||
71 | return true; | 87 | return true; |
72 | } | 88 | } |
73 | 89 | ||
diff --git a/drivers/net/wireless/ath/ath9k/rc.c b/drivers/net/wireless/ath/ath9k/rc.c index 85c8e9310cae..3e6ea3bc3d89 100644 --- a/drivers/net/wireless/ath/ath9k/rc.c +++ b/drivers/net/wireless/ath/ath9k/rc.c | |||
@@ -864,7 +864,7 @@ static bool ath_rc_update_per(struct ath_softc *sc, | |||
864 | bool state_change = false; | 864 | bool state_change = false; |
865 | int count, n_bad_frames; | 865 | int count, n_bad_frames; |
866 | u8 last_per; | 866 | u8 last_per; |
867 | static u32 nretry_to_per_lookup[10] = { | 867 | static const u32 nretry_to_per_lookup[10] = { |
868 | 100 * 0 / 1, | 868 | 100 * 0 / 1, |
869 | 100 * 1 / 4, | 869 | 100 * 1 / 4, |
870 | 100 * 1 / 2, | 870 | 100 * 1 / 2, |
@@ -1087,13 +1087,13 @@ static int ath_rc_get_rateindex(const struct ath_rate_table *rate_table, | |||
1087 | struct ieee80211_tx_rate *rate) | 1087 | struct ieee80211_tx_rate *rate) |
1088 | { | 1088 | { |
1089 | int rix = 0, i = 0; | 1089 | int rix = 0, i = 0; |
1090 | int mcs_rix_off[] = { 7, 15, 20, 21, 22, 23 }; | 1090 | static const int mcs_rix_off[] = { 7, 15, 20, 21, 22, 23 }; |
1091 | 1091 | ||
1092 | if (!(rate->flags & IEEE80211_TX_RC_MCS)) | 1092 | if (!(rate->flags & IEEE80211_TX_RC_MCS)) |
1093 | return rate->idx; | 1093 | return rate->idx; |
1094 | 1094 | ||
1095 | while (rate->idx > mcs_rix_off[i] && | 1095 | while (rate->idx > mcs_rix_off[i] && |
1096 | i < sizeof(mcs_rix_off)/sizeof(int)) { | 1096 | i < ARRAY_SIZE(mcs_rix_off)) { |
1097 | rix++; i++; | 1097 | rix++; i++; |
1098 | } | 1098 | } |
1099 | 1099 | ||
@@ -1354,23 +1354,7 @@ static void ath_tx_status(void *priv, struct ieee80211_supported_band *sband, | |||
1354 | tx_info->status.ampdu_len = 1; | 1354 | tx_info->status.ampdu_len = 1; |
1355 | } | 1355 | } |
1356 | 1356 | ||
1357 | /* | 1357 | if (!(tx_info->flags & IEEE80211_TX_STAT_ACK)) |
1358 | * If an underrun error is seen assume it as an excessive retry only | ||
1359 | * if max frame trigger level has been reached (2 KB for singel stream, | ||
1360 | * and 4 KB for dual stream). Adjust the long retry as if the frame was | ||
1361 | * tried hw->max_rate_tries times to affect how ratectrl updates PER for | ||
1362 | * the failed rate. In case of congestion on the bus penalizing these | ||
1363 | * type of underruns should help hardware actually transmit new frames | ||
1364 | * successfully by eventually preferring slower rates. This itself | ||
1365 | * should also alleviate congestion on the bus. | ||
1366 | */ | ||
1367 | if ((tx_info->pad[0] & ATH_TX_INFO_UNDERRUN) && | ||
1368 | (sc->sc_ah->tx_trig_level >= ath_rc_priv->tx_triglevel_max)) { | ||
1369 | tx_status = 1; | ||
1370 | is_underrun = 1; | ||
1371 | } | ||
1372 | |||
1373 | if (tx_info->pad[0] & ATH_TX_INFO_XRETRY) | ||
1374 | tx_status = 1; | 1358 | tx_status = 1; |
1375 | 1359 | ||
1376 | ath_rc_tx_status(sc, ath_rc_priv, tx_info, final_ts_idx, tx_status, | 1360 | ath_rc_tx_status(sc, ath_rc_priv, tx_info, final_ts_idx, tx_status, |
@@ -1379,7 +1363,8 @@ static void ath_tx_status(void *priv, struct ieee80211_supported_band *sband, | |||
1379 | /* Check if aggregation has to be enabled for this tid */ | 1363 | /* Check if aggregation has to be enabled for this tid */ |
1380 | if (conf_is_ht(&sc->hw->conf) && | 1364 | if (conf_is_ht(&sc->hw->conf) && |
1381 | !(skb->protocol == cpu_to_be16(ETH_P_PAE))) { | 1365 | !(skb->protocol == cpu_to_be16(ETH_P_PAE))) { |
1382 | if (ieee80211_is_data_qos(fc)) { | 1366 | if (ieee80211_is_data_qos(fc) && |
1367 | skb_get_queue_mapping(skb) != IEEE80211_AC_VO) { | ||
1383 | u8 *qc, tid; | 1368 | u8 *qc, tid; |
1384 | struct ath_node *an; | 1369 | struct ath_node *an; |
1385 | 1370 | ||
@@ -1596,8 +1581,6 @@ static void *ath_rate_alloc_sta(void *priv, struct ieee80211_sta *sta, gfp_t gfp | |||
1596 | return NULL; | 1581 | return NULL; |
1597 | } | 1582 | } |
1598 | 1583 | ||
1599 | rate_priv->tx_triglevel_max = sc->sc_ah->caps.tx_triglevel_max; | ||
1600 | |||
1601 | return rate_priv; | 1584 | return rate_priv; |
1602 | } | 1585 | } |
1603 | 1586 | ||
diff --git a/drivers/net/wireless/ath/ath9k/rc.h b/drivers/net/wireless/ath/ath9k/rc.h index 2f46a2266ba1..31a004cb60ac 100644 --- a/drivers/net/wireless/ath/ath9k/rc.h +++ b/drivers/net/wireless/ath/ath9k/rc.h | |||
@@ -215,7 +215,6 @@ struct ath_rate_priv { | |||
215 | u32 per_down_time; | 215 | u32 per_down_time; |
216 | u32 probe_interval; | 216 | u32 probe_interval; |
217 | u32 prev_data_rix; | 217 | u32 prev_data_rix; |
218 | u32 tx_triglevel_max; | ||
219 | struct ath_rateset neg_rates; | 218 | struct ath_rateset neg_rates; |
220 | struct ath_rateset neg_ht_rates; | 219 | struct ath_rateset neg_ht_rates; |
221 | struct ath_rate_softc *asc; | 220 | struct ath_rate_softc *asc; |
@@ -225,11 +224,6 @@ struct ath_rate_priv { | |||
225 | struct ath_rc_stats rcstats[RATE_TABLE_SIZE]; | 224 | struct ath_rc_stats rcstats[RATE_TABLE_SIZE]; |
226 | }; | 225 | }; |
227 | 226 | ||
228 | #define ATH_TX_INFO_FRAME_TYPE_INTERNAL (1 << 0) | ||
229 | #define ATH_TX_INFO_FRAME_TYPE_PAUSE (1 << 1) | ||
230 | #define ATH_TX_INFO_XRETRY (1 << 3) | ||
231 | #define ATH_TX_INFO_UNDERRUN (1 << 4) | ||
232 | |||
233 | enum ath9k_internal_frame_type { | 227 | enum ath9k_internal_frame_type { |
234 | ATH9K_IFT_NOT_INTERNAL, | 228 | ATH9K_IFT_NOT_INTERNAL, |
235 | ATH9K_IFT_PAUSE, | 229 | ATH9K_IFT_PAUSE, |
diff --git a/drivers/net/wireless/ath/ath9k/recv.c b/drivers/net/wireless/ath/ath9k/recv.c index c5c80764a94a..262c81595f6d 100644 --- a/drivers/net/wireless/ath/ath9k/recv.c +++ b/drivers/net/wireless/ath/ath9k/recv.c | |||
@@ -518,7 +518,7 @@ bool ath_stoprecv(struct ath_softc *sc) | |||
518 | bool stopped; | 518 | bool stopped; |
519 | 519 | ||
520 | spin_lock_bh(&sc->rx.rxbuflock); | 520 | spin_lock_bh(&sc->rx.rxbuflock); |
521 | ath9k_hw_stoppcurecv(ah); | 521 | ath9k_hw_abortpcurecv(ah); |
522 | ath9k_hw_setrxfilter(ah, 0); | 522 | ath9k_hw_setrxfilter(ah, 0); |
523 | stopped = ath9k_hw_stopdmarecv(ah); | 523 | stopped = ath9k_hw_stopdmarecv(ah); |
524 | 524 | ||
diff --git a/drivers/net/wireless/ath/ath9k/reg.h b/drivers/net/wireless/ath/ath9k/reg.h index dddf579aacf1..a597cc8d8644 100644 --- a/drivers/net/wireless/ath/ath9k/reg.h +++ b/drivers/net/wireless/ath/ath9k/reg.h | |||
@@ -864,15 +864,7 @@ | |||
864 | ((REG_READ(_ah, AR_AN_SYNTH9) & 0x7) == 0x1)) | 864 | ((REG_READ(_ah, AR_AN_SYNTH9) & 0x7) == 0x1)) |
865 | 865 | ||
866 | #define AR_DEVID_7010(_ah) \ | 866 | #define AR_DEVID_7010(_ah) \ |
867 | (((_ah)->hw_version.devid == 0x7010) || \ | 867 | ((_ah)->common.driver_info & AR7010_DEVICE) |
868 | ((_ah)->hw_version.devid == 0x7015) || \ | ||
869 | ((_ah)->hw_version.devid == 0x9018) || \ | ||
870 | ((_ah)->hw_version.devid == 0xA704) || \ | ||
871 | ((_ah)->hw_version.devid == 0x1200)) | ||
872 | |||
873 | #define AR9287_HTC_DEVID(_ah) \ | ||
874 | (((_ah)->hw_version.devid == 0x7015) || \ | ||
875 | ((_ah)->hw_version.devid == 0x1200)) | ||
876 | 868 | ||
877 | #define AR_RADIO_SREV_MAJOR 0xf0 | 869 | #define AR_RADIO_SREV_MAJOR 0xf0 |
878 | #define AR_RAD5133_SREV_MAJOR 0xc0 | 870 | #define AR_RAD5133_SREV_MAJOR 0xc0 |
@@ -1072,6 +1064,9 @@ enum { | |||
1072 | #define AR_INTR_PRIO_ASYNC_MASK 0x40c8 | 1064 | #define AR_INTR_PRIO_ASYNC_MASK 0x40c8 |
1073 | #define AR_INTR_PRIO_SYNC_MASK 0x40cc | 1065 | #define AR_INTR_PRIO_SYNC_MASK 0x40cc |
1074 | #define AR_INTR_PRIO_ASYNC_ENABLE 0x40d4 | 1066 | #define AR_INTR_PRIO_ASYNC_ENABLE 0x40d4 |
1067 | #define AR_ENT_OTP 0x40d8 | ||
1068 | #define AR_ENT_OTP_CHAIN2_DISABLE 0x00020000 | ||
1069 | #define AR_ENT_OTP_MPSD 0x00800000 | ||
1075 | 1070 | ||
1076 | #define AR_RTC_9300_PLL_DIV 0x000003ff | 1071 | #define AR_RTC_9300_PLL_DIV 0x000003ff |
1077 | #define AR_RTC_9300_PLL_DIV_S 0 | 1072 | #define AR_RTC_9300_PLL_DIV_S 0 |
@@ -1572,6 +1567,7 @@ enum { | |||
1572 | #define AR_PCU_TBTT_PROTECT 0x00200000 | 1567 | #define AR_PCU_TBTT_PROTECT 0x00200000 |
1573 | #define AR_PCU_CLEAR_VMF 0x01000000 | 1568 | #define AR_PCU_CLEAR_VMF 0x01000000 |
1574 | #define AR_PCU_CLEAR_BA_VALID 0x04000000 | 1569 | #define AR_PCU_CLEAR_BA_VALID 0x04000000 |
1570 | #define AR_PCU_ALWAYS_PERFORM_KEYSEARCH 0x10000000 | ||
1575 | 1571 | ||
1576 | #define AR_PCU_BT_ANT_PREVENT_RX 0x00100000 | 1572 | #define AR_PCU_BT_ANT_PREVENT_RX 0x00100000 |
1577 | #define AR_PCU_BT_ANT_PREVENT_RX_S 20 | 1573 | #define AR_PCU_BT_ANT_PREVENT_RX_S 20 |
diff --git a/drivers/net/wireless/ath/ath9k/virtual.c b/drivers/net/wireless/ath/ath9k/virtual.c index 4008f51d34c8..d5442c3745cc 100644 --- a/drivers/net/wireless/ath/ath9k/virtual.c +++ b/drivers/net/wireless/ath/ath9k/virtual.c | |||
@@ -305,13 +305,12 @@ void ath9k_wiphy_chan_work(struct work_struct *work) | |||
305 | * ath9k version of ieee80211_tx_status() for TX frames that are generated | 305 | * ath9k version of ieee80211_tx_status() for TX frames that are generated |
306 | * internally in the driver. | 306 | * internally in the driver. |
307 | */ | 307 | */ |
308 | void ath9k_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb) | 308 | void ath9k_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb, int ftype) |
309 | { | 309 | { |
310 | struct ath_wiphy *aphy = hw->priv; | 310 | struct ath_wiphy *aphy = hw->priv; |
311 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); | 311 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); |
312 | 312 | ||
313 | if ((tx_info->pad[0] & ATH_TX_INFO_FRAME_TYPE_PAUSE) && | 313 | if (ftype == ATH9K_IFT_PAUSE && aphy->state == ATH_WIPHY_PAUSING) { |
314 | aphy->state == ATH_WIPHY_PAUSING) { | ||
315 | if (!(tx_info->flags & IEEE80211_TX_STAT_ACK)) { | 314 | if (!(tx_info->flags & IEEE80211_TX_STAT_ACK)) { |
316 | printk(KERN_DEBUG "ath9k: %s: no ACK for pause " | 315 | printk(KERN_DEBUG "ath9k: %s: no ACK for pause " |
317 | "frame\n", wiphy_name(hw->wiphy)); | 316 | "frame\n", wiphy_name(hw->wiphy)); |
diff --git a/drivers/net/wireless/ath/ath9k/xmit.c b/drivers/net/wireless/ath/ath9k/xmit.c index 6380bbd82d49..495432ec85a9 100644 --- a/drivers/net/wireless/ath/ath9k/xmit.c +++ b/drivers/net/wireless/ath/ath9k/xmit.c | |||
@@ -48,19 +48,17 @@ static u16 bits_per_symbol[][2] = { | |||
48 | 48 | ||
49 | #define IS_HT_RATE(_rate) ((_rate) & 0x80) | 49 | #define IS_HT_RATE(_rate) ((_rate) & 0x80) |
50 | 50 | ||
51 | static void ath_tx_send_ht_normal(struct ath_softc *sc, struct ath_txq *txq, | 51 | static void ath_tx_send_normal(struct ath_softc *sc, struct ath_txq *txq, |
52 | struct ath_atx_tid *tid, | 52 | struct ath_atx_tid *tid, |
53 | struct list_head *bf_head); | 53 | struct list_head *bf_head); |
54 | static void ath_tx_complete_buf(struct ath_softc *sc, struct ath_buf *bf, | 54 | static void ath_tx_complete_buf(struct ath_softc *sc, struct ath_buf *bf, |
55 | struct ath_txq *txq, struct list_head *bf_q, | 55 | struct ath_txq *txq, struct list_head *bf_q, |
56 | struct ath_tx_status *ts, int txok, int sendbar); | 56 | struct ath_tx_status *ts, int txok, int sendbar); |
57 | static void ath_tx_txqaddbuf(struct ath_softc *sc, struct ath_txq *txq, | 57 | static void ath_tx_txqaddbuf(struct ath_softc *sc, struct ath_txq *txq, |
58 | struct list_head *head); | 58 | struct list_head *head); |
59 | static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf); | 59 | static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf, int len); |
60 | static int ath_tx_num_badfrms(struct ath_softc *sc, struct ath_buf *bf, | ||
61 | struct ath_tx_status *ts, int txok); | ||
62 | static void ath_tx_rc_status(struct ath_buf *bf, struct ath_tx_status *ts, | 60 | static void ath_tx_rc_status(struct ath_buf *bf, struct ath_tx_status *ts, |
63 | int nbad, int txok, bool update_rc); | 61 | int nframes, int nbad, int txok, bool update_rc); |
64 | static void ath_tx_update_baw(struct ath_softc *sc, struct ath_atx_tid *tid, | 62 | static void ath_tx_update_baw(struct ath_softc *sc, struct ath_atx_tid *tid, |
65 | int seqno); | 63 | int seqno); |
66 | 64 | ||
@@ -140,12 +138,21 @@ unlock: | |||
140 | spin_unlock_bh(&txq->axq_lock); | 138 | spin_unlock_bh(&txq->axq_lock); |
141 | } | 139 | } |
142 | 140 | ||
141 | static struct ath_frame_info *get_frame_info(struct sk_buff *skb) | ||
142 | { | ||
143 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); | ||
144 | BUILD_BUG_ON(sizeof(struct ath_frame_info) > | ||
145 | sizeof(tx_info->rate_driver_data)); | ||
146 | return (struct ath_frame_info *) &tx_info->rate_driver_data[0]; | ||
147 | } | ||
148 | |||
143 | static void ath_tx_flush_tid(struct ath_softc *sc, struct ath_atx_tid *tid) | 149 | static void ath_tx_flush_tid(struct ath_softc *sc, struct ath_atx_tid *tid) |
144 | { | 150 | { |
145 | struct ath_txq *txq = tid->ac->txq; | 151 | struct ath_txq *txq = tid->ac->txq; |
146 | struct ath_buf *bf; | 152 | struct ath_buf *bf; |
147 | struct list_head bf_head; | 153 | struct list_head bf_head; |
148 | struct ath_tx_status ts; | 154 | struct ath_tx_status ts; |
155 | struct ath_frame_info *fi; | ||
149 | 156 | ||
150 | INIT_LIST_HEAD(&bf_head); | 157 | INIT_LIST_HEAD(&bf_head); |
151 | 158 | ||
@@ -156,12 +163,15 @@ static void ath_tx_flush_tid(struct ath_softc *sc, struct ath_atx_tid *tid) | |||
156 | bf = list_first_entry(&tid->buf_q, struct ath_buf, list); | 163 | bf = list_first_entry(&tid->buf_q, struct ath_buf, list); |
157 | list_move_tail(&bf->list, &bf_head); | 164 | list_move_tail(&bf->list, &bf_head); |
158 | 165 | ||
159 | if (bf_isretried(bf)) { | 166 | spin_unlock_bh(&txq->axq_lock); |
160 | ath_tx_update_baw(sc, tid, bf->bf_seqno); | 167 | fi = get_frame_info(bf->bf_mpdu); |
168 | if (fi->retries) { | ||
169 | ath_tx_update_baw(sc, tid, fi->seqno); | ||
161 | ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0, 0); | 170 | ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0, 0); |
162 | } else { | 171 | } else { |
163 | ath_tx_send_ht_normal(sc, txq, tid, &bf_head); | 172 | ath_tx_send_normal(sc, txq, tid, &bf_head); |
164 | } | 173 | } |
174 | spin_lock_bh(&txq->axq_lock); | ||
165 | } | 175 | } |
166 | 176 | ||
167 | spin_unlock_bh(&txq->axq_lock); | 177 | spin_unlock_bh(&txq->axq_lock); |
@@ -184,14 +194,11 @@ static void ath_tx_update_baw(struct ath_softc *sc, struct ath_atx_tid *tid, | |||
184 | } | 194 | } |
185 | 195 | ||
186 | static void ath_tx_addto_baw(struct ath_softc *sc, struct ath_atx_tid *tid, | 196 | static void ath_tx_addto_baw(struct ath_softc *sc, struct ath_atx_tid *tid, |
187 | struct ath_buf *bf) | 197 | u16 seqno) |
188 | { | 198 | { |
189 | int index, cindex; | 199 | int index, cindex; |
190 | 200 | ||
191 | if (bf_isretried(bf)) | 201 | index = ATH_BA_INDEX(tid->seq_start, seqno); |
192 | return; | ||
193 | |||
194 | index = ATH_BA_INDEX(tid->seq_start, bf->bf_seqno); | ||
195 | cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1); | 202 | cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1); |
196 | __set_bit(cindex, tid->tx_buf); | 203 | __set_bit(cindex, tid->tx_buf); |
197 | 204 | ||
@@ -215,6 +222,7 @@ static void ath_tid_drain(struct ath_softc *sc, struct ath_txq *txq, | |||
215 | struct ath_buf *bf; | 222 | struct ath_buf *bf; |
216 | struct list_head bf_head; | 223 | struct list_head bf_head; |
217 | struct ath_tx_status ts; | 224 | struct ath_tx_status ts; |
225 | struct ath_frame_info *fi; | ||
218 | 226 | ||
219 | memset(&ts, 0, sizeof(ts)); | 227 | memset(&ts, 0, sizeof(ts)); |
220 | INIT_LIST_HEAD(&bf_head); | 228 | INIT_LIST_HEAD(&bf_head); |
@@ -226,8 +234,9 @@ static void ath_tid_drain(struct ath_softc *sc, struct ath_txq *txq, | |||
226 | bf = list_first_entry(&tid->buf_q, struct ath_buf, list); | 234 | bf = list_first_entry(&tid->buf_q, struct ath_buf, list); |
227 | list_move_tail(&bf->list, &bf_head); | 235 | list_move_tail(&bf->list, &bf_head); |
228 | 236 | ||
229 | if (bf_isretried(bf)) | 237 | fi = get_frame_info(bf->bf_mpdu); |
230 | ath_tx_update_baw(sc, tid, bf->bf_seqno); | 238 | if (fi->retries) |
239 | ath_tx_update_baw(sc, tid, fi->seqno); | ||
231 | 240 | ||
232 | spin_unlock(&txq->axq_lock); | 241 | spin_unlock(&txq->axq_lock); |
233 | ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0, 0); | 242 | ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0, 0); |
@@ -239,16 +248,15 @@ static void ath_tid_drain(struct ath_softc *sc, struct ath_txq *txq, | |||
239 | } | 248 | } |
240 | 249 | ||
241 | static void ath_tx_set_retry(struct ath_softc *sc, struct ath_txq *txq, | 250 | static void ath_tx_set_retry(struct ath_softc *sc, struct ath_txq *txq, |
242 | struct ath_buf *bf) | 251 | struct sk_buff *skb) |
243 | { | 252 | { |
244 | struct sk_buff *skb; | 253 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); |
245 | struct ieee80211_hdr *hdr; | 254 | struct ieee80211_hdr *hdr; |
246 | 255 | ||
247 | bf->bf_state.bf_type |= BUF_RETRY; | ||
248 | bf->bf_retries++; | ||
249 | TX_STAT_INC(txq->axq_qnum, a_retries); | 256 | TX_STAT_INC(txq->axq_qnum, a_retries); |
257 | if (tx_info->control.rates[4].count++ > 0) | ||
258 | return; | ||
250 | 259 | ||
251 | skb = bf->bf_mpdu; | ||
252 | hdr = (struct ieee80211_hdr *)skb->data; | 260 | hdr = (struct ieee80211_hdr *)skb->data; |
253 | hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_RETRY); | 261 | hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_RETRY); |
254 | } | 262 | } |
@@ -298,9 +306,41 @@ static struct ath_buf* ath_clone_txbuf(struct ath_softc *sc, struct ath_buf *bf) | |||
298 | return tbf; | 306 | return tbf; |
299 | } | 307 | } |
300 | 308 | ||
309 | static void ath_tx_count_frames(struct ath_softc *sc, struct ath_buf *bf, | ||
310 | struct ath_tx_status *ts, int txok, | ||
311 | int *nframes, int *nbad) | ||
312 | { | ||
313 | struct ath_frame_info *fi; | ||
314 | u16 seq_st = 0; | ||
315 | u32 ba[WME_BA_BMP_SIZE >> 5]; | ||
316 | int ba_index; | ||
317 | int isaggr = 0; | ||
318 | |||
319 | *nbad = 0; | ||
320 | *nframes = 0; | ||
321 | |||
322 | isaggr = bf_isaggr(bf); | ||
323 | if (isaggr) { | ||
324 | seq_st = ts->ts_seqnum; | ||
325 | memcpy(ba, &ts->ba_low, WME_BA_BMP_SIZE >> 3); | ||
326 | } | ||
327 | |||
328 | while (bf) { | ||
329 | fi = get_frame_info(bf->bf_mpdu); | ||
330 | ba_index = ATH_BA_INDEX(seq_st, fi->seqno); | ||
331 | |||
332 | (*nframes)++; | ||
333 | if (!txok || (isaggr && !ATH_BA_ISSET(ba, ba_index))) | ||
334 | (*nbad)++; | ||
335 | |||
336 | bf = bf->bf_next; | ||
337 | } | ||
338 | } | ||
339 | |||
340 | |||
301 | static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq, | 341 | static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq, |
302 | struct ath_buf *bf, struct list_head *bf_q, | 342 | struct ath_buf *bf, struct list_head *bf_q, |
303 | struct ath_tx_status *ts, int txok) | 343 | struct ath_tx_status *ts, int txok, bool retry) |
304 | { | 344 | { |
305 | struct ath_node *an = NULL; | 345 | struct ath_node *an = NULL; |
306 | struct sk_buff *skb; | 346 | struct sk_buff *skb; |
@@ -316,7 +356,9 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq, | |||
316 | int isaggr, txfail, txpending, sendbar = 0, needreset = 0, nbad = 0; | 356 | int isaggr, txfail, txpending, sendbar = 0, needreset = 0, nbad = 0; |
317 | bool rc_update = true; | 357 | bool rc_update = true; |
318 | struct ieee80211_tx_rate rates[4]; | 358 | struct ieee80211_tx_rate rates[4]; |
359 | struct ath_frame_info *fi; | ||
319 | int nframes; | 360 | int nframes; |
361 | u8 tidno; | ||
320 | 362 | ||
321 | skb = bf->bf_mpdu; | 363 | skb = bf->bf_mpdu; |
322 | hdr = (struct ieee80211_hdr *)skb->data; | 364 | hdr = (struct ieee80211_hdr *)skb->data; |
@@ -325,7 +367,6 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq, | |||
325 | hw = bf->aphy->hw; | 367 | hw = bf->aphy->hw; |
326 | 368 | ||
327 | memcpy(rates, tx_info->control.rates, sizeof(rates)); | 369 | memcpy(rates, tx_info->control.rates, sizeof(rates)); |
328 | nframes = bf->bf_nframes; | ||
329 | 370 | ||
330 | rcu_read_lock(); | 371 | rcu_read_lock(); |
331 | 372 | ||
@@ -342,7 +383,7 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq, | |||
342 | !bf->bf_stale || bf_next != NULL) | 383 | !bf->bf_stale || bf_next != NULL) |
343 | list_move_tail(&bf->list, &bf_head); | 384 | list_move_tail(&bf->list, &bf_head); |
344 | 385 | ||
345 | ath_tx_rc_status(bf, ts, 1, 0, false); | 386 | ath_tx_rc_status(bf, ts, 1, 1, 0, false); |
346 | ath_tx_complete_buf(sc, bf, txq, &bf_head, ts, | 387 | ath_tx_complete_buf(sc, bf, txq, &bf_head, ts, |
347 | 0, 0); | 388 | 0, 0); |
348 | 389 | ||
@@ -352,14 +393,15 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq, | |||
352 | } | 393 | } |
353 | 394 | ||
354 | an = (struct ath_node *)sta->drv_priv; | 395 | an = (struct ath_node *)sta->drv_priv; |
355 | tid = ATH_AN_2_TID(an, bf->bf_tidno); | 396 | tidno = ieee80211_get_qos_ctl(hdr)[0] & IEEE80211_QOS_CTL_TID_MASK; |
397 | tid = ATH_AN_2_TID(an, tidno); | ||
356 | 398 | ||
357 | /* | 399 | /* |
358 | * The hardware occasionally sends a tx status for the wrong TID. | 400 | * The hardware occasionally sends a tx status for the wrong TID. |
359 | * In this case, the BA status cannot be considered valid and all | 401 | * In this case, the BA status cannot be considered valid and all |
360 | * subframes need to be retransmitted | 402 | * subframes need to be retransmitted |
361 | */ | 403 | */ |
362 | if (bf->bf_tidno != ts->tid) | 404 | if (tidno != ts->tid) |
363 | txok = false; | 405 | txok = false; |
364 | 406 | ||
365 | isaggr = bf_isaggr(bf); | 407 | isaggr = bf_isaggr(bf); |
@@ -385,15 +427,16 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq, | |||
385 | INIT_LIST_HEAD(&bf_pending); | 427 | INIT_LIST_HEAD(&bf_pending); |
386 | INIT_LIST_HEAD(&bf_head); | 428 | INIT_LIST_HEAD(&bf_head); |
387 | 429 | ||
388 | nbad = ath_tx_num_badfrms(sc, bf, ts, txok); | 430 | ath_tx_count_frames(sc, bf, ts, txok, &nframes, &nbad); |
389 | while (bf) { | 431 | while (bf) { |
390 | txfail = txpending = 0; | 432 | txfail = txpending = 0; |
391 | bf_next = bf->bf_next; | 433 | bf_next = bf->bf_next; |
392 | 434 | ||
393 | skb = bf->bf_mpdu; | 435 | skb = bf->bf_mpdu; |
394 | tx_info = IEEE80211_SKB_CB(skb); | 436 | tx_info = IEEE80211_SKB_CB(skb); |
437 | fi = get_frame_info(skb); | ||
395 | 438 | ||
396 | if (ATH_BA_ISSET(ba, ATH_BA_INDEX(seq_st, bf->bf_seqno))) { | 439 | if (ATH_BA_ISSET(ba, ATH_BA_INDEX(seq_st, fi->seqno))) { |
397 | /* transmit completion, subframe is | 440 | /* transmit completion, subframe is |
398 | * acked by block ack */ | 441 | * acked by block ack */ |
399 | acked_cnt++; | 442 | acked_cnt++; |
@@ -401,10 +444,9 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq, | |||
401 | /* transmit completion */ | 444 | /* transmit completion */ |
402 | acked_cnt++; | 445 | acked_cnt++; |
403 | } else { | 446 | } else { |
404 | if (!(tid->state & AGGR_CLEANUP) && | 447 | if (!(tid->state & AGGR_CLEANUP) && retry) { |
405 | !bf_last->bf_tx_aborted) { | 448 | if (fi->retries < ATH_MAX_SW_RETRIES) { |
406 | if (bf->bf_retries < ATH_MAX_SW_RETRIES) { | 449 | ath_tx_set_retry(sc, txq, bf->bf_mpdu); |
407 | ath_tx_set_retry(sc, txq, bf); | ||
408 | txpending = 1; | 450 | txpending = 1; |
409 | } else { | 451 | } else { |
410 | bf->bf_state.bf_type |= BUF_XRETRY; | 452 | bf->bf_state.bf_type |= BUF_XRETRY; |
@@ -442,16 +484,15 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq, | |||
442 | * block-ack window | 484 | * block-ack window |
443 | */ | 485 | */ |
444 | spin_lock_bh(&txq->axq_lock); | 486 | spin_lock_bh(&txq->axq_lock); |
445 | ath_tx_update_baw(sc, tid, bf->bf_seqno); | 487 | ath_tx_update_baw(sc, tid, fi->seqno); |
446 | spin_unlock_bh(&txq->axq_lock); | 488 | spin_unlock_bh(&txq->axq_lock); |
447 | 489 | ||
448 | if (rc_update && (acked_cnt == 1 || txfail_cnt == 1)) { | 490 | if (rc_update && (acked_cnt == 1 || txfail_cnt == 1)) { |
449 | memcpy(tx_info->control.rates, rates, sizeof(rates)); | 491 | memcpy(tx_info->control.rates, rates, sizeof(rates)); |
450 | bf->bf_nframes = nframes; | 492 | ath_tx_rc_status(bf, ts, nframes, nbad, txok, true); |
451 | ath_tx_rc_status(bf, ts, nbad, txok, true); | ||
452 | rc_update = false; | 493 | rc_update = false; |
453 | } else { | 494 | } else { |
454 | ath_tx_rc_status(bf, ts, nbad, txok, false); | 495 | ath_tx_rc_status(bf, ts, nframes, nbad, txok, false); |
455 | } | 496 | } |
456 | 497 | ||
457 | ath_tx_complete_buf(sc, bf, txq, &bf_head, ts, | 498 | ath_tx_complete_buf(sc, bf, txq, &bf_head, ts, |
@@ -470,14 +511,13 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq, | |||
470 | */ | 511 | */ |
471 | if (!tbf) { | 512 | if (!tbf) { |
472 | spin_lock_bh(&txq->axq_lock); | 513 | spin_lock_bh(&txq->axq_lock); |
473 | ath_tx_update_baw(sc, tid, | 514 | ath_tx_update_baw(sc, tid, fi->seqno); |
474 | bf->bf_seqno); | ||
475 | spin_unlock_bh(&txq->axq_lock); | 515 | spin_unlock_bh(&txq->axq_lock); |
476 | 516 | ||
477 | bf->bf_state.bf_type |= | 517 | bf->bf_state.bf_type |= |
478 | BUF_XRETRY; | 518 | BUF_XRETRY; |
479 | ath_tx_rc_status(bf, ts, nbad, | 519 | ath_tx_rc_status(bf, ts, nframes, |
480 | 0, false); | 520 | nbad, 0, false); |
481 | ath_tx_complete_buf(sc, bf, txq, | 521 | ath_tx_complete_buf(sc, bf, txq, |
482 | &bf_head, | 522 | &bf_head, |
483 | ts, 0, 0); | 523 | ts, 0, 0); |
@@ -611,6 +651,7 @@ static int ath_compute_num_delims(struct ath_softc *sc, struct ath_atx_tid *tid, | |||
611 | u16 minlen; | 651 | u16 minlen; |
612 | u8 flags, rix; | 652 | u8 flags, rix; |
613 | int width, streams, half_gi, ndelim, mindelim; | 653 | int width, streams, half_gi, ndelim, mindelim; |
654 | struct ath_frame_info *fi = get_frame_info(bf->bf_mpdu); | ||
614 | 655 | ||
615 | /* Select standard number of delimiters based on frame length alone */ | 656 | /* Select standard number of delimiters based on frame length alone */ |
616 | ndelim = ATH_AGGR_GET_NDELIM(frmlen); | 657 | ndelim = ATH_AGGR_GET_NDELIM(frmlen); |
@@ -621,7 +662,7 @@ static int ath_compute_num_delims(struct ath_softc *sc, struct ath_atx_tid *tid, | |||
621 | * TODO - this could be improved to be dependent on the rate. | 662 | * TODO - this could be improved to be dependent on the rate. |
622 | * The hardware can keep up at lower rates, but not higher rates | 663 | * The hardware can keep up at lower rates, but not higher rates |
623 | */ | 664 | */ |
624 | if (bf->bf_keytype != ATH9K_KEY_TYPE_CLEAR) | 665 | if (fi->keyix != ATH9K_TXKEYIX_INVALID) |
625 | ndelim += ATH_AGGR_ENCRYPTDELIM; | 666 | ndelim += ATH_AGGR_ENCRYPTDELIM; |
626 | 667 | ||
627 | /* | 668 | /* |
@@ -665,7 +706,8 @@ static int ath_compute_num_delims(struct ath_softc *sc, struct ath_atx_tid *tid, | |||
665 | static enum ATH_AGGR_STATUS ath_tx_form_aggr(struct ath_softc *sc, | 706 | static enum ATH_AGGR_STATUS ath_tx_form_aggr(struct ath_softc *sc, |
666 | struct ath_txq *txq, | 707 | struct ath_txq *txq, |
667 | struct ath_atx_tid *tid, | 708 | struct ath_atx_tid *tid, |
668 | struct list_head *bf_q) | 709 | struct list_head *bf_q, |
710 | int *aggr_len) | ||
669 | { | 711 | { |
670 | #define PADBYTES(_len) ((4 - ((_len) % 4)) % 4) | 712 | #define PADBYTES(_len) ((4 - ((_len) % 4)) % 4) |
671 | struct ath_buf *bf, *bf_first, *bf_prev = NULL; | 713 | struct ath_buf *bf, *bf_first, *bf_prev = NULL; |
@@ -674,14 +716,16 @@ static enum ATH_AGGR_STATUS ath_tx_form_aggr(struct ath_softc *sc, | |||
674 | al_delta, h_baw = tid->baw_size / 2; | 716 | al_delta, h_baw = tid->baw_size / 2; |
675 | enum ATH_AGGR_STATUS status = ATH_AGGR_DONE; | 717 | enum ATH_AGGR_STATUS status = ATH_AGGR_DONE; |
676 | struct ieee80211_tx_info *tx_info; | 718 | struct ieee80211_tx_info *tx_info; |
719 | struct ath_frame_info *fi; | ||
677 | 720 | ||
678 | bf_first = list_first_entry(&tid->buf_q, struct ath_buf, list); | 721 | bf_first = list_first_entry(&tid->buf_q, struct ath_buf, list); |
679 | 722 | ||
680 | do { | 723 | do { |
681 | bf = list_first_entry(&tid->buf_q, struct ath_buf, list); | 724 | bf = list_first_entry(&tid->buf_q, struct ath_buf, list); |
725 | fi = get_frame_info(bf->bf_mpdu); | ||
682 | 726 | ||
683 | /* do not step over block-ack window */ | 727 | /* do not step over block-ack window */ |
684 | if (!BAW_WITHIN(tid->seq_start, tid->baw_size, bf->bf_seqno)) { | 728 | if (!BAW_WITHIN(tid->seq_start, tid->baw_size, fi->seqno)) { |
685 | status = ATH_AGGR_BAW_CLOSED; | 729 | status = ATH_AGGR_BAW_CLOSED; |
686 | break; | 730 | break; |
687 | } | 731 | } |
@@ -692,7 +736,7 @@ static enum ATH_AGGR_STATUS ath_tx_form_aggr(struct ath_softc *sc, | |||
692 | } | 736 | } |
693 | 737 | ||
694 | /* do not exceed aggregation limit */ | 738 | /* do not exceed aggregation limit */ |
695 | al_delta = ATH_AGGR_DELIM_SZ + bf->bf_frmlen; | 739 | al_delta = ATH_AGGR_DELIM_SZ + fi->framelen; |
696 | 740 | ||
697 | if (nframes && | 741 | if (nframes && |
698 | (aggr_limit < (al + bpad + al_delta + prev_al))) { | 742 | (aggr_limit < (al + bpad + al_delta + prev_al))) { |
@@ -719,14 +763,15 @@ static enum ATH_AGGR_STATUS ath_tx_form_aggr(struct ath_softc *sc, | |||
719 | * Get the delimiters needed to meet the MPDU | 763 | * Get the delimiters needed to meet the MPDU |
720 | * density for this node. | 764 | * density for this node. |
721 | */ | 765 | */ |
722 | ndelim = ath_compute_num_delims(sc, tid, bf_first, bf->bf_frmlen); | 766 | ndelim = ath_compute_num_delims(sc, tid, bf_first, fi->framelen); |
723 | bpad = PADBYTES(al_delta) + (ndelim << 2); | 767 | bpad = PADBYTES(al_delta) + (ndelim << 2); |
724 | 768 | ||
725 | bf->bf_next = NULL; | 769 | bf->bf_next = NULL; |
726 | ath9k_hw_set_desc_link(sc->sc_ah, bf->bf_desc, 0); | 770 | ath9k_hw_set_desc_link(sc->sc_ah, bf->bf_desc, 0); |
727 | 771 | ||
728 | /* link buffers of this frame to the aggregate */ | 772 | /* link buffers of this frame to the aggregate */ |
729 | ath_tx_addto_baw(sc, tid, bf); | 773 | if (!fi->retries) |
774 | ath_tx_addto_baw(sc, tid, fi->seqno); | ||
730 | ath9k_hw_set11n_aggr_middle(sc->sc_ah, bf->bf_desc, ndelim); | 775 | ath9k_hw_set11n_aggr_middle(sc->sc_ah, bf->bf_desc, ndelim); |
731 | list_move_tail(&bf->list, bf_q); | 776 | list_move_tail(&bf->list, bf_q); |
732 | if (bf_prev) { | 777 | if (bf_prev) { |
@@ -738,8 +783,7 @@ static enum ATH_AGGR_STATUS ath_tx_form_aggr(struct ath_softc *sc, | |||
738 | 783 | ||
739 | } while (!list_empty(&tid->buf_q)); | 784 | } while (!list_empty(&tid->buf_q)); |
740 | 785 | ||
741 | bf_first->bf_al = al; | 786 | *aggr_len = al; |
742 | bf_first->bf_nframes = nframes; | ||
743 | 787 | ||
744 | return status; | 788 | return status; |
745 | #undef PADBYTES | 789 | #undef PADBYTES |
@@ -750,7 +794,9 @@ static void ath_tx_sched_aggr(struct ath_softc *sc, struct ath_txq *txq, | |||
750 | { | 794 | { |
751 | struct ath_buf *bf; | 795 | struct ath_buf *bf; |
752 | enum ATH_AGGR_STATUS status; | 796 | enum ATH_AGGR_STATUS status; |
797 | struct ath_frame_info *fi; | ||
753 | struct list_head bf_q; | 798 | struct list_head bf_q; |
799 | int aggr_len; | ||
754 | 800 | ||
755 | do { | 801 | do { |
756 | if (list_empty(&tid->buf_q)) | 802 | if (list_empty(&tid->buf_q)) |
@@ -758,7 +804,7 @@ static void ath_tx_sched_aggr(struct ath_softc *sc, struct ath_txq *txq, | |||
758 | 804 | ||
759 | INIT_LIST_HEAD(&bf_q); | 805 | INIT_LIST_HEAD(&bf_q); |
760 | 806 | ||
761 | status = ath_tx_form_aggr(sc, txq, tid, &bf_q); | 807 | status = ath_tx_form_aggr(sc, txq, tid, &bf_q, &aggr_len); |
762 | 808 | ||
763 | /* | 809 | /* |
764 | * no frames picked up to be aggregated; | 810 | * no frames picked up to be aggregated; |
@@ -771,18 +817,20 @@ static void ath_tx_sched_aggr(struct ath_softc *sc, struct ath_txq *txq, | |||
771 | bf->bf_lastbf = list_entry(bf_q.prev, struct ath_buf, list); | 817 | bf->bf_lastbf = list_entry(bf_q.prev, struct ath_buf, list); |
772 | 818 | ||
773 | /* if only one frame, send as non-aggregate */ | 819 | /* if only one frame, send as non-aggregate */ |
774 | if (bf->bf_nframes == 1) { | 820 | if (bf == bf->bf_lastbf) { |
821 | fi = get_frame_info(bf->bf_mpdu); | ||
822 | |||
775 | bf->bf_state.bf_type &= ~BUF_AGGR; | 823 | bf->bf_state.bf_type &= ~BUF_AGGR; |
776 | ath9k_hw_clr11n_aggr(sc->sc_ah, bf->bf_desc); | 824 | ath9k_hw_clr11n_aggr(sc->sc_ah, bf->bf_desc); |
777 | ath_buf_set_rate(sc, bf); | 825 | ath_buf_set_rate(sc, bf, fi->framelen); |
778 | ath_tx_txqaddbuf(sc, txq, &bf_q); | 826 | ath_tx_txqaddbuf(sc, txq, &bf_q); |
779 | continue; | 827 | continue; |
780 | } | 828 | } |
781 | 829 | ||
782 | /* setup first desc of aggregate */ | 830 | /* setup first desc of aggregate */ |
783 | bf->bf_state.bf_type |= BUF_AGGR; | 831 | bf->bf_state.bf_type |= BUF_AGGR; |
784 | ath_buf_set_rate(sc, bf); | 832 | ath_buf_set_rate(sc, bf, aggr_len); |
785 | ath9k_hw_set11n_aggr_first(sc->sc_ah, bf->bf_desc, bf->bf_al); | 833 | ath9k_hw_set11n_aggr_first(sc->sc_ah, bf->bf_desc, aggr_len); |
786 | 834 | ||
787 | /* anchor last desc of aggregate */ | 835 | /* anchor last desc of aggregate */ |
788 | ath9k_hw_set11n_aggr_last(sc->sc_ah, bf->bf_lastbf->bf_desc); | 836 | ath9k_hw_set11n_aggr_last(sc->sc_ah, bf->bf_lastbf->bf_desc); |
@@ -1067,8 +1115,6 @@ void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq, bool retry_tx) | |||
1067 | } | 1115 | } |
1068 | 1116 | ||
1069 | lastbf = bf->bf_lastbf; | 1117 | lastbf = bf->bf_lastbf; |
1070 | if (!retry_tx) | ||
1071 | lastbf->bf_tx_aborted = true; | ||
1072 | 1118 | ||
1073 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { | 1119 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { |
1074 | list_cut_position(&bf_head, | 1120 | list_cut_position(&bf_head, |
@@ -1085,7 +1131,8 @@ void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq, bool retry_tx) | |||
1085 | spin_unlock_bh(&txq->axq_lock); | 1131 | spin_unlock_bh(&txq->axq_lock); |
1086 | 1132 | ||
1087 | if (bf_isampdu(bf)) | 1133 | if (bf_isampdu(bf)) |
1088 | ath_tx_complete_aggr(sc, txq, bf, &bf_head, &ts, 0); | 1134 | ath_tx_complete_aggr(sc, txq, bf, &bf_head, &ts, 0, |
1135 | retry_tx); | ||
1089 | else | 1136 | else |
1090 | ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0, 0); | 1137 | ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0, 0); |
1091 | } | 1138 | } |
@@ -1106,7 +1153,7 @@ void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq, bool retry_tx) | |||
1106 | 1153 | ||
1107 | if (bf_isampdu(bf)) | 1154 | if (bf_isampdu(bf)) |
1108 | ath_tx_complete_aggr(sc, txq, bf, &bf_head, | 1155 | ath_tx_complete_aggr(sc, txq, bf, &bf_head, |
1109 | &ts, 0); | 1156 | &ts, 0, retry_tx); |
1110 | else | 1157 | else |
1111 | ath_tx_complete_buf(sc, bf, txq, &bf_head, | 1158 | ath_tx_complete_buf(sc, bf, txq, &bf_head, |
1112 | &ts, 0, 0); | 1159 | &ts, 0, 0); |
@@ -1284,12 +1331,11 @@ static void ath_tx_txqaddbuf(struct ath_softc *sc, struct ath_txq *txq, | |||
1284 | } | 1331 | } |
1285 | 1332 | ||
1286 | static void ath_tx_send_ampdu(struct ath_softc *sc, struct ath_atx_tid *tid, | 1333 | static void ath_tx_send_ampdu(struct ath_softc *sc, struct ath_atx_tid *tid, |
1287 | struct list_head *bf_head, | 1334 | struct ath_buf *bf, struct ath_tx_control *txctl) |
1288 | struct ath_tx_control *txctl) | ||
1289 | { | 1335 | { |
1290 | struct ath_buf *bf; | 1336 | struct ath_frame_info *fi = get_frame_info(bf->bf_mpdu); |
1337 | struct list_head bf_head; | ||
1291 | 1338 | ||
1292 | bf = list_first_entry(bf_head, struct ath_buf, list); | ||
1293 | bf->bf_state.bf_type |= BUF_AMPDU; | 1339 | bf->bf_state.bf_type |= BUF_AMPDU; |
1294 | TX_STAT_INC(txctl->txq->axq_qnum, a_queued); | 1340 | TX_STAT_INC(txctl->txq->axq_qnum, a_queued); |
1295 | 1341 | ||
@@ -1301,56 +1347,47 @@ static void ath_tx_send_ampdu(struct ath_softc *sc, struct ath_atx_tid *tid, | |||
1301 | * - h/w queue depth exceeds low water mark | 1347 | * - h/w queue depth exceeds low water mark |
1302 | */ | 1348 | */ |
1303 | if (!list_empty(&tid->buf_q) || tid->paused || | 1349 | if (!list_empty(&tid->buf_q) || tid->paused || |
1304 | !BAW_WITHIN(tid->seq_start, tid->baw_size, bf->bf_seqno) || | 1350 | !BAW_WITHIN(tid->seq_start, tid->baw_size, fi->seqno) || |
1305 | txctl->txq->axq_depth >= ATH_AGGR_MIN_QDEPTH) { | 1351 | txctl->txq->axq_depth >= ATH_AGGR_MIN_QDEPTH) { |
1306 | /* | 1352 | /* |
1307 | * Add this frame to software queue for scheduling later | 1353 | * Add this frame to software queue for scheduling later |
1308 | * for aggregation. | 1354 | * for aggregation. |
1309 | */ | 1355 | */ |
1310 | list_move_tail(&bf->list, &tid->buf_q); | 1356 | list_add_tail(&bf->list, &tid->buf_q); |
1311 | ath_tx_queue_tid(txctl->txq, tid); | 1357 | ath_tx_queue_tid(txctl->txq, tid); |
1312 | return; | 1358 | return; |
1313 | } | 1359 | } |
1314 | 1360 | ||
1361 | INIT_LIST_HEAD(&bf_head); | ||
1362 | list_add(&bf->list, &bf_head); | ||
1363 | |||
1315 | /* Add sub-frame to BAW */ | 1364 | /* Add sub-frame to BAW */ |
1316 | ath_tx_addto_baw(sc, tid, bf); | 1365 | if (!fi->retries) |
1366 | ath_tx_addto_baw(sc, tid, fi->seqno); | ||
1317 | 1367 | ||
1318 | /* Queue to h/w without aggregation */ | 1368 | /* Queue to h/w without aggregation */ |
1319 | bf->bf_nframes = 1; | ||
1320 | bf->bf_lastbf = bf; | 1369 | bf->bf_lastbf = bf; |
1321 | ath_buf_set_rate(sc, bf); | 1370 | ath_buf_set_rate(sc, bf, fi->framelen); |
1322 | ath_tx_txqaddbuf(sc, txctl->txq, bf_head); | 1371 | ath_tx_txqaddbuf(sc, txctl->txq, &bf_head); |
1323 | } | 1372 | } |
1324 | 1373 | ||
1325 | static void ath_tx_send_ht_normal(struct ath_softc *sc, struct ath_txq *txq, | 1374 | static void ath_tx_send_normal(struct ath_softc *sc, struct ath_txq *txq, |
1326 | struct ath_atx_tid *tid, | 1375 | struct ath_atx_tid *tid, |
1327 | struct list_head *bf_head) | 1376 | struct list_head *bf_head) |
1328 | { | 1377 | { |
1378 | struct ath_frame_info *fi; | ||
1329 | struct ath_buf *bf; | 1379 | struct ath_buf *bf; |
1330 | 1380 | ||
1331 | bf = list_first_entry(bf_head, struct ath_buf, list); | 1381 | bf = list_first_entry(bf_head, struct ath_buf, list); |
1332 | bf->bf_state.bf_type &= ~BUF_AMPDU; | 1382 | bf->bf_state.bf_type &= ~BUF_AMPDU; |
1333 | 1383 | ||
1334 | /* update starting sequence number for subsequent ADDBA request */ | 1384 | /* update starting sequence number for subsequent ADDBA request */ |
1335 | INCR(tid->seq_start, IEEE80211_SEQ_MAX); | 1385 | if (tid) |
1336 | 1386 | INCR(tid->seq_start, IEEE80211_SEQ_MAX); | |
1337 | bf->bf_nframes = 1; | ||
1338 | bf->bf_lastbf = bf; | ||
1339 | ath_buf_set_rate(sc, bf); | ||
1340 | ath_tx_txqaddbuf(sc, txq, bf_head); | ||
1341 | TX_STAT_INC(txq->axq_qnum, queued); | ||
1342 | } | ||
1343 | |||
1344 | static void ath_tx_send_normal(struct ath_softc *sc, struct ath_txq *txq, | ||
1345 | struct list_head *bf_head) | ||
1346 | { | ||
1347 | struct ath_buf *bf; | ||
1348 | |||
1349 | bf = list_first_entry(bf_head, struct ath_buf, list); | ||
1350 | 1387 | ||
1351 | bf->bf_lastbf = bf; | 1388 | bf->bf_lastbf = bf; |
1352 | bf->bf_nframes = 1; | 1389 | fi = get_frame_info(bf->bf_mpdu); |
1353 | ath_buf_set_rate(sc, bf); | 1390 | ath_buf_set_rate(sc, bf, fi->framelen); |
1354 | ath_tx_txqaddbuf(sc, txq, bf_head); | 1391 | ath_tx_txqaddbuf(sc, txq, bf_head); |
1355 | TX_STAT_INC(txq->axq_qnum, queued); | 1392 | TX_STAT_INC(txq->axq_qnum, queued); |
1356 | } | 1393 | } |
@@ -1378,40 +1415,52 @@ static enum ath9k_pkt_type get_hw_packet_type(struct sk_buff *skb) | |||
1378 | return htype; | 1415 | return htype; |
1379 | } | 1416 | } |
1380 | 1417 | ||
1381 | static void assign_aggr_tid_seqno(struct sk_buff *skb, | 1418 | static void setup_frame_info(struct ieee80211_hw *hw, struct sk_buff *skb, |
1382 | struct ath_buf *bf) | 1419 | int framelen) |
1383 | { | 1420 | { |
1421 | struct ath_wiphy *aphy = hw->priv; | ||
1422 | struct ath_softc *sc = aphy->sc; | ||
1384 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); | 1423 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); |
1424 | struct ieee80211_sta *sta = tx_info->control.sta; | ||
1425 | struct ieee80211_key_conf *hw_key = tx_info->control.hw_key; | ||
1385 | struct ieee80211_hdr *hdr; | 1426 | struct ieee80211_hdr *hdr; |
1427 | struct ath_frame_info *fi = get_frame_info(skb); | ||
1386 | struct ath_node *an; | 1428 | struct ath_node *an; |
1387 | struct ath_atx_tid *tid; | 1429 | struct ath_atx_tid *tid; |
1388 | __le16 fc; | 1430 | enum ath9k_key_type keytype; |
1389 | u8 *qc; | 1431 | u16 seqno = 0; |
1432 | u8 tidno; | ||
1390 | 1433 | ||
1391 | if (!tx_info->control.sta) | 1434 | keytype = ath9k_cmn_get_hw_crypto_keytype(skb); |
1392 | return; | ||
1393 | 1435 | ||
1394 | an = (struct ath_node *)tx_info->control.sta->drv_priv; | ||
1395 | hdr = (struct ieee80211_hdr *)skb->data; | 1436 | hdr = (struct ieee80211_hdr *)skb->data; |
1396 | fc = hdr->frame_control; | 1437 | if (sta && ieee80211_is_data_qos(hdr->frame_control) && |
1438 | conf_is_ht(&hw->conf) && (sc->sc_flags & SC_OP_TXAGGR)) { | ||
1397 | 1439 | ||
1398 | if (ieee80211_is_data_qos(fc)) { | 1440 | an = (struct ath_node *) sta->drv_priv; |
1399 | qc = ieee80211_get_qos_ctl(hdr); | 1441 | tidno = ieee80211_get_qos_ctl(hdr)[0] & IEEE80211_QOS_CTL_TID_MASK; |
1400 | bf->bf_tidno = qc[0] & 0xf; | 1442 | |
1443 | /* | ||
1444 | * Override seqno set by upper layer with the one | ||
1445 | * in tx aggregation state. | ||
1446 | */ | ||
1447 | tid = ATH_AN_2_TID(an, tidno); | ||
1448 | seqno = tid->seq_next; | ||
1449 | hdr->seq_ctrl = cpu_to_le16(seqno << IEEE80211_SEQ_SEQ_SHIFT); | ||
1450 | INCR(tid->seq_next, IEEE80211_SEQ_MAX); | ||
1401 | } | 1451 | } |
1402 | 1452 | ||
1403 | /* | 1453 | memset(fi, 0, sizeof(*fi)); |
1404 | * For HT capable stations, we save tidno for later use. | 1454 | if (hw_key) |
1405 | * We also override seqno set by upper layer with the one | 1455 | fi->keyix = hw_key->hw_key_idx; |
1406 | * in tx aggregation state. | 1456 | else |
1407 | */ | 1457 | fi->keyix = ATH9K_TXKEYIX_INVALID; |
1408 | tid = ATH_AN_2_TID(an, bf->bf_tidno); | 1458 | fi->keytype = keytype; |
1409 | hdr->seq_ctrl = cpu_to_le16(tid->seq_next << IEEE80211_SEQ_SEQ_SHIFT); | 1459 | fi->framelen = framelen; |
1410 | bf->bf_seqno = tid->seq_next; | 1460 | fi->seqno = seqno; |
1411 | INCR(tid->seq_next, IEEE80211_SEQ_MAX); | ||
1412 | } | 1461 | } |
1413 | 1462 | ||
1414 | static int setup_tx_flags(struct sk_buff *skb, bool use_ldpc) | 1463 | static int setup_tx_flags(struct sk_buff *skb) |
1415 | { | 1464 | { |
1416 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); | 1465 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); |
1417 | int flags = 0; | 1466 | int flags = 0; |
@@ -1422,7 +1471,7 @@ static int setup_tx_flags(struct sk_buff *skb, bool use_ldpc) | |||
1422 | if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK) | 1471 | if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK) |
1423 | flags |= ATH9K_TXDESC_NOACK; | 1472 | flags |= ATH9K_TXDESC_NOACK; |
1424 | 1473 | ||
1425 | if (use_ldpc) | 1474 | if (tx_info->flags & IEEE80211_TX_CTL_LDPC) |
1426 | flags |= ATH9K_TXDESC_LDPC; | 1475 | flags |= ATH9K_TXDESC_LDPC; |
1427 | 1476 | ||
1428 | return flags; | 1477 | return flags; |
@@ -1434,13 +1483,11 @@ static int setup_tx_flags(struct sk_buff *skb, bool use_ldpc) | |||
1434 | * width - 0 for 20 MHz, 1 for 40 MHz | 1483 | * width - 0 for 20 MHz, 1 for 40 MHz |
1435 | * half_gi - to use 4us v/s 3.6 us for symbol time | 1484 | * half_gi - to use 4us v/s 3.6 us for symbol time |
1436 | */ | 1485 | */ |
1437 | static u32 ath_pkt_duration(struct ath_softc *sc, u8 rix, struct ath_buf *bf, | 1486 | static u32 ath_pkt_duration(struct ath_softc *sc, u8 rix, int pktlen, |
1438 | int width, int half_gi, bool shortPreamble) | 1487 | int width, int half_gi, bool shortPreamble) |
1439 | { | 1488 | { |
1440 | u32 nbits, nsymbits, duration, nsymbols; | 1489 | u32 nbits, nsymbits, duration, nsymbols; |
1441 | int streams, pktlen; | 1490 | int streams; |
1442 | |||
1443 | pktlen = bf_isaggr(bf) ? bf->bf_al : bf->bf_frmlen; | ||
1444 | 1491 | ||
1445 | /* find number of symbols: PLCP + data */ | 1492 | /* find number of symbols: PLCP + data */ |
1446 | streams = HT_RC_2_STREAMS(rix); | 1493 | streams = HT_RC_2_STREAMS(rix); |
@@ -1459,7 +1506,7 @@ static u32 ath_pkt_duration(struct ath_softc *sc, u8 rix, struct ath_buf *bf, | |||
1459 | return duration; | 1506 | return duration; |
1460 | } | 1507 | } |
1461 | 1508 | ||
1462 | static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf) | 1509 | static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf, int len) |
1463 | { | 1510 | { |
1464 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); | 1511 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); |
1465 | struct ath9k_11n_rate_series series[4]; | 1512 | struct ath9k_11n_rate_series series[4]; |
@@ -1522,7 +1569,7 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf) | |||
1522 | if (rates[i].flags & IEEE80211_TX_RC_MCS) { | 1569 | if (rates[i].flags & IEEE80211_TX_RC_MCS) { |
1523 | /* MCS rates */ | 1570 | /* MCS rates */ |
1524 | series[i].Rate = rix | 0x80; | 1571 | series[i].Rate = rix | 0x80; |
1525 | series[i].PktDuration = ath_pkt_duration(sc, rix, bf, | 1572 | series[i].PktDuration = ath_pkt_duration(sc, rix, len, |
1526 | is_40, is_sgi, is_sp); | 1573 | is_40, is_sgi, is_sp); |
1527 | if (rix < 8 && (tx_info->flags & IEEE80211_TX_CTL_STBC)) | 1574 | if (rix < 8 && (tx_info->flags & IEEE80211_TX_CTL_STBC)) |
1528 | series[i].RateFlags |= ATH9K_RATESERIES_STBC; | 1575 | series[i].RateFlags |= ATH9K_RATESERIES_STBC; |
@@ -1546,11 +1593,11 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf) | |||
1546 | } | 1593 | } |
1547 | 1594 | ||
1548 | series[i].PktDuration = ath9k_hw_computetxtime(sc->sc_ah, | 1595 | series[i].PktDuration = ath9k_hw_computetxtime(sc->sc_ah, |
1549 | phy, rate->bitrate * 100, bf->bf_frmlen, rix, is_sp); | 1596 | phy, rate->bitrate * 100, len, rix, is_sp); |
1550 | } | 1597 | } |
1551 | 1598 | ||
1552 | /* For AR5416 - RTS cannot be followed by a frame larger than 8K */ | 1599 | /* For AR5416 - RTS cannot be followed by a frame larger than 8K */ |
1553 | if (bf_isaggr(bf) && (bf->bf_al > sc->sc_ah->caps.rts_aggr_limit)) | 1600 | if (bf_isaggr(bf) && (len > sc->sc_ah->caps.rts_aggr_limit)) |
1554 | flags &= ~ATH9K_TXDESC_RTSENA; | 1601 | flags &= ~ATH9K_TXDESC_RTSENA; |
1555 | 1602 | ||
1556 | /* ATH9K_TXDESC_RTSENA and ATH9K_TXDESC_CTSENA are mutually exclusive. */ | 1603 | /* ATH9K_TXDESC_RTSENA and ATH9K_TXDESC_CTSENA are mutually exclusive. */ |
@@ -1567,67 +1614,29 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf) | |||
1567 | ath9k_hw_set11n_burstduration(sc->sc_ah, bf->bf_desc, 8192); | 1614 | ath9k_hw_set11n_burstduration(sc->sc_ah, bf->bf_desc, 8192); |
1568 | } | 1615 | } |
1569 | 1616 | ||
1570 | static int ath_tx_setup_buffer(struct ieee80211_hw *hw, struct ath_buf *bf, | 1617 | static struct ath_buf *ath_tx_setup_buffer(struct ieee80211_hw *hw, |
1571 | struct sk_buff *skb, | 1618 | struct ath_txq *txq, |
1572 | struct ath_tx_control *txctl) | 1619 | struct sk_buff *skb) |
1573 | { | 1620 | { |
1574 | struct ath_wiphy *aphy = hw->priv; | 1621 | struct ath_wiphy *aphy = hw->priv; |
1575 | struct ath_softc *sc = aphy->sc; | 1622 | struct ath_softc *sc = aphy->sc; |
1576 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); | 1623 | struct ath_hw *ah = sc->sc_ah; |
1577 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; | 1624 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); |
1578 | int hdrlen; | 1625 | struct ath_frame_info *fi = get_frame_info(skb); |
1579 | __le16 fc; | 1626 | struct ath_buf *bf; |
1580 | int padpos, padsize; | 1627 | struct ath_desc *ds; |
1581 | bool use_ldpc = false; | 1628 | int frm_type; |
1582 | 1629 | ||
1583 | tx_info->pad[0] = 0; | 1630 | bf = ath_tx_get_buffer(sc); |
1584 | switch (txctl->frame_type) { | 1631 | if (!bf) { |
1585 | case ATH9K_IFT_NOT_INTERNAL: | 1632 | ath_print(common, ATH_DBG_XMIT, "TX buffers are full\n"); |
1586 | break; | 1633 | return NULL; |
1587 | case ATH9K_IFT_PAUSE: | ||
1588 | tx_info->pad[0] |= ATH_TX_INFO_FRAME_TYPE_PAUSE; | ||
1589 | /* fall through */ | ||
1590 | case ATH9K_IFT_UNPAUSE: | ||
1591 | tx_info->pad[0] |= ATH_TX_INFO_FRAME_TYPE_INTERNAL; | ||
1592 | break; | ||
1593 | } | 1634 | } |
1594 | hdrlen = ieee80211_get_hdrlen_from_skb(skb); | ||
1595 | fc = hdr->frame_control; | ||
1596 | 1635 | ||
1597 | ATH_TXBUF_RESET(bf); | 1636 | ATH_TXBUF_RESET(bf); |
1598 | 1637 | ||
1599 | bf->aphy = aphy; | 1638 | bf->aphy = aphy; |
1600 | bf->bf_frmlen = skb->len + FCS_LEN; | 1639 | bf->bf_flags = setup_tx_flags(skb); |
1601 | /* Remove the padding size from bf_frmlen, if any */ | ||
1602 | padpos = ath9k_cmn_padpos(hdr->frame_control); | ||
1603 | padsize = padpos & 3; | ||
1604 | if (padsize && skb->len>padpos+padsize) { | ||
1605 | bf->bf_frmlen -= padsize; | ||
1606 | } | ||
1607 | |||
1608 | if (!txctl->paprd && conf_is_ht(&hw->conf)) { | ||
1609 | bf->bf_state.bf_type |= BUF_HT; | ||
1610 | if (tx_info->flags & IEEE80211_TX_CTL_LDPC) | ||
1611 | use_ldpc = true; | ||
1612 | } | ||
1613 | |||
1614 | bf->bf_state.bfs_paprd = txctl->paprd; | ||
1615 | if (txctl->paprd) | ||
1616 | bf->bf_state.bfs_paprd_timestamp = jiffies; | ||
1617 | bf->bf_flags = setup_tx_flags(skb, use_ldpc); | ||
1618 | |||
1619 | bf->bf_keytype = ath9k_cmn_get_hw_crypto_keytype(skb); | ||
1620 | if (bf->bf_keytype != ATH9K_KEY_TYPE_CLEAR) { | ||
1621 | bf->bf_frmlen += tx_info->control.hw_key->icv_len; | ||
1622 | bf->bf_keyix = tx_info->control.hw_key->hw_key_idx; | ||
1623 | } else { | ||
1624 | bf->bf_keyix = ATH9K_TXKEYIX_INVALID; | ||
1625 | } | ||
1626 | |||
1627 | if (ieee80211_is_data_qos(fc) && bf_isht(bf) && | ||
1628 | (sc->sc_flags & SC_OP_TXAGGR)) | ||
1629 | assign_aggr_tid_seqno(skb, bf); | ||
1630 | |||
1631 | bf->bf_mpdu = skb; | 1640 | bf->bf_mpdu = skb; |
1632 | 1641 | ||
1633 | bf->bf_buf_addr = dma_map_single(sc->dev, skb->data, | 1642 | bf->bf_buf_addr = dma_map_single(sc->dev, skb->data, |
@@ -1637,40 +1646,17 @@ static int ath_tx_setup_buffer(struct ieee80211_hw *hw, struct ath_buf *bf, | |||
1637 | bf->bf_buf_addr = 0; | 1646 | bf->bf_buf_addr = 0; |
1638 | ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL, | 1647 | ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL, |
1639 | "dma_mapping_error() on TX\n"); | 1648 | "dma_mapping_error() on TX\n"); |
1640 | return -ENOMEM; | 1649 | ath_tx_return_buffer(sc, bf); |
1650 | return NULL; | ||
1641 | } | 1651 | } |
1642 | 1652 | ||
1643 | bf->bf_tx_aborted = false; | ||
1644 | |||
1645 | return 0; | ||
1646 | } | ||
1647 | |||
1648 | /* FIXME: tx power */ | ||
1649 | static void ath_tx_start_dma(struct ath_softc *sc, struct ath_buf *bf, | ||
1650 | struct ath_tx_control *txctl) | ||
1651 | { | ||
1652 | struct sk_buff *skb = bf->bf_mpdu; | ||
1653 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); | ||
1654 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; | ||
1655 | struct ath_node *an = NULL; | ||
1656 | struct list_head bf_head; | ||
1657 | struct ath_desc *ds; | ||
1658 | struct ath_atx_tid *tid; | ||
1659 | struct ath_hw *ah = sc->sc_ah; | ||
1660 | int frm_type; | ||
1661 | __le16 fc; | ||
1662 | |||
1663 | frm_type = get_hw_packet_type(skb); | 1653 | frm_type = get_hw_packet_type(skb); |
1664 | fc = hdr->frame_control; | ||
1665 | |||
1666 | INIT_LIST_HEAD(&bf_head); | ||
1667 | list_add_tail(&bf->list, &bf_head); | ||
1668 | 1654 | ||
1669 | ds = bf->bf_desc; | 1655 | ds = bf->bf_desc; |
1670 | ath9k_hw_set_desc_link(ah, ds, 0); | 1656 | ath9k_hw_set_desc_link(ah, ds, 0); |
1671 | 1657 | ||
1672 | ath9k_hw_set11n_txdesc(ah, ds, bf->bf_frmlen, frm_type, MAX_RATE_POWER, | 1658 | ath9k_hw_set11n_txdesc(ah, ds, fi->framelen, frm_type, MAX_RATE_POWER, |
1673 | bf->bf_keyix, bf->bf_keytype, bf->bf_flags); | 1659 | fi->keyix, fi->keytype, bf->bf_flags); |
1674 | 1660 | ||
1675 | ath9k_hw_filltxdesc(ah, ds, | 1661 | ath9k_hw_filltxdesc(ah, ds, |
1676 | skb->len, /* segment length */ | 1662 | skb->len, /* segment length */ |
@@ -1678,43 +1664,50 @@ static void ath_tx_start_dma(struct ath_softc *sc, struct ath_buf *bf, | |||
1678 | true, /* last segment */ | 1664 | true, /* last segment */ |
1679 | ds, /* first descriptor */ | 1665 | ds, /* first descriptor */ |
1680 | bf->bf_buf_addr, | 1666 | bf->bf_buf_addr, |
1681 | txctl->txq->axq_qnum); | 1667 | txq->axq_qnum); |
1682 | 1668 | ||
1683 | if (bf->bf_state.bfs_paprd) | ||
1684 | ar9003_hw_set_paprd_txdesc(ah, ds, bf->bf_state.bfs_paprd); | ||
1685 | 1669 | ||
1686 | spin_lock_bh(&txctl->txq->axq_lock); | 1670 | return bf; |
1671 | } | ||
1687 | 1672 | ||
1688 | if (bf_isht(bf) && (sc->sc_flags & SC_OP_TXAGGR) && | 1673 | /* FIXME: tx power */ |
1689 | tx_info->control.sta) { | 1674 | static void ath_tx_start_dma(struct ath_softc *sc, struct ath_buf *bf, |
1690 | an = (struct ath_node *)tx_info->control.sta->drv_priv; | 1675 | struct ath_tx_control *txctl) |
1691 | tid = ATH_AN_2_TID(an, bf->bf_tidno); | 1676 | { |
1677 | struct sk_buff *skb = bf->bf_mpdu; | ||
1678 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); | ||
1679 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; | ||
1680 | struct list_head bf_head; | ||
1681 | struct ath_atx_tid *tid; | ||
1682 | u8 tidno; | ||
1692 | 1683 | ||
1693 | if (!ieee80211_is_data_qos(fc)) { | 1684 | spin_lock_bh(&txctl->txq->axq_lock); |
1694 | ath_tx_send_normal(sc, txctl->txq, &bf_head); | 1685 | |
1695 | goto tx_done; | 1686 | if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && txctl->an) { |
1696 | } | 1687 | tidno = ieee80211_get_qos_ctl(hdr)[0] & |
1688 | IEEE80211_QOS_CTL_TID_MASK; | ||
1689 | tid = ATH_AN_2_TID(txctl->an, tidno); | ||
1697 | 1690 | ||
1698 | WARN_ON(tid->ac->txq != txctl->txq); | 1691 | WARN_ON(tid->ac->txq != txctl->txq); |
1699 | if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) { | 1692 | /* |
1700 | /* | 1693 | * Try aggregation if it's a unicast data frame |
1701 | * Try aggregation if it's a unicast data frame | 1694 | * and the destination is HT capable. |
1702 | * and the destination is HT capable. | 1695 | */ |
1703 | */ | 1696 | ath_tx_send_ampdu(sc, tid, bf, txctl); |
1704 | ath_tx_send_ampdu(sc, tid, &bf_head, txctl); | ||
1705 | } else { | ||
1706 | /* | ||
1707 | * Send this frame as regular when ADDBA | ||
1708 | * exchange is neither complete nor pending. | ||
1709 | */ | ||
1710 | ath_tx_send_ht_normal(sc, txctl->txq, | ||
1711 | tid, &bf_head); | ||
1712 | } | ||
1713 | } else { | 1697 | } else { |
1714 | ath_tx_send_normal(sc, txctl->txq, &bf_head); | 1698 | INIT_LIST_HEAD(&bf_head); |
1699 | list_add_tail(&bf->list, &bf_head); | ||
1700 | |||
1701 | bf->bf_state.bfs_ftype = txctl->frame_type; | ||
1702 | bf->bf_state.bfs_paprd = txctl->paprd; | ||
1703 | |||
1704 | if (bf->bf_state.bfs_paprd) | ||
1705 | ar9003_hw_set_paprd_txdesc(sc->sc_ah, bf->bf_desc, | ||
1706 | bf->bf_state.bfs_paprd); | ||
1707 | |||
1708 | ath_tx_send_normal(sc, txctl->txq, NULL, &bf_head); | ||
1715 | } | 1709 | } |
1716 | 1710 | ||
1717 | tx_done: | ||
1718 | spin_unlock_bh(&txctl->txq->axq_lock); | 1711 | spin_unlock_bh(&txctl->txq->axq_lock); |
1719 | } | 1712 | } |
1720 | 1713 | ||
@@ -1722,65 +1715,20 @@ tx_done: | |||
1722 | int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb, | 1715 | int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb, |
1723 | struct ath_tx_control *txctl) | 1716 | struct ath_tx_control *txctl) |
1724 | { | 1717 | { |
1718 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data; | ||
1719 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); | ||
1720 | struct ieee80211_sta *sta = info->control.sta; | ||
1725 | struct ath_wiphy *aphy = hw->priv; | 1721 | struct ath_wiphy *aphy = hw->priv; |
1726 | struct ath_softc *sc = aphy->sc; | 1722 | struct ath_softc *sc = aphy->sc; |
1727 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); | ||
1728 | struct ath_txq *txq = txctl->txq; | 1723 | struct ath_txq *txq = txctl->txq; |
1729 | struct ath_buf *bf; | 1724 | struct ath_buf *bf; |
1730 | int q, r; | ||
1731 | |||
1732 | bf = ath_tx_get_buffer(sc); | ||
1733 | if (!bf) { | ||
1734 | ath_print(common, ATH_DBG_XMIT, "TX buffers are full\n"); | ||
1735 | return -1; | ||
1736 | } | ||
1737 | |||
1738 | q = skb_get_queue_mapping(skb); | ||
1739 | r = ath_tx_setup_buffer(hw, bf, skb, txctl); | ||
1740 | if (unlikely(r)) { | ||
1741 | ath_print(common, ATH_DBG_FATAL, "TX mem alloc failure\n"); | ||
1742 | |||
1743 | /* upon ath_tx_processq() this TX queue will be resumed, we | ||
1744 | * guarantee this will happen by knowing beforehand that | ||
1745 | * we will at least have to run TX completionon one buffer | ||
1746 | * on the queue */ | ||
1747 | spin_lock_bh(&txq->axq_lock); | ||
1748 | if (txq == sc->tx.txq_map[q] && !txq->stopped && | ||
1749 | txq->axq_depth > 1) { | ||
1750 | ath_mac80211_stop_queue(sc, q); | ||
1751 | txq->stopped = 1; | ||
1752 | } | ||
1753 | spin_unlock_bh(&txq->axq_lock); | ||
1754 | |||
1755 | ath_tx_return_buffer(sc, bf); | ||
1756 | |||
1757 | return r; | ||
1758 | } | ||
1759 | |||
1760 | spin_lock_bh(&txq->axq_lock); | ||
1761 | if (txq == sc->tx.txq_map[q] && | ||
1762 | ++txq->pending_frames > ATH_MAX_QDEPTH && !txq->stopped) { | ||
1763 | ath_mac80211_stop_queue(sc, q); | ||
1764 | txq->stopped = 1; | ||
1765 | } | ||
1766 | spin_unlock_bh(&txq->axq_lock); | ||
1767 | |||
1768 | ath_tx_start_dma(sc, bf, txctl); | ||
1769 | |||
1770 | return 0; | ||
1771 | } | ||
1772 | |||
1773 | void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb) | ||
1774 | { | ||
1775 | struct ath_wiphy *aphy = hw->priv; | ||
1776 | struct ath_softc *sc = aphy->sc; | ||
1777 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); | ||
1778 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data; | ||
1779 | int padpos, padsize; | 1725 | int padpos, padsize; |
1780 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); | 1726 | int frmlen = skb->len + FCS_LEN; |
1781 | struct ath_tx_control txctl; | 1727 | int q; |
1782 | 1728 | ||
1783 | memset(&txctl, 0, sizeof(struct ath_tx_control)); | 1729 | txctl->an = (struct ath_node *)sta->drv_priv; |
1730 | if (info->control.hw_key) | ||
1731 | frmlen += info->control.hw_key->icv_len; | ||
1784 | 1732 | ||
1785 | /* | 1733 | /* |
1786 | * As a temporary workaround, assign seq# here; this will likely need | 1734 | * As a temporary workaround, assign seq# here; this will likely need |
@@ -1797,30 +1745,37 @@ void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb) | |||
1797 | /* Add the padding after the header if this is not already done */ | 1745 | /* Add the padding after the header if this is not already done */ |
1798 | padpos = ath9k_cmn_padpos(hdr->frame_control); | 1746 | padpos = ath9k_cmn_padpos(hdr->frame_control); |
1799 | padsize = padpos & 3; | 1747 | padsize = padpos & 3; |
1800 | if (padsize && skb->len>padpos) { | 1748 | if (padsize && skb->len > padpos) { |
1801 | if (skb_headroom(skb) < padsize) { | 1749 | if (skb_headroom(skb) < padsize) |
1802 | ath_print(common, ATH_DBG_XMIT, | 1750 | return -ENOMEM; |
1803 | "TX CABQ padding failed\n"); | 1751 | |
1804 | dev_kfree_skb_any(skb); | ||
1805 | return; | ||
1806 | } | ||
1807 | skb_push(skb, padsize); | 1752 | skb_push(skb, padsize); |
1808 | memmove(skb->data, skb->data + padsize, padpos); | 1753 | memmove(skb->data, skb->data + padsize, padpos); |
1809 | } | 1754 | } |
1810 | 1755 | ||
1811 | txctl.txq = sc->beacon.cabq; | 1756 | setup_frame_info(hw, skb, frmlen); |
1812 | 1757 | ||
1813 | ath_print(common, ATH_DBG_XMIT, | 1758 | /* |
1814 | "transmitting CABQ packet, skb: %p\n", skb); | 1759 | * At this point, the vif, hw_key and sta pointers in the tx control |
1760 | * info are no longer valid (overwritten by the ath_frame_info data. | ||
1761 | */ | ||
1815 | 1762 | ||
1816 | if (ath_tx_start(hw, skb, &txctl) != 0) { | 1763 | bf = ath_tx_setup_buffer(hw, txctl->txq, skb); |
1817 | ath_print(common, ATH_DBG_XMIT, "CABQ TX failed\n"); | 1764 | if (unlikely(!bf)) |
1818 | goto exit; | 1765 | return -ENOMEM; |
1766 | |||
1767 | q = skb_get_queue_mapping(skb); | ||
1768 | spin_lock_bh(&txq->axq_lock); | ||
1769 | if (txq == sc->tx.txq_map[q] && | ||
1770 | ++txq->pending_frames > ATH_MAX_QDEPTH && !txq->stopped) { | ||
1771 | ath_mac80211_stop_queue(sc, q); | ||
1772 | txq->stopped = 1; | ||
1819 | } | 1773 | } |
1774 | spin_unlock_bh(&txq->axq_lock); | ||
1820 | 1775 | ||
1821 | return; | 1776 | ath_tx_start_dma(sc, bf, txctl); |
1822 | exit: | 1777 | |
1823 | dev_kfree_skb_any(skb); | 1778 | return 0; |
1824 | } | 1779 | } |
1825 | 1780 | ||
1826 | /*****************/ | 1781 | /*****************/ |
@@ -1828,7 +1783,7 @@ exit: | |||
1828 | /*****************/ | 1783 | /*****************/ |
1829 | 1784 | ||
1830 | static void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb, | 1785 | static void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb, |
1831 | struct ath_wiphy *aphy, int tx_flags, | 1786 | struct ath_wiphy *aphy, int tx_flags, int ftype, |
1832 | struct ath_txq *txq) | 1787 | struct ath_txq *txq) |
1833 | { | 1788 | { |
1834 | struct ieee80211_hw *hw = sc->hw; | 1789 | struct ieee80211_hw *hw = sc->hw; |
@@ -1872,8 +1827,8 @@ static void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb, | |||
1872 | PS_WAIT_FOR_TX_ACK)); | 1827 | PS_WAIT_FOR_TX_ACK)); |
1873 | } | 1828 | } |
1874 | 1829 | ||
1875 | if (unlikely(tx_info->pad[0] & ATH_TX_INFO_FRAME_TYPE_INTERNAL)) | 1830 | if (unlikely(ftype)) |
1876 | ath9k_tx_status(hw, skb); | 1831 | ath9k_tx_status(hw, skb, ftype); |
1877 | else { | 1832 | else { |
1878 | q = skb_get_queue_mapping(skb); | 1833 | q = skb_get_queue_mapping(skb); |
1879 | if (txq == sc->tx.txq_map[q]) { | 1834 | if (txq == sc->tx.txq_map[q]) { |
@@ -1909,15 +1864,14 @@ static void ath_tx_complete_buf(struct ath_softc *sc, struct ath_buf *bf, | |||
1909 | bf->bf_buf_addr = 0; | 1864 | bf->bf_buf_addr = 0; |
1910 | 1865 | ||
1911 | if (bf->bf_state.bfs_paprd) { | 1866 | if (bf->bf_state.bfs_paprd) { |
1912 | if (time_after(jiffies, | 1867 | if (!sc->paprd_pending) |
1913 | bf->bf_state.bfs_paprd_timestamp + | ||
1914 | msecs_to_jiffies(ATH_PAPRD_TIMEOUT))) | ||
1915 | dev_kfree_skb_any(skb); | 1868 | dev_kfree_skb_any(skb); |
1916 | else | 1869 | else |
1917 | complete(&sc->paprd_complete); | 1870 | complete(&sc->paprd_complete); |
1918 | } else { | 1871 | } else { |
1919 | ath_debug_stat_tx(sc, bf, ts); | 1872 | ath_debug_stat_tx(sc, bf, ts); |
1920 | ath_tx_complete(sc, skb, bf->aphy, tx_flags, txq); | 1873 | ath_tx_complete(sc, skb, bf->aphy, tx_flags, |
1874 | bf->bf_state.bfs_ftype, txq); | ||
1921 | } | 1875 | } |
1922 | /* At this point, skb (bf->bf_mpdu) is consumed...make sure we don't | 1876 | /* At this point, skb (bf->bf_mpdu) is consumed...make sure we don't |
1923 | * accidentally reference it later. | 1877 | * accidentally reference it later. |
@@ -1932,42 +1886,15 @@ static void ath_tx_complete_buf(struct ath_softc *sc, struct ath_buf *bf, | |||
1932 | spin_unlock_irqrestore(&sc->tx.txbuflock, flags); | 1886 | spin_unlock_irqrestore(&sc->tx.txbuflock, flags); |
1933 | } | 1887 | } |
1934 | 1888 | ||
1935 | static int ath_tx_num_badfrms(struct ath_softc *sc, struct ath_buf *bf, | ||
1936 | struct ath_tx_status *ts, int txok) | ||
1937 | { | ||
1938 | u16 seq_st = 0; | ||
1939 | u32 ba[WME_BA_BMP_SIZE >> 5]; | ||
1940 | int ba_index; | ||
1941 | int nbad = 0; | ||
1942 | int isaggr = 0; | ||
1943 | |||
1944 | if (bf->bf_lastbf->bf_tx_aborted) | ||
1945 | return 0; | ||
1946 | |||
1947 | isaggr = bf_isaggr(bf); | ||
1948 | if (isaggr) { | ||
1949 | seq_st = ts->ts_seqnum; | ||
1950 | memcpy(ba, &ts->ba_low, WME_BA_BMP_SIZE >> 3); | ||
1951 | } | ||
1952 | |||
1953 | while (bf) { | ||
1954 | ba_index = ATH_BA_INDEX(seq_st, bf->bf_seqno); | ||
1955 | if (!txok || (isaggr && !ATH_BA_ISSET(ba, ba_index))) | ||
1956 | nbad++; | ||
1957 | |||
1958 | bf = bf->bf_next; | ||
1959 | } | ||
1960 | |||
1961 | return nbad; | ||
1962 | } | ||
1963 | |||
1964 | static void ath_tx_rc_status(struct ath_buf *bf, struct ath_tx_status *ts, | 1889 | static void ath_tx_rc_status(struct ath_buf *bf, struct ath_tx_status *ts, |
1965 | int nbad, int txok, bool update_rc) | 1890 | int nframes, int nbad, int txok, bool update_rc) |
1966 | { | 1891 | { |
1967 | struct sk_buff *skb = bf->bf_mpdu; | 1892 | struct sk_buff *skb = bf->bf_mpdu; |
1968 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; | 1893 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; |
1969 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); | 1894 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); |
1970 | struct ieee80211_hw *hw = bf->aphy->hw; | 1895 | struct ieee80211_hw *hw = bf->aphy->hw; |
1896 | struct ath_softc *sc = bf->aphy->sc; | ||
1897 | struct ath_hw *ah = sc->sc_ah; | ||
1971 | u8 i, tx_rateindex; | 1898 | u8 i, tx_rateindex; |
1972 | 1899 | ||
1973 | if (txok) | 1900 | if (txok) |
@@ -1981,22 +1908,32 @@ static void ath_tx_rc_status(struct ath_buf *bf, struct ath_tx_status *ts, | |||
1981 | if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && update_rc) { | 1908 | if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && update_rc) { |
1982 | tx_info->flags |= IEEE80211_TX_STAT_AMPDU; | 1909 | tx_info->flags |= IEEE80211_TX_STAT_AMPDU; |
1983 | 1910 | ||
1984 | BUG_ON(nbad > bf->bf_nframes); | 1911 | BUG_ON(nbad > nframes); |
1985 | 1912 | ||
1986 | tx_info->status.ampdu_len = bf->bf_nframes; | 1913 | tx_info->status.ampdu_len = nframes; |
1987 | tx_info->status.ampdu_ack_len = bf->bf_nframes - nbad; | 1914 | tx_info->status.ampdu_ack_len = nframes - nbad; |
1988 | } | 1915 | } |
1989 | 1916 | ||
1990 | if ((ts->ts_status & ATH9K_TXERR_FILT) == 0 && | 1917 | if ((ts->ts_status & ATH9K_TXERR_FILT) == 0 && |
1991 | (bf->bf_flags & ATH9K_TXDESC_NOACK) == 0 && update_rc) { | 1918 | (bf->bf_flags & ATH9K_TXDESC_NOACK) == 0 && update_rc) { |
1992 | if (ieee80211_is_data(hdr->frame_control)) { | 1919 | /* |
1993 | if (ts->ts_flags & | 1920 | * If an underrun error is seen assume it as an excessive |
1994 | (ATH9K_TX_DATA_UNDERRUN | ATH9K_TX_DELIM_UNDERRUN)) | 1921 | * retry only if max frame trigger level has been reached |
1995 | tx_info->pad[0] |= ATH_TX_INFO_UNDERRUN; | 1922 | * (2 KB for single stream, and 4 KB for dual stream). |
1996 | if ((ts->ts_status & ATH9K_TXERR_XRETRY) || | 1923 | * Adjust the long retry as if the frame was tried |
1997 | (ts->ts_status & ATH9K_TXERR_FIFO)) | 1924 | * hw->max_rate_tries times to affect how rate control updates |
1998 | tx_info->pad[0] |= ATH_TX_INFO_XRETRY; | 1925 | * PER for the failed rate. |
1999 | } | 1926 | * In case of congestion on the bus penalizing this type of |
1927 | * underruns should help hardware actually transmit new frames | ||
1928 | * successfully by eventually preferring slower rates. | ||
1929 | * This itself should also alleviate congestion on the bus. | ||
1930 | */ | ||
1931 | if (ieee80211_is_data(hdr->frame_control) && | ||
1932 | (ts->ts_flags & (ATH9K_TX_DATA_UNDERRUN | | ||
1933 | ATH9K_TX_DELIM_UNDERRUN)) && | ||
1934 | ah->tx_trig_level >= sc->sc_ah->caps.tx_triglevel_max) | ||
1935 | tx_info->status.rates[tx_rateindex].count = | ||
1936 | hw->max_rate_tries; | ||
2000 | } | 1937 | } |
2001 | 1938 | ||
2002 | for (i = tx_rateindex + 1; i < hw->max_rates; i++) { | 1939 | for (i = tx_rateindex + 1; i < hw->max_rates; i++) { |
@@ -2103,13 +2040,14 @@ static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq) | |||
2103 | */ | 2040 | */ |
2104 | if (ts.ts_status & ATH9K_TXERR_XRETRY) | 2041 | if (ts.ts_status & ATH9K_TXERR_XRETRY) |
2105 | bf->bf_state.bf_type |= BUF_XRETRY; | 2042 | bf->bf_state.bf_type |= BUF_XRETRY; |
2106 | ath_tx_rc_status(bf, &ts, txok ? 0 : 1, txok, true); | 2043 | ath_tx_rc_status(bf, &ts, 1, txok ? 0 : 1, txok, true); |
2107 | } | 2044 | } |
2108 | 2045 | ||
2109 | qnum = skb_get_queue_mapping(bf->bf_mpdu); | 2046 | qnum = skb_get_queue_mapping(bf->bf_mpdu); |
2110 | 2047 | ||
2111 | if (bf_isampdu(bf)) | 2048 | if (bf_isampdu(bf)) |
2112 | ath_tx_complete_aggr(sc, txq, bf, &bf_head, &ts, txok); | 2049 | ath_tx_complete_aggr(sc, txq, bf, &bf_head, &ts, txok, |
2050 | true); | ||
2113 | else | 2051 | else |
2114 | ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, txok, 0); | 2052 | ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, txok, 0); |
2115 | 2053 | ||
@@ -2225,13 +2163,14 @@ void ath_tx_edma_tasklet(struct ath_softc *sc) | |||
2225 | if (!bf_isampdu(bf)) { | 2163 | if (!bf_isampdu(bf)) { |
2226 | if (txs.ts_status & ATH9K_TXERR_XRETRY) | 2164 | if (txs.ts_status & ATH9K_TXERR_XRETRY) |
2227 | bf->bf_state.bf_type |= BUF_XRETRY; | 2165 | bf->bf_state.bf_type |= BUF_XRETRY; |
2228 | ath_tx_rc_status(bf, &txs, txok ? 0 : 1, txok, true); | 2166 | ath_tx_rc_status(bf, &txs, 1, txok ? 0 : 1, txok, true); |
2229 | } | 2167 | } |
2230 | 2168 | ||
2231 | qnum = skb_get_queue_mapping(bf->bf_mpdu); | 2169 | qnum = skb_get_queue_mapping(bf->bf_mpdu); |
2232 | 2170 | ||
2233 | if (bf_isampdu(bf)) | 2171 | if (bf_isampdu(bf)) |
2234 | ath_tx_complete_aggr(sc, txq, bf, &bf_head, &txs, txok); | 2172 | ath_tx_complete_aggr(sc, txq, bf, &bf_head, &txs, |
2173 | txok, true); | ||
2235 | else | 2174 | else |
2236 | ath_tx_complete_buf(sc, bf, txq, &bf_head, | 2175 | ath_tx_complete_buf(sc, bf, txq, &bf_head, |
2237 | &txs, txok, 0); | 2176 | &txs, txok, 0); |
diff --git a/drivers/net/wireless/ath/carl9170/cmd.c b/drivers/net/wireless/ath/carl9170/cmd.c index c21f3364bfec..cdfc94c371b4 100644 --- a/drivers/net/wireless/ath/carl9170/cmd.c +++ b/drivers/net/wireless/ath/carl9170/cmd.c | |||
@@ -41,7 +41,7 @@ | |||
41 | 41 | ||
42 | int carl9170_write_reg(struct ar9170 *ar, const u32 reg, const u32 val) | 42 | int carl9170_write_reg(struct ar9170 *ar, const u32 reg, const u32 val) |
43 | { | 43 | { |
44 | __le32 buf[2] = { | 44 | const __le32 buf[2] = { |
45 | cpu_to_le32(reg), | 45 | cpu_to_le32(reg), |
46 | cpu_to_le32(val), | 46 | cpu_to_le32(val), |
47 | }; | 47 | }; |
diff --git a/drivers/net/wireless/ath/carl9170/main.c b/drivers/net/wireless/ath/carl9170/main.c index 4ae6a5849076..511dbe3caf58 100644 --- a/drivers/net/wireless/ath/carl9170/main.c +++ b/drivers/net/wireless/ath/carl9170/main.c | |||
@@ -663,7 +663,7 @@ init: | |||
663 | } | 663 | } |
664 | 664 | ||
665 | unlock: | 665 | unlock: |
666 | if (err && (vif_id != -1)) { | 666 | if (err && (vif_id >= 0)) { |
667 | vif_priv->active = false; | 667 | vif_priv->active = false; |
668 | bitmap_release_region(&ar->vif_bitmap, vif_id, 0); | 668 | bitmap_release_region(&ar->vif_bitmap, vif_id, 0); |
669 | ar->vifs--; | 669 | ar->vifs--; |
diff --git a/drivers/net/wireless/ath/carl9170/tx.c b/drivers/net/wireless/ath/carl9170/tx.c index 688eede48516..aee5c9d89a14 100644 --- a/drivers/net/wireless/ath/carl9170/tx.c +++ b/drivers/net/wireless/ath/carl9170/tx.c | |||
@@ -1261,7 +1261,7 @@ static void carl9170_tx(struct ar9170 *ar) | |||
1261 | static bool carl9170_tx_ampdu_queue(struct ar9170 *ar, | 1261 | static bool carl9170_tx_ampdu_queue(struct ar9170 *ar, |
1262 | struct ieee80211_sta *sta, struct sk_buff *skb) | 1262 | struct ieee80211_sta *sta, struct sk_buff *skb) |
1263 | { | 1263 | { |
1264 | struct _carl9170_tx_superframe *super = (void *) super; | 1264 | struct _carl9170_tx_superframe *super = (void *) skb->data; |
1265 | struct carl9170_sta_info *sta_info; | 1265 | struct carl9170_sta_info *sta_info; |
1266 | struct carl9170_sta_tid *agg; | 1266 | struct carl9170_sta_tid *agg; |
1267 | struct sk_buff *iter; | 1267 | struct sk_buff *iter; |
diff --git a/drivers/net/wireless/ath/debug.c b/drivers/net/wireless/ath/debug.c index dacfb234f491..a9600ba8ceaa 100644 --- a/drivers/net/wireless/ath/debug.c +++ b/drivers/net/wireless/ath/debug.c | |||
@@ -19,14 +19,19 @@ | |||
19 | 19 | ||
20 | void ath_print(struct ath_common *common, int dbg_mask, const char *fmt, ...) | 20 | void ath_print(struct ath_common *common, int dbg_mask, const char *fmt, ...) |
21 | { | 21 | { |
22 | struct va_format vaf; | ||
22 | va_list args; | 23 | va_list args; |
23 | 24 | ||
24 | if (likely(!(common->debug_mask & dbg_mask))) | 25 | if (likely(!(common->debug_mask & dbg_mask))) |
25 | return; | 26 | return; |
26 | 27 | ||
27 | va_start(args, fmt); | 28 | va_start(args, fmt); |
28 | printk(KERN_DEBUG "ath: "); | 29 | |
29 | vprintk(fmt, args); | 30 | vaf.fmt = fmt; |
31 | vaf.va = &args; | ||
32 | |||
33 | printk(KERN_DEBUG "ath: %pV", &vaf); | ||
34 | |||
30 | va_end(args); | 35 | va_end(args); |
31 | } | 36 | } |
32 | EXPORT_SYMBOL(ath_print); | 37 | EXPORT_SYMBOL(ath_print); |
diff --git a/drivers/net/wireless/atmel.c b/drivers/net/wireless/atmel.c index c8f7090b27d3..46e382ed46aa 100644 --- a/drivers/net/wireless/atmel.c +++ b/drivers/net/wireless/atmel.c | |||
@@ -1161,7 +1161,7 @@ static irqreturn_t service_interrupt(int irq, void *dev_id) | |||
1161 | struct atmel_private *priv = netdev_priv(dev); | 1161 | struct atmel_private *priv = netdev_priv(dev); |
1162 | u8 isr; | 1162 | u8 isr; |
1163 | int i = -1; | 1163 | int i = -1; |
1164 | static u8 irq_order[] = { | 1164 | static const u8 irq_order[] = { |
1165 | ISR_OUT_OF_RANGE, | 1165 | ISR_OUT_OF_RANGE, |
1166 | ISR_RxCOMPLETE, | 1166 | ISR_RxCOMPLETE, |
1167 | ISR_TxCOMPLETE, | 1167 | ISR_TxCOMPLETE, |
@@ -3771,7 +3771,9 @@ static int probe_atmel_card(struct net_device *dev) | |||
3771 | 3771 | ||
3772 | if (rc) { | 3772 | if (rc) { |
3773 | if (dev->dev_addr[0] == 0xFF) { | 3773 | if (dev->dev_addr[0] == 0xFF) { |
3774 | u8 default_mac[] = {0x00, 0x04, 0x25, 0x00, 0x00, 0x00}; | 3774 | static const u8 default_mac[] = { |
3775 | 0x00, 0x04, 0x25, 0x00, 0x00, 0x00 | ||
3776 | }; | ||
3775 | printk(KERN_ALERT "%s: *** Invalid MAC address. UPGRADE Firmware ****\n", dev->name); | 3777 | printk(KERN_ALERT "%s: *** Invalid MAC address. UPGRADE Firmware ****\n", dev->name); |
3776 | memcpy(dev->dev_addr, default_mac, 6); | 3778 | memcpy(dev->dev_addr, default_mac, 6); |
3777 | } | 3779 | } |
diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c index a1186525c70d..fa4880366586 100644 --- a/drivers/net/wireless/b43/main.c +++ b/drivers/net/wireless/b43/main.c | |||
@@ -322,59 +322,83 @@ static int b43_ratelimit(struct b43_wl *wl) | |||
322 | 322 | ||
323 | void b43info(struct b43_wl *wl, const char *fmt, ...) | 323 | void b43info(struct b43_wl *wl, const char *fmt, ...) |
324 | { | 324 | { |
325 | struct va_format vaf; | ||
325 | va_list args; | 326 | va_list args; |
326 | 327 | ||
327 | if (b43_modparam_verbose < B43_VERBOSITY_INFO) | 328 | if (b43_modparam_verbose < B43_VERBOSITY_INFO) |
328 | return; | 329 | return; |
329 | if (!b43_ratelimit(wl)) | 330 | if (!b43_ratelimit(wl)) |
330 | return; | 331 | return; |
332 | |||
331 | va_start(args, fmt); | 333 | va_start(args, fmt); |
332 | printk(KERN_INFO "b43-%s: ", | 334 | |
333 | (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan"); | 335 | vaf.fmt = fmt; |
334 | vprintk(fmt, args); | 336 | vaf.va = &args; |
337 | |||
338 | printk(KERN_INFO "b43-%s: %pV", | ||
339 | (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf); | ||
340 | |||
335 | va_end(args); | 341 | va_end(args); |
336 | } | 342 | } |
337 | 343 | ||
338 | void b43err(struct b43_wl *wl, const char *fmt, ...) | 344 | void b43err(struct b43_wl *wl, const char *fmt, ...) |
339 | { | 345 | { |
346 | struct va_format vaf; | ||
340 | va_list args; | 347 | va_list args; |
341 | 348 | ||
342 | if (b43_modparam_verbose < B43_VERBOSITY_ERROR) | 349 | if (b43_modparam_verbose < B43_VERBOSITY_ERROR) |
343 | return; | 350 | return; |
344 | if (!b43_ratelimit(wl)) | 351 | if (!b43_ratelimit(wl)) |
345 | return; | 352 | return; |
353 | |||
346 | va_start(args, fmt); | 354 | va_start(args, fmt); |
347 | printk(KERN_ERR "b43-%s ERROR: ", | 355 | |
348 | (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan"); | 356 | vaf.fmt = fmt; |
349 | vprintk(fmt, args); | 357 | vaf.va = &args; |
358 | |||
359 | printk(KERN_ERR "b43-%s ERROR: %pV", | ||
360 | (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf); | ||
361 | |||
350 | va_end(args); | 362 | va_end(args); |
351 | } | 363 | } |
352 | 364 | ||
353 | void b43warn(struct b43_wl *wl, const char *fmt, ...) | 365 | void b43warn(struct b43_wl *wl, const char *fmt, ...) |
354 | { | 366 | { |
367 | struct va_format vaf; | ||
355 | va_list args; | 368 | va_list args; |
356 | 369 | ||
357 | if (b43_modparam_verbose < B43_VERBOSITY_WARN) | 370 | if (b43_modparam_verbose < B43_VERBOSITY_WARN) |
358 | return; | 371 | return; |
359 | if (!b43_ratelimit(wl)) | 372 | if (!b43_ratelimit(wl)) |
360 | return; | 373 | return; |
374 | |||
361 | va_start(args, fmt); | 375 | va_start(args, fmt); |
362 | printk(KERN_WARNING "b43-%s warning: ", | 376 | |
363 | (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan"); | 377 | vaf.fmt = fmt; |
364 | vprintk(fmt, args); | 378 | vaf.va = &args; |
379 | |||
380 | printk(KERN_WARNING "b43-%s warning: %pV", | ||
381 | (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf); | ||
382 | |||
365 | va_end(args); | 383 | va_end(args); |
366 | } | 384 | } |
367 | 385 | ||
368 | void b43dbg(struct b43_wl *wl, const char *fmt, ...) | 386 | void b43dbg(struct b43_wl *wl, const char *fmt, ...) |
369 | { | 387 | { |
388 | struct va_format vaf; | ||
370 | va_list args; | 389 | va_list args; |
371 | 390 | ||
372 | if (b43_modparam_verbose < B43_VERBOSITY_DEBUG) | 391 | if (b43_modparam_verbose < B43_VERBOSITY_DEBUG) |
373 | return; | 392 | return; |
393 | |||
374 | va_start(args, fmt); | 394 | va_start(args, fmt); |
375 | printk(KERN_DEBUG "b43-%s debug: ", | 395 | |
376 | (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan"); | 396 | vaf.fmt = fmt; |
377 | vprintk(fmt, args); | 397 | vaf.va = &args; |
398 | |||
399 | printk(KERN_DEBUG "b43-%s debug: %pV", | ||
400 | (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf); | ||
401 | |||
378 | va_end(args); | 402 | va_end(args); |
379 | } | 403 | } |
380 | 404 | ||
diff --git a/drivers/net/wireless/b43/phy_common.c b/drivers/net/wireless/b43/phy_common.c index 7b2ea6781457..fa7f83fc8db9 100644 --- a/drivers/net/wireless/b43/phy_common.c +++ b/drivers/net/wireless/b43/phy_common.c | |||
@@ -427,9 +427,11 @@ void b43_phyop_switch_analog_generic(struct b43_wldev *dev, bool on) | |||
427 | /* http://bcm-v4.sipsolutions.net/802.11/PHY/Cordic */ | 427 | /* http://bcm-v4.sipsolutions.net/802.11/PHY/Cordic */ |
428 | struct b43_c32 b43_cordic(int theta) | 428 | struct b43_c32 b43_cordic(int theta) |
429 | { | 429 | { |
430 | u32 arctg[] = { 2949120, 1740967, 919879, 466945, 234379, 117304, | 430 | static const u32 arctg[] = { |
431 | 58666, 29335, 14668, 7334, 3667, 1833, 917, 458, | 431 | 2949120, 1740967, 919879, 466945, 234379, 117304, |
432 | 229, 115, 57, 29, }; | 432 | 58666, 29335, 14668, 7334, 3667, 1833, |
433 | 917, 458, 229, 115, 57, 29, | ||
434 | }; | ||
433 | u8 i; | 435 | u8 i; |
434 | s32 tmp; | 436 | s32 tmp; |
435 | s8 signx = 1; | 437 | s8 signx = 1; |
diff --git a/drivers/net/wireless/b43/phy_n.c b/drivers/net/wireless/b43/phy_n.c index 6facb8ab05d1..9769483156e7 100644 --- a/drivers/net/wireless/b43/phy_n.c +++ b/drivers/net/wireless/b43/phy_n.c | |||
@@ -573,7 +573,6 @@ static void b43_nphy_calc_rx_iq_comp(struct b43_wldev *dev, u8 mask) | |||
573 | ii = est.i1_pwr; | 573 | ii = est.i1_pwr; |
574 | qq = est.q1_pwr; | 574 | qq = est.q1_pwr; |
575 | } else { | 575 | } else { |
576 | B43_WARN_ON(1); | ||
577 | continue; | 576 | continue; |
578 | } | 577 | } |
579 | 578 | ||
@@ -655,7 +654,8 @@ static void b43_nphy_tx_iq_workaround(struct b43_wldev *dev) | |||
655 | } | 654 | } |
656 | 655 | ||
657 | /* http://bcm-v4.sipsolutions.net/802.11/PHY/N/clip-detection */ | 656 | /* http://bcm-v4.sipsolutions.net/802.11/PHY/N/clip-detection */ |
658 | static void b43_nphy_write_clip_detection(struct b43_wldev *dev, u16 *clip_st) | 657 | static void b43_nphy_write_clip_detection(struct b43_wldev *dev, |
658 | const u16 *clip_st) | ||
659 | { | 659 | { |
660 | b43_phy_write(dev, B43_NPHY_C1_CLIP1THRES, clip_st[0]); | 660 | b43_phy_write(dev, B43_NPHY_C1_CLIP1THRES, clip_st[0]); |
661 | b43_phy_write(dev, B43_NPHY_C2_CLIP1THRES, clip_st[1]); | 661 | b43_phy_write(dev, B43_NPHY_C2_CLIP1THRES, clip_st[1]); |
@@ -731,7 +731,7 @@ static void b43_nphy_stay_in_carrier_search(struct b43_wldev *dev, bool enable) | |||
731 | struct b43_phy_n *nphy = phy->n; | 731 | struct b43_phy_n *nphy = phy->n; |
732 | 732 | ||
733 | if (enable) { | 733 | if (enable) { |
734 | u16 clip[] = { 0xFFFF, 0xFFFF }; | 734 | static const u16 clip[] = { 0xFFFF, 0xFFFF }; |
735 | if (nphy->deaf_count++ == 0) { | 735 | if (nphy->deaf_count++ == 0) { |
736 | nphy->classifier_state = b43_nphy_classifier(dev, 0, 0); | 736 | nphy->classifier_state = b43_nphy_classifier(dev, 0, 0); |
737 | b43_nphy_classifier(dev, 0x7, 0); | 737 | b43_nphy_classifier(dev, 0x7, 0); |
@@ -843,7 +843,7 @@ static void b43_nphy_adjust_lna_gain_table(struct b43_wldev *dev) | |||
843 | u16 data[4]; | 843 | u16 data[4]; |
844 | s16 gain[2]; | 844 | s16 gain[2]; |
845 | u16 minmax[2]; | 845 | u16 minmax[2]; |
846 | u16 lna_gain[4] = { -2, 10, 19, 25 }; | 846 | static const u16 lna_gain[4] = { -2, 10, 19, 25 }; |
847 | 847 | ||
848 | if (nphy->hang_avoid) | 848 | if (nphy->hang_avoid) |
849 | b43_nphy_stay_in_carrier_search(dev, 1); | 849 | b43_nphy_stay_in_carrier_search(dev, 1); |
@@ -875,7 +875,7 @@ static void b43_nphy_adjust_lna_gain_table(struct b43_wldev *dev) | |||
875 | data[2] = lna_gain[2] + gain[i]; | 875 | data[2] = lna_gain[2] + gain[i]; |
876 | data[3] = lna_gain[3] + gain[i]; | 876 | data[3] = lna_gain[3] + gain[i]; |
877 | } | 877 | } |
878 | b43_ntab_write_bulk(dev, B43_NTAB16(10, 8), 4, data); | 878 | b43_ntab_write_bulk(dev, B43_NTAB16(i, 8), 4, data); |
879 | 879 | ||
880 | minmax[i] = 23 + gain[i]; | 880 | minmax[i] = 23 + gain[i]; |
881 | } | 881 | } |
@@ -895,6 +895,7 @@ static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev) | |||
895 | struct b43_phy_n *nphy = dev->phy.n; | 895 | struct b43_phy_n *nphy = dev->phy.n; |
896 | u8 i, j; | 896 | u8 i, j; |
897 | u8 code; | 897 | u8 code; |
898 | u16 tmp; | ||
898 | 899 | ||
899 | /* TODO: for PHY >= 3 | 900 | /* TODO: for PHY >= 3 |
900 | s8 *lna1_gain, *lna2_gain; | 901 | s8 *lna1_gain, *lna2_gain; |
@@ -917,15 +918,15 @@ static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev) | |||
917 | B43_NPHY_C2_CGAINI_CL2DETECT); | 918 | B43_NPHY_C2_CGAINI_CL2DETECT); |
918 | 919 | ||
919 | /* Set narrowband clip threshold */ | 920 | /* Set narrowband clip threshold */ |
920 | b43_phy_set(dev, B43_NPHY_C1_NBCLIPTHRES, 0x84); | 921 | b43_phy_write(dev, B43_NPHY_C1_NBCLIPTHRES, 0x84); |
921 | b43_phy_set(dev, B43_NPHY_C2_NBCLIPTHRES, 0x84); | 922 | b43_phy_write(dev, B43_NPHY_C2_NBCLIPTHRES, 0x84); |
922 | 923 | ||
923 | if (!dev->phy.is_40mhz) { | 924 | if (!dev->phy.is_40mhz) { |
924 | /* Set dwell lengths */ | 925 | /* Set dwell lengths */ |
925 | b43_phy_set(dev, B43_NPHY_CLIP1_NBDWELL_LEN, 0x002B); | 926 | b43_phy_write(dev, B43_NPHY_CLIP1_NBDWELL_LEN, 0x002B); |
926 | b43_phy_set(dev, B43_NPHY_CLIP2_NBDWELL_LEN, 0x002B); | 927 | b43_phy_write(dev, B43_NPHY_CLIP2_NBDWELL_LEN, 0x002B); |
927 | b43_phy_set(dev, B43_NPHY_W1CLIP1_DWELL_LEN, 0x0009); | 928 | b43_phy_write(dev, B43_NPHY_W1CLIP1_DWELL_LEN, 0x0009); |
928 | b43_phy_set(dev, B43_NPHY_W1CLIP2_DWELL_LEN, 0x0009); | 929 | b43_phy_write(dev, B43_NPHY_W1CLIP2_DWELL_LEN, 0x0009); |
929 | } | 930 | } |
930 | 931 | ||
931 | /* Set wideband clip 2 threshold */ | 932 | /* Set wideband clip 2 threshold */ |
@@ -947,7 +948,7 @@ static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev) | |||
947 | ~B43_NPHY_C2_CCK_CGAINI_GAINBKOFF, 0x1); | 948 | ~B43_NPHY_C2_CCK_CGAINI_GAINBKOFF, 0x1); |
948 | } | 949 | } |
949 | 950 | ||
950 | b43_phy_set(dev, B43_NPHY_CCK_SHIFTB_REF, 0x809C); | 951 | b43_phy_write(dev, B43_NPHY_CCK_SHIFTB_REF, 0x809C); |
951 | 952 | ||
952 | if (nphy->gain_boost) { | 953 | if (nphy->gain_boost) { |
953 | if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ && | 954 | if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ && |
@@ -968,10 +969,10 @@ static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev) | |||
968 | code << B43_NPHY_C2_INITGAIN_HPVGA2_SHIFT); | 969 | code << B43_NPHY_C2_INITGAIN_HPVGA2_SHIFT); |
969 | 970 | ||
970 | b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06); | 971 | b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06); |
971 | b43_phy_write(dev, B43_NPHY_TABLE_DATALO, | 972 | /* specs say about 2 loops, but wl does 4 */ |
972 | (code << 8 | 0x7C)); | 973 | for (i = 0; i < 4; i++) |
973 | b43_phy_write(dev, B43_NPHY_TABLE_DATALO, | 974 | b43_phy_write(dev, B43_NPHY_TABLE_DATALO, |
974 | (code << 8 | 0x7C)); | 975 | (code << 8 | 0x7C)); |
975 | 976 | ||
976 | b43_nphy_adjust_lna_gain_table(dev); | 977 | b43_nphy_adjust_lna_gain_table(dev); |
977 | 978 | ||
@@ -989,19 +990,21 @@ static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev) | |||
989 | b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1); | 990 | b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1); |
990 | 991 | ||
991 | b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06); | 992 | b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06); |
992 | b43_phy_write(dev, B43_NPHY_TABLE_DATALO, | 993 | /* specs say about 2 loops, but wl does 4 */ |
993 | (code << 8 | 0x74)); | 994 | for (i = 0; i < 4; i++) |
994 | b43_phy_write(dev, B43_NPHY_TABLE_DATALO, | 995 | b43_phy_write(dev, B43_NPHY_TABLE_DATALO, |
995 | (code << 8 | 0x74)); | 996 | (code << 8 | 0x74)); |
996 | } | 997 | } |
997 | 998 | ||
998 | if (dev->phy.rev == 2) { | 999 | if (dev->phy.rev == 2) { |
999 | for (i = 0; i < 4; i++) { | 1000 | for (i = 0; i < 4; i++) { |
1000 | b43_phy_write(dev, B43_NPHY_TABLE_ADDR, | 1001 | b43_phy_write(dev, B43_NPHY_TABLE_ADDR, |
1001 | (0x0400 * i) + 0x0020); | 1002 | (0x0400 * i) + 0x0020); |
1002 | for (j = 0; j < 21; j++) | 1003 | for (j = 0; j < 21; j++) { |
1004 | tmp = j * (i < 2 ? 3 : 1); | ||
1003 | b43_phy_write(dev, | 1005 | b43_phy_write(dev, |
1004 | B43_NPHY_TABLE_DATALO, 3 * j); | 1006 | B43_NPHY_TABLE_DATALO, tmp); |
1007 | } | ||
1005 | } | 1008 | } |
1006 | 1009 | ||
1007 | b43_nphy_set_rf_sequence(dev, 5, | 1010 | b43_nphy_set_rf_sequence(dev, 5, |
@@ -1030,7 +1033,7 @@ static void b43_nphy_workarounds(struct b43_wldev *dev) | |||
1030 | u8 events2[7] = { 0x0, 0x3, 0x5, 0x4, 0x2, 0x1, 0x8 }; | 1033 | u8 events2[7] = { 0x0, 0x3, 0x5, 0x4, 0x2, 0x1, 0x8 }; |
1031 | u8 delays2[7] = { 0x8, 0x6, 0x2, 0x4, 0x4, 0x6, 0x1 }; | 1034 | u8 delays2[7] = { 0x8, 0x6, 0x2, 0x4, 0x4, 0x6, 0x1 }; |
1032 | 1035 | ||
1033 | if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) | 1036 | if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) |
1034 | b43_nphy_classifier(dev, 1, 0); | 1037 | b43_nphy_classifier(dev, 1, 0); |
1035 | else | 1038 | else |
1036 | b43_nphy_classifier(dev, 1, 1); | 1039 | b43_nphy_classifier(dev, 1, 1); |
@@ -1569,19 +1572,20 @@ static void b43_nphy_rf_control_intc_override(struct b43_wldev *dev, u8 field, | |||
1569 | } | 1572 | } |
1570 | } | 1573 | } |
1571 | 1574 | ||
1575 | /* http://bcm-v4.sipsolutions.net/802.11/PHY/N/BPHYInit */ | ||
1572 | static void b43_nphy_bphy_init(struct b43_wldev *dev) | 1576 | static void b43_nphy_bphy_init(struct b43_wldev *dev) |
1573 | { | 1577 | { |
1574 | unsigned int i; | 1578 | unsigned int i; |
1575 | u16 val; | 1579 | u16 val; |
1576 | 1580 | ||
1577 | val = 0x1E1F; | 1581 | val = 0x1E1F; |
1578 | for (i = 0; i < 14; i++) { | 1582 | for (i = 0; i < 16; i++) { |
1579 | b43_phy_write(dev, B43_PHY_N_BMODE(0x88 + i), val); | 1583 | b43_phy_write(dev, B43_PHY_N_BMODE(0x88 + i), val); |
1580 | val -= 0x202; | 1584 | val -= 0x202; |
1581 | } | 1585 | } |
1582 | val = 0x3E3F; | 1586 | val = 0x3E3F; |
1583 | for (i = 0; i < 16; i++) { | 1587 | for (i = 0; i < 16; i++) { |
1584 | b43_phy_write(dev, B43_PHY_N_BMODE(0x97 + i), val); | 1588 | b43_phy_write(dev, B43_PHY_N_BMODE(0x98 + i), val); |
1585 | val -= 0x202; | 1589 | val -= 0x202; |
1586 | } | 1590 | } |
1587 | b43_phy_write(dev, B43_PHY_N_BMODE(0x38), 0x668); | 1591 | b43_phy_write(dev, B43_PHY_N_BMODE(0x38), 0x668); |
@@ -1841,6 +1845,14 @@ static int b43_nphy_poll_rssi(struct b43_wldev *dev, u8 type, s32 *buf, | |||
1841 | save_regs_phy[5] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER); | 1845 | save_regs_phy[5] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER); |
1842 | save_regs_phy[6] = b43_phy_read(dev, B43_NPHY_TXF_40CO_B1S0); | 1846 | save_regs_phy[6] = b43_phy_read(dev, B43_NPHY_TXF_40CO_B1S0); |
1843 | save_regs_phy[7] = b43_phy_read(dev, B43_NPHY_TXF_40CO_B32S1); | 1847 | save_regs_phy[7] = b43_phy_read(dev, B43_NPHY_TXF_40CO_B32S1); |
1848 | } else if (dev->phy.rev == 2) { | ||
1849 | save_regs_phy[0] = b43_phy_read(dev, B43_NPHY_AFECTL_C1); | ||
1850 | save_regs_phy[1] = b43_phy_read(dev, B43_NPHY_AFECTL_C2); | ||
1851 | save_regs_phy[2] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER); | ||
1852 | save_regs_phy[3] = b43_phy_read(dev, B43_NPHY_RFCTL_CMD); | ||
1853 | save_regs_phy[4] = b43_phy_read(dev, B43_NPHY_RFCTL_OVER); | ||
1854 | save_regs_phy[5] = b43_phy_read(dev, B43_NPHY_RFCTL_RSSIO1); | ||
1855 | save_regs_phy[6] = b43_phy_read(dev, B43_NPHY_RFCTL_RSSIO2); | ||
1844 | } | 1856 | } |
1845 | 1857 | ||
1846 | b43_nphy_rssi_select(dev, 5, type); | 1858 | b43_nphy_rssi_select(dev, 5, type); |
@@ -1884,6 +1896,14 @@ static int b43_nphy_poll_rssi(struct b43_wldev *dev, u8 type, s32 *buf, | |||
1884 | b43_phy_write(dev, B43_NPHY_AFECTL_OVER, save_regs_phy[5]); | 1896 | b43_phy_write(dev, B43_NPHY_AFECTL_OVER, save_regs_phy[5]); |
1885 | b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S0, save_regs_phy[6]); | 1897 | b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S0, save_regs_phy[6]); |
1886 | b43_phy_write(dev, B43_NPHY_TXF_40CO_B32S1, save_regs_phy[7]); | 1898 | b43_phy_write(dev, B43_NPHY_TXF_40CO_B32S1, save_regs_phy[7]); |
1899 | } else if (dev->phy.rev == 2) { | ||
1900 | b43_phy_write(dev, B43_NPHY_AFECTL_C1, save_regs_phy[0]); | ||
1901 | b43_phy_write(dev, B43_NPHY_AFECTL_C2, save_regs_phy[1]); | ||
1902 | b43_phy_write(dev, B43_NPHY_AFECTL_OVER, save_regs_phy[2]); | ||
1903 | b43_phy_write(dev, B43_NPHY_RFCTL_CMD, save_regs_phy[3]); | ||
1904 | b43_phy_write(dev, B43_NPHY_RFCTL_OVER, save_regs_phy[4]); | ||
1905 | b43_phy_write(dev, B43_NPHY_RFCTL_RSSIO1, save_regs_phy[5]); | ||
1906 | b43_phy_write(dev, B43_NPHY_RFCTL_RSSIO2, save_regs_phy[6]); | ||
1887 | } | 1907 | } |
1888 | 1908 | ||
1889 | return out; | 1909 | return out; |
@@ -2008,7 +2028,7 @@ static void b43_nphy_rev2_rssi_cal(struct b43_wldev *dev, u8 type) | |||
2008 | } | 2028 | } |
2009 | 2029 | ||
2010 | b43_radio_maskset(dev, B2055_C1_PD_RSSIMISC, 0xF8, state[0]); | 2030 | b43_radio_maskset(dev, B2055_C1_PD_RSSIMISC, 0xF8, state[0]); |
2011 | b43_radio_maskset(dev, B2055_C1_PD_RSSIMISC, 0xF8, state[1]); | 2031 | b43_radio_maskset(dev, B2055_C2_PD_RSSIMISC, 0xF8, state[1]); |
2012 | 2032 | ||
2013 | switch (state[2]) { | 2033 | switch (state[2]) { |
2014 | case 1: | 2034 | case 1: |
@@ -2299,7 +2319,7 @@ static void b43_nphy_int_pa_set_tx_dig_filters(struct b43_wldev *dev) | |||
2299 | { | 2319 | { |
2300 | int i, j; | 2320 | int i, j; |
2301 | /* B43_NPHY_TXF_20CO_S0A1, B43_NPHY_TXF_40CO_S0A1, unknown */ | 2321 | /* B43_NPHY_TXF_20CO_S0A1, B43_NPHY_TXF_40CO_S0A1, unknown */ |
2302 | u16 offset[] = { 0x186, 0x195, 0x2C5 }; | 2322 | static const u16 offset[] = { 0x186, 0x195, 0x2C5 }; |
2303 | 2323 | ||
2304 | for (i = 0; i < 3; i++) | 2324 | for (i = 0; i < 3; i++) |
2305 | for (j = 0; j < 15; j++) | 2325 | for (j = 0; j < 15; j++) |
@@ -3092,7 +3112,7 @@ static void b43_nphy_set_rx_core_state(struct b43_wldev *dev, u8 mask) | |||
3092 | { | 3112 | { |
3093 | struct b43_phy *phy = &dev->phy; | 3113 | struct b43_phy *phy = &dev->phy; |
3094 | struct b43_phy_n *nphy = phy->n; | 3114 | struct b43_phy_n *nphy = phy->n; |
3095 | u16 buf[16]; | 3115 | /* u16 buf[16]; it's rev3+ */ |
3096 | 3116 | ||
3097 | nphy->phyrxchain = mask; | 3117 | nphy->phyrxchain = mask; |
3098 | 3118 | ||
@@ -3236,6 +3256,9 @@ int b43_phy_initn(struct b43_wldev *dev) | |||
3236 | 3256 | ||
3237 | b43_nphy_classifier(dev, 0, 0); | 3257 | b43_nphy_classifier(dev, 0, 0); |
3238 | b43_nphy_read_clip_detection(dev, clip); | 3258 | b43_nphy_read_clip_detection(dev, clip); |
3259 | if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) | ||
3260 | b43_nphy_bphy_init(dev); | ||
3261 | |||
3239 | tx_pwr_state = nphy->txpwrctrl; | 3262 | tx_pwr_state = nphy->txpwrctrl; |
3240 | /* TODO N PHY TX power control with argument 0 | 3263 | /* TODO N PHY TX power control with argument 0 |
3241 | (turning off power control) */ | 3264 | (turning off power control) */ |
@@ -3385,7 +3408,6 @@ static int b43_nphy_set_channel(struct b43_wldev *dev, | |||
3385 | enum nl80211_channel_type channel_type) | 3408 | enum nl80211_channel_type channel_type) |
3386 | { | 3409 | { |
3387 | struct b43_phy *phy = &dev->phy; | 3410 | struct b43_phy *phy = &dev->phy; |
3388 | struct b43_phy_n *nphy = dev->phy.n; | ||
3389 | 3411 | ||
3390 | const struct b43_nphy_channeltab_entry_rev2 *tabent_r2; | 3412 | const struct b43_nphy_channeltab_entry_rev2 *tabent_r2; |
3391 | const struct b43_nphy_channeltab_entry_rev3 *tabent_r3; | 3413 | const struct b43_nphy_channeltab_entry_rev3 *tabent_r3; |
@@ -3455,7 +3477,9 @@ static void b43_nphy_op_prepare_structs(struct b43_wldev *dev) | |||
3455 | 3477 | ||
3456 | memset(nphy, 0, sizeof(*nphy)); | 3478 | memset(nphy, 0, sizeof(*nphy)); |
3457 | 3479 | ||
3458 | //TODO init struct b43_phy_n | 3480 | nphy->gain_boost = true; /* this way we follow wl, assume it is true */ |
3481 | nphy->txrx_chain = 2; /* sth different than 0 and 1 for now */ | ||
3482 | nphy->phyrxchain = 3; /* to avoid b43_nphy_set_rx_core_state like wl */ | ||
3459 | } | 3483 | } |
3460 | 3484 | ||
3461 | static void b43_nphy_op_free(struct b43_wldev *dev) | 3485 | static void b43_nphy_op_free(struct b43_wldev *dev) |
@@ -3528,8 +3552,6 @@ static void b43_nphy_op_radio_write(struct b43_wldev *dev, u16 reg, u16 value) | |||
3528 | static void b43_nphy_op_software_rfkill(struct b43_wldev *dev, | 3552 | static void b43_nphy_op_software_rfkill(struct b43_wldev *dev, |
3529 | bool blocked) | 3553 | bool blocked) |
3530 | { | 3554 | { |
3531 | struct b43_phy_n *nphy = dev->phy.n; | ||
3532 | |||
3533 | if (b43_read32(dev, B43_MMIO_MACCTL) & B43_MACCTL_ENABLED) | 3555 | if (b43_read32(dev, B43_MMIO_MACCTL) & B43_MACCTL_ENABLED) |
3534 | b43err(dev->wl, "MAC not suspended\n"); | 3556 | b43err(dev->wl, "MAC not suspended\n"); |
3535 | 3557 | ||
diff --git a/drivers/net/wireless/b43/radio_2055.c b/drivers/net/wireless/b43/radio_2055.c index 0d6771515bce..10910dc4184b 100644 --- a/drivers/net/wireless/b43/radio_2055.c +++ b/drivers/net/wireless/b43/radio_2055.c | |||
@@ -307,7 +307,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
307 | RADIOREGS(0x71, 0x01, 0xEC, 0x0F, 0xFF, 0x01, 0x04, 0x0A, | 307 | RADIOREGS(0x71, 0x01, 0xEC, 0x0F, 0xFF, 0x01, 0x04, 0x0A, |
308 | 0x00, 0x8F, 0xFF, 0xFF, 0xFF, 0x00, 0x0F, 0x0F, | 308 | 0x00, 0x8F, 0xFF, 0xFF, 0xFF, 0x00, 0x0F, 0x0F, |
309 | 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), | 309 | 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), |
310 | PHYREGS(0xB407, 0xB007, 0xAC07, 0x1402, 0x1502, 0x1602), | 310 | PHYREGS(0x07B4, 0x07B0, 0x07AC, 0x0214, 0x0215, 0x0216), |
311 | }, | 311 | }, |
312 | { .channel = 186, | 312 | { .channel = 186, |
313 | .freq = 4930, /* MHz */ | 313 | .freq = 4930, /* MHz */ |
@@ -315,7 +315,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
315 | RADIOREGS(0x71, 0x01, 0xED, 0x0F, 0xFF, 0x01, 0x04, 0x0A, | 315 | RADIOREGS(0x71, 0x01, 0xED, 0x0F, 0xFF, 0x01, 0x04, 0x0A, |
316 | 0x00, 0x8F, 0xFF, 0xFF, 0xFF, 0x00, 0x0F, 0x0F, | 316 | 0x00, 0x8F, 0xFF, 0xFF, 0xFF, 0x00, 0x0F, 0x0F, |
317 | 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), | 317 | 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), |
318 | PHYREGS(0xB807, 0xB407, 0xB007, 0x1302, 0x1402, 0x1502), | 318 | PHYREGS(0x07B8, 0x07B4, 0x07B0, 0x0213, 0x0214, 0x0215), |
319 | }, | 319 | }, |
320 | { .channel = 188, | 320 | { .channel = 188, |
321 | .freq = 4940, /* MHz */ | 321 | .freq = 4940, /* MHz */ |
@@ -323,7 +323,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
323 | RADIOREGS(0x71, 0x01, 0xEE, 0x0F, 0xFF, 0x01, 0x04, 0x0A, | 323 | RADIOREGS(0x71, 0x01, 0xEE, 0x0F, 0xFF, 0x01, 0x04, 0x0A, |
324 | 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, | 324 | 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, |
325 | 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), | 325 | 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), |
326 | PHYREGS(0xBC07, 0xB807, 0xB407, 0x1202, 0x1302, 0x1402), | 326 | PHYREGS(0x07BC, 0x07B8, 0x07B4, 0x0212, 0x0213, 0x0214), |
327 | }, | 327 | }, |
328 | { .channel = 190, | 328 | { .channel = 190, |
329 | .freq = 4950, /* MHz */ | 329 | .freq = 4950, /* MHz */ |
@@ -331,7 +331,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
331 | RADIOREGS(0x71, 0x01, 0xEF, 0x0F, 0xFF, 0x01, 0x04, 0x0A, | 331 | RADIOREGS(0x71, 0x01, 0xEF, 0x0F, 0xFF, 0x01, 0x04, 0x0A, |
332 | 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, | 332 | 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, |
333 | 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), | 333 | 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), |
334 | PHYREGS(0xC007, 0xBC07, 0xB807, 0x1102, 0x1202, 0x1302), | 334 | PHYREGS(0x07C0, 0x07BC, 0x07B8, 0x0211, 0x0212, 0x0213), |
335 | }, | 335 | }, |
336 | { .channel = 192, | 336 | { .channel = 192, |
337 | .freq = 4960, /* MHz */ | 337 | .freq = 4960, /* MHz */ |
@@ -339,7 +339,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
339 | RADIOREGS(0x71, 0x01, 0xF0, 0x0F, 0xFF, 0x01, 0x04, 0x0A, | 339 | RADIOREGS(0x71, 0x01, 0xF0, 0x0F, 0xFF, 0x01, 0x04, 0x0A, |
340 | 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, | 340 | 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, |
341 | 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), | 341 | 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), |
342 | PHYREGS(0xC407, 0xC007, 0xBC07, 0x0F02, 0x1102, 0x1202), | 342 | PHYREGS(0x07C4, 0x07C0, 0x07BC, 0x020F, 0x0211, 0x0212), |
343 | }, | 343 | }, |
344 | { .channel = 194, | 344 | { .channel = 194, |
345 | .freq = 4970, /* MHz */ | 345 | .freq = 4970, /* MHz */ |
@@ -347,7 +347,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
347 | RADIOREGS(0x71, 0x01, 0xF1, 0x0F, 0xFF, 0x01, 0x04, 0x0A, | 347 | RADIOREGS(0x71, 0x01, 0xF1, 0x0F, 0xFF, 0x01, 0x04, 0x0A, |
348 | 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, | 348 | 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, |
349 | 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), | 349 | 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), |
350 | PHYREGS(0xC807, 0xC407, 0xC007, 0x0E02, 0x0F02, 0x1102), | 350 | PHYREGS(0x07C8, 0x07C4, 0x07C0, 0x020E, 0x020F, 0x0211), |
351 | }, | 351 | }, |
352 | { .channel = 196, | 352 | { .channel = 196, |
353 | .freq = 4980, /* MHz */ | 353 | .freq = 4980, /* MHz */ |
@@ -355,7 +355,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
355 | RADIOREGS(0x71, 0x01, 0xF2, 0x0E, 0xFF, 0x01, 0x04, 0x0A, | 355 | RADIOREGS(0x71, 0x01, 0xF2, 0x0E, 0xFF, 0x01, 0x04, 0x0A, |
356 | 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, | 356 | 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, |
357 | 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), | 357 | 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), |
358 | PHYREGS(0xCC07, 0xC807, 0xC407, 0x0D02, 0x0E02, 0x0F02), | 358 | PHYREGS(0x07CC, 0x07C8, 0x07C4, 0x020D, 0x020E, 0x020F), |
359 | }, | 359 | }, |
360 | { .channel = 198, | 360 | { .channel = 198, |
361 | .freq = 4990, /* MHz */ | 361 | .freq = 4990, /* MHz */ |
@@ -363,7 +363,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
363 | RADIOREGS(0x71, 0x01, 0xF3, 0x0E, 0xFF, 0x01, 0x04, 0x0A, | 363 | RADIOREGS(0x71, 0x01, 0xF3, 0x0E, 0xFF, 0x01, 0x04, 0x0A, |
364 | 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, | 364 | 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, |
365 | 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), | 365 | 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), |
366 | PHYREGS(0xD007, 0xCC07, 0xC807, 0x0C02, 0x0D02, 0x0E02), | 366 | PHYREGS(0x07D0, 0x07CC, 0x07C8, 0x020C, 0x020D, 0x020E), |
367 | }, | 367 | }, |
368 | { .channel = 200, | 368 | { .channel = 200, |
369 | .freq = 5000, /* MHz */ | 369 | .freq = 5000, /* MHz */ |
@@ -371,7 +371,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
371 | RADIOREGS(0x71, 0x01, 0xF4, 0x0E, 0xFF, 0x01, 0x04, 0x0A, | 371 | RADIOREGS(0x71, 0x01, 0xF4, 0x0E, 0xFF, 0x01, 0x04, 0x0A, |
372 | 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, | 372 | 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, |
373 | 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), | 373 | 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), |
374 | PHYREGS(0xD407, 0xD007, 0xCC07, 0x0B02, 0x0C02, 0x0D02), | 374 | PHYREGS(0x07D4, 0x07D0, 0x07CC, 0x020B, 0x020C, 0x020D), |
375 | }, | 375 | }, |
376 | { .channel = 202, | 376 | { .channel = 202, |
377 | .freq = 5010, /* MHz */ | 377 | .freq = 5010, /* MHz */ |
@@ -379,7 +379,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
379 | RADIOREGS(0x71, 0x01, 0xF5, 0x0E, 0xFF, 0x01, 0x04, 0x0A, | 379 | RADIOREGS(0x71, 0x01, 0xF5, 0x0E, 0xFF, 0x01, 0x04, 0x0A, |
380 | 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, | 380 | 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, |
381 | 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), | 381 | 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), |
382 | PHYREGS(0xD807, 0xD407, 0xD007, 0x0A02, 0x0B02, 0x0C02), | 382 | PHYREGS(0x07D8, 0x07D4, 0x07D0, 0x020A, 0x020B, 0x020C), |
383 | }, | 383 | }, |
384 | { .channel = 204, | 384 | { .channel = 204, |
385 | .freq = 5020, /* MHz */ | 385 | .freq = 5020, /* MHz */ |
@@ -387,7 +387,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
387 | RADIOREGS(0x71, 0x01, 0xF6, 0x0E, 0xF7, 0x01, 0x04, 0x0A, | 387 | RADIOREGS(0x71, 0x01, 0xF6, 0x0E, 0xF7, 0x01, 0x04, 0x0A, |
388 | 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, | 388 | 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, |
389 | 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), | 389 | 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), |
390 | PHYREGS(0xDC07, 0xD807, 0xD407, 0x0902, 0x0A02, 0x0B02), | 390 | PHYREGS(0x07DC, 0x07D8, 0x07D4, 0x0209, 0x020A, 0x020B), |
391 | }, | 391 | }, |
392 | { .channel = 206, | 392 | { .channel = 206, |
393 | .freq = 5030, /* MHz */ | 393 | .freq = 5030, /* MHz */ |
@@ -395,7 +395,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
395 | RADIOREGS(0x71, 0x01, 0xF7, 0x0E, 0xF7, 0x01, 0x04, 0x0A, | 395 | RADIOREGS(0x71, 0x01, 0xF7, 0x0E, 0xF7, 0x01, 0x04, 0x0A, |
396 | 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, | 396 | 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, |
397 | 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), | 397 | 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), |
398 | PHYREGS(0xE007, 0xDC07, 0xD807, 0x0802, 0x0902, 0x0A02), | 398 | PHYREGS(0x07E0, 0x07DC, 0x07D8, 0x0208, 0x0209, 0x020A), |
399 | }, | 399 | }, |
400 | { .channel = 208, | 400 | { .channel = 208, |
401 | .freq = 5040, /* MHz */ | 401 | .freq = 5040, /* MHz */ |
@@ -403,7 +403,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
403 | RADIOREGS(0x71, 0x01, 0xF8, 0x0D, 0xEF, 0x01, 0x04, 0x0A, | 403 | RADIOREGS(0x71, 0x01, 0xF8, 0x0D, 0xEF, 0x01, 0x04, 0x0A, |
404 | 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, | 404 | 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, |
405 | 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), | 405 | 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), |
406 | PHYREGS(0xE407, 0xE007, 0xDC07, 0x0702, 0x0802, 0x0902), | 406 | PHYREGS(0x07E4, 0x07E0, 0x07DC, 0x0207, 0x0208, 0x0209), |
407 | }, | 407 | }, |
408 | { .channel = 210, | 408 | { .channel = 210, |
409 | .freq = 5050, /* MHz */ | 409 | .freq = 5050, /* MHz */ |
@@ -411,7 +411,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
411 | RADIOREGS(0x71, 0x01, 0xF9, 0x0D, 0xEF, 0x01, 0x04, 0x0A, | 411 | RADIOREGS(0x71, 0x01, 0xF9, 0x0D, 0xEF, 0x01, 0x04, 0x0A, |
412 | 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, | 412 | 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, |
413 | 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), | 413 | 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), |
414 | PHYREGS(0xE807, 0xE407, 0xE007, 0x0602, 0x0702, 0x0802), | 414 | PHYREGS(0x07E8, 0x07E4, 0x07E0, 0x0206, 0x0207, 0x0208), |
415 | }, | 415 | }, |
416 | { .channel = 212, | 416 | { .channel = 212, |
417 | .freq = 5060, /* MHz */ | 417 | .freq = 5060, /* MHz */ |
@@ -419,7 +419,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
419 | RADIOREGS(0x71, 0x01, 0xFA, 0x0D, 0xE6, 0x01, 0x04, 0x0A, | 419 | RADIOREGS(0x71, 0x01, 0xFA, 0x0D, 0xE6, 0x01, 0x04, 0x0A, |
420 | 0x00, 0x8F, 0xBB, 0xBB, 0xFF, 0x00, 0x0E, 0x0F, | 420 | 0x00, 0x8F, 0xBB, 0xBB, 0xFF, 0x00, 0x0E, 0x0F, |
421 | 0x8E, 0xFF, 0x00, 0x0E, 0x0F, 0x8E), | 421 | 0x8E, 0xFF, 0x00, 0x0E, 0x0F, 0x8E), |
422 | PHYREGS(0xEC07, 0xE807, 0xE407, 0x0502, 0x0602, 0x0702), | 422 | PHYREGS(0x07EC, 0x07E8, 0x07E4, 0x0205, 0x0206, 0x0207), |
423 | }, | 423 | }, |
424 | { .channel = 214, | 424 | { .channel = 214, |
425 | .freq = 5070, /* MHz */ | 425 | .freq = 5070, /* MHz */ |
@@ -427,7 +427,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
427 | RADIOREGS(0x71, 0x01, 0xFB, 0x0D, 0xE6, 0x01, 0x04, 0x0A, | 427 | RADIOREGS(0x71, 0x01, 0xFB, 0x0D, 0xE6, 0x01, 0x04, 0x0A, |
428 | 0x00, 0x8F, 0xBB, 0xBB, 0xFF, 0x00, 0x0E, 0x0F, | 428 | 0x00, 0x8F, 0xBB, 0xBB, 0xFF, 0x00, 0x0E, 0x0F, |
429 | 0x8E, 0xFF, 0x00, 0x0E, 0x0F, 0x8E), | 429 | 0x8E, 0xFF, 0x00, 0x0E, 0x0F, 0x8E), |
430 | PHYREGS(0xF007, 0xEC07, 0xE807, 0x0402, 0x0502, 0x0602), | 430 | PHYREGS(0x07F0, 0x07EC, 0x07E8, 0x0204, 0x0205, 0x0206), |
431 | }, | 431 | }, |
432 | { .channel = 216, | 432 | { .channel = 216, |
433 | .freq = 5080, /* MHz */ | 433 | .freq = 5080, /* MHz */ |
@@ -435,7 +435,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
435 | RADIOREGS(0x71, 0x01, 0xFC, 0x0D, 0xDE, 0x01, 0x04, 0x0A, | 435 | RADIOREGS(0x71, 0x01, 0xFC, 0x0D, 0xDE, 0x01, 0x04, 0x0A, |
436 | 0x00, 0x8E, 0xBB, 0xBB, 0xEE, 0x00, 0x0E, 0x0F, | 436 | 0x00, 0x8E, 0xBB, 0xBB, 0xEE, 0x00, 0x0E, 0x0F, |
437 | 0x8D, 0xEE, 0x00, 0x0E, 0x0F, 0x8D), | 437 | 0x8D, 0xEE, 0x00, 0x0E, 0x0F, 0x8D), |
438 | PHYREGS(0xF407, 0xF007, 0xEC07, 0x0302, 0x0402, 0x0502), | 438 | PHYREGS(0x07F4, 0x07F0, 0x07EC, 0x0203, 0x0204, 0x0205), |
439 | }, | 439 | }, |
440 | { .channel = 218, | 440 | { .channel = 218, |
441 | .freq = 5090, /* MHz */ | 441 | .freq = 5090, /* MHz */ |
@@ -443,7 +443,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
443 | RADIOREGS(0x71, 0x01, 0xFD, 0x0D, 0xDE, 0x01, 0x04, 0x0A, | 443 | RADIOREGS(0x71, 0x01, 0xFD, 0x0D, 0xDE, 0x01, 0x04, 0x0A, |
444 | 0x00, 0x8E, 0xBB, 0xBB, 0xEE, 0x00, 0x0E, 0x0F, | 444 | 0x00, 0x8E, 0xBB, 0xBB, 0xEE, 0x00, 0x0E, 0x0F, |
445 | 0x8D, 0xEE, 0x00, 0x0E, 0x0F, 0x8D), | 445 | 0x8D, 0xEE, 0x00, 0x0E, 0x0F, 0x8D), |
446 | PHYREGS(0xF807, 0xF407, 0xF007, 0x0202, 0x0302, 0x0402), | 446 | PHYREGS(0x07F8, 0x07F4, 0x07F0, 0x0202, 0x0203, 0x0204), |
447 | }, | 447 | }, |
448 | { .channel = 220, | 448 | { .channel = 220, |
449 | .freq = 5100, /* MHz */ | 449 | .freq = 5100, /* MHz */ |
@@ -451,7 +451,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
451 | RADIOREGS(0x71, 0x01, 0xFE, 0x0C, 0xD6, 0x01, 0x04, 0x0A, | 451 | RADIOREGS(0x71, 0x01, 0xFE, 0x0C, 0xD6, 0x01, 0x04, 0x0A, |
452 | 0x00, 0x8E, 0xAA, 0xAA, 0xEE, 0x00, 0x0D, 0x0F, | 452 | 0x00, 0x8E, 0xAA, 0xAA, 0xEE, 0x00, 0x0D, 0x0F, |
453 | 0x8D, 0xEE, 0x00, 0x0D, 0x0F, 0x8D), | 453 | 0x8D, 0xEE, 0x00, 0x0D, 0x0F, 0x8D), |
454 | PHYREGS(0xFC07, 0xF807, 0xF407, 0x0102, 0x0202, 0x0302), | 454 | PHYREGS(0x07FC, 0x07F8, 0x07F4, 0x0201, 0x0202, 0x0203), |
455 | }, | 455 | }, |
456 | { .channel = 222, | 456 | { .channel = 222, |
457 | .freq = 5110, /* MHz */ | 457 | .freq = 5110, /* MHz */ |
@@ -459,7 +459,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
459 | RADIOREGS(0x71, 0x01, 0xFF, 0x0C, 0xD6, 0x01, 0x04, 0x0A, | 459 | RADIOREGS(0x71, 0x01, 0xFF, 0x0C, 0xD6, 0x01, 0x04, 0x0A, |
460 | 0x00, 0x8E, 0xAA, 0xAA, 0xEE, 0x00, 0x0D, 0x0F, | 460 | 0x00, 0x8E, 0xAA, 0xAA, 0xEE, 0x00, 0x0D, 0x0F, |
461 | 0x8D, 0xEE, 0x00, 0x0D, 0x0F, 0x8D), | 461 | 0x8D, 0xEE, 0x00, 0x0D, 0x0F, 0x8D), |
462 | PHYREGS(0x0008, 0xFC07, 0xF807, 0x0002, 0x0102, 0x0202), | 462 | PHYREGS(0x0800, 0x07FC, 0x07F8, 0x0200, 0x0201, 0x0202), |
463 | }, | 463 | }, |
464 | { .channel = 224, | 464 | { .channel = 224, |
465 | .freq = 5120, /* MHz */ | 465 | .freq = 5120, /* MHz */ |
@@ -467,7 +467,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
467 | RADIOREGS(0x71, 0x02, 0x00, 0x0C, 0xCE, 0x01, 0x04, 0x0A, | 467 | RADIOREGS(0x71, 0x02, 0x00, 0x0C, 0xCE, 0x01, 0x04, 0x0A, |
468 | 0x00, 0x8D, 0xAA, 0xAA, 0xDD, 0x00, 0x0D, 0x0F, | 468 | 0x00, 0x8D, 0xAA, 0xAA, 0xDD, 0x00, 0x0D, 0x0F, |
469 | 0x8C, 0xDD, 0x00, 0x0D, 0x0F, 0x8C), | 469 | 0x8C, 0xDD, 0x00, 0x0D, 0x0F, 0x8C), |
470 | PHYREGS(0x0408, 0x0008, 0xFC07, 0xFF01, 0x0002, 0x0102), | 470 | PHYREGS(0x0804, 0x0800, 0x07FC, 0x01FF, 0x0200, 0x0201), |
471 | }, | 471 | }, |
472 | { .channel = 226, | 472 | { .channel = 226, |
473 | .freq = 5130, /* MHz */ | 473 | .freq = 5130, /* MHz */ |
@@ -475,7 +475,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
475 | RADIOREGS(0x71, 0x02, 0x01, 0x0C, 0xCE, 0x01, 0x04, 0x0A, | 475 | RADIOREGS(0x71, 0x02, 0x01, 0x0C, 0xCE, 0x01, 0x04, 0x0A, |
476 | 0x00, 0x8D, 0xAA, 0xAA, 0xDD, 0x00, 0x0D, 0x0F, | 476 | 0x00, 0x8D, 0xAA, 0xAA, 0xDD, 0x00, 0x0D, 0x0F, |
477 | 0x8C, 0xDD, 0x00, 0x0D, 0x0F, 0x8C), | 477 | 0x8C, 0xDD, 0x00, 0x0D, 0x0F, 0x8C), |
478 | PHYREGS(0x0808, 0x0408, 0x0008, 0xFE01, 0xFF01, 0x0002), | 478 | PHYREGS(0x0808, 0x0804, 0x0800, 0x01FE, 0x01FF, 0x0200), |
479 | }, | 479 | }, |
480 | { .channel = 228, | 480 | { .channel = 228, |
481 | .freq = 5140, /* MHz */ | 481 | .freq = 5140, /* MHz */ |
@@ -483,7 +483,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
483 | RADIOREGS(0x71, 0x02, 0x02, 0x0C, 0xC6, 0x01, 0x04, 0x0A, | 483 | RADIOREGS(0x71, 0x02, 0x02, 0x0C, 0xC6, 0x01, 0x04, 0x0A, |
484 | 0x00, 0x8D, 0x99, 0x99, 0xDD, 0x00, 0x0C, 0x0E, | 484 | 0x00, 0x8D, 0x99, 0x99, 0xDD, 0x00, 0x0C, 0x0E, |
485 | 0x8B, 0xDD, 0x00, 0x0C, 0x0E, 0x8B), | 485 | 0x8B, 0xDD, 0x00, 0x0C, 0x0E, 0x8B), |
486 | PHYREGS(0x0C08, 0x0808, 0x0408, 0xFD01, 0xFE01, 0xFF01), | 486 | PHYREGS(0x080C, 0x0808, 0x0804, 0x01FD, 0x01FE, 0x01FF), |
487 | }, | 487 | }, |
488 | { .channel = 32, | 488 | { .channel = 32, |
489 | .freq = 5160, /* MHz */ | 489 | .freq = 5160, /* MHz */ |
@@ -491,7 +491,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
491 | RADIOREGS(0x71, 0x02, 0x04, 0x0B, 0xBE, 0x01, 0x04, 0x0A, | 491 | RADIOREGS(0x71, 0x02, 0x04, 0x0B, 0xBE, 0x01, 0x04, 0x0A, |
492 | 0x00, 0x8C, 0x99, 0x99, 0xCC, 0x00, 0x0B, 0x0D, | 492 | 0x00, 0x8C, 0x99, 0x99, 0xCC, 0x00, 0x0B, 0x0D, |
493 | 0x8A, 0xCC, 0x00, 0x0B, 0x0D, 0x8A), | 493 | 0x8A, 0xCC, 0x00, 0x0B, 0x0D, 0x8A), |
494 | PHYREGS(0x1408, 0x1008, 0x0C08, 0xFB01, 0xFC01, 0xFD01), | 494 | PHYREGS(0x0814, 0x0810, 0x080C, 0x01FB, 0x01FC, 0x01FD), |
495 | }, | 495 | }, |
496 | { .channel = 34, | 496 | { .channel = 34, |
497 | .freq = 5170, /* MHz */ | 497 | .freq = 5170, /* MHz */ |
@@ -499,7 +499,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
499 | RADIOREGS(0x71, 0x02, 0x05, 0x0B, 0xBE, 0x01, 0x04, 0x0A, | 499 | RADIOREGS(0x71, 0x02, 0x05, 0x0B, 0xBE, 0x01, 0x04, 0x0A, |
500 | 0x00, 0x8C, 0x99, 0x99, 0xCC, 0x00, 0x0B, 0x0D, | 500 | 0x00, 0x8C, 0x99, 0x99, 0xCC, 0x00, 0x0B, 0x0D, |
501 | 0x8A, 0xCC, 0x00, 0x0B, 0x0D, 0x8A), | 501 | 0x8A, 0xCC, 0x00, 0x0B, 0x0D, 0x8A), |
502 | PHYREGS(0x1808, 0x1408, 0x1008, 0xFA01, 0xFB01, 0xFC01), | 502 | PHYREGS(0x0818, 0x0814, 0x0810, 0x01FA, 0x01FB, 0x01FC), |
503 | }, | 503 | }, |
504 | { .channel = 36, | 504 | { .channel = 36, |
505 | .freq = 5180, /* MHz */ | 505 | .freq = 5180, /* MHz */ |
@@ -507,7 +507,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
507 | RADIOREGS(0x71, 0x02, 0x06, 0x0B, 0xB6, 0x01, 0x04, 0x0A, | 507 | RADIOREGS(0x71, 0x02, 0x06, 0x0B, 0xB6, 0x01, 0x04, 0x0A, |
508 | 0x00, 0x8C, 0x88, 0x88, 0xCC, 0x00, 0x0B, 0x0C, | 508 | 0x00, 0x8C, 0x88, 0x88, 0xCC, 0x00, 0x0B, 0x0C, |
509 | 0x89, 0xCC, 0x00, 0x0B, 0x0C, 0x89), | 509 | 0x89, 0xCC, 0x00, 0x0B, 0x0C, 0x89), |
510 | PHYREGS(0x1C08, 0x1808, 0x1408, 0xF901, 0xFA01, 0xFB01), | 510 | PHYREGS(0x081C, 0x0818, 0x0814, 0x01F9, 0x01FA, 0x01FB), |
511 | }, | 511 | }, |
512 | { .channel = 38, | 512 | { .channel = 38, |
513 | .freq = 5190, /* MHz */ | 513 | .freq = 5190, /* MHz */ |
@@ -515,7 +515,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
515 | RADIOREGS(0x71, 0x02, 0x07, 0x0B, 0xB6, 0x01, 0x04, 0x0A, | 515 | RADIOREGS(0x71, 0x02, 0x07, 0x0B, 0xB6, 0x01, 0x04, 0x0A, |
516 | 0x00, 0x8C, 0x88, 0x88, 0xCC, 0x00, 0x0B, 0x0C, | 516 | 0x00, 0x8C, 0x88, 0x88, 0xCC, 0x00, 0x0B, 0x0C, |
517 | 0x89, 0xCC, 0x00, 0x0B, 0x0C, 0x89), | 517 | 0x89, 0xCC, 0x00, 0x0B, 0x0C, 0x89), |
518 | PHYREGS(0x2008, 0x1C08, 0x1808, 0xF801, 0xF901, 0xFA01), | 518 | PHYREGS(0x0820, 0x081C, 0x0818, 0x01F8, 0x01F9, 0x01FA), |
519 | }, | 519 | }, |
520 | { .channel = 40, | 520 | { .channel = 40, |
521 | .freq = 5200, /* MHz */ | 521 | .freq = 5200, /* MHz */ |
@@ -523,7 +523,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
523 | RADIOREGS(0x71, 0x02, 0x08, 0x0B, 0xAF, 0x01, 0x04, 0x0A, | 523 | RADIOREGS(0x71, 0x02, 0x08, 0x0B, 0xAF, 0x01, 0x04, 0x0A, |
524 | 0x00, 0x8B, 0x88, 0x88, 0xBB, 0x00, 0x0A, 0x0B, | 524 | 0x00, 0x8B, 0x88, 0x88, 0xBB, 0x00, 0x0A, 0x0B, |
525 | 0x89, 0xBB, 0x00, 0x0A, 0x0B, 0x89), | 525 | 0x89, 0xBB, 0x00, 0x0A, 0x0B, 0x89), |
526 | PHYREGS(0x2408, 0x2008, 0x1C08, 0xF701, 0xF801, 0xF901), | 526 | PHYREGS(0x0824, 0x0820, 0x081C, 0x01F7, 0x01F8, 0x01F9), |
527 | }, | 527 | }, |
528 | { .channel = 42, | 528 | { .channel = 42, |
529 | .freq = 5210, /* MHz */ | 529 | .freq = 5210, /* MHz */ |
@@ -531,7 +531,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
531 | RADIOREGS(0x71, 0x02, 0x09, 0x0B, 0xAF, 0x01, 0x04, 0x0A, | 531 | RADIOREGS(0x71, 0x02, 0x09, 0x0B, 0xAF, 0x01, 0x04, 0x0A, |
532 | 0x00, 0x8B, 0x88, 0x88, 0xBB, 0x00, 0x0A, 0x0B, | 532 | 0x00, 0x8B, 0x88, 0x88, 0xBB, 0x00, 0x0A, 0x0B, |
533 | 0x89, 0xBB, 0x00, 0x0A, 0x0B, 0x89), | 533 | 0x89, 0xBB, 0x00, 0x0A, 0x0B, 0x89), |
534 | PHYREGS(0x2808, 0x2408, 0x2008, 0xF601, 0xF701, 0xF801), | 534 | PHYREGS(0x0828, 0x0824, 0x0820, 0x01F6, 0x01F7, 0x01F8), |
535 | }, | 535 | }, |
536 | { .channel = 44, | 536 | { .channel = 44, |
537 | .freq = 5220, /* MHz */ | 537 | .freq = 5220, /* MHz */ |
@@ -539,7 +539,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
539 | RADIOREGS(0x71, 0x02, 0x0A, 0x0A, 0xA7, 0x01, 0x04, 0x0A, | 539 | RADIOREGS(0x71, 0x02, 0x0A, 0x0A, 0xA7, 0x01, 0x04, 0x0A, |
540 | 0x00, 0x8B, 0x77, 0x77, 0xBB, 0x00, 0x09, 0x0A, | 540 | 0x00, 0x8B, 0x77, 0x77, 0xBB, 0x00, 0x09, 0x0A, |
541 | 0x88, 0xBB, 0x00, 0x09, 0x0A, 0x88), | 541 | 0x88, 0xBB, 0x00, 0x09, 0x0A, 0x88), |
542 | PHYREGS(0x2C08, 0x2808, 0x2408, 0xF501, 0xF601, 0xF701), | 542 | PHYREGS(0x082C, 0x0828, 0x0824, 0x01F5, 0x01F6, 0x01F7), |
543 | }, | 543 | }, |
544 | { .channel = 46, | 544 | { .channel = 46, |
545 | .freq = 5230, /* MHz */ | 545 | .freq = 5230, /* MHz */ |
@@ -547,7 +547,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
547 | RADIOREGS(0x71, 0x02, 0x0B, 0x0A, 0xA7, 0x01, 0x04, 0x0A, | 547 | RADIOREGS(0x71, 0x02, 0x0B, 0x0A, 0xA7, 0x01, 0x04, 0x0A, |
548 | 0x00, 0x8B, 0x77, 0x77, 0xBB, 0x00, 0x09, 0x0A, | 548 | 0x00, 0x8B, 0x77, 0x77, 0xBB, 0x00, 0x09, 0x0A, |
549 | 0x88, 0xBB, 0x00, 0x09, 0x0A, 0x88), | 549 | 0x88, 0xBB, 0x00, 0x09, 0x0A, 0x88), |
550 | PHYREGS(0x3008, 0x2C08, 0x2808, 0xF401, 0xF501, 0xF601), | 550 | PHYREGS(0x0830, 0x082C, 0x0828, 0x01F4, 0x01F5, 0x01F6), |
551 | }, | 551 | }, |
552 | { .channel = 48, | 552 | { .channel = 48, |
553 | .freq = 5240, /* MHz */ | 553 | .freq = 5240, /* MHz */ |
@@ -555,7 +555,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
555 | RADIOREGS(0x71, 0x02, 0x0C, 0x0A, 0xA0, 0x01, 0x04, 0x0A, | 555 | RADIOREGS(0x71, 0x02, 0x0C, 0x0A, 0xA0, 0x01, 0x04, 0x0A, |
556 | 0x00, 0x8A, 0x77, 0x77, 0xAA, 0x00, 0x09, 0x0A, | 556 | 0x00, 0x8A, 0x77, 0x77, 0xAA, 0x00, 0x09, 0x0A, |
557 | 0x87, 0xAA, 0x00, 0x09, 0x0A, 0x87), | 557 | 0x87, 0xAA, 0x00, 0x09, 0x0A, 0x87), |
558 | PHYREGS(0x3408, 0x3008, 0x2C08, 0xF301, 0xF401, 0xF501), | 558 | PHYREGS(0x0834, 0x0830, 0x082C, 0x01F3, 0x01F4, 0x01F5), |
559 | }, | 559 | }, |
560 | { .channel = 50, | 560 | { .channel = 50, |
561 | .freq = 5250, /* MHz */ | 561 | .freq = 5250, /* MHz */ |
@@ -563,7 +563,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
563 | RADIOREGS(0x71, 0x02, 0x0D, 0x0A, 0xA0, 0x01, 0x04, 0x0A, | 563 | RADIOREGS(0x71, 0x02, 0x0D, 0x0A, 0xA0, 0x01, 0x04, 0x0A, |
564 | 0x00, 0x8A, 0x77, 0x77, 0xAA, 0x00, 0x09, 0x0A, | 564 | 0x00, 0x8A, 0x77, 0x77, 0xAA, 0x00, 0x09, 0x0A, |
565 | 0x87, 0xAA, 0x00, 0x09, 0x0A, 0x87), | 565 | 0x87, 0xAA, 0x00, 0x09, 0x0A, 0x87), |
566 | PHYREGS(0x3808, 0x3408, 0x3008, 0xF201, 0xF301, 0xF401), | 566 | PHYREGS(0x0838, 0x0834, 0x0830, 0x01F2, 0x01F3, 0x01F4), |
567 | }, | 567 | }, |
568 | { .channel = 52, | 568 | { .channel = 52, |
569 | .freq = 5260, /* MHz */ | 569 | .freq = 5260, /* MHz */ |
@@ -571,7 +571,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
571 | RADIOREGS(0x71, 0x02, 0x0E, 0x0A, 0x98, 0x01, 0x04, 0x0A, | 571 | RADIOREGS(0x71, 0x02, 0x0E, 0x0A, 0x98, 0x01, 0x04, 0x0A, |
572 | 0x00, 0x8A, 0x66, 0x66, 0xAA, 0x00, 0x08, 0x09, | 572 | 0x00, 0x8A, 0x66, 0x66, 0xAA, 0x00, 0x08, 0x09, |
573 | 0x87, 0xAA, 0x00, 0x08, 0x09, 0x87), | 573 | 0x87, 0xAA, 0x00, 0x08, 0x09, 0x87), |
574 | PHYREGS(0x3C08, 0x3808, 0x3408, 0xF101, 0xF201, 0xF301), | 574 | PHYREGS(0x083C, 0x0838, 0x0834, 0x01F1, 0x01F2, 0x01F3), |
575 | }, | 575 | }, |
576 | { .channel = 54, | 576 | { .channel = 54, |
577 | .freq = 5270, /* MHz */ | 577 | .freq = 5270, /* MHz */ |
@@ -579,7 +579,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
579 | RADIOREGS(0x71, 0x02, 0x0F, 0x0A, 0x98, 0x01, 0x04, 0x0A, | 579 | RADIOREGS(0x71, 0x02, 0x0F, 0x0A, 0x98, 0x01, 0x04, 0x0A, |
580 | 0x00, 0x8A, 0x66, 0x66, 0xAA, 0x00, 0x08, 0x09, | 580 | 0x00, 0x8A, 0x66, 0x66, 0xAA, 0x00, 0x08, 0x09, |
581 | 0x87, 0xAA, 0x00, 0x08, 0x09, 0x87), | 581 | 0x87, 0xAA, 0x00, 0x08, 0x09, 0x87), |
582 | PHYREGS(0x4008, 0x3C08, 0x3808, 0xF001, 0xF101, 0xF201), | 582 | PHYREGS(0x0840, 0x083C, 0x0838, 0x01F0, 0x01F1, 0x01F2), |
583 | }, | 583 | }, |
584 | { .channel = 56, | 584 | { .channel = 56, |
585 | .freq = 5280, /* MHz */ | 585 | .freq = 5280, /* MHz */ |
@@ -587,7 +587,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
587 | RADIOREGS(0x71, 0x02, 0x10, 0x09, 0x91, 0x01, 0x04, 0x0A, | 587 | RADIOREGS(0x71, 0x02, 0x10, 0x09, 0x91, 0x01, 0x04, 0x0A, |
588 | 0x00, 0x89, 0x66, 0x66, 0x99, 0x00, 0x08, 0x08, | 588 | 0x00, 0x89, 0x66, 0x66, 0x99, 0x00, 0x08, 0x08, |
589 | 0x86, 0x99, 0x00, 0x08, 0x08, 0x86), | 589 | 0x86, 0x99, 0x00, 0x08, 0x08, 0x86), |
590 | PHYREGS(0x4408, 0x4008, 0x3C08, 0xF001, 0xF001, 0xF101), | 590 | PHYREGS(0x0844, 0x0840, 0x083C, 0x01F0, 0x01F0, 0x01F1), |
591 | }, | 591 | }, |
592 | { .channel = 58, | 592 | { .channel = 58, |
593 | .freq = 5290, /* MHz */ | 593 | .freq = 5290, /* MHz */ |
@@ -595,7 +595,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
595 | RADIOREGS(0x71, 0x02, 0x11, 0x09, 0x91, 0x01, 0x04, 0x0A, | 595 | RADIOREGS(0x71, 0x02, 0x11, 0x09, 0x91, 0x01, 0x04, 0x0A, |
596 | 0x00, 0x89, 0x66, 0x66, 0x99, 0x00, 0x08, 0x08, | 596 | 0x00, 0x89, 0x66, 0x66, 0x99, 0x00, 0x08, 0x08, |
597 | 0x86, 0x99, 0x00, 0x08, 0x08, 0x86), | 597 | 0x86, 0x99, 0x00, 0x08, 0x08, 0x86), |
598 | PHYREGS(0x4808, 0x4408, 0x4008, 0xEF01, 0xF001, 0xF001), | 598 | PHYREGS(0x0848, 0x0844, 0x0840, 0x01EF, 0x01F0, 0x01F0), |
599 | }, | 599 | }, |
600 | { .channel = 60, | 600 | { .channel = 60, |
601 | .freq = 5300, /* MHz */ | 601 | .freq = 5300, /* MHz */ |
@@ -603,7 +603,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
603 | RADIOREGS(0x71, 0x02, 0x12, 0x09, 0x8A, 0x01, 0x04, 0x0A, | 603 | RADIOREGS(0x71, 0x02, 0x12, 0x09, 0x8A, 0x01, 0x04, 0x0A, |
604 | 0x00, 0x89, 0x55, 0x55, 0x99, 0x00, 0x08, 0x07, | 604 | 0x00, 0x89, 0x55, 0x55, 0x99, 0x00, 0x08, 0x07, |
605 | 0x85, 0x99, 0x00, 0x08, 0x07, 0x85), | 605 | 0x85, 0x99, 0x00, 0x08, 0x07, 0x85), |
606 | PHYREGS(0x4C08, 0x4808, 0x4408, 0xEE01, 0xEF01, 0xF001), | 606 | PHYREGS(0x084C, 0x0848, 0x0844, 0x01EE, 0x01EF, 0x01F0), |
607 | }, | 607 | }, |
608 | { .channel = 62, | 608 | { .channel = 62, |
609 | .freq = 5310, /* MHz */ | 609 | .freq = 5310, /* MHz */ |
@@ -611,7 +611,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
611 | RADIOREGS(0x71, 0x02, 0x13, 0x09, 0x8A, 0x01, 0x04, 0x0A, | 611 | RADIOREGS(0x71, 0x02, 0x13, 0x09, 0x8A, 0x01, 0x04, 0x0A, |
612 | 0x00, 0x89, 0x55, 0x55, 0x99, 0x00, 0x08, 0x07, | 612 | 0x00, 0x89, 0x55, 0x55, 0x99, 0x00, 0x08, 0x07, |
613 | 0x85, 0x99, 0x00, 0x08, 0x07, 0x85), | 613 | 0x85, 0x99, 0x00, 0x08, 0x07, 0x85), |
614 | PHYREGS(0x5008, 0x4C08, 0x4808, 0xED01, 0xEE01, 0xEF01), | 614 | PHYREGS(0x0850, 0x084C, 0x0848, 0x01ED, 0x01EE, 0x01EF), |
615 | }, | 615 | }, |
616 | { .channel = 64, | 616 | { .channel = 64, |
617 | .freq = 5320, /* MHz */ | 617 | .freq = 5320, /* MHz */ |
@@ -619,7 +619,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
619 | RADIOREGS(0x71, 0x02, 0x14, 0x09, 0x83, 0x01, 0x04, 0x0A, | 619 | RADIOREGS(0x71, 0x02, 0x14, 0x09, 0x83, 0x01, 0x04, 0x0A, |
620 | 0x00, 0x88, 0x55, 0x55, 0x88, 0x00, 0x07, 0x07, | 620 | 0x00, 0x88, 0x55, 0x55, 0x88, 0x00, 0x07, 0x07, |
621 | 0x84, 0x88, 0x00, 0x07, 0x07, 0x84), | 621 | 0x84, 0x88, 0x00, 0x07, 0x07, 0x84), |
622 | PHYREGS(0x5408, 0x5008, 0x4C08, 0xEC01, 0xED01, 0xEE01), | 622 | PHYREGS(0x0854, 0x0850, 0x084C, 0x01EC, 0x01ED, 0x01EE), |
623 | }, | 623 | }, |
624 | { .channel = 66, | 624 | { .channel = 66, |
625 | .freq = 5330, /* MHz */ | 625 | .freq = 5330, /* MHz */ |
@@ -627,7 +627,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
627 | RADIOREGS(0x71, 0x02, 0x15, 0x09, 0x83, 0x01, 0x04, 0x0A, | 627 | RADIOREGS(0x71, 0x02, 0x15, 0x09, 0x83, 0x01, 0x04, 0x0A, |
628 | 0x00, 0x88, 0x55, 0x55, 0x88, 0x00, 0x07, 0x07, | 628 | 0x00, 0x88, 0x55, 0x55, 0x88, 0x00, 0x07, 0x07, |
629 | 0x84, 0x88, 0x00, 0x07, 0x07, 0x84), | 629 | 0x84, 0x88, 0x00, 0x07, 0x07, 0x84), |
630 | PHYREGS(0x5808, 0x5408, 0x5008, 0xEB01, 0xEC01, 0xED01), | 630 | PHYREGS(0x0858, 0x0854, 0x0850, 0x01EB, 0x01EC, 0x01ED), |
631 | }, | 631 | }, |
632 | { .channel = 68, | 632 | { .channel = 68, |
633 | .freq = 5340, /* MHz */ | 633 | .freq = 5340, /* MHz */ |
@@ -635,7 +635,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
635 | RADIOREGS(0x71, 0x02, 0x16, 0x08, 0x7C, 0x01, 0x04, 0x0A, | 635 | RADIOREGS(0x71, 0x02, 0x16, 0x08, 0x7C, 0x01, 0x04, 0x0A, |
636 | 0x00, 0x88, 0x44, 0x44, 0x88, 0x00, 0x07, 0x06, | 636 | 0x00, 0x88, 0x44, 0x44, 0x88, 0x00, 0x07, 0x06, |
637 | 0x84, 0x88, 0x00, 0x07, 0x06, 0x84), | 637 | 0x84, 0x88, 0x00, 0x07, 0x06, 0x84), |
638 | PHYREGS(0x5C08, 0x5808, 0x5408, 0xEA01, 0xEB01, 0xEC01), | 638 | PHYREGS(0x085C, 0x0858, 0x0854, 0x01EA, 0x01EB, 0x01EC), |
639 | }, | 639 | }, |
640 | { .channel = 70, | 640 | { .channel = 70, |
641 | .freq = 5350, /* MHz */ | 641 | .freq = 5350, /* MHz */ |
@@ -643,7 +643,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
643 | RADIOREGS(0x71, 0x02, 0x17, 0x08, 0x7C, 0x01, 0x04, 0x0A, | 643 | RADIOREGS(0x71, 0x02, 0x17, 0x08, 0x7C, 0x01, 0x04, 0x0A, |
644 | 0x00, 0x88, 0x44, 0x44, 0x88, 0x00, 0x07, 0x06, | 644 | 0x00, 0x88, 0x44, 0x44, 0x88, 0x00, 0x07, 0x06, |
645 | 0x84, 0x88, 0x00, 0x07, 0x06, 0x84), | 645 | 0x84, 0x88, 0x00, 0x07, 0x06, 0x84), |
646 | PHYREGS(0x6008, 0x5C08, 0x5808, 0xE901, 0xEA01, 0xEB01), | 646 | PHYREGS(0x0860, 0x085C, 0x0858, 0x01E9, 0x01EA, 0x01EB), |
647 | }, | 647 | }, |
648 | { .channel = 72, | 648 | { .channel = 72, |
649 | .freq = 5360, /* MHz */ | 649 | .freq = 5360, /* MHz */ |
@@ -651,7 +651,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
651 | RADIOREGS(0x71, 0x02, 0x18, 0x08, 0x75, 0x01, 0x04, 0x0A, | 651 | RADIOREGS(0x71, 0x02, 0x18, 0x08, 0x75, 0x01, 0x04, 0x0A, |
652 | 0x00, 0x87, 0x44, 0x44, 0x77, 0x00, 0x06, 0x05, | 652 | 0x00, 0x87, 0x44, 0x44, 0x77, 0x00, 0x06, 0x05, |
653 | 0x83, 0x77, 0x00, 0x06, 0x05, 0x83), | 653 | 0x83, 0x77, 0x00, 0x06, 0x05, 0x83), |
654 | PHYREGS(0x6408, 0x6008, 0x5C08, 0xE801, 0xE901, 0xEA01), | 654 | PHYREGS(0x0864, 0x0860, 0x085C, 0x01E8, 0x01E9, 0x01EA), |
655 | }, | 655 | }, |
656 | { .channel = 74, | 656 | { .channel = 74, |
657 | .freq = 5370, /* MHz */ | 657 | .freq = 5370, /* MHz */ |
@@ -659,7 +659,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
659 | RADIOREGS(0x71, 0x02, 0x19, 0x08, 0x75, 0x01, 0x04, 0x0A, | 659 | RADIOREGS(0x71, 0x02, 0x19, 0x08, 0x75, 0x01, 0x04, 0x0A, |
660 | 0x00, 0x87, 0x44, 0x44, 0x77, 0x00, 0x06, 0x05, | 660 | 0x00, 0x87, 0x44, 0x44, 0x77, 0x00, 0x06, 0x05, |
661 | 0x83, 0x77, 0x00, 0x06, 0x05, 0x83), | 661 | 0x83, 0x77, 0x00, 0x06, 0x05, 0x83), |
662 | PHYREGS(0x6808, 0x6408, 0x6008, 0xE701, 0xE801, 0xE901), | 662 | PHYREGS(0x0868, 0x0864, 0x0860, 0x01E7, 0x01E8, 0x01E9), |
663 | }, | 663 | }, |
664 | { .channel = 76, | 664 | { .channel = 76, |
665 | .freq = 5380, /* MHz */ | 665 | .freq = 5380, /* MHz */ |
@@ -667,7 +667,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
667 | RADIOREGS(0x71, 0x02, 0x1A, 0x08, 0x6E, 0x01, 0x04, 0x0A, | 667 | RADIOREGS(0x71, 0x02, 0x1A, 0x08, 0x6E, 0x01, 0x04, 0x0A, |
668 | 0x00, 0x87, 0x33, 0x33, 0x77, 0x00, 0x06, 0x04, | 668 | 0x00, 0x87, 0x33, 0x33, 0x77, 0x00, 0x06, 0x04, |
669 | 0x82, 0x77, 0x00, 0x06, 0x04, 0x82), | 669 | 0x82, 0x77, 0x00, 0x06, 0x04, 0x82), |
670 | PHYREGS(0x6C08, 0x6808, 0x6408, 0xE601, 0xE701, 0xE801), | 670 | PHYREGS(0x086C, 0x0868, 0x0864, 0x01E6, 0x01E7, 0x01E8), |
671 | }, | 671 | }, |
672 | { .channel = 78, | 672 | { .channel = 78, |
673 | .freq = 5390, /* MHz */ | 673 | .freq = 5390, /* MHz */ |
@@ -675,7 +675,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
675 | RADIOREGS(0x71, 0x02, 0x1B, 0x08, 0x6E, 0x01, 0x04, 0x0A, | 675 | RADIOREGS(0x71, 0x02, 0x1B, 0x08, 0x6E, 0x01, 0x04, 0x0A, |
676 | 0x00, 0x87, 0x33, 0x33, 0x77, 0x00, 0x06, 0x04, | 676 | 0x00, 0x87, 0x33, 0x33, 0x77, 0x00, 0x06, 0x04, |
677 | 0x82, 0x77, 0x00, 0x06, 0x04, 0x82), | 677 | 0x82, 0x77, 0x00, 0x06, 0x04, 0x82), |
678 | PHYREGS(0x7008, 0x6C08, 0x6808, 0xE501, 0xE601, 0xE701), | 678 | PHYREGS(0x0870, 0x086C, 0x0868, 0x01E5, 0x01E6, 0x01E7), |
679 | }, | 679 | }, |
680 | { .channel = 80, | 680 | { .channel = 80, |
681 | .freq = 5400, /* MHz */ | 681 | .freq = 5400, /* MHz */ |
@@ -683,7 +683,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
683 | RADIOREGS(0x71, 0x02, 0x1C, 0x07, 0x67, 0x01, 0x04, 0x0A, | 683 | RADIOREGS(0x71, 0x02, 0x1C, 0x07, 0x67, 0x01, 0x04, 0x0A, |
684 | 0x00, 0x86, 0x33, 0x33, 0x66, 0x00, 0x05, 0x04, | 684 | 0x00, 0x86, 0x33, 0x33, 0x66, 0x00, 0x05, 0x04, |
685 | 0x81, 0x66, 0x00, 0x05, 0x04, 0x81), | 685 | 0x81, 0x66, 0x00, 0x05, 0x04, 0x81), |
686 | PHYREGS(0x7408, 0x7008, 0x6C08, 0xE501, 0xE501, 0xE601), | 686 | PHYREGS(0x0874, 0x0870, 0x086C, 0x01E5, 0x01E5, 0x01E6), |
687 | }, | 687 | }, |
688 | { .channel = 82, | 688 | { .channel = 82, |
689 | .freq = 5410, /* MHz */ | 689 | .freq = 5410, /* MHz */ |
@@ -691,7 +691,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
691 | RADIOREGS(0x71, 0x02, 0x1D, 0x07, 0x67, 0x01, 0x04, 0x0A, | 691 | RADIOREGS(0x71, 0x02, 0x1D, 0x07, 0x67, 0x01, 0x04, 0x0A, |
692 | 0x00, 0x86, 0x33, 0x33, 0x66, 0x00, 0x05, 0x04, | 692 | 0x00, 0x86, 0x33, 0x33, 0x66, 0x00, 0x05, 0x04, |
693 | 0x81, 0x66, 0x00, 0x05, 0x04, 0x81), | 693 | 0x81, 0x66, 0x00, 0x05, 0x04, 0x81), |
694 | PHYREGS(0x7808, 0x7408, 0x7008, 0xE401, 0xE501, 0xE501), | 694 | PHYREGS(0x0878, 0x0874, 0x0870, 0x01E4, 0x01E5, 0x01E5), |
695 | }, | 695 | }, |
696 | { .channel = 84, | 696 | { .channel = 84, |
697 | .freq = 5420, /* MHz */ | 697 | .freq = 5420, /* MHz */ |
@@ -699,7 +699,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
699 | RADIOREGS(0x71, 0x02, 0x1E, 0x07, 0x61, 0x01, 0x04, 0x0A, | 699 | RADIOREGS(0x71, 0x02, 0x1E, 0x07, 0x61, 0x01, 0x04, 0x0A, |
700 | 0x00, 0x86, 0x22, 0x22, 0x66, 0x00, 0x05, 0x03, | 700 | 0x00, 0x86, 0x22, 0x22, 0x66, 0x00, 0x05, 0x03, |
701 | 0x80, 0x66, 0x00, 0x05, 0x03, 0x80), | 701 | 0x80, 0x66, 0x00, 0x05, 0x03, 0x80), |
702 | PHYREGS(0x7C08, 0x7808, 0x7408, 0xE301, 0xE401, 0xE501), | 702 | PHYREGS(0x087C, 0x0878, 0x0874, 0x01E3, 0x01E4, 0x01E5), |
703 | }, | 703 | }, |
704 | { .channel = 86, | 704 | { .channel = 86, |
705 | .freq = 5430, /* MHz */ | 705 | .freq = 5430, /* MHz */ |
@@ -707,7 +707,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
707 | RADIOREGS(0x71, 0x02, 0x1F, 0x07, 0x61, 0x01, 0x04, 0x0A, | 707 | RADIOREGS(0x71, 0x02, 0x1F, 0x07, 0x61, 0x01, 0x04, 0x0A, |
708 | 0x00, 0x86, 0x22, 0x22, 0x66, 0x00, 0x05, 0x03, | 708 | 0x00, 0x86, 0x22, 0x22, 0x66, 0x00, 0x05, 0x03, |
709 | 0x80, 0x66, 0x00, 0x05, 0x03, 0x80), | 709 | 0x80, 0x66, 0x00, 0x05, 0x03, 0x80), |
710 | PHYREGS(0x8008, 0x7C08, 0x7808, 0xE201, 0xE301, 0xE401), | 710 | PHYREGS(0x0880, 0x087C, 0x0878, 0x01E2, 0x01E3, 0x01E4), |
711 | }, | 711 | }, |
712 | { .channel = 88, | 712 | { .channel = 88, |
713 | .freq = 5440, /* MHz */ | 713 | .freq = 5440, /* MHz */ |
@@ -715,7 +715,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
715 | RADIOREGS(0x71, 0x02, 0x20, 0x07, 0x5A, 0x01, 0x04, 0x0A, | 715 | RADIOREGS(0x71, 0x02, 0x20, 0x07, 0x5A, 0x01, 0x04, 0x0A, |
716 | 0x00, 0x85, 0x22, 0x22, 0x55, 0x00, 0x04, 0x02, | 716 | 0x00, 0x85, 0x22, 0x22, 0x55, 0x00, 0x04, 0x02, |
717 | 0x80, 0x55, 0x00, 0x04, 0x02, 0x80), | 717 | 0x80, 0x55, 0x00, 0x04, 0x02, 0x80), |
718 | PHYREGS(0x8408, 0x8008, 0x7C08, 0xE101, 0xE201, 0xE301), | 718 | PHYREGS(0x0884, 0x0880, 0x087C, 0x01E1, 0x01E2, 0x01E3), |
719 | }, | 719 | }, |
720 | { .channel = 90, | 720 | { .channel = 90, |
721 | .freq = 5450, /* MHz */ | 721 | .freq = 5450, /* MHz */ |
@@ -723,7 +723,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
723 | RADIOREGS(0x71, 0x02, 0x21, 0x07, 0x5A, 0x01, 0x04, 0x0A, | 723 | RADIOREGS(0x71, 0x02, 0x21, 0x07, 0x5A, 0x01, 0x04, 0x0A, |
724 | 0x00, 0x85, 0x22, 0x22, 0x55, 0x00, 0x04, 0x02, | 724 | 0x00, 0x85, 0x22, 0x22, 0x55, 0x00, 0x04, 0x02, |
725 | 0x80, 0x55, 0x00, 0x04, 0x02, 0x80), | 725 | 0x80, 0x55, 0x00, 0x04, 0x02, 0x80), |
726 | PHYREGS(0x8808, 0x8408, 0x8008, 0xE001, 0xE101, 0xE201), | 726 | PHYREGS(0x0888, 0x0884, 0x0880, 0x01E0, 0x01E1, 0x01E2), |
727 | }, | 727 | }, |
728 | { .channel = 92, | 728 | { .channel = 92, |
729 | .freq = 5460, /* MHz */ | 729 | .freq = 5460, /* MHz */ |
@@ -731,7 +731,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
731 | RADIOREGS(0x71, 0x02, 0x22, 0x06, 0x53, 0x01, 0x04, 0x0A, | 731 | RADIOREGS(0x71, 0x02, 0x22, 0x06, 0x53, 0x01, 0x04, 0x0A, |
732 | 0x00, 0x85, 0x11, 0x11, 0x55, 0x00, 0x04, 0x01, | 732 | 0x00, 0x85, 0x11, 0x11, 0x55, 0x00, 0x04, 0x01, |
733 | 0x80, 0x55, 0x00, 0x04, 0x01, 0x80), | 733 | 0x80, 0x55, 0x00, 0x04, 0x01, 0x80), |
734 | PHYREGS(0x8C08, 0x8808, 0x8408, 0xDF01, 0xE001, 0xE101), | 734 | PHYREGS(0x088C, 0x0888, 0x0884, 0x01DF, 0x01E0, 0x01E1), |
735 | }, | 735 | }, |
736 | { .channel = 94, | 736 | { .channel = 94, |
737 | .freq = 5470, /* MHz */ | 737 | .freq = 5470, /* MHz */ |
@@ -739,7 +739,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
739 | RADIOREGS(0x71, 0x02, 0x23, 0x06, 0x53, 0x01, 0x04, 0x0A, | 739 | RADIOREGS(0x71, 0x02, 0x23, 0x06, 0x53, 0x01, 0x04, 0x0A, |
740 | 0x00, 0x85, 0x11, 0x11, 0x55, 0x00, 0x04, 0x01, | 740 | 0x00, 0x85, 0x11, 0x11, 0x55, 0x00, 0x04, 0x01, |
741 | 0x80, 0x55, 0x00, 0x04, 0x01, 0x80), | 741 | 0x80, 0x55, 0x00, 0x04, 0x01, 0x80), |
742 | PHYREGS(0x9008, 0x8C08, 0x8808, 0xDE01, 0xDF01, 0xE001), | 742 | PHYREGS(0x0890, 0x088C, 0x0888, 0x01DE, 0x01DF, 0x01E0), |
743 | }, | 743 | }, |
744 | { .channel = 96, | 744 | { .channel = 96, |
745 | .freq = 5480, /* MHz */ | 745 | .freq = 5480, /* MHz */ |
@@ -747,7 +747,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
747 | RADIOREGS(0x71, 0x02, 0x24, 0x06, 0x4D, 0x01, 0x04, 0x0A, | 747 | RADIOREGS(0x71, 0x02, 0x24, 0x06, 0x4D, 0x01, 0x04, 0x0A, |
748 | 0x00, 0x84, 0x11, 0x11, 0x44, 0x00, 0x03, 0x00, | 748 | 0x00, 0x84, 0x11, 0x11, 0x44, 0x00, 0x03, 0x00, |
749 | 0x80, 0x44, 0x00, 0x03, 0x00, 0x80), | 749 | 0x80, 0x44, 0x00, 0x03, 0x00, 0x80), |
750 | PHYREGS(0x9408, 0x9008, 0x8C08, 0xDD01, 0xDE01, 0xDF01), | 750 | PHYREGS(0x0894, 0x0890, 0x088C, 0x01DD, 0x01DE, 0x01DF), |
751 | }, | 751 | }, |
752 | { .channel = 98, | 752 | { .channel = 98, |
753 | .freq = 5490, /* MHz */ | 753 | .freq = 5490, /* MHz */ |
@@ -755,7 +755,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
755 | RADIOREGS(0x71, 0x02, 0x25, 0x06, 0x4D, 0x01, 0x04, 0x0A, | 755 | RADIOREGS(0x71, 0x02, 0x25, 0x06, 0x4D, 0x01, 0x04, 0x0A, |
756 | 0x00, 0x84, 0x11, 0x11, 0x44, 0x00, 0x03, 0x00, | 756 | 0x00, 0x84, 0x11, 0x11, 0x44, 0x00, 0x03, 0x00, |
757 | 0x80, 0x44, 0x00, 0x03, 0x00, 0x80), | 757 | 0x80, 0x44, 0x00, 0x03, 0x00, 0x80), |
758 | PHYREGS(0x9808, 0x9408, 0x9008, 0xDD01, 0xDD01, 0xDE01), | 758 | PHYREGS(0x0898, 0x0894, 0x0890, 0x01DD, 0x01DD, 0x01DE), |
759 | }, | 759 | }, |
760 | { .channel = 100, | 760 | { .channel = 100, |
761 | .freq = 5500, /* MHz */ | 761 | .freq = 5500, /* MHz */ |
@@ -763,7 +763,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
763 | RADIOREGS(0x71, 0x02, 0x26, 0x06, 0x47, 0x01, 0x04, 0x0A, | 763 | RADIOREGS(0x71, 0x02, 0x26, 0x06, 0x47, 0x01, 0x04, 0x0A, |
764 | 0x00, 0x84, 0x00, 0x00, 0x44, 0x00, 0x03, 0x00, | 764 | 0x00, 0x84, 0x00, 0x00, 0x44, 0x00, 0x03, 0x00, |
765 | 0x80, 0x44, 0x00, 0x03, 0x00, 0x80), | 765 | 0x80, 0x44, 0x00, 0x03, 0x00, 0x80), |
766 | PHYREGS(0x9C08, 0x9808, 0x9408, 0xDC01, 0xDD01, 0xDD01), | 766 | PHYREGS(0x089C, 0x0898, 0x0894, 0x01DC, 0x01DD, 0x01DD), |
767 | }, | 767 | }, |
768 | { .channel = 102, | 768 | { .channel = 102, |
769 | .freq = 5510, /* MHz */ | 769 | .freq = 5510, /* MHz */ |
@@ -771,7 +771,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
771 | RADIOREGS(0x71, 0x02, 0x27, 0x06, 0x47, 0x01, 0x04, 0x0A, | 771 | RADIOREGS(0x71, 0x02, 0x27, 0x06, 0x47, 0x01, 0x04, 0x0A, |
772 | 0x00, 0x84, 0x00, 0x00, 0x44, 0x00, 0x03, 0x00, | 772 | 0x00, 0x84, 0x00, 0x00, 0x44, 0x00, 0x03, 0x00, |
773 | 0x80, 0x44, 0x00, 0x03, 0x00, 0x80), | 773 | 0x80, 0x44, 0x00, 0x03, 0x00, 0x80), |
774 | PHYREGS(0xA008, 0x9C08, 0x9808, 0xDB01, 0xDC01, 0xDD01), | 774 | PHYREGS(0x08A0, 0x089C, 0x0898, 0x01DB, 0x01DC, 0x01DD), |
775 | }, | 775 | }, |
776 | { .channel = 104, | 776 | { .channel = 104, |
777 | .freq = 5520, /* MHz */ | 777 | .freq = 5520, /* MHz */ |
@@ -779,7 +779,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
779 | RADIOREGS(0x71, 0x02, 0x28, 0x05, 0x40, 0x01, 0x04, 0x0A, | 779 | RADIOREGS(0x71, 0x02, 0x28, 0x05, 0x40, 0x01, 0x04, 0x0A, |
780 | 0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00, | 780 | 0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00, |
781 | 0x80, 0x33, 0x00, 0x02, 0x00, 0x80), | 781 | 0x80, 0x33, 0x00, 0x02, 0x00, 0x80), |
782 | PHYREGS(0xA408, 0xA008, 0x9C08, 0xDA01, 0xDB01, 0xDC01), | 782 | PHYREGS(0x08A4, 0x08A0, 0x089C, 0x01DA, 0x01DB, 0x01DC), |
783 | }, | 783 | }, |
784 | { .channel = 106, | 784 | { .channel = 106, |
785 | .freq = 5530, /* MHz */ | 785 | .freq = 5530, /* MHz */ |
@@ -787,7 +787,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
787 | RADIOREGS(0x71, 0x02, 0x29, 0x05, 0x40, 0x01, 0x04, 0x0A, | 787 | RADIOREGS(0x71, 0x02, 0x29, 0x05, 0x40, 0x01, 0x04, 0x0A, |
788 | 0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00, | 788 | 0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00, |
789 | 0x80, 0x33, 0x00, 0x02, 0x00, 0x80), | 789 | 0x80, 0x33, 0x00, 0x02, 0x00, 0x80), |
790 | PHYREGS(0xA808, 0xA408, 0xA008, 0xD901, 0xDA01, 0xDB01), | 790 | PHYREGS(0x08A8, 0x08A4, 0x08A0, 0x01D9, 0x01DA, 0x01DB), |
791 | }, | 791 | }, |
792 | { .channel = 108, | 792 | { .channel = 108, |
793 | .freq = 5540, /* MHz */ | 793 | .freq = 5540, /* MHz */ |
@@ -795,7 +795,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
795 | RADIOREGS(0x71, 0x02, 0x2A, 0x05, 0x3A, 0x01, 0x04, 0x0A, | 795 | RADIOREGS(0x71, 0x02, 0x2A, 0x05, 0x3A, 0x01, 0x04, 0x0A, |
796 | 0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00, | 796 | 0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00, |
797 | 0x80, 0x33, 0x00, 0x02, 0x00, 0x80), | 797 | 0x80, 0x33, 0x00, 0x02, 0x00, 0x80), |
798 | PHYREGS(0xAC08, 0xA808, 0xA408, 0xD801, 0xD901, 0xDA01), | 798 | PHYREGS(0x08AC, 0x08A8, 0x08A4, 0x01D8, 0x01D9, 0x01DA), |
799 | }, | 799 | }, |
800 | { .channel = 110, | 800 | { .channel = 110, |
801 | .freq = 5550, /* MHz */ | 801 | .freq = 5550, /* MHz */ |
@@ -803,7 +803,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
803 | RADIOREGS(0x71, 0x02, 0x2B, 0x05, 0x3A, 0x01, 0x04, 0x0A, | 803 | RADIOREGS(0x71, 0x02, 0x2B, 0x05, 0x3A, 0x01, 0x04, 0x0A, |
804 | 0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00, | 804 | 0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00, |
805 | 0x80, 0x33, 0x00, 0x02, 0x00, 0x80), | 805 | 0x80, 0x33, 0x00, 0x02, 0x00, 0x80), |
806 | PHYREGS(0xB008, 0xAC08, 0xA808, 0xD701, 0xD801, 0xD901), | 806 | PHYREGS(0x08B0, 0x08AC, 0x08A8, 0x01D7, 0x01D8, 0x01D9), |
807 | }, | 807 | }, |
808 | { .channel = 112, | 808 | { .channel = 112, |
809 | .freq = 5560, /* MHz */ | 809 | .freq = 5560, /* MHz */ |
@@ -811,7 +811,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
811 | RADIOREGS(0x71, 0x02, 0x2C, 0x05, 0x34, 0x01, 0x04, 0x0A, | 811 | RADIOREGS(0x71, 0x02, 0x2C, 0x05, 0x34, 0x01, 0x04, 0x0A, |
812 | 0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00, | 812 | 0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00, |
813 | 0x80, 0x22, 0x00, 0x01, 0x00, 0x80), | 813 | 0x80, 0x22, 0x00, 0x01, 0x00, 0x80), |
814 | PHYREGS(0xB408, 0xB008, 0xAC08, 0xD701, 0xD701, 0xD801), | 814 | PHYREGS(0x08B4, 0x08B0, 0x08AC, 0x01D7, 0x01D7, 0x01D8), |
815 | }, | 815 | }, |
816 | { .channel = 114, | 816 | { .channel = 114, |
817 | .freq = 5570, /* MHz */ | 817 | .freq = 5570, /* MHz */ |
@@ -819,7 +819,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
819 | RADIOREGS(0x71, 0x02, 0x2D, 0x05, 0x34, 0x01, 0x04, 0x0A, | 819 | RADIOREGS(0x71, 0x02, 0x2D, 0x05, 0x34, 0x01, 0x04, 0x0A, |
820 | 0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00, | 820 | 0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00, |
821 | 0x80, 0x22, 0x00, 0x01, 0x00, 0x80), | 821 | 0x80, 0x22, 0x00, 0x01, 0x00, 0x80), |
822 | PHYREGS(0xB808, 0xB408, 0xB008, 0xD601, 0xD701, 0xD701), | 822 | PHYREGS(0x08B8, 0x08B4, 0x08B0, 0x01D6, 0x01D7, 0x01D7), |
823 | }, | 823 | }, |
824 | { .channel = 116, | 824 | { .channel = 116, |
825 | .freq = 5580, /* MHz */ | 825 | .freq = 5580, /* MHz */ |
@@ -827,7 +827,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
827 | RADIOREGS(0x71, 0x02, 0x2E, 0x04, 0x2E, 0x01, 0x04, 0x0A, | 827 | RADIOREGS(0x71, 0x02, 0x2E, 0x04, 0x2E, 0x01, 0x04, 0x0A, |
828 | 0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00, | 828 | 0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00, |
829 | 0x80, 0x22, 0x00, 0x01, 0x00, 0x80), | 829 | 0x80, 0x22, 0x00, 0x01, 0x00, 0x80), |
830 | PHYREGS(0xBC08, 0xB808, 0xB408, 0xD501, 0xD601, 0xD701), | 830 | PHYREGS(0x08BC, 0x08B8, 0x08B4, 0x01D5, 0x01D6, 0x01D7), |
831 | }, | 831 | }, |
832 | { .channel = 118, | 832 | { .channel = 118, |
833 | .freq = 5590, /* MHz */ | 833 | .freq = 5590, /* MHz */ |
@@ -835,7 +835,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
835 | RADIOREGS(0x71, 0x02, 0x2F, 0x04, 0x2E, 0x01, 0x04, 0x0A, | 835 | RADIOREGS(0x71, 0x02, 0x2F, 0x04, 0x2E, 0x01, 0x04, 0x0A, |
836 | 0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00, | 836 | 0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00, |
837 | 0x80, 0x22, 0x00, 0x01, 0x00, 0x80), | 837 | 0x80, 0x22, 0x00, 0x01, 0x00, 0x80), |
838 | PHYREGS(0xC008, 0xBC08, 0xB808, 0xD401, 0xD501, 0xD601), | 838 | PHYREGS(0x08C0, 0x08BC, 0x08B8, 0x01D4, 0x01D5, 0x01D6), |
839 | }, | 839 | }, |
840 | { .channel = 120, | 840 | { .channel = 120, |
841 | .freq = 5600, /* MHz */ | 841 | .freq = 5600, /* MHz */ |
@@ -843,7 +843,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
843 | RADIOREGS(0x71, 0x02, 0x30, 0x04, 0x28, 0x01, 0x04, 0x0A, | 843 | RADIOREGS(0x71, 0x02, 0x30, 0x04, 0x28, 0x01, 0x04, 0x0A, |
844 | 0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x01, 0x00, | 844 | 0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x01, 0x00, |
845 | 0x80, 0x11, 0x00, 0x01, 0x00, 0x80), | 845 | 0x80, 0x11, 0x00, 0x01, 0x00, 0x80), |
846 | PHYREGS(0xC408, 0xC008, 0xBC08, 0xD301, 0xD401, 0xD501), | 846 | PHYREGS(0x08C4, 0x08C0, 0x08BC, 0x01D3, 0x01D4, 0x01D5), |
847 | }, | 847 | }, |
848 | { .channel = 122, | 848 | { .channel = 122, |
849 | .freq = 5610, /* MHz */ | 849 | .freq = 5610, /* MHz */ |
@@ -851,7 +851,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
851 | RADIOREGS(0x71, 0x02, 0x31, 0x04, 0x28, 0x01, 0x04, 0x0A, | 851 | RADIOREGS(0x71, 0x02, 0x31, 0x04, 0x28, 0x01, 0x04, 0x0A, |
852 | 0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x01, 0x00, | 852 | 0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x01, 0x00, |
853 | 0x80, 0x11, 0x00, 0x01, 0x00, 0x80), | 853 | 0x80, 0x11, 0x00, 0x01, 0x00, 0x80), |
854 | PHYREGS(0xC808, 0xC408, 0xC008, 0xD201, 0xD301, 0xD401), | 854 | PHYREGS(0x08C8, 0x08C4, 0x08C0, 0x01D2, 0x01D3, 0x01D4), |
855 | }, | 855 | }, |
856 | { .channel = 124, | 856 | { .channel = 124, |
857 | .freq = 5620, /* MHz */ | 857 | .freq = 5620, /* MHz */ |
@@ -859,7 +859,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
859 | RADIOREGS(0x71, 0x02, 0x32, 0x04, 0x21, 0x01, 0x04, 0x0A, | 859 | RADIOREGS(0x71, 0x02, 0x32, 0x04, 0x21, 0x01, 0x04, 0x0A, |
860 | 0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00, | 860 | 0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00, |
861 | 0x80, 0x11, 0x00, 0x00, 0x00, 0x80), | 861 | 0x80, 0x11, 0x00, 0x00, 0x00, 0x80), |
862 | PHYREGS(0xCC08, 0xC808, 0xC408, 0xD201, 0xD201, 0xD301), | 862 | PHYREGS(0x08CC, 0x08C8, 0x08C4, 0x01D2, 0x01D2, 0x01D3), |
863 | }, | 863 | }, |
864 | { .channel = 126, | 864 | { .channel = 126, |
865 | .freq = 5630, /* MHz */ | 865 | .freq = 5630, /* MHz */ |
@@ -867,7 +867,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
867 | RADIOREGS(0x71, 0x02, 0x33, 0x04, 0x21, 0x01, 0x04, 0x0A, | 867 | RADIOREGS(0x71, 0x02, 0x33, 0x04, 0x21, 0x01, 0x04, 0x0A, |
868 | 0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00, | 868 | 0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00, |
869 | 0x80, 0x11, 0x00, 0x00, 0x00, 0x80), | 869 | 0x80, 0x11, 0x00, 0x00, 0x00, 0x80), |
870 | PHYREGS(0xD008, 0xCC08, 0xC808, 0xD101, 0xD201, 0xD201), | 870 | PHYREGS(0x08D0, 0x08CC, 0x08C8, 0x01D1, 0x01D2, 0x01D2), |
871 | }, | 871 | }, |
872 | { .channel = 128, | 872 | { .channel = 128, |
873 | .freq = 5640, /* MHz */ | 873 | .freq = 5640, /* MHz */ |
@@ -875,7 +875,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
875 | RADIOREGS(0x71, 0x02, 0x34, 0x03, 0x1C, 0x01, 0x04, 0x0A, | 875 | RADIOREGS(0x71, 0x02, 0x34, 0x03, 0x1C, 0x01, 0x04, 0x0A, |
876 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 876 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
877 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 877 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
878 | PHYREGS(0xD408, 0xD008, 0xCC08, 0xD001, 0xD101, 0xD201), | 878 | PHYREGS(0x08D4, 0x08D0, 0x08CC, 0x01D0, 0x01D1, 0x01D2), |
879 | }, | 879 | }, |
880 | { .channel = 130, | 880 | { .channel = 130, |
881 | .freq = 5650, /* MHz */ | 881 | .freq = 5650, /* MHz */ |
@@ -883,7 +883,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
883 | RADIOREGS(0x71, 0x02, 0x35, 0x03, 0x1C, 0x01, 0x04, 0x0A, | 883 | RADIOREGS(0x71, 0x02, 0x35, 0x03, 0x1C, 0x01, 0x04, 0x0A, |
884 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 884 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
885 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 885 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
886 | PHYREGS(0xD808, 0xD408, 0xD008, 0xCF01, 0xD001, 0xD101), | 886 | PHYREGS(0x08D8, 0x08D4, 0x08D0, 0x01CF, 0x01D0, 0x01D1), |
887 | }, | 887 | }, |
888 | { .channel = 132, | 888 | { .channel = 132, |
889 | .freq = 5660, /* MHz */ | 889 | .freq = 5660, /* MHz */ |
@@ -891,7 +891,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
891 | RADIOREGS(0x71, 0x02, 0x36, 0x03, 0x16, 0x01, 0x04, 0x0A, | 891 | RADIOREGS(0x71, 0x02, 0x36, 0x03, 0x16, 0x01, 0x04, 0x0A, |
892 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 892 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
893 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 893 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
894 | PHYREGS(0xDC08, 0xD808, 0xD408, 0xCE01, 0xCF01, 0xD001), | 894 | PHYREGS(0x08DC, 0x08D8, 0x08D4, 0x01CE, 0x01CF, 0x01D0), |
895 | }, | 895 | }, |
896 | { .channel = 134, | 896 | { .channel = 134, |
897 | .freq = 5670, /* MHz */ | 897 | .freq = 5670, /* MHz */ |
@@ -899,7 +899,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
899 | RADIOREGS(0x71, 0x02, 0x37, 0x03, 0x16, 0x01, 0x04, 0x0A, | 899 | RADIOREGS(0x71, 0x02, 0x37, 0x03, 0x16, 0x01, 0x04, 0x0A, |
900 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 900 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
901 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 901 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
902 | PHYREGS(0xE008, 0xDC08, 0xD808, 0xCE01, 0xCE01, 0xCF01), | 902 | PHYREGS(0x08E0, 0x08DC, 0x08D8, 0x01CE, 0x01CE, 0x01CF), |
903 | }, | 903 | }, |
904 | { .channel = 136, | 904 | { .channel = 136, |
905 | .freq = 5680, /* MHz */ | 905 | .freq = 5680, /* MHz */ |
@@ -907,7 +907,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
907 | RADIOREGS(0x71, 0x02, 0x38, 0x03, 0x10, 0x01, 0x04, 0x0A, | 907 | RADIOREGS(0x71, 0x02, 0x38, 0x03, 0x10, 0x01, 0x04, 0x0A, |
908 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 908 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
909 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 909 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
910 | PHYREGS(0xE408, 0xE008, 0xDC08, 0xCD01, 0xCE01, 0xCE01), | 910 | PHYREGS(0x08E4, 0x08E0, 0x08DC, 0x01CD, 0x01CE, 0x01CE), |
911 | }, | 911 | }, |
912 | { .channel = 138, | 912 | { .channel = 138, |
913 | .freq = 5690, /* MHz */ | 913 | .freq = 5690, /* MHz */ |
@@ -915,7 +915,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
915 | RADIOREGS(0x71, 0x02, 0x39, 0x03, 0x10, 0x01, 0x04, 0x0A, | 915 | RADIOREGS(0x71, 0x02, 0x39, 0x03, 0x10, 0x01, 0x04, 0x0A, |
916 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 916 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
917 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 917 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
918 | PHYREGS(0xE808, 0xE408, 0xE008, 0xCC01, 0xCD01, 0xCE01), | 918 | PHYREGS(0x08E8, 0x08E4, 0x08E0, 0x01CC, 0x01CD, 0x01CE), |
919 | }, | 919 | }, |
920 | { .channel = 140, | 920 | { .channel = 140, |
921 | .freq = 5700, /* MHz */ | 921 | .freq = 5700, /* MHz */ |
@@ -923,7 +923,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
923 | RADIOREGS(0x71, 0x02, 0x3A, 0x02, 0x0A, 0x01, 0x04, 0x0A, | 923 | RADIOREGS(0x71, 0x02, 0x3A, 0x02, 0x0A, 0x01, 0x04, 0x0A, |
924 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 924 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
925 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 925 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
926 | PHYREGS(0xEC08, 0xE808, 0xE408, 0xCB01, 0xCC01, 0xCD01), | 926 | PHYREGS(0x08EC, 0x08E8, 0x08E4, 0x01CB, 0x01CC, 0x01CD), |
927 | }, | 927 | }, |
928 | { .channel = 142, | 928 | { .channel = 142, |
929 | .freq = 5710, /* MHz */ | 929 | .freq = 5710, /* MHz */ |
@@ -931,7 +931,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
931 | RADIOREGS(0x71, 0x02, 0x3B, 0x02, 0x0A, 0x01, 0x04, 0x0A, | 931 | RADIOREGS(0x71, 0x02, 0x3B, 0x02, 0x0A, 0x01, 0x04, 0x0A, |
932 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 932 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
933 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 933 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
934 | PHYREGS(0xF008, 0xEC08, 0xE808, 0xCA01, 0xCB01, 0xCC01), | 934 | PHYREGS(0x08F0, 0x08EC, 0x08E8, 0x01CA, 0x01CB, 0x01CC), |
935 | }, | 935 | }, |
936 | { .channel = 144, | 936 | { .channel = 144, |
937 | .freq = 5720, /* MHz */ | 937 | .freq = 5720, /* MHz */ |
@@ -939,7 +939,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
939 | RADIOREGS(0x71, 0x02, 0x3C, 0x02, 0x0A, 0x01, 0x04, 0x0A, | 939 | RADIOREGS(0x71, 0x02, 0x3C, 0x02, 0x0A, 0x01, 0x04, 0x0A, |
940 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 940 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
941 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 941 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
942 | PHYREGS(0xF408, 0xF008, 0xEC08, 0xC901, 0xCA01, 0xCB01), | 942 | PHYREGS(0x08F4, 0x08F0, 0x08EC, 0x01C9, 0x01CA, 0x01CB), |
943 | }, | 943 | }, |
944 | { .channel = 145, | 944 | { .channel = 145, |
945 | .freq = 5725, /* MHz */ | 945 | .freq = 5725, /* MHz */ |
@@ -947,7 +947,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
947 | RADIOREGS(0x72, 0x04, 0x79, 0x02, 0x03, 0x01, 0x03, 0x14, | 947 | RADIOREGS(0x72, 0x04, 0x79, 0x02, 0x03, 0x01, 0x03, 0x14, |
948 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 948 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
949 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 949 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
950 | PHYREGS(0xF608, 0xF208, 0xEE08, 0xC901, 0xCA01, 0xCB01), | 950 | PHYREGS(0x08F6, 0x08F2, 0x08EE, 0x01C9, 0x01CA, 0x01CB), |
951 | }, | 951 | }, |
952 | { .channel = 146, | 952 | { .channel = 146, |
953 | .freq = 5730, /* MHz */ | 953 | .freq = 5730, /* MHz */ |
@@ -955,7 +955,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
955 | RADIOREGS(0x71, 0x02, 0x3D, 0x02, 0x0A, 0x01, 0x04, 0x0A, | 955 | RADIOREGS(0x71, 0x02, 0x3D, 0x02, 0x0A, 0x01, 0x04, 0x0A, |
956 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 956 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
957 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 957 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
958 | PHYREGS(0xF808, 0xF408, 0xF008, 0xC901, 0xC901, 0xCA01), | 958 | PHYREGS(0x08F8, 0x08F4, 0x08F0, 0x01C9, 0x01C9, 0x01CA), |
959 | }, | 959 | }, |
960 | { .channel = 147, | 960 | { .channel = 147, |
961 | .freq = 5735, /* MHz */ | 961 | .freq = 5735, /* MHz */ |
@@ -963,7 +963,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
963 | RADIOREGS(0x72, 0x04, 0x7B, 0x02, 0x03, 0x01, 0x03, 0x14, | 963 | RADIOREGS(0x72, 0x04, 0x7B, 0x02, 0x03, 0x01, 0x03, 0x14, |
964 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 964 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
965 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 965 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
966 | PHYREGS(0xFA08, 0xF608, 0xF208, 0xC801, 0xC901, 0xCA01), | 966 | PHYREGS(0x08FA, 0x08F6, 0x08F2, 0x01C8, 0x01C9, 0x01CA), |
967 | }, | 967 | }, |
968 | { .channel = 148, | 968 | { .channel = 148, |
969 | .freq = 5740, /* MHz */ | 969 | .freq = 5740, /* MHz */ |
@@ -971,7 +971,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
971 | RADIOREGS(0x71, 0x02, 0x3E, 0x02, 0x0A, 0x01, 0x04, 0x0A, | 971 | RADIOREGS(0x71, 0x02, 0x3E, 0x02, 0x0A, 0x01, 0x04, 0x0A, |
972 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 972 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
973 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 973 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
974 | PHYREGS(0xFC08, 0xF808, 0xF408, 0xC801, 0xC901, 0xC901), | 974 | PHYREGS(0x08FC, 0x08F8, 0x08F4, 0x01C8, 0x01C9, 0x01C9), |
975 | }, | 975 | }, |
976 | { .channel = 149, | 976 | { .channel = 149, |
977 | .freq = 5745, /* MHz */ | 977 | .freq = 5745, /* MHz */ |
@@ -979,7 +979,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
979 | RADIOREGS(0x72, 0x04, 0x7D, 0x02, 0xFE, 0x00, 0x03, 0x14, | 979 | RADIOREGS(0x72, 0x04, 0x7D, 0x02, 0xFE, 0x00, 0x03, 0x14, |
980 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 980 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
981 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 981 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
982 | PHYREGS(0xFE08, 0xFA08, 0xF608, 0xC801, 0xC801, 0xC901), | 982 | PHYREGS(0x08FE, 0x08FA, 0x08F6, 0x01C8, 0x01C8, 0x01C9), |
983 | }, | 983 | }, |
984 | { .channel = 150, | 984 | { .channel = 150, |
985 | .freq = 5750, /* MHz */ | 985 | .freq = 5750, /* MHz */ |
@@ -987,7 +987,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
987 | RADIOREGS(0x71, 0x02, 0x3F, 0x02, 0x0A, 0x01, 0x04, 0x0A, | 987 | RADIOREGS(0x71, 0x02, 0x3F, 0x02, 0x0A, 0x01, 0x04, 0x0A, |
988 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 988 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
989 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 989 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
990 | PHYREGS(0x0009, 0xFC08, 0xF808, 0xC701, 0xC801, 0xC901), | 990 | PHYREGS(0x0900, 0x08FC, 0x08F8, 0x01C7, 0x01C8, 0x01C9), |
991 | }, | 991 | }, |
992 | { .channel = 151, | 992 | { .channel = 151, |
993 | .freq = 5755, /* MHz */ | 993 | .freq = 5755, /* MHz */ |
@@ -995,7 +995,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
995 | RADIOREGS(0x72, 0x04, 0x7F, 0x02, 0xFE, 0x00, 0x03, 0x14, | 995 | RADIOREGS(0x72, 0x04, 0x7F, 0x02, 0xFE, 0x00, 0x03, 0x14, |
996 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 996 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
997 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 997 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
998 | PHYREGS(0x0209, 0xFE08, 0xFA08, 0xC701, 0xC801, 0xC801), | 998 | PHYREGS(0x0902, 0x08FE, 0x08FA, 0x01C7, 0x01C8, 0x01C8), |
999 | }, | 999 | }, |
1000 | { .channel = 152, | 1000 | { .channel = 152, |
1001 | .freq = 5760, /* MHz */ | 1001 | .freq = 5760, /* MHz */ |
@@ -1003,7 +1003,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1003 | RADIOREGS(0x71, 0x02, 0x40, 0x02, 0x0A, 0x01, 0x04, 0x0A, | 1003 | RADIOREGS(0x71, 0x02, 0x40, 0x02, 0x0A, 0x01, 0x04, 0x0A, |
1004 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 1004 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
1005 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 1005 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
1006 | PHYREGS(0x0409, 0x0009, 0xFC08, 0xC601, 0xC701, 0xC801), | 1006 | PHYREGS(0x0904, 0x0900, 0x08FC, 0x01C6, 0x01C7, 0x01C8), |
1007 | }, | 1007 | }, |
1008 | { .channel = 153, | 1008 | { .channel = 153, |
1009 | .freq = 5765, /* MHz */ | 1009 | .freq = 5765, /* MHz */ |
@@ -1011,7 +1011,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1011 | RADIOREGS(0x72, 0x04, 0x81, 0x02, 0xF8, 0x00, 0x03, 0x14, | 1011 | RADIOREGS(0x72, 0x04, 0x81, 0x02, 0xF8, 0x00, 0x03, 0x14, |
1012 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 1012 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
1013 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 1013 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
1014 | PHYREGS(0x0609, 0x0209, 0xFE08, 0xC601, 0xC701, 0xC801), | 1014 | PHYREGS(0x0906, 0x0902, 0x08FE, 0x01C6, 0x01C7, 0x01C8), |
1015 | }, | 1015 | }, |
1016 | { .channel = 154, | 1016 | { .channel = 154, |
1017 | .freq = 5770, /* MHz */ | 1017 | .freq = 5770, /* MHz */ |
@@ -1019,7 +1019,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1019 | RADIOREGS(0x71, 0x02, 0x41, 0x02, 0x0A, 0x01, 0x04, 0x0A, | 1019 | RADIOREGS(0x71, 0x02, 0x41, 0x02, 0x0A, 0x01, 0x04, 0x0A, |
1020 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 1020 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
1021 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 1021 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
1022 | PHYREGS(0x0809, 0x0409, 0x0009, 0xC601, 0xC601, 0xC701), | 1022 | PHYREGS(0x0908, 0x0904, 0x0900, 0x01C6, 0x01C6, 0x01C7), |
1023 | }, | 1023 | }, |
1024 | { .channel = 155, | 1024 | { .channel = 155, |
1025 | .freq = 5775, /* MHz */ | 1025 | .freq = 5775, /* MHz */ |
@@ -1027,7 +1027,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1027 | RADIOREGS(0x72, 0x04, 0x83, 0x02, 0xF8, 0x00, 0x03, 0x14, | 1027 | RADIOREGS(0x72, 0x04, 0x83, 0x02, 0xF8, 0x00, 0x03, 0x14, |
1028 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 1028 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
1029 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 1029 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
1030 | PHYREGS(0x0A09, 0x0609, 0x0209, 0xC501, 0xC601, 0xC701), | 1030 | PHYREGS(0x090A, 0x0906, 0x0902, 0x01C5, 0x01C6, 0x01C7), |
1031 | }, | 1031 | }, |
1032 | { .channel = 156, | 1032 | { .channel = 156, |
1033 | .freq = 5780, /* MHz */ | 1033 | .freq = 5780, /* MHz */ |
@@ -1035,7 +1035,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1035 | RADIOREGS(0x71, 0x02, 0x42, 0x02, 0x0A, 0x01, 0x04, 0x0A, | 1035 | RADIOREGS(0x71, 0x02, 0x42, 0x02, 0x0A, 0x01, 0x04, 0x0A, |
1036 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 1036 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
1037 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 1037 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
1038 | PHYREGS(0x0C09, 0x0809, 0x0409, 0xC501, 0xC601, 0xC601), | 1038 | PHYREGS(0x090C, 0x0908, 0x0904, 0x01C5, 0x01C6, 0x01C6), |
1039 | }, | 1039 | }, |
1040 | { .channel = 157, | 1040 | { .channel = 157, |
1041 | .freq = 5785, /* MHz */ | 1041 | .freq = 5785, /* MHz */ |
@@ -1043,7 +1043,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1043 | RADIOREGS(0x72, 0x04, 0x85, 0x02, 0xF2, 0x00, 0x03, 0x14, | 1043 | RADIOREGS(0x72, 0x04, 0x85, 0x02, 0xF2, 0x00, 0x03, 0x14, |
1044 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 1044 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
1045 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 1045 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
1046 | PHYREGS(0x0E09, 0x0A09, 0x0609, 0xC401, 0xC501, 0xC601), | 1046 | PHYREGS(0x090E, 0x090A, 0x0906, 0x01C4, 0x01C5, 0x01C6), |
1047 | }, | 1047 | }, |
1048 | { .channel = 158, | 1048 | { .channel = 158, |
1049 | .freq = 5790, /* MHz */ | 1049 | .freq = 5790, /* MHz */ |
@@ -1051,7 +1051,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1051 | RADIOREGS(0x71, 0x02, 0x43, 0x02, 0x0A, 0x01, 0x04, 0x0A, | 1051 | RADIOREGS(0x71, 0x02, 0x43, 0x02, 0x0A, 0x01, 0x04, 0x0A, |
1052 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 1052 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
1053 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 1053 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
1054 | PHYREGS(0x1009, 0x0C09, 0x0809, 0xC401, 0xC501, 0xC601), | 1054 | PHYREGS(0x0910, 0x090C, 0x0908, 0x01C4, 0x01C5, 0x01C6), |
1055 | }, | 1055 | }, |
1056 | { .channel = 159, | 1056 | { .channel = 159, |
1057 | .freq = 5795, /* MHz */ | 1057 | .freq = 5795, /* MHz */ |
@@ -1059,7 +1059,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1059 | RADIOREGS(0x72, 0x04, 0x87, 0x02, 0xF2, 0x00, 0x03, 0x14, | 1059 | RADIOREGS(0x72, 0x04, 0x87, 0x02, 0xF2, 0x00, 0x03, 0x14, |
1060 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 1060 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
1061 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 1061 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
1062 | PHYREGS(0x1209, 0x0E09, 0x0A09, 0xC401, 0xC401, 0xC501), | 1062 | PHYREGS(0x0912, 0x090E, 0x090A, 0x01C4, 0x01C4, 0x01C5), |
1063 | }, | 1063 | }, |
1064 | { .channel = 160, | 1064 | { .channel = 160, |
1065 | .freq = 5800, /* MHz */ | 1065 | .freq = 5800, /* MHz */ |
@@ -1067,7 +1067,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1067 | RADIOREGS(0x71, 0x02, 0x44, 0x01, 0x0A, 0x01, 0x04, 0x0A, | 1067 | RADIOREGS(0x71, 0x02, 0x44, 0x01, 0x0A, 0x01, 0x04, 0x0A, |
1068 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 1068 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
1069 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 1069 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
1070 | PHYREGS(0x1409, 0x1009, 0x0C09, 0xC301, 0xC401, 0xC501), | 1070 | PHYREGS(0x0914, 0x0910, 0x090C, 0x01C3, 0x01C4, 0x01C5), |
1071 | }, | 1071 | }, |
1072 | { .channel = 161, | 1072 | { .channel = 161, |
1073 | .freq = 5805, /* MHz */ | 1073 | .freq = 5805, /* MHz */ |
@@ -1075,7 +1075,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1075 | RADIOREGS(0x72, 0x04, 0x89, 0x01, 0xED, 0x00, 0x03, 0x14, | 1075 | RADIOREGS(0x72, 0x04, 0x89, 0x01, 0xED, 0x00, 0x03, 0x14, |
1076 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 1076 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
1077 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 1077 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
1078 | PHYREGS(0x1609, 0x1209, 0x0E09, 0xC301, 0xC401, 0xC401), | 1078 | PHYREGS(0x0916, 0x0912, 0x090E, 0x01C3, 0x01C4, 0x01C4), |
1079 | }, | 1079 | }, |
1080 | { .channel = 162, | 1080 | { .channel = 162, |
1081 | .freq = 5810, /* MHz */ | 1081 | .freq = 5810, /* MHz */ |
@@ -1083,7 +1083,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1083 | RADIOREGS(0x71, 0x02, 0x45, 0x01, 0x0A, 0x01, 0x04, 0x0A, | 1083 | RADIOREGS(0x71, 0x02, 0x45, 0x01, 0x0A, 0x01, 0x04, 0x0A, |
1084 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 1084 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
1085 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 1085 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
1086 | PHYREGS(0x1809, 0x1409, 0x1009, 0xC201, 0xC301, 0xC401), | 1086 | PHYREGS(0x0918, 0x0914, 0x0910, 0x01C2, 0x01C3, 0x01C4), |
1087 | }, | 1087 | }, |
1088 | { .channel = 163, | 1088 | { .channel = 163, |
1089 | .freq = 5815, /* MHz */ | 1089 | .freq = 5815, /* MHz */ |
@@ -1091,7 +1091,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1091 | RADIOREGS(0x72, 0x04, 0x8B, 0x01, 0xED, 0x00, 0x03, 0x14, | 1091 | RADIOREGS(0x72, 0x04, 0x8B, 0x01, 0xED, 0x00, 0x03, 0x14, |
1092 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 1092 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
1093 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 1093 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
1094 | PHYREGS(0x1A09, 0x1609, 0x1209, 0xC201, 0xC301, 0xC401), | 1094 | PHYREGS(0x091A, 0x0916, 0x0912, 0x01C2, 0x01C3, 0x01C4), |
1095 | }, | 1095 | }, |
1096 | { .channel = 164, | 1096 | { .channel = 164, |
1097 | .freq = 5820, /* MHz */ | 1097 | .freq = 5820, /* MHz */ |
@@ -1099,7 +1099,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1099 | RADIOREGS(0x71, 0x02, 0x46, 0x01, 0x0A, 0x01, 0x04, 0x0A, | 1099 | RADIOREGS(0x71, 0x02, 0x46, 0x01, 0x0A, 0x01, 0x04, 0x0A, |
1100 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 1100 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
1101 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 1101 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
1102 | PHYREGS(0x1C09, 0x1809, 0x1409, 0xC201, 0xC201, 0xC301), | 1102 | PHYREGS(0x091C, 0x0918, 0x0914, 0x01C2, 0x01C2, 0x01C3), |
1103 | }, | 1103 | }, |
1104 | { .channel = 165, | 1104 | { .channel = 165, |
1105 | .freq = 5825, /* MHz */ | 1105 | .freq = 5825, /* MHz */ |
@@ -1107,7 +1107,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1107 | RADIOREGS(0x72, 0x04, 0x8D, 0x01, 0xED, 0x00, 0x03, 0x14, | 1107 | RADIOREGS(0x72, 0x04, 0x8D, 0x01, 0xED, 0x00, 0x03, 0x14, |
1108 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 1108 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
1109 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 1109 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
1110 | PHYREGS(0x1E09, 0x1A09, 0x1609, 0xC101, 0xC201, 0xC301), | 1110 | PHYREGS(0x091E, 0x091A, 0x0916, 0x01C1, 0x01C2, 0x01C3), |
1111 | }, | 1111 | }, |
1112 | { .channel = 166, | 1112 | { .channel = 166, |
1113 | .freq = 5830, /* MHz */ | 1113 | .freq = 5830, /* MHz */ |
@@ -1115,7 +1115,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1115 | RADIOREGS(0x71, 0x02, 0x47, 0x01, 0x0A, 0x01, 0x04, 0x0A, | 1115 | RADIOREGS(0x71, 0x02, 0x47, 0x01, 0x0A, 0x01, 0x04, 0x0A, |
1116 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 1116 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
1117 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 1117 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
1118 | PHYREGS(0x2009, 0x1C09, 0x1809, 0xC101, 0xC201, 0xC201), | 1118 | PHYREGS(0x0920, 0x091C, 0x0918, 0x01C1, 0x01C2, 0x01C2), |
1119 | }, | 1119 | }, |
1120 | { .channel = 168, | 1120 | { .channel = 168, |
1121 | .freq = 5840, /* MHz */ | 1121 | .freq = 5840, /* MHz */ |
@@ -1123,7 +1123,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1123 | RADIOREGS(0x71, 0x02, 0x48, 0x01, 0x0A, 0x01, 0x04, 0x0A, | 1123 | RADIOREGS(0x71, 0x02, 0x48, 0x01, 0x0A, 0x01, 0x04, 0x0A, |
1124 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 1124 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
1125 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 1125 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
1126 | PHYREGS(0x2409, 0x2009, 0x1C09, 0xC001, 0xC101, 0xC201), | 1126 | PHYREGS(0x0924, 0x0920, 0x091C, 0x01C0, 0x01C1, 0x01C2), |
1127 | }, | 1127 | }, |
1128 | { .channel = 170, | 1128 | { .channel = 170, |
1129 | .freq = 5850, /* MHz */ | 1129 | .freq = 5850, /* MHz */ |
@@ -1131,7 +1131,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1131 | RADIOREGS(0x71, 0x02, 0x49, 0x01, 0xE0, 0x00, 0x04, 0x0A, | 1131 | RADIOREGS(0x71, 0x02, 0x49, 0x01, 0xE0, 0x00, 0x04, 0x0A, |
1132 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 1132 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
1133 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 1133 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
1134 | PHYREGS(0x2809, 0x2409, 0x2009, 0xBF01, 0xC001, 0xC101), | 1134 | PHYREGS(0x0928, 0x0924, 0x0920, 0x01BF, 0x01C0, 0x01C1), |
1135 | }, | 1135 | }, |
1136 | { .channel = 172, | 1136 | { .channel = 172, |
1137 | .freq = 5860, /* MHz */ | 1137 | .freq = 5860, /* MHz */ |
@@ -1139,7 +1139,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1139 | RADIOREGS(0x71, 0x02, 0x4A, 0x01, 0xDE, 0x00, 0x04, 0x0A, | 1139 | RADIOREGS(0x71, 0x02, 0x4A, 0x01, 0xDE, 0x00, 0x04, 0x0A, |
1140 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 1140 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
1141 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 1141 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
1142 | PHYREGS(0x2C09, 0x2809, 0x2409, 0xBF01, 0xBF01, 0xC001), | 1142 | PHYREGS(0x092C, 0x0928, 0x0924, 0x01BF, 0x01BF, 0x01C0), |
1143 | }, | 1143 | }, |
1144 | { .channel = 174, | 1144 | { .channel = 174, |
1145 | .freq = 5870, /* MHz */ | 1145 | .freq = 5870, /* MHz */ |
@@ -1147,7 +1147,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1147 | RADIOREGS(0x71, 0x02, 0x4B, 0x00, 0xDB, 0x00, 0x04, 0x0A, | 1147 | RADIOREGS(0x71, 0x02, 0x4B, 0x00, 0xDB, 0x00, 0x04, 0x0A, |
1148 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 1148 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
1149 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 1149 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
1150 | PHYREGS(0x3009, 0x2C09, 0x2809, 0xBE01, 0xBF01, 0xBF01), | 1150 | PHYREGS(0x0930, 0x092C, 0x0928, 0x01BE, 0x01BF, 0x01BF), |
1151 | }, | 1151 | }, |
1152 | { .channel = 176, | 1152 | { .channel = 176, |
1153 | .freq = 5880, /* MHz */ | 1153 | .freq = 5880, /* MHz */ |
@@ -1155,7 +1155,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1155 | RADIOREGS(0x71, 0x02, 0x4C, 0x00, 0xD8, 0x00, 0x04, 0x0A, | 1155 | RADIOREGS(0x71, 0x02, 0x4C, 0x00, 0xD8, 0x00, 0x04, 0x0A, |
1156 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 1156 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
1157 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 1157 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
1158 | PHYREGS(0x3409, 0x3009, 0x2C09, 0xBD01, 0xBE01, 0xBF01), | 1158 | PHYREGS(0x0934, 0x0930, 0x092C, 0x01BD, 0x01BE, 0x01BF), |
1159 | }, | 1159 | }, |
1160 | { .channel = 178, | 1160 | { .channel = 178, |
1161 | .freq = 5890, /* MHz */ | 1161 | .freq = 5890, /* MHz */ |
@@ -1163,7 +1163,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1163 | RADIOREGS(0x71, 0x02, 0x4D, 0x00, 0xD6, 0x00, 0x04, 0x0A, | 1163 | RADIOREGS(0x71, 0x02, 0x4D, 0x00, 0xD6, 0x00, 0x04, 0x0A, |
1164 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 1164 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
1165 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 1165 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
1166 | PHYREGS(0x3809, 0x3409, 0x3009, 0xBC01, 0xBD01, 0xBE01), | 1166 | PHYREGS(0x0938, 0x0934, 0x0930, 0x01BC, 0x01BD, 0x01BE), |
1167 | }, | 1167 | }, |
1168 | { .channel = 180, | 1168 | { .channel = 180, |
1169 | .freq = 5900, /* MHz */ | 1169 | .freq = 5900, /* MHz */ |
@@ -1171,7 +1171,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1171 | RADIOREGS(0x71, 0x02, 0x4E, 0x00, 0xD3, 0x00, 0x04, 0x0A, | 1171 | RADIOREGS(0x71, 0x02, 0x4E, 0x00, 0xD3, 0x00, 0x04, 0x0A, |
1172 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 1172 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
1173 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 1173 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
1174 | PHYREGS(0x3C09, 0x3809, 0x3409, 0xBC01, 0xBC01, 0xBD01), | 1174 | PHYREGS(0x093C, 0x0938, 0x0934, 0x01BC, 0x01BC, 0x01BD), |
1175 | }, | 1175 | }, |
1176 | { .channel = 182, | 1176 | { .channel = 182, |
1177 | .freq = 5910, /* MHz */ | 1177 | .freq = 5910, /* MHz */ |
@@ -1179,7 +1179,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1179 | RADIOREGS(0x71, 0x02, 0x4F, 0x00, 0xD6, 0x00, 0x04, 0x0A, | 1179 | RADIOREGS(0x71, 0x02, 0x4F, 0x00, 0xD6, 0x00, 0x04, 0x0A, |
1180 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 1180 | 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
1181 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), | 1181 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x80), |
1182 | PHYREGS(0x4009, 0x3C09, 0x3809, 0xBB01, 0xBC01, 0xBC01), | 1182 | PHYREGS(0x0940, 0x093C, 0x0938, 0x01BB, 0x01BC, 0x01BC), |
1183 | }, | 1183 | }, |
1184 | { .channel = 1, | 1184 | { .channel = 1, |
1185 | .freq = 2412, /* MHz */ | 1185 | .freq = 2412, /* MHz */ |
@@ -1187,7 +1187,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1187 | RADIOREGS(0x73, 0x09, 0x6C, 0x0F, 0x00, 0x01, 0x07, 0x15, | 1187 | RADIOREGS(0x73, 0x09, 0x6C, 0x0F, 0x00, 0x01, 0x07, 0x15, |
1188 | 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0D, 0x0C, | 1188 | 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0D, 0x0C, |
1189 | 0x80, 0xFF, 0x88, 0x0D, 0x0C, 0x80), | 1189 | 0x80, 0xFF, 0x88, 0x0D, 0x0C, 0x80), |
1190 | PHYREGS(0xC903, 0xC503, 0xC103, 0x3A04, 0x3F04, 0x4304), | 1190 | PHYREGS(0x03C9, 0x03C5, 0x03C1, 0x043A, 0x043F, 0x0443), |
1191 | }, | 1191 | }, |
1192 | { .channel = 2, | 1192 | { .channel = 2, |
1193 | .freq = 2417, /* MHz */ | 1193 | .freq = 2417, /* MHz */ |
@@ -1195,7 +1195,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1195 | RADIOREGS(0x73, 0x09, 0x71, 0x0F, 0x00, 0x01, 0x07, 0x15, | 1195 | RADIOREGS(0x73, 0x09, 0x71, 0x0F, 0x00, 0x01, 0x07, 0x15, |
1196 | 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0B, | 1196 | 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0B, |
1197 | 0x80, 0xFF, 0x88, 0x0C, 0x0B, 0x80), | 1197 | 0x80, 0xFF, 0x88, 0x0C, 0x0B, 0x80), |
1198 | PHYREGS(0xCB03, 0xC703, 0xC303, 0x3804, 0x3D04, 0x4104), | 1198 | PHYREGS(0x03CB, 0x03C7, 0x03C3, 0x0438, 0x043D, 0x0441), |
1199 | }, | 1199 | }, |
1200 | { .channel = 3, | 1200 | { .channel = 3, |
1201 | .freq = 2422, /* MHz */ | 1201 | .freq = 2422, /* MHz */ |
@@ -1203,7 +1203,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1203 | RADIOREGS(0x73, 0x09, 0x76, 0x0F, 0x00, 0x01, 0x07, 0x15, | 1203 | RADIOREGS(0x73, 0x09, 0x76, 0x0F, 0x00, 0x01, 0x07, 0x15, |
1204 | 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0A, | 1204 | 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0A, |
1205 | 0x80, 0xFF, 0x88, 0x0C, 0x0A, 0x80), | 1205 | 0x80, 0xFF, 0x88, 0x0C, 0x0A, 0x80), |
1206 | PHYREGS(0xCD03, 0xC903, 0xC503, 0x3604, 0x3A04, 0x3F04), | 1206 | PHYREGS(0x03CD, 0x03C9, 0x03C5, 0x0436, 0x043A, 0x043F), |
1207 | }, | 1207 | }, |
1208 | { .channel = 4, | 1208 | { .channel = 4, |
1209 | .freq = 2427, /* MHz */ | 1209 | .freq = 2427, /* MHz */ |
@@ -1211,7 +1211,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1211 | RADIOREGS(0x73, 0x09, 0x7B, 0x0F, 0x00, 0x01, 0x07, 0x15, | 1211 | RADIOREGS(0x73, 0x09, 0x7B, 0x0F, 0x00, 0x01, 0x07, 0x15, |
1212 | 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0A, | 1212 | 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0A, |
1213 | 0x80, 0xFF, 0x88, 0x0C, 0x0A, 0x80), | 1213 | 0x80, 0xFF, 0x88, 0x0C, 0x0A, 0x80), |
1214 | PHYREGS(0xCF03, 0xCB03, 0xC703, 0x3404, 0x3804, 0x3D04), | 1214 | PHYREGS(0x03CF, 0x03CB, 0x03C7, 0x0434, 0x0438, 0x043D), |
1215 | }, | 1215 | }, |
1216 | { .channel = 5, | 1216 | { .channel = 5, |
1217 | .freq = 2432, /* MHz */ | 1217 | .freq = 2432, /* MHz */ |
@@ -1219,7 +1219,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1219 | RADIOREGS(0x73, 0x09, 0x80, 0x0F, 0x00, 0x01, 0x07, 0x15, | 1219 | RADIOREGS(0x73, 0x09, 0x80, 0x0F, 0x00, 0x01, 0x07, 0x15, |
1220 | 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x09, | 1220 | 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x09, |
1221 | 0x80, 0xFF, 0x88, 0x0C, 0x09, 0x80), | 1221 | 0x80, 0xFF, 0x88, 0x0C, 0x09, 0x80), |
1222 | PHYREGS(0xD103, 0xCD03, 0xC903, 0x3104, 0x3604, 0x3A04), | 1222 | PHYREGS(0x03D1, 0x03CD, 0x03C9, 0x0431, 0x0436, 0x043A), |
1223 | }, | 1223 | }, |
1224 | { .channel = 6, | 1224 | { .channel = 6, |
1225 | .freq = 2437, /* MHz */ | 1225 | .freq = 2437, /* MHz */ |
@@ -1227,7 +1227,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1227 | RADIOREGS(0x73, 0x09, 0x85, 0x0F, 0x00, 0x01, 0x07, 0x15, | 1227 | RADIOREGS(0x73, 0x09, 0x85, 0x0F, 0x00, 0x01, 0x07, 0x15, |
1228 | 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0B, 0x08, | 1228 | 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0B, 0x08, |
1229 | 0x80, 0xFF, 0x88, 0x0B, 0x08, 0x80), | 1229 | 0x80, 0xFF, 0x88, 0x0B, 0x08, 0x80), |
1230 | PHYREGS(0xD303, 0xCF03, 0xCB03, 0x2F04, 0x3404, 0x3804), | 1230 | PHYREGS(0x03D3, 0x03CF, 0x03CB, 0x042F, 0x0434, 0x0438), |
1231 | }, | 1231 | }, |
1232 | { .channel = 7, | 1232 | { .channel = 7, |
1233 | .freq = 2442, /* MHz */ | 1233 | .freq = 2442, /* MHz */ |
@@ -1235,7 +1235,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1235 | RADIOREGS(0x73, 0x09, 0x8A, 0x0F, 0x00, 0x01, 0x07, 0x15, | 1235 | RADIOREGS(0x73, 0x09, 0x8A, 0x0F, 0x00, 0x01, 0x07, 0x15, |
1236 | 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0A, 0x07, | 1236 | 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0A, 0x07, |
1237 | 0x80, 0xFF, 0x88, 0x0A, 0x07, 0x80), | 1237 | 0x80, 0xFF, 0x88, 0x0A, 0x07, 0x80), |
1238 | PHYREGS(0xD503, 0xD103, 0xCD03, 0x2D04, 0x3104, 0x3604), | 1238 | PHYREGS(0x03D5, 0x03D1, 0x03CD, 0x042D, 0x0431, 0x0436), |
1239 | }, | 1239 | }, |
1240 | { .channel = 8, | 1240 | { .channel = 8, |
1241 | .freq = 2447, /* MHz */ | 1241 | .freq = 2447, /* MHz */ |
@@ -1243,7 +1243,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1243 | RADIOREGS(0x73, 0x09, 0x8F, 0x0F, 0x00, 0x01, 0x07, 0x15, | 1243 | RADIOREGS(0x73, 0x09, 0x8F, 0x0F, 0x00, 0x01, 0x07, 0x15, |
1244 | 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0A, 0x06, | 1244 | 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0A, 0x06, |
1245 | 0x80, 0xFF, 0x88, 0x0A, 0x06, 0x80), | 1245 | 0x80, 0xFF, 0x88, 0x0A, 0x06, 0x80), |
1246 | PHYREGS(0xD703, 0xD303, 0xCF03, 0x2B04, 0x2F04, 0x3404), | 1246 | PHYREGS(0x03D7, 0x03D3, 0x03CF, 0x042B, 0x042F, 0x0434), |
1247 | }, | 1247 | }, |
1248 | { .channel = 9, | 1248 | { .channel = 9, |
1249 | .freq = 2452, /* MHz */ | 1249 | .freq = 2452, /* MHz */ |
@@ -1251,7 +1251,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1251 | RADIOREGS(0x73, 0x09, 0x94, 0x0F, 0x00, 0x01, 0x07, 0x15, | 1251 | RADIOREGS(0x73, 0x09, 0x94, 0x0F, 0x00, 0x01, 0x07, 0x15, |
1252 | 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x09, 0x06, | 1252 | 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x09, 0x06, |
1253 | 0x80, 0xFF, 0x88, 0x09, 0x06, 0x80), | 1253 | 0x80, 0xFF, 0x88, 0x09, 0x06, 0x80), |
1254 | PHYREGS(0xD903, 0xD503, 0xD103, 0x2904, 0x2D04, 0x3104), | 1254 | PHYREGS(0x03D9, 0x03D5, 0x03D1, 0x0429, 0x042D, 0x0431), |
1255 | }, | 1255 | }, |
1256 | { .channel = 10, | 1256 | { .channel = 10, |
1257 | .freq = 2457, /* MHz */ | 1257 | .freq = 2457, /* MHz */ |
@@ -1259,7 +1259,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1259 | RADIOREGS(0x73, 0x09, 0x99, 0x0F, 0x00, 0x01, 0x07, 0x15, | 1259 | RADIOREGS(0x73, 0x09, 0x99, 0x0F, 0x00, 0x01, 0x07, 0x15, |
1260 | 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x05, | 1260 | 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x05, |
1261 | 0x80, 0xFF, 0x88, 0x08, 0x05, 0x80), | 1261 | 0x80, 0xFF, 0x88, 0x08, 0x05, 0x80), |
1262 | PHYREGS(0xDB03, 0xD703, 0xD303, 0x2704, 0x2B04, 0x2F04), | 1262 | PHYREGS(0x03DB, 0x03D7, 0x03D3, 0x0427, 0x042B, 0x042F), |
1263 | }, | 1263 | }, |
1264 | { .channel = 11, | 1264 | { .channel = 11, |
1265 | .freq = 2462, /* MHz */ | 1265 | .freq = 2462, /* MHz */ |
@@ -1267,7 +1267,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1267 | RADIOREGS(0x73, 0x09, 0x9E, 0x0F, 0x00, 0x01, 0x07, 0x15, | 1267 | RADIOREGS(0x73, 0x09, 0x9E, 0x0F, 0x00, 0x01, 0x07, 0x15, |
1268 | 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x04, | 1268 | 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x04, |
1269 | 0x80, 0xFF, 0x88, 0x08, 0x04, 0x80), | 1269 | 0x80, 0xFF, 0x88, 0x08, 0x04, 0x80), |
1270 | PHYREGS(0xDD03, 0xD903, 0xD503, 0x2404, 0x2904, 0x2D04), | 1270 | PHYREGS(0x03DD, 0x03D9, 0x03D5, 0x0424, 0x0429, 0x042D), |
1271 | }, | 1271 | }, |
1272 | { .channel = 12, | 1272 | { .channel = 12, |
1273 | .freq = 2467, /* MHz */ | 1273 | .freq = 2467, /* MHz */ |
@@ -1275,7 +1275,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1275 | RADIOREGS(0x73, 0x09, 0xA3, 0x0F, 0x00, 0x01, 0x07, 0x15, | 1275 | RADIOREGS(0x73, 0x09, 0xA3, 0x0F, 0x00, 0x01, 0x07, 0x15, |
1276 | 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x03, | 1276 | 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x03, |
1277 | 0x80, 0xFF, 0x88, 0x08, 0x03, 0x80), | 1277 | 0x80, 0xFF, 0x88, 0x08, 0x03, 0x80), |
1278 | PHYREGS(0xDF03, 0xDB03, 0xD703, 0x2204, 0x2704, 0x2B04), | 1278 | PHYREGS(0x03DF, 0x03DB, 0x03D7, 0x0422, 0x0427, 0x042B), |
1279 | }, | 1279 | }, |
1280 | { .channel = 13, | 1280 | { .channel = 13, |
1281 | .freq = 2472, /* MHz */ | 1281 | .freq = 2472, /* MHz */ |
@@ -1283,7 +1283,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1283 | RADIOREGS(0x73, 0x09, 0xA8, 0x0F, 0x00, 0x01, 0x07, 0x15, | 1283 | RADIOREGS(0x73, 0x09, 0xA8, 0x0F, 0x00, 0x01, 0x07, 0x15, |
1284 | 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x07, 0x03, | 1284 | 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x07, 0x03, |
1285 | 0x80, 0xFF, 0x88, 0x07, 0x03, 0x80), | 1285 | 0x80, 0xFF, 0x88, 0x07, 0x03, 0x80), |
1286 | PHYREGS(0xE103, 0xDD03, 0xD903, 0x2004, 0x2404, 0x2904), | 1286 | PHYREGS(0x03E1, 0x03DD, 0x03D9, 0x0420, 0x0424, 0x0429), |
1287 | }, | 1287 | }, |
1288 | { .channel = 14, | 1288 | { .channel = 14, |
1289 | .freq = 2484, /* MHz */ | 1289 | .freq = 2484, /* MHz */ |
@@ -1291,7 +1291,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = | |||
1291 | RADIOREGS(0x73, 0x09, 0xB4, 0x0F, 0xFF, 0x01, 0x07, 0x15, | 1291 | RADIOREGS(0x73, 0x09, 0xB4, 0x0F, 0xFF, 0x01, 0x07, 0x15, |
1292 | 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x07, 0x01, | 1292 | 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x07, 0x01, |
1293 | 0x80, 0xFF, 0x88, 0x07, 0x01, 0x80), | 1293 | 0x80, 0xFF, 0x88, 0x07, 0x01, 0x80), |
1294 | PHYREGS(0xE603, 0xE203, 0xDE03, 0x1B04, 0x1F04, 0x2404), | 1294 | PHYREGS(0x03E6, 0x03E2, 0x03DE, 0x041B, 0x041F, 0x0424), |
1295 | }, | 1295 | }, |
1296 | }; | 1296 | }; |
1297 | 1297 | ||
diff --git a/drivers/net/wireless/b43/radio_2056.c b/drivers/net/wireless/b43/radio_2056.c index f710c01f2cc4..0cdf6a46ba4b 100644 --- a/drivers/net/wireless/b43/radio_2056.c +++ b/drivers/net/wireless/b43/radio_2056.c | |||
@@ -74,7 +74,5975 @@ | |||
74 | .phy_regs.phy_bw5 = r4, \ | 74 | .phy_regs.phy_bw5 = r4, \ |
75 | .phy_regs.phy_bw6 = r5 | 75 | .phy_regs.phy_bw6 = r5 |
76 | 76 | ||
77 | /* http://bcm-v4.sipsolutions.net/802.11/Radio/2056/ChannelTable */ | ||
77 | static const struct b43_nphy_channeltab_entry_rev3 b43_nphy_channeltab_rev3[] = { | 78 | static const struct b43_nphy_channeltab_entry_rev3 b43_nphy_channeltab_rev3[] = { |
79 | { .freq = 4920, | ||
80 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, | ||
81 | 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, | ||
82 | 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, | ||
83 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, | ||
84 | 0x00, 0x0b, 0x00, 0xff, 0x00), | ||
85 | PHYREGS(0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216), | ||
86 | }, | ||
87 | { .freq = 4930, | ||
88 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, | ||
89 | 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, | ||
90 | 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, | ||
91 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, | ||
92 | 0x00, 0x0b, 0x00, 0xff, 0x00), | ||
93 | PHYREGS(0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215), | ||
94 | }, | ||
95 | { .freq = 4940, | ||
96 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, | ||
97 | 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, | ||
98 | 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, | ||
99 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, | ||
100 | 0x00, 0x0b, 0x00, 0xff, 0x00), | ||
101 | PHYREGS(0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214), | ||
102 | }, | ||
103 | { .freq = 4950, | ||
104 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, | ||
105 | 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, | ||
106 | 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, | ||
107 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, | ||
108 | 0x00, 0x0b, 0x00, 0xff, 0x00), | ||
109 | PHYREGS(0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213), | ||
110 | }, | ||
111 | { .freq = 4960, | ||
112 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, | ||
113 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
114 | 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, | ||
115 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, | ||
116 | 0x00, 0x0b, 0x00, 0xff, 0x00), | ||
117 | PHYREGS(0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212), | ||
118 | }, | ||
119 | { .freq = 4970, | ||
120 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, | ||
121 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
122 | 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, | ||
123 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, | ||
124 | 0x00, 0x0b, 0x00, 0xff, 0x00), | ||
125 | PHYREGS(0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211), | ||
126 | }, | ||
127 | { .freq = 4980, | ||
128 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, | ||
129 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
130 | 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, | ||
131 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, | ||
132 | 0x00, 0x0b, 0x00, 0xff, 0x00), | ||
133 | PHYREGS(0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f), | ||
134 | }, | ||
135 | { .freq = 4990, | ||
136 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, | ||
137 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
138 | 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, | ||
139 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, | ||
140 | 0x00, 0x0b, 0x00, 0xff, 0x00), | ||
141 | PHYREGS(0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e), | ||
142 | }, | ||
143 | { .freq = 5000, | ||
144 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04, | ||
145 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
146 | 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, | ||
147 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, | ||
148 | 0x00, 0x0b, 0x00, 0xff, 0x00), | ||
149 | PHYREGS(0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d), | ||
150 | }, | ||
151 | { .freq = 5010, | ||
152 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04, | ||
153 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
154 | 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, | ||
155 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, | ||
156 | 0x00, 0x0b, 0x00, 0xff, 0x00), | ||
157 | PHYREGS(0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c), | ||
158 | }, | ||
159 | { .freq = 5020, | ||
160 | RADIOREGS3(0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04, | ||
161 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
162 | 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, | ||
163 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, | ||
164 | 0x00, 0x0b, 0x00, 0xff, 0x00), | ||
165 | PHYREGS(0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b), | ||
166 | }, | ||
167 | { .freq = 5030, | ||
168 | RADIOREGS3(0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04, | ||
169 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
170 | 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, | ||
171 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, | ||
172 | 0x00, 0x0b, 0x00, 0xff, 0x00), | ||
173 | PHYREGS(0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a), | ||
174 | }, | ||
175 | { .freq = 5040, | ||
176 | RADIOREGS3(0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x04, | ||
177 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
178 | 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, | ||
179 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, | ||
180 | 0x00, 0x0b, 0x00, 0xff, 0x00), | ||
181 | PHYREGS(0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209), | ||
182 | }, | ||
183 | { .freq = 5050, | ||
184 | RADIOREGS3(0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x04, | ||
185 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
186 | 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, | ||
187 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, | ||
188 | 0x00, 0x0b, 0x00, 0xff, 0x00), | ||
189 | PHYREGS(0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208), | ||
190 | }, | ||
191 | { .freq = 5060, | ||
192 | RADIOREGS3(0xe6, 0x01, 0x01, 0x01, 0xfa, 0x05, 0x05, 0x04, | ||
193 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
194 | 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, | ||
195 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, | ||
196 | 0x00, 0x0b, 0x00, 0xff, 0x00), | ||
197 | PHYREGS(0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207), | ||
198 | }, | ||
199 | { .freq = 5070, | ||
200 | RADIOREGS3(0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x04, | ||
201 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
202 | 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, | ||
203 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, | ||
204 | 0x00, 0x0b, 0x00, 0xff, 0x00), | ||
205 | PHYREGS(0x07f0, 0x07ec, 0x07e8, 0x0204, 0x0205, 0x0206), | ||
206 | }, | ||
207 | { .freq = 5080, | ||
208 | RADIOREGS3(0xde, 0x01, 0x01, 0x01, 0xfc, 0x05, 0x05, 0x04, | ||
209 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
210 | 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, | ||
211 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, | ||
212 | 0x00, 0x0b, 0x00, 0xff, 0x00), | ||
213 | PHYREGS(0x07f4, 0x07f0, 0x07ec, 0x0203, 0x0204, 0x0205), | ||
214 | }, | ||
215 | { .freq = 5090, | ||
216 | RADIOREGS3(0xde, 0x01, 0x01, 0x01, 0xfd, 0x05, 0x05, 0x04, | ||
217 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
218 | 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, | ||
219 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, | ||
220 | 0x00, 0x0b, 0x00, 0xff, 0x00), | ||
221 | PHYREGS(0x07f8, 0x07f4, 0x07f0, 0x0202, 0x0203, 0x0204), | ||
222 | }, | ||
223 | { .freq = 5100, | ||
224 | RADIOREGS3(0xd6, 0x01, 0x01, 0x01, 0xfe, 0x05, 0x05, 0x04, | ||
225 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
226 | 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, | ||
227 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, | ||
228 | 0x00, 0x0b, 0x00, 0xff, 0x00), | ||
229 | PHYREGS(0x07fc, 0x07f8, 0x07f4, 0x0201, 0x0202, 0x0203), | ||
230 | }, | ||
231 | { .freq = 5110, | ||
232 | RADIOREGS3(0xd6, 0x01, 0x01, 0x01, 0xff, 0x05, 0x05, 0x04, | ||
233 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
234 | 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, | ||
235 | 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, | ||
236 | 0x00, 0x0b, 0x00, 0xfc, 0x00), | ||
237 | PHYREGS(0x0800, 0x07fc, 0x07f8, 0x0200, 0x0201, 0x0202), | ||
238 | }, | ||
239 | { .freq = 5120, | ||
240 | RADIOREGS3(0xce, 0x01, 0x01, 0x02, 0x00, 0x05, 0x05, 0x04, | ||
241 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
242 | 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, | ||
243 | 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, | ||
244 | 0x00, 0x0b, 0x00, 0xfc, 0x00), | ||
245 | PHYREGS(0x0804, 0x0800, 0x07fc, 0x01ff, 0x0200, 0x0201), | ||
246 | }, | ||
247 | { .freq = 5130, | ||
248 | RADIOREGS3(0xce, 0x01, 0x01, 0x02, 0x01, 0x05, 0x05, 0x04, | ||
249 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
250 | 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, | ||
251 | 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, | ||
252 | 0x00, 0x0b, 0x00, 0xfc, 0x00), | ||
253 | PHYREGS(0x0808, 0x0804, 0x0800, 0x01fe, 0x01ff, 0x0200), | ||
254 | }, | ||
255 | { .freq = 5140, | ||
256 | RADIOREGS3(0xc6, 0x01, 0x01, 0x02, 0x02, 0x05, 0x05, 0x04, | ||
257 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
258 | 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, | ||
259 | 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, | ||
260 | 0x00, 0x0b, 0x00, 0xfc, 0x00), | ||
261 | PHYREGS(0x080c, 0x0808, 0x0804, 0x01fd, 0x01fe, 0x01ff), | ||
262 | }, | ||
263 | { .freq = 5160, | ||
264 | RADIOREGS3(0xbe, 0x01, 0x01, 0x02, 0x04, 0x05, 0x05, 0x04, | ||
265 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
266 | 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, | ||
267 | 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, | ||
268 | 0x00, 0x0b, 0x00, 0xfc, 0x00), | ||
269 | PHYREGS(0x0814, 0x0810, 0x080c, 0x01fb, 0x01fc, 0x01fd), | ||
270 | }, | ||
271 | { .freq = 5170, | ||
272 | RADIOREGS3(0xbe, 0x01, 0x01, 0x02, 0x05, 0x05, 0x05, 0x04, | ||
273 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
274 | 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, | ||
275 | 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, | ||
276 | 0x00, 0x0b, 0x00, 0xfc, 0x00), | ||
277 | PHYREGS(0x0818, 0x0814, 0x0810, 0x01fa, 0x01fb, 0x01fc), | ||
278 | }, | ||
279 | { .freq = 5180, | ||
280 | RADIOREGS3(0xb6, 0x01, 0x01, 0x02, 0x06, 0x05, 0x05, 0x04, | ||
281 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
282 | 0xff, 0xef, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, | ||
283 | 0x00, 0xfc, 0x00, 0xef, 0x00, 0x07, 0x00, 0x7f, | ||
284 | 0x00, 0x0b, 0x00, 0xfc, 0x00), | ||
285 | PHYREGS(0x081c, 0x0818, 0x0814, 0x01f9, 0x01fa, 0x01fb), | ||
286 | }, | ||
287 | { .freq = 5190, | ||
288 | RADIOREGS3(0xb6, 0x01, 0x01, 0x02, 0x07, 0x05, 0x05, 0x04, | ||
289 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
290 | 0xff, 0xef, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, | ||
291 | 0x00, 0xfc, 0x00, 0xef, 0x00, 0x07, 0x00, 0x7f, | ||
292 | 0x00, 0x0b, 0x00, 0xfc, 0x00), | ||
293 | PHYREGS(0x0820, 0x081c, 0x0818, 0x01f8, 0x01f9, 0x01fa), | ||
294 | }, | ||
295 | { .freq = 5200, | ||
296 | RADIOREGS3(0xaf, 0x01, 0x01, 0x02, 0x08, 0x05, 0x05, 0x04, | ||
297 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
298 | 0xff, 0xef, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0a, | ||
299 | 0x00, 0xfc, 0x00, 0xef, 0x00, 0x06, 0x00, 0x7f, | ||
300 | 0x00, 0x0a, 0x00, 0xfc, 0x00), | ||
301 | PHYREGS(0x0824, 0x0820, 0x081c, 0x01f7, 0x01f8, 0x01f9), | ||
302 | }, | ||
303 | { .freq = 5210, | ||
304 | RADIOREGS3(0xaf, 0x01, 0x01, 0x02, 0x09, 0x05, 0x05, 0x04, | ||
305 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
306 | 0xff, 0xdf, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0a, | ||
307 | 0x00, 0xfc, 0x00, 0xdf, 0x00, 0x06, 0x00, 0x7f, | ||
308 | 0x00, 0x0a, 0x00, 0xfc, 0x00), | ||
309 | PHYREGS(0x0828, 0x0824, 0x0820, 0x01f6, 0x01f7, 0x01f8), | ||
310 | }, | ||
311 | { .freq = 5220, | ||
312 | RADIOREGS3(0xa7, 0x01, 0x01, 0x02, 0x0a, 0x05, 0x05, 0x04, | ||
313 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
314 | 0xff, 0xdf, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0a, | ||
315 | 0x00, 0xfc, 0x00, 0xdf, 0x00, 0x06, 0x00, 0x7f, | ||
316 | 0x00, 0x0a, 0x00, 0xfc, 0x00), | ||
317 | PHYREGS(0x082c, 0x0828, 0x0824, 0x01f5, 0x01f6, 0x01f7), | ||
318 | }, | ||
319 | { .freq = 5230, | ||
320 | RADIOREGS3(0xa7, 0x01, 0x01, 0x02, 0x0b, 0x05, 0x05, 0x04, | ||
321 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
322 | 0xff, 0xdf, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0a, | ||
323 | 0x00, 0xfc, 0x00, 0xdf, 0x00, 0x06, 0x00, 0x7f, | ||
324 | 0x00, 0x0a, 0x00, 0xfc, 0x00), | ||
325 | PHYREGS(0x0830, 0x082c, 0x0828, 0x01f4, 0x01f5, 0x01f6), | ||
326 | }, | ||
327 | { .freq = 5240, | ||
328 | RADIOREGS3(0xa0, 0x01, 0x01, 0x02, 0x0c, 0x05, 0x05, 0x04, | ||
329 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
330 | 0xff, 0xcf, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0a, | ||
331 | 0x00, 0xfc, 0x00, 0xcf, 0x00, 0x06, 0x00, 0x7f, | ||
332 | 0x00, 0x0a, 0x00, 0xfc, 0x00), | ||
333 | PHYREGS(0x0834, 0x0830, 0x082c, 0x01f3, 0x01f4, 0x01f5), | ||
334 | }, | ||
335 | { .freq = 5250, | ||
336 | RADIOREGS3(0xa0, 0x01, 0x01, 0x02, 0x0d, 0x05, 0x05, 0x04, | ||
337 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
338 | 0xff, 0xcf, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0a, | ||
339 | 0x00, 0xfc, 0x00, 0xcf, 0x00, 0x06, 0x00, 0x7f, | ||
340 | 0x00, 0x0a, 0x00, 0xfc, 0x00), | ||
341 | PHYREGS(0x0838, 0x0834, 0x0830, 0x01f2, 0x01f3, 0x01f4), | ||
342 | }, | ||
343 | { .freq = 5260, | ||
344 | RADIOREGS3(0x98, 0x01, 0x01, 0x02, 0x0e, 0x05, 0x05, 0x04, | ||
345 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
346 | 0xff, 0xcf, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0a, | ||
347 | 0x00, 0xfc, 0x00, 0xcf, 0x00, 0x06, 0x00, 0x7f, | ||
348 | 0x00, 0x0a, 0x00, 0xfc, 0x00), | ||
349 | PHYREGS(0x083c, 0x0838, 0x0834, 0x01f1, 0x01f2, 0x01f3), | ||
350 | }, | ||
351 | { .freq = 5270, | ||
352 | RADIOREGS3(0x98, 0x01, 0x01, 0x02, 0x0f, 0x05, 0x05, 0x04, | ||
353 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0f, 0x00, | ||
354 | 0xff, 0xcf, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0a, | ||
355 | 0x00, 0xfc, 0x00, 0xcf, 0x00, 0x06, 0x00, 0x7f, | ||
356 | 0x00, 0x0a, 0x00, 0xfc, 0x00), | ||
357 | PHYREGS(0x0840, 0x083c, 0x0838, 0x01f0, 0x01f1, 0x01f2), | ||
358 | }, | ||
359 | { .freq = 5280, | ||
360 | RADIOREGS3(0x91, 0x01, 0x01, 0x02, 0x10, 0x05, 0x05, 0x04, | ||
361 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0f, 0x00, | ||
362 | 0xff, 0xbf, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0a, | ||
363 | 0x00, 0xfc, 0x00, 0xbf, 0x00, 0x06, 0x00, 0x7f, | ||
364 | 0x00, 0x0a, 0x00, 0xfc, 0x00), | ||
365 | PHYREGS(0x0844, 0x0840, 0x083c, 0x01f0, 0x01f0, 0x01f1), | ||
366 | }, | ||
367 | { .freq = 5290, | ||
368 | RADIOREGS3(0x91, 0x01, 0x01, 0x02, 0x11, 0x05, 0x05, 0x04, | ||
369 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0f, 0x00, | ||
370 | 0xff, 0xbf, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0a, | ||
371 | 0x00, 0xfc, 0x00, 0xbf, 0x00, 0x06, 0x00, 0x7f, | ||
372 | 0x00, 0x0a, 0x00, 0xfc, 0x00), | ||
373 | PHYREGS(0x0848, 0x0844, 0x0840, 0x01ef, 0x01f0, 0x01f0), | ||
374 | }, | ||
375 | { .freq = 5300, | ||
376 | RADIOREGS3(0x8a, 0x01, 0x01, 0x02, 0x12, 0x05, 0x05, 0x04, | ||
377 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00, | ||
378 | 0xff, 0xbf, 0x00, 0x05, 0x00, 0x7f, 0x00, 0x09, | ||
379 | 0x00, 0xfc, 0x00, 0xbf, 0x00, 0x05, 0x00, 0x7f, | ||
380 | 0x00, 0x09, 0x00, 0xfc, 0x00), | ||
381 | PHYREGS(0x084c, 0x0848, 0x0844, 0x01ee, 0x01ef, 0x01f0), | ||
382 | }, | ||
383 | { .freq = 5310, | ||
384 | RADIOREGS3(0x8a, 0x01, 0x01, 0x02, 0x13, 0x05, 0x05, 0x04, | ||
385 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00, | ||
386 | 0xff, 0xbf, 0x00, 0x05, 0x00, 0x7f, 0x00, 0x09, | ||
387 | 0x00, 0xfa, 0x00, 0xbf, 0x00, 0x05, 0x00, 0x7f, | ||
388 | 0x00, 0x09, 0x00, 0xfa, 0x00), | ||
389 | PHYREGS(0x0850, 0x084c, 0x0848, 0x01ed, 0x01ee, 0x01ef), | ||
390 | }, | ||
391 | { .freq = 5320, | ||
392 | RADIOREGS3(0x83, 0x01, 0x01, 0x02, 0x14, 0x05, 0x05, 0x04, | ||
393 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00, | ||
394 | 0xff, 0xbf, 0x00, 0x05, 0x00, 0x7f, 0x00, 0x09, | ||
395 | 0x00, 0xfa, 0x00, 0xbf, 0x00, 0x05, 0x00, 0x7f, | ||
396 | 0x00, 0x09, 0x00, 0xfa, 0x00), | ||
397 | PHYREGS(0x0854, 0x0850, 0x084c, 0x01ec, 0x01ed, 0x01ee), | ||
398 | }, | ||
399 | { .freq = 5330, | ||
400 | RADIOREGS3(0x83, 0x01, 0x01, 0x02, 0x15, 0x05, 0x05, 0x04, | ||
401 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00, | ||
402 | 0xff, 0xaf, 0x00, 0x05, 0x00, 0x7f, 0x00, 0x09, | ||
403 | 0x00, 0xfa, 0x00, 0xaf, 0x00, 0x05, 0x00, 0x7f, | ||
404 | 0x00, 0x09, 0x00, 0xfa, 0x00), | ||
405 | PHYREGS(0x0858, 0x0854, 0x0850, 0x01eb, 0x01ec, 0x01ed), | ||
406 | }, | ||
407 | { .freq = 5340, | ||
408 | RADIOREGS3(0x7c, 0x01, 0x01, 0x02, 0x16, 0x05, 0x05, 0x04, | ||
409 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00, | ||
410 | 0xff, 0xaf, 0x00, 0x05, 0x00, 0x7f, 0x00, 0x09, | ||
411 | 0x00, 0xfa, 0x00, 0xaf, 0x00, 0x05, 0x00, 0x7f, | ||
412 | 0x00, 0x09, 0x00, 0xfa, 0x00), | ||
413 | PHYREGS(0x085c, 0x0858, 0x0854, 0x01ea, 0x01eb, 0x01ec), | ||
414 | }, | ||
415 | { .freq = 5350, | ||
416 | RADIOREGS3(0x7c, 0x01, 0x01, 0x02, 0x17, 0x05, 0x05, 0x04, | ||
417 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00, | ||
418 | 0xff, 0x9f, 0x00, 0x05, 0x00, 0x7f, 0x00, 0x09, | ||
419 | 0x00, 0xfa, 0x00, 0x9f, 0x00, 0x05, 0x00, 0x7f, | ||
420 | 0x00, 0x09, 0x00, 0xfa, 0x00), | ||
421 | PHYREGS(0x0860, 0x085c, 0x0858, 0x01e9, 0x01ea, 0x01eb), | ||
422 | }, | ||
423 | { .freq = 5360, | ||
424 | RADIOREGS3(0x75, 0x01, 0x01, 0x02, 0x18, 0x05, 0x05, 0x04, | ||
425 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00, | ||
426 | 0xff, 0x9f, 0x00, 0x05, 0x00, 0x7f, 0x00, 0x09, | ||
427 | 0x00, 0xfa, 0x00, 0x9f, 0x00, 0x05, 0x00, 0x7f, | ||
428 | 0x00, 0x09, 0x00, 0xfa, 0x00), | ||
429 | PHYREGS(0x0864, 0x0860, 0x085c, 0x01e8, 0x01e9, 0x01ea), | ||
430 | }, | ||
431 | { .freq = 5370, | ||
432 | RADIOREGS3(0x75, 0x01, 0x01, 0x02, 0x19, 0x05, 0x05, 0x04, | ||
433 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00, | ||
434 | 0xff, 0x9f, 0x00, 0x05, 0x00, 0x7f, 0x00, 0x09, | ||
435 | 0x00, 0xfa, 0x00, 0x9f, 0x00, 0x05, 0x00, 0x7f, | ||
436 | 0x00, 0x09, 0x00, 0xfa, 0x00), | ||
437 | PHYREGS(0x0868, 0x0864, 0x0860, 0x01e7, 0x01e8, 0x01e9), | ||
438 | }, | ||
439 | { .freq = 5380, | ||
440 | RADIOREGS3(0x6e, 0x01, 0x01, 0x02, 0x1a, 0x05, 0x05, 0x04, | ||
441 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00, | ||
442 | 0xff, 0x9f, 0x00, 0x05, 0x00, 0x7f, 0x00, 0x09, | ||
443 | 0x00, 0xfa, 0x00, 0x9f, 0x00, 0x05, 0x00, 0x7f, | ||
444 | 0x00, 0x09, 0x00, 0xfa, 0x00), | ||
445 | PHYREGS(0x086c, 0x0868, 0x0864, 0x01e6, 0x01e7, 0x01e8), | ||
446 | }, | ||
447 | { .freq = 5390, | ||
448 | RADIOREGS3(0x6e, 0x01, 0x01, 0x02, 0x1b, 0x05, 0x05, 0x04, | ||
449 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00, | ||
450 | 0xff, 0x8f, 0x00, 0x05, 0x00, 0x7f, 0x00, 0x09, | ||
451 | 0x00, 0xfa, 0x00, 0x8f, 0x00, 0x05, 0x00, 0x7f, | ||
452 | 0x00, 0x09, 0x00, 0xfa, 0x00), | ||
453 | PHYREGS(0x0870, 0x086c, 0x0868, 0x01e5, 0x01e6, 0x01e7), | ||
454 | }, | ||
455 | { .freq = 5400, | ||
456 | RADIOREGS3(0x67, 0x01, 0x01, 0x02, 0x1c, 0x05, 0x05, 0x04, | ||
457 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00, | ||
458 | 0xc8, 0x8f, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x08, | ||
459 | 0x00, 0xfa, 0x00, 0x8f, 0x00, 0x04, 0x00, 0x7f, | ||
460 | 0x00, 0x08, 0x00, 0xfa, 0x00), | ||
461 | PHYREGS(0x0874, 0x0870, 0x086c, 0x01e5, 0x01e5, 0x01e6), | ||
462 | }, | ||
463 | { .freq = 5410, | ||
464 | RADIOREGS3(0x67, 0x01, 0x01, 0x02, 0x1d, 0x05, 0x05, 0x04, | ||
465 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00, | ||
466 | 0xc8, 0x8f, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x08, | ||
467 | 0x00, 0xfa, 0x00, 0x8f, 0x00, 0x04, 0x00, 0x7f, | ||
468 | 0x00, 0x08, 0x00, 0xfa, 0x00), | ||
469 | PHYREGS(0x0878, 0x0874, 0x0870, 0x01e4, 0x01e5, 0x01e5), | ||
470 | }, | ||
471 | { .freq = 5420, | ||
472 | RADIOREGS3(0x61, 0x01, 0x01, 0x02, 0x1e, 0x05, 0x05, 0x04, | ||
473 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00, | ||
474 | 0xc8, 0x8e, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x08, | ||
475 | 0x00, 0xfa, 0x00, 0x8e, 0x00, 0x04, 0x00, 0x7f, | ||
476 | 0x00, 0x08, 0x00, 0xfa, 0x00), | ||
477 | PHYREGS(0x087c, 0x0878, 0x0874, 0x01e3, 0x01e4, 0x01e5), | ||
478 | }, | ||
479 | { .freq = 5430, | ||
480 | RADIOREGS3(0x61, 0x01, 0x01, 0x02, 0x1f, 0x05, 0x05, 0x04, | ||
481 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00, | ||
482 | 0xc8, 0x8e, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x08, | ||
483 | 0x00, 0xfa, 0x00, 0x8e, 0x00, 0x04, 0x00, 0x7f, | ||
484 | 0x00, 0x08, 0x00, 0xfa, 0x00), | ||
485 | PHYREGS(0x0880, 0x087c, 0x0878, 0x01e2, 0x01e3, 0x01e4), | ||
486 | }, | ||
487 | { .freq = 5440, | ||
488 | RADIOREGS3(0x5a, 0x01, 0x01, 0x02, 0x20, 0x05, 0x05, 0x04, | ||
489 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00, | ||
490 | 0xc8, 0x7e, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x08, | ||
491 | 0x00, 0xfa, 0x00, 0x7e, 0x00, 0x04, 0x00, 0x7f, | ||
492 | 0x00, 0x08, 0x00, 0xfa, 0x00), | ||
493 | PHYREGS(0x0884, 0x0880, 0x087c, 0x01e1, 0x01e2, 0x01e3), | ||
494 | }, | ||
495 | { .freq = 5450, | ||
496 | RADIOREGS3(0x5a, 0x01, 0x01, 0x02, 0x21, 0x05, 0x05, 0x04, | ||
497 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00, | ||
498 | 0xc8, 0x7d, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x08, | ||
499 | 0x00, 0xfa, 0x00, 0x7d, 0x00, 0x04, 0x00, 0x7f, | ||
500 | 0x00, 0x08, 0x00, 0xfa, 0x00), | ||
501 | PHYREGS(0x0888, 0x0884, 0x0880, 0x01e0, 0x01e1, 0x01e2), | ||
502 | }, | ||
503 | { .freq = 5460, | ||
504 | RADIOREGS3(0x53, 0x01, 0x01, 0x02, 0x22, 0x05, 0x05, 0x04, | ||
505 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00, | ||
506 | 0xc8, 0x6d, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x08, | ||
507 | 0x00, 0xf8, 0x00, 0x6d, 0x00, 0x04, 0x00, 0x7f, | ||
508 | 0x00, 0x08, 0x00, 0xf8, 0x00), | ||
509 | PHYREGS(0x088c, 0x0888, 0x0884, 0x01df, 0x01e0, 0x01e1), | ||
510 | }, | ||
511 | { .freq = 5470, | ||
512 | RADIOREGS3(0x53, 0x01, 0x01, 0x02, 0x23, 0x05, 0x05, 0x04, | ||
513 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00, | ||
514 | 0xc8, 0x6d, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x08, | ||
515 | 0x00, 0xf8, 0x00, 0x6d, 0x00, 0x04, 0x00, 0x7f, | ||
516 | 0x00, 0x08, 0x00, 0xf8, 0x00), | ||
517 | PHYREGS(0x0890, 0x088c, 0x0888, 0x01de, 0x01df, 0x01e0), | ||
518 | }, | ||
519 | { .freq = 5480, | ||
520 | RADIOREGS3(0x4d, 0x01, 0x01, 0x02, 0x24, 0x05, 0x05, 0x04, | ||
521 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00, | ||
522 | 0xc8, 0x5d, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x08, | ||
523 | 0x00, 0xf8, 0x00, 0x5d, 0x00, 0x04, 0x00, 0x7f, | ||
524 | 0x00, 0x08, 0x00, 0xf8, 0x00), | ||
525 | PHYREGS(0x0894, 0x0890, 0x088c, 0x01dd, 0x01de, 0x01df), | ||
526 | }, | ||
527 | { .freq = 5490, | ||
528 | RADIOREGS3(0x4d, 0x01, 0x01, 0x02, 0x25, 0x05, 0x05, 0x04, | ||
529 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00, | ||
530 | 0xc8, 0x5c, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x08, | ||
531 | 0x00, 0xf8, 0x00, 0x5c, 0x00, 0x04, 0x00, 0x7f, | ||
532 | 0x00, 0x08, 0x00, 0xf8, 0x00), | ||
533 | PHYREGS(0x0898, 0x0894, 0x0890, 0x01dd, 0x01dd, 0x01de), | ||
534 | }, | ||
535 | { .freq = 5500, | ||
536 | RADIOREGS3(0x47, 0x01, 0x01, 0x02, 0x26, 0x05, 0x05, 0x04, | ||
537 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, | ||
538 | 0x84, 0x5c, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07, | ||
539 | 0x00, 0xf8, 0x00, 0x5c, 0x00, 0x03, 0x00, 0x7f, | ||
540 | 0x00, 0x07, 0x00, 0xf8, 0x00), | ||
541 | PHYREGS(0x089c, 0x0898, 0x0894, 0x01dc, 0x01dd, 0x01dd), | ||
542 | }, | ||
543 | { .freq = 5510, | ||
544 | RADIOREGS3(0x47, 0x01, 0x01, 0x02, 0x27, 0x05, 0x05, 0x04, | ||
545 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, | ||
546 | 0x84, 0x4c, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07, | ||
547 | 0x00, 0xf8, 0x00, 0x4c, 0x00, 0x03, 0x00, 0x7f, | ||
548 | 0x00, 0x07, 0x00, 0xf8, 0x00), | ||
549 | PHYREGS(0x08a0, 0x089c, 0x0898, 0x01db, 0x01dc, 0x01dd), | ||
550 | }, | ||
551 | { .freq = 5520, | ||
552 | RADIOREGS3(0x40, 0x01, 0x01, 0x02, 0x28, 0x05, 0x05, 0x04, | ||
553 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, | ||
554 | 0x84, 0x4c, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07, | ||
555 | 0x00, 0xf8, 0x00, 0x4c, 0x00, 0x03, 0x00, 0x7f, | ||
556 | 0x00, 0x07, 0x00, 0xf8, 0x00), | ||
557 | PHYREGS(0x08a4, 0x08a0, 0x089c, 0x01da, 0x01db, 0x01dc), | ||
558 | }, | ||
559 | { .freq = 5530, | ||
560 | RADIOREGS3(0x40, 0x01, 0x01, 0x02, 0x29, 0x05, 0x05, 0x04, | ||
561 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, | ||
562 | 0x84, 0x3b, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07, | ||
563 | 0x00, 0xf8, 0x00, 0x3b, 0x00, 0x03, 0x00, 0x7f, | ||
564 | 0x00, 0x07, 0x00, 0xf8, 0x00), | ||
565 | PHYREGS(0x08a8, 0x08a4, 0x08a0, 0x01d9, 0x01da, 0x01db), | ||
566 | }, | ||
567 | { .freq = 5540, | ||
568 | RADIOREGS3(0x3a, 0x01, 0x01, 0x02, 0x2a, 0x05, 0x05, 0x04, | ||
569 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, | ||
570 | 0x84, 0x3b, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07, | ||
571 | 0x00, 0xf8, 0x00, 0x3b, 0x00, 0x03, 0x00, 0x7f, | ||
572 | 0x00, 0x07, 0x00, 0xf8, 0x00), | ||
573 | PHYREGS(0x08ac, 0x08a8, 0x08a4, 0x01d8, 0x01d9, 0x01da), | ||
574 | }, | ||
575 | { .freq = 5550, | ||
576 | RADIOREGS3(0x3a, 0x01, 0x01, 0x02, 0x2b, 0x05, 0x05, 0x04, | ||
577 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, | ||
578 | 0x84, 0x3b, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07, | ||
579 | 0x00, 0xf8, 0x00, 0x3b, 0x00, 0x03, 0x00, 0x7f, | ||
580 | 0x00, 0x07, 0x00, 0xf8, 0x00), | ||
581 | PHYREGS(0x08b0, 0x08ac, 0x08a8, 0x01d7, 0x01d8, 0x01d9), | ||
582 | }, | ||
583 | { .freq = 5560, | ||
584 | RADIOREGS3(0x34, 0x01, 0x01, 0x02, 0x2c, 0x05, 0x05, 0x04, | ||
585 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, | ||
586 | 0x84, 0x2b, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07, | ||
587 | 0x00, 0xf8, 0x00, 0x2b, 0x00, 0x03, 0x00, 0x7f, | ||
588 | 0x00, 0x07, 0x00, 0xf8, 0x00), | ||
589 | PHYREGS(0x08b4, 0x08b0, 0x08ac, 0x01d7, 0x01d7, 0x01d8), | ||
590 | }, | ||
591 | { .freq = 5570, | ||
592 | RADIOREGS3(0x34, 0x01, 0x01, 0x02, 0x2d, 0x05, 0x05, 0x04, | ||
593 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, | ||
594 | 0x84, 0x2a, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07, | ||
595 | 0x00, 0xf8, 0x00, 0x2a, 0x00, 0x03, 0x00, 0x7f, | ||
596 | 0x00, 0x07, 0x00, 0xf8, 0x00), | ||
597 | PHYREGS(0x08b8, 0x08b4, 0x08b0, 0x01d6, 0x01d7, 0x01d7), | ||
598 | }, | ||
599 | { .freq = 5580, | ||
600 | RADIOREGS3(0x2e, 0x01, 0x01, 0x02, 0x2e, 0x05, 0x05, 0x04, | ||
601 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, | ||
602 | 0x84, 0x1a, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07, | ||
603 | 0x00, 0xf8, 0x00, 0x1a, 0x00, 0x03, 0x00, 0x7f, | ||
604 | 0x00, 0x07, 0x00, 0xf8, 0x00), | ||
605 | PHYREGS(0x08bc, 0x08b8, 0x08b4, 0x01d5, 0x01d6, 0x01d7), | ||
606 | }, | ||
607 | { .freq = 5590, | ||
608 | RADIOREGS3(0x2e, 0x01, 0x01, 0x02, 0x2f, 0x05, 0x05, 0x04, | ||
609 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, | ||
610 | 0x84, 0x1a, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07, | ||
611 | 0x00, 0xf8, 0x00, 0x1a, 0x00, 0x03, 0x00, 0x7f, | ||
612 | 0x00, 0x07, 0x00, 0xf8, 0x00), | ||
613 | PHYREGS(0x08c0, 0x08bc, 0x08b8, 0x01d4, 0x01d5, 0x01d6), | ||
614 | }, | ||
615 | { .freq = 5600, | ||
616 | RADIOREGS3(0x28, 0x01, 0x01, 0x02, 0x30, 0x05, 0x05, 0x04, | ||
617 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, | ||
618 | 0x70, 0x1a, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07, | ||
619 | 0x00, 0xf8, 0x00, 0x1a, 0x00, 0x03, 0x00, 0x7f, | ||
620 | 0x00, 0x07, 0x00, 0xf8, 0x00), | ||
621 | PHYREGS(0x08c4, 0x08c0, 0x08bc, 0x01d3, 0x01d4, 0x01d5), | ||
622 | }, | ||
623 | { .freq = 5610, | ||
624 | RADIOREGS3(0x28, 0x01, 0x01, 0x02, 0x31, 0x05, 0x05, 0x04, | ||
625 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, | ||
626 | 0x70, 0x19, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07, | ||
627 | 0x00, 0xf8, 0x00, 0x19, 0x00, 0x03, 0x00, 0x7f, | ||
628 | 0x00, 0x07, 0x00, 0xf8, 0x00), | ||
629 | PHYREGS(0x08c8, 0x08c4, 0x08c0, 0x01d2, 0x01d3, 0x01d4), | ||
630 | }, | ||
631 | { .freq = 5620, | ||
632 | RADIOREGS3(0x21, 0x01, 0x01, 0x02, 0x32, 0x05, 0x05, 0x04, | ||
633 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, | ||
634 | 0x70, 0x19, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07, | ||
635 | 0x00, 0xf8, 0x00, 0x19, 0x00, 0x03, 0x00, 0x7f, | ||
636 | 0x00, 0x07, 0x00, 0xf8, 0x00), | ||
637 | PHYREGS(0x08cc, 0x08c8, 0x08c4, 0x01d2, 0x01d2, 0x01d3), | ||
638 | }, | ||
639 | { .freq = 5630, | ||
640 | RADIOREGS3(0x21, 0x01, 0x01, 0x02, 0x33, 0x05, 0x05, 0x04, | ||
641 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, | ||
642 | 0x70, 0x09, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07, | ||
643 | 0x00, 0xf8, 0x00, 0x09, 0x00, 0x03, 0x00, 0x7f, | ||
644 | 0x00, 0x07, 0x00, 0xf8, 0x00), | ||
645 | PHYREGS(0x08d0, 0x08cc, 0x08c8, 0x01d1, 0x01d2, 0x01d2), | ||
646 | }, | ||
647 | { .freq = 5640, | ||
648 | RADIOREGS3(0x1c, 0x01, 0x01, 0x02, 0x34, 0x05, 0x05, 0x04, | ||
649 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, | ||
650 | 0x70, 0x09, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07, | ||
651 | 0x00, 0xf8, 0x00, 0x09, 0x00, 0x03, 0x00, 0x7f, | ||
652 | 0x00, 0x07, 0x00, 0xf8, 0x00), | ||
653 | PHYREGS(0x08d4, 0x08d0, 0x08cc, 0x01d0, 0x01d1, 0x01d2), | ||
654 | }, | ||
655 | { .freq = 5650, | ||
656 | RADIOREGS3(0x1c, 0x01, 0x01, 0x02, 0x35, 0x05, 0x05, 0x04, | ||
657 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, | ||
658 | 0x70, 0x08, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07, | ||
659 | 0x00, 0xf8, 0x00, 0x08, 0x00, 0x03, 0x00, 0x7f, | ||
660 | 0x00, 0x07, 0x00, 0xf8, 0x00), | ||
661 | PHYREGS(0x08d8, 0x08d4, 0x08d0, 0x01cf, 0x01d0, 0x01d1), | ||
662 | }, | ||
663 | { .freq = 5660, | ||
664 | RADIOREGS3(0x16, 0x01, 0x01, 0x02, 0x36, 0x05, 0x05, 0x04, | ||
665 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, | ||
666 | 0x70, 0x08, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07, | ||
667 | 0x00, 0xf6, 0x00, 0x08, 0x00, 0x03, 0x00, 0x7f, | ||
668 | 0x00, 0x07, 0x00, 0xf6, 0x00), | ||
669 | PHYREGS(0x08dc, 0x08d8, 0x08d4, 0x01ce, 0x01cf, 0x01d0), | ||
670 | }, | ||
671 | { .freq = 5670, | ||
672 | RADIOREGS3(0x16, 0x01, 0x01, 0x02, 0x37, 0x05, 0x05, 0x04, | ||
673 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, | ||
674 | 0x70, 0x08, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07, | ||
675 | 0x00, 0xf6, 0x00, 0x08, 0x00, 0x03, 0x00, 0x7f, | ||
676 | 0x00, 0x07, 0x00, 0xf6, 0x00), | ||
677 | PHYREGS(0x08e0, 0x08dc, 0x08d8, 0x01ce, 0x01ce, 0x01cf), | ||
678 | }, | ||
679 | { .freq = 5680, | ||
680 | RADIOREGS3(0x10, 0x01, 0x01, 0x02, 0x38, 0x05, 0x05, 0x04, | ||
681 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, | ||
682 | 0x70, 0x08, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07, | ||
683 | 0x00, 0xf6, 0x00, 0x08, 0x00, 0x03, 0x00, 0x7f, | ||
684 | 0x00, 0x07, 0x00, 0xf6, 0x00), | ||
685 | PHYREGS(0x08e4, 0x08e0, 0x08dc, 0x01cd, 0x01ce, 0x01ce), | ||
686 | }, | ||
687 | { .freq = 5690, | ||
688 | RADIOREGS3(0x10, 0x01, 0x01, 0x02, 0x39, 0x05, 0x05, 0x04, | ||
689 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, | ||
690 | 0x70, 0x07, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07, | ||
691 | 0x00, 0xf6, 0x00, 0x07, 0x00, 0x03, 0x00, 0x7f, | ||
692 | 0x00, 0x07, 0x00, 0xf6, 0x00), | ||
693 | PHYREGS(0x08e8, 0x08e4, 0x08e0, 0x01cc, 0x01cd, 0x01ce), | ||
694 | }, | ||
695 | { .freq = 5700, | ||
696 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3a, 0x05, 0x05, 0x04, | ||
697 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
698 | 0x40, 0x07, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06, | ||
699 | 0x00, 0xf6, 0x00, 0x07, 0x00, 0x02, 0x00, 0x7f, | ||
700 | 0x00, 0x06, 0x00, 0xf6, 0x00), | ||
701 | PHYREGS(0x08ec, 0x08e8, 0x08e4, 0x01cb, 0x01cc, 0x01cd), | ||
702 | }, | ||
703 | { .freq = 5710, | ||
704 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3b, 0x05, 0x05, 0x04, | ||
705 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
706 | 0x40, 0x07, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06, | ||
707 | 0x00, 0xf4, 0x00, 0x07, 0x00, 0x02, 0x00, 0x7f, | ||
708 | 0x00, 0x06, 0x00, 0xf4, 0x00), | ||
709 | PHYREGS(0x08f0, 0x08ec, 0x08e8, 0x01ca, 0x01cb, 0x01cc), | ||
710 | }, | ||
711 | { .freq = 5720, | ||
712 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3c, 0x05, 0x05, 0x04, | ||
713 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
714 | 0x40, 0x07, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06, | ||
715 | 0x00, 0xf4, 0x00, 0x07, 0x00, 0x02, 0x00, 0x7f, | ||
716 | 0x00, 0x06, 0x00, 0xf4, 0x00), | ||
717 | PHYREGS(0x08f4, 0x08f0, 0x08ec, 0x01c9, 0x01ca, 0x01cb), | ||
718 | }, | ||
719 | { .freq = 5725, | ||
720 | RADIOREGS3(0x03, 0x01, 0x02, 0x04, 0x79, 0x07, 0x07, 0x04, | ||
721 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
722 | 0x40, 0x06, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06, | ||
723 | 0x00, 0xf4, 0x00, 0x06, 0x00, 0x02, 0x00, 0x7f, | ||
724 | 0x00, 0x06, 0x00, 0xf4, 0x00), | ||
725 | PHYREGS(0x08f6, 0x08f2, 0x08ee, 0x01c9, 0x01ca, 0x01cb), | ||
726 | }, | ||
727 | { .freq = 5730, | ||
728 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3d, 0x05, 0x05, 0x04, | ||
729 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
730 | 0x40, 0x06, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06, | ||
731 | 0x00, 0xf4, 0x00, 0x06, 0x00, 0x02, 0x00, 0x7f, | ||
732 | 0x00, 0x06, 0x00, 0xf4, 0x00), | ||
733 | PHYREGS(0x08f8, 0x08f4, 0x08f0, 0x01c9, 0x01c9, 0x01ca), | ||
734 | }, | ||
735 | { .freq = 5735, | ||
736 | RADIOREGS3(0x03, 0x01, 0x02, 0x04, 0x7b, 0x07, 0x07, 0x04, | ||
737 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
738 | 0x40, 0x06, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06, | ||
739 | 0x00, 0xf4, 0x00, 0x06, 0x00, 0x02, 0x00, 0x7f, | ||
740 | 0x00, 0x06, 0x00, 0xf4, 0x00), | ||
741 | PHYREGS(0x08fa, 0x08f6, 0x08f2, 0x01c8, 0x01c9, 0x01ca), | ||
742 | }, | ||
743 | { .freq = 5740, | ||
744 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3e, 0x05, 0x05, 0x04, | ||
745 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
746 | 0x40, 0x06, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06, | ||
747 | 0x00, 0xf4, 0x00, 0x06, 0x00, 0x02, 0x00, 0x7f, | ||
748 | 0x00, 0x06, 0x00, 0xf4, 0x00), | ||
749 | PHYREGS(0x08fc, 0x08f8, 0x08f4, 0x01c8, 0x01c9, 0x01c9), | ||
750 | }, | ||
751 | { .freq = 5745, | ||
752 | RADIOREGS3(0xfe, 0x00, 0x02, 0x04, 0x7d, 0x07, 0x07, 0x04, | ||
753 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
754 | 0x40, 0x06, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06, | ||
755 | 0x00, 0xf4, 0x00, 0x06, 0x00, 0x02, 0x00, 0x7f, | ||
756 | 0x00, 0x06, 0x00, 0xf4, 0x00), | ||
757 | PHYREGS(0x08fe, 0x08fa, 0x08f6, 0x01c8, 0x01c8, 0x01c9), | ||
758 | }, | ||
759 | { .freq = 5750, | ||
760 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3f, 0x05, 0x05, 0x04, | ||
761 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
762 | 0x40, 0x06, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06, | ||
763 | 0x00, 0xf4, 0x00, 0x06, 0x00, 0x02, 0x00, 0x7f, | ||
764 | 0x00, 0x06, 0x00, 0xf4, 0x00), | ||
765 | PHYREGS(0x0900, 0x08fc, 0x08f8, 0x01c7, 0x01c8, 0x01c9), | ||
766 | }, | ||
767 | { .freq = 5755, | ||
768 | RADIOREGS3(0xfe, 0x00, 0x02, 0x04, 0x7f, 0x07, 0x07, 0x04, | ||
769 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
770 | 0x40, 0x05, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06, | ||
771 | 0x00, 0xf4, 0x00, 0x05, 0x00, 0x02, 0x00, 0x7f, | ||
772 | 0x00, 0x06, 0x00, 0xf4, 0x00), | ||
773 | PHYREGS(0x0902, 0x08fe, 0x08fa, 0x01c7, 0x01c8, 0x01c8), | ||
774 | }, | ||
775 | { .freq = 5760, | ||
776 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x40, 0x05, 0x05, 0x04, | ||
777 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
778 | 0x40, 0x05, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06, | ||
779 | 0x00, 0xf4, 0x00, 0x05, 0x00, 0x02, 0x00, 0x7f, | ||
780 | 0x00, 0x06, 0x00, 0xf4, 0x00), | ||
781 | PHYREGS(0x0904, 0x0900, 0x08fc, 0x01c6, 0x01c7, 0x01c8), | ||
782 | }, | ||
783 | { .freq = 5765, | ||
784 | RADIOREGS3(0xf8, 0x00, 0x02, 0x04, 0x81, 0x07, 0x07, 0x04, | ||
785 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
786 | 0x40, 0x05, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06, | ||
787 | 0x00, 0xf4, 0x00, 0x05, 0x00, 0x02, 0x00, 0x7f, | ||
788 | 0x00, 0x06, 0x00, 0xf4, 0x00), | ||
789 | PHYREGS(0x0906, 0x0902, 0x08fe, 0x01c6, 0x01c7, 0x01c8), | ||
790 | }, | ||
791 | { .freq = 5770, | ||
792 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x41, 0x05, 0x05, 0x04, | ||
793 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
794 | 0x40, 0x05, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06, | ||
795 | 0x00, 0xf4, 0x00, 0x05, 0x00, 0x02, 0x00, 0x7f, | ||
796 | 0x00, 0x06, 0x00, 0xf4, 0x00), | ||
797 | PHYREGS(0x0908, 0x0904, 0x0900, 0x01c6, 0x01c6, 0x01c7), | ||
798 | }, | ||
799 | { .freq = 5775, | ||
800 | RADIOREGS3(0xf8, 0x00, 0x02, 0x04, 0x83, 0x07, 0x07, 0x04, | ||
801 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
802 | 0x40, 0x05, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06, | ||
803 | 0x00, 0xf4, 0x00, 0x05, 0x00, 0x02, 0x00, 0x7f, | ||
804 | 0x00, 0x06, 0x00, 0xf4, 0x00), | ||
805 | PHYREGS(0x090a, 0x0906, 0x0902, 0x01c5, 0x01c6, 0x01c7), | ||
806 | }, | ||
807 | { .freq = 5780, | ||
808 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x42, 0x05, 0x05, 0x04, | ||
809 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
810 | 0x40, 0x05, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06, | ||
811 | 0x00, 0xf4, 0x00, 0x05, 0x00, 0x02, 0x00, 0x7f, | ||
812 | 0x00, 0x06, 0x00, 0xf4, 0x00), | ||
813 | PHYREGS(0x090c, 0x0908, 0x0904, 0x01c5, 0x01c6, 0x01c6), | ||
814 | }, | ||
815 | { .freq = 5785, | ||
816 | RADIOREGS3(0xf2, 0x00, 0x02, 0x04, 0x85, 0x07, 0x07, 0x04, | ||
817 | 0x10, 0x01, 0x06, 0x06, 0x06, 0x8a, 0x06, 0x00, | ||
818 | 0x40, 0x04, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06, | ||
819 | 0x00, 0xf4, 0x00, 0x04, 0x00, 0x02, 0x00, 0x7f, | ||
820 | 0x00, 0x06, 0x00, 0xf4, 0x00), | ||
821 | PHYREGS(0x090e, 0x090a, 0x0906, 0x01c4, 0x01c5, 0x01c6), | ||
822 | }, | ||
823 | { .freq = 5790, | ||
824 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x43, 0x05, 0x05, 0x04, | ||
825 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x8a, 0x06, 0x00, | ||
826 | 0x40, 0x04, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06, | ||
827 | 0x00, 0xf4, 0x00, 0x04, 0x00, 0x02, 0x00, 0x7f, | ||
828 | 0x00, 0x06, 0x00, 0xf4, 0x00), | ||
829 | PHYREGS(0x0910, 0x090c, 0x0908, 0x01c4, 0x01c5, 0x01c6), | ||
830 | }, | ||
831 | { .freq = 5795, | ||
832 | RADIOREGS3(0xf2, 0x00, 0x02, 0x04, 0x87, 0x07, 0x07, 0x04, | ||
833 | 0x10, 0x01, 0x06, 0x06, 0x06, 0x8a, 0x06, 0x00, | ||
834 | 0x40, 0x04, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06, | ||
835 | 0x00, 0xf4, 0x00, 0x04, 0x00, 0x02, 0x00, 0x7f, | ||
836 | 0x00, 0x06, 0x00, 0xf4, 0x00), | ||
837 | PHYREGS(0x0912, 0x090e, 0x090a, 0x01c4, 0x01c4, 0x01c5), | ||
838 | }, | ||
839 | { .freq = 5800, | ||
840 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x44, 0x05, 0x05, 0x04, | ||
841 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
842 | 0x20, 0x04, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x06, | ||
843 | 0x00, 0xf4, 0x00, 0x04, 0x00, 0x00, 0x00, 0x7f, | ||
844 | 0x00, 0x06, 0x00, 0xf4, 0x00), | ||
845 | PHYREGS(0x0914, 0x0910, 0x090c, 0x01c3, 0x01c4, 0x01c5), | ||
846 | }, | ||
847 | { .freq = 5805, | ||
848 | RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x89, 0x07, 0x07, 0x04, | ||
849 | 0x10, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
850 | 0x20, 0x04, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x06, | ||
851 | 0x00, 0xf4, 0x00, 0x04, 0x00, 0x00, 0x00, 0x7f, | ||
852 | 0x00, 0x06, 0x00, 0xf4, 0x00), | ||
853 | PHYREGS(0x0916, 0x0912, 0x090e, 0x01c3, 0x01c4, 0x01c4), | ||
854 | }, | ||
855 | { .freq = 5810, | ||
856 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x45, 0x05, 0x05, 0x04, | ||
857 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
858 | 0x20, 0x04, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x06, | ||
859 | 0x00, 0xf4, 0x00, 0x04, 0x00, 0x00, 0x00, 0x7f, | ||
860 | 0x00, 0x06, 0x00, 0xf4, 0x00), | ||
861 | PHYREGS(0x0918, 0x0914, 0x0910, 0x01c2, 0x01c3, 0x01c4), | ||
862 | }, | ||
863 | { .freq = 5815, | ||
864 | RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x8b, 0x07, 0x07, 0x04, | ||
865 | 0x10, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
866 | 0x20, 0x04, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x06, | ||
867 | 0x00, 0xf4, 0x00, 0x04, 0x00, 0x00, 0x00, 0x7f, | ||
868 | 0x00, 0x06, 0x00, 0xf4, 0x00), | ||
869 | PHYREGS(0x091a, 0x0916, 0x0912, 0x01c2, 0x01c3, 0x01c4), | ||
870 | }, | ||
871 | { .freq = 5820, | ||
872 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x46, 0x05, 0x05, 0x04, | ||
873 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
874 | 0x20, 0x03, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x06, | ||
875 | 0x00, 0xf4, 0x00, 0x03, 0x00, 0x00, 0x00, 0x7f, | ||
876 | 0x00, 0x06, 0x00, 0xf4, 0x00), | ||
877 | PHYREGS(0x091c, 0x0918, 0x0914, 0x01c2, 0x01c2, 0x01c3), | ||
878 | }, | ||
879 | { .freq = 5825, | ||
880 | RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x8d, 0x07, 0x07, 0x04, | ||
881 | 0x10, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
882 | 0x20, 0x03, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x06, | ||
883 | 0x00, 0xf4, 0x00, 0x03, 0x00, 0x00, 0x00, 0x7f, | ||
884 | 0x00, 0x06, 0x00, 0xf4, 0x00), | ||
885 | PHYREGS(0x091e, 0x091a, 0x0916, 0x01c1, 0x01c2, 0x01c3), | ||
886 | }, | ||
887 | { .freq = 5830, | ||
888 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x47, 0x05, 0x05, 0x04, | ||
889 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
890 | 0x20, 0x03, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x06, | ||
891 | 0x00, 0xf4, 0x00, 0x03, 0x00, 0x00, 0x00, 0x7f, | ||
892 | 0x00, 0x06, 0x00, 0xf4, 0x00), | ||
893 | PHYREGS(0x0920, 0x091c, 0x0918, 0x01c1, 0x01c2, 0x01c2), | ||
894 | }, | ||
895 | { .freq = 5840, | ||
896 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x48, 0x05, 0x05, 0x04, | ||
897 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
898 | 0x20, 0x03, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x06, | ||
899 | 0x00, 0xf4, 0x00, 0x03, 0x00, 0x00, 0x00, 0x7f, | ||
900 | 0x00, 0x06, 0x00, 0xf4, 0x00), | ||
901 | PHYREGS(0x0924, 0x0920, 0x091c, 0x01c0, 0x01c1, 0x01c2), | ||
902 | }, | ||
903 | { .freq = 5850, | ||
904 | RADIOREGS3(0xe0, 0x00, 0x01, 0x02, 0x49, 0x05, 0x05, 0x04, | ||
905 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
906 | 0x20, 0x03, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x06, | ||
907 | 0x00, 0xf4, 0x00, 0x03, 0x00, 0x00, 0x00, 0x7f, | ||
908 | 0x00, 0x06, 0x00, 0xf4, 0x00), | ||
909 | PHYREGS(0x0928, 0x0924, 0x0920, 0x01bf, 0x01c0, 0x01c1), | ||
910 | }, | ||
911 | { .freq = 5860, | ||
912 | RADIOREGS3(0xde, 0x00, 0x01, 0x02, 0x4a, 0x05, 0x05, 0x04, | ||
913 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
914 | 0x20, 0x03, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x06, | ||
915 | 0x00, 0xf2, 0x00, 0x03, 0x00, 0x00, 0x00, 0x7f, | ||
916 | 0x00, 0x06, 0x00, 0xf2, 0x00), | ||
917 | PHYREGS(0x092c, 0x0928, 0x0924, 0x01bf, 0x01bf, 0x01c0), | ||
918 | }, | ||
919 | { .freq = 5870, | ||
920 | RADIOREGS3(0xdb, 0x00, 0x01, 0x02, 0x4b, 0x05, 0x05, 0x04, | ||
921 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
922 | 0x20, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x06, | ||
923 | 0x00, 0xf2, 0x00, 0x02, 0x00, 0x00, 0x00, 0x7f, | ||
924 | 0x00, 0x06, 0x00, 0xf2, 0x00), | ||
925 | PHYREGS(0x0930, 0x092c, 0x0928, 0x01be, 0x01bf, 0x01bf), | ||
926 | }, | ||
927 | { .freq = 5880, | ||
928 | RADIOREGS3(0xd8, 0x00, 0x01, 0x02, 0x4c, 0x05, 0x05, 0x04, | ||
929 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
930 | 0x20, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x06, | ||
931 | 0x00, 0xf2, 0x00, 0x02, 0x00, 0x00, 0x00, 0x7f, | ||
932 | 0x00, 0x06, 0x00, 0xf2, 0x00), | ||
933 | PHYREGS(0x0934, 0x0930, 0x092c, 0x01bd, 0x01be, 0x01bf), | ||
934 | }, | ||
935 | { .freq = 5890, | ||
936 | RADIOREGS3(0xd6, 0x00, 0x01, 0x02, 0x4d, 0x05, 0x05, 0x04, | ||
937 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
938 | 0x20, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x06, | ||
939 | 0x00, 0xf2, 0x00, 0x02, 0x00, 0x00, 0x00, 0x7f, | ||
940 | 0x00, 0x06, 0x00, 0xf2, 0x00), | ||
941 | PHYREGS(0x0938, 0x0934, 0x0930, 0x01bc, 0x01bd, 0x01be), | ||
942 | }, | ||
943 | { .freq = 5900, | ||
944 | RADIOREGS3(0xd3, 0x00, 0x01, 0x02, 0x4e, 0x05, 0x05, 0x04, | ||
945 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x87, 0x03, 0x00, | ||
946 | 0x00, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x05, | ||
947 | 0x00, 0xf2, 0x00, 0x02, 0x00, 0x00, 0x00, 0x7f, | ||
948 | 0x00, 0x05, 0x00, 0xf2, 0x00), | ||
949 | PHYREGS(0x093c, 0x0938, 0x0934, 0x01bc, 0x01bc, 0x01bd), | ||
950 | }, | ||
951 | { .freq = 5910, | ||
952 | RADIOREGS3(0xd6, 0x00, 0x01, 0x02, 0x4f, 0x05, 0x05, 0x04, | ||
953 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x87, 0x03, 0x00, | ||
954 | 0x00, 0x01, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x05, | ||
955 | 0x00, 0xf2, 0x00, 0x01, 0x00, 0x00, 0x00, 0x7f, | ||
956 | 0x00, 0x05, 0x00, 0xf2, 0x00), | ||
957 | PHYREGS(0x0940, 0x093c, 0x0938, 0x01bb, 0x01bc, 0x01bc), | ||
958 | }, | ||
959 | { .freq = 2412, | ||
960 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x6c, 0x08, 0x08, 0x04, | ||
961 | 0x16, 0x01, 0x04, 0x04, 0x04, 0x8f, 0x30, 0x00, | ||
962 | 0x00, 0x00, 0xff, 0x00, 0x05, 0x00, 0x70, 0x00, | ||
963 | 0x0f, 0x00, 0x0f, 0x00, 0xff, 0x00, 0x05, 0x00, | ||
964 | 0x70, 0x00, 0x0f, 0x00, 0x0f), | ||
965 | PHYREGS(0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443), | ||
966 | }, | ||
967 | { .freq = 2417, | ||
968 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x71, 0x08, 0x08, 0x04, | ||
969 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
970 | 0x00, 0x00, 0xff, 0x00, 0x05, 0x00, 0x70, 0x00, | ||
971 | 0x0f, 0x00, 0x0f, 0x00, 0xff, 0x00, 0x05, 0x00, | ||
972 | 0x70, 0x00, 0x0f, 0x00, 0x0f), | ||
973 | PHYREGS(0x03cb, 0x03c7, 0x03c3, 0x0438, 0x043d, 0x0441), | ||
974 | }, | ||
975 | { .freq = 2422, | ||
976 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x76, 0x08, 0x08, 0x04, | ||
977 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
978 | 0x00, 0x00, 0xff, 0x00, 0x05, 0x00, 0x70, 0x00, | ||
979 | 0x0f, 0x00, 0x0f, 0x00, 0xff, 0x00, 0x05, 0x00, | ||
980 | 0x70, 0x00, 0x0f, 0x00, 0x0f), | ||
981 | PHYREGS(0x03cd, 0x03c9, 0x03c5, 0x0436, 0x043a, 0x043f), | ||
982 | }, | ||
983 | { .freq = 2427, | ||
984 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x7b, 0x08, 0x08, 0x04, | ||
985 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
986 | 0x00, 0x00, 0xfd, 0x00, 0x05, 0x00, 0x70, 0x00, | ||
987 | 0x0f, 0x00, 0x0f, 0x00, 0xfd, 0x00, 0x05, 0x00, | ||
988 | 0x70, 0x00, 0x0f, 0x00, 0x0f), | ||
989 | PHYREGS(0x03cf, 0x03cb, 0x03c7, 0x0434, 0x0438, 0x043d), | ||
990 | }, | ||
991 | { .freq = 2432, | ||
992 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x80, 0x08, 0x08, 0x04, | ||
993 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
994 | 0x00, 0x00, 0xfb, 0x00, 0x05, 0x00, 0x70, 0x00, | ||
995 | 0x0f, 0x00, 0x0f, 0x00, 0xfb, 0x00, 0x05, 0x00, | ||
996 | 0x70, 0x00, 0x0f, 0x00, 0x0f), | ||
997 | PHYREGS(0x03d1, 0x03cd, 0x03c9, 0x0431, 0x0436, 0x043a), | ||
998 | }, | ||
999 | { .freq = 2437, | ||
1000 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x85, 0x08, 0x08, 0x04, | ||
1001 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
1002 | 0x00, 0x00, 0xfa, 0x00, 0x05, 0x00, 0x70, 0x00, | ||
1003 | 0x0f, 0x00, 0x0f, 0x00, 0xfa, 0x00, 0x05, 0x00, | ||
1004 | 0x70, 0x00, 0x0f, 0x00, 0x0f), | ||
1005 | PHYREGS(0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438), | ||
1006 | }, | ||
1007 | { .freq = 2442, | ||
1008 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04, | ||
1009 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
1010 | 0x00, 0x00, 0xf8, 0x00, 0x05, 0x00, 0x70, 0x00, | ||
1011 | 0x0f, 0x00, 0x0f, 0x00, 0xf8, 0x00, 0x05, 0x00, | ||
1012 | 0x70, 0x00, 0x0f, 0x00, 0x0f), | ||
1013 | PHYREGS(0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436), | ||
1014 | }, | ||
1015 | { .freq = 2447, | ||
1016 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04, | ||
1017 | 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, | ||
1018 | 0x00, 0x00, 0xf7, 0x00, 0x05, 0x00, 0x70, 0x00, | ||
1019 | 0x0f, 0x00, 0x0f, 0x00, 0xf7, 0x00, 0x05, 0x00, | ||
1020 | 0x70, 0x00, 0x0f, 0x00, 0x0f), | ||
1021 | PHYREGS(0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434), | ||
1022 | }, | ||
1023 | { .freq = 2452, | ||
1024 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04, | ||
1025 | 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, | ||
1026 | 0x00, 0x00, 0xf6, 0x00, 0x05, 0x00, 0x70, 0x00, | ||
1027 | 0x0f, 0x00, 0x0f, 0x00, 0xf6, 0x00, 0x05, 0x00, | ||
1028 | 0x70, 0x00, 0x0f, 0x00, 0x0f), | ||
1029 | PHYREGS(0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431), | ||
1030 | }, | ||
1031 | { .freq = 2457, | ||
1032 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04, | ||
1033 | 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, | ||
1034 | 0x00, 0x00, 0xf5, 0x00, 0x05, 0x00, 0x70, 0x00, | ||
1035 | 0x0f, 0x00, 0x0d, 0x00, 0xf5, 0x00, 0x05, 0x00, | ||
1036 | 0x70, 0x00, 0x0f, 0x00, 0x0d), | ||
1037 | PHYREGS(0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f), | ||
1038 | }, | ||
1039 | { .freq = 2462, | ||
1040 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04, | ||
1041 | 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, | ||
1042 | 0x00, 0x00, 0xf4, 0x00, 0x05, 0x00, 0x70, 0x00, | ||
1043 | 0x0f, 0x00, 0x0d, 0x00, 0xf4, 0x00, 0x05, 0x00, | ||
1044 | 0x70, 0x00, 0x0f, 0x00, 0x0d), | ||
1045 | PHYREGS(0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d), | ||
1046 | }, | ||
1047 | { .freq = 2467, | ||
1048 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04, | ||
1049 | 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, | ||
1050 | 0x00, 0x00, 0xf3, 0x00, 0x05, 0x00, 0x70, 0x00, | ||
1051 | 0x0f, 0x00, 0x0d, 0x00, 0xf3, 0x00, 0x05, 0x00, | ||
1052 | 0x70, 0x00, 0x0f, 0x00, 0x0d), | ||
1053 | PHYREGS(0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b), | ||
1054 | }, | ||
1055 | { .freq = 2472, | ||
1056 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, | ||
1057 | 0x16, 0x01, 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, | ||
1058 | 0x00, 0x00, 0xf2, 0x00, 0x05, 0x00, 0x70, 0x00, | ||
1059 | 0x0f, 0x00, 0x0d, 0x00, 0xf2, 0x00, 0x05, 0x00, | ||
1060 | 0x70, 0x00, 0x0f, 0x00, 0x0d), | ||
1061 | PHYREGS(0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429), | ||
1062 | }, | ||
1063 | { .freq = 2484, | ||
1064 | RADIOREGS3(0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, | ||
1065 | 0x16, 0x01, 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, | ||
1066 | 0x00, 0x00, 0xf0, 0x00, 0x05, 0x00, 0x70, 0x00, | ||
1067 | 0x0f, 0x00, 0x0d, 0x00, 0xf0, 0x00, 0x05, 0x00, | ||
1068 | 0x70, 0x00, 0x0f, 0x00, 0x0d), | ||
1069 | PHYREGS(0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424), | ||
1070 | }, | ||
1071 | }; | ||
1072 | |||
1073 | static const struct b43_nphy_channeltab_entry_rev3 b43_nphy_channeltab_rev4[] = { | ||
1074 | { .freq = 4920, | ||
1075 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, | ||
1076 | 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, | ||
1077 | 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, | ||
1078 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, | ||
1079 | 0x00, 0x0f, 0x00, 0xff, 0x00), | ||
1080 | PHYREGS(0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216), | ||
1081 | }, | ||
1082 | { .freq = 4930, | ||
1083 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, | ||
1084 | 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, | ||
1085 | 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, | ||
1086 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, | ||
1087 | 0x00, 0x0f, 0x00, 0xff, 0x00), | ||
1088 | PHYREGS(0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215), | ||
1089 | }, | ||
1090 | { .freq = 4940, | ||
1091 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, | ||
1092 | 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, | ||
1093 | 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, | ||
1094 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, | ||
1095 | 0x00, 0x0f, 0x00, 0xff, 0x00), | ||
1096 | PHYREGS(0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214), | ||
1097 | }, | ||
1098 | { .freq = 4950, | ||
1099 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, | ||
1100 | 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, | ||
1101 | 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, | ||
1102 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, | ||
1103 | 0x00, 0x0f, 0x00, 0xff, 0x00), | ||
1104 | PHYREGS(0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213), | ||
1105 | }, | ||
1106 | { .freq = 4960, | ||
1107 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, | ||
1108 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
1109 | 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, | ||
1110 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, | ||
1111 | 0x00, 0x0f, 0x00, 0xff, 0x00), | ||
1112 | PHYREGS(0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212), | ||
1113 | }, | ||
1114 | { .freq = 4970, | ||
1115 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, | ||
1116 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
1117 | 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, | ||
1118 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, | ||
1119 | 0x00, 0x0f, 0x00, 0xff, 0x00), | ||
1120 | PHYREGS(0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211), | ||
1121 | }, | ||
1122 | { .freq = 4980, | ||
1123 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, | ||
1124 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
1125 | 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, | ||
1126 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, | ||
1127 | 0x00, 0x0f, 0x00, 0xff, 0x00), | ||
1128 | PHYREGS(0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f), | ||
1129 | }, | ||
1130 | { .freq = 4990, | ||
1131 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, | ||
1132 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
1133 | 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, | ||
1134 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, | ||
1135 | 0x00, 0x0f, 0x00, 0xff, 0x00), | ||
1136 | PHYREGS(0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e), | ||
1137 | }, | ||
1138 | { .freq = 5000, | ||
1139 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04, | ||
1140 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
1141 | 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, | ||
1142 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, | ||
1143 | 0x00, 0x0f, 0x00, 0xff, 0x00), | ||
1144 | PHYREGS(0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d), | ||
1145 | }, | ||
1146 | { .freq = 5010, | ||
1147 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04, | ||
1148 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
1149 | 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, | ||
1150 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, | ||
1151 | 0x00, 0x0f, 0x00, 0xff, 0x00), | ||
1152 | PHYREGS(0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c), | ||
1153 | }, | ||
1154 | { .freq = 5020, | ||
1155 | RADIOREGS3(0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04, | ||
1156 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
1157 | 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, | ||
1158 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, | ||
1159 | 0x00, 0x0f, 0x00, 0xff, 0x00), | ||
1160 | PHYREGS(0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b), | ||
1161 | }, | ||
1162 | { .freq = 5030, | ||
1163 | RADIOREGS3(0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04, | ||
1164 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
1165 | 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, | ||
1166 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, | ||
1167 | 0x00, 0x0f, 0x00, 0xff, 0x00), | ||
1168 | PHYREGS(0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a), | ||
1169 | }, | ||
1170 | { .freq = 5040, | ||
1171 | RADIOREGS3(0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x04, | ||
1172 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
1173 | 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, | ||
1174 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, | ||
1175 | 0x00, 0x0f, 0x00, 0xff, 0x00), | ||
1176 | PHYREGS(0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209), | ||
1177 | }, | ||
1178 | { .freq = 5050, | ||
1179 | RADIOREGS3(0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x04, | ||
1180 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
1181 | 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, | ||
1182 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, | ||
1183 | 0x00, 0x0f, 0x00, 0xff, 0x00), | ||
1184 | PHYREGS(0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208), | ||
1185 | }, | ||
1186 | { .freq = 5060, | ||
1187 | RADIOREGS3(0xe6, 0x01, 0x01, 0x01, 0xfa, 0x05, 0x05, 0x04, | ||
1188 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
1189 | 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, | ||
1190 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, | ||
1191 | 0x00, 0x0f, 0x00, 0xff, 0x00), | ||
1192 | PHYREGS(0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207), | ||
1193 | }, | ||
1194 | { .freq = 5070, | ||
1195 | RADIOREGS3(0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x04, | ||
1196 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
1197 | 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, | ||
1198 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, | ||
1199 | 0x00, 0x0f, 0x00, 0xff, 0x00), | ||
1200 | PHYREGS(0x07f0, 0x07ec, 0x07e8, 0x0204, 0x0205, 0x0206), | ||
1201 | }, | ||
1202 | { .freq = 5080, | ||
1203 | RADIOREGS3(0xde, 0x01, 0x01, 0x01, 0xfc, 0x05, 0x05, 0x04, | ||
1204 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
1205 | 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, | ||
1206 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, | ||
1207 | 0x00, 0x0f, 0x00, 0xff, 0x00), | ||
1208 | PHYREGS(0x07f4, 0x07f0, 0x07ec, 0x0203, 0x0204, 0x0205), | ||
1209 | }, | ||
1210 | { .freq = 5090, | ||
1211 | RADIOREGS3(0xde, 0x01, 0x01, 0x01, 0xfd, 0x05, 0x05, 0x04, | ||
1212 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
1213 | 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, | ||
1214 | 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, | ||
1215 | 0x00, 0x0f, 0x00, 0xff, 0x00), | ||
1216 | PHYREGS(0x07f8, 0x07f4, 0x07f0, 0x0202, 0x0203, 0x0204), | ||
1217 | }, | ||
1218 | { .freq = 5100, | ||
1219 | RADIOREGS3(0xd6, 0x01, 0x01, 0x01, 0xfe, 0x05, 0x05, 0x04, | ||
1220 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
1221 | 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, | ||
1222 | 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f, | ||
1223 | 0x00, 0x0f, 0x00, 0xfe, 0x00), | ||
1224 | PHYREGS(0x07fc, 0x07f8, 0x07f4, 0x0201, 0x0202, 0x0203), | ||
1225 | }, | ||
1226 | { .freq = 5110, | ||
1227 | RADIOREGS3(0xd6, 0x01, 0x01, 0x01, 0xff, 0x05, 0x05, 0x04, | ||
1228 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
1229 | 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, | ||
1230 | 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f, | ||
1231 | 0x00, 0x0f, 0x00, 0xfe, 0x00), | ||
1232 | PHYREGS(0x0800, 0x07fc, 0x07f8, 0x0200, 0x0201, 0x0202), | ||
1233 | }, | ||
1234 | { .freq = 5120, | ||
1235 | RADIOREGS3(0xce, 0x01, 0x01, 0x02, 0x00, 0x05, 0x05, 0x04, | ||
1236 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
1237 | 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, | ||
1238 | 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f, | ||
1239 | 0x00, 0x0f, 0x00, 0xfe, 0x00), | ||
1240 | PHYREGS(0x0804, 0x0800, 0x07fc, 0x01ff, 0x0200, 0x0201), | ||
1241 | }, | ||
1242 | { .freq = 5130, | ||
1243 | RADIOREGS3(0xce, 0x01, 0x01, 0x02, 0x01, 0x05, 0x05, 0x04, | ||
1244 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
1245 | 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, | ||
1246 | 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f, | ||
1247 | 0x00, 0x0f, 0x00, 0xfe, 0x00), | ||
1248 | PHYREGS(0x0808, 0x0804, 0x0800, 0x01fe, 0x01ff, 0x0200), | ||
1249 | }, | ||
1250 | { .freq = 5140, | ||
1251 | RADIOREGS3(0xc6, 0x01, 0x01, 0x02, 0x02, 0x05, 0x05, 0x04, | ||
1252 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
1253 | 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, | ||
1254 | 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f, | ||
1255 | 0x00, 0x0f, 0x00, 0xfe, 0x00), | ||
1256 | PHYREGS(0x080c, 0x0808, 0x0804, 0x01fd, 0x01fe, 0x01ff), | ||
1257 | }, | ||
1258 | { .freq = 5160, | ||
1259 | RADIOREGS3(0xbe, 0x01, 0x01, 0x02, 0x04, 0x05, 0x05, 0x04, | ||
1260 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
1261 | 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, | ||
1262 | 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f, | ||
1263 | 0x00, 0x0f, 0x00, 0xfe, 0x00), | ||
1264 | PHYREGS(0x0814, 0x0810, 0x080c, 0x01fb, 0x01fc, 0x01fd), | ||
1265 | }, | ||
1266 | { .freq = 5170, | ||
1267 | RADIOREGS3(0xbe, 0x01, 0x01, 0x02, 0x05, 0x05, 0x05, 0x04, | ||
1268 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
1269 | 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, | ||
1270 | 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f, | ||
1271 | 0x00, 0x0f, 0x00, 0xfe, 0x00), | ||
1272 | PHYREGS(0x0818, 0x0814, 0x0810, 0x01fa, 0x01fb, 0x01fc), | ||
1273 | }, | ||
1274 | { .freq = 5180, | ||
1275 | RADIOREGS3(0xb6, 0x01, 0x01, 0x02, 0x06, 0x05, 0x05, 0x04, | ||
1276 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
1277 | 0xff, 0xef, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, | ||
1278 | 0x00, 0xfe, 0x00, 0xef, 0x00, 0x0c, 0x00, 0x7f, | ||
1279 | 0x00, 0x0f, 0x00, 0xfe, 0x00), | ||
1280 | PHYREGS(0x081c, 0x0818, 0x0814, 0x01f9, 0x01fa, 0x01fb), | ||
1281 | }, | ||
1282 | { .freq = 5190, | ||
1283 | RADIOREGS3(0xb6, 0x01, 0x01, 0x02, 0x07, 0x05, 0x05, 0x04, | ||
1284 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
1285 | 0xff, 0xef, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, | ||
1286 | 0x00, 0xfe, 0x00, 0xef, 0x00, 0x0c, 0x00, 0x7f, | ||
1287 | 0x00, 0x0f, 0x00, 0xfe, 0x00), | ||
1288 | PHYREGS(0x0820, 0x081c, 0x0818, 0x01f8, 0x01f9, 0x01fa), | ||
1289 | }, | ||
1290 | { .freq = 5200, | ||
1291 | RADIOREGS3(0xaf, 0x01, 0x01, 0x02, 0x08, 0x05, 0x05, 0x04, | ||
1292 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
1293 | 0xff, 0xef, 0x00, 0x0a, 0x00, 0x7f, 0x00, 0x0f, | ||
1294 | 0x00, 0xfc, 0x00, 0xef, 0x00, 0x0a, 0x00, 0x7f, | ||
1295 | 0x00, 0x0f, 0x00, 0xfc, 0x00), | ||
1296 | PHYREGS(0x0824, 0x0820, 0x081c, 0x01f7, 0x01f8, 0x01f9), | ||
1297 | }, | ||
1298 | { .freq = 5210, | ||
1299 | RADIOREGS3(0xaf, 0x01, 0x01, 0x02, 0x09, 0x05, 0x05, 0x04, | ||
1300 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
1301 | 0xff, 0xdf, 0x00, 0x0a, 0x00, 0x7f, 0x00, 0x0f, | ||
1302 | 0x00, 0xfc, 0x00, 0xdf, 0x00, 0x0a, 0x00, 0x7f, | ||
1303 | 0x00, 0x0f, 0x00, 0xfc, 0x00), | ||
1304 | PHYREGS(0x0828, 0x0824, 0x0820, 0x01f6, 0x01f7, 0x01f8), | ||
1305 | }, | ||
1306 | { .freq = 5220, | ||
1307 | RADIOREGS3(0xa7, 0x01, 0x01, 0x02, 0x0a, 0x05, 0x05, 0x04, | ||
1308 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
1309 | 0xff, 0xdf, 0x00, 0x0a, 0x00, 0x7f, 0x00, 0x0f, | ||
1310 | 0x00, 0xfc, 0x00, 0xdf, 0x00, 0x0a, 0x00, 0x7f, | ||
1311 | 0x00, 0x0f, 0x00, 0xfc, 0x00), | ||
1312 | PHYREGS(0x082c, 0x0828, 0x0824, 0x01f5, 0x01f6, 0x01f7), | ||
1313 | }, | ||
1314 | { .freq = 5230, | ||
1315 | RADIOREGS3(0xa7, 0x01, 0x01, 0x02, 0x0b, 0x05, 0x05, 0x04, | ||
1316 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
1317 | 0xff, 0xdf, 0x00, 0x0a, 0x00, 0x7f, 0x00, 0x0f, | ||
1318 | 0x00, 0xfc, 0x00, 0xdf, 0x00, 0x0a, 0x00, 0x7f, | ||
1319 | 0x00, 0x0f, 0x00, 0xfc, 0x00), | ||
1320 | PHYREGS(0x0830, 0x082c, 0x0828, 0x01f4, 0x01f5, 0x01f6), | ||
1321 | }, | ||
1322 | { .freq = 5240, | ||
1323 | RADIOREGS3(0xa0, 0x01, 0x01, 0x02, 0x0c, 0x05, 0x05, 0x04, | ||
1324 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
1325 | 0xff, 0xcf, 0x00, 0x0a, 0x00, 0x7f, 0x00, 0x0f, | ||
1326 | 0x00, 0xfc, 0x00, 0xcf, 0x00, 0x0a, 0x00, 0x7f, | ||
1327 | 0x00, 0x0f, 0x00, 0xfc, 0x00), | ||
1328 | PHYREGS(0x0834, 0x0830, 0x082c, 0x01f3, 0x01f4, 0x01f5), | ||
1329 | }, | ||
1330 | { .freq = 5250, | ||
1331 | RADIOREGS3(0xa0, 0x01, 0x01, 0x02, 0x0d, 0x05, 0x05, 0x04, | ||
1332 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
1333 | 0xff, 0xcf, 0x00, 0x0a, 0x00, 0x7f, 0x00, 0x0f, | ||
1334 | 0x00, 0xfc, 0x00, 0xcf, 0x00, 0x0a, 0x00, 0x7f, | ||
1335 | 0x00, 0x0f, 0x00, 0xfc, 0x00), | ||
1336 | PHYREGS(0x0838, 0x0834, 0x0830, 0x01f2, 0x01f3, 0x01f4), | ||
1337 | }, | ||
1338 | { .freq = 5260, | ||
1339 | RADIOREGS3(0x98, 0x01, 0x01, 0x02, 0x0e, 0x05, 0x05, 0x04, | ||
1340 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
1341 | 0xff, 0xcf, 0x00, 0x0a, 0x00, 0x7f, 0x00, 0x0f, | ||
1342 | 0x00, 0xfc, 0x00, 0xcf, 0x00, 0x0a, 0x00, 0x7f, | ||
1343 | 0x00, 0x0f, 0x00, 0xfc, 0x00), | ||
1344 | PHYREGS(0x083c, 0x0838, 0x0834, 0x01f1, 0x01f2, 0x01f3), | ||
1345 | }, | ||
1346 | { .freq = 5270, | ||
1347 | RADIOREGS3(0x98, 0x01, 0x01, 0x02, 0x0f, 0x05, 0x05, 0x04, | ||
1348 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0f, 0x00, | ||
1349 | 0xff, 0xcf, 0x00, 0x0a, 0x00, 0x7f, 0x00, 0x0f, | ||
1350 | 0x00, 0xfc, 0x00, 0xcf, 0x00, 0x0a, 0x00, 0x7f, | ||
1351 | 0x00, 0x0f, 0x00, 0xfc, 0x00), | ||
1352 | PHYREGS(0x0840, 0x083c, 0x0838, 0x01f0, 0x01f1, 0x01f2), | ||
1353 | }, | ||
1354 | { .freq = 5280, | ||
1355 | RADIOREGS3(0x91, 0x01, 0x01, 0x02, 0x10, 0x05, 0x05, 0x04, | ||
1356 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0f, 0x00, | ||
1357 | 0xff, 0xbf, 0x00, 0x0a, 0x00, 0x7f, 0x00, 0x0f, | ||
1358 | 0x00, 0xfc, 0x00, 0xbf, 0x00, 0x0a, 0x00, 0x7f, | ||
1359 | 0x00, 0x0f, 0x00, 0xfc, 0x00), | ||
1360 | PHYREGS(0x0844, 0x0840, 0x083c, 0x01f0, 0x01f0, 0x01f1), | ||
1361 | }, | ||
1362 | { .freq = 5290, | ||
1363 | RADIOREGS3(0x91, 0x01, 0x01, 0x02, 0x11, 0x05, 0x05, 0x04, | ||
1364 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0f, 0x00, | ||
1365 | 0xff, 0xbf, 0x00, 0x0a, 0x00, 0x7f, 0x00, 0x0f, | ||
1366 | 0x00, 0xfc, 0x00, 0xbf, 0x00, 0x0a, 0x00, 0x7f, | ||
1367 | 0x00, 0x0f, 0x00, 0xfc, 0x00), | ||
1368 | PHYREGS(0x0848, 0x0844, 0x0840, 0x01ef, 0x01f0, 0x01f0), | ||
1369 | }, | ||
1370 | { .freq = 5300, | ||
1371 | RADIOREGS3(0x8a, 0x01, 0x01, 0x02, 0x12, 0x05, 0x05, 0x04, | ||
1372 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00, | ||
1373 | 0xff, 0xbf, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0f, | ||
1374 | 0x00, 0xfa, 0x00, 0xbf, 0x00, 0x08, 0x00, 0x7f, | ||
1375 | 0x00, 0x0f, 0x00, 0xfa, 0x00), | ||
1376 | PHYREGS(0x084c, 0x0848, 0x0844, 0x01ee, 0x01ef, 0x01f0), | ||
1377 | }, | ||
1378 | { .freq = 5310, | ||
1379 | RADIOREGS3(0x8a, 0x01, 0x01, 0x02, 0x13, 0x05, 0x05, 0x04, | ||
1380 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00, | ||
1381 | 0xff, 0xbf, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0f, | ||
1382 | 0x00, 0xfa, 0x00, 0xbf, 0x00, 0x08, 0x00, 0x7f, | ||
1383 | 0x00, 0x0f, 0x00, 0xfa, 0x00), | ||
1384 | PHYREGS(0x0850, 0x084c, 0x0848, 0x01ed, 0x01ee, 0x01ef), | ||
1385 | }, | ||
1386 | { .freq = 5320, | ||
1387 | RADIOREGS3(0x83, 0x01, 0x01, 0x02, 0x14, 0x05, 0x05, 0x04, | ||
1388 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00, | ||
1389 | 0xff, 0xbf, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0f, | ||
1390 | 0x00, 0xfa, 0x00, 0xbf, 0x00, 0x08, 0x00, 0x7f, | ||
1391 | 0x00, 0x0f, 0x00, 0xfa, 0x00), | ||
1392 | PHYREGS(0x0854, 0x0850, 0x084c, 0x01ec, 0x01ed, 0x01ee), | ||
1393 | }, | ||
1394 | { .freq = 5330, | ||
1395 | RADIOREGS3(0x83, 0x01, 0x01, 0x02, 0x15, 0x05, 0x05, 0x04, | ||
1396 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00, | ||
1397 | 0xff, 0xaf, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0f, | ||
1398 | 0x00, 0xfa, 0x00, 0xaf, 0x00, 0x08, 0x00, 0x7f, | ||
1399 | 0x00, 0x0f, 0x00, 0xfa, 0x00), | ||
1400 | PHYREGS(0x0858, 0x0854, 0x0850, 0x01eb, 0x01ec, 0x01ed), | ||
1401 | }, | ||
1402 | { .freq = 5340, | ||
1403 | RADIOREGS3(0x7c, 0x01, 0x01, 0x02, 0x16, 0x05, 0x05, 0x04, | ||
1404 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00, | ||
1405 | 0xff, 0xaf, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0f, | ||
1406 | 0x00, 0xfa, 0x00, 0xaf, 0x00, 0x08, 0x00, 0x7f, | ||
1407 | 0x00, 0x0f, 0x00, 0xfa, 0x00), | ||
1408 | PHYREGS(0x085c, 0x0858, 0x0854, 0x01ea, 0x01eb, 0x01ec), | ||
1409 | }, | ||
1410 | { .freq = 5350, | ||
1411 | RADIOREGS3(0x7c, 0x01, 0x01, 0x02, 0x17, 0x05, 0x05, 0x04, | ||
1412 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00, | ||
1413 | 0xff, 0x9f, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0f, | ||
1414 | 0x00, 0xfa, 0x00, 0x9f, 0x00, 0x08, 0x00, 0x7f, | ||
1415 | 0x00, 0x0f, 0x00, 0xfa, 0x00), | ||
1416 | PHYREGS(0x0860, 0x085c, 0x0858, 0x01e9, 0x01ea, 0x01eb), | ||
1417 | }, | ||
1418 | { .freq = 5360, | ||
1419 | RADIOREGS3(0x75, 0x01, 0x01, 0x02, 0x18, 0x05, 0x05, 0x04, | ||
1420 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00, | ||
1421 | 0xff, 0x9f, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0f, | ||
1422 | 0x00, 0xfa, 0x00, 0x9f, 0x00, 0x08, 0x00, 0x7f, | ||
1423 | 0x00, 0x0f, 0x00, 0xfa, 0x00), | ||
1424 | PHYREGS(0x0864, 0x0860, 0x085c, 0x01e8, 0x01e9, 0x01ea), | ||
1425 | }, | ||
1426 | { .freq = 5370, | ||
1427 | RADIOREGS3(0x75, 0x01, 0x01, 0x02, 0x19, 0x05, 0x05, 0x04, | ||
1428 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00, | ||
1429 | 0xff, 0x9f, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0f, | ||
1430 | 0x00, 0xfa, 0x00, 0x9f, 0x00, 0x08, 0x00, 0x7f, | ||
1431 | 0x00, 0x0f, 0x00, 0xfa, 0x00), | ||
1432 | PHYREGS(0x0868, 0x0864, 0x0860, 0x01e7, 0x01e8, 0x01e9), | ||
1433 | }, | ||
1434 | { .freq = 5380, | ||
1435 | RADIOREGS3(0x6e, 0x01, 0x01, 0x02, 0x1a, 0x05, 0x05, 0x04, | ||
1436 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00, | ||
1437 | 0xff, 0x9f, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0f, | ||
1438 | 0x00, 0xfa, 0x00, 0x9f, 0x00, 0x08, 0x00, 0x7f, | ||
1439 | 0x00, 0x0f, 0x00, 0xfa, 0x00), | ||
1440 | PHYREGS(0x086c, 0x0868, 0x0864, 0x01e6, 0x01e7, 0x01e8), | ||
1441 | }, | ||
1442 | { .freq = 5390, | ||
1443 | RADIOREGS3(0x6e, 0x01, 0x01, 0x02, 0x1b, 0x05, 0x05, 0x04, | ||
1444 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00, | ||
1445 | 0xff, 0x8f, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0f, | ||
1446 | 0x00, 0xfa, 0x00, 0x8f, 0x00, 0x08, 0x00, 0x7f, | ||
1447 | 0x00, 0x0f, 0x00, 0xfa, 0x00), | ||
1448 | PHYREGS(0x0870, 0x086c, 0x0868, 0x01e5, 0x01e6, 0x01e7), | ||
1449 | }, | ||
1450 | { .freq = 5400, | ||
1451 | RADIOREGS3(0x67, 0x01, 0x01, 0x02, 0x1c, 0x05, 0x05, 0x04, | ||
1452 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00, | ||
1453 | 0xc8, 0x8f, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0f, | ||
1454 | 0x00, 0xf8, 0x00, 0x8f, 0x00, 0x07, 0x00, 0x7f, | ||
1455 | 0x00, 0x0f, 0x00, 0xf8, 0x00), | ||
1456 | PHYREGS(0x0874, 0x0870, 0x086c, 0x01e5, 0x01e5, 0x01e6), | ||
1457 | }, | ||
1458 | { .freq = 5410, | ||
1459 | RADIOREGS3(0x67, 0x01, 0x01, 0x02, 0x1d, 0x05, 0x05, 0x04, | ||
1460 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00, | ||
1461 | 0xc8, 0x8f, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0f, | ||
1462 | 0x00, 0xf8, 0x00, 0x8f, 0x00, 0x07, 0x00, 0x7f, | ||
1463 | 0x00, 0x0f, 0x00, 0xf8, 0x00), | ||
1464 | PHYREGS(0x0878, 0x0874, 0x0870, 0x01e4, 0x01e5, 0x01e5), | ||
1465 | }, | ||
1466 | { .freq = 5420, | ||
1467 | RADIOREGS3(0x61, 0x01, 0x01, 0x02, 0x1e, 0x05, 0x05, 0x04, | ||
1468 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00, | ||
1469 | 0xc8, 0x8e, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0f, | ||
1470 | 0x00, 0xf8, 0x00, 0x8e, 0x00, 0x07, 0x00, 0x7f, | ||
1471 | 0x00, 0x0f, 0x00, 0xf8, 0x00), | ||
1472 | PHYREGS(0x087c, 0x0878, 0x0874, 0x01e3, 0x01e4, 0x01e5), | ||
1473 | }, | ||
1474 | { .freq = 5430, | ||
1475 | RADIOREGS3(0x61, 0x01, 0x01, 0x02, 0x1f, 0x05, 0x05, 0x04, | ||
1476 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00, | ||
1477 | 0xc8, 0x8e, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0f, | ||
1478 | 0x00, 0xf8, 0x00, 0x8e, 0x00, 0x07, 0x00, 0x7f, | ||
1479 | 0x00, 0x0f, 0x00, 0xf8, 0x00), | ||
1480 | PHYREGS(0x0880, 0x087c, 0x0878, 0x01e2, 0x01e3, 0x01e4), | ||
1481 | }, | ||
1482 | { .freq = 5440, | ||
1483 | RADIOREGS3(0x5a, 0x01, 0x01, 0x02, 0x20, 0x05, 0x05, 0x04, | ||
1484 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00, | ||
1485 | 0xc8, 0x7e, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0f, | ||
1486 | 0x00, 0xf8, 0x00, 0x7e, 0x00, 0x07, 0x00, 0x7f, | ||
1487 | 0x00, 0x0f, 0x00, 0xf8, 0x00), | ||
1488 | PHYREGS(0x0884, 0x0880, 0x087c, 0x01e1, 0x01e2, 0x01e3), | ||
1489 | }, | ||
1490 | { .freq = 5450, | ||
1491 | RADIOREGS3(0x5a, 0x01, 0x01, 0x02, 0x21, 0x05, 0x05, 0x04, | ||
1492 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00, | ||
1493 | 0xc8, 0x7d, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0f, | ||
1494 | 0x00, 0xf8, 0x00, 0x7d, 0x00, 0x07, 0x00, 0x7f, | ||
1495 | 0x00, 0x0f, 0x00, 0xf8, 0x00), | ||
1496 | PHYREGS(0x0888, 0x0884, 0x0880, 0x01e0, 0x01e1, 0x01e2), | ||
1497 | }, | ||
1498 | { .freq = 5460, | ||
1499 | RADIOREGS3(0x53, 0x01, 0x01, 0x02, 0x22, 0x05, 0x05, 0x04, | ||
1500 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00, | ||
1501 | 0xc8, 0x6d, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0f, | ||
1502 | 0x00, 0xf8, 0x00, 0x6d, 0x00, 0x07, 0x00, 0x7f, | ||
1503 | 0x00, 0x0f, 0x00, 0xf8, 0x00), | ||
1504 | PHYREGS(0x088c, 0x0888, 0x0884, 0x01df, 0x01e0, 0x01e1), | ||
1505 | }, | ||
1506 | { .freq = 5470, | ||
1507 | RADIOREGS3(0x53, 0x01, 0x01, 0x02, 0x23, 0x05, 0x05, 0x04, | ||
1508 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00, | ||
1509 | 0xc8, 0x6d, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0f, | ||
1510 | 0x00, 0xf8, 0x00, 0x6d, 0x00, 0x07, 0x00, 0x7f, | ||
1511 | 0x00, 0x0f, 0x00, 0xf8, 0x00), | ||
1512 | PHYREGS(0x0890, 0x088c, 0x0888, 0x01de, 0x01df, 0x01e0), | ||
1513 | }, | ||
1514 | { .freq = 5480, | ||
1515 | RADIOREGS3(0x4d, 0x01, 0x01, 0x02, 0x24, 0x05, 0x05, 0x04, | ||
1516 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00, | ||
1517 | 0xc8, 0x5d, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0f, | ||
1518 | 0x00, 0xf8, 0x00, 0x5d, 0x00, 0x07, 0x00, 0x7f, | ||
1519 | 0x00, 0x0f, 0x00, 0xf8, 0x00), | ||
1520 | PHYREGS(0x0894, 0x0890, 0x088c, 0x01dd, 0x01de, 0x01df), | ||
1521 | }, | ||
1522 | { .freq = 5490, | ||
1523 | RADIOREGS3(0x4d, 0x01, 0x01, 0x02, 0x25, 0x05, 0x05, 0x04, | ||
1524 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00, | ||
1525 | 0xc8, 0x5c, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0f, | ||
1526 | 0x00, 0xf8, 0x00, 0x5c, 0x00, 0x07, 0x00, 0x7f, | ||
1527 | 0x00, 0x0f, 0x00, 0xf8, 0x00), | ||
1528 | PHYREGS(0x0898, 0x0894, 0x0890, 0x01dd, 0x01dd, 0x01de), | ||
1529 | }, | ||
1530 | { .freq = 5500, | ||
1531 | RADIOREGS3(0x47, 0x01, 0x01, 0x02, 0x26, 0x05, 0x05, 0x04, | ||
1532 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, | ||
1533 | 0x84, 0x5c, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, | ||
1534 | 0x00, 0xf6, 0x00, 0x5c, 0x00, 0x06, 0x00, 0x7f, | ||
1535 | 0x00, 0x0d, 0x00, 0xf6, 0x00), | ||
1536 | PHYREGS(0x089c, 0x0898, 0x0894, 0x01dc, 0x01dd, 0x01dd), | ||
1537 | }, | ||
1538 | { .freq = 5510, | ||
1539 | RADIOREGS3(0x47, 0x01, 0x01, 0x02, 0x27, 0x05, 0x05, 0x04, | ||
1540 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, | ||
1541 | 0x84, 0x4c, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, | ||
1542 | 0x00, 0xf6, 0x00, 0x4c, 0x00, 0x06, 0x00, 0x7f, | ||
1543 | 0x00, 0x0d, 0x00, 0xf6, 0x00), | ||
1544 | PHYREGS(0x08a0, 0x089c, 0x0898, 0x01db, 0x01dc, 0x01dd), | ||
1545 | }, | ||
1546 | { .freq = 5520, | ||
1547 | RADIOREGS3(0x40, 0x01, 0x01, 0x02, 0x28, 0x05, 0x05, 0x04, | ||
1548 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, | ||
1549 | 0x84, 0x4c, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, | ||
1550 | 0x00, 0xf6, 0x00, 0x4c, 0x00, 0x06, 0x00, 0x7f, | ||
1551 | 0x00, 0x0d, 0x00, 0xf6, 0x00), | ||
1552 | PHYREGS(0x08a4, 0x08a0, 0x089c, 0x01da, 0x01db, 0x01dc), | ||
1553 | }, | ||
1554 | { .freq = 5530, | ||
1555 | RADIOREGS3(0x40, 0x01, 0x01, 0x02, 0x29, 0x05, 0x05, 0x04, | ||
1556 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, | ||
1557 | 0x84, 0x3b, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, | ||
1558 | 0x00, 0xf6, 0x00, 0x3b, 0x00, 0x06, 0x00, 0x7f, | ||
1559 | 0x00, 0x0d, 0x00, 0xf6, 0x00), | ||
1560 | PHYREGS(0x08a8, 0x08a4, 0x08a0, 0x01d9, 0x01da, 0x01db), | ||
1561 | }, | ||
1562 | { .freq = 5540, | ||
1563 | RADIOREGS3(0x3a, 0x01, 0x01, 0x02, 0x2a, 0x05, 0x05, 0x04, | ||
1564 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, | ||
1565 | 0x84, 0x3b, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, | ||
1566 | 0x00, 0xf6, 0x00, 0x3b, 0x00, 0x06, 0x00, 0x7f, | ||
1567 | 0x00, 0x0d, 0x00, 0xf6, 0x00), | ||
1568 | PHYREGS(0x08ac, 0x08a8, 0x08a4, 0x01d8, 0x01d9, 0x01da), | ||
1569 | }, | ||
1570 | { .freq = 5550, | ||
1571 | RADIOREGS3(0x3a, 0x01, 0x01, 0x02, 0x2b, 0x05, 0x05, 0x04, | ||
1572 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, | ||
1573 | 0x84, 0x3b, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, | ||
1574 | 0x00, 0xf6, 0x00, 0x3b, 0x00, 0x06, 0x00, 0x7f, | ||
1575 | 0x00, 0x0d, 0x00, 0xf6, 0x00), | ||
1576 | PHYREGS(0x08b0, 0x08ac, 0x08a8, 0x01d7, 0x01d8, 0x01d9), | ||
1577 | }, | ||
1578 | { .freq = 5560, | ||
1579 | RADIOREGS3(0x34, 0x01, 0x01, 0x02, 0x2c, 0x05, 0x05, 0x04, | ||
1580 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, | ||
1581 | 0x84, 0x2b, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, | ||
1582 | 0x00, 0xf6, 0x00, 0x2b, 0x00, 0x06, 0x00, 0x7f, | ||
1583 | 0x00, 0x0d, 0x00, 0xf6, 0x00), | ||
1584 | PHYREGS(0x08b4, 0x08b0, 0x08ac, 0x01d7, 0x01d7, 0x01d8), | ||
1585 | }, | ||
1586 | { .freq = 5570, | ||
1587 | RADIOREGS3(0x34, 0x01, 0x01, 0x02, 0x2d, 0x05, 0x05, 0x04, | ||
1588 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, | ||
1589 | 0x84, 0x2a, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, | ||
1590 | 0x00, 0xf6, 0x00, 0x2a, 0x00, 0x06, 0x00, 0x7f, | ||
1591 | 0x00, 0x0d, 0x00, 0xf6, 0x00), | ||
1592 | PHYREGS(0x08b8, 0x08b4, 0x08b0, 0x01d6, 0x01d7, 0x01d7), | ||
1593 | }, | ||
1594 | { .freq = 5580, | ||
1595 | RADIOREGS3(0x2e, 0x01, 0x01, 0x02, 0x2e, 0x05, 0x05, 0x04, | ||
1596 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, | ||
1597 | 0x84, 0x1a, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, | ||
1598 | 0x00, 0xf6, 0x00, 0x1a, 0x00, 0x06, 0x00, 0x7f, | ||
1599 | 0x00, 0x0d, 0x00, 0xf6, 0x00), | ||
1600 | PHYREGS(0x08bc, 0x08b8, 0x08b4, 0x01d5, 0x01d6, 0x01d7), | ||
1601 | }, | ||
1602 | { .freq = 5590, | ||
1603 | RADIOREGS3(0x2e, 0x01, 0x01, 0x02, 0x2f, 0x05, 0x05, 0x04, | ||
1604 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, | ||
1605 | 0x84, 0x1a, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, | ||
1606 | 0x00, 0xf6, 0x00, 0x1a, 0x00, 0x06, 0x00, 0x7f, | ||
1607 | 0x00, 0x0d, 0x00, 0xf6, 0x00), | ||
1608 | PHYREGS(0x08c0, 0x08bc, 0x08b8, 0x01d4, 0x01d5, 0x01d6), | ||
1609 | }, | ||
1610 | { .freq = 5600, | ||
1611 | RADIOREGS3(0x28, 0x01, 0x01, 0x02, 0x30, 0x05, 0x05, 0x04, | ||
1612 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, | ||
1613 | 0x70, 0x1a, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, | ||
1614 | 0x00, 0xf4, 0x00, 0x1a, 0x00, 0x04, 0x00, 0x7f, | ||
1615 | 0x00, 0x0b, 0x00, 0xf4, 0x00), | ||
1616 | PHYREGS(0x08c4, 0x08c0, 0x08bc, 0x01d3, 0x01d4, 0x01d5), | ||
1617 | }, | ||
1618 | { .freq = 5610, | ||
1619 | RADIOREGS3(0x28, 0x01, 0x01, 0x02, 0x31, 0x05, 0x05, 0x04, | ||
1620 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, | ||
1621 | 0x70, 0x19, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, | ||
1622 | 0x00, 0xf4, 0x00, 0x19, 0x00, 0x04, 0x00, 0x7f, | ||
1623 | 0x00, 0x0b, 0x00, 0xf4, 0x00), | ||
1624 | PHYREGS(0x08c8, 0x08c4, 0x08c0, 0x01d2, 0x01d3, 0x01d4), | ||
1625 | }, | ||
1626 | { .freq = 5620, | ||
1627 | RADIOREGS3(0x21, 0x01, 0x01, 0x02, 0x32, 0x05, 0x05, 0x04, | ||
1628 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, | ||
1629 | 0x70, 0x19, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, | ||
1630 | 0x00, 0xf4, 0x00, 0x19, 0x00, 0x04, 0x00, 0x7f, | ||
1631 | 0x00, 0x0b, 0x00, 0xf4, 0x00), | ||
1632 | PHYREGS(0x08cc, 0x08c8, 0x08c4, 0x01d2, 0x01d2, 0x01d3), | ||
1633 | }, | ||
1634 | { .freq = 5630, | ||
1635 | RADIOREGS3(0x21, 0x01, 0x01, 0x02, 0x33, 0x05, 0x05, 0x04, | ||
1636 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, | ||
1637 | 0x70, 0x09, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, | ||
1638 | 0x00, 0xf4, 0x00, 0x09, 0x00, 0x04, 0x00, 0x7f, | ||
1639 | 0x00, 0x0b, 0x00, 0xf4, 0x00), | ||
1640 | PHYREGS(0x08d0, 0x08cc, 0x08c8, 0x01d1, 0x01d2, 0x01d2), | ||
1641 | }, | ||
1642 | { .freq = 5640, | ||
1643 | RADIOREGS3(0x1c, 0x01, 0x01, 0x02, 0x34, 0x05, 0x05, 0x04, | ||
1644 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, | ||
1645 | 0x70, 0x09, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, | ||
1646 | 0x00, 0xf4, 0x00, 0x09, 0x00, 0x04, 0x00, 0x7f, | ||
1647 | 0x00, 0x0b, 0x00, 0xf4, 0x00), | ||
1648 | PHYREGS(0x08d4, 0x08d0, 0x08cc, 0x01d0, 0x01d1, 0x01d2), | ||
1649 | }, | ||
1650 | { .freq = 5650, | ||
1651 | RADIOREGS3(0x1c, 0x01, 0x01, 0x02, 0x35, 0x05, 0x05, 0x04, | ||
1652 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, | ||
1653 | 0x70, 0x08, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, | ||
1654 | 0x00, 0xf4, 0x00, 0x08, 0x00, 0x04, 0x00, 0x7f, | ||
1655 | 0x00, 0x0b, 0x00, 0xf4, 0x00), | ||
1656 | PHYREGS(0x08d8, 0x08d4, 0x08d0, 0x01cf, 0x01d0, 0x01d1), | ||
1657 | }, | ||
1658 | { .freq = 5660, | ||
1659 | RADIOREGS3(0x16, 0x01, 0x01, 0x02, 0x36, 0x05, 0x05, 0x04, | ||
1660 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, | ||
1661 | 0x70, 0x08, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, | ||
1662 | 0x00, 0xf4, 0x00, 0x08, 0x00, 0x04, 0x00, 0x7f, | ||
1663 | 0x00, 0x0b, 0x00, 0xf4, 0x00), | ||
1664 | PHYREGS(0x08dc, 0x08d8, 0x08d4, 0x01ce, 0x01cf, 0x01d0), | ||
1665 | }, | ||
1666 | { .freq = 5670, | ||
1667 | RADIOREGS3(0x16, 0x01, 0x01, 0x02, 0x37, 0x05, 0x05, 0x04, | ||
1668 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, | ||
1669 | 0x70, 0x08, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, | ||
1670 | 0x00, 0xf4, 0x00, 0x08, 0x00, 0x04, 0x00, 0x7f, | ||
1671 | 0x00, 0x0b, 0x00, 0xf4, 0x00), | ||
1672 | PHYREGS(0x08e0, 0x08dc, 0x08d8, 0x01ce, 0x01ce, 0x01cf), | ||
1673 | }, | ||
1674 | { .freq = 5680, | ||
1675 | RADIOREGS3(0x10, 0x01, 0x01, 0x02, 0x38, 0x05, 0x05, 0x04, | ||
1676 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, | ||
1677 | 0x70, 0x08, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, | ||
1678 | 0x00, 0xf4, 0x00, 0x08, 0x00, 0x04, 0x00, 0x7f, | ||
1679 | 0x00, 0x0b, 0x00, 0xf4, 0x00), | ||
1680 | PHYREGS(0x08e4, 0x08e0, 0x08dc, 0x01cd, 0x01ce, 0x01ce), | ||
1681 | }, | ||
1682 | { .freq = 5690, | ||
1683 | RADIOREGS3(0x10, 0x01, 0x01, 0x02, 0x39, 0x05, 0x05, 0x04, | ||
1684 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, | ||
1685 | 0x70, 0x07, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, | ||
1686 | 0x00, 0xf4, 0x00, 0x07, 0x00, 0x04, 0x00, 0x7f, | ||
1687 | 0x00, 0x0b, 0x00, 0xf4, 0x00), | ||
1688 | PHYREGS(0x08e8, 0x08e4, 0x08e0, 0x01cc, 0x01cd, 0x01ce), | ||
1689 | }, | ||
1690 | { .freq = 5700, | ||
1691 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3a, 0x05, 0x05, 0x04, | ||
1692 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
1693 | 0x40, 0x07, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, | ||
1694 | 0x00, 0xf2, 0x00, 0x07, 0x00, 0x03, 0x00, 0x7f, | ||
1695 | 0x00, 0x0a, 0x00, 0xf2, 0x00), | ||
1696 | PHYREGS(0x08ec, 0x08e8, 0x08e4, 0x01cb, 0x01cc, 0x01cd), | ||
1697 | }, | ||
1698 | { .freq = 5710, | ||
1699 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3b, 0x05, 0x05, 0x04, | ||
1700 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
1701 | 0x40, 0x07, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, | ||
1702 | 0x00, 0xf2, 0x00, 0x07, 0x00, 0x03, 0x00, 0x7f, | ||
1703 | 0x00, 0x0a, 0x00, 0xf2, 0x00), | ||
1704 | PHYREGS(0x08f0, 0x08ec, 0x08e8, 0x01ca, 0x01cb, 0x01cc), | ||
1705 | }, | ||
1706 | { .freq = 5720, | ||
1707 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3c, 0x05, 0x05, 0x04, | ||
1708 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
1709 | 0x40, 0x07, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, | ||
1710 | 0x00, 0xf2, 0x00, 0x07, 0x00, 0x03, 0x00, 0x7f, | ||
1711 | 0x00, 0x0a, 0x00, 0xf2, 0x00), | ||
1712 | PHYREGS(0x08f4, 0x08f0, 0x08ec, 0x01c9, 0x01ca, 0x01cb), | ||
1713 | }, | ||
1714 | { .freq = 5725, | ||
1715 | RADIOREGS3(0x03, 0x01, 0x02, 0x04, 0x79, 0x07, 0x07, 0x04, | ||
1716 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
1717 | 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, | ||
1718 | 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f, | ||
1719 | 0x00, 0x0a, 0x00, 0xf2, 0x00), | ||
1720 | PHYREGS(0x08f6, 0x08f2, 0x08ee, 0x01c9, 0x01ca, 0x01cb), | ||
1721 | }, | ||
1722 | { .freq = 5730, | ||
1723 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3d, 0x05, 0x05, 0x04, | ||
1724 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
1725 | 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, | ||
1726 | 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f, | ||
1727 | 0x00, 0x0a, 0x00, 0xf2, 0x00), | ||
1728 | PHYREGS(0x08f8, 0x08f4, 0x08f0, 0x01c9, 0x01c9, 0x01ca), | ||
1729 | }, | ||
1730 | { .freq = 5735, | ||
1731 | RADIOREGS3(0x03, 0x01, 0x02, 0x04, 0x7b, 0x07, 0x07, 0x04, | ||
1732 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
1733 | 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, | ||
1734 | 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f, | ||
1735 | 0x00, 0x0a, 0x00, 0xf2, 0x00), | ||
1736 | PHYREGS(0x08fa, 0x08f6, 0x08f2, 0x01c8, 0x01c9, 0x01ca), | ||
1737 | }, | ||
1738 | { .freq = 5740, | ||
1739 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3e, 0x05, 0x05, 0x04, | ||
1740 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
1741 | 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, | ||
1742 | 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f, | ||
1743 | 0x00, 0x0a, 0x00, 0xf2, 0x00), | ||
1744 | PHYREGS(0x08fc, 0x08f8, 0x08f4, 0x01c8, 0x01c9, 0x01c9), | ||
1745 | }, | ||
1746 | { .freq = 5745, | ||
1747 | RADIOREGS3(0xfe, 0x00, 0x02, 0x04, 0x7d, 0x07, 0x07, 0x04, | ||
1748 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
1749 | 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, | ||
1750 | 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f, | ||
1751 | 0x00, 0x0a, 0x00, 0xf2, 0x00), | ||
1752 | PHYREGS(0x08fe, 0x08fa, 0x08f6, 0x01c8, 0x01c8, 0x01c9), | ||
1753 | }, | ||
1754 | { .freq = 5750, | ||
1755 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3f, 0x05, 0x05, 0x04, | ||
1756 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
1757 | 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, | ||
1758 | 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f, | ||
1759 | 0x00, 0x0a, 0x00, 0xf2, 0x00), | ||
1760 | PHYREGS(0x0900, 0x08fc, 0x08f8, 0x01c7, 0x01c8, 0x01c9), | ||
1761 | }, | ||
1762 | { .freq = 5755, | ||
1763 | RADIOREGS3(0xfe, 0x00, 0x02, 0x04, 0x7f, 0x07, 0x07, 0x04, | ||
1764 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
1765 | 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, | ||
1766 | 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f, | ||
1767 | 0x00, 0x0a, 0x00, 0xf2, 0x00), | ||
1768 | PHYREGS(0x0902, 0x08fe, 0x08fa, 0x01c7, 0x01c8, 0x01c8), | ||
1769 | }, | ||
1770 | { .freq = 5760, | ||
1771 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x40, 0x05, 0x05, 0x04, | ||
1772 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
1773 | 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, | ||
1774 | 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f, | ||
1775 | 0x00, 0x0a, 0x00, 0xf2, 0x00), | ||
1776 | PHYREGS(0x0904, 0x0900, 0x08fc, 0x01c6, 0x01c7, 0x01c8), | ||
1777 | }, | ||
1778 | { .freq = 5765, | ||
1779 | RADIOREGS3(0xf8, 0x00, 0x02, 0x04, 0x81, 0x07, 0x07, 0x04, | ||
1780 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
1781 | 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, | ||
1782 | 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f, | ||
1783 | 0x00, 0x0a, 0x00, 0xf2, 0x00), | ||
1784 | PHYREGS(0x0906, 0x0902, 0x08fe, 0x01c6, 0x01c7, 0x01c8), | ||
1785 | }, | ||
1786 | { .freq = 5770, | ||
1787 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x41, 0x05, 0x05, 0x04, | ||
1788 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
1789 | 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, | ||
1790 | 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f, | ||
1791 | 0x00, 0x0a, 0x00, 0xf2, 0x00), | ||
1792 | PHYREGS(0x0908, 0x0904, 0x0900, 0x01c6, 0x01c6, 0x01c7), | ||
1793 | }, | ||
1794 | { .freq = 5775, | ||
1795 | RADIOREGS3(0xf8, 0x00, 0x02, 0x04, 0x83, 0x07, 0x07, 0x04, | ||
1796 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
1797 | 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, | ||
1798 | 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f, | ||
1799 | 0x00, 0x0a, 0x00, 0xf2, 0x00), | ||
1800 | PHYREGS(0x090a, 0x0906, 0x0902, 0x01c5, 0x01c6, 0x01c7), | ||
1801 | }, | ||
1802 | { .freq = 5780, | ||
1803 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x42, 0x05, 0x05, 0x04, | ||
1804 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
1805 | 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, | ||
1806 | 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f, | ||
1807 | 0x00, 0x0a, 0x00, 0xf2, 0x00), | ||
1808 | PHYREGS(0x090c, 0x0908, 0x0904, 0x01c5, 0x01c6, 0x01c6), | ||
1809 | }, | ||
1810 | { .freq = 5785, | ||
1811 | RADIOREGS3(0xf2, 0x00, 0x02, 0x04, 0x85, 0x07, 0x07, 0x04, | ||
1812 | 0x10, 0x01, 0x06, 0x06, 0x06, 0x8a, 0x06, 0x00, | ||
1813 | 0x40, 0x04, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, | ||
1814 | 0x00, 0xf2, 0x00, 0x04, 0x00, 0x03, 0x00, 0x7f, | ||
1815 | 0x00, 0x0a, 0x00, 0xf2, 0x00), | ||
1816 | PHYREGS(0x090e, 0x090a, 0x0906, 0x01c4, 0x01c5, 0x01c6), | ||
1817 | }, | ||
1818 | { .freq = 5790, | ||
1819 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x43, 0x05, 0x05, 0x04, | ||
1820 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x8a, 0x06, 0x00, | ||
1821 | 0x40, 0x04, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, | ||
1822 | 0x00, 0xf2, 0x00, 0x04, 0x00, 0x03, 0x00, 0x7f, | ||
1823 | 0x00, 0x0a, 0x00, 0xf2, 0x00), | ||
1824 | PHYREGS(0x0910, 0x090c, 0x0908, 0x01c4, 0x01c5, 0x01c6), | ||
1825 | }, | ||
1826 | { .freq = 5795, | ||
1827 | RADIOREGS3(0xf2, 0x00, 0x02, 0x04, 0x87, 0x07, 0x07, 0x04, | ||
1828 | 0x10, 0x01, 0x06, 0x06, 0x06, 0x8a, 0x06, 0x00, | ||
1829 | 0x40, 0x04, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, | ||
1830 | 0x00, 0xf2, 0x00, 0x04, 0x00, 0x03, 0x00, 0x7f, | ||
1831 | 0x00, 0x0a, 0x00, 0xf2, 0x00), | ||
1832 | PHYREGS(0x0912, 0x090e, 0x090a, 0x01c4, 0x01c4, 0x01c5), | ||
1833 | }, | ||
1834 | { .freq = 5800, | ||
1835 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x44, 0x05, 0x05, 0x04, | ||
1836 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
1837 | 0x20, 0x04, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, | ||
1838 | 0x00, 0xf0, 0x00, 0x04, 0x00, 0x02, 0x00, 0x7f, | ||
1839 | 0x00, 0x09, 0x00, 0xf0, 0x00), | ||
1840 | PHYREGS(0x0914, 0x0910, 0x090c, 0x01c3, 0x01c4, 0x01c5), | ||
1841 | }, | ||
1842 | { .freq = 5805, | ||
1843 | RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x89, 0x07, 0x07, 0x04, | ||
1844 | 0x10, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
1845 | 0x20, 0x04, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, | ||
1846 | 0x00, 0xf0, 0x00, 0x04, 0x00, 0x02, 0x00, 0x7f, | ||
1847 | 0x00, 0x09, 0x00, 0xf0, 0x00), | ||
1848 | PHYREGS(0x0916, 0x0912, 0x090e, 0x01c3, 0x01c4, 0x01c4), | ||
1849 | }, | ||
1850 | { .freq = 5810, | ||
1851 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x45, 0x05, 0x05, 0x04, | ||
1852 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
1853 | 0x20, 0x04, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, | ||
1854 | 0x00, 0xf0, 0x00, 0x04, 0x00, 0x02, 0x00, 0x7f, | ||
1855 | 0x00, 0x09, 0x00, 0xf0, 0x00), | ||
1856 | PHYREGS(0x0918, 0x0914, 0x0910, 0x01c2, 0x01c3, 0x01c4), | ||
1857 | }, | ||
1858 | { .freq = 5815, | ||
1859 | RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x8b, 0x07, 0x07, 0x04, | ||
1860 | 0x10, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
1861 | 0x20, 0x04, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, | ||
1862 | 0x00, 0xf0, 0x00, 0x04, 0x00, 0x02, 0x00, 0x7f, | ||
1863 | 0x00, 0x09, 0x00, 0xf0, 0x00), | ||
1864 | PHYREGS(0x091a, 0x0916, 0x0912, 0x01c2, 0x01c3, 0x01c4), | ||
1865 | }, | ||
1866 | { .freq = 5820, | ||
1867 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x46, 0x05, 0x05, 0x04, | ||
1868 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
1869 | 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, | ||
1870 | 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f, | ||
1871 | 0x00, 0x09, 0x00, 0xf0, 0x00), | ||
1872 | PHYREGS(0x091c, 0x0918, 0x0914, 0x01c2, 0x01c2, 0x01c3), | ||
1873 | }, | ||
1874 | { .freq = 5825, | ||
1875 | RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x8d, 0x07, 0x07, 0x04, | ||
1876 | 0x10, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
1877 | 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, | ||
1878 | 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f, | ||
1879 | 0x00, 0x09, 0x00, 0xf0, 0x00), | ||
1880 | PHYREGS(0x091e, 0x091a, 0x0916, 0x01c1, 0x01c2, 0x01c3), | ||
1881 | }, | ||
1882 | { .freq = 5830, | ||
1883 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x47, 0x05, 0x05, 0x04, | ||
1884 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
1885 | 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, | ||
1886 | 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f, | ||
1887 | 0x00, 0x09, 0x00, 0xf0, 0x00), | ||
1888 | PHYREGS(0x0920, 0x091c, 0x0918, 0x01c1, 0x01c2, 0x01c2), | ||
1889 | }, | ||
1890 | { .freq = 5840, | ||
1891 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x48, 0x05, 0x05, 0x04, | ||
1892 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
1893 | 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, | ||
1894 | 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f, | ||
1895 | 0x00, 0x09, 0x00, 0xf0, 0x00), | ||
1896 | PHYREGS(0x0924, 0x0920, 0x091c, 0x01c0, 0x01c1, 0x01c2), | ||
1897 | }, | ||
1898 | { .freq = 5850, | ||
1899 | RADIOREGS3(0xe0, 0x00, 0x01, 0x02, 0x49, 0x05, 0x05, 0x04, | ||
1900 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
1901 | 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, | ||
1902 | 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f, | ||
1903 | 0x00, 0x09, 0x00, 0xf0, 0x00), | ||
1904 | PHYREGS(0x0928, 0x0924, 0x0920, 0x01bf, 0x01c0, 0x01c1), | ||
1905 | }, | ||
1906 | { .freq = 5860, | ||
1907 | RADIOREGS3(0xde, 0x00, 0x01, 0x02, 0x4a, 0x05, 0x05, 0x04, | ||
1908 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
1909 | 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, | ||
1910 | 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f, | ||
1911 | 0x00, 0x09, 0x00, 0xf0, 0x00), | ||
1912 | PHYREGS(0x092c, 0x0928, 0x0924, 0x01bf, 0x01bf, 0x01c0), | ||
1913 | }, | ||
1914 | { .freq = 5870, | ||
1915 | RADIOREGS3(0xdb, 0x00, 0x01, 0x02, 0x4b, 0x05, 0x05, 0x04, | ||
1916 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
1917 | 0x20, 0x02, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, | ||
1918 | 0x00, 0xf0, 0x00, 0x02, 0x00, 0x02, 0x00, 0x7f, | ||
1919 | 0x00, 0x09, 0x00, 0xf0, 0x00), | ||
1920 | PHYREGS(0x0930, 0x092c, 0x0928, 0x01be, 0x01bf, 0x01bf), | ||
1921 | }, | ||
1922 | { .freq = 5880, | ||
1923 | RADIOREGS3(0xd8, 0x00, 0x01, 0x02, 0x4c, 0x05, 0x05, 0x04, | ||
1924 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
1925 | 0x20, 0x02, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, | ||
1926 | 0x00, 0xf0, 0x00, 0x02, 0x00, 0x02, 0x00, 0x7f, | ||
1927 | 0x00, 0x09, 0x00, 0xf0, 0x00), | ||
1928 | PHYREGS(0x0934, 0x0930, 0x092c, 0x01bd, 0x01be, 0x01bf), | ||
1929 | }, | ||
1930 | { .freq = 5890, | ||
1931 | RADIOREGS3(0xd6, 0x00, 0x01, 0x02, 0x4d, 0x05, 0x05, 0x04, | ||
1932 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
1933 | 0x20, 0x02, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, | ||
1934 | 0x00, 0xf0, 0x00, 0x02, 0x00, 0x02, 0x00, 0x7f, | ||
1935 | 0x00, 0x09, 0x00, 0xf0, 0x00), | ||
1936 | PHYREGS(0x0938, 0x0934, 0x0930, 0x01bc, 0x01bd, 0x01be), | ||
1937 | }, | ||
1938 | { .freq = 5900, | ||
1939 | RADIOREGS3(0xd3, 0x00, 0x01, 0x02, 0x4e, 0x05, 0x05, 0x04, | ||
1940 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x87, 0x03, 0x00, | ||
1941 | 0x00, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x07, | ||
1942 | 0x00, 0xf0, 0x00, 0x02, 0x00, 0x00, 0x00, 0x7f, | ||
1943 | 0x00, 0x07, 0x00, 0xf0, 0x00), | ||
1944 | PHYREGS(0x093c, 0x0938, 0x0934, 0x01bc, 0x01bc, 0x01bd), | ||
1945 | }, | ||
1946 | { .freq = 5910, | ||
1947 | RADIOREGS3(0xd6, 0x00, 0x01, 0x02, 0x4f, 0x05, 0x05, 0x04, | ||
1948 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x87, 0x03, 0x00, | ||
1949 | 0x00, 0x01, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x07, | ||
1950 | 0x00, 0xf0, 0x00, 0x01, 0x00, 0x00, 0x00, 0x7f, | ||
1951 | 0x00, 0x07, 0x00, 0xf0, 0x00), | ||
1952 | PHYREGS(0x0940, 0x093c, 0x0938, 0x01bb, 0x01bc, 0x01bc), | ||
1953 | }, | ||
1954 | { .freq = 2412, | ||
1955 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x6c, 0x08, 0x08, 0x04, | ||
1956 | 0x16, 0x01, 0x04, 0x04, 0x04, 0x8f, 0x30, 0x00, | ||
1957 | 0x00, 0x00, 0xff, 0x00, 0x04, 0x00, 0x70, 0x00, | ||
1958 | 0x0f, 0x00, 0x0e, 0x00, 0xff, 0x00, 0x04, 0x00, | ||
1959 | 0x70, 0x00, 0x0f, 0x00, 0x0e), | ||
1960 | PHYREGS(0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443), | ||
1961 | }, | ||
1962 | { .freq = 2417, | ||
1963 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x71, 0x08, 0x08, 0x04, | ||
1964 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
1965 | 0x00, 0x00, 0xff, 0x00, 0x04, 0x00, 0x70, 0x00, | ||
1966 | 0x0f, 0x00, 0x0e, 0x00, 0xff, 0x00, 0x04, 0x00, | ||
1967 | 0x70, 0x00, 0x0f, 0x00, 0x0e), | ||
1968 | PHYREGS(0x03cb, 0x03c7, 0x03c3, 0x0438, 0x043d, 0x0441), | ||
1969 | }, | ||
1970 | { .freq = 2422, | ||
1971 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x76, 0x08, 0x08, 0x04, | ||
1972 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
1973 | 0x00, 0x00, 0xff, 0x00, 0x04, 0x00, 0x70, 0x00, | ||
1974 | 0x0f, 0x00, 0x0e, 0x00, 0xff, 0x00, 0x04, 0x00, | ||
1975 | 0x70, 0x00, 0x0f, 0x00, 0x0e), | ||
1976 | PHYREGS(0x03cd, 0x03c9, 0x03c5, 0x0436, 0x043a, 0x043f), | ||
1977 | }, | ||
1978 | { .freq = 2427, | ||
1979 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x7b, 0x08, 0x08, 0x04, | ||
1980 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
1981 | 0x00, 0x00, 0xfd, 0x00, 0x04, 0x00, 0x70, 0x00, | ||
1982 | 0x0f, 0x00, 0x0e, 0x00, 0xfd, 0x00, 0x04, 0x00, | ||
1983 | 0x70, 0x00, 0x0f, 0x00, 0x0e), | ||
1984 | PHYREGS(0x03cf, 0x03cb, 0x03c7, 0x0434, 0x0438, 0x043d), | ||
1985 | }, | ||
1986 | { .freq = 2432, | ||
1987 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x80, 0x08, 0x08, 0x04, | ||
1988 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
1989 | 0x00, 0x00, 0xfb, 0x00, 0x04, 0x00, 0x70, 0x00, | ||
1990 | 0x0f, 0x00, 0x0e, 0x00, 0xfb, 0x00, 0x04, 0x00, | ||
1991 | 0x70, 0x00, 0x0f, 0x00, 0x0e), | ||
1992 | PHYREGS(0x03d1, 0x03cd, 0x03c9, 0x0431, 0x0436, 0x043a), | ||
1993 | }, | ||
1994 | { .freq = 2437, | ||
1995 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x85, 0x08, 0x08, 0x04, | ||
1996 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
1997 | 0x00, 0x00, 0xfa, 0x00, 0x04, 0x00, 0x70, 0x00, | ||
1998 | 0x0f, 0x00, 0x0e, 0x00, 0xfa, 0x00, 0x04, 0x00, | ||
1999 | 0x70, 0x00, 0x0f, 0x00, 0x0e), | ||
2000 | PHYREGS(0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438), | ||
2001 | }, | ||
2002 | { .freq = 2442, | ||
2003 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04, | ||
2004 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
2005 | 0x00, 0x00, 0xf8, 0x00, 0x04, 0x00, 0x70, 0x00, | ||
2006 | 0x0f, 0x00, 0x0e, 0x00, 0xf8, 0x00, 0x04, 0x00, | ||
2007 | 0x70, 0x00, 0x0f, 0x00, 0x0e), | ||
2008 | PHYREGS(0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436), | ||
2009 | }, | ||
2010 | { .freq = 2447, | ||
2011 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04, | ||
2012 | 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, | ||
2013 | 0x00, 0x00, 0xf7, 0x00, 0x04, 0x00, 0x70, 0x00, | ||
2014 | 0x0f, 0x00, 0x0e, 0x00, 0xf7, 0x00, 0x04, 0x00, | ||
2015 | 0x70, 0x00, 0x0f, 0x00, 0x0e), | ||
2016 | PHYREGS(0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434), | ||
2017 | }, | ||
2018 | { .freq = 2452, | ||
2019 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04, | ||
2020 | 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, | ||
2021 | 0x00, 0x00, 0xf6, 0x00, 0x04, 0x00, 0x70, 0x00, | ||
2022 | 0x0f, 0x00, 0x0e, 0x00, 0xf6, 0x00, 0x04, 0x00, | ||
2023 | 0x70, 0x00, 0x0f, 0x00, 0x0e), | ||
2024 | PHYREGS(0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431), | ||
2025 | }, | ||
2026 | { .freq = 2457, | ||
2027 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04, | ||
2028 | 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, | ||
2029 | 0x00, 0x00, 0xf5, 0x00, 0x04, 0x00, 0x70, 0x00, | ||
2030 | 0x0f, 0x00, 0x0e, 0x00, 0xf5, 0x00, 0x04, 0x00, | ||
2031 | 0x70, 0x00, 0x0f, 0x00, 0x0e), | ||
2032 | PHYREGS(0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f), | ||
2033 | }, | ||
2034 | { .freq = 2462, | ||
2035 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04, | ||
2036 | 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, | ||
2037 | 0x00, 0x00, 0xf4, 0x00, 0x04, 0x00, 0x70, 0x00, | ||
2038 | 0x0f, 0x00, 0x0e, 0x00, 0xf4, 0x00, 0x04, 0x00, | ||
2039 | 0x70, 0x00, 0x0f, 0x00, 0x0e), | ||
2040 | PHYREGS(0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d), | ||
2041 | }, | ||
2042 | { .freq = 2467, | ||
2043 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04, | ||
2044 | 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, | ||
2045 | 0x00, 0x00, 0xf3, 0x00, 0x04, 0x00, 0x70, 0x00, | ||
2046 | 0x0f, 0x00, 0x0e, 0x00, 0xf3, 0x00, 0x04, 0x00, | ||
2047 | 0x70, 0x00, 0x0f, 0x00, 0x0e), | ||
2048 | PHYREGS(0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b), | ||
2049 | }, | ||
2050 | { .freq = 2472, | ||
2051 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, | ||
2052 | 0x16, 0x01, 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, | ||
2053 | 0x00, 0x00, 0xf2, 0x00, 0x04, 0x00, 0x70, 0x00, | ||
2054 | 0x0f, 0x00, 0x0e, 0x00, 0xf2, 0x00, 0x04, 0x00, | ||
2055 | 0x70, 0x00, 0x0f, 0x00, 0x0e), | ||
2056 | PHYREGS(0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429), | ||
2057 | }, | ||
2058 | { .freq = 2484, | ||
2059 | RADIOREGS3(0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, | ||
2060 | 0x16, 0x01, 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, | ||
2061 | 0x00, 0x00, 0xf0, 0x00, 0x04, 0x00, 0x70, 0x00, | ||
2062 | 0x0f, 0x00, 0x0e, 0x00, 0xf0, 0x00, 0x04, 0x00, | ||
2063 | 0x70, 0x00, 0x0f, 0x00, 0x0e), | ||
2064 | PHYREGS(0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424), | ||
2065 | }, | ||
2066 | }; | ||
2067 | |||
2068 | static const struct b43_nphy_channeltab_entry_rev3 b43_nphy_channeltab_rev5[] = { | ||
2069 | { .freq = 4920, | ||
2070 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, | ||
2071 | 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, | ||
2072 | 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0f, | ||
2073 | 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, | ||
2074 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
2075 | PHYREGS(0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216), | ||
2076 | }, | ||
2077 | { .freq = 4930, | ||
2078 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, | ||
2079 | 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, | ||
2080 | 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, | ||
2081 | 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, | ||
2082 | 0x00, 0x0e, 0x00, 0x6f, 0x00), | ||
2083 | PHYREGS(0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215), | ||
2084 | }, | ||
2085 | { .freq = 4940, | ||
2086 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, | ||
2087 | 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, | ||
2088 | 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, | ||
2089 | 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, | ||
2090 | 0x00, 0x0e, 0x00, 0x6f, 0x00), | ||
2091 | PHYREGS(0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214), | ||
2092 | }, | ||
2093 | { .freq = 4950, | ||
2094 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, | ||
2095 | 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, | ||
2096 | 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, | ||
2097 | 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, | ||
2098 | 0x00, 0x0e, 0x00, 0x6f, 0x00), | ||
2099 | PHYREGS(0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213), | ||
2100 | }, | ||
2101 | { .freq = 4960, | ||
2102 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, | ||
2103 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
2104 | 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0e, | ||
2105 | 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, | ||
2106 | 0x00, 0x0e, 0x00, 0x6f, 0x00), | ||
2107 | PHYREGS(0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212), | ||
2108 | }, | ||
2109 | { .freq = 4970, | ||
2110 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, | ||
2111 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
2112 | 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, | ||
2113 | 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, | ||
2114 | 0x00, 0x0d, 0x00, 0x6f, 0x00), | ||
2115 | PHYREGS(0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211), | ||
2116 | }, | ||
2117 | { .freq = 4980, | ||
2118 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, | ||
2119 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
2120 | 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, | ||
2121 | 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, | ||
2122 | 0x00, 0x0d, 0x00, 0x6f, 0x00), | ||
2123 | PHYREGS(0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f), | ||
2124 | }, | ||
2125 | { .freq = 4990, | ||
2126 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, | ||
2127 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
2128 | 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, | ||
2129 | 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, | ||
2130 | 0x00, 0x0d, 0x00, 0x6f, 0x00), | ||
2131 | PHYREGS(0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e), | ||
2132 | }, | ||
2133 | { .freq = 5000, | ||
2134 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04, | ||
2135 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
2136 | 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, | ||
2137 | 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, | ||
2138 | 0x00, 0x0d, 0x00, 0x6f, 0x00), | ||
2139 | PHYREGS(0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d), | ||
2140 | }, | ||
2141 | { .freq = 5010, | ||
2142 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04, | ||
2143 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
2144 | 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, | ||
2145 | 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, | ||
2146 | 0x00, 0x0d, 0x00, 0x6f, 0x00), | ||
2147 | PHYREGS(0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c), | ||
2148 | }, | ||
2149 | { .freq = 5020, | ||
2150 | RADIOREGS3(0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04, | ||
2151 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
2152 | 0xff, 0xff, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0d, | ||
2153 | 0x00, 0x9f, 0x00, 0xff, 0x00, 0x09, 0x00, 0x70, | ||
2154 | 0x00, 0x0d, 0x00, 0x6f, 0x00), | ||
2155 | PHYREGS(0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b), | ||
2156 | }, | ||
2157 | { .freq = 5030, | ||
2158 | RADIOREGS3(0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04, | ||
2159 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
2160 | 0xff, 0xff, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, | ||
2161 | 0x00, 0x9f, 0x00, 0xff, 0x00, 0x09, 0x00, 0x70, | ||
2162 | 0x00, 0x0c, 0x00, 0x6f, 0x00), | ||
2163 | PHYREGS(0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a), | ||
2164 | }, | ||
2165 | { .freq = 5040, | ||
2166 | RADIOREGS3(0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x04, | ||
2167 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
2168 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, | ||
2169 | 0x00, 0x9f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x70, | ||
2170 | 0x00, 0x0c, 0x00, 0x6f, 0x00), | ||
2171 | PHYREGS(0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209), | ||
2172 | }, | ||
2173 | { .freq = 5050, | ||
2174 | RADIOREGS3(0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x04, | ||
2175 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
2176 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, | ||
2177 | 0x00, 0x9f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x70, | ||
2178 | 0x00, 0x0c, 0x00, 0x6f, 0x00), | ||
2179 | PHYREGS(0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208), | ||
2180 | }, | ||
2181 | { .freq = 5060, | ||
2182 | RADIOREGS3(0xe6, 0x01, 0x01, 0x01, 0xfa, 0x05, 0x05, 0x04, | ||
2183 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
2184 | 0xff, 0xfd, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, | ||
2185 | 0x00, 0x9f, 0x00, 0xfd, 0x00, 0x09, 0x00, 0x70, | ||
2186 | 0x00, 0x0c, 0x00, 0x6f, 0x00), | ||
2187 | PHYREGS(0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207), | ||
2188 | }, | ||
2189 | { .freq = 5070, | ||
2190 | RADIOREGS3(0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x04, | ||
2191 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
2192 | 0xff, 0xfd, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, | ||
2193 | 0x00, 0x9f, 0x00, 0xfd, 0x00, 0x08, 0x00, 0x70, | ||
2194 | 0x00, 0x0b, 0x00, 0x6f, 0x00), | ||
2195 | PHYREGS(0x07f0, 0x07ec, 0x07e8, 0x0204, 0x0205, 0x0206), | ||
2196 | }, | ||
2197 | { .freq = 5080, | ||
2198 | RADIOREGS3(0xde, 0x01, 0x01, 0x01, 0xfc, 0x05, 0x05, 0x04, | ||
2199 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
2200 | 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, | ||
2201 | 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, | ||
2202 | 0x00, 0x0b, 0x00, 0x6f, 0x00), | ||
2203 | PHYREGS(0x07f4, 0x07f0, 0x07ec, 0x0203, 0x0204, 0x0205), | ||
2204 | }, | ||
2205 | { .freq = 5090, | ||
2206 | RADIOREGS3(0xde, 0x01, 0x01, 0x01, 0xfd, 0x05, 0x05, 0x04, | ||
2207 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
2208 | 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, | ||
2209 | 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, | ||
2210 | 0x00, 0x0b, 0x00, 0x6f, 0x00), | ||
2211 | PHYREGS(0x07f8, 0x07f4, 0x07f0, 0x0202, 0x0203, 0x0204), | ||
2212 | }, | ||
2213 | { .freq = 5100, | ||
2214 | RADIOREGS3(0xd6, 0x01, 0x01, 0x01, 0xfe, 0x05, 0x05, 0x04, | ||
2215 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
2216 | 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, | ||
2217 | 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, | ||
2218 | 0x00, 0x0b, 0x00, 0x6f, 0x00), | ||
2219 | PHYREGS(0x07fc, 0x07f8, 0x07f4, 0x0201, 0x0202, 0x0203), | ||
2220 | }, | ||
2221 | { .freq = 5110, | ||
2222 | RADIOREGS3(0xd6, 0x01, 0x01, 0x01, 0xff, 0x05, 0x05, 0x04, | ||
2223 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
2224 | 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, | ||
2225 | 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, | ||
2226 | 0x00, 0x0b, 0x00, 0x6f, 0x00), | ||
2227 | PHYREGS(0x0800, 0x07fc, 0x07f8, 0x0200, 0x0201, 0x0202), | ||
2228 | }, | ||
2229 | { .freq = 5120, | ||
2230 | RADIOREGS3(0xce, 0x01, 0x01, 0x02, 0x00, 0x05, 0x05, 0x04, | ||
2231 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
2232 | 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, | ||
2233 | 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, | ||
2234 | 0x00, 0x0b, 0x00, 0x6f, 0x00), | ||
2235 | PHYREGS(0x0804, 0x0800, 0x07fc, 0x01ff, 0x0200, 0x0201), | ||
2236 | }, | ||
2237 | { .freq = 5130, | ||
2238 | RADIOREGS3(0xce, 0x01, 0x01, 0x02, 0x01, 0x05, 0x05, 0x04, | ||
2239 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
2240 | 0xff, 0xfb, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0a, | ||
2241 | 0x00, 0x9f, 0x00, 0xfb, 0x00, 0x08, 0x00, 0x70, | ||
2242 | 0x00, 0x0a, 0x00, 0x6f, 0x00), | ||
2243 | PHYREGS(0x0808, 0x0804, 0x0800, 0x01fe, 0x01ff, 0x0200), | ||
2244 | }, | ||
2245 | { .freq = 5140, | ||
2246 | RADIOREGS3(0xc6, 0x01, 0x01, 0x02, 0x02, 0x05, 0x05, 0x04, | ||
2247 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
2248 | 0xff, 0xfb, 0x00, 0x07, 0x00, 0x70, 0x00, 0x0a, | ||
2249 | 0x00, 0x9f, 0x00, 0xfb, 0x00, 0x07, 0x00, 0x70, | ||
2250 | 0x00, 0x0a, 0x00, 0x6f, 0x00), | ||
2251 | PHYREGS(0x080c, 0x0808, 0x0804, 0x01fd, 0x01fe, 0x01ff), | ||
2252 | }, | ||
2253 | { .freq = 5160, | ||
2254 | RADIOREGS3(0xbe, 0x01, 0x01, 0x02, 0x04, 0x05, 0x05, 0x04, | ||
2255 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
2256 | 0xff, 0xfb, 0x00, 0x07, 0x00, 0x70, 0x00, 0x09, | ||
2257 | 0x00, 0x9e, 0x00, 0xfb, 0x00, 0x07, 0x00, 0x70, | ||
2258 | 0x00, 0x09, 0x00, 0x6e, 0x00), | ||
2259 | PHYREGS(0x0814, 0x0810, 0x080c, 0x01fb, 0x01fc, 0x01fd), | ||
2260 | }, | ||
2261 | { .freq = 5170, | ||
2262 | RADIOREGS3(0xbe, 0x01, 0x01, 0x02, 0x05, 0x05, 0x05, 0x04, | ||
2263 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
2264 | 0xff, 0xfb, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, | ||
2265 | 0x00, 0x9e, 0x00, 0xfb, 0x00, 0x06, 0x00, 0x70, | ||
2266 | 0x00, 0x09, 0x00, 0x6e, 0x00), | ||
2267 | PHYREGS(0x0818, 0x0814, 0x0810, 0x01fa, 0x01fb, 0x01fc), | ||
2268 | }, | ||
2269 | { .freq = 5180, | ||
2270 | RADIOREGS3(0xb6, 0x01, 0x01, 0x02, 0x06, 0x05, 0x05, 0x04, | ||
2271 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
2272 | 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, | ||
2273 | 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70, | ||
2274 | 0x00, 0x09, 0x00, 0x6e, 0x00), | ||
2275 | PHYREGS(0x081c, 0x0818, 0x0814, 0x01f9, 0x01fa, 0x01fb), | ||
2276 | }, | ||
2277 | { .freq = 5190, | ||
2278 | RADIOREGS3(0xb6, 0x01, 0x01, 0x02, 0x07, 0x05, 0x05, 0x04, | ||
2279 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
2280 | 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, | ||
2281 | 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70, | ||
2282 | 0x00, 0x09, 0x00, 0x6e, 0x00), | ||
2283 | PHYREGS(0x0820, 0x081c, 0x0818, 0x01f8, 0x01f9, 0x01fa), | ||
2284 | }, | ||
2285 | { .freq = 5200, | ||
2286 | RADIOREGS3(0xaf, 0x01, 0x01, 0x02, 0x08, 0x05, 0x05, 0x04, | ||
2287 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
2288 | 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, | ||
2289 | 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70, | ||
2290 | 0x00, 0x09, 0x00, 0x6e, 0x00), | ||
2291 | PHYREGS(0x0824, 0x0820, 0x081c, 0x01f7, 0x01f8, 0x01f9), | ||
2292 | }, | ||
2293 | { .freq = 5210, | ||
2294 | RADIOREGS3(0xaf, 0x01, 0x01, 0x02, 0x09, 0x05, 0x05, 0x04, | ||
2295 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
2296 | 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, | ||
2297 | 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70, | ||
2298 | 0x00, 0x09, 0x00, 0x6e, 0x00), | ||
2299 | PHYREGS(0x0828, 0x0824, 0x0820, 0x01f6, 0x01f7, 0x01f8), | ||
2300 | }, | ||
2301 | { .freq = 5220, | ||
2302 | RADIOREGS3(0xa7, 0x01, 0x01, 0x02, 0x0a, 0x05, 0x05, 0x04, | ||
2303 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
2304 | 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, | ||
2305 | 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70, | ||
2306 | 0x00, 0x09, 0x00, 0x6e, 0x00), | ||
2307 | PHYREGS(0x082c, 0x0828, 0x0824, 0x01f5, 0x01f6, 0x01f7), | ||
2308 | }, | ||
2309 | { .freq = 5230, | ||
2310 | RADIOREGS3(0xa7, 0x01, 0x01, 0x02, 0x0b, 0x05, 0x05, 0x04, | ||
2311 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
2312 | 0xff, 0xea, 0x00, 0x06, 0x00, 0x70, 0x00, 0x08, | ||
2313 | 0x00, 0x9e, 0x00, 0xea, 0x00, 0x06, 0x00, 0x70, | ||
2314 | 0x00, 0x08, 0x00, 0x6e, 0x00), | ||
2315 | PHYREGS(0x0830, 0x082c, 0x0828, 0x01f4, 0x01f5, 0x01f6), | ||
2316 | }, | ||
2317 | { .freq = 5240, | ||
2318 | RADIOREGS3(0xa0, 0x01, 0x01, 0x02, 0x0c, 0x05, 0x05, 0x04, | ||
2319 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
2320 | 0xff, 0xe9, 0x00, 0x05, 0x00, 0x70, 0x00, 0x08, | ||
2321 | 0x00, 0x9d, 0x00, 0xe9, 0x00, 0x05, 0x00, 0x70, | ||
2322 | 0x00, 0x08, 0x00, 0x6d, 0x00), | ||
2323 | PHYREGS(0x0834, 0x0830, 0x082c, 0x01f3, 0x01f4, 0x01f5), | ||
2324 | }, | ||
2325 | { .freq = 5250, | ||
2326 | RADIOREGS3(0xa0, 0x01, 0x01, 0x02, 0x0d, 0x05, 0x05, 0x04, | ||
2327 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
2328 | 0xff, 0xe9, 0x00, 0x05, 0x00, 0x70, 0x00, 0x08, | ||
2329 | 0x00, 0x9d, 0x00, 0xe9, 0x00, 0x05, 0x00, 0x70, | ||
2330 | 0x00, 0x08, 0x00, 0x6d, 0x00), | ||
2331 | PHYREGS(0x0838, 0x0834, 0x0830, 0x01f2, 0x01f3, 0x01f4), | ||
2332 | }, | ||
2333 | { .freq = 5260, | ||
2334 | RADIOREGS3(0x98, 0x01, 0x01, 0x02, 0x0e, 0x05, 0x05, 0x04, | ||
2335 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
2336 | 0xff, 0xd9, 0x00, 0x05, 0x00, 0x70, 0x00, 0x08, | ||
2337 | 0x00, 0x9d, 0x00, 0xd9, 0x00, 0x05, 0x00, 0x70, | ||
2338 | 0x00, 0x08, 0x00, 0x6d, 0x00), | ||
2339 | PHYREGS(0x083c, 0x0838, 0x0834, 0x01f1, 0x01f2, 0x01f3), | ||
2340 | }, | ||
2341 | { .freq = 5270, | ||
2342 | RADIOREGS3(0x98, 0x01, 0x01, 0x02, 0x0f, 0x05, 0x05, 0x04, | ||
2343 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0f, 0x00, | ||
2344 | 0xff, 0xd8, 0x00, 0x04, 0x00, 0x70, 0x00, 0x07, | ||
2345 | 0x00, 0x9c, 0x00, 0xd8, 0x00, 0x04, 0x00, 0x70, | ||
2346 | 0x00, 0x07, 0x00, 0x6c, 0x00), | ||
2347 | PHYREGS(0x0840, 0x083c, 0x0838, 0x01f0, 0x01f1, 0x01f2), | ||
2348 | }, | ||
2349 | { .freq = 5280, | ||
2350 | RADIOREGS3(0x91, 0x01, 0x01, 0x02, 0x10, 0x05, 0x05, 0x04, | ||
2351 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0f, 0x00, | ||
2352 | 0xff, 0xc8, 0x00, 0x04, 0x00, 0x70, 0x00, 0x07, | ||
2353 | 0x00, 0x9c, 0x00, 0xc8, 0x00, 0x04, 0x00, 0x70, | ||
2354 | 0x00, 0x07, 0x00, 0x6c, 0x00), | ||
2355 | PHYREGS(0x0844, 0x0840, 0x083c, 0x01f0, 0x01f0, 0x01f1), | ||
2356 | }, | ||
2357 | { .freq = 5290, | ||
2358 | RADIOREGS3(0x91, 0x01, 0x01, 0x02, 0x11, 0x05, 0x05, 0x04, | ||
2359 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0f, 0x00, | ||
2360 | 0xff, 0xc8, 0x00, 0x04, 0x00, 0x70, 0x00, 0x07, | ||
2361 | 0x00, 0x9c, 0x00, 0xc8, 0x00, 0x04, 0x00, 0x70, | ||
2362 | 0x00, 0x07, 0x00, 0x6c, 0x00), | ||
2363 | PHYREGS(0x0848, 0x0844, 0x0840, 0x01ef, 0x01f0, 0x01f0), | ||
2364 | }, | ||
2365 | { .freq = 5300, | ||
2366 | RADIOREGS3(0x8a, 0x01, 0x01, 0x02, 0x12, 0x05, 0x05, 0x04, | ||
2367 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00, | ||
2368 | 0xff, 0xc8, 0x00, 0x04, 0x00, 0x70, 0x00, 0x07, | ||
2369 | 0x00, 0x9c, 0x00, 0xc8, 0x00, 0x04, 0x00, 0x70, | ||
2370 | 0x00, 0x07, 0x00, 0x6c, 0x00), | ||
2371 | PHYREGS(0x084c, 0x0848, 0x0844, 0x01ee, 0x01ef, 0x01f0), | ||
2372 | }, | ||
2373 | { .freq = 5310, | ||
2374 | RADIOREGS3(0x8a, 0x01, 0x01, 0x02, 0x13, 0x05, 0x05, 0x04, | ||
2375 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00, | ||
2376 | 0xff, 0xc8, 0x00, 0x04, 0x00, 0x70, 0x00, 0x07, | ||
2377 | 0x00, 0x9c, 0x00, 0xc8, 0x00, 0x04, 0x00, 0x70, | ||
2378 | 0x00, 0x07, 0x00, 0x6c, 0x00), | ||
2379 | PHYREGS(0x0850, 0x084c, 0x0848, 0x01ed, 0x01ee, 0x01ef), | ||
2380 | }, | ||
2381 | { .freq = 5320, | ||
2382 | RADIOREGS3(0x83, 0x01, 0x01, 0x02, 0x14, 0x05, 0x05, 0x04, | ||
2383 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00, | ||
2384 | 0xff, 0xb8, 0x00, 0x04, 0x00, 0x70, 0x00, 0x07, | ||
2385 | 0x00, 0x9c, 0x00, 0xb8, 0x00, 0x04, 0x00, 0x70, | ||
2386 | 0x00, 0x07, 0x00, 0x6c, 0x00), | ||
2387 | PHYREGS(0x0854, 0x0850, 0x084c, 0x01ec, 0x01ed, 0x01ee), | ||
2388 | }, | ||
2389 | { .freq = 5330, | ||
2390 | RADIOREGS3(0x83, 0x01, 0x01, 0x02, 0x15, 0x05, 0x05, 0x04, | ||
2391 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00, | ||
2392 | 0xff, 0xb7, 0x00, 0x04, 0x00, 0x70, 0x00, 0x07, | ||
2393 | 0x00, 0x9b, 0x00, 0xb7, 0x00, 0x04, 0x00, 0x70, | ||
2394 | 0x00, 0x07, 0x00, 0x6b, 0x00), | ||
2395 | PHYREGS(0x0858, 0x0854, 0x0850, 0x01eb, 0x01ec, 0x01ed), | ||
2396 | }, | ||
2397 | { .freq = 5340, | ||
2398 | RADIOREGS3(0x7c, 0x01, 0x01, 0x02, 0x16, 0x05, 0x05, 0x04, | ||
2399 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00, | ||
2400 | 0xff, 0xb7, 0x00, 0x03, 0x00, 0x70, 0x00, 0x07, | ||
2401 | 0x00, 0x9b, 0x00, 0xb7, 0x00, 0x03, 0x00, 0x70, | ||
2402 | 0x00, 0x07, 0x00, 0x6b, 0x00), | ||
2403 | PHYREGS(0x085c, 0x0858, 0x0854, 0x01ea, 0x01eb, 0x01ec), | ||
2404 | }, | ||
2405 | { .freq = 5350, | ||
2406 | RADIOREGS3(0x7c, 0x01, 0x01, 0x02, 0x17, 0x05, 0x05, 0x04, | ||
2407 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00, | ||
2408 | 0xff, 0xa7, 0x00, 0x03, 0x00, 0x70, 0x00, 0x06, | ||
2409 | 0x00, 0x9b, 0x00, 0xa7, 0x00, 0x03, 0x00, 0x70, | ||
2410 | 0x00, 0x06, 0x00, 0x6b, 0x00), | ||
2411 | PHYREGS(0x0860, 0x085c, 0x0858, 0x01e9, 0x01ea, 0x01eb), | ||
2412 | }, | ||
2413 | { .freq = 5360, | ||
2414 | RADIOREGS3(0x75, 0x01, 0x01, 0x02, 0x18, 0x05, 0x05, 0x04, | ||
2415 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00, | ||
2416 | 0xff, 0xa6, 0x00, 0x03, 0x00, 0x70, 0x00, 0x06, | ||
2417 | 0x00, 0x9b, 0x00, 0xa6, 0x00, 0x03, 0x00, 0x70, | ||
2418 | 0x00, 0x06, 0x00, 0x6b, 0x00), | ||
2419 | PHYREGS(0x0864, 0x0860, 0x085c, 0x01e8, 0x01e9, 0x01ea), | ||
2420 | }, | ||
2421 | { .freq = 5370, | ||
2422 | RADIOREGS3(0x75, 0x01, 0x01, 0x02, 0x19, 0x05, 0x05, 0x04, | ||
2423 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00, | ||
2424 | 0xff, 0xa6, 0x00, 0x03, 0x00, 0x70, 0x00, 0x06, | ||
2425 | 0x00, 0x9b, 0x00, 0xa6, 0x00, 0x03, 0x00, 0x70, | ||
2426 | 0x00, 0x06, 0x00, 0x5b, 0x00), | ||
2427 | PHYREGS(0x0868, 0x0864, 0x0860, 0x01e7, 0x01e8, 0x01e9), | ||
2428 | }, | ||
2429 | { .freq = 5380, | ||
2430 | RADIOREGS3(0x6e, 0x01, 0x01, 0x02, 0x1a, 0x05, 0x05, 0x04, | ||
2431 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00, | ||
2432 | 0xff, 0x96, 0x00, 0x03, 0x00, 0x70, 0x00, 0x06, | ||
2433 | 0x00, 0x9a, 0x00, 0x96, 0x00, 0x03, 0x00, 0x70, | ||
2434 | 0x00, 0x06, 0x00, 0x5a, 0x00), | ||
2435 | PHYREGS(0x086c, 0x0868, 0x0864, 0x01e6, 0x01e7, 0x01e8), | ||
2436 | }, | ||
2437 | { .freq = 5390, | ||
2438 | RADIOREGS3(0x6e, 0x01, 0x01, 0x02, 0x1b, 0x05, 0x05, 0x04, | ||
2439 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00, | ||
2440 | 0xff, 0x95, 0x00, 0x03, 0x00, 0x70, 0x00, 0x06, | ||
2441 | 0x00, 0x9a, 0x00, 0x95, 0x00, 0x03, 0x00, 0x70, | ||
2442 | 0x00, 0x06, 0x00, 0x5a, 0x00), | ||
2443 | PHYREGS(0x0870, 0x086c, 0x0868, 0x01e5, 0x01e6, 0x01e7), | ||
2444 | }, | ||
2445 | { .freq = 5400, | ||
2446 | RADIOREGS3(0x67, 0x01, 0x01, 0x02, 0x1c, 0x05, 0x05, 0x04, | ||
2447 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00, | ||
2448 | 0xc8, 0x95, 0x00, 0x03, 0x00, 0x70, 0x00, 0x06, | ||
2449 | 0x00, 0x9a, 0x00, 0x95, 0x00, 0x03, 0x00, 0x70, | ||
2450 | 0x00, 0x06, 0x00, 0x5a, 0x00), | ||
2451 | PHYREGS(0x0874, 0x0870, 0x086c, 0x01e5, 0x01e5, 0x01e6), | ||
2452 | }, | ||
2453 | { .freq = 5410, | ||
2454 | RADIOREGS3(0x67, 0x01, 0x01, 0x02, 0x1d, 0x05, 0x05, 0x04, | ||
2455 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00, | ||
2456 | 0xc8, 0x95, 0x00, 0x03, 0x00, 0x70, 0x00, 0x05, | ||
2457 | 0x00, 0x9a, 0x00, 0x95, 0x00, 0x03, 0x00, 0x70, | ||
2458 | 0x00, 0x05, 0x00, 0x5a, 0x00), | ||
2459 | PHYREGS(0x0878, 0x0874, 0x0870, 0x01e4, 0x01e5, 0x01e5), | ||
2460 | }, | ||
2461 | { .freq = 5420, | ||
2462 | RADIOREGS3(0x61, 0x01, 0x01, 0x02, 0x1e, 0x05, 0x05, 0x04, | ||
2463 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00, | ||
2464 | 0xc8, 0x95, 0x00, 0x03, 0x00, 0x70, 0x00, 0x05, | ||
2465 | 0x00, 0x9a, 0x00, 0x95, 0x00, 0x03, 0x00, 0x70, | ||
2466 | 0x00, 0x05, 0x00, 0x5a, 0x00), | ||
2467 | PHYREGS(0x087c, 0x0878, 0x0874, 0x01e3, 0x01e4, 0x01e5), | ||
2468 | }, | ||
2469 | { .freq = 5430, | ||
2470 | RADIOREGS3(0x61, 0x01, 0x01, 0x02, 0x1f, 0x05, 0x05, 0x04, | ||
2471 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00, | ||
2472 | 0xc8, 0x85, 0x00, 0x02, 0x00, 0x70, 0x00, 0x05, | ||
2473 | 0x00, 0x99, 0x00, 0x85, 0x00, 0x02, 0x00, 0x70, | ||
2474 | 0x00, 0x05, 0x00, 0x59, 0x00), | ||
2475 | PHYREGS(0x0880, 0x087c, 0x0878, 0x01e2, 0x01e3, 0x01e4), | ||
2476 | }, | ||
2477 | { .freq = 5440, | ||
2478 | RADIOREGS3(0x5a, 0x01, 0x01, 0x02, 0x20, 0x05, 0x05, 0x04, | ||
2479 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00, | ||
2480 | 0xc8, 0x84, 0x00, 0x02, 0x00, 0x70, 0x00, 0x05, | ||
2481 | 0x00, 0x99, 0x00, 0x84, 0x00, 0x02, 0x00, 0x70, | ||
2482 | 0x00, 0x05, 0x00, 0x59, 0x00), | ||
2483 | PHYREGS(0x0884, 0x0880, 0x087c, 0x01e1, 0x01e2, 0x01e3), | ||
2484 | }, | ||
2485 | { .freq = 5450, | ||
2486 | RADIOREGS3(0x5a, 0x01, 0x01, 0x02, 0x21, 0x05, 0x05, 0x04, | ||
2487 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00, | ||
2488 | 0xc8, 0x84, 0x00, 0x02, 0x00, 0x70, 0x00, 0x05, | ||
2489 | 0x00, 0x99, 0x00, 0x84, 0x00, 0x02, 0x00, 0x70, | ||
2490 | 0x00, 0x05, 0x00, 0x59, 0x00), | ||
2491 | PHYREGS(0x0888, 0x0884, 0x0880, 0x01e0, 0x01e1, 0x01e2), | ||
2492 | }, | ||
2493 | { .freq = 5460, | ||
2494 | RADIOREGS3(0x53, 0x01, 0x01, 0x02, 0x22, 0x05, 0x05, 0x04, | ||
2495 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00, | ||
2496 | 0xc8, 0x84, 0x00, 0x02, 0x00, 0x70, 0x00, 0x04, | ||
2497 | 0x00, 0x99, 0x00, 0x84, 0x00, 0x02, 0x00, 0x70, | ||
2498 | 0x00, 0x04, 0x00, 0x69, 0x00), | ||
2499 | PHYREGS(0x088c, 0x0888, 0x0884, 0x01df, 0x01e0, 0x01e1), | ||
2500 | }, | ||
2501 | { .freq = 5470, | ||
2502 | RADIOREGS3(0x53, 0x01, 0x01, 0x02, 0x23, 0x05, 0x05, 0x04, | ||
2503 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00, | ||
2504 | 0xc8, 0x74, 0x00, 0x01, 0x00, 0x70, 0x00, 0x04, | ||
2505 | 0x00, 0x99, 0x00, 0x74, 0x00, 0x01, 0x00, 0x70, | ||
2506 | 0x00, 0x04, 0x00, 0x69, 0x00), | ||
2507 | PHYREGS(0x0890, 0x088c, 0x0888, 0x01de, 0x01df, 0x01e0), | ||
2508 | }, | ||
2509 | { .freq = 5480, | ||
2510 | RADIOREGS3(0x4d, 0x01, 0x01, 0x02, 0x24, 0x05, 0x05, 0x04, | ||
2511 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00, | ||
2512 | 0xc8, 0x73, 0x00, 0x01, 0x00, 0x70, 0x00, 0x04, | ||
2513 | 0x00, 0x98, 0x00, 0x73, 0x00, 0x01, 0x00, 0x70, | ||
2514 | 0x00, 0x04, 0x00, 0x68, 0x00), | ||
2515 | PHYREGS(0x0894, 0x0890, 0x088c, 0x01dd, 0x01de, 0x01df), | ||
2516 | }, | ||
2517 | { .freq = 5490, | ||
2518 | RADIOREGS3(0x4d, 0x01, 0x01, 0x02, 0x25, 0x05, 0x05, 0x04, | ||
2519 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00, | ||
2520 | 0xc8, 0x73, 0x00, 0x01, 0x00, 0x70, 0x00, 0x04, | ||
2521 | 0x00, 0x98, 0x00, 0x73, 0x00, 0x01, 0x00, 0x70, | ||
2522 | 0x00, 0x04, 0x00, 0x68, 0x00), | ||
2523 | PHYREGS(0x0898, 0x0894, 0x0890, 0x01dd, 0x01dd, 0x01de), | ||
2524 | }, | ||
2525 | { .freq = 5500, | ||
2526 | RADIOREGS3(0x47, 0x01, 0x01, 0x02, 0x26, 0x05, 0x05, 0x04, | ||
2527 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, | ||
2528 | 0x84, 0x73, 0x00, 0x01, 0x00, 0x70, 0x00, 0x04, | ||
2529 | 0x00, 0x98, 0x00, 0x73, 0x00, 0x01, 0x00, 0x70, | ||
2530 | 0x00, 0x04, 0x00, 0x78, 0x00), | ||
2531 | PHYREGS(0x089c, 0x0898, 0x0894, 0x01dc, 0x01dd, 0x01dd), | ||
2532 | }, | ||
2533 | { .freq = 5510, | ||
2534 | RADIOREGS3(0x47, 0x01, 0x01, 0x02, 0x27, 0x05, 0x05, 0x04, | ||
2535 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, | ||
2536 | 0x84, 0x73, 0x00, 0x01, 0x00, 0x70, 0x00, 0x04, | ||
2537 | 0x00, 0x98, 0x00, 0x73, 0x00, 0x01, 0x00, 0x70, | ||
2538 | 0x00, 0x04, 0x00, 0x78, 0x00), | ||
2539 | PHYREGS(0x08a0, 0x089c, 0x0898, 0x01db, 0x01dc, 0x01dd), | ||
2540 | }, | ||
2541 | { .freq = 5520, | ||
2542 | RADIOREGS3(0x40, 0x01, 0x01, 0x02, 0x28, 0x05, 0x05, 0x04, | ||
2543 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, | ||
2544 | 0x84, 0x73, 0x00, 0x01, 0x00, 0x70, 0x00, 0x04, | ||
2545 | 0x00, 0x98, 0x00, 0x73, 0x00, 0x01, 0x00, 0x70, | ||
2546 | 0x00, 0x04, 0x00, 0x78, 0x00), | ||
2547 | PHYREGS(0x08a4, 0x08a0, 0x089c, 0x01da, 0x01db, 0x01dc), | ||
2548 | }, | ||
2549 | { .freq = 5530, | ||
2550 | RADIOREGS3(0x40, 0x01, 0x01, 0x02, 0x29, 0x05, 0x05, 0x04, | ||
2551 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, | ||
2552 | 0x84, 0x63, 0x00, 0x01, 0x00, 0x70, 0x00, 0x03, | ||
2553 | 0x00, 0x98, 0x00, 0x63, 0x00, 0x01, 0x00, 0x70, | ||
2554 | 0x00, 0x03, 0x00, 0x78, 0x00), | ||
2555 | PHYREGS(0x08a8, 0x08a4, 0x08a0, 0x01d9, 0x01da, 0x01db), | ||
2556 | }, | ||
2557 | { .freq = 5540, | ||
2558 | RADIOREGS3(0x3a, 0x01, 0x01, 0x02, 0x2a, 0x05, 0x05, 0x04, | ||
2559 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, | ||
2560 | 0x84, 0x62, 0x00, 0x00, 0x00, 0x70, 0x00, 0x03, | ||
2561 | 0x00, 0x97, 0x00, 0x62, 0x00, 0x00, 0x00, 0x70, | ||
2562 | 0x00, 0x03, 0x00, 0x77, 0x00), | ||
2563 | PHYREGS(0x08ac, 0x08a8, 0x08a4, 0x01d8, 0x01d9, 0x01da), | ||
2564 | }, | ||
2565 | { .freq = 5550, | ||
2566 | RADIOREGS3(0x3a, 0x01, 0x01, 0x02, 0x2b, 0x05, 0x05, 0x04, | ||
2567 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, | ||
2568 | 0x84, 0x62, 0x00, 0x00, 0x00, 0x70, 0x00, 0x03, | ||
2569 | 0x00, 0x97, 0x00, 0x62, 0x00, 0x00, 0x00, 0x70, | ||
2570 | 0x00, 0x03, 0x00, 0x77, 0x00), | ||
2571 | PHYREGS(0x08b0, 0x08ac, 0x08a8, 0x01d7, 0x01d8, 0x01d9), | ||
2572 | }, | ||
2573 | { .freq = 5560, | ||
2574 | RADIOREGS3(0x34, 0x01, 0x01, 0x02, 0x2c, 0x05, 0x05, 0x04, | ||
2575 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, | ||
2576 | 0x84, 0x62, 0x00, 0x00, 0x00, 0x70, 0x00, 0x03, | ||
2577 | 0x00, 0x97, 0x00, 0x62, 0x00, 0x00, 0x00, 0x70, | ||
2578 | 0x00, 0x03, 0x00, 0x77, 0x00), | ||
2579 | PHYREGS(0x08b4, 0x08b0, 0x08ac, 0x01d7, 0x01d7, 0x01d8), | ||
2580 | }, | ||
2581 | { .freq = 5570, | ||
2582 | RADIOREGS3(0x34, 0x01, 0x01, 0x02, 0x2d, 0x05, 0x05, 0x04, | ||
2583 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, | ||
2584 | 0x84, 0x52, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02, | ||
2585 | 0x00, 0x96, 0x00, 0x52, 0x00, 0x00, 0x00, 0x70, | ||
2586 | 0x00, 0x02, 0x00, 0x76, 0x00), | ||
2587 | PHYREGS(0x08b8, 0x08b4, 0x08b0, 0x01d6, 0x01d7, 0x01d7), | ||
2588 | }, | ||
2589 | { .freq = 5580, | ||
2590 | RADIOREGS3(0x2e, 0x01, 0x01, 0x02, 0x2e, 0x05, 0x05, 0x04, | ||
2591 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, | ||
2592 | 0x84, 0x52, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02, | ||
2593 | 0x00, 0x96, 0x00, 0x52, 0x00, 0x00, 0x00, 0x70, | ||
2594 | 0x00, 0x02, 0x00, 0x76, 0x00), | ||
2595 | PHYREGS(0x08bc, 0x08b8, 0x08b4, 0x01d5, 0x01d6, 0x01d7), | ||
2596 | }, | ||
2597 | { .freq = 5590, | ||
2598 | RADIOREGS3(0x2e, 0x01, 0x01, 0x02, 0x2f, 0x05, 0x05, 0x04, | ||
2599 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, | ||
2600 | 0x84, 0x51, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02, | ||
2601 | 0x00, 0x96, 0x00, 0x51, 0x00, 0x00, 0x00, 0x70, | ||
2602 | 0x00, 0x02, 0x00, 0x76, 0x00), | ||
2603 | PHYREGS(0x08c0, 0x08bc, 0x08b8, 0x01d4, 0x01d5, 0x01d6), | ||
2604 | }, | ||
2605 | { .freq = 5600, | ||
2606 | RADIOREGS3(0x28, 0x01, 0x01, 0x02, 0x30, 0x05, 0x05, 0x04, | ||
2607 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, | ||
2608 | 0x70, 0x51, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02, | ||
2609 | 0x00, 0x96, 0x00, 0x51, 0x00, 0x00, 0x00, 0x70, | ||
2610 | 0x00, 0x02, 0x00, 0x76, 0x00), | ||
2611 | PHYREGS(0x08c4, 0x08c0, 0x08bc, 0x01d3, 0x01d4, 0x01d5), | ||
2612 | }, | ||
2613 | { .freq = 5610, | ||
2614 | RADIOREGS3(0x28, 0x01, 0x01, 0x02, 0x31, 0x05, 0x05, 0x04, | ||
2615 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, | ||
2616 | 0x70, 0x51, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02, | ||
2617 | 0x00, 0x96, 0x00, 0x51, 0x00, 0x00, 0x00, 0x70, | ||
2618 | 0x00, 0x02, 0x00, 0x76, 0x00), | ||
2619 | PHYREGS(0x08c8, 0x08c4, 0x08c0, 0x01d2, 0x01d3, 0x01d4), | ||
2620 | }, | ||
2621 | { .freq = 5620, | ||
2622 | RADIOREGS3(0x21, 0x01, 0x01, 0x02, 0x32, 0x05, 0x05, 0x04, | ||
2623 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, | ||
2624 | 0x70, 0x51, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02, | ||
2625 | 0x00, 0x96, 0x00, 0x51, 0x00, 0x00, 0x00, 0x70, | ||
2626 | 0x00, 0x02, 0x00, 0x76, 0x00), | ||
2627 | PHYREGS(0x08cc, 0x08c8, 0x08c4, 0x01d2, 0x01d2, 0x01d3), | ||
2628 | }, | ||
2629 | { .freq = 5630, | ||
2630 | RADIOREGS3(0x21, 0x01, 0x01, 0x02, 0x33, 0x05, 0x05, 0x04, | ||
2631 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, | ||
2632 | 0x70, 0x51, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02, | ||
2633 | 0x00, 0x96, 0x00, 0x51, 0x00, 0x00, 0x00, 0x70, | ||
2634 | 0x00, 0x02, 0x00, 0x76, 0x00), | ||
2635 | PHYREGS(0x08d0, 0x08cc, 0x08c8, 0x01d1, 0x01d2, 0x01d2), | ||
2636 | }, | ||
2637 | { .freq = 5640, | ||
2638 | RADIOREGS3(0x1c, 0x01, 0x01, 0x02, 0x34, 0x05, 0x05, 0x04, | ||
2639 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, | ||
2640 | 0x70, 0x51, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02, | ||
2641 | 0x00, 0x95, 0x00, 0x51, 0x00, 0x00, 0x00, 0x70, | ||
2642 | 0x00, 0x02, 0x00, 0x75, 0x00), | ||
2643 | PHYREGS(0x08d4, 0x08d0, 0x08cc, 0x01d0, 0x01d1, 0x01d2), | ||
2644 | }, | ||
2645 | { .freq = 5650, | ||
2646 | RADIOREGS3(0x1c, 0x01, 0x01, 0x02, 0x35, 0x05, 0x05, 0x04, | ||
2647 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, | ||
2648 | 0x70, 0x50, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01, | ||
2649 | 0x00, 0x95, 0x00, 0x50, 0x00, 0x00, 0x00, 0x70, | ||
2650 | 0x00, 0x01, 0x00, 0x75, 0x00), | ||
2651 | PHYREGS(0x08d8, 0x08d4, 0x08d0, 0x01cf, 0x01d0, 0x01d1), | ||
2652 | }, | ||
2653 | { .freq = 5660, | ||
2654 | RADIOREGS3(0x16, 0x01, 0x01, 0x02, 0x36, 0x05, 0x05, 0x04, | ||
2655 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, | ||
2656 | 0x70, 0x50, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01, | ||
2657 | 0x00, 0x95, 0x00, 0x50, 0x00, 0x00, 0x00, 0x70, | ||
2658 | 0x00, 0x01, 0x00, 0x75, 0x00), | ||
2659 | PHYREGS(0x08dc, 0x08d8, 0x08d4, 0x01ce, 0x01cf, 0x01d0), | ||
2660 | }, | ||
2661 | { .freq = 5670, | ||
2662 | RADIOREGS3(0x16, 0x01, 0x01, 0x02, 0x37, 0x05, 0x05, 0x04, | ||
2663 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, | ||
2664 | 0x70, 0x40, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01, | ||
2665 | 0x00, 0x94, 0x00, 0x40, 0x00, 0x00, 0x00, 0x70, | ||
2666 | 0x00, 0x01, 0x00, 0x74, 0x00), | ||
2667 | PHYREGS(0x08e0, 0x08dc, 0x08d8, 0x01ce, 0x01ce, 0x01cf), | ||
2668 | }, | ||
2669 | { .freq = 5680, | ||
2670 | RADIOREGS3(0x10, 0x01, 0x01, 0x02, 0x38, 0x05, 0x05, 0x04, | ||
2671 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, | ||
2672 | 0x70, 0x40, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01, | ||
2673 | 0x00, 0x94, 0x00, 0x40, 0x00, 0x00, 0x00, 0x70, | ||
2674 | 0x00, 0x01, 0x00, 0x74, 0x00), | ||
2675 | PHYREGS(0x08e4, 0x08e0, 0x08dc, 0x01cd, 0x01ce, 0x01ce), | ||
2676 | }, | ||
2677 | { .freq = 5690, | ||
2678 | RADIOREGS3(0x10, 0x01, 0x01, 0x02, 0x39, 0x05, 0x05, 0x04, | ||
2679 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, | ||
2680 | 0x70, 0x40, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01, | ||
2681 | 0x00, 0x94, 0x00, 0x40, 0x00, 0x00, 0x00, 0x70, | ||
2682 | 0x00, 0x01, 0x00, 0x74, 0x00), | ||
2683 | PHYREGS(0x08e8, 0x08e4, 0x08e0, 0x01cc, 0x01cd, 0x01ce), | ||
2684 | }, | ||
2685 | { .freq = 5700, | ||
2686 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3a, 0x05, 0x05, 0x04, | ||
2687 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
2688 | 0x40, 0x40, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01, | ||
2689 | 0x00, 0x94, 0x00, 0x40, 0x00, 0x00, 0x00, 0x70, | ||
2690 | 0x00, 0x01, 0x00, 0x74, 0x00), | ||
2691 | PHYREGS(0x08ec, 0x08e8, 0x08e4, 0x01cb, 0x01cc, 0x01cd), | ||
2692 | }, | ||
2693 | { .freq = 5710, | ||
2694 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3b, 0x05, 0x05, 0x04, | ||
2695 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
2696 | 0x40, 0x40, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01, | ||
2697 | 0x00, 0x94, 0x00, 0x40, 0x00, 0x00, 0x00, 0x70, | ||
2698 | 0x00, 0x01, 0x00, 0x74, 0x00), | ||
2699 | PHYREGS(0x08f0, 0x08ec, 0x08e8, 0x01ca, 0x01cb, 0x01cc), | ||
2700 | }, | ||
2701 | { .freq = 5720, | ||
2702 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3c, 0x05, 0x05, 0x04, | ||
2703 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
2704 | 0x40, 0x40, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01, | ||
2705 | 0x00, 0x94, 0x00, 0x40, 0x00, 0x00, 0x00, 0x70, | ||
2706 | 0x00, 0x01, 0x00, 0x74, 0x00), | ||
2707 | PHYREGS(0x08f4, 0x08f0, 0x08ec, 0x01c9, 0x01ca, 0x01cb), | ||
2708 | }, | ||
2709 | { .freq = 5725, | ||
2710 | RADIOREGS3(0x03, 0x01, 0x02, 0x04, 0x79, 0x07, 0x07, 0x04, | ||
2711 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
2712 | 0x40, 0x40, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01, | ||
2713 | 0x00, 0x94, 0x00, 0x40, 0x00, 0x00, 0x00, 0x70, | ||
2714 | 0x00, 0x01, 0x00, 0x74, 0x00), | ||
2715 | PHYREGS(0x08f6, 0x08f2, 0x08ee, 0x01c9, 0x01ca, 0x01cb), | ||
2716 | }, | ||
2717 | { .freq = 5730, | ||
2718 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3d, 0x05, 0x05, 0x04, | ||
2719 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
2720 | 0x40, 0x30, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01, | ||
2721 | 0x00, 0x94, 0x00, 0x30, 0x00, 0x00, 0x00, 0x70, | ||
2722 | 0x00, 0x01, 0x00, 0x84, 0x00), | ||
2723 | PHYREGS(0x08f8, 0x08f4, 0x08f0, 0x01c9, 0x01c9, 0x01ca), | ||
2724 | }, | ||
2725 | { .freq = 5735, | ||
2726 | RADIOREGS3(0x03, 0x01, 0x02, 0x04, 0x7b, 0x07, 0x07, 0x04, | ||
2727 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
2728 | 0x40, 0x30, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
2729 | 0x00, 0x93, 0x00, 0x30, 0x00, 0x00, 0x00, 0x70, | ||
2730 | 0x00, 0x00, 0x00, 0x83, 0x00), | ||
2731 | PHYREGS(0x08fa, 0x08f6, 0x08f2, 0x01c8, 0x01c9, 0x01ca), | ||
2732 | }, | ||
2733 | { .freq = 5740, | ||
2734 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3e, 0x05, 0x05, 0x04, | ||
2735 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
2736 | 0x40, 0x30, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
2737 | 0x00, 0x93, 0x00, 0x30, 0x00, 0x00, 0x00, 0x70, | ||
2738 | 0x00, 0x00, 0x00, 0x83, 0x00), | ||
2739 | PHYREGS(0x08fc, 0x08f8, 0x08f4, 0x01c8, 0x01c9, 0x01c9), | ||
2740 | }, | ||
2741 | { .freq = 5745, | ||
2742 | RADIOREGS3(0xfe, 0x00, 0x02, 0x04, 0x7d, 0x07, 0x07, 0x04, | ||
2743 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
2744 | 0x40, 0x30, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
2745 | 0x00, 0x93, 0x00, 0x30, 0x00, 0x00, 0x00, 0x70, | ||
2746 | 0x00, 0x00, 0x00, 0x83, 0x00), | ||
2747 | PHYREGS(0x08fe, 0x08fa, 0x08f6, 0x01c8, 0x01c8, 0x01c9), | ||
2748 | }, | ||
2749 | { .freq = 5750, | ||
2750 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3f, 0x05, 0x05, 0x04, | ||
2751 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
2752 | 0x40, 0x30, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
2753 | 0x00, 0x93, 0x00, 0x30, 0x00, 0x00, 0x00, 0x70, | ||
2754 | 0x00, 0x00, 0x00, 0x83, 0x00), | ||
2755 | PHYREGS(0x0900, 0x08fc, 0x08f8, 0x01c7, 0x01c8, 0x01c9), | ||
2756 | }, | ||
2757 | { .freq = 5755, | ||
2758 | RADIOREGS3(0xfe, 0x00, 0x02, 0x04, 0x7f, 0x07, 0x07, 0x04, | ||
2759 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
2760 | 0x40, 0x30, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
2761 | 0x00, 0x93, 0x00, 0x30, 0x00, 0x00, 0x00, 0x70, | ||
2762 | 0x00, 0x00, 0x00, 0x83, 0x00), | ||
2763 | PHYREGS(0x0902, 0x08fe, 0x08fa, 0x01c7, 0x01c8, 0x01c8), | ||
2764 | }, | ||
2765 | { .freq = 5760, | ||
2766 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x40, 0x05, 0x05, 0x04, | ||
2767 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
2768 | 0x40, 0x20, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
2769 | 0x00, 0x93, 0x00, 0x20, 0x00, 0x00, 0x00, 0x70, | ||
2770 | 0x00, 0x00, 0x00, 0x83, 0x00), | ||
2771 | PHYREGS(0x0904, 0x0900, 0x08fc, 0x01c6, 0x01c7, 0x01c8), | ||
2772 | }, | ||
2773 | { .freq = 5765, | ||
2774 | RADIOREGS3(0xf8, 0x00, 0x02, 0x04, 0x81, 0x07, 0x07, 0x04, | ||
2775 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
2776 | 0x40, 0x20, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
2777 | 0x00, 0x92, 0x00, 0x20, 0x00, 0x00, 0x00, 0x70, | ||
2778 | 0x00, 0x00, 0x00, 0x82, 0x00), | ||
2779 | PHYREGS(0x0906, 0x0902, 0x08fe, 0x01c6, 0x01c7, 0x01c8), | ||
2780 | }, | ||
2781 | { .freq = 5770, | ||
2782 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x41, 0x05, 0x05, 0x04, | ||
2783 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
2784 | 0x40, 0x20, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
2785 | 0x00, 0x92, 0x00, 0x20, 0x00, 0x00, 0x00, 0x70, | ||
2786 | 0x00, 0x00, 0x00, 0x82, 0x00), | ||
2787 | PHYREGS(0x0908, 0x0904, 0x0900, 0x01c6, 0x01c6, 0x01c7), | ||
2788 | }, | ||
2789 | { .freq = 5775, | ||
2790 | RADIOREGS3(0xf8, 0x00, 0x02, 0x04, 0x83, 0x07, 0x07, 0x04, | ||
2791 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
2792 | 0x40, 0x20, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
2793 | 0x00, 0x92, 0x00, 0x20, 0x00, 0x00, 0x00, 0x70, | ||
2794 | 0x00, 0x00, 0x00, 0x82, 0x00), | ||
2795 | PHYREGS(0x090a, 0x0906, 0x0902, 0x01c5, 0x01c6, 0x01c7), | ||
2796 | }, | ||
2797 | { .freq = 5780, | ||
2798 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x42, 0x05, 0x05, 0x04, | ||
2799 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, | ||
2800 | 0x40, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
2801 | 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, | ||
2802 | 0x00, 0x00, 0x00, 0x82, 0x00), | ||
2803 | PHYREGS(0x090c, 0x0908, 0x0904, 0x01c5, 0x01c6, 0x01c6), | ||
2804 | }, | ||
2805 | { .freq = 5785, | ||
2806 | RADIOREGS3(0xf2, 0x00, 0x02, 0x04, 0x85, 0x07, 0x07, 0x04, | ||
2807 | 0x10, 0x01, 0x06, 0x06, 0x06, 0x8a, 0x06, 0x00, | ||
2808 | 0x40, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
2809 | 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, | ||
2810 | 0x00, 0x00, 0x00, 0x82, 0x00), | ||
2811 | PHYREGS(0x090e, 0x090a, 0x0906, 0x01c4, 0x01c5, 0x01c6), | ||
2812 | }, | ||
2813 | { .freq = 5790, | ||
2814 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x43, 0x05, 0x05, 0x04, | ||
2815 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x8a, 0x06, 0x00, | ||
2816 | 0x40, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
2817 | 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, | ||
2818 | 0x00, 0x00, 0x00, 0x82, 0x00), | ||
2819 | PHYREGS(0x0910, 0x090c, 0x0908, 0x01c4, 0x01c5, 0x01c6), | ||
2820 | }, | ||
2821 | { .freq = 5795, | ||
2822 | RADIOREGS3(0xf2, 0x00, 0x02, 0x04, 0x87, 0x07, 0x07, 0x04, | ||
2823 | 0x10, 0x01, 0x06, 0x06, 0x06, 0x8a, 0x06, 0x00, | ||
2824 | 0x40, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
2825 | 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, | ||
2826 | 0x00, 0x00, 0x00, 0x82, 0x00), | ||
2827 | PHYREGS(0x0912, 0x090e, 0x090a, 0x01c4, 0x01c4, 0x01c5), | ||
2828 | }, | ||
2829 | { .freq = 5800, | ||
2830 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x44, 0x05, 0x05, 0x04, | ||
2831 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
2832 | 0x20, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
2833 | 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, | ||
2834 | 0x00, 0x00, 0x00, 0x82, 0x00), | ||
2835 | PHYREGS(0x0914, 0x0910, 0x090c, 0x01c3, 0x01c4, 0x01c5), | ||
2836 | }, | ||
2837 | { .freq = 5805, | ||
2838 | RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x89, 0x07, 0x07, 0x04, | ||
2839 | 0x10, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
2840 | 0x20, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
2841 | 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, | ||
2842 | 0x00, 0x00, 0x00, 0x82, 0x00), | ||
2843 | PHYREGS(0x0916, 0x0912, 0x090e, 0x01c3, 0x01c4, 0x01c4), | ||
2844 | }, | ||
2845 | { .freq = 5810, | ||
2846 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x45, 0x05, 0x05, 0x04, | ||
2847 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
2848 | 0x20, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
2849 | 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, | ||
2850 | 0x00, 0x00, 0x00, 0x82, 0x00), | ||
2851 | PHYREGS(0x0918, 0x0914, 0x0910, 0x01c2, 0x01c3, 0x01c4), | ||
2852 | }, | ||
2853 | { .freq = 5815, | ||
2854 | RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x8b, 0x07, 0x07, 0x04, | ||
2855 | 0x10, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
2856 | 0x20, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
2857 | 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, | ||
2858 | 0x00, 0x00, 0x00, 0x82, 0x00), | ||
2859 | PHYREGS(0x091a, 0x0916, 0x0912, 0x01c2, 0x01c3, 0x01c4), | ||
2860 | }, | ||
2861 | { .freq = 5820, | ||
2862 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x46, 0x05, 0x05, 0x04, | ||
2863 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
2864 | 0x20, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
2865 | 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, | ||
2866 | 0x00, 0x00, 0x00, 0x82, 0x00), | ||
2867 | PHYREGS(0x091c, 0x0918, 0x0914, 0x01c2, 0x01c2, 0x01c3), | ||
2868 | }, | ||
2869 | { .freq = 5825, | ||
2870 | RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x8d, 0x07, 0x07, 0x04, | ||
2871 | 0x10, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
2872 | 0x20, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
2873 | 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, | ||
2874 | 0x00, 0x00, 0x00, 0x82, 0x00), | ||
2875 | PHYREGS(0x091e, 0x091a, 0x0916, 0x01c1, 0x01c2, 0x01c3), | ||
2876 | }, | ||
2877 | { .freq = 5830, | ||
2878 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x47, 0x05, 0x05, 0x04, | ||
2879 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
2880 | 0x20, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
2881 | 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, | ||
2882 | 0x00, 0x00, 0x00, 0x72, 0x00), | ||
2883 | PHYREGS(0x0920, 0x091c, 0x0918, 0x01c1, 0x01c2, 0x01c2), | ||
2884 | }, | ||
2885 | { .freq = 5840, | ||
2886 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x48, 0x05, 0x05, 0x04, | ||
2887 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
2888 | 0x20, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
2889 | 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, | ||
2890 | 0x00, 0x00, 0x00, 0x72, 0x00), | ||
2891 | PHYREGS(0x0924, 0x0920, 0x091c, 0x01c0, 0x01c1, 0x01c2), | ||
2892 | }, | ||
2893 | { .freq = 5850, | ||
2894 | RADIOREGS3(0xe0, 0x00, 0x01, 0x02, 0x49, 0x05, 0x05, 0x04, | ||
2895 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
2896 | 0x20, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
2897 | 0x00, 0x92, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, | ||
2898 | 0x00, 0x00, 0x00, 0x72, 0x00), | ||
2899 | PHYREGS(0x0928, 0x0924, 0x0920, 0x01bf, 0x01c0, 0x01c1), | ||
2900 | }, | ||
2901 | { .freq = 5860, | ||
2902 | RADIOREGS3(0xde, 0x00, 0x01, 0x02, 0x4a, 0x05, 0x05, 0x04, | ||
2903 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
2904 | 0x20, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
2905 | 0x00, 0x92, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, | ||
2906 | 0x00, 0x00, 0x00, 0x72, 0x00), | ||
2907 | PHYREGS(0x092c, 0x0928, 0x0924, 0x01bf, 0x01bf, 0x01c0), | ||
2908 | }, | ||
2909 | { .freq = 5870, | ||
2910 | RADIOREGS3(0xdb, 0x00, 0x01, 0x02, 0x4b, 0x05, 0x05, 0x04, | ||
2911 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
2912 | 0x20, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
2913 | 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, | ||
2914 | 0x00, 0x00, 0x00, 0x71, 0x00), | ||
2915 | PHYREGS(0x0930, 0x092c, 0x0928, 0x01be, 0x01bf, 0x01bf), | ||
2916 | }, | ||
2917 | { .freq = 5880, | ||
2918 | RADIOREGS3(0xd8, 0x00, 0x01, 0x02, 0x4c, 0x05, 0x05, 0x04, | ||
2919 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
2920 | 0x20, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
2921 | 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, | ||
2922 | 0x00, 0x00, 0x00, 0x71, 0x00), | ||
2923 | PHYREGS(0x0934, 0x0930, 0x092c, 0x01bd, 0x01be, 0x01bf), | ||
2924 | }, | ||
2925 | { .freq = 5890, | ||
2926 | RADIOREGS3(0xd6, 0x00, 0x01, 0x02, 0x4d, 0x05, 0x05, 0x04, | ||
2927 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, | ||
2928 | 0x20, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
2929 | 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, | ||
2930 | 0x00, 0x00, 0x00, 0x71, 0x00), | ||
2931 | PHYREGS(0x0938, 0x0934, 0x0930, 0x01bc, 0x01bd, 0x01be), | ||
2932 | }, | ||
2933 | { .freq = 5900, | ||
2934 | RADIOREGS3(0xd3, 0x00, 0x01, 0x02, 0x4e, 0x05, 0x05, 0x04, | ||
2935 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x87, 0x03, 0x00, | ||
2936 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
2937 | 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, | ||
2938 | 0x00, 0x00, 0x00, 0x71, 0x00), | ||
2939 | PHYREGS(0x093c, 0x0938, 0x0934, 0x01bc, 0x01bc, 0x01bd), | ||
2940 | }, | ||
2941 | { .freq = 5910, | ||
2942 | RADIOREGS3(0xd6, 0x00, 0x01, 0x02, 0x4f, 0x05, 0x05, 0x04, | ||
2943 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x87, 0x03, 0x00, | ||
2944 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
2945 | 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, | ||
2946 | 0x00, 0x00, 0x00, 0x71, 0x00), | ||
2947 | PHYREGS(0x0940, 0x093c, 0x0938, 0x01bb, 0x01bc, 0x01bc), | ||
2948 | }, | ||
2949 | { .freq = 2412, | ||
2950 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x6c, 0x08, 0x08, 0x04, | ||
2951 | 0x16, 0x01, 0x04, 0x04, 0x04, 0x8f, 0x30, 0x00, | ||
2952 | 0x00, 0x00, 0x1f, 0x00, 0x03, 0x00, 0x70, 0x00, | ||
2953 | 0x0f, 0x00, 0x0b, 0x00, 0x1f, 0x00, 0x03, 0x00, | ||
2954 | 0x70, 0x00, 0x0f, 0x00, 0x0b), | ||
2955 | PHYREGS(0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443), | ||
2956 | }, | ||
2957 | { .freq = 2417, | ||
2958 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x71, 0x08, 0x08, 0x04, | ||
2959 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
2960 | 0x00, 0x00, 0x1f, 0x00, 0x03, 0x00, 0x70, 0x00, | ||
2961 | 0x0f, 0x00, 0x0a, 0x00, 0x1f, 0x00, 0x03, 0x00, | ||
2962 | 0x70, 0x00, 0x0f, 0x00, 0x0a), | ||
2963 | PHYREGS(0x03cb, 0x03c7, 0x03c3, 0x0438, 0x043d, 0x0441), | ||
2964 | }, | ||
2965 | { .freq = 2422, | ||
2966 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x76, 0x08, 0x08, 0x04, | ||
2967 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
2968 | 0x00, 0x00, 0x0e, 0x00, 0x03, 0x00, 0x70, 0x00, | ||
2969 | 0x0f, 0x00, 0x0a, 0x00, 0x0e, 0x00, 0x03, 0x00, | ||
2970 | 0x70, 0x00, 0x0f, 0x00, 0x0a), | ||
2971 | PHYREGS(0x03cd, 0x03c9, 0x03c5, 0x0436, 0x043a, 0x043f), | ||
2972 | }, | ||
2973 | { .freq = 2427, | ||
2974 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x7b, 0x08, 0x08, 0x04, | ||
2975 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
2976 | 0x00, 0x00, 0x0d, 0x00, 0x03, 0x00, 0x70, 0x00, | ||
2977 | 0x0e, 0x00, 0x0a, 0x00, 0x0d, 0x00, 0x03, 0x00, | ||
2978 | 0x70, 0x00, 0x0e, 0x00, 0x0a), | ||
2979 | PHYREGS(0x03cf, 0x03cb, 0x03c7, 0x0434, 0x0438, 0x043d), | ||
2980 | }, | ||
2981 | { .freq = 2432, | ||
2982 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x80, 0x08, 0x08, 0x04, | ||
2983 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
2984 | 0x00, 0x00, 0x0c, 0x00, 0x03, 0x00, 0x70, 0x00, | ||
2985 | 0x0e, 0x00, 0x0a, 0x00, 0x0c, 0x00, 0x03, 0x00, | ||
2986 | 0x70, 0x00, 0x0e, 0x00, 0x0a), | ||
2987 | PHYREGS(0x03d1, 0x03cd, 0x03c9, 0x0431, 0x0436, 0x043a), | ||
2988 | }, | ||
2989 | { .freq = 2437, | ||
2990 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x85, 0x08, 0x08, 0x04, | ||
2991 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
2992 | 0x00, 0x00, 0x0b, 0x00, 0x03, 0x00, 0x70, 0x00, | ||
2993 | 0x0e, 0x00, 0x0a, 0x00, 0x0b, 0x00, 0x03, 0x00, | ||
2994 | 0x70, 0x00, 0x0e, 0x00, 0x0a), | ||
2995 | PHYREGS(0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438), | ||
2996 | }, | ||
2997 | { .freq = 2442, | ||
2998 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04, | ||
2999 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
3000 | 0x00, 0x00, 0x09, 0x00, 0x03, 0x00, 0x70, 0x00, | ||
3001 | 0x0e, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x03, 0x00, | ||
3002 | 0x70, 0x00, 0x0e, 0x00, 0x0a), | ||
3003 | PHYREGS(0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436), | ||
3004 | }, | ||
3005 | { .freq = 2447, | ||
3006 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04, | ||
3007 | 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, | ||
3008 | 0x00, 0x00, 0x08, 0x00, 0x02, 0x00, 0x70, 0x00, | ||
3009 | 0x0e, 0x00, 0x09, 0x00, 0x08, 0x00, 0x02, 0x00, | ||
3010 | 0x70, 0x00, 0x0e, 0x00, 0x09), | ||
3011 | PHYREGS(0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434), | ||
3012 | }, | ||
3013 | { .freq = 2452, | ||
3014 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04, | ||
3015 | 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, | ||
3016 | 0x00, 0x00, 0x07, 0x00, 0x02, 0x00, 0x70, 0x00, | ||
3017 | 0x0e, 0x00, 0x09, 0x00, 0x07, 0x00, 0x02, 0x00, | ||
3018 | 0x70, 0x00, 0x0e, 0x00, 0x09), | ||
3019 | PHYREGS(0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431), | ||
3020 | }, | ||
3021 | { .freq = 2457, | ||
3022 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04, | ||
3023 | 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, | ||
3024 | 0x00, 0x00, 0x06, 0x00, 0x02, 0x00, 0x70, 0x00, | ||
3025 | 0x0d, 0x00, 0x09, 0x00, 0x06, 0x00, 0x02, 0x00, | ||
3026 | 0x70, 0x00, 0x0d, 0x00, 0x09), | ||
3027 | PHYREGS(0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f), | ||
3028 | }, | ||
3029 | { .freq = 2462, | ||
3030 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04, | ||
3031 | 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, | ||
3032 | 0x00, 0x00, 0x05, 0x00, 0x02, 0x00, 0x70, 0x00, | ||
3033 | 0x0d, 0x00, 0x09, 0x00, 0x05, 0x00, 0x02, 0x00, | ||
3034 | 0x70, 0x00, 0x0d, 0x00, 0x09), | ||
3035 | PHYREGS(0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d), | ||
3036 | }, | ||
3037 | { .freq = 2467, | ||
3038 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04, | ||
3039 | 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, | ||
3040 | 0x00, 0x00, 0x04, 0x00, 0x02, 0x00, 0x70, 0x00, | ||
3041 | 0x0d, 0x00, 0x08, 0x00, 0x04, 0x00, 0x02, 0x00, | ||
3042 | 0x70, 0x00, 0x0d, 0x00, 0x08), | ||
3043 | PHYREGS(0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b), | ||
3044 | }, | ||
3045 | { .freq = 2472, | ||
3046 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, | ||
3047 | 0x16, 0x01, 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, | ||
3048 | 0x00, 0x00, 0x03, 0x00, 0x02, 0x00, 0x70, 0x00, | ||
3049 | 0x0d, 0x00, 0x08, 0x00, 0x03, 0x00, 0x02, 0x00, | ||
3050 | 0x70, 0x00, 0x0d, 0x00, 0x08), | ||
3051 | PHYREGS(0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429), | ||
3052 | }, | ||
3053 | { .freq = 2484, | ||
3054 | RADIOREGS3(0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, | ||
3055 | 0x16, 0x01, 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, | ||
3056 | 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00, | ||
3057 | 0x0d, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, | ||
3058 | 0x70, 0x00, 0x0d, 0x00, 0x08), | ||
3059 | PHYREGS(0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424), | ||
3060 | }, | ||
3061 | }; | ||
3062 | |||
3063 | static const struct b43_nphy_channeltab_entry_rev3 b43_nphy_channeltab_rev6[] = { | ||
3064 | { .freq = 4920, | ||
3065 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, | ||
3066 | 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, | ||
3067 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
3068 | 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, | ||
3069 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
3070 | PHYREGS(0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216), | ||
3071 | }, | ||
3072 | { .freq = 4930, | ||
3073 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, | ||
3074 | 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, | ||
3075 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
3076 | 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, | ||
3077 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
3078 | PHYREGS(0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215), | ||
3079 | }, | ||
3080 | { .freq = 4940, | ||
3081 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, | ||
3082 | 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, | ||
3083 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
3084 | 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, | ||
3085 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
3086 | PHYREGS(0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214), | ||
3087 | }, | ||
3088 | { .freq = 4950, | ||
3089 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, | ||
3090 | 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, | ||
3091 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
3092 | 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, | ||
3093 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
3094 | PHYREGS(0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213), | ||
3095 | }, | ||
3096 | { .freq = 4960, | ||
3097 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, | ||
3098 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
3099 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
3100 | 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, | ||
3101 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
3102 | PHYREGS(0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212), | ||
3103 | }, | ||
3104 | { .freq = 4970, | ||
3105 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, | ||
3106 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
3107 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
3108 | 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, | ||
3109 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
3110 | PHYREGS(0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211), | ||
3111 | }, | ||
3112 | { .freq = 4980, | ||
3113 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, | ||
3114 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
3115 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
3116 | 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, | ||
3117 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
3118 | PHYREGS(0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f), | ||
3119 | }, | ||
3120 | { .freq = 4990, | ||
3121 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, | ||
3122 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
3123 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
3124 | 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, | ||
3125 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
3126 | PHYREGS(0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e), | ||
3127 | }, | ||
3128 | { .freq = 5000, | ||
3129 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04, | ||
3130 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
3131 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
3132 | 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, | ||
3133 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
3134 | PHYREGS(0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d), | ||
3135 | }, | ||
3136 | { .freq = 5010, | ||
3137 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04, | ||
3138 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
3139 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
3140 | 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, | ||
3141 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
3142 | PHYREGS(0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c), | ||
3143 | }, | ||
3144 | { .freq = 5020, | ||
3145 | RADIOREGS3(0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04, | ||
3146 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
3147 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
3148 | 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, | ||
3149 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
3150 | PHYREGS(0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b), | ||
3151 | }, | ||
3152 | { .freq = 5030, | ||
3153 | RADIOREGS3(0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04, | ||
3154 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
3155 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
3156 | 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, | ||
3157 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
3158 | PHYREGS(0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a), | ||
3159 | }, | ||
3160 | { .freq = 5040, | ||
3161 | RADIOREGS3(0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x04, | ||
3162 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
3163 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
3164 | 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, | ||
3165 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
3166 | PHYREGS(0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209), | ||
3167 | }, | ||
3168 | { .freq = 5050, | ||
3169 | RADIOREGS3(0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x04, | ||
3170 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
3171 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
3172 | 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, | ||
3173 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
3174 | PHYREGS(0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208), | ||
3175 | }, | ||
3176 | { .freq = 5060, | ||
3177 | RADIOREGS3(0xe6, 0x01, 0x01, 0x01, 0xfa, 0x05, 0x05, 0x04, | ||
3178 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
3179 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
3180 | 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, | ||
3181 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
3182 | PHYREGS(0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207), | ||
3183 | }, | ||
3184 | { .freq = 5070, | ||
3185 | RADIOREGS3(0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x04, | ||
3186 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
3187 | 0xff, 0xfd, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
3188 | 0x00, 0x6f, 0x00, 0xfd, 0x00, 0x09, 0x00, 0x77, | ||
3189 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
3190 | PHYREGS(0x07f0, 0x07ec, 0x07e8, 0x0204, 0x0205, 0x0206), | ||
3191 | }, | ||
3192 | { .freq = 5080, | ||
3193 | RADIOREGS3(0xde, 0x01, 0x01, 0x01, 0xfc, 0x05, 0x05, 0x04, | ||
3194 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
3195 | 0xff, 0xfd, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
3196 | 0x00, 0x6f, 0x00, 0xfd, 0x00, 0x09, 0x00, 0x77, | ||
3197 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
3198 | PHYREGS(0x07f4, 0x07f0, 0x07ec, 0x0203, 0x0204, 0x0205), | ||
3199 | }, | ||
3200 | { .freq = 5090, | ||
3201 | RADIOREGS3(0xde, 0x01, 0x01, 0x01, 0xfd, 0x05, 0x05, 0x04, | ||
3202 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
3203 | 0xff, 0xfd, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
3204 | 0x00, 0x6f, 0x00, 0xfd, 0x00, 0x09, 0x00, 0x77, | ||
3205 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
3206 | PHYREGS(0x07f8, 0x07f4, 0x07f0, 0x0202, 0x0203, 0x0204), | ||
3207 | }, | ||
3208 | { .freq = 5100, | ||
3209 | RADIOREGS3(0xd6, 0x01, 0x01, 0x01, 0xfe, 0x05, 0x05, 0x04, | ||
3210 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
3211 | 0xff, 0xfd, 0x00, 0x08, 0x00, 0x77, 0x00, 0x0f, | ||
3212 | 0x00, 0x6f, 0x00, 0xfd, 0x00, 0x08, 0x00, 0x77, | ||
3213 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
3214 | PHYREGS(0x07fc, 0x07f8, 0x07f4, 0x0201, 0x0202, 0x0203), | ||
3215 | }, | ||
3216 | { .freq = 5110, | ||
3217 | RADIOREGS3(0xd6, 0x01, 0x01, 0x01, 0xff, 0x05, 0x05, 0x04, | ||
3218 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
3219 | 0xff, 0xfc, 0x00, 0x08, 0x00, 0x77, 0x00, 0x0f, | ||
3220 | 0x00, 0x6f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x77, | ||
3221 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
3222 | PHYREGS(0x0800, 0x07fc, 0x07f8, 0x0200, 0x0201, 0x0202), | ||
3223 | }, | ||
3224 | { .freq = 5120, | ||
3225 | RADIOREGS3(0xce, 0x01, 0x01, 0x02, 0x00, 0x05, 0x05, 0x04, | ||
3226 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
3227 | 0xff, 0xfc, 0x00, 0x08, 0x00, 0x77, 0x00, 0x0f, | ||
3228 | 0x00, 0x6f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x77, | ||
3229 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
3230 | PHYREGS(0x0804, 0x0800, 0x07fc, 0x01ff, 0x0200, 0x0201), | ||
3231 | }, | ||
3232 | { .freq = 5130, | ||
3233 | RADIOREGS3(0xce, 0x01, 0x01, 0x02, 0x01, 0x05, 0x05, 0x04, | ||
3234 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
3235 | 0xff, 0xfc, 0x00, 0x08, 0x00, 0x77, 0x00, 0x0f, | ||
3236 | 0x00, 0x6f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x77, | ||
3237 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
3238 | PHYREGS(0x0808, 0x0804, 0x0800, 0x01fe, 0x01ff, 0x0200), | ||
3239 | }, | ||
3240 | { .freq = 5140, | ||
3241 | RADIOREGS3(0xc6, 0x01, 0x01, 0x02, 0x02, 0x05, 0x05, 0x04, | ||
3242 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
3243 | 0xff, 0xfb, 0x00, 0x08, 0x00, 0x77, 0x00, 0x0f, | ||
3244 | 0x00, 0x6f, 0x00, 0xfb, 0x00, 0x08, 0x00, 0x77, | ||
3245 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
3246 | PHYREGS(0x080c, 0x0808, 0x0804, 0x01fd, 0x01fe, 0x01ff), | ||
3247 | }, | ||
3248 | { .freq = 5160, | ||
3249 | RADIOREGS3(0xbe, 0x01, 0x01, 0x02, 0x04, 0x05, 0x05, 0x04, | ||
3250 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
3251 | 0xff, 0xfa, 0x00, 0x07, 0x00, 0x77, 0x00, 0x0e, | ||
3252 | 0x00, 0x6f, 0x00, 0xfa, 0x00, 0x07, 0x00, 0x77, | ||
3253 | 0x00, 0x0e, 0x00, 0x6f, 0x00), | ||
3254 | PHYREGS(0x0814, 0x0810, 0x080c, 0x01fb, 0x01fc, 0x01fd), | ||
3255 | }, | ||
3256 | { .freq = 5170, | ||
3257 | RADIOREGS3(0xbe, 0x01, 0x01, 0x02, 0x05, 0x05, 0x05, 0x04, | ||
3258 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
3259 | 0xff, 0xfa, 0x00, 0x07, 0x00, 0x77, 0x00, 0x0e, | ||
3260 | 0x00, 0x6f, 0x00, 0xfa, 0x00, 0x07, 0x00, 0x77, | ||
3261 | 0x00, 0x0e, 0x00, 0x6f, 0x00), | ||
3262 | PHYREGS(0x0818, 0x0814, 0x0810, 0x01fa, 0x01fb, 0x01fc), | ||
3263 | }, | ||
3264 | { .freq = 5180, | ||
3265 | RADIOREGS3(0xb6, 0x01, 0x01, 0x02, 0x06, 0x05, 0x05, 0x04, | ||
3266 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
3267 | 0xff, 0xf9, 0x00, 0x06, 0x00, 0x77, 0x00, 0x0e, | ||
3268 | 0x00, 0x6f, 0x00, 0xf9, 0x00, 0x06, 0x00, 0x77, | ||
3269 | 0x00, 0x0e, 0x00, 0x6f, 0x00), | ||
3270 | PHYREGS(0x081c, 0x0818, 0x0814, 0x01f9, 0x01fa, 0x01fb), | ||
3271 | }, | ||
3272 | { .freq = 5190, | ||
3273 | RADIOREGS3(0xb6, 0x01, 0x01, 0x02, 0x07, 0x05, 0x05, 0x04, | ||
3274 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
3275 | 0xff, 0xf9, 0x00, 0x06, 0x00, 0x77, 0x00, 0x0d, | ||
3276 | 0x00, 0x6f, 0x00, 0xf9, 0x00, 0x06, 0x00, 0x77, | ||
3277 | 0x00, 0x0d, 0x00, 0x6f, 0x00), | ||
3278 | PHYREGS(0x0820, 0x081c, 0x0818, 0x01f8, 0x01f9, 0x01fa), | ||
3279 | }, | ||
3280 | { .freq = 5200, | ||
3281 | RADIOREGS3(0xaf, 0x01, 0x01, 0x02, 0x08, 0x05, 0x05, 0x04, | ||
3282 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
3283 | 0xff, 0xf9, 0x00, 0x05, 0x00, 0x77, 0x00, 0x0d, | ||
3284 | 0x00, 0x6f, 0x00, 0xf9, 0x00, 0x05, 0x00, 0x77, | ||
3285 | 0x00, 0x0d, 0x00, 0x6f, 0x00), | ||
3286 | PHYREGS(0x0824, 0x0820, 0x081c, 0x01f7, 0x01f8, 0x01f9), | ||
3287 | }, | ||
3288 | { .freq = 5210, | ||
3289 | RADIOREGS3(0xaf, 0x01, 0x01, 0x02, 0x09, 0x05, 0x05, 0x04, | ||
3290 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
3291 | 0xff, 0xf9, 0x00, 0x05, 0x00, 0x77, 0x00, 0x0d, | ||
3292 | 0x00, 0x6f, 0x00, 0xf9, 0x00, 0x05, 0x00, 0x77, | ||
3293 | 0x00, 0x0d, 0x00, 0x6f, 0x00), | ||
3294 | PHYREGS(0x0828, 0x0824, 0x0820, 0x01f6, 0x01f7, 0x01f8), | ||
3295 | }, | ||
3296 | { .freq = 5220, | ||
3297 | RADIOREGS3(0xa7, 0x01, 0x01, 0x02, 0x0a, 0x05, 0x05, 0x04, | ||
3298 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8e, 0x0f, 0x00, | ||
3299 | 0xfe, 0xd8, 0x00, 0x05, 0x00, 0x77, 0x00, 0x0d, | ||
3300 | 0x00, 0x6f, 0x00, 0xd8, 0x00, 0x05, 0x00, 0x77, | ||
3301 | 0x00, 0x0d, 0x00, 0x6f, 0x00), | ||
3302 | PHYREGS(0x082c, 0x0828, 0x0824, 0x01f5, 0x01f6, 0x01f7), | ||
3303 | }, | ||
3304 | { .freq = 5230, | ||
3305 | RADIOREGS3(0xa7, 0x01, 0x01, 0x02, 0x0b, 0x05, 0x05, 0x04, | ||
3306 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8e, 0x0f, 0x00, | ||
3307 | 0xee, 0xd8, 0x00, 0x05, 0x00, 0x77, 0x00, 0x0d, | ||
3308 | 0x00, 0x6f, 0x00, 0xd8, 0x00, 0x05, 0x00, 0x77, | ||
3309 | 0x00, 0x0d, 0x00, 0x6f, 0x00), | ||
3310 | PHYREGS(0x0830, 0x082c, 0x0828, 0x01f4, 0x01f5, 0x01f6), | ||
3311 | }, | ||
3312 | { .freq = 5240, | ||
3313 | RADIOREGS3(0xa0, 0x01, 0x01, 0x02, 0x0c, 0x05, 0x05, 0x04, | ||
3314 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8e, 0x0f, 0x00, | ||
3315 | 0xee, 0xc8, 0x00, 0x05, 0x00, 0x77, 0x00, 0x0d, | ||
3316 | 0x00, 0x6f, 0x00, 0xc8, 0x00, 0x05, 0x00, 0x77, | ||
3317 | 0x00, 0x0d, 0x00, 0x6f, 0x00), | ||
3318 | PHYREGS(0x0834, 0x0830, 0x082c, 0x01f3, 0x01f4, 0x01f5), | ||
3319 | }, | ||
3320 | { .freq = 5250, | ||
3321 | RADIOREGS3(0xa0, 0x01, 0x01, 0x02, 0x0d, 0x05, 0x05, 0x04, | ||
3322 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8e, 0x0f, 0x00, | ||
3323 | 0xed, 0xc7, 0x00, 0x05, 0x00, 0x77, 0x00, 0x0d, | ||
3324 | 0x00, 0x6f, 0x00, 0xc7, 0x00, 0x05, 0x00, 0x77, | ||
3325 | 0x00, 0x0d, 0x00, 0x6f, 0x00), | ||
3326 | PHYREGS(0x0838, 0x0834, 0x0830, 0x01f2, 0x01f3, 0x01f4), | ||
3327 | }, | ||
3328 | { .freq = 5260, | ||
3329 | RADIOREGS3(0x98, 0x01, 0x01, 0x02, 0x0e, 0x05, 0x05, 0x04, | ||
3330 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8e, 0x0e, 0x00, | ||
3331 | 0xed, 0xc7, 0x00, 0x04, 0x00, 0x77, 0x00, 0x0d, | ||
3332 | 0x00, 0x6f, 0x00, 0xc7, 0x00, 0x04, 0x00, 0x77, | ||
3333 | 0x00, 0x0d, 0x00, 0x6f, 0x00), | ||
3334 | PHYREGS(0x083c, 0x0838, 0x0834, 0x01f1, 0x01f2, 0x01f3), | ||
3335 | }, | ||
3336 | { .freq = 5270, | ||
3337 | RADIOREGS3(0x98, 0x01, 0x01, 0x02, 0x0f, 0x05, 0x05, 0x04, | ||
3338 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8e, 0x0e, 0x00, | ||
3339 | 0xed, 0xc7, 0x00, 0x04, 0x00, 0x77, 0x00, 0x0c, | ||
3340 | 0x00, 0x6f, 0x00, 0xc7, 0x00, 0x04, 0x00, 0x77, | ||
3341 | 0x00, 0x0c, 0x00, 0x6f, 0x00), | ||
3342 | PHYREGS(0x0840, 0x083c, 0x0838, 0x01f0, 0x01f1, 0x01f2), | ||
3343 | }, | ||
3344 | { .freq = 5280, | ||
3345 | RADIOREGS3(0x91, 0x01, 0x01, 0x02, 0x10, 0x05, 0x05, 0x04, | ||
3346 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0e, 0x00, | ||
3347 | 0xdc, 0xb7, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0c, | ||
3348 | 0x00, 0x6f, 0x00, 0xb7, 0x00, 0x03, 0x00, 0x77, | ||
3349 | 0x00, 0x0c, 0x00, 0x6f, 0x00), | ||
3350 | PHYREGS(0x0844, 0x0840, 0x083c, 0x01f0, 0x01f0, 0x01f1), | ||
3351 | }, | ||
3352 | { .freq = 5290, | ||
3353 | RADIOREGS3(0x91, 0x01, 0x01, 0x02, 0x11, 0x05, 0x05, 0x04, | ||
3354 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0e, 0x00, | ||
3355 | 0xdc, 0xb7, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0c, | ||
3356 | 0x00, 0x6f, 0x00, 0xb7, 0x00, 0x03, 0x00, 0x77, | ||
3357 | 0x00, 0x0c, 0x00, 0x6f, 0x00), | ||
3358 | PHYREGS(0x0848, 0x0844, 0x0840, 0x01ef, 0x01f0, 0x01f0), | ||
3359 | }, | ||
3360 | { .freq = 5300, | ||
3361 | RADIOREGS3(0x8a, 0x01, 0x01, 0x02, 0x12, 0x05, 0x05, 0x04, | ||
3362 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0e, 0x00, | ||
3363 | 0xdc, 0xb7, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0c, | ||
3364 | 0x00, 0x6f, 0x00, 0xb7, 0x00, 0x03, 0x00, 0x77, | ||
3365 | 0x00, 0x0c, 0x00, 0x6f, 0x00), | ||
3366 | PHYREGS(0x084c, 0x0848, 0x0844, 0x01ee, 0x01ef, 0x01f0), | ||
3367 | }, | ||
3368 | { .freq = 5310, | ||
3369 | RADIOREGS3(0x8a, 0x01, 0x01, 0x02, 0x13, 0x05, 0x05, 0x04, | ||
3370 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0e, 0x00, | ||
3371 | 0xdc, 0xb7, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0c, | ||
3372 | 0x00, 0x6f, 0x00, 0xb7, 0x00, 0x03, 0x00, 0x77, | ||
3373 | 0x00, 0x0c, 0x00, 0x6f, 0x00), | ||
3374 | PHYREGS(0x0850, 0x084c, 0x0848, 0x01ed, 0x01ee, 0x01ef), | ||
3375 | }, | ||
3376 | { .freq = 5320, | ||
3377 | RADIOREGS3(0x83, 0x01, 0x01, 0x02, 0x14, 0x05, 0x05, 0x04, | ||
3378 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0e, 0x00, | ||
3379 | 0xdb, 0xb7, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0c, | ||
3380 | 0x00, 0x6f, 0x00, 0xb7, 0x00, 0x03, 0x00, 0x77, | ||
3381 | 0x00, 0x0c, 0x00, 0x6f, 0x00), | ||
3382 | PHYREGS(0x0854, 0x0850, 0x084c, 0x01ec, 0x01ed, 0x01ee), | ||
3383 | }, | ||
3384 | { .freq = 5330, | ||
3385 | RADIOREGS3(0x83, 0x01, 0x01, 0x02, 0x15, 0x05, 0x05, 0x04, | ||
3386 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00, | ||
3387 | 0xcb, 0xa6, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0b, | ||
3388 | 0x00, 0x6f, 0x00, 0xa6, 0x00, 0x03, 0x00, 0x77, | ||
3389 | 0x00, 0x0b, 0x00, 0x6f, 0x00), | ||
3390 | PHYREGS(0x0858, 0x0854, 0x0850, 0x01eb, 0x01ec, 0x01ed), | ||
3391 | }, | ||
3392 | { .freq = 5340, | ||
3393 | RADIOREGS3(0x7c, 0x01, 0x01, 0x02, 0x16, 0x05, 0x05, 0x04, | ||
3394 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00, | ||
3395 | 0xca, 0xa6, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0b, | ||
3396 | 0x00, 0x6f, 0x00, 0xa6, 0x00, 0x03, 0x00, 0x77, | ||
3397 | 0x00, 0x0b, 0x00, 0x6f, 0x00), | ||
3398 | PHYREGS(0x085c, 0x0858, 0x0854, 0x01ea, 0x01eb, 0x01ec), | ||
3399 | }, | ||
3400 | { .freq = 5350, | ||
3401 | RADIOREGS3(0x7c, 0x01, 0x01, 0x02, 0x17, 0x05, 0x05, 0x04, | ||
3402 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0d, 0x00, | ||
3403 | 0xca, 0xa6, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0b, | ||
3404 | 0x00, 0x6f, 0x00, 0xa6, 0x00, 0x03, 0x00, 0x77, | ||
3405 | 0x00, 0x0b, 0x00, 0x6f, 0x00), | ||
3406 | PHYREGS(0x0860, 0x085c, 0x0858, 0x01e9, 0x01ea, 0x01eb), | ||
3407 | }, | ||
3408 | { .freq = 5360, | ||
3409 | RADIOREGS3(0x75, 0x01, 0x01, 0x02, 0x18, 0x05, 0x05, 0x04, | ||
3410 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0d, 0x00, | ||
3411 | 0xc9, 0x95, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0a, | ||
3412 | 0x00, 0x6f, 0x00, 0x95, 0x00, 0x03, 0x00, 0x77, | ||
3413 | 0x00, 0x0a, 0x00, 0x6f, 0x00), | ||
3414 | PHYREGS(0x0864, 0x0860, 0x085c, 0x01e8, 0x01e9, 0x01ea), | ||
3415 | }, | ||
3416 | { .freq = 5370, | ||
3417 | RADIOREGS3(0x75, 0x01, 0x01, 0x02, 0x19, 0x05, 0x05, 0x04, | ||
3418 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0d, 0x00, | ||
3419 | 0xc9, 0x95, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0a, | ||
3420 | 0x00, 0x6f, 0x00, 0x95, 0x00, 0x03, 0x00, 0x77, | ||
3421 | 0x00, 0x0a, 0x00, 0x6f, 0x00), | ||
3422 | PHYREGS(0x0868, 0x0864, 0x0860, 0x01e7, 0x01e8, 0x01e9), | ||
3423 | }, | ||
3424 | { .freq = 5380, | ||
3425 | RADIOREGS3(0x6e, 0x01, 0x01, 0x02, 0x1a, 0x05, 0x05, 0x04, | ||
3426 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0c, 0x00, | ||
3427 | 0xb8, 0x95, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0a, | ||
3428 | 0x00, 0x6f, 0x00, 0x95, 0x00, 0x03, 0x00, 0x77, | ||
3429 | 0x00, 0x0a, 0x00, 0x6f, 0x00), | ||
3430 | PHYREGS(0x086c, 0x0868, 0x0864, 0x01e6, 0x01e7, 0x01e8), | ||
3431 | }, | ||
3432 | { .freq = 5390, | ||
3433 | RADIOREGS3(0x6e, 0x01, 0x01, 0x02, 0x1b, 0x05, 0x05, 0x04, | ||
3434 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0c, 0x00, | ||
3435 | 0xb8, 0x84, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0a, | ||
3436 | 0x00, 0x6f, 0x00, 0x84, 0x00, 0x03, 0x00, 0x77, | ||
3437 | 0x00, 0x0a, 0x00, 0x6f, 0x00), | ||
3438 | PHYREGS(0x0870, 0x086c, 0x0868, 0x01e5, 0x01e6, 0x01e7), | ||
3439 | }, | ||
3440 | { .freq = 5400, | ||
3441 | RADIOREGS3(0x67, 0x01, 0x01, 0x02, 0x1c, 0x05, 0x05, 0x04, | ||
3442 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0c, 0x00, | ||
3443 | 0xb8, 0x84, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0a, | ||
3444 | 0x00, 0x6f, 0x00, 0x84, 0x00, 0x03, 0x00, 0x77, | ||
3445 | 0x00, 0x0a, 0x00, 0x6f, 0x00), | ||
3446 | PHYREGS(0x0874, 0x0870, 0x086c, 0x01e5, 0x01e5, 0x01e6), | ||
3447 | }, | ||
3448 | { .freq = 5410, | ||
3449 | RADIOREGS3(0x67, 0x01, 0x01, 0x02, 0x1d, 0x05, 0x05, 0x04, | ||
3450 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0c, 0x00, | ||
3451 | 0xb7, 0x84, 0x00, 0x02, 0x00, 0x77, 0x00, 0x0a, | ||
3452 | 0x00, 0x6f, 0x00, 0x84, 0x00, 0x02, 0x00, 0x77, | ||
3453 | 0x00, 0x0a, 0x00, 0x6f, 0x00), | ||
3454 | PHYREGS(0x0878, 0x0874, 0x0870, 0x01e4, 0x01e5, 0x01e5), | ||
3455 | }, | ||
3456 | { .freq = 5420, | ||
3457 | RADIOREGS3(0x61, 0x01, 0x01, 0x02, 0x1e, 0x05, 0x05, 0x04, | ||
3458 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0c, 0x00, | ||
3459 | 0xa7, 0x84, 0x00, 0x02, 0x00, 0x77, 0x00, 0x0a, | ||
3460 | 0x00, 0x6f, 0x00, 0x84, 0x00, 0x02, 0x00, 0x77, | ||
3461 | 0x00, 0x0a, 0x00, 0x6f, 0x00), | ||
3462 | PHYREGS(0x087c, 0x0878, 0x0874, 0x01e3, 0x01e4, 0x01e5), | ||
3463 | }, | ||
3464 | { .freq = 5430, | ||
3465 | RADIOREGS3(0x61, 0x01, 0x01, 0x02, 0x1f, 0x05, 0x05, 0x04, | ||
3466 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0b, 0x00, | ||
3467 | 0xa6, 0x84, 0x00, 0x02, 0x00, 0x77, 0x00, 0x0a, | ||
3468 | 0x00, 0x6f, 0x00, 0x84, 0x00, 0x02, 0x00, 0x77, | ||
3469 | 0x00, 0x0a, 0x00, 0x6f, 0x00), | ||
3470 | PHYREGS(0x0880, 0x087c, 0x0878, 0x01e2, 0x01e3, 0x01e4), | ||
3471 | }, | ||
3472 | { .freq = 5440, | ||
3473 | RADIOREGS3(0x5a, 0x01, 0x01, 0x02, 0x20, 0x05, 0x05, 0x04, | ||
3474 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8b, 0x0b, 0x00, | ||
3475 | 0xa6, 0x84, 0x00, 0x02, 0x00, 0x77, 0x00, 0x09, | ||
3476 | 0x00, 0x6f, 0x00, 0x84, 0x00, 0x02, 0x00, 0x77, | ||
3477 | 0x00, 0x09, 0x00, 0x6f, 0x00), | ||
3478 | PHYREGS(0x0884, 0x0880, 0x087c, 0x01e1, 0x01e2, 0x01e3), | ||
3479 | }, | ||
3480 | { .freq = 5450, | ||
3481 | RADIOREGS3(0x5a, 0x01, 0x01, 0x02, 0x21, 0x05, 0x05, 0x04, | ||
3482 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8b, 0x0b, 0x00, | ||
3483 | 0x95, 0x84, 0x00, 0x01, 0x00, 0x77, 0x00, 0x09, | ||
3484 | 0x00, 0x6f, 0x00, 0x84, 0x00, 0x01, 0x00, 0x77, | ||
3485 | 0x00, 0x09, 0x00, 0x6f, 0x00), | ||
3486 | PHYREGS(0x0888, 0x0884, 0x0880, 0x01e0, 0x01e1, 0x01e2), | ||
3487 | }, | ||
3488 | { .freq = 5460, | ||
3489 | RADIOREGS3(0x53, 0x01, 0x01, 0x02, 0x22, 0x05, 0x05, 0x04, | ||
3490 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8b, 0x0b, 0x00, | ||
3491 | 0x95, 0x84, 0x00, 0x01, 0x00, 0x77, 0x00, 0x09, | ||
3492 | 0x00, 0x6f, 0x00, 0x84, 0x00, 0x01, 0x00, 0x77, | ||
3493 | 0x00, 0x09, 0x00, 0x6f, 0x00), | ||
3494 | PHYREGS(0x088c, 0x0888, 0x0884, 0x01df, 0x01e0, 0x01e1), | ||
3495 | }, | ||
3496 | { .freq = 5470, | ||
3497 | RADIOREGS3(0x53, 0x01, 0x01, 0x02, 0x23, 0x05, 0x05, 0x04, | ||
3498 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8b, 0x0b, 0x00, | ||
3499 | 0x94, 0x73, 0x00, 0x01, 0x00, 0x77, 0x00, 0x09, | ||
3500 | 0x00, 0x6f, 0x00, 0x73, 0x00, 0x01, 0x00, 0x77, | ||
3501 | 0x00, 0x09, 0x00, 0x6f, 0x00), | ||
3502 | PHYREGS(0x0890, 0x088c, 0x0888, 0x01de, 0x01df, 0x01e0), | ||
3503 | }, | ||
3504 | { .freq = 5480, | ||
3505 | RADIOREGS3(0x4d, 0x01, 0x01, 0x02, 0x24, 0x05, 0x05, 0x04, | ||
3506 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x0a, 0x00, | ||
3507 | 0x84, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09, | ||
3508 | 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77, | ||
3509 | 0x00, 0x09, 0x00, 0x6f, 0x00), | ||
3510 | PHYREGS(0x0894, 0x0890, 0x088c, 0x01dd, 0x01de, 0x01df), | ||
3511 | }, | ||
3512 | { .freq = 5490, | ||
3513 | RADIOREGS3(0x4d, 0x01, 0x01, 0x02, 0x25, 0x05, 0x05, 0x04, | ||
3514 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x0a, 0x00, | ||
3515 | 0x83, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09, | ||
3516 | 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77, | ||
3517 | 0x00, 0x09, 0x00, 0x6f, 0x00), | ||
3518 | PHYREGS(0x0898, 0x0894, 0x0890, 0x01dd, 0x01dd, 0x01de), | ||
3519 | }, | ||
3520 | { .freq = 5500, | ||
3521 | RADIOREGS3(0x47, 0x01, 0x01, 0x02, 0x26, 0x05, 0x05, 0x04, | ||
3522 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x0a, 0x00, | ||
3523 | 0x82, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09, | ||
3524 | 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77, | ||
3525 | 0x00, 0x09, 0x00, 0x6f, 0x00), | ||
3526 | PHYREGS(0x089c, 0x0898, 0x0894, 0x01dc, 0x01dd, 0x01dd), | ||
3527 | }, | ||
3528 | { .freq = 5510, | ||
3529 | RADIOREGS3(0x47, 0x01, 0x01, 0x02, 0x27, 0x05, 0x05, 0x04, | ||
3530 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x0a, 0x00, | ||
3531 | 0x82, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09, | ||
3532 | 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77, | ||
3533 | 0x00, 0x09, 0x00, 0x6f, 0x00), | ||
3534 | PHYREGS(0x08a0, 0x089c, 0x0898, 0x01db, 0x01dc, 0x01dd), | ||
3535 | }, | ||
3536 | { .freq = 5520, | ||
3537 | RADIOREGS3(0x40, 0x01, 0x01, 0x02, 0x28, 0x05, 0x05, 0x04, | ||
3538 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x0a, 0x00, | ||
3539 | 0x72, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09, | ||
3540 | 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77, | ||
3541 | 0x00, 0x09, 0x00, 0x6f, 0x00), | ||
3542 | PHYREGS(0x08a4, 0x08a0, 0x089c, 0x01da, 0x01db, 0x01dc), | ||
3543 | }, | ||
3544 | { .freq = 5530, | ||
3545 | RADIOREGS3(0x40, 0x01, 0x01, 0x02, 0x29, 0x05, 0x05, 0x04, | ||
3546 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x09, 0x00, | ||
3547 | 0x72, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09, | ||
3548 | 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77, | ||
3549 | 0x00, 0x09, 0x00, 0x6f, 0x00), | ||
3550 | PHYREGS(0x08a8, 0x08a4, 0x08a0, 0x01d9, 0x01da, 0x01db), | ||
3551 | }, | ||
3552 | { .freq = 5540, | ||
3553 | RADIOREGS3(0x3a, 0x01, 0x01, 0x02, 0x2a, 0x05, 0x05, 0x04, | ||
3554 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x09, 0x00, | ||
3555 | 0x71, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09, | ||
3556 | 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77, | ||
3557 | 0x00, 0x09, 0x00, 0x6f, 0x00), | ||
3558 | PHYREGS(0x08ac, 0x08a8, 0x08a4, 0x01d8, 0x01d9, 0x01da), | ||
3559 | }, | ||
3560 | { .freq = 5550, | ||
3561 | RADIOREGS3(0x3a, 0x01, 0x01, 0x02, 0x2b, 0x05, 0x05, 0x04, | ||
3562 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x89, 0x09, 0x00, | ||
3563 | 0x61, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09, | ||
3564 | 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77, | ||
3565 | 0x00, 0x09, 0x00, 0x6f, 0x00), | ||
3566 | PHYREGS(0x08b0, 0x08ac, 0x08a8, 0x01d7, 0x01d8, 0x01d9), | ||
3567 | }, | ||
3568 | { .freq = 5560, | ||
3569 | RADIOREGS3(0x34, 0x01, 0x01, 0x02, 0x2c, 0x05, 0x05, 0x04, | ||
3570 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x89, 0x09, 0x00, | ||
3571 | 0x61, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09, | ||
3572 | 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77, | ||
3573 | 0x00, 0x09, 0x00, 0x6f, 0x00), | ||
3574 | PHYREGS(0x08b4, 0x08b0, 0x08ac, 0x01d7, 0x01d7, 0x01d8), | ||
3575 | }, | ||
3576 | { .freq = 5570, | ||
3577 | RADIOREGS3(0x34, 0x01, 0x01, 0x02, 0x2d, 0x05, 0x05, 0x04, | ||
3578 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x89, 0x09, 0x00, | ||
3579 | 0x61, 0x62, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09, | ||
3580 | 0x00, 0x6f, 0x00, 0x62, 0x00, 0x00, 0x00, 0x77, | ||
3581 | 0x00, 0x09, 0x00, 0x6f, 0x00), | ||
3582 | PHYREGS(0x08b8, 0x08b4, 0x08b0, 0x01d6, 0x01d7, 0x01d7), | ||
3583 | }, | ||
3584 | { .freq = 5580, | ||
3585 | RADIOREGS3(0x2e, 0x01, 0x01, 0x02, 0x2e, 0x05, 0x05, 0x04, | ||
3586 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x89, 0x08, 0x00, | ||
3587 | 0x60, 0x62, 0x00, 0x00, 0x00, 0x77, 0x00, 0x08, | ||
3588 | 0x00, 0x6f, 0x00, 0x62, 0x00, 0x00, 0x00, 0x77, | ||
3589 | 0x00, 0x08, 0x00, 0x6f, 0x00), | ||
3590 | PHYREGS(0x08bc, 0x08b8, 0x08b4, 0x01d5, 0x01d6, 0x01d7), | ||
3591 | }, | ||
3592 | { .freq = 5590, | ||
3593 | RADIOREGS3(0x2e, 0x01, 0x01, 0x02, 0x2f, 0x05, 0x05, 0x04, | ||
3594 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x89, 0x08, 0x00, | ||
3595 | 0x50, 0x61, 0x00, 0x00, 0x00, 0x77, 0x00, 0x08, | ||
3596 | 0x00, 0x6f, 0x00, 0x61, 0x00, 0x00, 0x00, 0x77, | ||
3597 | 0x00, 0x08, 0x00, 0x6f, 0x00), | ||
3598 | PHYREGS(0x08c0, 0x08bc, 0x08b8, 0x01d4, 0x01d5, 0x01d6), | ||
3599 | }, | ||
3600 | { .freq = 5600, | ||
3601 | RADIOREGS3(0x28, 0x01, 0x01, 0x02, 0x30, 0x05, 0x05, 0x04, | ||
3602 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x89, 0x08, 0x00, | ||
3603 | 0x50, 0x51, 0x00, 0x00, 0x00, 0x77, 0x00, 0x08, | ||
3604 | 0x00, 0x6f, 0x00, 0x51, 0x00, 0x00, 0x00, 0x77, | ||
3605 | 0x00, 0x08, 0x00, 0x6f, 0x00), | ||
3606 | PHYREGS(0x08c4, 0x08c0, 0x08bc, 0x01d3, 0x01d4, 0x01d5), | ||
3607 | }, | ||
3608 | { .freq = 5610, | ||
3609 | RADIOREGS3(0x28, 0x01, 0x01, 0x02, 0x31, 0x05, 0x05, 0x04, | ||
3610 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x89, 0x08, 0x00, | ||
3611 | 0x50, 0x51, 0x00, 0x00, 0x00, 0x77, 0x00, 0x08, | ||
3612 | 0x00, 0x6f, 0x00, 0x51, 0x00, 0x00, 0x00, 0x77, | ||
3613 | 0x00, 0x08, 0x00, 0x6f, 0x00), | ||
3614 | PHYREGS(0x08c8, 0x08c4, 0x08c0, 0x01d2, 0x01d3, 0x01d4), | ||
3615 | }, | ||
3616 | { .freq = 5620, | ||
3617 | RADIOREGS3(0x21, 0x01, 0x01, 0x02, 0x32, 0x05, 0x05, 0x04, | ||
3618 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x89, 0x08, 0x00, | ||
3619 | 0x50, 0x50, 0x00, 0x00, 0x00, 0x77, 0x00, 0x07, | ||
3620 | 0x00, 0x6f, 0x00, 0x50, 0x00, 0x00, 0x00, 0x77, | ||
3621 | 0x00, 0x07, 0x00, 0x6f, 0x00), | ||
3622 | PHYREGS(0x08cc, 0x08c8, 0x08c4, 0x01d2, 0x01d2, 0x01d3), | ||
3623 | }, | ||
3624 | { .freq = 5630, | ||
3625 | RADIOREGS3(0x21, 0x01, 0x01, 0x02, 0x33, 0x05, 0x05, 0x04, | ||
3626 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x88, 0x07, 0x00, | ||
3627 | 0x50, 0x50, 0x00, 0x00, 0x00, 0x77, 0x00, 0x07, | ||
3628 | 0x00, 0x6f, 0x00, 0x50, 0x00, 0x00, 0x00, 0x77, | ||
3629 | 0x00, 0x07, 0x00, 0x6f, 0x00), | ||
3630 | PHYREGS(0x08d0, 0x08cc, 0x08c8, 0x01d1, 0x01d2, 0x01d2), | ||
3631 | }, | ||
3632 | { .freq = 5640, | ||
3633 | RADIOREGS3(0x1c, 0x01, 0x01, 0x02, 0x34, 0x05, 0x05, 0x04, | ||
3634 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x88, 0x07, 0x00, | ||
3635 | 0x40, 0x50, 0x00, 0x00, 0x00, 0x77, 0x00, 0x07, | ||
3636 | 0x00, 0x6f, 0x00, 0x50, 0x00, 0x00, 0x00, 0x77, | ||
3637 | 0x00, 0x07, 0x00, 0x6f, 0x00), | ||
3638 | PHYREGS(0x08d4, 0x08d0, 0x08cc, 0x01d0, 0x01d1, 0x01d2), | ||
3639 | }, | ||
3640 | { .freq = 5650, | ||
3641 | RADIOREGS3(0x1c, 0x01, 0x01, 0x02, 0x35, 0x05, 0x05, 0x04, | ||
3642 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x88, 0x07, 0x00, | ||
3643 | 0x40, 0x40, 0x00, 0x00, 0x00, 0x77, 0x00, 0x07, | ||
3644 | 0x00, 0x6f, 0x00, 0x40, 0x00, 0x00, 0x00, 0x77, | ||
3645 | 0x00, 0x07, 0x00, 0x6f, 0x00), | ||
3646 | PHYREGS(0x08d8, 0x08d4, 0x08d0, 0x01cf, 0x01d0, 0x01d1), | ||
3647 | }, | ||
3648 | { .freq = 5660, | ||
3649 | RADIOREGS3(0x16, 0x01, 0x01, 0x02, 0x36, 0x05, 0x05, 0x04, | ||
3650 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x88, 0x07, 0x00, | ||
3651 | 0x40, 0x40, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06, | ||
3652 | 0x00, 0x6f, 0x00, 0x40, 0x00, 0x00, 0x00, 0x77, | ||
3653 | 0x00, 0x06, 0x00, 0x6f, 0x00), | ||
3654 | PHYREGS(0x08dc, 0x08d8, 0x08d4, 0x01ce, 0x01cf, 0x01d0), | ||
3655 | }, | ||
3656 | { .freq = 5670, | ||
3657 | RADIOREGS3(0x16, 0x01, 0x01, 0x02, 0x37, 0x05, 0x05, 0x04, | ||
3658 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x88, 0x07, 0x00, | ||
3659 | 0x40, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06, | ||
3660 | 0x00, 0x6f, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77, | ||
3661 | 0x00, 0x06, 0x00, 0x6f, 0x00), | ||
3662 | PHYREGS(0x08e0, 0x08dc, 0x08d8, 0x01ce, 0x01ce, 0x01cf), | ||
3663 | }, | ||
3664 | { .freq = 5680, | ||
3665 | RADIOREGS3(0x10, 0x01, 0x01, 0x02, 0x38, 0x05, 0x05, 0x04, | ||
3666 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00, | ||
3667 | 0x30, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06, | ||
3668 | 0x00, 0x6f, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77, | ||
3669 | 0x00, 0x06, 0x00, 0x6f, 0x00), | ||
3670 | PHYREGS(0x08e4, 0x08e0, 0x08dc, 0x01cd, 0x01ce, 0x01ce), | ||
3671 | }, | ||
3672 | { .freq = 5690, | ||
3673 | RADIOREGS3(0x10, 0x01, 0x01, 0x02, 0x39, 0x05, 0x05, 0x04, | ||
3674 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00, | ||
3675 | 0x30, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06, | ||
3676 | 0x00, 0x6f, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77, | ||
3677 | 0x00, 0x06, 0x00, 0x6f, 0x00), | ||
3678 | PHYREGS(0x08e8, 0x08e4, 0x08e0, 0x01cc, 0x01cd, 0x01ce), | ||
3679 | }, | ||
3680 | { .freq = 5700, | ||
3681 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3a, 0x05, 0x05, 0x04, | ||
3682 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00, | ||
3683 | 0x30, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06, | ||
3684 | 0x00, 0x6e, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77, | ||
3685 | 0x00, 0x06, 0x00, 0x6e, 0x00), | ||
3686 | PHYREGS(0x08ec, 0x08e8, 0x08e4, 0x01cb, 0x01cc, 0x01cd), | ||
3687 | }, | ||
3688 | { .freq = 5710, | ||
3689 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3b, 0x05, 0x05, 0x04, | ||
3690 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00, | ||
3691 | 0x30, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06, | ||
3692 | 0x00, 0x6e, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77, | ||
3693 | 0x00, 0x06, 0x00, 0x6e, 0x00), | ||
3694 | PHYREGS(0x08f0, 0x08ec, 0x08e8, 0x01ca, 0x01cb, 0x01cc), | ||
3695 | }, | ||
3696 | { .freq = 5720, | ||
3697 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3c, 0x05, 0x05, 0x04, | ||
3698 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00, | ||
3699 | 0x30, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06, | ||
3700 | 0x00, 0x6e, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77, | ||
3701 | 0x00, 0x06, 0x00, 0x6e, 0x00), | ||
3702 | PHYREGS(0x08f4, 0x08f0, 0x08ec, 0x01c9, 0x01ca, 0x01cb), | ||
3703 | }, | ||
3704 | { .freq = 5725, | ||
3705 | RADIOREGS3(0x03, 0x01, 0x02, 0x04, 0x79, 0x07, 0x07, 0x04, | ||
3706 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00, | ||
3707 | 0x30, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06, | ||
3708 | 0x00, 0x6e, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77, | ||
3709 | 0x00, 0x06, 0x00, 0x6e, 0x00), | ||
3710 | PHYREGS(0x08f6, 0x08f2, 0x08ee, 0x01c9, 0x01ca, 0x01cb), | ||
3711 | }, | ||
3712 | { .freq = 5730, | ||
3713 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3d, 0x05, 0x05, 0x04, | ||
3714 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00, | ||
3715 | 0x20, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06, | ||
3716 | 0x00, 0x6e, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77, | ||
3717 | 0x00, 0x06, 0x00, 0x6e, 0x00), | ||
3718 | PHYREGS(0x08f8, 0x08f4, 0x08f0, 0x01c9, 0x01c9, 0x01ca), | ||
3719 | }, | ||
3720 | { .freq = 5735, | ||
3721 | RADIOREGS3(0x03, 0x01, 0x02, 0x04, 0x7b, 0x07, 0x07, 0x04, | ||
3722 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00, | ||
3723 | 0x20, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06, | ||
3724 | 0x00, 0x6d, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77, | ||
3725 | 0x00, 0x06, 0x00, 0x6d, 0x00), | ||
3726 | PHYREGS(0x08fa, 0x08f6, 0x08f2, 0x01c8, 0x01c9, 0x01ca), | ||
3727 | }, | ||
3728 | { .freq = 5740, | ||
3729 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3e, 0x05, 0x05, 0x04, | ||
3730 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00, | ||
3731 | 0x20, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06, | ||
3732 | 0x00, 0x6d, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77, | ||
3733 | 0x00, 0x06, 0x00, 0x6d, 0x00), | ||
3734 | PHYREGS(0x08fc, 0x08f8, 0x08f4, 0x01c8, 0x01c9, 0x01c9), | ||
3735 | }, | ||
3736 | { .freq = 5745, | ||
3737 | RADIOREGS3(0xfe, 0x00, 0x02, 0x04, 0x7d, 0x07, 0x07, 0x04, | ||
3738 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00, | ||
3739 | 0x20, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06, | ||
3740 | 0x00, 0x6d, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77, | ||
3741 | 0x00, 0x06, 0x00, 0x6d, 0x00), | ||
3742 | PHYREGS(0x08fe, 0x08fa, 0x08f6, 0x01c8, 0x01c8, 0x01c9), | ||
3743 | }, | ||
3744 | { .freq = 5750, | ||
3745 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3f, 0x05, 0x05, 0x04, | ||
3746 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00, | ||
3747 | 0x20, 0x20, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
3748 | 0x00, 0x6d, 0x00, 0x20, 0x00, 0x00, 0x00, 0x77, | ||
3749 | 0x00, 0x05, 0x00, 0x6d, 0x00), | ||
3750 | PHYREGS(0x0900, 0x08fc, 0x08f8, 0x01c7, 0x01c8, 0x01c9), | ||
3751 | }, | ||
3752 | { .freq = 5755, | ||
3753 | RADIOREGS3(0xfe, 0x00, 0x02, 0x04, 0x7f, 0x07, 0x07, 0x04, | ||
3754 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00, | ||
3755 | 0x10, 0x20, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
3756 | 0x00, 0x6c, 0x00, 0x20, 0x00, 0x00, 0x00, 0x77, | ||
3757 | 0x00, 0x05, 0x00, 0x6c, 0x00), | ||
3758 | PHYREGS(0x0902, 0x08fe, 0x08fa, 0x01c7, 0x01c8, 0x01c8), | ||
3759 | }, | ||
3760 | { .freq = 5760, | ||
3761 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x40, 0x05, 0x05, 0x04, | ||
3762 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x86, 0x05, 0x00, | ||
3763 | 0x10, 0x20, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
3764 | 0x00, 0x6c, 0x00, 0x20, 0x00, 0x00, 0x00, 0x77, | ||
3765 | 0x00, 0x05, 0x00, 0x6c, 0x00), | ||
3766 | PHYREGS(0x0904, 0x0900, 0x08fc, 0x01c6, 0x01c7, 0x01c8), | ||
3767 | }, | ||
3768 | { .freq = 5765, | ||
3769 | RADIOREGS3(0xf8, 0x00, 0x02, 0x04, 0x81, 0x07, 0x07, 0x04, | ||
3770 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x86, 0x05, 0x00, | ||
3771 | 0x10, 0x10, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
3772 | 0x00, 0x6c, 0x00, 0x10, 0x00, 0x00, 0x00, 0x77, | ||
3773 | 0x00, 0x05, 0x00, 0x6c, 0x00), | ||
3774 | PHYREGS(0x0906, 0x0902, 0x08fe, 0x01c6, 0x01c7, 0x01c8), | ||
3775 | }, | ||
3776 | { .freq = 5770, | ||
3777 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x41, 0x05, 0x05, 0x04, | ||
3778 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x86, 0x04, 0x00, | ||
3779 | 0x10, 0x10, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
3780 | 0x00, 0x6b, 0x00, 0x10, 0x00, 0x00, 0x00, 0x77, | ||
3781 | 0x00, 0x05, 0x00, 0x6b, 0x00), | ||
3782 | PHYREGS(0x0908, 0x0904, 0x0900, 0x01c6, 0x01c6, 0x01c7), | ||
3783 | }, | ||
3784 | { .freq = 5775, | ||
3785 | RADIOREGS3(0xf8, 0x00, 0x02, 0x04, 0x83, 0x07, 0x07, 0x04, | ||
3786 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x86, 0x04, 0x00, | ||
3787 | 0x10, 0x10, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
3788 | 0x00, 0x6b, 0x00, 0x10, 0x00, 0x00, 0x00, 0x77, | ||
3789 | 0x00, 0x05, 0x00, 0x6b, 0x00), | ||
3790 | PHYREGS(0x090a, 0x0906, 0x0902, 0x01c5, 0x01c6, 0x01c7), | ||
3791 | }, | ||
3792 | { .freq = 5780, | ||
3793 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x42, 0x05, 0x05, 0x04, | ||
3794 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x86, 0x04, 0x00, | ||
3795 | 0x10, 0x10, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
3796 | 0x00, 0x6b, 0x00, 0x10, 0x00, 0x00, 0x00, 0x77, | ||
3797 | 0x00, 0x05, 0x00, 0x6b, 0x00), | ||
3798 | PHYREGS(0x090c, 0x0908, 0x0904, 0x01c5, 0x01c6, 0x01c6), | ||
3799 | }, | ||
3800 | { .freq = 5785, | ||
3801 | RADIOREGS3(0xf2, 0x00, 0x02, 0x04, 0x85, 0x07, 0x07, 0x04, | ||
3802 | 0x10, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
3803 | 0x00, 0x10, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
3804 | 0x00, 0x6b, 0x00, 0x10, 0x00, 0x00, 0x00, 0x77, | ||
3805 | 0x00, 0x05, 0x00, 0x6b, 0x00), | ||
3806 | PHYREGS(0x090e, 0x090a, 0x0906, 0x01c4, 0x01c5, 0x01c6), | ||
3807 | }, | ||
3808 | { .freq = 5790, | ||
3809 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x43, 0x05, 0x05, 0x04, | ||
3810 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
3811 | 0x00, 0x10, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
3812 | 0x00, 0x6b, 0x00, 0x10, 0x00, 0x00, 0x00, 0x77, | ||
3813 | 0x00, 0x05, 0x00, 0x6b, 0x00), | ||
3814 | PHYREGS(0x0910, 0x090c, 0x0908, 0x01c4, 0x01c5, 0x01c6), | ||
3815 | }, | ||
3816 | { .freq = 5795, | ||
3817 | RADIOREGS3(0xf2, 0x00, 0x02, 0x04, 0x87, 0x07, 0x07, 0x04, | ||
3818 | 0x10, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
3819 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
3820 | 0x00, 0x6b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
3821 | 0x00, 0x05, 0x00, 0x6b, 0x00), | ||
3822 | PHYREGS(0x0912, 0x090e, 0x090a, 0x01c4, 0x01c4, 0x01c5), | ||
3823 | }, | ||
3824 | { .freq = 5800, | ||
3825 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x44, 0x05, 0x05, 0x04, | ||
3826 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
3827 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
3828 | 0x00, 0x6b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
3829 | 0x00, 0x05, 0x00, 0x6b, 0x00), | ||
3830 | PHYREGS(0x0914, 0x0910, 0x090c, 0x01c3, 0x01c4, 0x01c5), | ||
3831 | }, | ||
3832 | { .freq = 5805, | ||
3833 | RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x89, 0x07, 0x07, 0x04, | ||
3834 | 0x10, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
3835 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
3836 | 0x00, 0x6a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
3837 | 0x00, 0x05, 0x00, 0x6a, 0x00), | ||
3838 | PHYREGS(0x0916, 0x0912, 0x090e, 0x01c3, 0x01c4, 0x01c4), | ||
3839 | }, | ||
3840 | { .freq = 5810, | ||
3841 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x45, 0x05, 0x05, 0x04, | ||
3842 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
3843 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
3844 | 0x00, 0x6a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
3845 | 0x00, 0x05, 0x00, 0x6a, 0x00), | ||
3846 | PHYREGS(0x0918, 0x0914, 0x0910, 0x01c2, 0x01c3, 0x01c4), | ||
3847 | }, | ||
3848 | { .freq = 5815, | ||
3849 | RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x8b, 0x07, 0x07, 0x04, | ||
3850 | 0x10, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
3851 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
3852 | 0x00, 0x6a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
3853 | 0x00, 0x05, 0x00, 0x6a, 0x00), | ||
3854 | PHYREGS(0x091a, 0x0916, 0x0912, 0x01c2, 0x01c3, 0x01c4), | ||
3855 | }, | ||
3856 | { .freq = 5820, | ||
3857 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x46, 0x05, 0x05, 0x04, | ||
3858 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
3859 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
3860 | 0x00, 0x6a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
3861 | 0x00, 0x05, 0x00, 0x6a, 0x00), | ||
3862 | PHYREGS(0x091c, 0x0918, 0x0914, 0x01c2, 0x01c2, 0x01c3), | ||
3863 | }, | ||
3864 | { .freq = 5825, | ||
3865 | RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x8d, 0x07, 0x07, 0x04, | ||
3866 | 0x10, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
3867 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
3868 | 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
3869 | 0x00, 0x05, 0x00, 0x69, 0x00), | ||
3870 | PHYREGS(0x091e, 0x091a, 0x0916, 0x01c1, 0x01c2, 0x01c3), | ||
3871 | }, | ||
3872 | { .freq = 5830, | ||
3873 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x47, 0x05, 0x05, 0x04, | ||
3874 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
3875 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
3876 | 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
3877 | 0x00, 0x05, 0x00, 0x69, 0x00), | ||
3878 | PHYREGS(0x0920, 0x091c, 0x0918, 0x01c1, 0x01c2, 0x01c2), | ||
3879 | }, | ||
3880 | { .freq = 5840, | ||
3881 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x48, 0x05, 0x05, 0x04, | ||
3882 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
3883 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, | ||
3884 | 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
3885 | 0x00, 0x04, 0x00, 0x69, 0x00), | ||
3886 | PHYREGS(0x0924, 0x0920, 0x091c, 0x01c0, 0x01c1, 0x01c2), | ||
3887 | }, | ||
3888 | { .freq = 5850, | ||
3889 | RADIOREGS3(0xe0, 0x00, 0x01, 0x02, 0x49, 0x05, 0x05, 0x04, | ||
3890 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, | ||
3891 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, | ||
3892 | 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
3893 | 0x00, 0x04, 0x00, 0x69, 0x00), | ||
3894 | PHYREGS(0x0928, 0x0924, 0x0920, 0x01bf, 0x01c0, 0x01c1), | ||
3895 | }, | ||
3896 | { .freq = 5860, | ||
3897 | RADIOREGS3(0xde, 0x00, 0x01, 0x02, 0x4a, 0x05, 0x05, 0x04, | ||
3898 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, | ||
3899 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, | ||
3900 | 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
3901 | 0x00, 0x04, 0x00, 0x69, 0x00), | ||
3902 | PHYREGS(0x092c, 0x0928, 0x0924, 0x01bf, 0x01bf, 0x01c0), | ||
3903 | }, | ||
3904 | { .freq = 5870, | ||
3905 | RADIOREGS3(0xdb, 0x00, 0x01, 0x02, 0x4b, 0x05, 0x05, 0x04, | ||
3906 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, | ||
3907 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, | ||
3908 | 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
3909 | 0x00, 0x04, 0x00, 0x68, 0x00), | ||
3910 | PHYREGS(0x0930, 0x092c, 0x0928, 0x01be, 0x01bf, 0x01bf), | ||
3911 | }, | ||
3912 | { .freq = 5880, | ||
3913 | RADIOREGS3(0xd8, 0x00, 0x01, 0x02, 0x4c, 0x05, 0x05, 0x04, | ||
3914 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, | ||
3915 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, | ||
3916 | 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
3917 | 0x00, 0x04, 0x00, 0x68, 0x00), | ||
3918 | PHYREGS(0x0934, 0x0930, 0x092c, 0x01bd, 0x01be, 0x01bf), | ||
3919 | }, | ||
3920 | { .freq = 5890, | ||
3921 | RADIOREGS3(0xd6, 0x00, 0x01, 0x02, 0x4d, 0x05, 0x05, 0x04, | ||
3922 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, | ||
3923 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, | ||
3924 | 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
3925 | 0x00, 0x04, 0x00, 0x68, 0x00), | ||
3926 | PHYREGS(0x0938, 0x0934, 0x0930, 0x01bc, 0x01bd, 0x01be), | ||
3927 | }, | ||
3928 | { .freq = 5900, | ||
3929 | RADIOREGS3(0xd3, 0x00, 0x01, 0x02, 0x4e, 0x05, 0x05, 0x04, | ||
3930 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, | ||
3931 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, | ||
3932 | 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
3933 | 0x00, 0x04, 0x00, 0x68, 0x00), | ||
3934 | PHYREGS(0x093c, 0x0938, 0x0934, 0x01bc, 0x01bc, 0x01bd), | ||
3935 | }, | ||
3936 | { .freq = 5910, | ||
3937 | RADIOREGS3(0xd6, 0x00, 0x01, 0x02, 0x4f, 0x05, 0x05, 0x04, | ||
3938 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, | ||
3939 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, | ||
3940 | 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
3941 | 0x00, 0x04, 0x00, 0x68, 0x00), | ||
3942 | PHYREGS(0x0940, 0x093c, 0x0938, 0x01bb, 0x01bc, 0x01bc), | ||
3943 | }, | ||
3944 | { .freq = 2412, | ||
3945 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x6c, 0x08, 0x08, 0x04, | ||
3946 | 0x16, 0x01, 0x04, 0x04, 0x04, 0x8f, 0x30, 0x00, | ||
3947 | 0x00, 0x00, 0x78, 0x00, 0x03, 0x00, 0x70, 0x00, | ||
3948 | 0x0b, 0x00, 0x0a, 0x00, 0x78, 0x00, 0x03, 0x00, | ||
3949 | 0x70, 0x00, 0x0b, 0x00, 0x0a), | ||
3950 | PHYREGS(0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443), | ||
3951 | }, | ||
3952 | { .freq = 2417, | ||
3953 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x71, 0x08, 0x08, 0x04, | ||
3954 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
3955 | 0x00, 0x00, 0x78, 0x00, 0x03, 0x00, 0x70, 0x00, | ||
3956 | 0x0b, 0x00, 0x0a, 0x00, 0x78, 0x00, 0x03, 0x00, | ||
3957 | 0x70, 0x00, 0x0b, 0x00, 0x0a), | ||
3958 | PHYREGS(0x03cb, 0x03c7, 0x03c3, 0x0438, 0x043d, 0x0441), | ||
3959 | }, | ||
3960 | { .freq = 2422, | ||
3961 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x76, 0x08, 0x08, 0x04, | ||
3962 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
3963 | 0x00, 0x00, 0x67, 0x00, 0x03, 0x00, 0x70, 0x00, | ||
3964 | 0x0b, 0x00, 0x0a, 0x00, 0x67, 0x00, 0x03, 0x00, | ||
3965 | 0x70, 0x00, 0x0b, 0x00, 0x0a), | ||
3966 | PHYREGS(0x03cd, 0x03c9, 0x03c5, 0x0436, 0x043a, 0x043f), | ||
3967 | }, | ||
3968 | { .freq = 2427, | ||
3969 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x7b, 0x08, 0x08, 0x04, | ||
3970 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
3971 | 0x00, 0x00, 0x57, 0x00, 0x03, 0x00, 0x70, 0x00, | ||
3972 | 0x0a, 0x00, 0x0a, 0x00, 0x57, 0x00, 0x03, 0x00, | ||
3973 | 0x70, 0x00, 0x0a, 0x00, 0x0a), | ||
3974 | PHYREGS(0x03cf, 0x03cb, 0x03c7, 0x0434, 0x0438, 0x043d), | ||
3975 | }, | ||
3976 | { .freq = 2432, | ||
3977 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x80, 0x08, 0x08, 0x04, | ||
3978 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
3979 | 0x00, 0x00, 0x56, 0x00, 0x03, 0x00, 0x70, 0x00, | ||
3980 | 0x0a, 0x00, 0x0a, 0x00, 0x56, 0x00, 0x03, 0x00, | ||
3981 | 0x70, 0x00, 0x0a, 0x00, 0x0a), | ||
3982 | PHYREGS(0x03d1, 0x03cd, 0x03c9, 0x0431, 0x0436, 0x043a), | ||
3983 | }, | ||
3984 | { .freq = 2437, | ||
3985 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x85, 0x08, 0x08, 0x04, | ||
3986 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
3987 | 0x00, 0x00, 0x46, 0x00, 0x03, 0x00, 0x70, 0x00, | ||
3988 | 0x0a, 0x00, 0x0a, 0x00, 0x46, 0x00, 0x03, 0x00, | ||
3989 | 0x70, 0x00, 0x0a, 0x00, 0x0a), | ||
3990 | PHYREGS(0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438), | ||
3991 | }, | ||
3992 | { .freq = 2442, | ||
3993 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04, | ||
3994 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
3995 | 0x00, 0x00, 0x45, 0x00, 0x02, 0x00, 0x70, 0x00, | ||
3996 | 0x0a, 0x00, 0x0a, 0x00, 0x45, 0x00, 0x02, 0x00, | ||
3997 | 0x70, 0x00, 0x0a, 0x00, 0x0a), | ||
3998 | PHYREGS(0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436), | ||
3999 | }, | ||
4000 | { .freq = 2447, | ||
4001 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04, | ||
4002 | 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, | ||
4003 | 0x00, 0x00, 0x34, 0x00, 0x02, 0x00, 0x70, 0x00, | ||
4004 | 0x0a, 0x00, 0x09, 0x00, 0x34, 0x00, 0x02, 0x00, | ||
4005 | 0x70, 0x00, 0x0a, 0x00, 0x09), | ||
4006 | PHYREGS(0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434), | ||
4007 | }, | ||
4008 | { .freq = 2452, | ||
4009 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04, | ||
4010 | 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, | ||
4011 | 0x00, 0x00, 0x23, 0x00, 0x02, 0x00, 0x70, 0x00, | ||
4012 | 0x0a, 0x00, 0x09, 0x00, 0x23, 0x00, 0x02, 0x00, | ||
4013 | 0x70, 0x00, 0x0a, 0x00, 0x09), | ||
4014 | PHYREGS(0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431), | ||
4015 | }, | ||
4016 | { .freq = 2457, | ||
4017 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04, | ||
4018 | 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, | ||
4019 | 0x00, 0x00, 0x12, 0x00, 0x02, 0x00, 0x70, 0x00, | ||
4020 | 0x0a, 0x00, 0x09, 0x00, 0x12, 0x00, 0x02, 0x00, | ||
4021 | 0x70, 0x00, 0x0a, 0x00, 0x09), | ||
4022 | PHYREGS(0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f), | ||
4023 | }, | ||
4024 | { .freq = 2462, | ||
4025 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04, | ||
4026 | 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, | ||
4027 | 0x00, 0x00, 0x02, 0x00, 0x02, 0x00, 0x70, 0x00, | ||
4028 | 0x09, 0x00, 0x09, 0x00, 0x02, 0x00, 0x02, 0x00, | ||
4029 | 0x70, 0x00, 0x09, 0x00, 0x09), | ||
4030 | PHYREGS(0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d), | ||
4031 | }, | ||
4032 | { .freq = 2467, | ||
4033 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04, | ||
4034 | 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, | ||
4035 | 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 0x70, 0x00, | ||
4036 | 0x09, 0x00, 0x09, 0x00, 0x01, 0x00, 0x02, 0x00, | ||
4037 | 0x70, 0x00, 0x09, 0x00, 0x09), | ||
4038 | PHYREGS(0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b), | ||
4039 | }, | ||
4040 | { .freq = 2472, | ||
4041 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, | ||
4042 | 0x16, 0x01, 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, | ||
4043 | 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 0x70, 0x00, | ||
4044 | 0x09, 0x00, 0x09, 0x00, 0x01, 0x00, 0x02, 0x00, | ||
4045 | 0x70, 0x00, 0x09, 0x00, 0x09), | ||
4046 | PHYREGS(0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429), | ||
4047 | }, | ||
4048 | { .freq = 2484, | ||
4049 | RADIOREGS3(0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, | ||
4050 | 0x16, 0x01, 0x07, 0x07, 0x07, 0x8f, 0x20, 0x00, | ||
4051 | 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00, | ||
4052 | 0x09, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x00, | ||
4053 | 0x70, 0x00, 0x09, 0x00, 0x09), | ||
4054 | PHYREGS(0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424), | ||
4055 | }, | ||
4056 | }; | ||
4057 | |||
4058 | static const struct b43_nphy_channeltab_entry_rev3 b43_nphy_channeltab_rev7_9[] = { | ||
4059 | { .freq = 4920, | ||
4060 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, | ||
4061 | 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, | ||
4062 | 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0f, | ||
4063 | 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, | ||
4064 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
4065 | PHYREGS(0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216), | ||
4066 | }, | ||
4067 | { .freq = 4930, | ||
4068 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, | ||
4069 | 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, | ||
4070 | 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, | ||
4071 | 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, | ||
4072 | 0x00, 0x0e, 0x00, 0x6f, 0x00), | ||
4073 | PHYREGS(0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215), | ||
4074 | }, | ||
4075 | { .freq = 4940, | ||
4076 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, | ||
4077 | 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, | ||
4078 | 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, | ||
4079 | 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, | ||
4080 | 0x00, 0x0e, 0x00, 0x6f, 0x00), | ||
4081 | PHYREGS(0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214), | ||
4082 | }, | ||
4083 | { .freq = 4950, | ||
4084 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, | ||
4085 | 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, | ||
4086 | 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, | ||
4087 | 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, | ||
4088 | 0x00, 0x0e, 0x00, 0x6f, 0x00), | ||
4089 | PHYREGS(0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213), | ||
4090 | }, | ||
4091 | { .freq = 4960, | ||
4092 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, | ||
4093 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
4094 | 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0e, | ||
4095 | 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, | ||
4096 | 0x00, 0x0e, 0x00, 0x6f, 0x00), | ||
4097 | PHYREGS(0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212), | ||
4098 | }, | ||
4099 | { .freq = 4970, | ||
4100 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, | ||
4101 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
4102 | 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, | ||
4103 | 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, | ||
4104 | 0x00, 0x0d, 0x00, 0x6f, 0x00), | ||
4105 | PHYREGS(0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211), | ||
4106 | }, | ||
4107 | { .freq = 4980, | ||
4108 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, | ||
4109 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
4110 | 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, | ||
4111 | 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, | ||
4112 | 0x00, 0x0d, 0x00, 0x6f, 0x00), | ||
4113 | PHYREGS(0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f), | ||
4114 | }, | ||
4115 | { .freq = 4990, | ||
4116 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, | ||
4117 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
4118 | 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, | ||
4119 | 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, | ||
4120 | 0x00, 0x0d, 0x00, 0x6f, 0x00), | ||
4121 | PHYREGS(0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e), | ||
4122 | }, | ||
4123 | { .freq = 5000, | ||
4124 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04, | ||
4125 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
4126 | 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, | ||
4127 | 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, | ||
4128 | 0x00, 0x0d, 0x00, 0x6f, 0x00), | ||
4129 | PHYREGS(0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d), | ||
4130 | }, | ||
4131 | { .freq = 5010, | ||
4132 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04, | ||
4133 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
4134 | 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, | ||
4135 | 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, | ||
4136 | 0x00, 0x0d, 0x00, 0x6f, 0x00), | ||
4137 | PHYREGS(0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c), | ||
4138 | }, | ||
4139 | { .freq = 5020, | ||
4140 | RADIOREGS3(0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04, | ||
4141 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
4142 | 0xff, 0xff, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0d, | ||
4143 | 0x00, 0x9f, 0x00, 0xff, 0x00, 0x09, 0x00, 0x70, | ||
4144 | 0x00, 0x0d, 0x00, 0x6f, 0x00), | ||
4145 | PHYREGS(0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b), | ||
4146 | }, | ||
4147 | { .freq = 5030, | ||
4148 | RADIOREGS3(0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04, | ||
4149 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
4150 | 0xff, 0xff, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, | ||
4151 | 0x00, 0x9f, 0x00, 0xff, 0x00, 0x09, 0x00, 0x70, | ||
4152 | 0x00, 0x0c, 0x00, 0x6f, 0x00), | ||
4153 | PHYREGS(0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a), | ||
4154 | }, | ||
4155 | { .freq = 5040, | ||
4156 | RADIOREGS3(0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x04, | ||
4157 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
4158 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, | ||
4159 | 0x00, 0x9f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x70, | ||
4160 | 0x00, 0x0c, 0x00, 0x6f, 0x00), | ||
4161 | PHYREGS(0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209), | ||
4162 | }, | ||
4163 | { .freq = 5050, | ||
4164 | RADIOREGS3(0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x04, | ||
4165 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
4166 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, | ||
4167 | 0x00, 0x9f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x70, | ||
4168 | 0x00, 0x0c, 0x00, 0x6f, 0x00), | ||
4169 | PHYREGS(0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208), | ||
4170 | }, | ||
4171 | { .freq = 5060, | ||
4172 | RADIOREGS3(0xe6, 0x01, 0x01, 0x01, 0xfa, 0x05, 0x05, 0x04, | ||
4173 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
4174 | 0xff, 0xfd, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, | ||
4175 | 0x00, 0x9f, 0x00, 0xfd, 0x00, 0x09, 0x00, 0x70, | ||
4176 | 0x00, 0x0c, 0x00, 0x6f, 0x00), | ||
4177 | PHYREGS(0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207), | ||
4178 | }, | ||
4179 | { .freq = 5070, | ||
4180 | RADIOREGS3(0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x04, | ||
4181 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
4182 | 0xff, 0xfd, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, | ||
4183 | 0x00, 0x9f, 0x00, 0xfd, 0x00, 0x08, 0x00, 0x70, | ||
4184 | 0x00, 0x0b, 0x00, 0x6f, 0x00), | ||
4185 | PHYREGS(0x07f0, 0x07ec, 0x07e8, 0x0204, 0x0205, 0x0206), | ||
4186 | }, | ||
4187 | { .freq = 5080, | ||
4188 | RADIOREGS3(0xde, 0x01, 0x01, 0x01, 0xfc, 0x05, 0x05, 0x04, | ||
4189 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
4190 | 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, | ||
4191 | 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, | ||
4192 | 0x00, 0x0b, 0x00, 0x6f, 0x00), | ||
4193 | PHYREGS(0x07f4, 0x07f0, 0x07ec, 0x0203, 0x0204, 0x0205), | ||
4194 | }, | ||
4195 | { .freq = 5090, | ||
4196 | RADIOREGS3(0xde, 0x01, 0x01, 0x01, 0xfd, 0x05, 0x05, 0x04, | ||
4197 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
4198 | 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, | ||
4199 | 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, | ||
4200 | 0x00, 0x0b, 0x00, 0x6f, 0x00), | ||
4201 | PHYREGS(0x07f8, 0x07f4, 0x07f0, 0x0202, 0x0203, 0x0204), | ||
4202 | }, | ||
4203 | { .freq = 5100, | ||
4204 | RADIOREGS3(0xd6, 0x01, 0x01, 0x01, 0xfe, 0x05, 0x05, 0x04, | ||
4205 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
4206 | 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, | ||
4207 | 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, | ||
4208 | 0x00, 0x0b, 0x00, 0x6f, 0x00), | ||
4209 | PHYREGS(0x07fc, 0x07f8, 0x07f4, 0x0201, 0x0202, 0x0203), | ||
4210 | }, | ||
4211 | { .freq = 5110, | ||
4212 | RADIOREGS3(0xd6, 0x01, 0x01, 0x01, 0xff, 0x05, 0x05, 0x04, | ||
4213 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
4214 | 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, | ||
4215 | 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, | ||
4216 | 0x00, 0x0b, 0x00, 0x6f, 0x00), | ||
4217 | PHYREGS(0x0800, 0x07fc, 0x07f8, 0x0200, 0x0201, 0x0202), | ||
4218 | }, | ||
4219 | { .freq = 5120, | ||
4220 | RADIOREGS3(0xce, 0x01, 0x01, 0x02, 0x00, 0x05, 0x05, 0x04, | ||
4221 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
4222 | 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, | ||
4223 | 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, | ||
4224 | 0x00, 0x0b, 0x00, 0x6f, 0x00), | ||
4225 | PHYREGS(0x0804, 0x0800, 0x07fc, 0x01ff, 0x0200, 0x0201), | ||
4226 | }, | ||
4227 | { .freq = 5130, | ||
4228 | RADIOREGS3(0xce, 0x01, 0x01, 0x02, 0x01, 0x05, 0x05, 0x04, | ||
4229 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
4230 | 0xff, 0xfb, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0a, | ||
4231 | 0x00, 0x9f, 0x00, 0xfb, 0x00, 0x08, 0x00, 0x70, | ||
4232 | 0x00, 0x0a, 0x00, 0x6f, 0x00), | ||
4233 | PHYREGS(0x0808, 0x0804, 0x0800, 0x01fe, 0x01ff, 0x0200), | ||
4234 | }, | ||
4235 | { .freq = 5140, | ||
4236 | RADIOREGS3(0xc6, 0x01, 0x01, 0x02, 0x02, 0x05, 0x05, 0x04, | ||
4237 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
4238 | 0xff, 0xfb, 0x00, 0x07, 0x00, 0x70, 0x00, 0x0a, | ||
4239 | 0x00, 0x9f, 0x00, 0xfb, 0x00, 0x07, 0x00, 0x70, | ||
4240 | 0x00, 0x0a, 0x00, 0x6f, 0x00), | ||
4241 | PHYREGS(0x080c, 0x0808, 0x0804, 0x01fd, 0x01fe, 0x01ff), | ||
4242 | }, | ||
4243 | { .freq = 5160, | ||
4244 | RADIOREGS3(0xbe, 0x01, 0x01, 0x02, 0x04, 0x05, 0x05, 0x04, | ||
4245 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
4246 | 0xff, 0xfb, 0x00, 0x07, 0x00, 0x70, 0x00, 0x09, | ||
4247 | 0x00, 0x9e, 0x00, 0xfb, 0x00, 0x07, 0x00, 0x70, | ||
4248 | 0x00, 0x09, 0x00, 0x6e, 0x00), | ||
4249 | PHYREGS(0x0814, 0x0810, 0x080c, 0x01fb, 0x01fc, 0x01fd), | ||
4250 | }, | ||
4251 | { .freq = 5170, | ||
4252 | RADIOREGS3(0xbe, 0x01, 0x01, 0x02, 0x05, 0x05, 0x05, 0x04, | ||
4253 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
4254 | 0xff, 0xfb, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, | ||
4255 | 0x00, 0x9e, 0x00, 0xfb, 0x00, 0x06, 0x00, 0x70, | ||
4256 | 0x00, 0x09, 0x00, 0x6e, 0x00), | ||
4257 | PHYREGS(0x0818, 0x0814, 0x0810, 0x01fa, 0x01fb, 0x01fc), | ||
4258 | }, | ||
4259 | { .freq = 5180, | ||
4260 | RADIOREGS3(0xb6, 0x01, 0x01, 0x02, 0x06, 0x05, 0x05, 0x04, | ||
4261 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
4262 | 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, | ||
4263 | 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70, | ||
4264 | 0x00, 0x09, 0x00, 0x6e, 0x00), | ||
4265 | PHYREGS(0x081c, 0x0818, 0x0814, 0x01f9, 0x01fa, 0x01fb), | ||
4266 | }, | ||
4267 | { .freq = 5190, | ||
4268 | RADIOREGS3(0xb6, 0x01, 0x01, 0x02, 0x07, 0x05, 0x05, 0x04, | ||
4269 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
4270 | 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, | ||
4271 | 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70, | ||
4272 | 0x00, 0x09, 0x00, 0x6e, 0x00), | ||
4273 | PHYREGS(0x0820, 0x081c, 0x0818, 0x01f8, 0x01f9, 0x01fa), | ||
4274 | }, | ||
4275 | { .freq = 5200, | ||
4276 | RADIOREGS3(0xaf, 0x01, 0x01, 0x02, 0x08, 0x05, 0x05, 0x04, | ||
4277 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
4278 | 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, | ||
4279 | 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70, | ||
4280 | 0x00, 0x09, 0x00, 0x6e, 0x00), | ||
4281 | PHYREGS(0x0824, 0x0820, 0x081c, 0x01f7, 0x01f8, 0x01f9), | ||
4282 | }, | ||
4283 | { .freq = 5210, | ||
4284 | RADIOREGS3(0xaf, 0x01, 0x01, 0x02, 0x09, 0x05, 0x05, 0x04, | ||
4285 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
4286 | 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, | ||
4287 | 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70, | ||
4288 | 0x00, 0x09, 0x00, 0x6e, 0x00), | ||
4289 | PHYREGS(0x0828, 0x0824, 0x0820, 0x01f6, 0x01f7, 0x01f8), | ||
4290 | }, | ||
4291 | { .freq = 5220, | ||
4292 | RADIOREGS3(0xa7, 0x01, 0x01, 0x02, 0x0a, 0x05, 0x05, 0x04, | ||
4293 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8e, 0x0f, 0x00, | ||
4294 | 0xfe, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, | ||
4295 | 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70, | ||
4296 | 0x00, 0x09, 0x00, 0x6e, 0x00), | ||
4297 | PHYREGS(0x082c, 0x0828, 0x0824, 0x01f5, 0x01f6, 0x01f7), | ||
4298 | }, | ||
4299 | { .freq = 5230, | ||
4300 | RADIOREGS3(0xa7, 0x01, 0x01, 0x02, 0x0b, 0x05, 0x05, 0x04, | ||
4301 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8e, 0x0f, 0x00, | ||
4302 | 0xee, 0xea, 0x00, 0x06, 0x00, 0x70, 0x00, 0x08, | ||
4303 | 0x00, 0x9e, 0x00, 0xea, 0x00, 0x06, 0x00, 0x70, | ||
4304 | 0x00, 0x08, 0x00, 0x6e, 0x00), | ||
4305 | PHYREGS(0x0830, 0x082c, 0x0828, 0x01f4, 0x01f5, 0x01f6), | ||
4306 | }, | ||
4307 | { .freq = 5240, | ||
4308 | RADIOREGS3(0xa0, 0x01, 0x01, 0x02, 0x0c, 0x05, 0x05, 0x04, | ||
4309 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8e, 0x0f, 0x00, | ||
4310 | 0xee, 0xe9, 0x00, 0x05, 0x00, 0x70, 0x00, 0x08, | ||
4311 | 0x00, 0x9d, 0x00, 0xe9, 0x00, 0x05, 0x00, 0x70, | ||
4312 | 0x00, 0x08, 0x00, 0x6d, 0x00), | ||
4313 | PHYREGS(0x0834, 0x0830, 0x082c, 0x01f3, 0x01f4, 0x01f5), | ||
4314 | }, | ||
4315 | { .freq = 5250, | ||
4316 | RADIOREGS3(0xa0, 0x01, 0x01, 0x02, 0x0d, 0x05, 0x05, 0x04, | ||
4317 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8e, 0x0f, 0x00, | ||
4318 | 0xed, 0xe9, 0x00, 0x05, 0x00, 0x70, 0x00, 0x08, | ||
4319 | 0x00, 0x9d, 0x00, 0xe9, 0x00, 0x05, 0x00, 0x70, | ||
4320 | 0x00, 0x08, 0x00, 0x6d, 0x00), | ||
4321 | PHYREGS(0x0838, 0x0834, 0x0830, 0x01f2, 0x01f3, 0x01f4), | ||
4322 | }, | ||
4323 | { .freq = 5260, | ||
4324 | RADIOREGS3(0x98, 0x01, 0x01, 0x02, 0x0e, 0x05, 0x05, 0x04, | ||
4325 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8e, 0x0e, 0x00, | ||
4326 | 0xed, 0xd9, 0x00, 0x05, 0x00, 0x70, 0x00, 0x08, | ||
4327 | 0x00, 0x9d, 0x00, 0xd9, 0x00, 0x05, 0x00, 0x70, | ||
4328 | 0x00, 0x08, 0x00, 0x6d, 0x00), | ||
4329 | PHYREGS(0x083c, 0x0838, 0x0834, 0x01f1, 0x01f2, 0x01f3), | ||
4330 | }, | ||
4331 | { .freq = 5270, | ||
4332 | RADIOREGS3(0x98, 0x01, 0x01, 0x02, 0x0f, 0x05, 0x05, 0x04, | ||
4333 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8e, 0x0e, 0x00, | ||
4334 | 0xed, 0xd8, 0x00, 0x04, 0x00, 0x70, 0x00, 0x07, | ||
4335 | 0x00, 0x9c, 0x00, 0xd8, 0x00, 0x04, 0x00, 0x70, | ||
4336 | 0x00, 0x07, 0x00, 0x6c, 0x00), | ||
4337 | PHYREGS(0x0840, 0x083c, 0x0838, 0x01f0, 0x01f1, 0x01f2), | ||
4338 | }, | ||
4339 | { .freq = 5280, | ||
4340 | RADIOREGS3(0x91, 0x01, 0x01, 0x02, 0x10, 0x05, 0x05, 0x04, | ||
4341 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0e, 0x00, | ||
4342 | 0xdc, 0xc8, 0x00, 0x04, 0x00, 0x70, 0x00, 0x07, | ||
4343 | 0x00, 0x9c, 0x00, 0xc8, 0x00, 0x04, 0x00, 0x70, | ||
4344 | 0x00, 0x07, 0x00, 0x6c, 0x00), | ||
4345 | PHYREGS(0x0844, 0x0840, 0x083c, 0x01f0, 0x01f0, 0x01f1), | ||
4346 | }, | ||
4347 | { .freq = 5290, | ||
4348 | RADIOREGS3(0x91, 0x01, 0x01, 0x02, 0x11, 0x05, 0x05, 0x04, | ||
4349 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0e, 0x00, | ||
4350 | 0xdc, 0xc8, 0x00, 0x04, 0x00, 0x70, 0x00, 0x07, | ||
4351 | 0x00, 0x9c, 0x00, 0xc8, 0x00, 0x04, 0x00, 0x70, | ||
4352 | 0x00, 0x07, 0x00, 0x6c, 0x00), | ||
4353 | PHYREGS(0x0848, 0x0844, 0x0840, 0x01ef, 0x01f0, 0x01f0), | ||
4354 | }, | ||
4355 | { .freq = 5300, | ||
4356 | RADIOREGS3(0x8a, 0x01, 0x01, 0x02, 0x12, 0x05, 0x05, 0x04, | ||
4357 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0e, 0x00, | ||
4358 | 0xdc, 0xc8, 0x00, 0x04, 0x00, 0x70, 0x00, 0x07, | ||
4359 | 0x00, 0x9c, 0x00, 0xc8, 0x00, 0x04, 0x00, 0x70, | ||
4360 | 0x00, 0x07, 0x00, 0x6c, 0x00), | ||
4361 | PHYREGS(0x084c, 0x0848, 0x0844, 0x01ee, 0x01ef, 0x01f0), | ||
4362 | }, | ||
4363 | { .freq = 5310, | ||
4364 | RADIOREGS3(0x8a, 0x01, 0x01, 0x02, 0x13, 0x05, 0x05, 0x04, | ||
4365 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0e, 0x00, | ||
4366 | 0xdc, 0xc8, 0x00, 0x04, 0x00, 0x70, 0x00, 0x07, | ||
4367 | 0x00, 0x9c, 0x00, 0xc8, 0x00, 0x04, 0x00, 0x70, | ||
4368 | 0x00, 0x07, 0x00, 0x6c, 0x00), | ||
4369 | PHYREGS(0x0850, 0x084c, 0x0848, 0x01ed, 0x01ee, 0x01ef), | ||
4370 | }, | ||
4371 | { .freq = 5320, | ||
4372 | RADIOREGS3(0x83, 0x01, 0x01, 0x02, 0x14, 0x05, 0x05, 0x04, | ||
4373 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0e, 0x00, | ||
4374 | 0xdb, 0xb8, 0x00, 0x04, 0x00, 0x70, 0x00, 0x07, | ||
4375 | 0x00, 0x9c, 0x00, 0xb8, 0x00, 0x04, 0x00, 0x70, | ||
4376 | 0x00, 0x07, 0x00, 0x6c, 0x00), | ||
4377 | PHYREGS(0x0854, 0x0850, 0x084c, 0x01ec, 0x01ed, 0x01ee), | ||
4378 | }, | ||
4379 | { .freq = 5330, | ||
4380 | RADIOREGS3(0x83, 0x01, 0x01, 0x02, 0x15, 0x05, 0x05, 0x04, | ||
4381 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00, | ||
4382 | 0xcb, 0xb7, 0x00, 0x04, 0x00, 0x70, 0x00, 0x07, | ||
4383 | 0x00, 0x9b, 0x00, 0xb7, 0x00, 0x04, 0x00, 0x70, | ||
4384 | 0x00, 0x07, 0x00, 0x6b, 0x00), | ||
4385 | PHYREGS(0x0858, 0x0854, 0x0850, 0x01eb, 0x01ec, 0x01ed), | ||
4386 | }, | ||
4387 | { .freq = 5340, | ||
4388 | RADIOREGS3(0x7c, 0x01, 0x01, 0x02, 0x16, 0x05, 0x05, 0x04, | ||
4389 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00, | ||
4390 | 0xca, 0xb7, 0x00, 0x03, 0x00, 0x70, 0x00, 0x07, | ||
4391 | 0x00, 0x9b, 0x00, 0xb7, 0x00, 0x03, 0x00, 0x70, | ||
4392 | 0x00, 0x07, 0x00, 0x6b, 0x00), | ||
4393 | PHYREGS(0x085c, 0x0858, 0x0854, 0x01ea, 0x01eb, 0x01ec), | ||
4394 | }, | ||
4395 | { .freq = 5350, | ||
4396 | RADIOREGS3(0x7c, 0x01, 0x01, 0x02, 0x17, 0x05, 0x05, 0x04, | ||
4397 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0d, 0x00, | ||
4398 | 0xca, 0xa7, 0x00, 0x03, 0x00, 0x70, 0x00, 0x06, | ||
4399 | 0x00, 0x9b, 0x00, 0xa7, 0x00, 0x03, 0x00, 0x70, | ||
4400 | 0x00, 0x06, 0x00, 0x6b, 0x00), | ||
4401 | PHYREGS(0x0860, 0x085c, 0x0858, 0x01e9, 0x01ea, 0x01eb), | ||
4402 | }, | ||
4403 | { .freq = 5360, | ||
4404 | RADIOREGS3(0x75, 0x01, 0x01, 0x02, 0x18, 0x05, 0x05, 0x04, | ||
4405 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0d, 0x00, | ||
4406 | 0xc9, 0xa6, 0x00, 0x03, 0x00, 0x70, 0x00, 0x06, | ||
4407 | 0x00, 0x9b, 0x00, 0xa6, 0x00, 0x03, 0x00, 0x70, | ||
4408 | 0x00, 0x06, 0x00, 0x6b, 0x00), | ||
4409 | PHYREGS(0x0864, 0x0860, 0x085c, 0x01e8, 0x01e9, 0x01ea), | ||
4410 | }, | ||
4411 | { .freq = 5370, | ||
4412 | RADIOREGS3(0x75, 0x01, 0x01, 0x02, 0x19, 0x05, 0x05, 0x04, | ||
4413 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0d, 0x00, | ||
4414 | 0xc9, 0xa6, 0x00, 0x03, 0x00, 0x70, 0x00, 0x06, | ||
4415 | 0x00, 0x9b, 0x00, 0xa6, 0x00, 0x03, 0x00, 0x70, | ||
4416 | 0x00, 0x06, 0x00, 0x7b, 0x00), | ||
4417 | PHYREGS(0x0868, 0x0864, 0x0860, 0x01e7, 0x01e8, 0x01e9), | ||
4418 | }, | ||
4419 | { .freq = 5380, | ||
4420 | RADIOREGS3(0x6e, 0x01, 0x01, 0x02, 0x1a, 0x05, 0x05, 0x04, | ||
4421 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0c, 0x00, | ||
4422 | 0xb8, 0x96, 0x00, 0x03, 0x00, 0x70, 0x00, 0x06, | ||
4423 | 0x00, 0x9a, 0x00, 0x96, 0x00, 0x03, 0x00, 0x70, | ||
4424 | 0x00, 0x06, 0x00, 0x7a, 0x00), | ||
4425 | PHYREGS(0x086c, 0x0868, 0x0864, 0x01e6, 0x01e7, 0x01e8), | ||
4426 | }, | ||
4427 | { .freq = 5390, | ||
4428 | RADIOREGS3(0x6e, 0x01, 0x01, 0x02, 0x1b, 0x05, 0x05, 0x04, | ||
4429 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0c, 0x00, | ||
4430 | 0xb8, 0x95, 0x00, 0x03, 0x00, 0x70, 0x00, 0x06, | ||
4431 | 0x00, 0x9a, 0x00, 0x95, 0x00, 0x03, 0x00, 0x70, | ||
4432 | 0x00, 0x06, 0x00, 0x7a, 0x00), | ||
4433 | PHYREGS(0x0870, 0x086c, 0x0868, 0x01e5, 0x01e6, 0x01e7), | ||
4434 | }, | ||
4435 | { .freq = 5400, | ||
4436 | RADIOREGS3(0x67, 0x01, 0x01, 0x02, 0x1c, 0x05, 0x05, 0x04, | ||
4437 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0c, 0x00, | ||
4438 | 0xb8, 0x95, 0x00, 0x03, 0x00, 0x70, 0x00, 0x06, | ||
4439 | 0x00, 0x9a, 0x00, 0x95, 0x00, 0x03, 0x00, 0x70, | ||
4440 | 0x00, 0x06, 0x00, 0x7a, 0x00), | ||
4441 | PHYREGS(0x0874, 0x0870, 0x086c, 0x01e5, 0x01e5, 0x01e6), | ||
4442 | }, | ||
4443 | { .freq = 5410, | ||
4444 | RADIOREGS3(0x67, 0x01, 0x01, 0x02, 0x1d, 0x05, 0x05, 0x04, | ||
4445 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0c, 0x00, | ||
4446 | 0xb7, 0x95, 0x00, 0x03, 0x00, 0x70, 0x00, 0x05, | ||
4447 | 0x00, 0x9a, 0x00, 0x95, 0x00, 0x03, 0x00, 0x70, | ||
4448 | 0x00, 0x05, 0x00, 0x7a, 0x00), | ||
4449 | PHYREGS(0x0878, 0x0874, 0x0870, 0x01e4, 0x01e5, 0x01e5), | ||
4450 | }, | ||
4451 | { .freq = 5420, | ||
4452 | RADIOREGS3(0x61, 0x01, 0x01, 0x02, 0x1e, 0x05, 0x05, 0x04, | ||
4453 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0c, 0x00, | ||
4454 | 0xa7, 0x95, 0x00, 0x03, 0x00, 0x70, 0x00, 0x05, | ||
4455 | 0x00, 0x9a, 0x00, 0x95, 0x00, 0x03, 0x00, 0x70, | ||
4456 | 0x00, 0x05, 0x00, 0x7a, 0x00), | ||
4457 | PHYREGS(0x087c, 0x0878, 0x0874, 0x01e3, 0x01e4, 0x01e5), | ||
4458 | }, | ||
4459 | { .freq = 5430, | ||
4460 | RADIOREGS3(0x61, 0x01, 0x01, 0x02, 0x1f, 0x05, 0x05, 0x04, | ||
4461 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0b, 0x00, | ||
4462 | 0xa6, 0x85, 0x00, 0x02, 0x00, 0x70, 0x00, 0x05, | ||
4463 | 0x00, 0x99, 0x00, 0x85, 0x00, 0x02, 0x00, 0x70, | ||
4464 | 0x00, 0x05, 0x00, 0x79, 0x00), | ||
4465 | PHYREGS(0x0880, 0x087c, 0x0878, 0x01e2, 0x01e3, 0x01e4), | ||
4466 | }, | ||
4467 | { .freq = 5440, | ||
4468 | RADIOREGS3(0x5a, 0x01, 0x01, 0x02, 0x20, 0x05, 0x05, 0x04, | ||
4469 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8b, 0x0b, 0x00, | ||
4470 | 0xa6, 0x84, 0x00, 0x02, 0x00, 0x70, 0x00, 0x05, | ||
4471 | 0x00, 0x99, 0x00, 0x84, 0x00, 0x02, 0x00, 0x70, | ||
4472 | 0x00, 0x05, 0x00, 0x79, 0x00), | ||
4473 | PHYREGS(0x0884, 0x0880, 0x087c, 0x01e1, 0x01e2, 0x01e3), | ||
4474 | }, | ||
4475 | { .freq = 5450, | ||
4476 | RADIOREGS3(0x5a, 0x01, 0x01, 0x02, 0x21, 0x05, 0x05, 0x04, | ||
4477 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8b, 0x0b, 0x00, | ||
4478 | 0x95, 0x84, 0x00, 0x02, 0x00, 0x70, 0x00, 0x05, | ||
4479 | 0x00, 0x99, 0x00, 0x84, 0x00, 0x02, 0x00, 0x70, | ||
4480 | 0x00, 0x05, 0x00, 0x79, 0x00), | ||
4481 | PHYREGS(0x0888, 0x0884, 0x0880, 0x01e0, 0x01e1, 0x01e2), | ||
4482 | }, | ||
4483 | { .freq = 5460, | ||
4484 | RADIOREGS3(0x53, 0x01, 0x01, 0x02, 0x22, 0x05, 0x05, 0x04, | ||
4485 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8b, 0x0b, 0x00, | ||
4486 | 0x95, 0x84, 0x00, 0x02, 0x00, 0x70, 0x00, 0x04, | ||
4487 | 0x00, 0x99, 0x00, 0x84, 0x00, 0x02, 0x00, 0x70, | ||
4488 | 0x00, 0x04, 0x00, 0x79, 0x00), | ||
4489 | PHYREGS(0x088c, 0x0888, 0x0884, 0x01df, 0x01e0, 0x01e1), | ||
4490 | }, | ||
4491 | { .freq = 5470, | ||
4492 | RADIOREGS3(0x53, 0x01, 0x01, 0x02, 0x23, 0x05, 0x05, 0x04, | ||
4493 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8b, 0x0b, 0x00, | ||
4494 | 0x94, 0x74, 0x00, 0x01, 0x00, 0x70, 0x00, 0x04, | ||
4495 | 0x00, 0x99, 0x00, 0x74, 0x00, 0x01, 0x00, 0x70, | ||
4496 | 0x00, 0x04, 0x00, 0x79, 0x00), | ||
4497 | PHYREGS(0x0890, 0x088c, 0x0888, 0x01de, 0x01df, 0x01e0), | ||
4498 | }, | ||
4499 | { .freq = 5480, | ||
4500 | RADIOREGS3(0x4d, 0x01, 0x01, 0x02, 0x24, 0x05, 0x05, 0x04, | ||
4501 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x0a, 0x00, | ||
4502 | 0x84, 0x73, 0x00, 0x01, 0x00, 0x70, 0x00, 0x04, | ||
4503 | 0x00, 0x98, 0x00, 0x73, 0x00, 0x01, 0x00, 0x70, | ||
4504 | 0x00, 0x04, 0x00, 0x78, 0x00), | ||
4505 | PHYREGS(0x0894, 0x0890, 0x088c, 0x01dd, 0x01de, 0x01df), | ||
4506 | }, | ||
4507 | { .freq = 5490, | ||
4508 | RADIOREGS3(0x4d, 0x01, 0x01, 0x02, 0x25, 0x05, 0x05, 0x04, | ||
4509 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x0a, 0x00, | ||
4510 | 0x83, 0x73, 0x00, 0x01, 0x00, 0x70, 0x00, 0x04, | ||
4511 | 0x00, 0x98, 0x00, 0x73, 0x00, 0x01, 0x00, 0x70, | ||
4512 | 0x00, 0x04, 0x00, 0x78, 0x00), | ||
4513 | PHYREGS(0x0898, 0x0894, 0x0890, 0x01dd, 0x01dd, 0x01de), | ||
4514 | }, | ||
4515 | { .freq = 5500, | ||
4516 | RADIOREGS3(0x47, 0x01, 0x01, 0x02, 0x26, 0x05, 0x05, 0x04, | ||
4517 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x0a, 0x00, | ||
4518 | 0x82, 0x73, 0x00, 0x01, 0x00, 0x70, 0x00, 0x04, | ||
4519 | 0x00, 0x98, 0x00, 0x73, 0x00, 0x01, 0x00, 0x70, | ||
4520 | 0x00, 0x04, 0x00, 0x78, 0x00), | ||
4521 | PHYREGS(0x089c, 0x0898, 0x0894, 0x01dc, 0x01dd, 0x01dd), | ||
4522 | }, | ||
4523 | { .freq = 5510, | ||
4524 | RADIOREGS3(0x47, 0x01, 0x01, 0x02, 0x27, 0x05, 0x05, 0x04, | ||
4525 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x0a, 0x00, | ||
4526 | 0x82, 0x73, 0x00, 0x01, 0x00, 0x70, 0x00, 0x04, | ||
4527 | 0x00, 0x98, 0x00, 0x73, 0x00, 0x01, 0x00, 0x70, | ||
4528 | 0x00, 0x04, 0x00, 0x78, 0x00), | ||
4529 | PHYREGS(0x08a0, 0x089c, 0x0898, 0x01db, 0x01dc, 0x01dd), | ||
4530 | }, | ||
4531 | { .freq = 5520, | ||
4532 | RADIOREGS3(0x40, 0x01, 0x01, 0x02, 0x28, 0x05, 0x05, 0x04, | ||
4533 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x0a, 0x00, | ||
4534 | 0x72, 0x73, 0x00, 0x01, 0x00, 0x70, 0x00, 0x04, | ||
4535 | 0x00, 0x98, 0x00, 0x73, 0x00, 0x01, 0x00, 0x70, | ||
4536 | 0x00, 0x04, 0x00, 0x78, 0x00), | ||
4537 | PHYREGS(0x08a4, 0x08a0, 0x089c, 0x01da, 0x01db, 0x01dc), | ||
4538 | }, | ||
4539 | { .freq = 5530, | ||
4540 | RADIOREGS3(0x40, 0x01, 0x01, 0x02, 0x29, 0x05, 0x05, 0x04, | ||
4541 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x09, 0x00, | ||
4542 | 0x72, 0x63, 0x00, 0x01, 0x00, 0x70, 0x00, 0x03, | ||
4543 | 0x00, 0x98, 0x00, 0x63, 0x00, 0x01, 0x00, 0x70, | ||
4544 | 0x00, 0x03, 0x00, 0x78, 0x00), | ||
4545 | PHYREGS(0x08a8, 0x08a4, 0x08a0, 0x01d9, 0x01da, 0x01db), | ||
4546 | }, | ||
4547 | { .freq = 5540, | ||
4548 | RADIOREGS3(0x3a, 0x01, 0x01, 0x02, 0x2a, 0x05, 0x05, 0x04, | ||
4549 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x09, 0x00, | ||
4550 | 0x71, 0x62, 0x00, 0x00, 0x00, 0x70, 0x00, 0x03, | ||
4551 | 0x00, 0x97, 0x00, 0x62, 0x00, 0x00, 0x00, 0x70, | ||
4552 | 0x00, 0x03, 0x00, 0x77, 0x00), | ||
4553 | PHYREGS(0x08ac, 0x08a8, 0x08a4, 0x01d8, 0x01d9, 0x01da), | ||
4554 | }, | ||
4555 | { .freq = 5550, | ||
4556 | RADIOREGS3(0x3a, 0x01, 0x01, 0x02, 0x2b, 0x05, 0x05, 0x04, | ||
4557 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x89, 0x09, 0x00, | ||
4558 | 0x61, 0x62, 0x00, 0x00, 0x00, 0x70, 0x00, 0x03, | ||
4559 | 0x00, 0x97, 0x00, 0x62, 0x00, 0x00, 0x00, 0x70, | ||
4560 | 0x00, 0x03, 0x00, 0x77, 0x00), | ||
4561 | PHYREGS(0x08b0, 0x08ac, 0x08a8, 0x01d7, 0x01d8, 0x01d9), | ||
4562 | }, | ||
4563 | { .freq = 5560, | ||
4564 | RADIOREGS3(0x34, 0x01, 0x01, 0x02, 0x2c, 0x05, 0x05, 0x04, | ||
4565 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x89, 0x09, 0x00, | ||
4566 | 0x61, 0x62, 0x00, 0x00, 0x00, 0x70, 0x00, 0x03, | ||
4567 | 0x00, 0x97, 0x00, 0x62, 0x00, 0x00, 0x00, 0x70, | ||
4568 | 0x00, 0x03, 0x00, 0x77, 0x00), | ||
4569 | PHYREGS(0x08b4, 0x08b0, 0x08ac, 0x01d7, 0x01d7, 0x01d8), | ||
4570 | }, | ||
4571 | { .freq = 5570, | ||
4572 | RADIOREGS3(0x34, 0x01, 0x01, 0x02, 0x2d, 0x05, 0x05, 0x04, | ||
4573 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x89, 0x09, 0x00, | ||
4574 | 0x61, 0x52, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02, | ||
4575 | 0x00, 0x96, 0x00, 0x52, 0x00, 0x00, 0x00, 0x70, | ||
4576 | 0x00, 0x02, 0x00, 0x76, 0x00), | ||
4577 | PHYREGS(0x08b8, 0x08b4, 0x08b0, 0x01d6, 0x01d7, 0x01d7), | ||
4578 | }, | ||
4579 | { .freq = 5580, | ||
4580 | RADIOREGS3(0x2e, 0x01, 0x01, 0x02, 0x2e, 0x05, 0x05, 0x04, | ||
4581 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x89, 0x08, 0x00, | ||
4582 | 0x60, 0x52, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02, | ||
4583 | 0x00, 0x96, 0x00, 0x52, 0x00, 0x00, 0x00, 0x70, | ||
4584 | 0x00, 0x02, 0x00, 0x86, 0x00), | ||
4585 | PHYREGS(0x08bc, 0x08b8, 0x08b4, 0x01d5, 0x01d6, 0x01d7), | ||
4586 | }, | ||
4587 | { .freq = 5590, | ||
4588 | RADIOREGS3(0x2e, 0x01, 0x01, 0x02, 0x2f, 0x05, 0x05, 0x04, | ||
4589 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x89, 0x08, 0x00, | ||
4590 | 0x50, 0x51, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02, | ||
4591 | 0x00, 0x96, 0x00, 0x51, 0x00, 0x00, 0x00, 0x70, | ||
4592 | 0x00, 0x02, 0x00, 0x86, 0x00), | ||
4593 | PHYREGS(0x08c0, 0x08bc, 0x08b8, 0x01d4, 0x01d5, 0x01d6), | ||
4594 | }, | ||
4595 | { .freq = 5600, | ||
4596 | RADIOREGS3(0x28, 0x01, 0x01, 0x02, 0x30, 0x05, 0x05, 0x04, | ||
4597 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x89, 0x08, 0x00, | ||
4598 | 0x50, 0x51, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02, | ||
4599 | 0x00, 0x96, 0x00, 0x51, 0x00, 0x00, 0x00, 0x70, | ||
4600 | 0x00, 0x02, 0x00, 0x86, 0x00), | ||
4601 | PHYREGS(0x08c4, 0x08c0, 0x08bc, 0x01d3, 0x01d4, 0x01d5), | ||
4602 | }, | ||
4603 | { .freq = 5610, | ||
4604 | RADIOREGS3(0x28, 0x01, 0x01, 0x02, 0x31, 0x05, 0x05, 0x04, | ||
4605 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x89, 0x08, 0x00, | ||
4606 | 0x50, 0x51, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02, | ||
4607 | 0x00, 0x96, 0x00, 0x51, 0x00, 0x00, 0x00, 0x70, | ||
4608 | 0x00, 0x02, 0x00, 0x86, 0x00), | ||
4609 | PHYREGS(0x08c8, 0x08c4, 0x08c0, 0x01d2, 0x01d3, 0x01d4), | ||
4610 | }, | ||
4611 | { .freq = 5620, | ||
4612 | RADIOREGS3(0x21, 0x01, 0x01, 0x02, 0x32, 0x05, 0x05, 0x04, | ||
4613 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x89, 0x08, 0x00, | ||
4614 | 0x50, 0x51, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02, | ||
4615 | 0x00, 0x96, 0x00, 0x51, 0x00, 0x00, 0x00, 0x70, | ||
4616 | 0x00, 0x02, 0x00, 0x86, 0x00), | ||
4617 | PHYREGS(0x08cc, 0x08c8, 0x08c4, 0x01d2, 0x01d2, 0x01d3), | ||
4618 | }, | ||
4619 | { .freq = 5630, | ||
4620 | RADIOREGS3(0x21, 0x01, 0x01, 0x02, 0x33, 0x05, 0x05, 0x04, | ||
4621 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x88, 0x07, 0x00, | ||
4622 | 0x50, 0x51, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02, | ||
4623 | 0x00, 0x96, 0x00, 0x51, 0x00, 0x00, 0x00, 0x70, | ||
4624 | 0x00, 0x02, 0x00, 0x86, 0x00), | ||
4625 | PHYREGS(0x08d0, 0x08cc, 0x08c8, 0x01d1, 0x01d2, 0x01d2), | ||
4626 | }, | ||
4627 | { .freq = 5640, | ||
4628 | RADIOREGS3(0x1c, 0x01, 0x01, 0x02, 0x34, 0x05, 0x05, 0x04, | ||
4629 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x88, 0x07, 0x00, | ||
4630 | 0x40, 0x51, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02, | ||
4631 | 0x00, 0x95, 0x00, 0x51, 0x00, 0x00, 0x00, 0x70, | ||
4632 | 0x00, 0x02, 0x00, 0x85, 0x00), | ||
4633 | PHYREGS(0x08d4, 0x08d0, 0x08cc, 0x01d0, 0x01d1, 0x01d2), | ||
4634 | }, | ||
4635 | { .freq = 5650, | ||
4636 | RADIOREGS3(0x1c, 0x01, 0x01, 0x02, 0x35, 0x05, 0x05, 0x04, | ||
4637 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x88, 0x07, 0x00, | ||
4638 | 0x40, 0x50, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01, | ||
4639 | 0x00, 0x95, 0x00, 0x50, 0x00, 0x00, 0x00, 0x70, | ||
4640 | 0x00, 0x01, 0x00, 0x85, 0x00), | ||
4641 | PHYREGS(0x08d8, 0x08d4, 0x08d0, 0x01cf, 0x01d0, 0x01d1), | ||
4642 | }, | ||
4643 | { .freq = 5660, | ||
4644 | RADIOREGS3(0x16, 0x01, 0x01, 0x02, 0x36, 0x05, 0x05, 0x04, | ||
4645 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x88, 0x07, 0x00, | ||
4646 | 0x40, 0x50, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01, | ||
4647 | 0x00, 0x95, 0x00, 0x50, 0x00, 0x00, 0x00, 0x70, | ||
4648 | 0x00, 0x01, 0x00, 0x85, 0x00), | ||
4649 | PHYREGS(0x08dc, 0x08d8, 0x08d4, 0x01ce, 0x01cf, 0x01d0), | ||
4650 | }, | ||
4651 | { .freq = 5670, | ||
4652 | RADIOREGS3(0x16, 0x01, 0x01, 0x02, 0x37, 0x05, 0x05, 0x04, | ||
4653 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x88, 0x07, 0x00, | ||
4654 | 0x40, 0x40, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01, | ||
4655 | 0x00, 0x94, 0x00, 0x40, 0x00, 0x00, 0x00, 0x70, | ||
4656 | 0x00, 0x01, 0x00, 0x84, 0x00), | ||
4657 | PHYREGS(0x08e0, 0x08dc, 0x08d8, 0x01ce, 0x01ce, 0x01cf), | ||
4658 | }, | ||
4659 | { .freq = 5680, | ||
4660 | RADIOREGS3(0x10, 0x01, 0x01, 0x02, 0x38, 0x05, 0x05, 0x04, | ||
4661 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00, | ||
4662 | 0x30, 0x40, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01, | ||
4663 | 0x00, 0x94, 0x00, 0x40, 0x00, 0x00, 0x00, 0x70, | ||
4664 | 0x00, 0x01, 0x00, 0x84, 0x00), | ||
4665 | PHYREGS(0x08e4, 0x08e0, 0x08dc, 0x01cd, 0x01ce, 0x01ce), | ||
4666 | }, | ||
4667 | { .freq = 5690, | ||
4668 | RADIOREGS3(0x10, 0x01, 0x01, 0x02, 0x39, 0x05, 0x05, 0x04, | ||
4669 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00, | ||
4670 | 0x30, 0x40, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01, | ||
4671 | 0x00, 0x94, 0x00, 0x40, 0x00, 0x00, 0x00, 0x70, | ||
4672 | 0x00, 0x01, 0x00, 0x94, 0x00), | ||
4673 | PHYREGS(0x08e8, 0x08e4, 0x08e0, 0x01cc, 0x01cd, 0x01ce), | ||
4674 | }, | ||
4675 | { .freq = 5700, | ||
4676 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3a, 0x05, 0x05, 0x04, | ||
4677 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00, | ||
4678 | 0x30, 0x40, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01, | ||
4679 | 0x00, 0x94, 0x00, 0x40, 0x00, 0x00, 0x00, 0x70, | ||
4680 | 0x00, 0x01, 0x00, 0x94, 0x00), | ||
4681 | PHYREGS(0x08ec, 0x08e8, 0x08e4, 0x01cb, 0x01cc, 0x01cd), | ||
4682 | }, | ||
4683 | { .freq = 5710, | ||
4684 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3b, 0x05, 0x05, 0x04, | ||
4685 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00, | ||
4686 | 0x30, 0x40, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01, | ||
4687 | 0x00, 0x94, 0x00, 0x40, 0x00, 0x00, 0x00, 0x70, | ||
4688 | 0x00, 0x01, 0x00, 0x94, 0x00), | ||
4689 | PHYREGS(0x08f0, 0x08ec, 0x08e8, 0x01ca, 0x01cb, 0x01cc), | ||
4690 | }, | ||
4691 | { .freq = 5720, | ||
4692 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3c, 0x05, 0x05, 0x04, | ||
4693 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00, | ||
4694 | 0x30, 0x40, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01, | ||
4695 | 0x00, 0x94, 0x00, 0x40, 0x00, 0x00, 0x00, 0x70, | ||
4696 | 0x00, 0x01, 0x00, 0x94, 0x00), | ||
4697 | PHYREGS(0x08f4, 0x08f0, 0x08ec, 0x01c9, 0x01ca, 0x01cb), | ||
4698 | }, | ||
4699 | { .freq = 5725, | ||
4700 | RADIOREGS3(0x03, 0x01, 0x02, 0x04, 0x79, 0x07, 0x07, 0x04, | ||
4701 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00, | ||
4702 | 0x30, 0x40, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01, | ||
4703 | 0x00, 0x94, 0x00, 0x40, 0x00, 0x00, 0x00, 0x70, | ||
4704 | 0x00, 0x01, 0x00, 0x94, 0x00), | ||
4705 | PHYREGS(0x08f6, 0x08f2, 0x08ee, 0x01c9, 0x01ca, 0x01cb), | ||
4706 | }, | ||
4707 | { .freq = 5730, | ||
4708 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3d, 0x05, 0x05, 0x04, | ||
4709 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00, | ||
4710 | 0x20, 0x30, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01, | ||
4711 | 0x00, 0x94, 0x00, 0x30, 0x00, 0x00, 0x00, 0x70, | ||
4712 | 0x00, 0x01, 0x00, 0x94, 0x00), | ||
4713 | PHYREGS(0x08f8, 0x08f4, 0x08f0, 0x01c9, 0x01c9, 0x01ca), | ||
4714 | }, | ||
4715 | { .freq = 5735, | ||
4716 | RADIOREGS3(0x03, 0x01, 0x02, 0x04, 0x7b, 0x07, 0x07, 0x04, | ||
4717 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00, | ||
4718 | 0x20, 0x30, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
4719 | 0x00, 0x93, 0x00, 0x30, 0x00, 0x00, 0x00, 0x70, | ||
4720 | 0x00, 0x00, 0x00, 0x93, 0x00), | ||
4721 | PHYREGS(0x08fa, 0x08f6, 0x08f2, 0x01c8, 0x01c9, 0x01ca), | ||
4722 | }, | ||
4723 | { .freq = 5740, | ||
4724 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3e, 0x05, 0x05, 0x04, | ||
4725 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00, | ||
4726 | 0x20, 0x30, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
4727 | 0x00, 0x93, 0x00, 0x30, 0x00, 0x00, 0x00, 0x70, | ||
4728 | 0x00, 0x00, 0x00, 0x93, 0x00), | ||
4729 | PHYREGS(0x08fc, 0x08f8, 0x08f4, 0x01c8, 0x01c9, 0x01c9), | ||
4730 | }, | ||
4731 | { .freq = 5745, | ||
4732 | RADIOREGS3(0xfe, 0x00, 0x02, 0x04, 0x7d, 0x07, 0x07, 0x04, | ||
4733 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00, | ||
4734 | 0x20, 0x30, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
4735 | 0x00, 0x93, 0x00, 0x30, 0x00, 0x00, 0x00, 0x70, | ||
4736 | 0x00, 0x00, 0x00, 0x93, 0x00), | ||
4737 | PHYREGS(0x08fe, 0x08fa, 0x08f6, 0x01c8, 0x01c8, 0x01c9), | ||
4738 | }, | ||
4739 | { .freq = 5750, | ||
4740 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3f, 0x05, 0x05, 0x04, | ||
4741 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00, | ||
4742 | 0x20, 0x30, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
4743 | 0x00, 0x93, 0x00, 0x30, 0x00, 0x00, 0x00, 0x70, | ||
4744 | 0x00, 0x00, 0x00, 0x93, 0x00), | ||
4745 | PHYREGS(0x0900, 0x08fc, 0x08f8, 0x01c7, 0x01c8, 0x01c9), | ||
4746 | }, | ||
4747 | { .freq = 5755, | ||
4748 | RADIOREGS3(0xfe, 0x00, 0x02, 0x04, 0x7f, 0x07, 0x07, 0x04, | ||
4749 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00, | ||
4750 | 0x10, 0x30, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
4751 | 0x00, 0x93, 0x00, 0x30, 0x00, 0x00, 0x00, 0x70, | ||
4752 | 0x00, 0x00, 0x00, 0x93, 0x00), | ||
4753 | PHYREGS(0x0902, 0x08fe, 0x08fa, 0x01c7, 0x01c8, 0x01c8), | ||
4754 | }, | ||
4755 | { .freq = 5760, | ||
4756 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x40, 0x05, 0x05, 0x04, | ||
4757 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x86, 0x05, 0x00, | ||
4758 | 0x10, 0x20, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
4759 | 0x00, 0x93, 0x00, 0x20, 0x00, 0x00, 0x00, 0x70, | ||
4760 | 0x00, 0x00, 0x00, 0x93, 0x00), | ||
4761 | PHYREGS(0x0904, 0x0900, 0x08fc, 0x01c6, 0x01c7, 0x01c8), | ||
4762 | }, | ||
4763 | { .freq = 5765, | ||
4764 | RADIOREGS3(0xf8, 0x00, 0x02, 0x04, 0x81, 0x07, 0x07, 0x04, | ||
4765 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x86, 0x05, 0x00, | ||
4766 | 0x10, 0x20, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
4767 | 0x00, 0x92, 0x00, 0x20, 0x00, 0x00, 0x00, 0x70, | ||
4768 | 0x00, 0x00, 0x00, 0x92, 0x00), | ||
4769 | PHYREGS(0x0906, 0x0902, 0x08fe, 0x01c6, 0x01c7, 0x01c8), | ||
4770 | }, | ||
4771 | { .freq = 5770, | ||
4772 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x41, 0x05, 0x05, 0x04, | ||
4773 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x86, 0x04, 0x00, | ||
4774 | 0x10, 0x20, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
4775 | 0x00, 0x92, 0x00, 0x20, 0x00, 0x00, 0x00, 0x70, | ||
4776 | 0x00, 0x00, 0x00, 0x92, 0x00), | ||
4777 | PHYREGS(0x0908, 0x0904, 0x0900, 0x01c6, 0x01c6, 0x01c7), | ||
4778 | }, | ||
4779 | { .freq = 5775, | ||
4780 | RADIOREGS3(0xf8, 0x00, 0x02, 0x04, 0x83, 0x07, 0x07, 0x04, | ||
4781 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x86, 0x04, 0x00, | ||
4782 | 0x10, 0x20, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
4783 | 0x00, 0x92, 0x00, 0x20, 0x00, 0x00, 0x00, 0x70, | ||
4784 | 0x00, 0x00, 0x00, 0x92, 0x00), | ||
4785 | PHYREGS(0x090a, 0x0906, 0x0902, 0x01c5, 0x01c6, 0x01c7), | ||
4786 | }, | ||
4787 | { .freq = 5780, | ||
4788 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x42, 0x05, 0x05, 0x04, | ||
4789 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x86, 0x04, 0x00, | ||
4790 | 0x10, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
4791 | 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, | ||
4792 | 0x00, 0x00, 0x00, 0x92, 0x00), | ||
4793 | PHYREGS(0x090c, 0x0908, 0x0904, 0x01c5, 0x01c6, 0x01c6), | ||
4794 | }, | ||
4795 | { .freq = 5785, | ||
4796 | RADIOREGS3(0xf2, 0x00, 0x02, 0x04, 0x85, 0x07, 0x07, 0x04, | ||
4797 | 0x10, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
4798 | 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
4799 | 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, | ||
4800 | 0x00, 0x00, 0x00, 0x92, 0x00), | ||
4801 | PHYREGS(0x090e, 0x090a, 0x0906, 0x01c4, 0x01c5, 0x01c6), | ||
4802 | }, | ||
4803 | { .freq = 5790, | ||
4804 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x43, 0x05, 0x05, 0x04, | ||
4805 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
4806 | 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
4807 | 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, | ||
4808 | 0x00, 0x00, 0x00, 0x92, 0x00), | ||
4809 | PHYREGS(0x0910, 0x090c, 0x0908, 0x01c4, 0x01c5, 0x01c6), | ||
4810 | }, | ||
4811 | { .freq = 5795, | ||
4812 | RADIOREGS3(0xf2, 0x00, 0x02, 0x04, 0x87, 0x07, 0x07, 0x04, | ||
4813 | 0x10, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
4814 | 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
4815 | 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, | ||
4816 | 0x00, 0x00, 0x00, 0x92, 0x00), | ||
4817 | PHYREGS(0x0912, 0x090e, 0x090a, 0x01c4, 0x01c4, 0x01c5), | ||
4818 | }, | ||
4819 | { .freq = 5800, | ||
4820 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x44, 0x05, 0x05, 0x04, | ||
4821 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
4822 | 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
4823 | 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, | ||
4824 | 0x00, 0x00, 0x00, 0x92, 0x00), | ||
4825 | PHYREGS(0x0914, 0x0910, 0x090c, 0x01c3, 0x01c4, 0x01c5), | ||
4826 | }, | ||
4827 | { .freq = 5805, | ||
4828 | RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x89, 0x07, 0x07, 0x04, | ||
4829 | 0x10, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
4830 | 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
4831 | 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, | ||
4832 | 0x00, 0x00, 0x00, 0x92, 0x00), | ||
4833 | PHYREGS(0x0916, 0x0912, 0x090e, 0x01c3, 0x01c4, 0x01c4), | ||
4834 | }, | ||
4835 | { .freq = 5810, | ||
4836 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x45, 0x05, 0x05, 0x04, | ||
4837 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
4838 | 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
4839 | 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, | ||
4840 | 0x00, 0x00, 0x00, 0x92, 0x00), | ||
4841 | PHYREGS(0x0918, 0x0914, 0x0910, 0x01c2, 0x01c3, 0x01c4), | ||
4842 | }, | ||
4843 | { .freq = 5815, | ||
4844 | RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x8b, 0x07, 0x07, 0x04, | ||
4845 | 0x10, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
4846 | 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
4847 | 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, | ||
4848 | 0x00, 0x00, 0x00, 0x92, 0x00), | ||
4849 | PHYREGS(0x091a, 0x0916, 0x0912, 0x01c2, 0x01c3, 0x01c4), | ||
4850 | }, | ||
4851 | { .freq = 5820, | ||
4852 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x46, 0x05, 0x05, 0x04, | ||
4853 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
4854 | 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
4855 | 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, | ||
4856 | 0x00, 0x00, 0x00, 0x92, 0x00), | ||
4857 | PHYREGS(0x091c, 0x0918, 0x0914, 0x01c2, 0x01c2, 0x01c3), | ||
4858 | }, | ||
4859 | { .freq = 5825, | ||
4860 | RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x8d, 0x07, 0x07, 0x04, | ||
4861 | 0x10, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
4862 | 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
4863 | 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, | ||
4864 | 0x00, 0x00, 0x00, 0x92, 0x00), | ||
4865 | PHYREGS(0x091e, 0x091a, 0x0916, 0x01c1, 0x01c2, 0x01c3), | ||
4866 | }, | ||
4867 | { .freq = 5830, | ||
4868 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x47, 0x05, 0x05, 0x04, | ||
4869 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
4870 | 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
4871 | 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, | ||
4872 | 0x00, 0x00, 0x00, 0x92, 0x00), | ||
4873 | PHYREGS(0x0920, 0x091c, 0x0918, 0x01c1, 0x01c2, 0x01c2), | ||
4874 | }, | ||
4875 | { .freq = 5840, | ||
4876 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x48, 0x05, 0x05, 0x04, | ||
4877 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
4878 | 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
4879 | 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, | ||
4880 | 0x00, 0x00, 0x00, 0x92, 0x00), | ||
4881 | PHYREGS(0x0924, 0x0920, 0x091c, 0x01c0, 0x01c1, 0x01c2), | ||
4882 | }, | ||
4883 | { .freq = 5850, | ||
4884 | RADIOREGS3(0xe0, 0x00, 0x01, 0x02, 0x49, 0x05, 0x05, 0x04, | ||
4885 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, | ||
4886 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
4887 | 0x00, 0x92, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, | ||
4888 | 0x00, 0x00, 0x00, 0x92, 0x00), | ||
4889 | PHYREGS(0x0928, 0x0924, 0x0920, 0x01bf, 0x01c0, 0x01c1), | ||
4890 | }, | ||
4891 | { .freq = 5860, | ||
4892 | RADIOREGS3(0xde, 0x00, 0x01, 0x02, 0x4a, 0x05, 0x05, 0x04, | ||
4893 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, | ||
4894 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
4895 | 0x00, 0x92, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, | ||
4896 | 0x00, 0x00, 0x00, 0x92, 0x00), | ||
4897 | PHYREGS(0x092c, 0x0928, 0x0924, 0x01bf, 0x01bf, 0x01c0), | ||
4898 | }, | ||
4899 | { .freq = 5870, | ||
4900 | RADIOREGS3(0xdb, 0x00, 0x01, 0x02, 0x4b, 0x05, 0x05, 0x04, | ||
4901 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, | ||
4902 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
4903 | 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, | ||
4904 | 0x00, 0x00, 0x00, 0x91, 0x00), | ||
4905 | PHYREGS(0x0930, 0x092c, 0x0928, 0x01be, 0x01bf, 0x01bf), | ||
4906 | }, | ||
4907 | { .freq = 5880, | ||
4908 | RADIOREGS3(0xd8, 0x00, 0x01, 0x02, 0x4c, 0x05, 0x05, 0x04, | ||
4909 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, | ||
4910 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
4911 | 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, | ||
4912 | 0x00, 0x00, 0x00, 0x91, 0x00), | ||
4913 | PHYREGS(0x0934, 0x0930, 0x092c, 0x01bd, 0x01be, 0x01bf), | ||
4914 | }, | ||
4915 | { .freq = 5890, | ||
4916 | RADIOREGS3(0xd6, 0x00, 0x01, 0x02, 0x4d, 0x05, 0x05, 0x04, | ||
4917 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, | ||
4918 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
4919 | 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, | ||
4920 | 0x00, 0x00, 0x00, 0x91, 0x00), | ||
4921 | PHYREGS(0x0938, 0x0934, 0x0930, 0x01bc, 0x01bd, 0x01be), | ||
4922 | }, | ||
4923 | { .freq = 5900, | ||
4924 | RADIOREGS3(0xd3, 0x00, 0x01, 0x02, 0x4e, 0x05, 0x05, 0x04, | ||
4925 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, | ||
4926 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
4927 | 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, | ||
4928 | 0x00, 0x00, 0x00, 0x91, 0x00), | ||
4929 | PHYREGS(0x093c, 0x0938, 0x0934, 0x01bc, 0x01bc, 0x01bd), | ||
4930 | }, | ||
4931 | { .freq = 5910, | ||
4932 | RADIOREGS3(0xd6, 0x00, 0x01, 0x02, 0x4f, 0x05, 0x05, 0x04, | ||
4933 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, | ||
4934 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, | ||
4935 | 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, | ||
4936 | 0x00, 0x00, 0x00, 0x91, 0x00), | ||
4937 | PHYREGS(0x0940, 0x093c, 0x0938, 0x01bb, 0x01bc, 0x01bc), | ||
4938 | }, | ||
4939 | { .freq = 2412, | ||
4940 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x6c, 0x08, 0x08, 0x04, | ||
4941 | 0x16, 0x01, 0x04, 0x04, 0x04, 0x8f, 0x30, 0x00, | ||
4942 | 0x00, 0x00, 0x89, 0x00, 0x03, 0x00, 0x70, 0x00, | ||
4943 | 0x0f, 0x00, 0x0b, 0x00, 0x89, 0x00, 0x03, 0x00, | ||
4944 | 0x70, 0x00, 0x0f, 0x00, 0x0b), | ||
4945 | PHYREGS(0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443), | ||
4946 | }, | ||
4947 | { .freq = 2417, | ||
4948 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x71, 0x08, 0x08, 0x04, | ||
4949 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
4950 | 0x00, 0x00, 0x89, 0x00, 0x03, 0x00, 0x70, 0x00, | ||
4951 | 0x0f, 0x00, 0x0a, 0x00, 0x89, 0x00, 0x03, 0x00, | ||
4952 | 0x70, 0x00, 0x0f, 0x00, 0x0a), | ||
4953 | PHYREGS(0x03cb, 0x03c7, 0x03c3, 0x0438, 0x043d, 0x0441), | ||
4954 | }, | ||
4955 | { .freq = 2422, | ||
4956 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x76, 0x08, 0x08, 0x04, | ||
4957 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
4958 | 0x00, 0x00, 0x89, 0x00, 0x03, 0x00, 0x70, 0x00, | ||
4959 | 0x0f, 0x00, 0x0a, 0x00, 0x89, 0x00, 0x03, 0x00, | ||
4960 | 0x70, 0x00, 0x0f, 0x00, 0x0a), | ||
4961 | PHYREGS(0x03cd, 0x03c9, 0x03c5, 0x0436, 0x043a, 0x043f), | ||
4962 | }, | ||
4963 | { .freq = 2427, | ||
4964 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x7b, 0x08, 0x08, 0x04, | ||
4965 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
4966 | 0x00, 0x00, 0x78, 0x00, 0x03, 0x00, 0x70, 0x00, | ||
4967 | 0x0e, 0x00, 0x0a, 0x00, 0x78, 0x00, 0x03, 0x00, | ||
4968 | 0x70, 0x00, 0x0e, 0x00, 0x0a), | ||
4969 | PHYREGS(0x03cf, 0x03cb, 0x03c7, 0x0434, 0x0438, 0x043d), | ||
4970 | }, | ||
4971 | { .freq = 2432, | ||
4972 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x80, 0x08, 0x08, 0x04, | ||
4973 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
4974 | 0x00, 0x00, 0x77, 0x00, 0x03, 0x00, 0x70, 0x00, | ||
4975 | 0x0e, 0x00, 0x0a, 0x00, 0x77, 0x00, 0x03, 0x00, | ||
4976 | 0x70, 0x00, 0x0e, 0x00, 0x0a), | ||
4977 | PHYREGS(0x03d1, 0x03cd, 0x03c9, 0x0431, 0x0436, 0x043a), | ||
4978 | }, | ||
4979 | { .freq = 2437, | ||
4980 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x85, 0x08, 0x08, 0x04, | ||
4981 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
4982 | 0x00, 0x00, 0x76, 0x00, 0x03, 0x00, 0x70, 0x00, | ||
4983 | 0x0e, 0x00, 0x0a, 0x00, 0x76, 0x00, 0x03, 0x00, | ||
4984 | 0x70, 0x00, 0x0e, 0x00, 0x0a), | ||
4985 | PHYREGS(0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438), | ||
4986 | }, | ||
4987 | { .freq = 2442, | ||
4988 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04, | ||
4989 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
4990 | 0x00, 0x00, 0x66, 0x00, 0x03, 0x00, 0x70, 0x00, | ||
4991 | 0x0e, 0x00, 0x0a, 0x00, 0x66, 0x00, 0x03, 0x00, | ||
4992 | 0x70, 0x00, 0x0e, 0x00, 0x0a), | ||
4993 | PHYREGS(0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436), | ||
4994 | }, | ||
4995 | { .freq = 2447, | ||
4996 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04, | ||
4997 | 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, | ||
4998 | 0x00, 0x00, 0x55, 0x00, 0x02, 0x00, 0x70, 0x00, | ||
4999 | 0x0e, 0x00, 0x09, 0x00, 0x55, 0x00, 0x02, 0x00, | ||
5000 | 0x70, 0x00, 0x0e, 0x00, 0x09), | ||
5001 | PHYREGS(0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434), | ||
5002 | }, | ||
5003 | { .freq = 2452, | ||
5004 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04, | ||
5005 | 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, | ||
5006 | 0x00, 0x00, 0x45, 0x00, 0x02, 0x00, 0x70, 0x00, | ||
5007 | 0x0e, 0x00, 0x09, 0x00, 0x45, 0x00, 0x02, 0x00, | ||
5008 | 0x70, 0x00, 0x0e, 0x00, 0x09), | ||
5009 | PHYREGS(0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431), | ||
5010 | }, | ||
5011 | { .freq = 2457, | ||
5012 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04, | ||
5013 | 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, | ||
5014 | 0x00, 0x00, 0x34, 0x00, 0x02, 0x00, 0x70, 0x00, | ||
5015 | 0x0d, 0x00, 0x09, 0x00, 0x34, 0x00, 0x02, 0x00, | ||
5016 | 0x70, 0x00, 0x0d, 0x00, 0x09), | ||
5017 | PHYREGS(0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f), | ||
5018 | }, | ||
5019 | { .freq = 2462, | ||
5020 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04, | ||
5021 | 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, | ||
5022 | 0x00, 0x00, 0x33, 0x00, 0x02, 0x00, 0x70, 0x00, | ||
5023 | 0x0d, 0x00, 0x09, 0x00, 0x33, 0x00, 0x02, 0x00, | ||
5024 | 0x70, 0x00, 0x0d, 0x00, 0x09), | ||
5025 | PHYREGS(0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d), | ||
5026 | }, | ||
5027 | { .freq = 2467, | ||
5028 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04, | ||
5029 | 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, | ||
5030 | 0x00, 0x00, 0x22, 0x00, 0x02, 0x00, 0x70, 0x00, | ||
5031 | 0x0d, 0x00, 0x08, 0x00, 0x22, 0x00, 0x02, 0x00, | ||
5032 | 0x70, 0x00, 0x0d, 0x00, 0x08), | ||
5033 | PHYREGS(0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b), | ||
5034 | }, | ||
5035 | { .freq = 2472, | ||
5036 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, | ||
5037 | 0x16, 0x01, 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, | ||
5038 | 0x00, 0x00, 0x11, 0x00, 0x02, 0x00, 0x70, 0x00, | ||
5039 | 0x0d, 0x00, 0x08, 0x00, 0x11, 0x00, 0x02, 0x00, | ||
5040 | 0x70, 0x00, 0x0d, 0x00, 0x08), | ||
5041 | PHYREGS(0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429), | ||
5042 | }, | ||
5043 | { .freq = 2484, | ||
5044 | RADIOREGS3(0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, | ||
5045 | 0x16, 0x01, 0x07, 0x07, 0x07, 0x8f, 0x20, 0x00, | ||
5046 | 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00, | ||
5047 | 0x0d, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, | ||
5048 | 0x70, 0x00, 0x0d, 0x00, 0x08), | ||
5049 | PHYREGS(0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424), | ||
5050 | }, | ||
5051 | }; | ||
5052 | |||
5053 | static const struct b43_nphy_channeltab_entry_rev3 b43_nphy_channeltab_rev8[] = { | ||
5054 | { .freq = 4920, | ||
5055 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, | ||
5056 | 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, | ||
5057 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
5058 | 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, | ||
5059 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
5060 | PHYREGS(0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216), | ||
5061 | }, | ||
5062 | { .freq = 4930, | ||
5063 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, | ||
5064 | 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, | ||
5065 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
5066 | 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, | ||
5067 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
5068 | PHYREGS(0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215), | ||
5069 | }, | ||
5070 | { .freq = 4940, | ||
5071 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, | ||
5072 | 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, | ||
5073 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
5074 | 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, | ||
5075 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
5076 | PHYREGS(0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214), | ||
5077 | }, | ||
5078 | { .freq = 4950, | ||
5079 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, | ||
5080 | 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, | ||
5081 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
5082 | 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, | ||
5083 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
5084 | PHYREGS(0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213), | ||
5085 | }, | ||
5086 | { .freq = 4960, | ||
5087 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, | ||
5088 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
5089 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
5090 | 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, | ||
5091 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
5092 | PHYREGS(0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212), | ||
5093 | }, | ||
5094 | { .freq = 4970, | ||
5095 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, | ||
5096 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
5097 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
5098 | 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, | ||
5099 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
5100 | PHYREGS(0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211), | ||
5101 | }, | ||
5102 | { .freq = 4980, | ||
5103 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, | ||
5104 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
5105 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
5106 | 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, | ||
5107 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
5108 | PHYREGS(0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f), | ||
5109 | }, | ||
5110 | { .freq = 4990, | ||
5111 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, | ||
5112 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
5113 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
5114 | 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, | ||
5115 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
5116 | PHYREGS(0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e), | ||
5117 | }, | ||
5118 | { .freq = 5000, | ||
5119 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04, | ||
5120 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
5121 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
5122 | 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, | ||
5123 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
5124 | PHYREGS(0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d), | ||
5125 | }, | ||
5126 | { .freq = 5010, | ||
5127 | RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04, | ||
5128 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
5129 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
5130 | 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, | ||
5131 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
5132 | PHYREGS(0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c), | ||
5133 | }, | ||
5134 | { .freq = 5020, | ||
5135 | RADIOREGS3(0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04, | ||
5136 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
5137 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
5138 | 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, | ||
5139 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
5140 | PHYREGS(0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b), | ||
5141 | }, | ||
5142 | { .freq = 5030, | ||
5143 | RADIOREGS3(0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04, | ||
5144 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
5145 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
5146 | 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, | ||
5147 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
5148 | PHYREGS(0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a), | ||
5149 | }, | ||
5150 | { .freq = 5040, | ||
5151 | RADIOREGS3(0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x04, | ||
5152 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
5153 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
5154 | 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, | ||
5155 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
5156 | PHYREGS(0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209), | ||
5157 | }, | ||
5158 | { .freq = 5050, | ||
5159 | RADIOREGS3(0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x04, | ||
5160 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
5161 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
5162 | 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, | ||
5163 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
5164 | PHYREGS(0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208), | ||
5165 | }, | ||
5166 | { .freq = 5060, | ||
5167 | RADIOREGS3(0xe6, 0x01, 0x01, 0x01, 0xfa, 0x05, 0x05, 0x04, | ||
5168 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
5169 | 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
5170 | 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, | ||
5171 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
5172 | PHYREGS(0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207), | ||
5173 | }, | ||
5174 | { .freq = 5070, | ||
5175 | RADIOREGS3(0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x04, | ||
5176 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
5177 | 0xff, 0xfd, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
5178 | 0x00, 0x6f, 0x00, 0xfd, 0x00, 0x09, 0x00, 0x77, | ||
5179 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
5180 | PHYREGS(0x07f0, 0x07ec, 0x07e8, 0x0204, 0x0205, 0x0206), | ||
5181 | }, | ||
5182 | { .freq = 5080, | ||
5183 | RADIOREGS3(0xde, 0x01, 0x01, 0x01, 0xfc, 0x05, 0x05, 0x04, | ||
5184 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
5185 | 0xff, 0xfd, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
5186 | 0x00, 0x6f, 0x00, 0xfd, 0x00, 0x09, 0x00, 0x77, | ||
5187 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
5188 | PHYREGS(0x07f4, 0x07f0, 0x07ec, 0x0203, 0x0204, 0x0205), | ||
5189 | }, | ||
5190 | { .freq = 5090, | ||
5191 | RADIOREGS3(0xde, 0x01, 0x01, 0x01, 0xfd, 0x05, 0x05, 0x04, | ||
5192 | 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, | ||
5193 | 0xff, 0xfd, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, | ||
5194 | 0x00, 0x6f, 0x00, 0xfd, 0x00, 0x09, 0x00, 0x77, | ||
5195 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
5196 | PHYREGS(0x07f8, 0x07f4, 0x07f0, 0x0202, 0x0203, 0x0204), | ||
5197 | }, | ||
5198 | { .freq = 5100, | ||
5199 | RADIOREGS3(0xd6, 0x01, 0x01, 0x01, 0xfe, 0x05, 0x05, 0x04, | ||
5200 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
5201 | 0xff, 0xfd, 0x00, 0x08, 0x00, 0x77, 0x00, 0x0f, | ||
5202 | 0x00, 0x6f, 0x00, 0xfd, 0x00, 0x08, 0x00, 0x77, | ||
5203 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
5204 | PHYREGS(0x07fc, 0x07f8, 0x07f4, 0x0201, 0x0202, 0x0203), | ||
5205 | }, | ||
5206 | { .freq = 5110, | ||
5207 | RADIOREGS3(0xd6, 0x01, 0x01, 0x01, 0xff, 0x05, 0x05, 0x04, | ||
5208 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
5209 | 0xff, 0xfc, 0x00, 0x08, 0x00, 0x77, 0x00, 0x0f, | ||
5210 | 0x00, 0x6f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x77, | ||
5211 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
5212 | PHYREGS(0x0800, 0x07fc, 0x07f8, 0x0200, 0x0201, 0x0202), | ||
5213 | }, | ||
5214 | { .freq = 5120, | ||
5215 | RADIOREGS3(0xce, 0x01, 0x01, 0x02, 0x00, 0x05, 0x05, 0x04, | ||
5216 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
5217 | 0xff, 0xfc, 0x00, 0x08, 0x00, 0x77, 0x00, 0x0f, | ||
5218 | 0x00, 0x6f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x77, | ||
5219 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
5220 | PHYREGS(0x0804, 0x0800, 0x07fc, 0x01ff, 0x0200, 0x0201), | ||
5221 | }, | ||
5222 | { .freq = 5130, | ||
5223 | RADIOREGS3(0xce, 0x01, 0x01, 0x02, 0x01, 0x05, 0x05, 0x04, | ||
5224 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
5225 | 0xff, 0xfc, 0x00, 0x08, 0x00, 0x77, 0x00, 0x0f, | ||
5226 | 0x00, 0x6f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x77, | ||
5227 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
5228 | PHYREGS(0x0808, 0x0804, 0x0800, 0x01fe, 0x01ff, 0x0200), | ||
5229 | }, | ||
5230 | { .freq = 5140, | ||
5231 | RADIOREGS3(0xc6, 0x01, 0x01, 0x02, 0x02, 0x05, 0x05, 0x04, | ||
5232 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
5233 | 0xff, 0xfb, 0x00, 0x08, 0x00, 0x77, 0x00, 0x0f, | ||
5234 | 0x00, 0x6f, 0x00, 0xfb, 0x00, 0x08, 0x00, 0x77, | ||
5235 | 0x00, 0x0f, 0x00, 0x6f, 0x00), | ||
5236 | PHYREGS(0x080c, 0x0808, 0x0804, 0x01fd, 0x01fe, 0x01ff), | ||
5237 | }, | ||
5238 | { .freq = 5160, | ||
5239 | RADIOREGS3(0xbe, 0x01, 0x01, 0x02, 0x04, 0x05, 0x05, 0x04, | ||
5240 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
5241 | 0xff, 0xfa, 0x00, 0x07, 0x00, 0x77, 0x00, 0x0e, | ||
5242 | 0x00, 0x6f, 0x00, 0xfa, 0x00, 0x07, 0x00, 0x77, | ||
5243 | 0x00, 0x0e, 0x00, 0x6f, 0x00), | ||
5244 | PHYREGS(0x0814, 0x0810, 0x080c, 0x01fb, 0x01fc, 0x01fd), | ||
5245 | }, | ||
5246 | { .freq = 5170, | ||
5247 | RADIOREGS3(0xbe, 0x01, 0x01, 0x02, 0x05, 0x05, 0x05, 0x04, | ||
5248 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
5249 | 0xff, 0xfa, 0x00, 0x07, 0x00, 0x77, 0x00, 0x0e, | ||
5250 | 0x00, 0x6f, 0x00, 0xfa, 0x00, 0x07, 0x00, 0x77, | ||
5251 | 0x00, 0x0e, 0x00, 0x6f, 0x00), | ||
5252 | PHYREGS(0x0818, 0x0814, 0x0810, 0x01fa, 0x01fb, 0x01fc), | ||
5253 | }, | ||
5254 | { .freq = 5180, | ||
5255 | RADIOREGS3(0xb6, 0x01, 0x01, 0x02, 0x06, 0x05, 0x05, 0x04, | ||
5256 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
5257 | 0xff, 0xf9, 0x00, 0x06, 0x00, 0x77, 0x00, 0x0e, | ||
5258 | 0x00, 0x6f, 0x00, 0xf9, 0x00, 0x06, 0x00, 0x77, | ||
5259 | 0x00, 0x0e, 0x00, 0x6f, 0x00), | ||
5260 | PHYREGS(0x081c, 0x0818, 0x0814, 0x01f9, 0x01fa, 0x01fb), | ||
5261 | }, | ||
5262 | { .freq = 5190, | ||
5263 | RADIOREGS3(0xb6, 0x01, 0x01, 0x02, 0x07, 0x05, 0x05, 0x04, | ||
5264 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
5265 | 0xff, 0xf9, 0x00, 0x06, 0x00, 0x77, 0x00, 0x0d, | ||
5266 | 0x00, 0x6f, 0x00, 0xf9, 0x00, 0x06, 0x00, 0x77, | ||
5267 | 0x00, 0x0d, 0x00, 0x6f, 0x00), | ||
5268 | PHYREGS(0x0820, 0x081c, 0x0818, 0x01f8, 0x01f9, 0x01fa), | ||
5269 | }, | ||
5270 | { .freq = 5200, | ||
5271 | RADIOREGS3(0xaf, 0x01, 0x01, 0x02, 0x08, 0x05, 0x05, 0x04, | ||
5272 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
5273 | 0xff, 0xf9, 0x00, 0x05, 0x00, 0x77, 0x00, 0x0d, | ||
5274 | 0x00, 0x6f, 0x00, 0xf9, 0x00, 0x05, 0x00, 0x77, | ||
5275 | 0x00, 0x0d, 0x00, 0x6f, 0x00), | ||
5276 | PHYREGS(0x0824, 0x0820, 0x081c, 0x01f7, 0x01f8, 0x01f9), | ||
5277 | }, | ||
5278 | { .freq = 5210, | ||
5279 | RADIOREGS3(0xaf, 0x01, 0x01, 0x02, 0x09, 0x05, 0x05, 0x04, | ||
5280 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, | ||
5281 | 0xff, 0xf9, 0x00, 0x05, 0x00, 0x77, 0x00, 0x0d, | ||
5282 | 0x00, 0x6f, 0x00, 0xf9, 0x00, 0x05, 0x00, 0x77, | ||
5283 | 0x00, 0x0d, 0x00, 0x6f, 0x00), | ||
5284 | PHYREGS(0x0828, 0x0824, 0x0820, 0x01f6, 0x01f7, 0x01f8), | ||
5285 | }, | ||
5286 | { .freq = 5220, | ||
5287 | RADIOREGS3(0xa7, 0x01, 0x01, 0x02, 0x0a, 0x05, 0x05, 0x04, | ||
5288 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8e, 0x0f, 0x00, | ||
5289 | 0xfe, 0xd8, 0x00, 0x05, 0x00, 0x77, 0x00, 0x0d, | ||
5290 | 0x00, 0x6f, 0x00, 0xd8, 0x00, 0x05, 0x00, 0x77, | ||
5291 | 0x00, 0x0d, 0x00, 0x6f, 0x00), | ||
5292 | PHYREGS(0x082c, 0x0828, 0x0824, 0x01f5, 0x01f6, 0x01f7), | ||
5293 | }, | ||
5294 | { .freq = 5230, | ||
5295 | RADIOREGS3(0xa7, 0x01, 0x01, 0x02, 0x0b, 0x05, 0x05, 0x04, | ||
5296 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8e, 0x0f, 0x00, | ||
5297 | 0xee, 0xd8, 0x00, 0x05, 0x00, 0x77, 0x00, 0x0d, | ||
5298 | 0x00, 0x6f, 0x00, 0xd8, 0x00, 0x05, 0x00, 0x77, | ||
5299 | 0x00, 0x0d, 0x00, 0x6f, 0x00), | ||
5300 | PHYREGS(0x0830, 0x082c, 0x0828, 0x01f4, 0x01f5, 0x01f6), | ||
5301 | }, | ||
5302 | { .freq = 5240, | ||
5303 | RADIOREGS3(0xa0, 0x01, 0x01, 0x02, 0x0c, 0x05, 0x05, 0x04, | ||
5304 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8e, 0x0f, 0x00, | ||
5305 | 0xee, 0xc8, 0x00, 0x05, 0x00, 0x77, 0x00, 0x0d, | ||
5306 | 0x00, 0x6f, 0x00, 0xc8, 0x00, 0x05, 0x00, 0x77, | ||
5307 | 0x00, 0x0d, 0x00, 0x6f, 0x00), | ||
5308 | PHYREGS(0x0834, 0x0830, 0x082c, 0x01f3, 0x01f4, 0x01f5), | ||
5309 | }, | ||
5310 | { .freq = 5250, | ||
5311 | RADIOREGS3(0xa0, 0x01, 0x01, 0x02, 0x0d, 0x05, 0x05, 0x04, | ||
5312 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8e, 0x0f, 0x00, | ||
5313 | 0xed, 0xc7, 0x00, 0x05, 0x00, 0x77, 0x00, 0x0d, | ||
5314 | 0x00, 0x6f, 0x00, 0xc7, 0x00, 0x05, 0x00, 0x77, | ||
5315 | 0x00, 0x0d, 0x00, 0x6f, 0x00), | ||
5316 | PHYREGS(0x0838, 0x0834, 0x0830, 0x01f2, 0x01f3, 0x01f4), | ||
5317 | }, | ||
5318 | { .freq = 5260, | ||
5319 | RADIOREGS3(0x98, 0x01, 0x01, 0x02, 0x0e, 0x05, 0x05, 0x04, | ||
5320 | 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8e, 0x0e, 0x00, | ||
5321 | 0xed, 0xc7, 0x00, 0x04, 0x00, 0x77, 0x00, 0x0d, | ||
5322 | 0x00, 0x6f, 0x00, 0xc7, 0x00, 0x04, 0x00, 0x77, | ||
5323 | 0x00, 0x0d, 0x00, 0x6f, 0x00), | ||
5324 | PHYREGS(0x083c, 0x0838, 0x0834, 0x01f1, 0x01f2, 0x01f3), | ||
5325 | }, | ||
5326 | { .freq = 5270, | ||
5327 | RADIOREGS3(0x98, 0x01, 0x01, 0x02, 0x0f, 0x05, 0x05, 0x04, | ||
5328 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8e, 0x0e, 0x00, | ||
5329 | 0xed, 0xc7, 0x00, 0x04, 0x00, 0x77, 0x00, 0x0c, | ||
5330 | 0x00, 0x6f, 0x00, 0xc7, 0x00, 0x04, 0x00, 0x77, | ||
5331 | 0x00, 0x0c, 0x00, 0x6f, 0x00), | ||
5332 | PHYREGS(0x0840, 0x083c, 0x0838, 0x01f0, 0x01f1, 0x01f2), | ||
5333 | }, | ||
5334 | { .freq = 5280, | ||
5335 | RADIOREGS3(0x91, 0x01, 0x01, 0x02, 0x10, 0x05, 0x05, 0x04, | ||
5336 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0e, 0x00, | ||
5337 | 0xdc, 0xb7, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0c, | ||
5338 | 0x00, 0x6f, 0x00, 0xb7, 0x00, 0x03, 0x00, 0x77, | ||
5339 | 0x00, 0x0c, 0x00, 0x6f, 0x00), | ||
5340 | PHYREGS(0x0844, 0x0840, 0x083c, 0x01f0, 0x01f0, 0x01f1), | ||
5341 | }, | ||
5342 | { .freq = 5290, | ||
5343 | RADIOREGS3(0x91, 0x01, 0x01, 0x02, 0x11, 0x05, 0x05, 0x04, | ||
5344 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0e, 0x00, | ||
5345 | 0xdc, 0xb7, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0c, | ||
5346 | 0x00, 0x6f, 0x00, 0xb7, 0x00, 0x03, 0x00, 0x77, | ||
5347 | 0x00, 0x0c, 0x00, 0x6f, 0x00), | ||
5348 | PHYREGS(0x0848, 0x0844, 0x0840, 0x01ef, 0x01f0, 0x01f0), | ||
5349 | }, | ||
5350 | { .freq = 5300, | ||
5351 | RADIOREGS3(0x8a, 0x01, 0x01, 0x02, 0x12, 0x05, 0x05, 0x04, | ||
5352 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0e, 0x00, | ||
5353 | 0xdc, 0xb7, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0c, | ||
5354 | 0x00, 0x6f, 0x00, 0xb7, 0x00, 0x03, 0x00, 0x77, | ||
5355 | 0x00, 0x0c, 0x00, 0x6f, 0x00), | ||
5356 | PHYREGS(0x084c, 0x0848, 0x0844, 0x01ee, 0x01ef, 0x01f0), | ||
5357 | }, | ||
5358 | { .freq = 5310, | ||
5359 | RADIOREGS3(0x8a, 0x01, 0x01, 0x02, 0x13, 0x05, 0x05, 0x04, | ||
5360 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0e, 0x00, | ||
5361 | 0xdc, 0xb7, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0c, | ||
5362 | 0x00, 0x6f, 0x00, 0xb7, 0x00, 0x03, 0x00, 0x77, | ||
5363 | 0x00, 0x0c, 0x00, 0x6f, 0x00), | ||
5364 | PHYREGS(0x0850, 0x084c, 0x0848, 0x01ed, 0x01ee, 0x01ef), | ||
5365 | }, | ||
5366 | { .freq = 5320, | ||
5367 | RADIOREGS3(0x83, 0x01, 0x01, 0x02, 0x14, 0x05, 0x05, 0x04, | ||
5368 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0e, 0x00, | ||
5369 | 0xdb, 0xb7, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0c, | ||
5370 | 0x00, 0x6f, 0x00, 0xb7, 0x00, 0x03, 0x00, 0x77, | ||
5371 | 0x00, 0x0c, 0x00, 0x6f, 0x00), | ||
5372 | PHYREGS(0x0854, 0x0850, 0x084c, 0x01ec, 0x01ed, 0x01ee), | ||
5373 | }, | ||
5374 | { .freq = 5330, | ||
5375 | RADIOREGS3(0x83, 0x01, 0x01, 0x02, 0x15, 0x05, 0x05, 0x04, | ||
5376 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00, | ||
5377 | 0xcb, 0xa6, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0b, | ||
5378 | 0x00, 0x6f, 0x00, 0xa6, 0x00, 0x03, 0x00, 0x77, | ||
5379 | 0x00, 0x0b, 0x00, 0x6f, 0x00), | ||
5380 | PHYREGS(0x0858, 0x0854, 0x0850, 0x01eb, 0x01ec, 0x01ed), | ||
5381 | }, | ||
5382 | { .freq = 5340, | ||
5383 | RADIOREGS3(0x7c, 0x01, 0x01, 0x02, 0x16, 0x05, 0x05, 0x04, | ||
5384 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00, | ||
5385 | 0xca, 0xa6, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0b, | ||
5386 | 0x00, 0x6f, 0x00, 0xa6, 0x00, 0x03, 0x00, 0x77, | ||
5387 | 0x00, 0x0b, 0x00, 0x6f, 0x00), | ||
5388 | PHYREGS(0x085c, 0x0858, 0x0854, 0x01ea, 0x01eb, 0x01ec), | ||
5389 | }, | ||
5390 | { .freq = 5350, | ||
5391 | RADIOREGS3(0x7c, 0x01, 0x01, 0x02, 0x17, 0x05, 0x05, 0x04, | ||
5392 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0d, 0x00, | ||
5393 | 0xca, 0xa6, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0b, | ||
5394 | 0x00, 0x6f, 0x00, 0xa6, 0x00, 0x03, 0x00, 0x77, | ||
5395 | 0x00, 0x0b, 0x00, 0x6f, 0x00), | ||
5396 | PHYREGS(0x0860, 0x085c, 0x0858, 0x01e9, 0x01ea, 0x01eb), | ||
5397 | }, | ||
5398 | { .freq = 5360, | ||
5399 | RADIOREGS3(0x75, 0x01, 0x01, 0x02, 0x18, 0x05, 0x05, 0x04, | ||
5400 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0d, 0x00, | ||
5401 | 0xc9, 0x95, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0a, | ||
5402 | 0x00, 0x6f, 0x00, 0x95, 0x00, 0x03, 0x00, 0x77, | ||
5403 | 0x00, 0x0a, 0x00, 0x6f, 0x00), | ||
5404 | PHYREGS(0x0864, 0x0860, 0x085c, 0x01e8, 0x01e9, 0x01ea), | ||
5405 | }, | ||
5406 | { .freq = 5370, | ||
5407 | RADIOREGS3(0x75, 0x01, 0x01, 0x02, 0x19, 0x05, 0x05, 0x04, | ||
5408 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0d, 0x00, | ||
5409 | 0xc9, 0x95, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0a, | ||
5410 | 0x00, 0x6f, 0x00, 0x95, 0x00, 0x03, 0x00, 0x77, | ||
5411 | 0x00, 0x0a, 0x00, 0x6f, 0x00), | ||
5412 | PHYREGS(0x0868, 0x0864, 0x0860, 0x01e7, 0x01e8, 0x01e9), | ||
5413 | }, | ||
5414 | { .freq = 5380, | ||
5415 | RADIOREGS3(0x6e, 0x01, 0x01, 0x02, 0x1a, 0x05, 0x05, 0x04, | ||
5416 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0c, 0x00, | ||
5417 | 0xb8, 0x95, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0a, | ||
5418 | 0x00, 0x6f, 0x00, 0x95, 0x00, 0x03, 0x00, 0x77, | ||
5419 | 0x00, 0x0a, 0x00, 0x6f, 0x00), | ||
5420 | PHYREGS(0x086c, 0x0868, 0x0864, 0x01e6, 0x01e7, 0x01e8), | ||
5421 | }, | ||
5422 | { .freq = 5390, | ||
5423 | RADIOREGS3(0x6e, 0x01, 0x01, 0x02, 0x1b, 0x05, 0x05, 0x04, | ||
5424 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0c, 0x00, | ||
5425 | 0xb8, 0x84, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0a, | ||
5426 | 0x00, 0x6f, 0x00, 0x84, 0x00, 0x03, 0x00, 0x77, | ||
5427 | 0x00, 0x0a, 0x00, 0x6f, 0x00), | ||
5428 | PHYREGS(0x0870, 0x086c, 0x0868, 0x01e5, 0x01e6, 0x01e7), | ||
5429 | }, | ||
5430 | { .freq = 5400, | ||
5431 | RADIOREGS3(0x67, 0x01, 0x01, 0x02, 0x1c, 0x05, 0x05, 0x04, | ||
5432 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0c, 0x00, | ||
5433 | 0xb8, 0x84, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0a, | ||
5434 | 0x00, 0x6f, 0x00, 0x84, 0x00, 0x03, 0x00, 0x77, | ||
5435 | 0x00, 0x0a, 0x00, 0x6f, 0x00), | ||
5436 | PHYREGS(0x0874, 0x0870, 0x086c, 0x01e5, 0x01e5, 0x01e6), | ||
5437 | }, | ||
5438 | { .freq = 5410, | ||
5439 | RADIOREGS3(0x67, 0x01, 0x01, 0x02, 0x1d, 0x05, 0x05, 0x04, | ||
5440 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0c, 0x00, | ||
5441 | 0xb7, 0x84, 0x00, 0x02, 0x00, 0x77, 0x00, 0x0a, | ||
5442 | 0x00, 0x6f, 0x00, 0x84, 0x00, 0x02, 0x00, 0x77, | ||
5443 | 0x00, 0x0a, 0x00, 0x6f, 0x00), | ||
5444 | PHYREGS(0x0878, 0x0874, 0x0870, 0x01e4, 0x01e5, 0x01e5), | ||
5445 | }, | ||
5446 | { .freq = 5420, | ||
5447 | RADIOREGS3(0x61, 0x01, 0x01, 0x02, 0x1e, 0x05, 0x05, 0x04, | ||
5448 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0c, 0x00, | ||
5449 | 0xa7, 0x84, 0x00, 0x02, 0x00, 0x77, 0x00, 0x0a, | ||
5450 | 0x00, 0x6f, 0x00, 0x84, 0x00, 0x02, 0x00, 0x77, | ||
5451 | 0x00, 0x0a, 0x00, 0x6f, 0x00), | ||
5452 | PHYREGS(0x087c, 0x0878, 0x0874, 0x01e3, 0x01e4, 0x01e5), | ||
5453 | }, | ||
5454 | { .freq = 5430, | ||
5455 | RADIOREGS3(0x61, 0x01, 0x01, 0x02, 0x1f, 0x05, 0x05, 0x04, | ||
5456 | 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0b, 0x00, | ||
5457 | 0xa6, 0x84, 0x00, 0x02, 0x00, 0x77, 0x00, 0x0a, | ||
5458 | 0x00, 0x6f, 0x00, 0x84, 0x00, 0x02, 0x00, 0x77, | ||
5459 | 0x00, 0x0a, 0x00, 0x6f, 0x00), | ||
5460 | PHYREGS(0x0880, 0x087c, 0x0878, 0x01e2, 0x01e3, 0x01e4), | ||
5461 | }, | ||
5462 | { .freq = 5440, | ||
5463 | RADIOREGS3(0x5a, 0x01, 0x01, 0x02, 0x20, 0x05, 0x05, 0x04, | ||
5464 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8b, 0x0b, 0x00, | ||
5465 | 0xa6, 0x84, 0x00, 0x02, 0x00, 0x77, 0x00, 0x09, | ||
5466 | 0x00, 0x6f, 0x00, 0x84, 0x00, 0x02, 0x00, 0x77, | ||
5467 | 0x00, 0x09, 0x00, 0x6f, 0x00), | ||
5468 | PHYREGS(0x0884, 0x0880, 0x087c, 0x01e1, 0x01e2, 0x01e3), | ||
5469 | }, | ||
5470 | { .freq = 5450, | ||
5471 | RADIOREGS3(0x5a, 0x01, 0x01, 0x02, 0x21, 0x05, 0x05, 0x04, | ||
5472 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8b, 0x0b, 0x00, | ||
5473 | 0x95, 0x84, 0x00, 0x01, 0x00, 0x77, 0x00, 0x09, | ||
5474 | 0x00, 0x6f, 0x00, 0x84, 0x00, 0x01, 0x00, 0x77, | ||
5475 | 0x00, 0x09, 0x00, 0x6f, 0x00), | ||
5476 | PHYREGS(0x0888, 0x0884, 0x0880, 0x01e0, 0x01e1, 0x01e2), | ||
5477 | }, | ||
5478 | { .freq = 5460, | ||
5479 | RADIOREGS3(0x53, 0x01, 0x01, 0x02, 0x22, 0x05, 0x05, 0x04, | ||
5480 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8b, 0x0b, 0x00, | ||
5481 | 0x95, 0x84, 0x00, 0x01, 0x00, 0x77, 0x00, 0x09, | ||
5482 | 0x00, 0x6f, 0x00, 0x84, 0x00, 0x01, 0x00, 0x77, | ||
5483 | 0x00, 0x09, 0x00, 0x6f, 0x00), | ||
5484 | PHYREGS(0x088c, 0x0888, 0x0884, 0x01df, 0x01e0, 0x01e1), | ||
5485 | }, | ||
5486 | { .freq = 5470, | ||
5487 | RADIOREGS3(0x53, 0x01, 0x01, 0x02, 0x23, 0x05, 0x05, 0x04, | ||
5488 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8b, 0x0b, 0x00, | ||
5489 | 0x94, 0x73, 0x00, 0x01, 0x00, 0x77, 0x00, 0x09, | ||
5490 | 0x00, 0x6f, 0x00, 0x73, 0x00, 0x01, 0x00, 0x77, | ||
5491 | 0x00, 0x09, 0x00, 0x6f, 0x00), | ||
5492 | PHYREGS(0x0890, 0x088c, 0x0888, 0x01de, 0x01df, 0x01e0), | ||
5493 | }, | ||
5494 | { .freq = 5480, | ||
5495 | RADIOREGS3(0x4d, 0x01, 0x01, 0x02, 0x24, 0x05, 0x05, 0x04, | ||
5496 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x0a, 0x00, | ||
5497 | 0x84, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09, | ||
5498 | 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77, | ||
5499 | 0x00, 0x09, 0x00, 0x6f, 0x00), | ||
5500 | PHYREGS(0x0894, 0x0890, 0x088c, 0x01dd, 0x01de, 0x01df), | ||
5501 | }, | ||
5502 | { .freq = 5490, | ||
5503 | RADIOREGS3(0x4d, 0x01, 0x01, 0x02, 0x25, 0x05, 0x05, 0x04, | ||
5504 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x0a, 0x00, | ||
5505 | 0x83, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09, | ||
5506 | 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77, | ||
5507 | 0x00, 0x09, 0x00, 0x6f, 0x00), | ||
5508 | PHYREGS(0x0898, 0x0894, 0x0890, 0x01dd, 0x01dd, 0x01de), | ||
5509 | }, | ||
5510 | { .freq = 5500, | ||
5511 | RADIOREGS3(0x47, 0x01, 0x01, 0x02, 0x26, 0x05, 0x05, 0x04, | ||
5512 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x0a, 0x00, | ||
5513 | 0x82, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09, | ||
5514 | 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77, | ||
5515 | 0x00, 0x09, 0x00, 0x6f, 0x00), | ||
5516 | PHYREGS(0x089c, 0x0898, 0x0894, 0x01dc, 0x01dd, 0x01dd), | ||
5517 | }, | ||
5518 | { .freq = 5510, | ||
5519 | RADIOREGS3(0x47, 0x01, 0x01, 0x02, 0x27, 0x05, 0x05, 0x04, | ||
5520 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x0a, 0x00, | ||
5521 | 0x82, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09, | ||
5522 | 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77, | ||
5523 | 0x00, 0x09, 0x00, 0x6f, 0x00), | ||
5524 | PHYREGS(0x08a0, 0x089c, 0x0898, 0x01db, 0x01dc, 0x01dd), | ||
5525 | }, | ||
5526 | { .freq = 5520, | ||
5527 | RADIOREGS3(0x40, 0x01, 0x01, 0x02, 0x28, 0x05, 0x05, 0x04, | ||
5528 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x0a, 0x00, | ||
5529 | 0x72, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09, | ||
5530 | 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77, | ||
5531 | 0x00, 0x09, 0x00, 0x6f, 0x00), | ||
5532 | PHYREGS(0x08a4, 0x08a0, 0x089c, 0x01da, 0x01db, 0x01dc), | ||
5533 | }, | ||
5534 | { .freq = 5530, | ||
5535 | RADIOREGS3(0x40, 0x01, 0x01, 0x02, 0x29, 0x05, 0x05, 0x04, | ||
5536 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x09, 0x00, | ||
5537 | 0x72, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09, | ||
5538 | 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77, | ||
5539 | 0x00, 0x09, 0x00, 0x6f, 0x00), | ||
5540 | PHYREGS(0x08a8, 0x08a4, 0x08a0, 0x01d9, 0x01da, 0x01db), | ||
5541 | }, | ||
5542 | { .freq = 5540, | ||
5543 | RADIOREGS3(0x3a, 0x01, 0x01, 0x02, 0x2a, 0x05, 0x05, 0x04, | ||
5544 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x09, 0x00, | ||
5545 | 0x71, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09, | ||
5546 | 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77, | ||
5547 | 0x00, 0x09, 0x00, 0x6f, 0x00), | ||
5548 | PHYREGS(0x08ac, 0x08a8, 0x08a4, 0x01d8, 0x01d9, 0x01da), | ||
5549 | }, | ||
5550 | { .freq = 5550, | ||
5551 | RADIOREGS3(0x3a, 0x01, 0x01, 0x02, 0x2b, 0x05, 0x05, 0x04, | ||
5552 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x89, 0x09, 0x00, | ||
5553 | 0x61, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09, | ||
5554 | 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77, | ||
5555 | 0x00, 0x09, 0x00, 0x6f, 0x00), | ||
5556 | PHYREGS(0x08b0, 0x08ac, 0x08a8, 0x01d7, 0x01d8, 0x01d9), | ||
5557 | }, | ||
5558 | { .freq = 5560, | ||
5559 | RADIOREGS3(0x34, 0x01, 0x01, 0x02, 0x2c, 0x05, 0x05, 0x04, | ||
5560 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x89, 0x09, 0x00, | ||
5561 | 0x61, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09, | ||
5562 | 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77, | ||
5563 | 0x00, 0x09, 0x00, 0x6f, 0x00), | ||
5564 | PHYREGS(0x08b4, 0x08b0, 0x08ac, 0x01d7, 0x01d7, 0x01d8), | ||
5565 | }, | ||
5566 | { .freq = 5570, | ||
5567 | RADIOREGS3(0x34, 0x01, 0x01, 0x02, 0x2d, 0x05, 0x05, 0x04, | ||
5568 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x89, 0x09, 0x00, | ||
5569 | 0x61, 0x62, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09, | ||
5570 | 0x00, 0x6f, 0x00, 0x62, 0x00, 0x00, 0x00, 0x77, | ||
5571 | 0x00, 0x09, 0x00, 0x6f, 0x00), | ||
5572 | PHYREGS(0x08b8, 0x08b4, 0x08b0, 0x01d6, 0x01d7, 0x01d7), | ||
5573 | }, | ||
5574 | { .freq = 5580, | ||
5575 | RADIOREGS3(0x2e, 0x01, 0x01, 0x02, 0x2e, 0x05, 0x05, 0x04, | ||
5576 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x89, 0x08, 0x00, | ||
5577 | 0x60, 0x62, 0x00, 0x00, 0x00, 0x77, 0x00, 0x08, | ||
5578 | 0x00, 0x6f, 0x00, 0x62, 0x00, 0x00, 0x00, 0x77, | ||
5579 | 0x00, 0x08, 0x00, 0x6f, 0x00), | ||
5580 | PHYREGS(0x08bc, 0x08b8, 0x08b4, 0x01d5, 0x01d6, 0x01d7), | ||
5581 | }, | ||
5582 | { .freq = 5590, | ||
5583 | RADIOREGS3(0x2e, 0x01, 0x01, 0x02, 0x2f, 0x05, 0x05, 0x04, | ||
5584 | 0x0c, 0x01, 0x04, 0x04, 0x04, 0x89, 0x08, 0x00, | ||
5585 | 0x50, 0x61, 0x00, 0x00, 0x00, 0x77, 0x00, 0x08, | ||
5586 | 0x00, 0x6f, 0x00, 0x61, 0x00, 0x00, 0x00, 0x77, | ||
5587 | 0x00, 0x08, 0x00, 0x6f, 0x00), | ||
5588 | PHYREGS(0x08c0, 0x08bc, 0x08b8, 0x01d4, 0x01d5, 0x01d6), | ||
5589 | }, | ||
5590 | { .freq = 5600, | ||
5591 | RADIOREGS3(0x28, 0x01, 0x01, 0x02, 0x30, 0x05, 0x05, 0x04, | ||
5592 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x89, 0x08, 0x00, | ||
5593 | 0x50, 0x51, 0x00, 0x00, 0x00, 0x77, 0x00, 0x08, | ||
5594 | 0x00, 0x6f, 0x00, 0x51, 0x00, 0x00, 0x00, 0x77, | ||
5595 | 0x00, 0x08, 0x00, 0x6f, 0x00), | ||
5596 | PHYREGS(0x08c4, 0x08c0, 0x08bc, 0x01d3, 0x01d4, 0x01d5), | ||
5597 | }, | ||
5598 | { .freq = 5610, | ||
5599 | RADIOREGS3(0x28, 0x01, 0x01, 0x02, 0x31, 0x05, 0x05, 0x04, | ||
5600 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x89, 0x08, 0x00, | ||
5601 | 0x50, 0x51, 0x00, 0x00, 0x00, 0x77, 0x00, 0x08, | ||
5602 | 0x00, 0x6f, 0x00, 0x51, 0x00, 0x00, 0x00, 0x77, | ||
5603 | 0x00, 0x08, 0x00, 0x6f, 0x00), | ||
5604 | PHYREGS(0x08c8, 0x08c4, 0x08c0, 0x01d2, 0x01d3, 0x01d4), | ||
5605 | }, | ||
5606 | { .freq = 5620, | ||
5607 | RADIOREGS3(0x21, 0x01, 0x01, 0x02, 0x32, 0x05, 0x05, 0x04, | ||
5608 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x89, 0x08, 0x00, | ||
5609 | 0x50, 0x50, 0x00, 0x00, 0x00, 0x77, 0x00, 0x07, | ||
5610 | 0x00, 0x6f, 0x00, 0x50, 0x00, 0x00, 0x00, 0x77, | ||
5611 | 0x00, 0x07, 0x00, 0x6f, 0x00), | ||
5612 | PHYREGS(0x08cc, 0x08c8, 0x08c4, 0x01d2, 0x01d2, 0x01d3), | ||
5613 | }, | ||
5614 | { .freq = 5630, | ||
5615 | RADIOREGS3(0x21, 0x01, 0x01, 0x02, 0x33, 0x05, 0x05, 0x04, | ||
5616 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x88, 0x07, 0x00, | ||
5617 | 0x50, 0x50, 0x00, 0x00, 0x00, 0x77, 0x00, 0x07, | ||
5618 | 0x00, 0x6f, 0x00, 0x50, 0x00, 0x00, 0x00, 0x77, | ||
5619 | 0x00, 0x07, 0x00, 0x6f, 0x00), | ||
5620 | PHYREGS(0x08d0, 0x08cc, 0x08c8, 0x01d1, 0x01d2, 0x01d2), | ||
5621 | }, | ||
5622 | { .freq = 5640, | ||
5623 | RADIOREGS3(0x1c, 0x01, 0x01, 0x02, 0x34, 0x05, 0x05, 0x04, | ||
5624 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x88, 0x07, 0x00, | ||
5625 | 0x40, 0x50, 0x00, 0x00, 0x00, 0x77, 0x00, 0x07, | ||
5626 | 0x00, 0x6f, 0x00, 0x50, 0x00, 0x00, 0x00, 0x77, | ||
5627 | 0x00, 0x07, 0x00, 0x6f, 0x00), | ||
5628 | PHYREGS(0x08d4, 0x08d0, 0x08cc, 0x01d0, 0x01d1, 0x01d2), | ||
5629 | }, | ||
5630 | { .freq = 5650, | ||
5631 | RADIOREGS3(0x1c, 0x01, 0x01, 0x02, 0x35, 0x05, 0x05, 0x04, | ||
5632 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x88, 0x07, 0x00, | ||
5633 | 0x40, 0x40, 0x00, 0x00, 0x00, 0x77, 0x00, 0x07, | ||
5634 | 0x00, 0x6f, 0x00, 0x40, 0x00, 0x00, 0x00, 0x77, | ||
5635 | 0x00, 0x07, 0x00, 0x6f, 0x00), | ||
5636 | PHYREGS(0x08d8, 0x08d4, 0x08d0, 0x01cf, 0x01d0, 0x01d1), | ||
5637 | }, | ||
5638 | { .freq = 5660, | ||
5639 | RADIOREGS3(0x16, 0x01, 0x01, 0x02, 0x36, 0x05, 0x05, 0x04, | ||
5640 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x88, 0x07, 0x00, | ||
5641 | 0x40, 0x40, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06, | ||
5642 | 0x00, 0x6f, 0x00, 0x40, 0x00, 0x00, 0x00, 0x77, | ||
5643 | 0x00, 0x06, 0x00, 0x6f, 0x00), | ||
5644 | PHYREGS(0x08dc, 0x08d8, 0x08d4, 0x01ce, 0x01cf, 0x01d0), | ||
5645 | }, | ||
5646 | { .freq = 5670, | ||
5647 | RADIOREGS3(0x16, 0x01, 0x01, 0x02, 0x37, 0x05, 0x05, 0x04, | ||
5648 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x88, 0x07, 0x00, | ||
5649 | 0x40, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06, | ||
5650 | 0x00, 0x6f, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77, | ||
5651 | 0x00, 0x06, 0x00, 0x6f, 0x00), | ||
5652 | PHYREGS(0x08e0, 0x08dc, 0x08d8, 0x01ce, 0x01ce, 0x01cf), | ||
5653 | }, | ||
5654 | { .freq = 5680, | ||
5655 | RADIOREGS3(0x10, 0x01, 0x01, 0x02, 0x38, 0x05, 0x05, 0x04, | ||
5656 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00, | ||
5657 | 0x30, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06, | ||
5658 | 0x00, 0x6f, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77, | ||
5659 | 0x00, 0x06, 0x00, 0x6f, 0x00), | ||
5660 | PHYREGS(0x08e4, 0x08e0, 0x08dc, 0x01cd, 0x01ce, 0x01ce), | ||
5661 | }, | ||
5662 | { .freq = 5690, | ||
5663 | RADIOREGS3(0x10, 0x01, 0x01, 0x02, 0x39, 0x05, 0x05, 0x04, | ||
5664 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00, | ||
5665 | 0x30, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06, | ||
5666 | 0x00, 0x6f, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77, | ||
5667 | 0x00, 0x06, 0x00, 0x6f, 0x00), | ||
5668 | PHYREGS(0x08e8, 0x08e4, 0x08e0, 0x01cc, 0x01cd, 0x01ce), | ||
5669 | }, | ||
5670 | { .freq = 5700, | ||
5671 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3a, 0x05, 0x05, 0x04, | ||
5672 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00, | ||
5673 | 0x30, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06, | ||
5674 | 0x00, 0x6e, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77, | ||
5675 | 0x00, 0x06, 0x00, 0x6e, 0x00), | ||
5676 | PHYREGS(0x08ec, 0x08e8, 0x08e4, 0x01cb, 0x01cc, 0x01cd), | ||
5677 | }, | ||
5678 | { .freq = 5710, | ||
5679 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3b, 0x05, 0x05, 0x04, | ||
5680 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00, | ||
5681 | 0x30, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06, | ||
5682 | 0x00, 0x6e, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77, | ||
5683 | 0x00, 0x06, 0x00, 0x6e, 0x00), | ||
5684 | PHYREGS(0x08f0, 0x08ec, 0x08e8, 0x01ca, 0x01cb, 0x01cc), | ||
5685 | }, | ||
5686 | { .freq = 5720, | ||
5687 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3c, 0x05, 0x05, 0x04, | ||
5688 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00, | ||
5689 | 0x30, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06, | ||
5690 | 0x00, 0x6e, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77, | ||
5691 | 0x00, 0x06, 0x00, 0x6e, 0x00), | ||
5692 | PHYREGS(0x08f4, 0x08f0, 0x08ec, 0x01c9, 0x01ca, 0x01cb), | ||
5693 | }, | ||
5694 | { .freq = 5725, | ||
5695 | RADIOREGS3(0x03, 0x01, 0x02, 0x04, 0x79, 0x07, 0x07, 0x04, | ||
5696 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00, | ||
5697 | 0x30, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06, | ||
5698 | 0x00, 0x6e, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77, | ||
5699 | 0x00, 0x06, 0x00, 0x6e, 0x00), | ||
5700 | PHYREGS(0x08f6, 0x08f2, 0x08ee, 0x01c9, 0x01ca, 0x01cb), | ||
5701 | }, | ||
5702 | { .freq = 5730, | ||
5703 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3d, 0x05, 0x05, 0x04, | ||
5704 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00, | ||
5705 | 0x20, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06, | ||
5706 | 0x00, 0x6e, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77, | ||
5707 | 0x00, 0x06, 0x00, 0x6e, 0x00), | ||
5708 | PHYREGS(0x08f8, 0x08f4, 0x08f0, 0x01c9, 0x01c9, 0x01ca), | ||
5709 | }, | ||
5710 | { .freq = 5735, | ||
5711 | RADIOREGS3(0x03, 0x01, 0x02, 0x04, 0x7b, 0x07, 0x07, 0x04, | ||
5712 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00, | ||
5713 | 0x20, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06, | ||
5714 | 0x00, 0x6d, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77, | ||
5715 | 0x00, 0x06, 0x00, 0x6d, 0x00), | ||
5716 | PHYREGS(0x08fa, 0x08f6, 0x08f2, 0x01c8, 0x01c9, 0x01ca), | ||
5717 | }, | ||
5718 | { .freq = 5740, | ||
5719 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3e, 0x05, 0x05, 0x04, | ||
5720 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00, | ||
5721 | 0x20, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06, | ||
5722 | 0x00, 0x6d, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77, | ||
5723 | 0x00, 0x06, 0x00, 0x6d, 0x00), | ||
5724 | PHYREGS(0x08fc, 0x08f8, 0x08f4, 0x01c8, 0x01c9, 0x01c9), | ||
5725 | }, | ||
5726 | { .freq = 5745, | ||
5727 | RADIOREGS3(0xfe, 0x00, 0x02, 0x04, 0x7d, 0x07, 0x07, 0x04, | ||
5728 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00, | ||
5729 | 0x20, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06, | ||
5730 | 0x00, 0x6d, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77, | ||
5731 | 0x00, 0x06, 0x00, 0x6d, 0x00), | ||
5732 | PHYREGS(0x08fe, 0x08fa, 0x08f6, 0x01c8, 0x01c8, 0x01c9), | ||
5733 | }, | ||
5734 | { .freq = 5750, | ||
5735 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3f, 0x05, 0x05, 0x04, | ||
5736 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00, | ||
5737 | 0x20, 0x20, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
5738 | 0x00, 0x6d, 0x00, 0x20, 0x00, 0x00, 0x00, 0x77, | ||
5739 | 0x00, 0x05, 0x00, 0x6d, 0x00), | ||
5740 | PHYREGS(0x0900, 0x08fc, 0x08f8, 0x01c7, 0x01c8, 0x01c9), | ||
5741 | }, | ||
5742 | { .freq = 5755, | ||
5743 | RADIOREGS3(0xfe, 0x00, 0x02, 0x04, 0x7f, 0x07, 0x07, 0x04, | ||
5744 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00, | ||
5745 | 0x10, 0x20, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
5746 | 0x00, 0x6c, 0x00, 0x20, 0x00, 0x00, 0x00, 0x77, | ||
5747 | 0x00, 0x05, 0x00, 0x6c, 0x00), | ||
5748 | PHYREGS(0x0902, 0x08fe, 0x08fa, 0x01c7, 0x01c8, 0x01c8), | ||
5749 | }, | ||
5750 | { .freq = 5760, | ||
5751 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x40, 0x05, 0x05, 0x04, | ||
5752 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x86, 0x05, 0x00, | ||
5753 | 0x10, 0x20, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
5754 | 0x00, 0x6c, 0x00, 0x20, 0x00, 0x00, 0x00, 0x77, | ||
5755 | 0x00, 0x05, 0x00, 0x6c, 0x00), | ||
5756 | PHYREGS(0x0904, 0x0900, 0x08fc, 0x01c6, 0x01c7, 0x01c8), | ||
5757 | }, | ||
5758 | { .freq = 5765, | ||
5759 | RADIOREGS3(0xf8, 0x00, 0x02, 0x04, 0x81, 0x07, 0x07, 0x04, | ||
5760 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x86, 0x05, 0x00, | ||
5761 | 0x10, 0x10, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
5762 | 0x00, 0x6c, 0x00, 0x10, 0x00, 0x00, 0x00, 0x77, | ||
5763 | 0x00, 0x05, 0x00, 0x6c, 0x00), | ||
5764 | PHYREGS(0x0906, 0x0902, 0x08fe, 0x01c6, 0x01c7, 0x01c8), | ||
5765 | }, | ||
5766 | { .freq = 5770, | ||
5767 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x41, 0x05, 0x05, 0x04, | ||
5768 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x86, 0x04, 0x00, | ||
5769 | 0x10, 0x10, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
5770 | 0x00, 0x6b, 0x00, 0x10, 0x00, 0x00, 0x00, 0x77, | ||
5771 | 0x00, 0x05, 0x00, 0x6b, 0x00), | ||
5772 | PHYREGS(0x0908, 0x0904, 0x0900, 0x01c6, 0x01c6, 0x01c7), | ||
5773 | }, | ||
5774 | { .freq = 5775, | ||
5775 | RADIOREGS3(0xf8, 0x00, 0x02, 0x04, 0x83, 0x07, 0x07, 0x04, | ||
5776 | 0x10, 0x01, 0x05, 0x05, 0x05, 0x86, 0x04, 0x00, | ||
5777 | 0x10, 0x10, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
5778 | 0x00, 0x6b, 0x00, 0x10, 0x00, 0x00, 0x00, 0x77, | ||
5779 | 0x00, 0x05, 0x00, 0x6b, 0x00), | ||
5780 | PHYREGS(0x090a, 0x0906, 0x0902, 0x01c5, 0x01c6, 0x01c7), | ||
5781 | }, | ||
5782 | { .freq = 5780, | ||
5783 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x42, 0x05, 0x05, 0x04, | ||
5784 | 0x0c, 0x01, 0x05, 0x05, 0x05, 0x86, 0x04, 0x00, | ||
5785 | 0x10, 0x10, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
5786 | 0x00, 0x6b, 0x00, 0x10, 0x00, 0x00, 0x00, 0x77, | ||
5787 | 0x00, 0x05, 0x00, 0x6b, 0x00), | ||
5788 | PHYREGS(0x090c, 0x0908, 0x0904, 0x01c5, 0x01c6, 0x01c6), | ||
5789 | }, | ||
5790 | { .freq = 5785, | ||
5791 | RADIOREGS3(0xf2, 0x00, 0x02, 0x04, 0x85, 0x07, 0x07, 0x04, | ||
5792 | 0x10, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
5793 | 0x00, 0x10, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
5794 | 0x00, 0x6b, 0x00, 0x10, 0x00, 0x00, 0x00, 0x77, | ||
5795 | 0x00, 0x05, 0x00, 0x6b, 0x00), | ||
5796 | PHYREGS(0x090e, 0x090a, 0x0906, 0x01c4, 0x01c5, 0x01c6), | ||
5797 | }, | ||
5798 | { .freq = 5790, | ||
5799 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x43, 0x05, 0x05, 0x04, | ||
5800 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
5801 | 0x00, 0x10, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
5802 | 0x00, 0x6b, 0x00, 0x10, 0x00, 0x00, 0x00, 0x77, | ||
5803 | 0x00, 0x05, 0x00, 0x6b, 0x00), | ||
5804 | PHYREGS(0x0910, 0x090c, 0x0908, 0x01c4, 0x01c5, 0x01c6), | ||
5805 | }, | ||
5806 | { .freq = 5795, | ||
5807 | RADIOREGS3(0xf2, 0x00, 0x02, 0x04, 0x87, 0x07, 0x07, 0x04, | ||
5808 | 0x10, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
5809 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
5810 | 0x00, 0x6b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
5811 | 0x00, 0x05, 0x00, 0x6b, 0x00), | ||
5812 | PHYREGS(0x0912, 0x090e, 0x090a, 0x01c4, 0x01c4, 0x01c5), | ||
5813 | }, | ||
5814 | { .freq = 5800, | ||
5815 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x44, 0x05, 0x05, 0x04, | ||
5816 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
5817 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
5818 | 0x00, 0x6b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
5819 | 0x00, 0x05, 0x00, 0x6b, 0x00), | ||
5820 | PHYREGS(0x0914, 0x0910, 0x090c, 0x01c3, 0x01c4, 0x01c5), | ||
5821 | }, | ||
5822 | { .freq = 5805, | ||
5823 | RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x89, 0x07, 0x07, 0x04, | ||
5824 | 0x10, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
5825 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
5826 | 0x00, 0x6a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
5827 | 0x00, 0x05, 0x00, 0x6a, 0x00), | ||
5828 | PHYREGS(0x0916, 0x0912, 0x090e, 0x01c3, 0x01c4, 0x01c4), | ||
5829 | }, | ||
5830 | { .freq = 5810, | ||
5831 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x45, 0x05, 0x05, 0x04, | ||
5832 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
5833 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
5834 | 0x00, 0x6a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
5835 | 0x00, 0x05, 0x00, 0x6a, 0x00), | ||
5836 | PHYREGS(0x0918, 0x0914, 0x0910, 0x01c2, 0x01c3, 0x01c4), | ||
5837 | }, | ||
5838 | { .freq = 5815, | ||
5839 | RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x8b, 0x07, 0x07, 0x04, | ||
5840 | 0x10, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
5841 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
5842 | 0x00, 0x6a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
5843 | 0x00, 0x05, 0x00, 0x6a, 0x00), | ||
5844 | PHYREGS(0x091a, 0x0916, 0x0912, 0x01c2, 0x01c3, 0x01c4), | ||
5845 | }, | ||
5846 | { .freq = 5820, | ||
5847 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x46, 0x05, 0x05, 0x04, | ||
5848 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
5849 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
5850 | 0x00, 0x6a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
5851 | 0x00, 0x05, 0x00, 0x6a, 0x00), | ||
5852 | PHYREGS(0x091c, 0x0918, 0x0914, 0x01c2, 0x01c2, 0x01c3), | ||
5853 | }, | ||
5854 | { .freq = 5825, | ||
5855 | RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x8d, 0x07, 0x07, 0x04, | ||
5856 | 0x10, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
5857 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
5858 | 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
5859 | 0x00, 0x05, 0x00, 0x69, 0x00), | ||
5860 | PHYREGS(0x091e, 0x091a, 0x0916, 0x01c1, 0x01c2, 0x01c3), | ||
5861 | }, | ||
5862 | { .freq = 5830, | ||
5863 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x47, 0x05, 0x05, 0x04, | ||
5864 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
5865 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05, | ||
5866 | 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
5867 | 0x00, 0x05, 0x00, 0x69, 0x00), | ||
5868 | PHYREGS(0x0920, 0x091c, 0x0918, 0x01c1, 0x01c2, 0x01c2), | ||
5869 | }, | ||
5870 | { .freq = 5840, | ||
5871 | RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x48, 0x05, 0x05, 0x04, | ||
5872 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, | ||
5873 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, | ||
5874 | 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
5875 | 0x00, 0x04, 0x00, 0x69, 0x00), | ||
5876 | PHYREGS(0x0924, 0x0920, 0x091c, 0x01c0, 0x01c1, 0x01c2), | ||
5877 | }, | ||
5878 | { .freq = 5850, | ||
5879 | RADIOREGS3(0xe0, 0x00, 0x01, 0x02, 0x49, 0x05, 0x05, 0x04, | ||
5880 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, | ||
5881 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, | ||
5882 | 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
5883 | 0x00, 0x04, 0x00, 0x69, 0x00), | ||
5884 | PHYREGS(0x0928, 0x0924, 0x0920, 0x01bf, 0x01c0, 0x01c1), | ||
5885 | }, | ||
5886 | { .freq = 5860, | ||
5887 | RADIOREGS3(0xde, 0x00, 0x01, 0x02, 0x4a, 0x05, 0x05, 0x04, | ||
5888 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, | ||
5889 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, | ||
5890 | 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
5891 | 0x00, 0x04, 0x00, 0x69, 0x00), | ||
5892 | PHYREGS(0x092c, 0x0928, 0x0924, 0x01bf, 0x01bf, 0x01c0), | ||
5893 | }, | ||
5894 | { .freq = 5870, | ||
5895 | RADIOREGS3(0xdb, 0x00, 0x01, 0x02, 0x4b, 0x05, 0x05, 0x04, | ||
5896 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, | ||
5897 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, | ||
5898 | 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
5899 | 0x00, 0x04, 0x00, 0x68, 0x00), | ||
5900 | PHYREGS(0x0930, 0x092c, 0x0928, 0x01be, 0x01bf, 0x01bf), | ||
5901 | }, | ||
5902 | { .freq = 5880, | ||
5903 | RADIOREGS3(0xd8, 0x00, 0x01, 0x02, 0x4c, 0x05, 0x05, 0x04, | ||
5904 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, | ||
5905 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, | ||
5906 | 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
5907 | 0x00, 0x04, 0x00, 0x68, 0x00), | ||
5908 | PHYREGS(0x0934, 0x0930, 0x092c, 0x01bd, 0x01be, 0x01bf), | ||
5909 | }, | ||
5910 | { .freq = 5890, | ||
5911 | RADIOREGS3(0xd6, 0x00, 0x01, 0x02, 0x4d, 0x05, 0x05, 0x04, | ||
5912 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, | ||
5913 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, | ||
5914 | 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
5915 | 0x00, 0x04, 0x00, 0x68, 0x00), | ||
5916 | PHYREGS(0x0938, 0x0934, 0x0930, 0x01bc, 0x01bd, 0x01be), | ||
5917 | }, | ||
5918 | { .freq = 5900, | ||
5919 | RADIOREGS3(0xd3, 0x00, 0x01, 0x02, 0x4e, 0x05, 0x05, 0x04, | ||
5920 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, | ||
5921 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, | ||
5922 | 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
5923 | 0x00, 0x04, 0x00, 0x68, 0x00), | ||
5924 | PHYREGS(0x093c, 0x0938, 0x0934, 0x01bc, 0x01bc, 0x01bd), | ||
5925 | }, | ||
5926 | { .freq = 5910, | ||
5927 | RADIOREGS3(0xd6, 0x00, 0x01, 0x02, 0x4f, 0x05, 0x05, 0x04, | ||
5928 | 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, | ||
5929 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, | ||
5930 | 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, | ||
5931 | 0x00, 0x04, 0x00, 0x68, 0x00), | ||
5932 | PHYREGS(0x0940, 0x093c, 0x0938, 0x01bb, 0x01bc, 0x01bc), | ||
5933 | }, | ||
5934 | { .freq = 2412, | ||
5935 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x6c, 0x08, 0x08, 0x04, | ||
5936 | 0x16, 0x01, 0x04, 0x04, 0x04, 0x8f, 0x30, 0x00, | ||
5937 | 0x00, 0x00, 0x78, 0x00, 0x03, 0x00, 0x70, 0x00, | ||
5938 | 0x0b, 0x00, 0x0a, 0x00, 0x89, 0x00, 0x03, 0x00, | ||
5939 | 0x70, 0x00, 0x0b, 0x00, 0x0a), | ||
5940 | PHYREGS(0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443), | ||
5941 | }, | ||
5942 | { .freq = 2417, | ||
5943 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x71, 0x08, 0x08, 0x04, | ||
5944 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
5945 | 0x00, 0x00, 0x78, 0x00, 0x03, 0x00, 0x70, 0x00, | ||
5946 | 0x0b, 0x00, 0x0a, 0x00, 0x89, 0x00, 0x03, 0x00, | ||
5947 | 0x70, 0x00, 0x0b, 0x00, 0x0a), | ||
5948 | PHYREGS(0x03cb, 0x03c7, 0x03c3, 0x0438, 0x043d, 0x0441), | ||
5949 | }, | ||
5950 | { .freq = 2422, | ||
5951 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x76, 0x08, 0x08, 0x04, | ||
5952 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
5953 | 0x00, 0x00, 0x67, 0x00, 0x03, 0x00, 0x70, 0x00, | ||
5954 | 0x0b, 0x00, 0x0a, 0x00, 0x89, 0x00, 0x03, 0x00, | ||
5955 | 0x70, 0x00, 0x0b, 0x00, 0x0a), | ||
5956 | PHYREGS(0x03cd, 0x03c9, 0x03c5, 0x0436, 0x043a, 0x043f), | ||
5957 | }, | ||
5958 | { .freq = 2427, | ||
5959 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x7b, 0x08, 0x08, 0x04, | ||
5960 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
5961 | 0x00, 0x00, 0x57, 0x00, 0x03, 0x00, 0x70, 0x00, | ||
5962 | 0x0a, 0x00, 0x0a, 0x00, 0x78, 0x00, 0x03, 0x00, | ||
5963 | 0x70, 0x00, 0x0a, 0x00, 0x0a), | ||
5964 | PHYREGS(0x03cf, 0x03cb, 0x03c7, 0x0434, 0x0438, 0x043d), | ||
5965 | }, | ||
5966 | { .freq = 2432, | ||
5967 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x80, 0x08, 0x08, 0x04, | ||
5968 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
5969 | 0x00, 0x00, 0x56, 0x00, 0x03, 0x00, 0x70, 0x00, | ||
5970 | 0x0a, 0x00, 0x0a, 0x00, 0x77, 0x00, 0x03, 0x00, | ||
5971 | 0x70, 0x00, 0x0a, 0x00, 0x0a), | ||
5972 | PHYREGS(0x03d1, 0x03cd, 0x03c9, 0x0431, 0x0436, 0x043a), | ||
5973 | }, | ||
5974 | { .freq = 2437, | ||
5975 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x85, 0x08, 0x08, 0x04, | ||
5976 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
5977 | 0x00, 0x00, 0x46, 0x00, 0x03, 0x00, 0x70, 0x00, | ||
5978 | 0x0a, 0x00, 0x0a, 0x00, 0x76, 0x00, 0x03, 0x00, | ||
5979 | 0x70, 0x00, 0x0a, 0x00, 0x0a), | ||
5980 | PHYREGS(0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438), | ||
5981 | }, | ||
5982 | { .freq = 2442, | ||
5983 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04, | ||
5984 | 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, | ||
5985 | 0x00, 0x00, 0x45, 0x00, 0x02, 0x00, 0x70, 0x00, | ||
5986 | 0x0a, 0x00, 0x0a, 0x00, 0x66, 0x00, 0x02, 0x00, | ||
5987 | 0x70, 0x00, 0x0a, 0x00, 0x0a), | ||
5988 | PHYREGS(0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436), | ||
5989 | }, | ||
5990 | { .freq = 2447, | ||
5991 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04, | ||
5992 | 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, | ||
5993 | 0x00, 0x00, 0x34, 0x00, 0x02, 0x00, 0x70, 0x00, | ||
5994 | 0x0a, 0x00, 0x09, 0x00, 0x55, 0x00, 0x02, 0x00, | ||
5995 | 0x70, 0x00, 0x0a, 0x00, 0x09), | ||
5996 | PHYREGS(0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434), | ||
5997 | }, | ||
5998 | { .freq = 2452, | ||
5999 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04, | ||
6000 | 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, | ||
6001 | 0x00, 0x00, 0x23, 0x00, 0x02, 0x00, 0x70, 0x00, | ||
6002 | 0x0a, 0x00, 0x09, 0x00, 0x45, 0x00, 0x02, 0x00, | ||
6003 | 0x70, 0x00, 0x0a, 0x00, 0x09), | ||
6004 | PHYREGS(0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431), | ||
6005 | }, | ||
6006 | { .freq = 2457, | ||
6007 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04, | ||
6008 | 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, | ||
6009 | 0x00, 0x00, 0x12, 0x00, 0x02, 0x00, 0x70, 0x00, | ||
6010 | 0x0a, 0x00, 0x09, 0x00, 0x34, 0x00, 0x02, 0x00, | ||
6011 | 0x70, 0x00, 0x0a, 0x00, 0x09), | ||
6012 | PHYREGS(0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f), | ||
6013 | }, | ||
6014 | { .freq = 2462, | ||
6015 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04, | ||
6016 | 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, | ||
6017 | 0x00, 0x00, 0x02, 0x00, 0x02, 0x00, 0x70, 0x00, | ||
6018 | 0x09, 0x00, 0x09, 0x00, 0x33, 0x00, 0x02, 0x00, | ||
6019 | 0x70, 0x00, 0x09, 0x00, 0x09), | ||
6020 | PHYREGS(0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d), | ||
6021 | }, | ||
6022 | { .freq = 2467, | ||
6023 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04, | ||
6024 | 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, | ||
6025 | 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 0x70, 0x00, | ||
6026 | 0x09, 0x00, 0x09, 0x00, 0x22, 0x00, 0x02, 0x00, | ||
6027 | 0x70, 0x00, 0x09, 0x00, 0x09), | ||
6028 | PHYREGS(0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b), | ||
6029 | }, | ||
6030 | { .freq = 2472, | ||
6031 | RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, | ||
6032 | 0x16, 0x01, 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, | ||
6033 | 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 0x70, 0x00, | ||
6034 | 0x09, 0x00, 0x09, 0x00, 0x11, 0x00, 0x02, 0x00, | ||
6035 | 0x70, 0x00, 0x09, 0x00, 0x09), | ||
6036 | PHYREGS(0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429), | ||
6037 | }, | ||
6038 | { .freq = 2484, | ||
6039 | RADIOREGS3(0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, | ||
6040 | 0x16, 0x01, 0x07, 0x07, 0x07, 0x8f, 0x20, 0x00, | ||
6041 | 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00, | ||
6042 | 0x09, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x00, | ||
6043 | 0x70, 0x00, 0x09, 0x00, 0x09), | ||
6044 | PHYREGS(0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424), | ||
6045 | }, | ||
78 | }; | 6046 | }; |
79 | 6047 | ||
80 | /* TODO: add support for rev4+ devices by searching in rev4+ tables */ | 6048 | /* TODO: add support for rev4+ devices by searching in rev4+ tables */ |
diff --git a/drivers/net/wireless/b43/rfkill.c b/drivers/net/wireless/b43/rfkill.c index 78016ae21c50..86bc0a0f735c 100644 --- a/drivers/net/wireless/b43/rfkill.c +++ b/drivers/net/wireless/b43/rfkill.c | |||
@@ -28,23 +28,8 @@ | |||
28 | /* Returns TRUE, if the radio is enabled in hardware. */ | 28 | /* Returns TRUE, if the radio is enabled in hardware. */ |
29 | bool b43_is_hw_radio_enabled(struct b43_wldev *dev) | 29 | bool b43_is_hw_radio_enabled(struct b43_wldev *dev) |
30 | { | 30 | { |
31 | if (dev->phy.rev >= 3 || dev->phy.type == B43_PHYTYPE_LP) { | 31 | return !(b43_read32(dev, B43_MMIO_RADIO_HWENABLED_HI) |
32 | if (!(b43_read32(dev, B43_MMIO_RADIO_HWENABLED_HI) | 32 | & B43_MMIO_RADIO_HWENABLED_HI_MASK); |
33 | & B43_MMIO_RADIO_HWENABLED_HI_MASK)) | ||
34 | return 1; | ||
35 | } else { | ||
36 | /* To prevent CPU fault on PPC, do not read a register | ||
37 | * unless the interface is started; however, on resume | ||
38 | * for hibernation, this routine is entered early. When | ||
39 | * that happens, unconditionally return TRUE. | ||
40 | */ | ||
41 | if (b43_status(dev) < B43_STAT_STARTED) | ||
42 | return 1; | ||
43 | if (b43_read16(dev, B43_MMIO_RADIO_HWENABLED_LO) | ||
44 | & B43_MMIO_RADIO_HWENABLED_LO_MASK) | ||
45 | return 1; | ||
46 | } | ||
47 | return 0; | ||
48 | } | 33 | } |
49 | 34 | ||
50 | /* The poll callback for the hardware button. */ | 35 | /* The poll callback for the hardware button. */ |
diff --git a/drivers/net/wireless/b43/sdio.c b/drivers/net/wireless/b43/sdio.c index 9a55338d957f..09e2dfd7b175 100644 --- a/drivers/net/wireless/b43/sdio.c +++ b/drivers/net/wireless/b43/sdio.c | |||
@@ -163,6 +163,7 @@ static int b43_sdio_probe(struct sdio_func *func, | |||
163 | err_free_ssb: | 163 | err_free_ssb: |
164 | kfree(sdio); | 164 | kfree(sdio); |
165 | err_disable_func: | 165 | err_disable_func: |
166 | sdio_claim_host(func); | ||
166 | sdio_disable_func(func); | 167 | sdio_disable_func(func); |
167 | err_release_host: | 168 | err_release_host: |
168 | sdio_release_host(func); | 169 | sdio_release_host(func); |
diff --git a/drivers/net/wireless/b43legacy/main.c b/drivers/net/wireless/b43legacy/main.c index 67f18ecdb3bf..1f11e1670bf0 100644 --- a/drivers/net/wireless/b43legacy/main.c +++ b/drivers/net/wireless/b43legacy/main.c | |||
@@ -181,52 +181,75 @@ static int b43legacy_ratelimit(struct b43legacy_wl *wl) | |||
181 | 181 | ||
182 | void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...) | 182 | void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...) |
183 | { | 183 | { |
184 | struct va_format vaf; | ||
184 | va_list args; | 185 | va_list args; |
185 | 186 | ||
186 | if (!b43legacy_ratelimit(wl)) | 187 | if (!b43legacy_ratelimit(wl)) |
187 | return; | 188 | return; |
189 | |||
188 | va_start(args, fmt); | 190 | va_start(args, fmt); |
189 | printk(KERN_INFO "b43legacy-%s: ", | 191 | |
190 | (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan"); | 192 | vaf.fmt = fmt; |
191 | vprintk(fmt, args); | 193 | vaf.va = &args; |
194 | |||
195 | printk(KERN_INFO "b43legacy-%s: %pV", | ||
196 | (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf); | ||
197 | |||
192 | va_end(args); | 198 | va_end(args); |
193 | } | 199 | } |
194 | 200 | ||
195 | void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...) | 201 | void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...) |
196 | { | 202 | { |
203 | struct va_format vaf; | ||
197 | va_list args; | 204 | va_list args; |
198 | 205 | ||
199 | if (!b43legacy_ratelimit(wl)) | 206 | if (!b43legacy_ratelimit(wl)) |
200 | return; | 207 | return; |
208 | |||
201 | va_start(args, fmt); | 209 | va_start(args, fmt); |
202 | printk(KERN_ERR "b43legacy-%s ERROR: ", | 210 | |
203 | (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan"); | 211 | vaf.fmt = fmt; |
204 | vprintk(fmt, args); | 212 | vaf.va = &args; |
213 | |||
214 | printk(KERN_ERR "b43legacy-%s ERROR: %pV", | ||
215 | (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf); | ||
216 | |||
205 | va_end(args); | 217 | va_end(args); |
206 | } | 218 | } |
207 | 219 | ||
208 | void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...) | 220 | void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...) |
209 | { | 221 | { |
222 | struct va_format vaf; | ||
210 | va_list args; | 223 | va_list args; |
211 | 224 | ||
212 | if (!b43legacy_ratelimit(wl)) | 225 | if (!b43legacy_ratelimit(wl)) |
213 | return; | 226 | return; |
227 | |||
214 | va_start(args, fmt); | 228 | va_start(args, fmt); |
215 | printk(KERN_WARNING "b43legacy-%s warning: ", | 229 | |
216 | (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan"); | 230 | vaf.fmt = fmt; |
217 | vprintk(fmt, args); | 231 | vaf.va = &args; |
232 | |||
233 | printk(KERN_WARNING "b43legacy-%s warning: %pV", | ||
234 | (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf); | ||
235 | |||
218 | va_end(args); | 236 | va_end(args); |
219 | } | 237 | } |
220 | 238 | ||
221 | #if B43legacy_DEBUG | 239 | #if B43legacy_DEBUG |
222 | void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...) | 240 | void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...) |
223 | { | 241 | { |
242 | struct va_format vaf; | ||
224 | va_list args; | 243 | va_list args; |
225 | 244 | ||
226 | va_start(args, fmt); | 245 | va_start(args, fmt); |
227 | printk(KERN_DEBUG "b43legacy-%s debug: ", | 246 | |
228 | (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan"); | 247 | vaf.fmt = fmt; |
229 | vprintk(fmt, args); | 248 | vaf.va = &args; |
249 | |||
250 | printk(KERN_DEBUG "b43legacy-%s debug: %pV", | ||
251 | (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf); | ||
252 | |||
230 | va_end(args); | 253 | va_end(args); |
231 | } | 254 | } |
232 | #endif /* DEBUG */ | 255 | #endif /* DEBUG */ |
diff --git a/drivers/net/wireless/iwlwifi/Makefile b/drivers/net/wireless/iwlwifi/Makefile index 01aa2468bd69..93380f97835f 100644 --- a/drivers/net/wireless/iwlwifi/Makefile +++ b/drivers/net/wireless/iwlwifi/Makefile | |||
@@ -7,6 +7,10 @@ iwlcore-$(CONFIG_IWL4965) += iwl-legacy.o | |||
7 | iwlcore-$(CONFIG_IWLWIFI_DEBUGFS) += iwl-debugfs.o | 7 | iwlcore-$(CONFIG_IWLWIFI_DEBUGFS) += iwl-debugfs.o |
8 | iwlcore-$(CONFIG_IWLWIFI_DEVICE_TRACING) += iwl-devtrace.o | 8 | iwlcore-$(CONFIG_IWLWIFI_DEVICE_TRACING) += iwl-devtrace.o |
9 | 9 | ||
10 | # If 3945 is selected only, iwl-legacy.o will be added | ||
11 | # to iwlcore-m above, but it needs to be built in. | ||
12 | iwlcore-objs += $(iwlcore-m) | ||
13 | |||
10 | CFLAGS_iwl-devtrace.o := -I$(src) | 14 | CFLAGS_iwl-devtrace.o := -I$(src) |
11 | 15 | ||
12 | # AGN | 16 | # AGN |
diff --git a/drivers/net/wireless/iwlwifi/iwl-1000.c b/drivers/net/wireless/iwlwifi/iwl-1000.c index 068f1e1e3297..3100a72b9b44 100644 --- a/drivers/net/wireless/iwlwifi/iwl-1000.c +++ b/drivers/net/wireless/iwlwifi/iwl-1000.c | |||
@@ -278,7 +278,6 @@ struct iwl_cfg iwl1000_bgn_cfg = { | |||
278 | .fw_name_pre = IWL1000_FW_PRE, | 278 | .fw_name_pre = IWL1000_FW_PRE, |
279 | .ucode_api_max = IWL1000_UCODE_API_MAX, | 279 | .ucode_api_max = IWL1000_UCODE_API_MAX, |
280 | .ucode_api_min = IWL1000_UCODE_API_MIN, | 280 | .ucode_api_min = IWL1000_UCODE_API_MIN, |
281 | .sku = IWL_SKU_G|IWL_SKU_N, | ||
282 | .valid_tx_ant = ANT_A, | 281 | .valid_tx_ant = ANT_A, |
283 | .valid_rx_ant = ANT_AB, | 282 | .valid_rx_ant = ANT_AB, |
284 | .eeprom_ver = EEPROM_1000_EEPROM_VERSION, | 283 | .eeprom_ver = EEPROM_1000_EEPROM_VERSION, |
@@ -287,6 +286,7 @@ struct iwl_cfg iwl1000_bgn_cfg = { | |||
287 | .mod_params = &iwlagn_mod_params, | 286 | .mod_params = &iwlagn_mod_params, |
288 | .base_params = &iwl1000_base_params, | 287 | .base_params = &iwl1000_base_params, |
289 | .ht_params = &iwl1000_ht_params, | 288 | .ht_params = &iwl1000_ht_params, |
289 | .led_mode = IWL_LED_BLINK, | ||
290 | }; | 290 | }; |
291 | 291 | ||
292 | struct iwl_cfg iwl1000_bg_cfg = { | 292 | struct iwl_cfg iwl1000_bg_cfg = { |
@@ -294,7 +294,6 @@ struct iwl_cfg iwl1000_bg_cfg = { | |||
294 | .fw_name_pre = IWL1000_FW_PRE, | 294 | .fw_name_pre = IWL1000_FW_PRE, |
295 | .ucode_api_max = IWL1000_UCODE_API_MAX, | 295 | .ucode_api_max = IWL1000_UCODE_API_MAX, |
296 | .ucode_api_min = IWL1000_UCODE_API_MIN, | 296 | .ucode_api_min = IWL1000_UCODE_API_MIN, |
297 | .sku = IWL_SKU_G, | ||
298 | .valid_tx_ant = ANT_A, | 297 | .valid_tx_ant = ANT_A, |
299 | .valid_rx_ant = ANT_AB, | 298 | .valid_rx_ant = ANT_AB, |
300 | .eeprom_ver = EEPROM_1000_EEPROM_VERSION, | 299 | .eeprom_ver = EEPROM_1000_EEPROM_VERSION, |
@@ -302,6 +301,7 @@ struct iwl_cfg iwl1000_bg_cfg = { | |||
302 | .ops = &iwl1000_ops, | 301 | .ops = &iwl1000_ops, |
303 | .mod_params = &iwlagn_mod_params, | 302 | .mod_params = &iwlagn_mod_params, |
304 | .base_params = &iwl1000_base_params, | 303 | .base_params = &iwl1000_base_params, |
304 | .led_mode = IWL_LED_BLINK, | ||
305 | }; | 305 | }; |
306 | 306 | ||
307 | struct iwl_cfg iwl100_bgn_cfg = { | 307 | struct iwl_cfg iwl100_bgn_cfg = { |
@@ -309,7 +309,6 @@ struct iwl_cfg iwl100_bgn_cfg = { | |||
309 | .fw_name_pre = IWL100_FW_PRE, | 309 | .fw_name_pre = IWL100_FW_PRE, |
310 | .ucode_api_max = IWL100_UCODE_API_MAX, | 310 | .ucode_api_max = IWL100_UCODE_API_MAX, |
311 | .ucode_api_min = IWL100_UCODE_API_MIN, | 311 | .ucode_api_min = IWL100_UCODE_API_MIN, |
312 | .sku = IWL_SKU_G|IWL_SKU_N, | ||
313 | .valid_tx_ant = ANT_A, | 312 | .valid_tx_ant = ANT_A, |
314 | .valid_rx_ant = ANT_A, | 313 | .valid_rx_ant = ANT_A, |
315 | .eeprom_ver = EEPROM_1000_EEPROM_VERSION, | 314 | .eeprom_ver = EEPROM_1000_EEPROM_VERSION, |
@@ -318,6 +317,7 @@ struct iwl_cfg iwl100_bgn_cfg = { | |||
318 | .mod_params = &iwlagn_mod_params, | 317 | .mod_params = &iwlagn_mod_params, |
319 | .base_params = &iwl1000_base_params, | 318 | .base_params = &iwl1000_base_params, |
320 | .ht_params = &iwl1000_ht_params, | 319 | .ht_params = &iwl1000_ht_params, |
320 | .led_mode = IWL_LED_RF_STATE, | ||
321 | }; | 321 | }; |
322 | 322 | ||
323 | struct iwl_cfg iwl100_bg_cfg = { | 323 | struct iwl_cfg iwl100_bg_cfg = { |
@@ -325,7 +325,6 @@ struct iwl_cfg iwl100_bg_cfg = { | |||
325 | .fw_name_pre = IWL100_FW_PRE, | 325 | .fw_name_pre = IWL100_FW_PRE, |
326 | .ucode_api_max = IWL100_UCODE_API_MAX, | 326 | .ucode_api_max = IWL100_UCODE_API_MAX, |
327 | .ucode_api_min = IWL100_UCODE_API_MIN, | 327 | .ucode_api_min = IWL100_UCODE_API_MIN, |
328 | .sku = IWL_SKU_G, | ||
329 | .valid_tx_ant = ANT_A, | 328 | .valid_tx_ant = ANT_A, |
330 | .valid_rx_ant = ANT_A, | 329 | .valid_rx_ant = ANT_A, |
331 | .eeprom_ver = EEPROM_1000_EEPROM_VERSION, | 330 | .eeprom_ver = EEPROM_1000_EEPROM_VERSION, |
@@ -333,6 +332,7 @@ struct iwl_cfg iwl100_bg_cfg = { | |||
333 | .ops = &iwl1000_ops, | 332 | .ops = &iwl1000_ops, |
334 | .mod_params = &iwlagn_mod_params, | 333 | .mod_params = &iwlagn_mod_params, |
335 | .base_params = &iwl1000_base_params, | 334 | .base_params = &iwl1000_base_params, |
335 | .led_mode = IWL_LED_RF_STATE, | ||
336 | }; | 336 | }; |
337 | 337 | ||
338 | MODULE_FIRMWARE(IWL1000_MODULE_FIRMWARE(IWL1000_UCODE_API_MAX)); | 338 | MODULE_FIRMWARE(IWL1000_MODULE_FIRMWARE(IWL1000_UCODE_API_MAX)); |
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945.c b/drivers/net/wireless/iwlwifi/iwl-3945.c index ebac04b7887c..d39f449a9bb0 100644 --- a/drivers/net/wireless/iwlwifi/iwl-3945.c +++ b/drivers/net/wireless/iwlwifi/iwl-3945.c | |||
@@ -116,7 +116,7 @@ void iwl3945_disable_events(struct iwl_priv *priv) | |||
116 | u32 base; /* SRAM address of event log header */ | 116 | u32 base; /* SRAM address of event log header */ |
117 | u32 disable_ptr; /* SRAM address of event-disable bitmap array */ | 117 | u32 disable_ptr; /* SRAM address of event-disable bitmap array */ |
118 | u32 array_size; /* # of u32 entries in array */ | 118 | u32 array_size; /* # of u32 entries in array */ |
119 | u32 evt_disable[IWL_EVT_DISABLE_SIZE] = { | 119 | static const u32 evt_disable[IWL_EVT_DISABLE_SIZE] = { |
120 | 0x00000000, /* 31 - 0 Event id numbers */ | 120 | 0x00000000, /* 31 - 0 Event id numbers */ |
121 | 0x00000000, /* 63 - 32 */ | 121 | 0x00000000, /* 63 - 32 */ |
122 | 0x00000000, /* 95 - 64 */ | 122 | 0x00000000, /* 95 - 64 */ |
@@ -297,7 +297,7 @@ static void iwl3945_tx_queue_reclaim(struct iwl_priv *priv, | |||
297 | if (iwl_queue_space(q) > q->low_mark && (txq_id >= 0) && | 297 | if (iwl_queue_space(q) > q->low_mark && (txq_id >= 0) && |
298 | (txq_id != IWL39_CMD_QUEUE_NUM) && | 298 | (txq_id != IWL39_CMD_QUEUE_NUM) && |
299 | priv->mac80211_registered) | 299 | priv->mac80211_registered) |
300 | iwl_wake_queue(priv, txq_id); | 300 | iwl_wake_queue(priv, txq); |
301 | } | 301 | } |
302 | 302 | ||
303 | /** | 303 | /** |
@@ -2788,6 +2788,7 @@ static struct iwl_cfg iwl3945_bg_cfg = { | |||
2788 | .ops = &iwl3945_ops, | 2788 | .ops = &iwl3945_ops, |
2789 | .mod_params = &iwl3945_mod_params, | 2789 | .mod_params = &iwl3945_mod_params, |
2790 | .base_params = &iwl3945_base_params, | 2790 | .base_params = &iwl3945_base_params, |
2791 | .led_mode = IWL_LED_BLINK, | ||
2791 | }; | 2792 | }; |
2792 | 2793 | ||
2793 | static struct iwl_cfg iwl3945_abg_cfg = { | 2794 | static struct iwl_cfg iwl3945_abg_cfg = { |
@@ -2800,6 +2801,7 @@ static struct iwl_cfg iwl3945_abg_cfg = { | |||
2800 | .ops = &iwl3945_ops, | 2801 | .ops = &iwl3945_ops, |
2801 | .mod_params = &iwl3945_mod_params, | 2802 | .mod_params = &iwl3945_mod_params, |
2802 | .base_params = &iwl3945_base_params, | 2803 | .base_params = &iwl3945_base_params, |
2804 | .led_mode = IWL_LED_BLINK, | ||
2803 | }; | 2805 | }; |
2804 | 2806 | ||
2805 | DEFINE_PCI_DEVICE_TABLE(iwl3945_hw_card_ids) = { | 2807 | DEFINE_PCI_DEVICE_TABLE(iwl3945_hw_card_ids) = { |
diff --git a/drivers/net/wireless/iwlwifi/iwl-4965.c b/drivers/net/wireless/iwlwifi/iwl-4965.c index 4748d067eb1d..6788ceb37686 100644 --- a/drivers/net/wireless/iwlwifi/iwl-4965.c +++ b/drivers/net/wireless/iwlwifi/iwl-4965.c | |||
@@ -2238,12 +2238,8 @@ static void iwl4965_rx_reply_tx(struct iwl_priv *priv, | |||
2238 | 2238 | ||
2239 | if (priv->mac80211_registered && | 2239 | if (priv->mac80211_registered && |
2240 | (iwl_queue_space(&txq->q) > txq->q.low_mark) && | 2240 | (iwl_queue_space(&txq->q) > txq->q.low_mark) && |
2241 | (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) { | 2241 | (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) |
2242 | if (agg->state == IWL_AGG_OFF) | 2242 | iwl_wake_queue(priv, txq); |
2243 | iwl_wake_queue(priv, txq_id); | ||
2244 | else | ||
2245 | iwl_wake_queue(priv, txq->swq_id); | ||
2246 | } | ||
2247 | } | 2243 | } |
2248 | } else { | 2244 | } else { |
2249 | info->status.rates[0].count = tx_resp->failure_frame + 1; | 2245 | info->status.rates[0].count = tx_resp->failure_frame + 1; |
@@ -2267,7 +2263,7 @@ static void iwl4965_rx_reply_tx(struct iwl_priv *priv, | |||
2267 | 2263 | ||
2268 | if (priv->mac80211_registered && | 2264 | if (priv->mac80211_registered && |
2269 | (iwl_queue_space(&txq->q) > txq->q.low_mark)) | 2265 | (iwl_queue_space(&txq->q) > txq->q.low_mark)) |
2270 | iwl_wake_queue(priv, txq_id); | 2266 | iwl_wake_queue(priv, txq); |
2271 | } | 2267 | } |
2272 | if (qc && likely(sta_id != IWL_INVALID_STATION)) | 2268 | if (qc && likely(sta_id != IWL_INVALID_STATION)) |
2273 | iwlagn_txq_check_empty(priv, sta_id, tid, txq_id); | 2269 | iwlagn_txq_check_empty(priv, sta_id, tid, txq_id); |
@@ -2620,6 +2616,7 @@ static struct iwl_base_params iwl4965_base_params = { | |||
2620 | .ucode_tracing = true, | 2616 | .ucode_tracing = true, |
2621 | .sensitivity_calib_by_driver = true, | 2617 | .sensitivity_calib_by_driver = true, |
2622 | .chain_noise_calib_by_driver = true, | 2618 | .chain_noise_calib_by_driver = true, |
2619 | .no_agg_framecnt_info = true, | ||
2623 | }; | 2620 | }; |
2624 | 2621 | ||
2625 | struct iwl_cfg iwl4965_agn_cfg = { | 2622 | struct iwl_cfg iwl4965_agn_cfg = { |
@@ -2627,7 +2624,6 @@ struct iwl_cfg iwl4965_agn_cfg = { | |||
2627 | .fw_name_pre = IWL4965_FW_PRE, | 2624 | .fw_name_pre = IWL4965_FW_PRE, |
2628 | .ucode_api_max = IWL4965_UCODE_API_MAX, | 2625 | .ucode_api_max = IWL4965_UCODE_API_MAX, |
2629 | .ucode_api_min = IWL4965_UCODE_API_MIN, | 2626 | .ucode_api_min = IWL4965_UCODE_API_MIN, |
2630 | .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N, | ||
2631 | .valid_tx_ant = ANT_AB, | 2627 | .valid_tx_ant = ANT_AB, |
2632 | .valid_rx_ant = ANT_ABC, | 2628 | .valid_rx_ant = ANT_ABC, |
2633 | .eeprom_ver = EEPROM_4965_EEPROM_VERSION, | 2629 | .eeprom_ver = EEPROM_4965_EEPROM_VERSION, |
@@ -2635,6 +2631,7 @@ struct iwl_cfg iwl4965_agn_cfg = { | |||
2635 | .ops = &iwl4965_ops, | 2631 | .ops = &iwl4965_ops, |
2636 | .mod_params = &iwlagn_mod_params, | 2632 | .mod_params = &iwlagn_mod_params, |
2637 | .base_params = &iwl4965_base_params, | 2633 | .base_params = &iwl4965_base_params, |
2634 | .led_mode = IWL_LED_BLINK, | ||
2638 | /* | 2635 | /* |
2639 | * Force use of chains B and C for scan RX on 5 GHz band | 2636 | * Force use of chains B and C for scan RX on 5 GHz band |
2640 | * because the device has off-channel reception on chain A. | 2637 | * because the device has off-channel reception on chain A. |
diff --git a/drivers/net/wireless/iwlwifi/iwl-5000.c b/drivers/net/wireless/iwlwifi/iwl-5000.c index ad43f0fdf919..3ee0f7c035cf 100644 --- a/drivers/net/wireless/iwlwifi/iwl-5000.c +++ b/drivers/net/wireless/iwlwifi/iwl-5000.c | |||
@@ -527,7 +527,6 @@ struct iwl_cfg iwl5300_agn_cfg = { | |||
527 | .fw_name_pre = IWL5000_FW_PRE, | 527 | .fw_name_pre = IWL5000_FW_PRE, |
528 | .ucode_api_max = IWL5000_UCODE_API_MAX, | 528 | .ucode_api_max = IWL5000_UCODE_API_MAX, |
529 | .ucode_api_min = IWL5000_UCODE_API_MIN, | 529 | .ucode_api_min = IWL5000_UCODE_API_MIN, |
530 | .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N, | ||
531 | .valid_tx_ant = ANT_ABC, | 530 | .valid_tx_ant = ANT_ABC, |
532 | .valid_rx_ant = ANT_ABC, | 531 | .valid_rx_ant = ANT_ABC, |
533 | .eeprom_ver = EEPROM_5000_EEPROM_VERSION, | 532 | .eeprom_ver = EEPROM_5000_EEPROM_VERSION, |
@@ -536,6 +535,7 @@ struct iwl_cfg iwl5300_agn_cfg = { | |||
536 | .mod_params = &iwlagn_mod_params, | 535 | .mod_params = &iwlagn_mod_params, |
537 | .base_params = &iwl5000_base_params, | 536 | .base_params = &iwl5000_base_params, |
538 | .ht_params = &iwl5000_ht_params, | 537 | .ht_params = &iwl5000_ht_params, |
538 | .led_mode = IWL_LED_BLINK, | ||
539 | }; | 539 | }; |
540 | 540 | ||
541 | struct iwl_cfg iwl5100_bgn_cfg = { | 541 | struct iwl_cfg iwl5100_bgn_cfg = { |
@@ -543,7 +543,6 @@ struct iwl_cfg iwl5100_bgn_cfg = { | |||
543 | .fw_name_pre = IWL5000_FW_PRE, | 543 | .fw_name_pre = IWL5000_FW_PRE, |
544 | .ucode_api_max = IWL5000_UCODE_API_MAX, | 544 | .ucode_api_max = IWL5000_UCODE_API_MAX, |
545 | .ucode_api_min = IWL5000_UCODE_API_MIN, | 545 | .ucode_api_min = IWL5000_UCODE_API_MIN, |
546 | .sku = IWL_SKU_G|IWL_SKU_N, | ||
547 | .valid_tx_ant = ANT_B, | 546 | .valid_tx_ant = ANT_B, |
548 | .valid_rx_ant = ANT_AB, | 547 | .valid_rx_ant = ANT_AB, |
549 | .eeprom_ver = EEPROM_5000_EEPROM_VERSION, | 548 | .eeprom_ver = EEPROM_5000_EEPROM_VERSION, |
@@ -552,6 +551,7 @@ struct iwl_cfg iwl5100_bgn_cfg = { | |||
552 | .mod_params = &iwlagn_mod_params, | 551 | .mod_params = &iwlagn_mod_params, |
553 | .base_params = &iwl5000_base_params, | 552 | .base_params = &iwl5000_base_params, |
554 | .ht_params = &iwl5000_ht_params, | 553 | .ht_params = &iwl5000_ht_params, |
554 | .led_mode = IWL_LED_BLINK, | ||
555 | }; | 555 | }; |
556 | 556 | ||
557 | struct iwl_cfg iwl5100_abg_cfg = { | 557 | struct iwl_cfg iwl5100_abg_cfg = { |
@@ -559,7 +559,6 @@ struct iwl_cfg iwl5100_abg_cfg = { | |||
559 | .fw_name_pre = IWL5000_FW_PRE, | 559 | .fw_name_pre = IWL5000_FW_PRE, |
560 | .ucode_api_max = IWL5000_UCODE_API_MAX, | 560 | .ucode_api_max = IWL5000_UCODE_API_MAX, |
561 | .ucode_api_min = IWL5000_UCODE_API_MIN, | 561 | .ucode_api_min = IWL5000_UCODE_API_MIN, |
562 | .sku = IWL_SKU_A|IWL_SKU_G, | ||
563 | .valid_tx_ant = ANT_B, | 562 | .valid_tx_ant = ANT_B, |
564 | .valid_rx_ant = ANT_AB, | 563 | .valid_rx_ant = ANT_AB, |
565 | .eeprom_ver = EEPROM_5000_EEPROM_VERSION, | 564 | .eeprom_ver = EEPROM_5000_EEPROM_VERSION, |
@@ -567,6 +566,7 @@ struct iwl_cfg iwl5100_abg_cfg = { | |||
567 | .ops = &iwl5000_ops, | 566 | .ops = &iwl5000_ops, |
568 | .mod_params = &iwlagn_mod_params, | 567 | .mod_params = &iwlagn_mod_params, |
569 | .base_params = &iwl5000_base_params, | 568 | .base_params = &iwl5000_base_params, |
569 | .led_mode = IWL_LED_BLINK, | ||
570 | }; | 570 | }; |
571 | 571 | ||
572 | struct iwl_cfg iwl5100_agn_cfg = { | 572 | struct iwl_cfg iwl5100_agn_cfg = { |
@@ -574,7 +574,6 @@ struct iwl_cfg iwl5100_agn_cfg = { | |||
574 | .fw_name_pre = IWL5000_FW_PRE, | 574 | .fw_name_pre = IWL5000_FW_PRE, |
575 | .ucode_api_max = IWL5000_UCODE_API_MAX, | 575 | .ucode_api_max = IWL5000_UCODE_API_MAX, |
576 | .ucode_api_min = IWL5000_UCODE_API_MIN, | 576 | .ucode_api_min = IWL5000_UCODE_API_MIN, |
577 | .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N, | ||
578 | .valid_tx_ant = ANT_B, | 577 | .valid_tx_ant = ANT_B, |
579 | .valid_rx_ant = ANT_AB, | 578 | .valid_rx_ant = ANT_AB, |
580 | .eeprom_ver = EEPROM_5000_EEPROM_VERSION, | 579 | .eeprom_ver = EEPROM_5000_EEPROM_VERSION, |
@@ -583,6 +582,7 @@ struct iwl_cfg iwl5100_agn_cfg = { | |||
583 | .mod_params = &iwlagn_mod_params, | 582 | .mod_params = &iwlagn_mod_params, |
584 | .base_params = &iwl5000_base_params, | 583 | .base_params = &iwl5000_base_params, |
585 | .ht_params = &iwl5000_ht_params, | 584 | .ht_params = &iwl5000_ht_params, |
585 | .led_mode = IWL_LED_BLINK, | ||
586 | }; | 586 | }; |
587 | 587 | ||
588 | struct iwl_cfg iwl5350_agn_cfg = { | 588 | struct iwl_cfg iwl5350_agn_cfg = { |
@@ -590,7 +590,6 @@ struct iwl_cfg iwl5350_agn_cfg = { | |||
590 | .fw_name_pre = IWL5000_FW_PRE, | 590 | .fw_name_pre = IWL5000_FW_PRE, |
591 | .ucode_api_max = IWL5000_UCODE_API_MAX, | 591 | .ucode_api_max = IWL5000_UCODE_API_MAX, |
592 | .ucode_api_min = IWL5000_UCODE_API_MIN, | 592 | .ucode_api_min = IWL5000_UCODE_API_MIN, |
593 | .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N, | ||
594 | .valid_tx_ant = ANT_ABC, | 593 | .valid_tx_ant = ANT_ABC, |
595 | .valid_rx_ant = ANT_ABC, | 594 | .valid_rx_ant = ANT_ABC, |
596 | .eeprom_ver = EEPROM_5050_EEPROM_VERSION, | 595 | .eeprom_ver = EEPROM_5050_EEPROM_VERSION, |
@@ -599,6 +598,7 @@ struct iwl_cfg iwl5350_agn_cfg = { | |||
599 | .mod_params = &iwlagn_mod_params, | 598 | .mod_params = &iwlagn_mod_params, |
600 | .base_params = &iwl5000_base_params, | 599 | .base_params = &iwl5000_base_params, |
601 | .ht_params = &iwl5000_ht_params, | 600 | .ht_params = &iwl5000_ht_params, |
601 | .led_mode = IWL_LED_BLINK, | ||
602 | }; | 602 | }; |
603 | 603 | ||
604 | struct iwl_cfg iwl5150_agn_cfg = { | 604 | struct iwl_cfg iwl5150_agn_cfg = { |
@@ -606,7 +606,6 @@ struct iwl_cfg iwl5150_agn_cfg = { | |||
606 | .fw_name_pre = IWL5150_FW_PRE, | 606 | .fw_name_pre = IWL5150_FW_PRE, |
607 | .ucode_api_max = IWL5150_UCODE_API_MAX, | 607 | .ucode_api_max = IWL5150_UCODE_API_MAX, |
608 | .ucode_api_min = IWL5150_UCODE_API_MIN, | 608 | .ucode_api_min = IWL5150_UCODE_API_MIN, |
609 | .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N, | ||
610 | .valid_tx_ant = ANT_A, | 609 | .valid_tx_ant = ANT_A, |
611 | .valid_rx_ant = ANT_AB, | 610 | .valid_rx_ant = ANT_AB, |
612 | .eeprom_ver = EEPROM_5050_EEPROM_VERSION, | 611 | .eeprom_ver = EEPROM_5050_EEPROM_VERSION, |
@@ -616,6 +615,7 @@ struct iwl_cfg iwl5150_agn_cfg = { | |||
616 | .base_params = &iwl5000_base_params, | 615 | .base_params = &iwl5000_base_params, |
617 | .ht_params = &iwl5000_ht_params, | 616 | .ht_params = &iwl5000_ht_params, |
618 | .need_dc_calib = true, | 617 | .need_dc_calib = true, |
618 | .led_mode = IWL_LED_BLINK, | ||
619 | }; | 619 | }; |
620 | 620 | ||
621 | struct iwl_cfg iwl5150_abg_cfg = { | 621 | struct iwl_cfg iwl5150_abg_cfg = { |
@@ -623,7 +623,6 @@ struct iwl_cfg iwl5150_abg_cfg = { | |||
623 | .fw_name_pre = IWL5150_FW_PRE, | 623 | .fw_name_pre = IWL5150_FW_PRE, |
624 | .ucode_api_max = IWL5150_UCODE_API_MAX, | 624 | .ucode_api_max = IWL5150_UCODE_API_MAX, |
625 | .ucode_api_min = IWL5150_UCODE_API_MIN, | 625 | .ucode_api_min = IWL5150_UCODE_API_MIN, |
626 | .sku = IWL_SKU_A|IWL_SKU_G, | ||
627 | .valid_tx_ant = ANT_A, | 626 | .valid_tx_ant = ANT_A, |
628 | .valid_rx_ant = ANT_AB, | 627 | .valid_rx_ant = ANT_AB, |
629 | .eeprom_ver = EEPROM_5050_EEPROM_VERSION, | 628 | .eeprom_ver = EEPROM_5050_EEPROM_VERSION, |
@@ -632,6 +631,7 @@ struct iwl_cfg iwl5150_abg_cfg = { | |||
632 | .mod_params = &iwlagn_mod_params, | 631 | .mod_params = &iwlagn_mod_params, |
633 | .base_params = &iwl5000_base_params, | 632 | .base_params = &iwl5000_base_params, |
634 | .need_dc_calib = true, | 633 | .need_dc_calib = true, |
634 | .led_mode = IWL_LED_BLINK, | ||
635 | }; | 635 | }; |
636 | 636 | ||
637 | MODULE_FIRMWARE(IWL5000_MODULE_FIRMWARE(IWL5000_UCODE_API_MAX)); | 637 | MODULE_FIRMWARE(IWL5000_MODULE_FIRMWARE(IWL5000_UCODE_API_MAX)); |
diff --git a/drivers/net/wireless/iwlwifi/iwl-6000.c b/drivers/net/wireless/iwlwifi/iwl-6000.c index c7ff1bdf42cd..93e3fe92f389 100644 --- a/drivers/net/wireless/iwlwifi/iwl-6000.c +++ b/drivers/net/wireless/iwlwifi/iwl-6000.c | |||
@@ -546,8 +546,10 @@ static struct iwl_bt_params iwl6000_bt_params = { | |||
546 | .bt_statistics = true, | 546 | .bt_statistics = true, |
547 | /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */ | 547 | /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */ |
548 | .advanced_bt_coexist = true, | 548 | .advanced_bt_coexist = true, |
549 | .agg_time_limit = BT_AGG_THRESHOLD_DEF, | ||
549 | .bt_init_traffic_load = IWL_BT_COEX_TRAFFIC_LOAD_NONE, | 550 | .bt_init_traffic_load = IWL_BT_COEX_TRAFFIC_LOAD_NONE, |
550 | .bt_prio_boost = IWLAGN_BT_PRIO_BOOST_DEFAULT, | 551 | .bt_prio_boost = IWLAGN_BT_PRIO_BOOST_DEFAULT, |
552 | .bt_sco_disable = true, | ||
551 | }; | 553 | }; |
552 | 554 | ||
553 | struct iwl_cfg iwl6000g2a_2agn_cfg = { | 555 | struct iwl_cfg iwl6000g2a_2agn_cfg = { |
@@ -555,7 +557,6 @@ struct iwl_cfg iwl6000g2a_2agn_cfg = { | |||
555 | .fw_name_pre = IWL6000G2A_FW_PRE, | 557 | .fw_name_pre = IWL6000G2A_FW_PRE, |
556 | .ucode_api_max = IWL6000G2_UCODE_API_MAX, | 558 | .ucode_api_max = IWL6000G2_UCODE_API_MAX, |
557 | .ucode_api_min = IWL6000G2_UCODE_API_MIN, | 559 | .ucode_api_min = IWL6000G2_UCODE_API_MIN, |
558 | .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N, | ||
559 | .valid_tx_ant = ANT_AB, | 560 | .valid_tx_ant = ANT_AB, |
560 | .valid_rx_ant = ANT_AB, | 561 | .valid_rx_ant = ANT_AB, |
561 | .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, | 562 | .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, |
@@ -566,6 +567,7 @@ struct iwl_cfg iwl6000g2a_2agn_cfg = { | |||
566 | .ht_params = &iwl6000_ht_params, | 567 | .ht_params = &iwl6000_ht_params, |
567 | .need_dc_calib = true, | 568 | .need_dc_calib = true, |
568 | .need_temp_offset_calib = true, | 569 | .need_temp_offset_calib = true, |
570 | .led_mode = IWL_LED_RF_STATE, | ||
569 | }; | 571 | }; |
570 | 572 | ||
571 | struct iwl_cfg iwl6000g2a_2abg_cfg = { | 573 | struct iwl_cfg iwl6000g2a_2abg_cfg = { |
@@ -573,7 +575,6 @@ struct iwl_cfg iwl6000g2a_2abg_cfg = { | |||
573 | .fw_name_pre = IWL6000G2A_FW_PRE, | 575 | .fw_name_pre = IWL6000G2A_FW_PRE, |
574 | .ucode_api_max = IWL6000G2_UCODE_API_MAX, | 576 | .ucode_api_max = IWL6000G2_UCODE_API_MAX, |
575 | .ucode_api_min = IWL6000G2_UCODE_API_MIN, | 577 | .ucode_api_min = IWL6000G2_UCODE_API_MIN, |
576 | .sku = IWL_SKU_A|IWL_SKU_G, | ||
577 | .valid_tx_ant = ANT_AB, | 578 | .valid_tx_ant = ANT_AB, |
578 | .valid_rx_ant = ANT_AB, | 579 | .valid_rx_ant = ANT_AB, |
579 | .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, | 580 | .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, |
@@ -583,6 +584,7 @@ struct iwl_cfg iwl6000g2a_2abg_cfg = { | |||
583 | .base_params = &iwl6000_base_params, | 584 | .base_params = &iwl6000_base_params, |
584 | .need_dc_calib = true, | 585 | .need_dc_calib = true, |
585 | .need_temp_offset_calib = true, | 586 | .need_temp_offset_calib = true, |
587 | .led_mode = IWL_LED_RF_STATE, | ||
586 | }; | 588 | }; |
587 | 589 | ||
588 | struct iwl_cfg iwl6000g2a_2bg_cfg = { | 590 | struct iwl_cfg iwl6000g2a_2bg_cfg = { |
@@ -590,7 +592,6 @@ struct iwl_cfg iwl6000g2a_2bg_cfg = { | |||
590 | .fw_name_pre = IWL6000G2A_FW_PRE, | 592 | .fw_name_pre = IWL6000G2A_FW_PRE, |
591 | .ucode_api_max = IWL6000G2_UCODE_API_MAX, | 593 | .ucode_api_max = IWL6000G2_UCODE_API_MAX, |
592 | .ucode_api_min = IWL6000G2_UCODE_API_MIN, | 594 | .ucode_api_min = IWL6000G2_UCODE_API_MIN, |
593 | .sku = IWL_SKU_G, | ||
594 | .valid_tx_ant = ANT_AB, | 595 | .valid_tx_ant = ANT_AB, |
595 | .valid_rx_ant = ANT_AB, | 596 | .valid_rx_ant = ANT_AB, |
596 | .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, | 597 | .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, |
@@ -600,6 +601,7 @@ struct iwl_cfg iwl6000g2a_2bg_cfg = { | |||
600 | .base_params = &iwl6000_base_params, | 601 | .base_params = &iwl6000_base_params, |
601 | .need_dc_calib = true, | 602 | .need_dc_calib = true, |
602 | .need_temp_offset_calib = true, | 603 | .need_temp_offset_calib = true, |
604 | .led_mode = IWL_LED_RF_STATE, | ||
603 | }; | 605 | }; |
604 | 606 | ||
605 | struct iwl_cfg iwl6000g2b_2agn_cfg = { | 607 | struct iwl_cfg iwl6000g2b_2agn_cfg = { |
@@ -607,7 +609,6 @@ struct iwl_cfg iwl6000g2b_2agn_cfg = { | |||
607 | .fw_name_pre = IWL6000G2B_FW_PRE, | 609 | .fw_name_pre = IWL6000G2B_FW_PRE, |
608 | .ucode_api_max = IWL6000G2_UCODE_API_MAX, | 610 | .ucode_api_max = IWL6000G2_UCODE_API_MAX, |
609 | .ucode_api_min = IWL6000G2_UCODE_API_MIN, | 611 | .ucode_api_min = IWL6000G2_UCODE_API_MIN, |
610 | .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N, | ||
611 | .valid_tx_ant = ANT_AB, | 612 | .valid_tx_ant = ANT_AB, |
612 | .valid_rx_ant = ANT_AB, | 613 | .valid_rx_ant = ANT_AB, |
613 | .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, | 614 | .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, |
@@ -619,6 +620,8 @@ struct iwl_cfg iwl6000g2b_2agn_cfg = { | |||
619 | .ht_params = &iwl6000_ht_params, | 620 | .ht_params = &iwl6000_ht_params, |
620 | .need_dc_calib = true, | 621 | .need_dc_calib = true, |
621 | .need_temp_offset_calib = true, | 622 | .need_temp_offset_calib = true, |
623 | .led_mode = IWL_LED_RF_STATE, | ||
624 | .adv_pm = true, | ||
622 | /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */ | 625 | /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */ |
623 | .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A, | 626 | .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A, |
624 | }; | 627 | }; |
@@ -628,7 +631,6 @@ struct iwl_cfg iwl6000g2b_2abg_cfg = { | |||
628 | .fw_name_pre = IWL6000G2B_FW_PRE, | 631 | .fw_name_pre = IWL6000G2B_FW_PRE, |
629 | .ucode_api_max = IWL6000G2_UCODE_API_MAX, | 632 | .ucode_api_max = IWL6000G2_UCODE_API_MAX, |
630 | .ucode_api_min = IWL6000G2_UCODE_API_MIN, | 633 | .ucode_api_min = IWL6000G2_UCODE_API_MIN, |
631 | .sku = IWL_SKU_A|IWL_SKU_G, | ||
632 | .valid_tx_ant = ANT_AB, | 634 | .valid_tx_ant = ANT_AB, |
633 | .valid_rx_ant = ANT_AB, | 635 | .valid_rx_ant = ANT_AB, |
634 | .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, | 636 | .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, |
@@ -639,6 +641,8 @@ struct iwl_cfg iwl6000g2b_2abg_cfg = { | |||
639 | .bt_params = &iwl6000_bt_params, | 641 | .bt_params = &iwl6000_bt_params, |
640 | .need_dc_calib = true, | 642 | .need_dc_calib = true, |
641 | .need_temp_offset_calib = true, | 643 | .need_temp_offset_calib = true, |
644 | .led_mode = IWL_LED_RF_STATE, | ||
645 | .adv_pm = true, | ||
642 | /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */ | 646 | /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */ |
643 | .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A, | 647 | .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A, |
644 | }; | 648 | }; |
@@ -648,7 +652,6 @@ struct iwl_cfg iwl6000g2b_2bgn_cfg = { | |||
648 | .fw_name_pre = IWL6000G2B_FW_PRE, | 652 | .fw_name_pre = IWL6000G2B_FW_PRE, |
649 | .ucode_api_max = IWL6000G2_UCODE_API_MAX, | 653 | .ucode_api_max = IWL6000G2_UCODE_API_MAX, |
650 | .ucode_api_min = IWL6000G2_UCODE_API_MIN, | 654 | .ucode_api_min = IWL6000G2_UCODE_API_MIN, |
651 | .sku = IWL_SKU_G|IWL_SKU_N, | ||
652 | .valid_tx_ant = ANT_AB, | 655 | .valid_tx_ant = ANT_AB, |
653 | .valid_rx_ant = ANT_AB, | 656 | .valid_rx_ant = ANT_AB, |
654 | .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, | 657 | .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, |
@@ -660,6 +663,8 @@ struct iwl_cfg iwl6000g2b_2bgn_cfg = { | |||
660 | .ht_params = &iwl6000_ht_params, | 663 | .ht_params = &iwl6000_ht_params, |
661 | .need_dc_calib = true, | 664 | .need_dc_calib = true, |
662 | .need_temp_offset_calib = true, | 665 | .need_temp_offset_calib = true, |
666 | .led_mode = IWL_LED_RF_STATE, | ||
667 | .adv_pm = true, | ||
663 | /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */ | 668 | /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */ |
664 | .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A, | 669 | .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A, |
665 | }; | 670 | }; |
@@ -669,7 +674,6 @@ struct iwl_cfg iwl6000g2b_2bg_cfg = { | |||
669 | .fw_name_pre = IWL6000G2B_FW_PRE, | 674 | .fw_name_pre = IWL6000G2B_FW_PRE, |
670 | .ucode_api_max = IWL6000G2_UCODE_API_MAX, | 675 | .ucode_api_max = IWL6000G2_UCODE_API_MAX, |
671 | .ucode_api_min = IWL6000G2_UCODE_API_MIN, | 676 | .ucode_api_min = IWL6000G2_UCODE_API_MIN, |
672 | .sku = IWL_SKU_G, | ||
673 | .valid_tx_ant = ANT_AB, | 677 | .valid_tx_ant = ANT_AB, |
674 | .valid_rx_ant = ANT_AB, | 678 | .valid_rx_ant = ANT_AB, |
675 | .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, | 679 | .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, |
@@ -680,6 +684,8 @@ struct iwl_cfg iwl6000g2b_2bg_cfg = { | |||
680 | .bt_params = &iwl6000_bt_params, | 684 | .bt_params = &iwl6000_bt_params, |
681 | .need_dc_calib = true, | 685 | .need_dc_calib = true, |
682 | .need_temp_offset_calib = true, | 686 | .need_temp_offset_calib = true, |
687 | .led_mode = IWL_LED_RF_STATE, | ||
688 | .adv_pm = true, | ||
683 | /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */ | 689 | /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */ |
684 | .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A, | 690 | .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A, |
685 | }; | 691 | }; |
@@ -689,7 +695,6 @@ struct iwl_cfg iwl6000g2b_bgn_cfg = { | |||
689 | .fw_name_pre = IWL6000G2B_FW_PRE, | 695 | .fw_name_pre = IWL6000G2B_FW_PRE, |
690 | .ucode_api_max = IWL6000G2_UCODE_API_MAX, | 696 | .ucode_api_max = IWL6000G2_UCODE_API_MAX, |
691 | .ucode_api_min = IWL6000G2_UCODE_API_MIN, | 697 | .ucode_api_min = IWL6000G2_UCODE_API_MIN, |
692 | .sku = IWL_SKU_G|IWL_SKU_N, | ||
693 | .valid_tx_ant = ANT_A, | 698 | .valid_tx_ant = ANT_A, |
694 | .valid_rx_ant = ANT_AB, | 699 | .valid_rx_ant = ANT_AB, |
695 | .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, | 700 | .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, |
@@ -701,6 +706,8 @@ struct iwl_cfg iwl6000g2b_bgn_cfg = { | |||
701 | .ht_params = &iwl6000_ht_params, | 706 | .ht_params = &iwl6000_ht_params, |
702 | .need_dc_calib = true, | 707 | .need_dc_calib = true, |
703 | .need_temp_offset_calib = true, | 708 | .need_temp_offset_calib = true, |
709 | .led_mode = IWL_LED_RF_STATE, | ||
710 | .adv_pm = true, | ||
704 | /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */ | 711 | /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */ |
705 | .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A, | 712 | .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A, |
706 | }; | 713 | }; |
@@ -710,7 +717,6 @@ struct iwl_cfg iwl6000g2b_bg_cfg = { | |||
710 | .fw_name_pre = IWL6000G2B_FW_PRE, | 717 | .fw_name_pre = IWL6000G2B_FW_PRE, |
711 | .ucode_api_max = IWL6000G2_UCODE_API_MAX, | 718 | .ucode_api_max = IWL6000G2_UCODE_API_MAX, |
712 | .ucode_api_min = IWL6000G2_UCODE_API_MIN, | 719 | .ucode_api_min = IWL6000G2_UCODE_API_MIN, |
713 | .sku = IWL_SKU_G, | ||
714 | .valid_tx_ant = ANT_A, | 720 | .valid_tx_ant = ANT_A, |
715 | .valid_rx_ant = ANT_AB, | 721 | .valid_rx_ant = ANT_AB, |
716 | .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, | 722 | .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, |
@@ -721,6 +727,8 @@ struct iwl_cfg iwl6000g2b_bg_cfg = { | |||
721 | .bt_params = &iwl6000_bt_params, | 727 | .bt_params = &iwl6000_bt_params, |
722 | .need_dc_calib = true, | 728 | .need_dc_calib = true, |
723 | .need_temp_offset_calib = true, | 729 | .need_temp_offset_calib = true, |
730 | .led_mode = IWL_LED_RF_STATE, | ||
731 | .adv_pm = true, | ||
724 | /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */ | 732 | /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */ |
725 | .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A, | 733 | .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A, |
726 | }; | 734 | }; |
@@ -733,7 +741,6 @@ struct iwl_cfg iwl6000i_2agn_cfg = { | |||
733 | .fw_name_pre = IWL6000_FW_PRE, | 741 | .fw_name_pre = IWL6000_FW_PRE, |
734 | .ucode_api_max = IWL6000_UCODE_API_MAX, | 742 | .ucode_api_max = IWL6000_UCODE_API_MAX, |
735 | .ucode_api_min = IWL6000_UCODE_API_MIN, | 743 | .ucode_api_min = IWL6000_UCODE_API_MIN, |
736 | .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N, | ||
737 | .valid_tx_ant = ANT_BC, | 744 | .valid_tx_ant = ANT_BC, |
738 | .valid_rx_ant = ANT_BC, | 745 | .valid_rx_ant = ANT_BC, |
739 | .eeprom_ver = EEPROM_6000_EEPROM_VERSION, | 746 | .eeprom_ver = EEPROM_6000_EEPROM_VERSION, |
@@ -743,6 +750,7 @@ struct iwl_cfg iwl6000i_2agn_cfg = { | |||
743 | .base_params = &iwl6000_base_params, | 750 | .base_params = &iwl6000_base_params, |
744 | .ht_params = &iwl6000_ht_params, | 751 | .ht_params = &iwl6000_ht_params, |
745 | .pa_type = IWL_PA_INTERNAL, | 752 | .pa_type = IWL_PA_INTERNAL, |
753 | .led_mode = IWL_LED_BLINK, | ||
746 | }; | 754 | }; |
747 | 755 | ||
748 | struct iwl_cfg iwl6000i_2abg_cfg = { | 756 | struct iwl_cfg iwl6000i_2abg_cfg = { |
@@ -750,7 +758,6 @@ struct iwl_cfg iwl6000i_2abg_cfg = { | |||
750 | .fw_name_pre = IWL6000_FW_PRE, | 758 | .fw_name_pre = IWL6000_FW_PRE, |
751 | .ucode_api_max = IWL6000_UCODE_API_MAX, | 759 | .ucode_api_max = IWL6000_UCODE_API_MAX, |
752 | .ucode_api_min = IWL6000_UCODE_API_MIN, | 760 | .ucode_api_min = IWL6000_UCODE_API_MIN, |
753 | .sku = IWL_SKU_A|IWL_SKU_G, | ||
754 | .valid_tx_ant = ANT_BC, | 761 | .valid_tx_ant = ANT_BC, |
755 | .valid_rx_ant = ANT_BC, | 762 | .valid_rx_ant = ANT_BC, |
756 | .eeprom_ver = EEPROM_6000_EEPROM_VERSION, | 763 | .eeprom_ver = EEPROM_6000_EEPROM_VERSION, |
@@ -759,6 +766,7 @@ struct iwl_cfg iwl6000i_2abg_cfg = { | |||
759 | .mod_params = &iwlagn_mod_params, | 766 | .mod_params = &iwlagn_mod_params, |
760 | .base_params = &iwl6000_base_params, | 767 | .base_params = &iwl6000_base_params, |
761 | .pa_type = IWL_PA_INTERNAL, | 768 | .pa_type = IWL_PA_INTERNAL, |
769 | .led_mode = IWL_LED_BLINK, | ||
762 | }; | 770 | }; |
763 | 771 | ||
764 | struct iwl_cfg iwl6000i_2bg_cfg = { | 772 | struct iwl_cfg iwl6000i_2bg_cfg = { |
@@ -766,7 +774,6 @@ struct iwl_cfg iwl6000i_2bg_cfg = { | |||
766 | .fw_name_pre = IWL6000_FW_PRE, | 774 | .fw_name_pre = IWL6000_FW_PRE, |
767 | .ucode_api_max = IWL6000_UCODE_API_MAX, | 775 | .ucode_api_max = IWL6000_UCODE_API_MAX, |
768 | .ucode_api_min = IWL6000_UCODE_API_MIN, | 776 | .ucode_api_min = IWL6000_UCODE_API_MIN, |
769 | .sku = IWL_SKU_G, | ||
770 | .valid_tx_ant = ANT_BC, | 777 | .valid_tx_ant = ANT_BC, |
771 | .valid_rx_ant = ANT_BC, | 778 | .valid_rx_ant = ANT_BC, |
772 | .eeprom_ver = EEPROM_6000_EEPROM_VERSION, | 779 | .eeprom_ver = EEPROM_6000_EEPROM_VERSION, |
@@ -775,6 +782,7 @@ struct iwl_cfg iwl6000i_2bg_cfg = { | |||
775 | .mod_params = &iwlagn_mod_params, | 782 | .mod_params = &iwlagn_mod_params, |
776 | .base_params = &iwl6000_base_params, | 783 | .base_params = &iwl6000_base_params, |
777 | .pa_type = IWL_PA_INTERNAL, | 784 | .pa_type = IWL_PA_INTERNAL, |
785 | .led_mode = IWL_LED_BLINK, | ||
778 | }; | 786 | }; |
779 | 787 | ||
780 | struct iwl_cfg iwl6050_2agn_cfg = { | 788 | struct iwl_cfg iwl6050_2agn_cfg = { |
@@ -782,7 +790,6 @@ struct iwl_cfg iwl6050_2agn_cfg = { | |||
782 | .fw_name_pre = IWL6050_FW_PRE, | 790 | .fw_name_pre = IWL6050_FW_PRE, |
783 | .ucode_api_max = IWL6050_UCODE_API_MAX, | 791 | .ucode_api_max = IWL6050_UCODE_API_MAX, |
784 | .ucode_api_min = IWL6050_UCODE_API_MIN, | 792 | .ucode_api_min = IWL6050_UCODE_API_MIN, |
785 | .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N, | ||
786 | .valid_tx_ant = ANT_AB, | 793 | .valid_tx_ant = ANT_AB, |
787 | .valid_rx_ant = ANT_AB, | 794 | .valid_rx_ant = ANT_AB, |
788 | .ops = &iwl6050_ops, | 795 | .ops = &iwl6050_ops, |
@@ -792,6 +799,7 @@ struct iwl_cfg iwl6050_2agn_cfg = { | |||
792 | .base_params = &iwl6050_base_params, | 799 | .base_params = &iwl6050_base_params, |
793 | .ht_params = &iwl6000_ht_params, | 800 | .ht_params = &iwl6000_ht_params, |
794 | .need_dc_calib = true, | 801 | .need_dc_calib = true, |
802 | .led_mode = IWL_LED_BLINK, | ||
795 | }; | 803 | }; |
796 | 804 | ||
797 | struct iwl_cfg iwl6050g2_bgn_cfg = { | 805 | struct iwl_cfg iwl6050g2_bgn_cfg = { |
@@ -799,7 +807,6 @@ struct iwl_cfg iwl6050g2_bgn_cfg = { | |||
799 | .fw_name_pre = IWL6050_FW_PRE, | 807 | .fw_name_pre = IWL6050_FW_PRE, |
800 | .ucode_api_max = IWL6050_UCODE_API_MAX, | 808 | .ucode_api_max = IWL6050_UCODE_API_MAX, |
801 | .ucode_api_min = IWL6050_UCODE_API_MIN, | 809 | .ucode_api_min = IWL6050_UCODE_API_MIN, |
802 | .sku = IWL_SKU_G|IWL_SKU_N, | ||
803 | .valid_tx_ant = ANT_A, | 810 | .valid_tx_ant = ANT_A, |
804 | .valid_rx_ant = ANT_AB, | 811 | .valid_rx_ant = ANT_AB, |
805 | .eeprom_ver = EEPROM_6050G2_EEPROM_VERSION, | 812 | .eeprom_ver = EEPROM_6050G2_EEPROM_VERSION, |
@@ -809,6 +816,7 @@ struct iwl_cfg iwl6050g2_bgn_cfg = { | |||
809 | .base_params = &iwl6050_base_params, | 816 | .base_params = &iwl6050_base_params, |
810 | .ht_params = &iwl6000_ht_params, | 817 | .ht_params = &iwl6000_ht_params, |
811 | .need_dc_calib = true, | 818 | .need_dc_calib = true, |
819 | .led_mode = IWL_LED_RF_STATE, | ||
812 | }; | 820 | }; |
813 | 821 | ||
814 | struct iwl_cfg iwl6050_2abg_cfg = { | 822 | struct iwl_cfg iwl6050_2abg_cfg = { |
@@ -816,7 +824,6 @@ struct iwl_cfg iwl6050_2abg_cfg = { | |||
816 | .fw_name_pre = IWL6050_FW_PRE, | 824 | .fw_name_pre = IWL6050_FW_PRE, |
817 | .ucode_api_max = IWL6050_UCODE_API_MAX, | 825 | .ucode_api_max = IWL6050_UCODE_API_MAX, |
818 | .ucode_api_min = IWL6050_UCODE_API_MIN, | 826 | .ucode_api_min = IWL6050_UCODE_API_MIN, |
819 | .sku = IWL_SKU_A|IWL_SKU_G, | ||
820 | .valid_tx_ant = ANT_AB, | 827 | .valid_tx_ant = ANT_AB, |
821 | .valid_rx_ant = ANT_AB, | 828 | .valid_rx_ant = ANT_AB, |
822 | .eeprom_ver = EEPROM_6050_EEPROM_VERSION, | 829 | .eeprom_ver = EEPROM_6050_EEPROM_VERSION, |
@@ -825,6 +832,7 @@ struct iwl_cfg iwl6050_2abg_cfg = { | |||
825 | .mod_params = &iwlagn_mod_params, | 832 | .mod_params = &iwlagn_mod_params, |
826 | .base_params = &iwl6050_base_params, | 833 | .base_params = &iwl6050_base_params, |
827 | .need_dc_calib = true, | 834 | .need_dc_calib = true, |
835 | .led_mode = IWL_LED_BLINK, | ||
828 | }; | 836 | }; |
829 | 837 | ||
830 | struct iwl_cfg iwl6000_3agn_cfg = { | 838 | struct iwl_cfg iwl6000_3agn_cfg = { |
@@ -832,7 +840,6 @@ struct iwl_cfg iwl6000_3agn_cfg = { | |||
832 | .fw_name_pre = IWL6000_FW_PRE, | 840 | .fw_name_pre = IWL6000_FW_PRE, |
833 | .ucode_api_max = IWL6000_UCODE_API_MAX, | 841 | .ucode_api_max = IWL6000_UCODE_API_MAX, |
834 | .ucode_api_min = IWL6000_UCODE_API_MIN, | 842 | .ucode_api_min = IWL6000_UCODE_API_MIN, |
835 | .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N, | ||
836 | .valid_tx_ant = ANT_ABC, | 843 | .valid_tx_ant = ANT_ABC, |
837 | .valid_rx_ant = ANT_ABC, | 844 | .valid_rx_ant = ANT_ABC, |
838 | .eeprom_ver = EEPROM_6000_EEPROM_VERSION, | 845 | .eeprom_ver = EEPROM_6000_EEPROM_VERSION, |
@@ -842,6 +849,7 @@ struct iwl_cfg iwl6000_3agn_cfg = { | |||
842 | .base_params = &iwl6000_base_params, | 849 | .base_params = &iwl6000_base_params, |
843 | .ht_params = &iwl6000_ht_params, | 850 | .ht_params = &iwl6000_ht_params, |
844 | .need_dc_calib = true, | 851 | .need_dc_calib = true, |
852 | .led_mode = IWL_LED_BLINK, | ||
845 | }; | 853 | }; |
846 | 854 | ||
847 | struct iwl_cfg iwl130_bgn_cfg = { | 855 | struct iwl_cfg iwl130_bgn_cfg = { |
@@ -849,7 +857,6 @@ struct iwl_cfg iwl130_bgn_cfg = { | |||
849 | .fw_name_pre = IWL6000G2B_FW_PRE, | 857 | .fw_name_pre = IWL6000G2B_FW_PRE, |
850 | .ucode_api_max = IWL6000G2_UCODE_API_MAX, | 858 | .ucode_api_max = IWL6000G2_UCODE_API_MAX, |
851 | .ucode_api_min = IWL6000G2_UCODE_API_MIN, | 859 | .ucode_api_min = IWL6000G2_UCODE_API_MIN, |
852 | .sku = IWL_SKU_G|IWL_SKU_N, | ||
853 | .valid_tx_ant = ANT_A, | 860 | .valid_tx_ant = ANT_A, |
854 | .valid_rx_ant = ANT_A, | 861 | .valid_rx_ant = ANT_A, |
855 | .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, | 862 | .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, |
@@ -860,6 +867,8 @@ struct iwl_cfg iwl130_bgn_cfg = { | |||
860 | .bt_params = &iwl6000_bt_params, | 867 | .bt_params = &iwl6000_bt_params, |
861 | .ht_params = &iwl6000_ht_params, | 868 | .ht_params = &iwl6000_ht_params, |
862 | .need_dc_calib = true, | 869 | .need_dc_calib = true, |
870 | .led_mode = IWL_LED_RF_STATE, | ||
871 | .adv_pm = true, | ||
863 | /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */ | 872 | /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */ |
864 | .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A, | 873 | .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A, |
865 | }; | 874 | }; |
@@ -869,7 +878,6 @@ struct iwl_cfg iwl130_bg_cfg = { | |||
869 | .fw_name_pre = IWL6000G2B_FW_PRE, | 878 | .fw_name_pre = IWL6000G2B_FW_PRE, |
870 | .ucode_api_max = IWL6000G2_UCODE_API_MAX, | 879 | .ucode_api_max = IWL6000G2_UCODE_API_MAX, |
871 | .ucode_api_min = IWL6000G2_UCODE_API_MIN, | 880 | .ucode_api_min = IWL6000G2_UCODE_API_MIN, |
872 | .sku = IWL_SKU_G, | ||
873 | .valid_tx_ant = ANT_A, | 881 | .valid_tx_ant = ANT_A, |
874 | .valid_rx_ant = ANT_A, | 882 | .valid_rx_ant = ANT_A, |
875 | .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, | 883 | .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, |
@@ -879,6 +887,8 @@ struct iwl_cfg iwl130_bg_cfg = { | |||
879 | .base_params = &iwl6000_coex_base_params, | 887 | .base_params = &iwl6000_coex_base_params, |
880 | .bt_params = &iwl6000_bt_params, | 888 | .bt_params = &iwl6000_bt_params, |
881 | .need_dc_calib = true, | 889 | .need_dc_calib = true, |
890 | .led_mode = IWL_LED_RF_STATE, | ||
891 | .adv_pm = true, | ||
882 | /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */ | 892 | /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */ |
883 | .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A, | 893 | .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A, |
884 | }; | 894 | }; |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-eeprom.c b/drivers/net/wireless/iwlwifi/iwl-agn-eeprom.c index a650baba0809..8a4d3acb9b79 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-eeprom.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-eeprom.c | |||
@@ -248,6 +248,27 @@ err: | |||
248 | 248 | ||
249 | } | 249 | } |
250 | 250 | ||
251 | int iwl_eeprom_check_sku(struct iwl_priv *priv) | ||
252 | { | ||
253 | u16 eeprom_sku; | ||
254 | |||
255 | eeprom_sku = iwl_eeprom_query16(priv, EEPROM_SKU_CAP); | ||
256 | |||
257 | priv->cfg->sku = ((eeprom_sku & EEPROM_SKU_CAP_BAND_SELECTION) >> | ||
258 | EEPROM_SKU_CAP_BAND_POS); | ||
259 | if (eeprom_sku & EEPROM_SKU_CAP_11N_ENABLE) | ||
260 | priv->cfg->sku |= IWL_SKU_N; | ||
261 | |||
262 | if (!priv->cfg->sku) { | ||
263 | IWL_ERR(priv, "Invalid device sku\n"); | ||
264 | return -EINVAL; | ||
265 | } | ||
266 | |||
267 | IWL_INFO(priv, "Device SKU: 0X%x\n", priv->cfg->sku); | ||
268 | |||
269 | return 0; | ||
270 | } | ||
271 | |||
251 | void iwl_eeprom_get_mac(const struct iwl_priv *priv, u8 *mac) | 272 | void iwl_eeprom_get_mac(const struct iwl_priv *priv, u8 *mac) |
252 | { | 273 | { |
253 | const u8 *addr = priv->cfg->ops->lib->eeprom_ops.query_addr(priv, | 274 | const u8 *addr = priv->cfg->ops->lib->eeprom_ops.query_addr(priv, |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-hcmd.c b/drivers/net/wireless/iwlwifi/iwl-agn-hcmd.c index ffb2f4111ad0..366340f3fb0f 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-hcmd.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-hcmd.c | |||
@@ -307,6 +307,7 @@ static int iwlagn_set_pan_params(struct iwl_priv *priv) | |||
307 | 307 | ||
308 | if (ctx_bss->vif && ctx_pan->vif) { | 308 | if (ctx_bss->vif && ctx_pan->vif) { |
309 | int bcnint = ctx_pan->vif->bss_conf.beacon_int; | 309 | int bcnint = ctx_pan->vif->bss_conf.beacon_int; |
310 | int dtim = ctx_pan->vif->bss_conf.dtim_period ?: 1; | ||
310 | 311 | ||
311 | /* should be set, but seems unused?? */ | 312 | /* should be set, but seems unused?? */ |
312 | cmd.flags |= cpu_to_le16(IWL_WIPAN_PARAMS_FLG_SLOTTED_MODE); | 313 | cmd.flags |= cpu_to_le16(IWL_WIPAN_PARAMS_FLG_SLOTTED_MODE); |
@@ -329,10 +330,10 @@ static int iwlagn_set_pan_params(struct iwl_priv *priv) | |||
329 | if (test_bit(STATUS_SCAN_HW, &priv->status) || | 330 | if (test_bit(STATUS_SCAN_HW, &priv->status) || |
330 | (!ctx_bss->vif->bss_conf.idle && | 331 | (!ctx_bss->vif->bss_conf.idle && |
331 | !ctx_bss->vif->bss_conf.assoc)) { | 332 | !ctx_bss->vif->bss_conf.assoc)) { |
332 | slot0 = bcnint * 3 - 20; | 333 | slot0 = dtim * bcnint * 3 - 20; |
333 | slot1 = 20; | 334 | slot1 = 20; |
334 | } else if (!ctx_pan->vif->bss_conf.idle && | 335 | } else if (!ctx_pan->vif->bss_conf.idle && |
335 | !ctx_pan->vif->bss_conf.assoc) { | 336 | !ctx_pan->vif->bss_conf.assoc) { |
336 | slot1 = bcnint * 3 - 20; | 337 | slot1 = bcnint * 3 - 20; |
337 | slot0 = 20; | 338 | slot0 = 20; |
338 | } | 339 | } |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-lib.c b/drivers/net/wireless/iwlwifi/iwl-agn-lib.c index ca3530c4295a..f8fe5f44e19f 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-lib.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-lib.c | |||
@@ -445,22 +445,17 @@ static void iwlagn_rx_reply_tx(struct iwl_priv *priv, | |||
445 | 445 | ||
446 | if (priv->mac80211_registered && | 446 | if (priv->mac80211_registered && |
447 | (iwl_queue_space(&txq->q) > txq->q.low_mark) && | 447 | (iwl_queue_space(&txq->q) > txq->q.low_mark) && |
448 | (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) { | 448 | (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) |
449 | if (agg->state == IWL_AGG_OFF) | 449 | iwl_wake_queue(priv, txq); |
450 | iwl_wake_queue(priv, txq_id); | ||
451 | else | ||
452 | iwl_wake_queue(priv, txq->swq_id); | ||
453 | } | ||
454 | } | 450 | } |
455 | } else { | 451 | } else { |
456 | BUG_ON(txq_id != txq->swq_id); | ||
457 | iwlagn_set_tx_status(priv, info, tx_resp, txq_id, false); | 452 | iwlagn_set_tx_status(priv, info, tx_resp, txq_id, false); |
458 | freed = iwlagn_tx_queue_reclaim(priv, txq_id, index); | 453 | freed = iwlagn_tx_queue_reclaim(priv, txq_id, index); |
459 | iwl_free_tfds_in_queue(priv, sta_id, tid, freed); | 454 | iwl_free_tfds_in_queue(priv, sta_id, tid, freed); |
460 | 455 | ||
461 | if (priv->mac80211_registered && | 456 | if (priv->mac80211_registered && |
462 | (iwl_queue_space(&txq->q) > txq->q.low_mark)) | 457 | (iwl_queue_space(&txq->q) > txq->q.low_mark)) |
463 | iwl_wake_queue(priv, txq_id); | 458 | iwl_wake_queue(priv, txq); |
464 | } | 459 | } |
465 | 460 | ||
466 | iwlagn_txq_check_empty(priv, sta_id, tid, txq_id); | 461 | iwlagn_txq_check_empty(priv, sta_id, tid, txq_id); |
@@ -1834,6 +1829,10 @@ void iwlagn_send_advance_bt_config(struct iwl_priv *priv) | |||
1834 | } else { | 1829 | } else { |
1835 | bt_cmd.flags = IWLAGN_BT_FLAG_COEX_MODE_3W << | 1830 | bt_cmd.flags = IWLAGN_BT_FLAG_COEX_MODE_3W << |
1836 | IWLAGN_BT_FLAG_COEX_MODE_SHIFT; | 1831 | IWLAGN_BT_FLAG_COEX_MODE_SHIFT; |
1832 | if (priv->cfg->bt_params && | ||
1833 | priv->cfg->bt_params->bt_sco_disable) | ||
1834 | bt_cmd.flags |= IWLAGN_BT_FLAG_SYNC_2_BT_DISABLE; | ||
1835 | |||
1837 | if (priv->bt_ch_announce) | 1836 | if (priv->bt_ch_announce) |
1838 | bt_cmd.flags |= IWLAGN_BT_FLAG_CHANNEL_INHIBITION; | 1837 | bt_cmd.flags |= IWLAGN_BT_FLAG_CHANNEL_INHIBITION; |
1839 | IWL_DEBUG_INFO(priv, "BT coex flag: 0X%x\n", bt_cmd.flags); | 1838 | IWL_DEBUG_INFO(priv, "BT coex flag: 0X%x\n", bt_cmd.flags); |
@@ -2001,7 +2000,7 @@ static void iwlagn_set_kill_ack_msk(struct iwl_priv *priv, | |||
2001 | struct iwl_bt_uart_msg *uart_msg) | 2000 | struct iwl_bt_uart_msg *uart_msg) |
2002 | { | 2001 | { |
2003 | u8 kill_ack_msk; | 2002 | u8 kill_ack_msk; |
2004 | __le32 bt_kill_ack_msg[2] = { | 2003 | static const __le32 bt_kill_ack_msg[2] = { |
2005 | cpu_to_le32(0xFFFFFFF), cpu_to_le32(0xFFFFFC00) }; | 2004 | cpu_to_le32(0xFFFFFFF), cpu_to_le32(0xFFFFFC00) }; |
2006 | 2005 | ||
2007 | kill_ack_msk = (((BT_UART_MSG_FRAME3A2DP_MSK | | 2006 | kill_ack_msk = (((BT_UART_MSG_FRAME3A2DP_MSK | |
@@ -2025,7 +2024,6 @@ void iwlagn_bt_coex_profile_notif(struct iwl_priv *priv, | |||
2025 | struct iwl_bt_coex_profile_notif *coex = &pkt->u.bt_coex_profile_notif; | 2024 | struct iwl_bt_coex_profile_notif *coex = &pkt->u.bt_coex_profile_notif; |
2026 | struct iwlagn_bt_sco_cmd sco_cmd = { .flags = 0 }; | 2025 | struct iwlagn_bt_sco_cmd sco_cmd = { .flags = 0 }; |
2027 | struct iwl_bt_uart_msg *uart_msg = &coex->last_bt_uart_msg; | 2026 | struct iwl_bt_uart_msg *uart_msg = &coex->last_bt_uart_msg; |
2028 | u8 last_traffic_load; | ||
2029 | 2027 | ||
2030 | IWL_DEBUG_NOTIF(priv, "BT Coex notification:\n"); | 2028 | IWL_DEBUG_NOTIF(priv, "BT Coex notification:\n"); |
2031 | IWL_DEBUG_NOTIF(priv, " status: %d\n", coex->bt_status); | 2029 | IWL_DEBUG_NOTIF(priv, " status: %d\n", coex->bt_status); |
@@ -2034,11 +2032,10 @@ void iwlagn_bt_coex_profile_notif(struct iwl_priv *priv, | |||
2034 | coex->bt_ci_compliance); | 2032 | coex->bt_ci_compliance); |
2035 | iwlagn_print_uartmsg(priv, uart_msg); | 2033 | iwlagn_print_uartmsg(priv, uart_msg); |
2036 | 2034 | ||
2037 | last_traffic_load = priv->notif_bt_traffic_load; | 2035 | priv->last_bt_traffic_load = priv->bt_traffic_load; |
2038 | priv->notif_bt_traffic_load = coex->bt_traffic_load; | ||
2039 | if (priv->iw_mode != NL80211_IFTYPE_ADHOC) { | 2036 | if (priv->iw_mode != NL80211_IFTYPE_ADHOC) { |
2040 | if (priv->bt_status != coex->bt_status || | 2037 | if (priv->bt_status != coex->bt_status || |
2041 | last_traffic_load != coex->bt_traffic_load) { | 2038 | priv->last_bt_traffic_load != coex->bt_traffic_load) { |
2042 | if (coex->bt_status) { | 2039 | if (coex->bt_status) { |
2043 | /* BT on */ | 2040 | /* BT on */ |
2044 | if (!priv->bt_ch_announce) | 2041 | if (!priv->bt_ch_announce) |
@@ -2287,7 +2284,7 @@ static const char *get_csr_string(int cmd) | |||
2287 | void iwl_dump_csr(struct iwl_priv *priv) | 2284 | void iwl_dump_csr(struct iwl_priv *priv) |
2288 | { | 2285 | { |
2289 | int i; | 2286 | int i; |
2290 | u32 csr_tbl[] = { | 2287 | static const u32 csr_tbl[] = { |
2291 | CSR_HW_IF_CONFIG_REG, | 2288 | CSR_HW_IF_CONFIG_REG, |
2292 | CSR_INT_COALESCING, | 2289 | CSR_INT_COALESCING, |
2293 | CSR_INT, | 2290 | CSR_INT, |
@@ -2346,7 +2343,7 @@ int iwl_dump_fh(struct iwl_priv *priv, char **buf, bool display) | |||
2346 | int pos = 0; | 2343 | int pos = 0; |
2347 | size_t bufsz = 0; | 2344 | size_t bufsz = 0; |
2348 | #endif | 2345 | #endif |
2349 | u32 fh_tbl[] = { | 2346 | static const u32 fh_tbl[] = { |
2350 | FH_RSCSR_CHNL0_STTS_WPTR_REG, | 2347 | FH_RSCSR_CHNL0_STTS_WPTR_REG, |
2351 | FH_RSCSR_CHNL0_RBDCB_BASE_REG, | 2348 | FH_RSCSR_CHNL0_RBDCB_BASE_REG, |
2352 | FH_RSCSR_CHNL0_WPTR, | 2349 | FH_RSCSR_CHNL0_WPTR, |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c index 065553629de5..f450adc72361 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c | |||
@@ -833,17 +833,23 @@ static void rs_bt_update_lq(struct iwl_priv *priv, struct iwl_rxon_context *ctx, | |||
833 | struct iwl_lq_sta *lq_sta) | 833 | struct iwl_lq_sta *lq_sta) |
834 | { | 834 | { |
835 | struct iwl_scale_tbl_info *tbl; | 835 | struct iwl_scale_tbl_info *tbl; |
836 | bool full_concurrent; | 836 | bool full_concurrent = priv->bt_full_concurrent; |
837 | unsigned long flags; | 837 | unsigned long flags; |
838 | 838 | ||
839 | spin_lock_irqsave(&priv->lock, flags); | 839 | if (priv->bt_ant_couple_ok) { |
840 | if (priv->bt_ci_compliance && priv->bt_ant_couple_ok) | 840 | /* |
841 | full_concurrent = true; | 841 | * Is there a need to switch between |
842 | else | 842 | * full concurrency and 3-wire? |
843 | full_concurrent = false; | 843 | */ |
844 | spin_unlock_irqrestore(&priv->lock, flags); | 844 | spin_lock_irqsave(&priv->lock, flags); |
845 | 845 | if (priv->bt_ci_compliance && priv->bt_ant_couple_ok) | |
846 | if (priv->bt_full_concurrent != full_concurrent) { | 846 | full_concurrent = true; |
847 | else | ||
848 | full_concurrent = false; | ||
849 | spin_unlock_irqrestore(&priv->lock, flags); | ||
850 | } | ||
851 | if ((priv->bt_traffic_load != priv->last_bt_traffic_load) || | ||
852 | (priv->bt_full_concurrent != full_concurrent)) { | ||
847 | priv->bt_full_concurrent = full_concurrent; | 853 | priv->bt_full_concurrent = full_concurrent; |
848 | 854 | ||
849 | /* Update uCode's rate table. */ | 855 | /* Update uCode's rate table. */ |
@@ -1040,8 +1046,7 @@ done: | |||
1040 | if (sta && sta->supp_rates[sband->band]) | 1046 | if (sta && sta->supp_rates[sband->band]) |
1041 | rs_rate_scale_perform(priv, skb, sta, lq_sta); | 1047 | rs_rate_scale_perform(priv, skb, sta, lq_sta); |
1042 | 1048 | ||
1043 | /* Is there a need to switch between full concurrency and 3-wire? */ | 1049 | if (priv->cfg->bt_params && priv->cfg->bt_params->advanced_bt_coexist) |
1044 | if (priv->bt_ant_couple_ok) | ||
1045 | rs_bt_update_lq(priv, ctx, lq_sta); | 1050 | rs_bt_update_lq(priv, ctx, lq_sta); |
1046 | } | 1051 | } |
1047 | 1052 | ||
@@ -3010,10 +3015,7 @@ static void rs_fill_link_cmd(struct iwl_priv *priv, | |||
3010 | */ | 3015 | */ |
3011 | if (priv && priv->cfg->bt_params && | 3016 | if (priv && priv->cfg->bt_params && |
3012 | priv->cfg->bt_params->agg_time_limit && | 3017 | priv->cfg->bt_params->agg_time_limit && |
3013 | priv->cfg->bt_params->agg_time_limit >= | 3018 | priv->bt_traffic_load >= IWL_BT_COEX_TRAFFIC_LOAD_HIGH) |
3014 | LINK_QUAL_AGG_TIME_LIMIT_MIN && | ||
3015 | priv->cfg->bt_params->agg_time_limit <= | ||
3016 | LINK_QUAL_AGG_TIME_LIMIT_MAX) | ||
3017 | lq_cmd->agg_params.agg_time_limit = | 3019 | lq_cmd->agg_params.agg_time_limit = |
3018 | cpu_to_le16(priv->cfg->bt_params->agg_time_limit); | 3020 | cpu_to_le16(priv->cfg->bt_params->agg_time_limit); |
3019 | } | 3021 | } |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c b/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c index 2d927a94074d..203ee60a82b4 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c | |||
@@ -72,6 +72,34 @@ static int iwlagn_disable_pan(struct iwl_priv *priv, | |||
72 | return ret; | 72 | return ret; |
73 | } | 73 | } |
74 | 74 | ||
75 | static void iwlagn_update_qos(struct iwl_priv *priv, | ||
76 | struct iwl_rxon_context *ctx) | ||
77 | { | ||
78 | int ret; | ||
79 | |||
80 | if (!ctx->is_active) | ||
81 | return; | ||
82 | |||
83 | ctx->qos_data.def_qos_parm.qos_flags = 0; | ||
84 | |||
85 | if (ctx->qos_data.qos_active) | ||
86 | ctx->qos_data.def_qos_parm.qos_flags |= | ||
87 | QOS_PARAM_FLG_UPDATE_EDCA_MSK; | ||
88 | |||
89 | if (ctx->ht.enabled) | ||
90 | ctx->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK; | ||
91 | |||
92 | IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n", | ||
93 | ctx->qos_data.qos_active, | ||
94 | ctx->qos_data.def_qos_parm.qos_flags); | ||
95 | |||
96 | ret = iwl_send_cmd_pdu(priv, ctx->qos_cmd, | ||
97 | sizeof(struct iwl_qosparam_cmd), | ||
98 | &ctx->qos_data.def_qos_parm); | ||
99 | if (ret) | ||
100 | IWL_ERR(priv, "Failed to update QoS\n"); | ||
101 | } | ||
102 | |||
75 | static int iwlagn_update_beacon(struct iwl_priv *priv, | 103 | static int iwlagn_update_beacon(struct iwl_priv *priv, |
76 | struct ieee80211_vif *vif) | 104 | struct ieee80211_vif *vif) |
77 | { | 105 | { |
@@ -97,6 +125,7 @@ int iwlagn_commit_rxon(struct iwl_priv *priv, struct iwl_rxon_context *ctx) | |||
97 | /* cast away the const for active_rxon in this function */ | 125 | /* cast away the const for active_rxon in this function */ |
98 | struct iwl_rxon_cmd *active = (void *)&ctx->active; | 126 | struct iwl_rxon_cmd *active = (void *)&ctx->active; |
99 | bool new_assoc = !!(ctx->staging.filter_flags & RXON_FILTER_ASSOC_MSK); | 127 | bool new_assoc = !!(ctx->staging.filter_flags & RXON_FILTER_ASSOC_MSK); |
128 | bool old_assoc = !!(ctx->active.filter_flags & RXON_FILTER_ASSOC_MSK); | ||
100 | int ret; | 129 | int ret; |
101 | 130 | ||
102 | lockdep_assert_held(&priv->mutex); | 131 | lockdep_assert_held(&priv->mutex); |
@@ -176,25 +205,27 @@ int iwlagn_commit_rxon(struct iwl_priv *priv, struct iwl_rxon_context *ctx) | |||
176 | * AP station must be done after the BSSID is set to correctly | 205 | * AP station must be done after the BSSID is set to correctly |
177 | * set up filters in the device. | 206 | * set up filters in the device. |
178 | */ | 207 | */ |
179 | if (ctx->ctxid == IWL_RXON_CTX_BSS) | 208 | if ((old_assoc && new_assoc) || !new_assoc) { |
180 | ret = iwlagn_disable_bss(priv, ctx, &ctx->staging); | 209 | if (ctx->ctxid == IWL_RXON_CTX_BSS) |
181 | else | 210 | ret = iwlagn_disable_bss(priv, ctx, &ctx->staging); |
182 | ret = iwlagn_disable_pan(priv, ctx, &ctx->staging); | 211 | else |
183 | if (ret) | 212 | ret = iwlagn_disable_pan(priv, ctx, &ctx->staging); |
184 | return ret; | 213 | if (ret) |
214 | return ret; | ||
185 | 215 | ||
186 | memcpy(active, &ctx->staging, sizeof(*active)); | 216 | memcpy(active, &ctx->staging, sizeof(*active)); |
187 | 217 | ||
188 | /* | 218 | /* |
189 | * Un-assoc RXON clears the station table and WEP | 219 | * Un-assoc RXON clears the station table and WEP |
190 | * keys, so we have to restore those afterwards. | 220 | * keys, so we have to restore those afterwards. |
191 | */ | 221 | */ |
192 | iwl_clear_ucode_stations(priv, ctx); | 222 | iwl_clear_ucode_stations(priv, ctx); |
193 | iwl_restore_stations(priv, ctx); | 223 | iwl_restore_stations(priv, ctx); |
194 | ret = iwl_restore_default_wep_keys(priv, ctx); | 224 | ret = iwl_restore_default_wep_keys(priv, ctx); |
195 | if (ret) { | 225 | if (ret) { |
196 | IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret); | 226 | IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret); |
197 | return ret; | 227 | return ret; |
228 | } | ||
198 | } | 229 | } |
199 | 230 | ||
200 | /* RXON timing must be before associated RXON */ | 231 | /* RXON timing must be before associated RXON */ |
@@ -205,6 +236,9 @@ int iwlagn_commit_rxon(struct iwl_priv *priv, struct iwl_rxon_context *ctx) | |||
205 | } | 236 | } |
206 | 237 | ||
207 | if (new_assoc) { | 238 | if (new_assoc) { |
239 | /* QoS info may be cleared by previous un-assoc RXON */ | ||
240 | iwlagn_update_qos(priv, ctx); | ||
241 | |||
208 | /* | 242 | /* |
209 | * We'll run into this code path when beaconing is | 243 | * We'll run into this code path when beaconing is |
210 | * enabled, but then we also need to send the beacon | 244 | * enabled, but then we also need to send the beacon |
@@ -235,6 +269,8 @@ int iwlagn_commit_rxon(struct iwl_priv *priv, struct iwl_rxon_context *ctx) | |||
235 | } | 269 | } |
236 | memcpy(active, &ctx->staging, sizeof(*active)); | 270 | memcpy(active, &ctx->staging, sizeof(*active)); |
237 | 271 | ||
272 | iwl_reprogram_ap_sta(priv, ctx); | ||
273 | |||
238 | /* IBSS beacon needs to be sent after setting assoc */ | 274 | /* IBSS beacon needs to be sent after setting assoc */ |
239 | if (ctx->vif && (ctx->vif->type == NL80211_IFTYPE_ADHOC)) | 275 | if (ctx->vif && (ctx->vif->type == NL80211_IFTYPE_ADHOC)) |
240 | if (iwlagn_update_beacon(priv, ctx->vif)) | 276 | if (iwlagn_update_beacon(priv, ctx->vif)) |
@@ -261,34 +297,6 @@ int iwlagn_commit_rxon(struct iwl_priv *priv, struct iwl_rxon_context *ctx) | |||
261 | return 0; | 297 | return 0; |
262 | } | 298 | } |
263 | 299 | ||
264 | static void iwlagn_update_qos(struct iwl_priv *priv, | ||
265 | struct iwl_rxon_context *ctx) | ||
266 | { | ||
267 | int ret; | ||
268 | |||
269 | if (!ctx->is_active) | ||
270 | return; | ||
271 | |||
272 | ctx->qos_data.def_qos_parm.qos_flags = 0; | ||
273 | |||
274 | if (ctx->qos_data.qos_active) | ||
275 | ctx->qos_data.def_qos_parm.qos_flags |= | ||
276 | QOS_PARAM_FLG_UPDATE_EDCA_MSK; | ||
277 | |||
278 | if (ctx->ht.enabled) | ||
279 | ctx->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK; | ||
280 | |||
281 | IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n", | ||
282 | ctx->qos_data.qos_active, | ||
283 | ctx->qos_data.def_qos_parm.qos_flags); | ||
284 | |||
285 | ret = iwl_send_cmd_pdu(priv, ctx->qos_cmd, | ||
286 | sizeof(struct iwl_qosparam_cmd), | ||
287 | &ctx->qos_data.def_qos_parm); | ||
288 | if (ret) | ||
289 | IWL_ERR(priv, "Failed to update QoS\n"); | ||
290 | } | ||
291 | |||
292 | int iwlagn_mac_config(struct ieee80211_hw *hw, u32 changed) | 300 | int iwlagn_mac_config(struct ieee80211_hw *hw, u32 changed) |
293 | { | 301 | { |
294 | struct iwl_priv *priv = hw->priv; | 302 | struct iwl_priv *priv = hw->priv; |
@@ -507,6 +515,11 @@ void iwlagn_bss_info_changed(struct ieee80211_hw *hw, | |||
507 | 515 | ||
508 | mutex_lock(&priv->mutex); | 516 | mutex_lock(&priv->mutex); |
509 | 517 | ||
518 | if (WARN_ON(!ctx->vif)) { | ||
519 | mutex_unlock(&priv->mutex); | ||
520 | return; | ||
521 | } | ||
522 | |||
510 | if (changes & BSS_CHANGED_BEACON_INT) | 523 | if (changes & BSS_CHANGED_BEACON_INT) |
511 | force = true; | 524 | force = true; |
512 | 525 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-tx.c b/drivers/net/wireless/iwlwifi/iwl-agn-tx.c index 2b078a995729..07bbc915529a 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-tx.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-tx.c | |||
@@ -518,11 +518,11 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) | |||
518 | struct iwl_cmd_meta *out_meta; | 518 | struct iwl_cmd_meta *out_meta; |
519 | struct iwl_tx_cmd *tx_cmd; | 519 | struct iwl_tx_cmd *tx_cmd; |
520 | struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS]; | 520 | struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS]; |
521 | int swq_id, txq_id; | 521 | int txq_id; |
522 | dma_addr_t phys_addr; | 522 | dma_addr_t phys_addr; |
523 | dma_addr_t txcmd_phys; | 523 | dma_addr_t txcmd_phys; |
524 | dma_addr_t scratch_phys; | 524 | dma_addr_t scratch_phys; |
525 | u16 len, len_org, firstlen, secondlen; | 525 | u16 len, firstlen, secondlen; |
526 | u16 seq_number = 0; | 526 | u16 seq_number = 0; |
527 | __le16 fc; | 527 | __le16 fc; |
528 | u8 hdr_len; | 528 | u8 hdr_len; |
@@ -620,7 +620,6 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) | |||
620 | } | 620 | } |
621 | 621 | ||
622 | txq = &priv->txq[txq_id]; | 622 | txq = &priv->txq[txq_id]; |
623 | swq_id = txq->swq_id; | ||
624 | q = &txq->q; | 623 | q = &txq->q; |
625 | 624 | ||
626 | if (unlikely(iwl_queue_space(q) < q->high_mark)) { | 625 | if (unlikely(iwl_queue_space(q) < q->high_mark)) { |
@@ -687,30 +686,23 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) | |||
687 | */ | 686 | */ |
688 | len = sizeof(struct iwl_tx_cmd) + | 687 | len = sizeof(struct iwl_tx_cmd) + |
689 | sizeof(struct iwl_cmd_header) + hdr_len; | 688 | sizeof(struct iwl_cmd_header) + hdr_len; |
690 | 689 | firstlen = (len + 3) & ~3; | |
691 | len_org = len; | ||
692 | firstlen = len = (len + 3) & ~3; | ||
693 | |||
694 | if (len_org != len) | ||
695 | len_org = 1; | ||
696 | else | ||
697 | len_org = 0; | ||
698 | 690 | ||
699 | /* Tell NIC about any 2-byte padding after MAC header */ | 691 | /* Tell NIC about any 2-byte padding after MAC header */ |
700 | if (len_org) | 692 | if (firstlen != len) |
701 | tx_cmd->tx_flags |= TX_CMD_FLG_MH_PAD_MSK; | 693 | tx_cmd->tx_flags |= TX_CMD_FLG_MH_PAD_MSK; |
702 | 694 | ||
703 | /* Physical address of this Tx command's header (not MAC header!), | 695 | /* Physical address of this Tx command's header (not MAC header!), |
704 | * within command buffer array. */ | 696 | * within command buffer array. */ |
705 | txcmd_phys = pci_map_single(priv->pci_dev, | 697 | txcmd_phys = pci_map_single(priv->pci_dev, |
706 | &out_cmd->hdr, len, | 698 | &out_cmd->hdr, firstlen, |
707 | PCI_DMA_BIDIRECTIONAL); | 699 | PCI_DMA_BIDIRECTIONAL); |
708 | dma_unmap_addr_set(out_meta, mapping, txcmd_phys); | 700 | dma_unmap_addr_set(out_meta, mapping, txcmd_phys); |
709 | dma_unmap_len_set(out_meta, len, len); | 701 | dma_unmap_len_set(out_meta, len, firstlen); |
710 | /* Add buffer containing Tx command and MAC(!) header to TFD's | 702 | /* Add buffer containing Tx command and MAC(!) header to TFD's |
711 | * first entry */ | 703 | * first entry */ |
712 | priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq, | 704 | priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq, |
713 | txcmd_phys, len, 1, 0); | 705 | txcmd_phys, firstlen, 1, 0); |
714 | 706 | ||
715 | if (!ieee80211_has_morefrags(hdr->frame_control)) { | 707 | if (!ieee80211_has_morefrags(hdr->frame_control)) { |
716 | txq->need_update = 1; | 708 | txq->need_update = 1; |
@@ -721,23 +713,21 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) | |||
721 | 713 | ||
722 | /* Set up TFD's 2nd entry to point directly to remainder of skb, | 714 | /* Set up TFD's 2nd entry to point directly to remainder of skb, |
723 | * if any (802.11 null frames have no payload). */ | 715 | * if any (802.11 null frames have no payload). */ |
724 | secondlen = len = skb->len - hdr_len; | 716 | secondlen = skb->len - hdr_len; |
725 | if (len) { | 717 | if (secondlen > 0) { |
726 | phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len, | 718 | phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len, |
727 | len, PCI_DMA_TODEVICE); | 719 | secondlen, PCI_DMA_TODEVICE); |
728 | priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq, | 720 | priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq, |
729 | phys_addr, len, | 721 | phys_addr, secondlen, |
730 | 0, 0); | 722 | 0, 0); |
731 | } | 723 | } |
732 | 724 | ||
733 | scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) + | 725 | scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) + |
734 | offsetof(struct iwl_tx_cmd, scratch); | 726 | offsetof(struct iwl_tx_cmd, scratch); |
735 | 727 | ||
736 | len = sizeof(struct iwl_tx_cmd) + | ||
737 | sizeof(struct iwl_cmd_header) + hdr_len; | ||
738 | /* take back ownership of DMA buffer to enable update */ | 728 | /* take back ownership of DMA buffer to enable update */ |
739 | pci_dma_sync_single_for_cpu(priv->pci_dev, txcmd_phys, | 729 | pci_dma_sync_single_for_cpu(priv->pci_dev, txcmd_phys, |
740 | len, PCI_DMA_BIDIRECTIONAL); | 730 | firstlen, PCI_DMA_BIDIRECTIONAL); |
741 | tx_cmd->dram_lsb_ptr = cpu_to_le32(scratch_phys); | 731 | tx_cmd->dram_lsb_ptr = cpu_to_le32(scratch_phys); |
742 | tx_cmd->dram_msb_ptr = iwl_get_dma_hi_addr(scratch_phys); | 732 | tx_cmd->dram_msb_ptr = iwl_get_dma_hi_addr(scratch_phys); |
743 | 733 | ||
@@ -753,7 +743,7 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) | |||
753 | le16_to_cpu(tx_cmd->len)); | 743 | le16_to_cpu(tx_cmd->len)); |
754 | 744 | ||
755 | pci_dma_sync_single_for_device(priv->pci_dev, txcmd_phys, | 745 | pci_dma_sync_single_for_device(priv->pci_dev, txcmd_phys, |
756 | len, PCI_DMA_BIDIRECTIONAL); | 746 | firstlen, PCI_DMA_BIDIRECTIONAL); |
757 | 747 | ||
758 | trace_iwlwifi_dev_tx(priv, | 748 | trace_iwlwifi_dev_tx(priv, |
759 | &((struct iwl_tfd *)txq->tfds)[txq->q.write_ptr], | 749 | &((struct iwl_tfd *)txq->tfds)[txq->q.write_ptr], |
@@ -784,7 +774,7 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) | |||
784 | iwl_txq_update_write_ptr(priv, txq); | 774 | iwl_txq_update_write_ptr(priv, txq); |
785 | spin_unlock_irqrestore(&priv->lock, flags); | 775 | spin_unlock_irqrestore(&priv->lock, flags); |
786 | } else { | 776 | } else { |
787 | iwl_stop_queue(priv, txq->swq_id); | 777 | iwl_stop_queue(priv, txq); |
788 | } | 778 | } |
789 | } | 779 | } |
790 | 780 | ||
@@ -1013,7 +1003,7 @@ int iwlagn_tx_agg_start(struct iwl_priv *priv, struct ieee80211_vif *vif, | |||
1013 | tid_data = &priv->stations[sta_id].tid[tid]; | 1003 | tid_data = &priv->stations[sta_id].tid[tid]; |
1014 | *ssn = SEQ_TO_SN(tid_data->seq_number); | 1004 | *ssn = SEQ_TO_SN(tid_data->seq_number); |
1015 | tid_data->agg.txq_id = txq_id; | 1005 | tid_data->agg.txq_id = txq_id; |
1016 | priv->txq[txq_id].swq_id = iwl_virtual_agg_queue_num(get_ac_from_tid(tid), txq_id); | 1006 | iwl_set_swq_id(&priv->txq[txq_id], get_ac_from_tid(tid), txq_id); |
1017 | spin_unlock_irqrestore(&priv->sta_lock, flags); | 1007 | spin_unlock_irqrestore(&priv->sta_lock, flags); |
1018 | 1008 | ||
1019 | ret = priv->cfg->ops->lib->txq_agg_enable(priv, txq_id, tx_fifo, | 1009 | ret = priv->cfg->ops->lib->txq_agg_enable(priv, txq_id, tx_fifo, |
@@ -1241,37 +1231,61 @@ static int iwlagn_tx_status_reply_compressed_ba(struct iwl_priv *priv, | |||
1241 | if (sh < 0) /* tbw something is wrong with indices */ | 1231 | if (sh < 0) /* tbw something is wrong with indices */ |
1242 | sh += 0x100; | 1232 | sh += 0x100; |
1243 | 1233 | ||
1244 | /* don't use 64-bit values for now */ | ||
1245 | bitmap = le64_to_cpu(ba_resp->bitmap) >> sh; | ||
1246 | |||
1247 | if (agg->frame_count > (64 - sh)) { | 1234 | if (agg->frame_count > (64 - sh)) { |
1248 | IWL_DEBUG_TX_REPLY(priv, "more frames than bitmap size"); | 1235 | IWL_DEBUG_TX_REPLY(priv, "more frames than bitmap size"); |
1249 | return -1; | 1236 | return -1; |
1250 | } | 1237 | } |
1251 | 1238 | if (!priv->cfg->base_params->no_agg_framecnt_info && ba_resp->txed) { | |
1252 | /* check for success or failure according to the | 1239 | /* |
1253 | * transmitted bitmap and block-ack bitmap */ | 1240 | * sent and ack information provided by uCode |
1254 | sent_bitmap = bitmap & agg->bitmap; | 1241 | * use it instead of figure out ourself |
1255 | 1242 | */ | |
1256 | /* For each frame attempted in aggregation, | 1243 | if (ba_resp->txed_2_done > ba_resp->txed) { |
1257 | * update driver's record of tx frame's status. */ | 1244 | IWL_DEBUG_TX_REPLY(priv, |
1258 | i = 0; | 1245 | "bogus sent(%d) and ack(%d) count\n", |
1259 | while (sent_bitmap) { | 1246 | ba_resp->txed, ba_resp->txed_2_done); |
1260 | ack = sent_bitmap & 1ULL; | 1247 | /* |
1261 | successes += ack; | 1248 | * set txed_2_done = txed, |
1262 | IWL_DEBUG_TX_REPLY(priv, "%s ON i=%d idx=%d raw=%d\n", | 1249 | * so it won't impact rate scale |
1263 | ack ? "ACK" : "NACK", i, (agg->start_idx + i) & 0xff, | 1250 | */ |
1264 | agg->start_idx + i); | 1251 | ba_resp->txed = ba_resp->txed_2_done; |
1265 | sent_bitmap >>= 1; | 1252 | } |
1266 | ++i; | 1253 | IWL_DEBUG_HT(priv, "agg frames sent:%d, acked:%d\n", |
1254 | ba_resp->txed, ba_resp->txed_2_done); | ||
1255 | } else { | ||
1256 | /* don't use 64-bit values for now */ | ||
1257 | bitmap = le64_to_cpu(ba_resp->bitmap) >> sh; | ||
1258 | |||
1259 | /* check for success or failure according to the | ||
1260 | * transmitted bitmap and block-ack bitmap */ | ||
1261 | sent_bitmap = bitmap & agg->bitmap; | ||
1262 | |||
1263 | /* For each frame attempted in aggregation, | ||
1264 | * update driver's record of tx frame's status. */ | ||
1265 | i = 0; | ||
1266 | while (sent_bitmap) { | ||
1267 | ack = sent_bitmap & 1ULL; | ||
1268 | successes += ack; | ||
1269 | IWL_DEBUG_TX_REPLY(priv, "%s ON i=%d idx=%d raw=%d\n", | ||
1270 | ack ? "ACK" : "NACK", i, | ||
1271 | (agg->start_idx + i) & 0xff, | ||
1272 | agg->start_idx + i); | ||
1273 | sent_bitmap >>= 1; | ||
1274 | ++i; | ||
1275 | } | ||
1267 | } | 1276 | } |
1268 | |||
1269 | info = IEEE80211_SKB_CB(priv->txq[scd_flow].txb[agg->start_idx].skb); | 1277 | info = IEEE80211_SKB_CB(priv->txq[scd_flow].txb[agg->start_idx].skb); |
1270 | memset(&info->status, 0, sizeof(info->status)); | 1278 | memset(&info->status, 0, sizeof(info->status)); |
1271 | info->flags |= IEEE80211_TX_STAT_ACK; | 1279 | info->flags |= IEEE80211_TX_STAT_ACK; |
1272 | info->flags |= IEEE80211_TX_STAT_AMPDU; | 1280 | info->flags |= IEEE80211_TX_STAT_AMPDU; |
1273 | info->status.ampdu_ack_len = successes; | 1281 | if (!priv->cfg->base_params->no_agg_framecnt_info && ba_resp->txed) { |
1274 | info->status.ampdu_len = agg->frame_count; | 1282 | info->status.ampdu_ack_len = ba_resp->txed_2_done; |
1283 | info->status.ampdu_len = ba_resp->txed; | ||
1284 | |||
1285 | } else { | ||
1286 | info->status.ampdu_ack_len = successes; | ||
1287 | info->status.ampdu_len = agg->frame_count; | ||
1288 | } | ||
1275 | iwlagn_hwrate_to_tx_control(priv, agg->rate_n_flags, info); | 1289 | iwlagn_hwrate_to_tx_control(priv, agg->rate_n_flags, info); |
1276 | 1290 | ||
1277 | IWL_DEBUG_TX_REPLY(priv, "Bitmap %llx\n", (unsigned long long)bitmap); | 1291 | IWL_DEBUG_TX_REPLY(priv, "Bitmap %llx\n", (unsigned long long)bitmap); |
@@ -1385,7 +1399,7 @@ void iwlagn_rx_reply_compressed_ba(struct iwl_priv *priv, | |||
1385 | if ((iwl_queue_space(&txq->q) > txq->q.low_mark) && | 1399 | if ((iwl_queue_space(&txq->q) > txq->q.low_mark) && |
1386 | priv->mac80211_registered && | 1400 | priv->mac80211_registered && |
1387 | (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) | 1401 | (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) |
1388 | iwl_wake_queue(priv, txq->swq_id); | 1402 | iwl_wake_queue(priv, txq); |
1389 | 1403 | ||
1390 | iwlagn_txq_check_empty(priv, sta_id, tid, scd_flow); | 1404 | iwlagn_txq_check_empty(priv, sta_id, tid, scd_flow); |
1391 | } | 1405 | } |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-ucode.c b/drivers/net/wireless/iwlwifi/iwl-agn-ucode.c index 703621107dac..411a7a20450a 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-ucode.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-ucode.c | |||
@@ -40,30 +40,36 @@ | |||
40 | #include "iwl-agn.h" | 40 | #include "iwl-agn.h" |
41 | #include "iwl-agn-calib.h" | 41 | #include "iwl-agn-calib.h" |
42 | 42 | ||
43 | static const s8 iwlagn_default_queue_to_tx_fifo[] = { | 43 | #define IWL_AC_UNSET -1 |
44 | IWL_TX_FIFO_VO, | 44 | |
45 | IWL_TX_FIFO_VI, | 45 | struct queue_to_fifo_ac { |
46 | IWL_TX_FIFO_BE, | 46 | s8 fifo, ac; |
47 | IWL_TX_FIFO_BK, | 47 | }; |
48 | IWLAGN_CMD_FIFO_NUM, | 48 | |
49 | IWL_TX_FIFO_UNUSED, | 49 | static const struct queue_to_fifo_ac iwlagn_default_queue_to_tx_fifo[] = { |
50 | IWL_TX_FIFO_UNUSED, | 50 | { IWL_TX_FIFO_VO, 0, }, |
51 | IWL_TX_FIFO_UNUSED, | 51 | { IWL_TX_FIFO_VI, 1, }, |
52 | IWL_TX_FIFO_UNUSED, | 52 | { IWL_TX_FIFO_BE, 2, }, |
53 | IWL_TX_FIFO_UNUSED, | 53 | { IWL_TX_FIFO_BK, 3, }, |
54 | { IWLAGN_CMD_FIFO_NUM, IWL_AC_UNSET, }, | ||
55 | { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, }, | ||
56 | { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, }, | ||
57 | { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, }, | ||
58 | { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, }, | ||
59 | { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, }, | ||
54 | }; | 60 | }; |
55 | 61 | ||
56 | static const s8 iwlagn_ipan_queue_to_tx_fifo[] = { | 62 | static const struct queue_to_fifo_ac iwlagn_ipan_queue_to_tx_fifo[] = { |
57 | IWL_TX_FIFO_VO, | 63 | { IWL_TX_FIFO_VO, 0, }, |
58 | IWL_TX_FIFO_VI, | 64 | { IWL_TX_FIFO_VI, 1, }, |
59 | IWL_TX_FIFO_BE, | 65 | { IWL_TX_FIFO_BE, 2, }, |
60 | IWL_TX_FIFO_BK, | 66 | { IWL_TX_FIFO_BK, 3, }, |
61 | IWL_TX_FIFO_BK_IPAN, | 67 | { IWL_TX_FIFO_BK_IPAN, 3, }, |
62 | IWL_TX_FIFO_BE_IPAN, | 68 | { IWL_TX_FIFO_BE_IPAN, 2, }, |
63 | IWL_TX_FIFO_VI_IPAN, | 69 | { IWL_TX_FIFO_VI_IPAN, 1, }, |
64 | IWL_TX_FIFO_VO_IPAN, | 70 | { IWL_TX_FIFO_VO_IPAN, 0, }, |
65 | IWL_TX_FIFO_BE_IPAN, | 71 | { IWL_TX_FIFO_BE_IPAN, 2, }, |
66 | IWLAGN_CMD_FIFO_NUM, | 72 | { IWLAGN_CMD_FIFO_NUM, IWL_AC_UNSET, }, |
67 | }; | 73 | }; |
68 | 74 | ||
69 | static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = { | 75 | static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = { |
@@ -429,7 +435,7 @@ void iwlagn_send_bt_env(struct iwl_priv *priv, u8 action, u8 type) | |||
429 | 435 | ||
430 | int iwlagn_alive_notify(struct iwl_priv *priv) | 436 | int iwlagn_alive_notify(struct iwl_priv *priv) |
431 | { | 437 | { |
432 | const s8 *queues; | 438 | const struct queue_to_fifo_ac *queue_to_fifo; |
433 | u32 a; | 439 | u32 a; |
434 | unsigned long flags; | 440 | unsigned long flags; |
435 | int i, chan; | 441 | int i, chan; |
@@ -492,9 +498,9 @@ int iwlagn_alive_notify(struct iwl_priv *priv) | |||
492 | 498 | ||
493 | /* map queues to FIFOs */ | 499 | /* map queues to FIFOs */ |
494 | if (priv->valid_contexts != BIT(IWL_RXON_CTX_BSS)) | 500 | if (priv->valid_contexts != BIT(IWL_RXON_CTX_BSS)) |
495 | queues = iwlagn_ipan_queue_to_tx_fifo; | 501 | queue_to_fifo = iwlagn_ipan_queue_to_tx_fifo; |
496 | else | 502 | else |
497 | queues = iwlagn_default_queue_to_tx_fifo; | 503 | queue_to_fifo = iwlagn_default_queue_to_tx_fifo; |
498 | 504 | ||
499 | iwlagn_set_wr_ptrs(priv, priv->cmd_queue, 0); | 505 | iwlagn_set_wr_ptrs(priv, priv->cmd_queue, 0); |
500 | 506 | ||
@@ -510,14 +516,17 @@ int iwlagn_alive_notify(struct iwl_priv *priv) | |||
510 | BUILD_BUG_ON(ARRAY_SIZE(iwlagn_ipan_queue_to_tx_fifo) != 10); | 516 | BUILD_BUG_ON(ARRAY_SIZE(iwlagn_ipan_queue_to_tx_fifo) != 10); |
511 | 517 | ||
512 | for (i = 0; i < 10; i++) { | 518 | for (i = 0; i < 10; i++) { |
513 | int ac = queues[i]; | 519 | int fifo = queue_to_fifo[i].fifo; |
520 | int ac = queue_to_fifo[i].ac; | ||
514 | 521 | ||
515 | iwl_txq_ctx_activate(priv, i); | 522 | iwl_txq_ctx_activate(priv, i); |
516 | 523 | ||
517 | if (ac == IWL_TX_FIFO_UNUSED) | 524 | if (fifo == IWL_TX_FIFO_UNUSED) |
518 | continue; | 525 | continue; |
519 | 526 | ||
520 | iwlagn_tx_queue_set_status(priv, &priv->txq[i], ac, 0); | 527 | if (ac != IWL_AC_UNSET) |
528 | iwl_set_swq_id(&priv->txq[i], ac, i); | ||
529 | iwlagn_tx_queue_set_status(priv, &priv->txq[i], fifo, 0); | ||
521 | } | 530 | } |
522 | 531 | ||
523 | spin_unlock_irqrestore(&priv->lock, flags); | 532 | spin_unlock_irqrestore(&priv->lock, flags); |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c index 007fb20d78ab..5b96b0d80091 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn.c | |||
@@ -97,7 +97,8 @@ void iwl_update_chain_flags(struct iwl_priv *priv) | |||
97 | if (priv->cfg->ops->hcmd->set_rxon_chain) { | 97 | if (priv->cfg->ops->hcmd->set_rxon_chain) { |
98 | for_each_context(priv, ctx) { | 98 | for_each_context(priv, ctx) { |
99 | priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx); | 99 | priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx); |
100 | iwlcore_commit_rxon(priv, ctx); | 100 | if (ctx->active.rx_chain != ctx->staging.rx_chain) |
101 | iwlcore_commit_rxon(priv, ctx); | ||
101 | } | 102 | } |
102 | } | 103 | } |
103 | } | 104 | } |
@@ -2716,6 +2717,8 @@ static void iwl_alive_start(struct iwl_priv *priv) | |||
2716 | 2717 | ||
2717 | iwl_reset_run_time_calib(priv); | 2718 | iwl_reset_run_time_calib(priv); |
2718 | 2719 | ||
2720 | set_bit(STATUS_READY, &priv->status); | ||
2721 | |||
2719 | /* Configure the adapter for unassociated operation */ | 2722 | /* Configure the adapter for unassociated operation */ |
2720 | iwlcore_commit_rxon(priv, ctx); | 2723 | iwlcore_commit_rxon(priv, ctx); |
2721 | 2724 | ||
@@ -2725,7 +2728,6 @@ static void iwl_alive_start(struct iwl_priv *priv) | |||
2725 | iwl_leds_init(priv); | 2728 | iwl_leds_init(priv); |
2726 | 2729 | ||
2727 | IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n"); | 2730 | IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n"); |
2728 | set_bit(STATUS_READY, &priv->status); | ||
2729 | wake_up_interruptible(&priv->wait_command_queue); | 2731 | wake_up_interruptible(&priv->wait_command_queue); |
2730 | 2732 | ||
2731 | iwl_power_update_mode(priv, true); | 2733 | iwl_power_update_mode(priv, true); |
@@ -3837,7 +3839,6 @@ static int iwl_init_drv(struct iwl_priv *priv) | |||
3837 | priv->bt_on_thresh = BT_ON_THRESHOLD_DEF; | 3839 | priv->bt_on_thresh = BT_ON_THRESHOLD_DEF; |
3838 | priv->bt_duration = BT_DURATION_LIMIT_DEF; | 3840 | priv->bt_duration = BT_DURATION_LIMIT_DEF; |
3839 | priv->dynamic_frag_thresh = BT_FRAG_THRESHOLD_DEF; | 3841 | priv->dynamic_frag_thresh = BT_FRAG_THRESHOLD_DEF; |
3840 | priv->dynamic_agg_thresh = BT_AGG_THRESHOLD_DEF; | ||
3841 | } | 3842 | } |
3842 | 3843 | ||
3843 | /* Set the tx_power_user_lmt to the lowest power level | 3844 | /* Set the tx_power_user_lmt to the lowest power level |
@@ -4135,6 +4136,10 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
4135 | if (err) | 4136 | if (err) |
4136 | goto out_free_eeprom; | 4137 | goto out_free_eeprom; |
4137 | 4138 | ||
4139 | err = iwl_eeprom_check_sku(priv); | ||
4140 | if (err) | ||
4141 | goto out_free_eeprom; | ||
4142 | |||
4138 | /* extract MAC Address */ | 4143 | /* extract MAC Address */ |
4139 | iwl_eeprom_get_mac(priv, priv->addresses[0].addr); | 4144 | iwl_eeprom_get_mac(priv, priv->addresses[0].addr); |
4140 | IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr); | 4145 | IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr); |
diff --git a/drivers/net/wireless/iwlwifi/iwl-commands.h b/drivers/net/wireless/iwlwifi/iwl-commands.h index 424801abc80e..c9448cba1e20 100644 --- a/drivers/net/wireless/iwlwifi/iwl-commands.h +++ b/drivers/net/wireless/iwlwifi/iwl-commands.h | |||
@@ -2022,6 +2022,9 @@ struct iwl_compressed_ba_resp { | |||
2022 | __le64 bitmap; | 2022 | __le64 bitmap; |
2023 | __le16 scd_flow; | 2023 | __le16 scd_flow; |
2024 | __le16 scd_ssn; | 2024 | __le16 scd_ssn; |
2025 | /* following only for 5000 series and up */ | ||
2026 | u8 txed; /* number of frames sent */ | ||
2027 | u8 txed_2_done; /* number of frames acked */ | ||
2025 | } __packed; | 2028 | } __packed; |
2026 | 2029 | ||
2027 | /* | 2030 | /* |
@@ -2407,9 +2410,9 @@ struct iwl_link_quality_cmd { | |||
2407 | #define BT_FRAG_THRESHOLD_MAX 0 | 2410 | #define BT_FRAG_THRESHOLD_MAX 0 |
2408 | #define BT_FRAG_THRESHOLD_MIN 0 | 2411 | #define BT_FRAG_THRESHOLD_MIN 0 |
2409 | 2412 | ||
2410 | #define BT_AGG_THRESHOLD_DEF 0 | 2413 | #define BT_AGG_THRESHOLD_DEF 1200 |
2411 | #define BT_AGG_THRESHOLD_MAX 0 | 2414 | #define BT_AGG_THRESHOLD_MAX 8000 |
2412 | #define BT_AGG_THRESHOLD_MIN 0 | 2415 | #define BT_AGG_THRESHOLD_MIN 400 |
2413 | 2416 | ||
2414 | /* | 2417 | /* |
2415 | * REPLY_BT_CONFIG = 0x9b (command, has simple generic response) | 2418 | * REPLY_BT_CONFIG = 0x9b (command, has simple generic response) |
@@ -2436,8 +2439,9 @@ struct iwl_bt_cmd { | |||
2436 | #define IWLAGN_BT_FLAG_COEX_MODE_3W 2 | 2439 | #define IWLAGN_BT_FLAG_COEX_MODE_3W 2 |
2437 | #define IWLAGN_BT_FLAG_COEX_MODE_4W 3 | 2440 | #define IWLAGN_BT_FLAG_COEX_MODE_4W 3 |
2438 | 2441 | ||
2439 | #define IWLAGN_BT_FLAG_UCODE_DEFAULT BIT(6) | 2442 | #define IWLAGN_BT_FLAG_UCODE_DEFAULT BIT(6) |
2440 | #define IWLAGN_BT_FLAG_NOCOEX_NOTIF BIT(7) | 2443 | /* Disable Sync PSPoll on SCO/eSCO */ |
2444 | #define IWLAGN_BT_FLAG_SYNC_2_BT_DISABLE BIT(7) | ||
2441 | 2445 | ||
2442 | #define IWLAGN_BT_PRIO_BOOST_MAX 0xFF | 2446 | #define IWLAGN_BT_PRIO_BOOST_MAX 0xFF |
2443 | #define IWLAGN_BT_PRIO_BOOST_MIN 0x00 | 2447 | #define IWLAGN_BT_PRIO_BOOST_MIN 0x00 |
@@ -2447,8 +2451,8 @@ struct iwl_bt_cmd { | |||
2447 | 2451 | ||
2448 | #define IWLAGN_BT3_T7_DEFAULT 1 | 2452 | #define IWLAGN_BT3_T7_DEFAULT 1 |
2449 | 2453 | ||
2450 | #define IWLAGN_BT_KILL_ACK_MASK_DEFAULT cpu_to_le32(0xffffffff) | 2454 | #define IWLAGN_BT_KILL_ACK_MASK_DEFAULT cpu_to_le32(0xffff0000) |
2451 | #define IWLAGN_BT_KILL_CTS_MASK_DEFAULT cpu_to_le32(0xffffffff) | 2455 | #define IWLAGN_BT_KILL_CTS_MASK_DEFAULT cpu_to_le32(0xffff0000) |
2452 | 2456 | ||
2453 | #define IWLAGN_BT3_PRIO_SAMPLE_DEFAULT 2 | 2457 | #define IWLAGN_BT3_PRIO_SAMPLE_DEFAULT 2 |
2454 | 2458 | ||
@@ -2664,9 +2668,16 @@ struct iwl_spectrum_notification { | |||
2664 | #define IWL_POWER_VEC_SIZE 5 | 2668 | #define IWL_POWER_VEC_SIZE 5 |
2665 | 2669 | ||
2666 | #define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK cpu_to_le16(BIT(0)) | 2670 | #define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK cpu_to_le16(BIT(0)) |
2671 | #define IWL_POWER_POWER_SAVE_ENA_MSK cpu_to_le16(BIT(0)) | ||
2672 | #define IWL_POWER_POWER_MANAGEMENT_ENA_MSK cpu_to_le16(BIT(1)) | ||
2667 | #define IWL_POWER_SLEEP_OVER_DTIM_MSK cpu_to_le16(BIT(2)) | 2673 | #define IWL_POWER_SLEEP_OVER_DTIM_MSK cpu_to_le16(BIT(2)) |
2668 | #define IWL_POWER_PCI_PM_MSK cpu_to_le16(BIT(3)) | 2674 | #define IWL_POWER_PCI_PM_MSK cpu_to_le16(BIT(3)) |
2669 | #define IWL_POWER_FAST_PD cpu_to_le16(BIT(4)) | 2675 | #define IWL_POWER_FAST_PD cpu_to_le16(BIT(4)) |
2676 | #define IWL_POWER_BEACON_FILTERING cpu_to_le16(BIT(5)) | ||
2677 | #define IWL_POWER_SHADOW_REG_ENA cpu_to_le16(BIT(6)) | ||
2678 | #define IWL_POWER_CT_KILL_SET cpu_to_le16(BIT(7)) | ||
2679 | #define IWL_POWER_BT_SCO_ENA cpu_to_le16(BIT(8)) | ||
2680 | #define IWL_POWER_ADVANCE_PM_ENA_MSK cpu_to_le16(BIT(9)) | ||
2670 | 2681 | ||
2671 | struct iwl3945_powertable_cmd { | 2682 | struct iwl3945_powertable_cmd { |
2672 | __le16 flags; | 2683 | __le16 flags; |
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.c b/drivers/net/wireless/iwlwifi/iwl-core.c index c884ed385fcf..c41f5a878210 100644 --- a/drivers/net/wireless/iwlwifi/iwl-core.c +++ b/drivers/net/wireless/iwlwifi/iwl-core.c | |||
@@ -1469,7 +1469,7 @@ static void iwl_teardown_interface(struct iwl_priv *priv, | |||
1469 | * both values are the same and zero. | 1469 | * both values are the same and zero. |
1470 | */ | 1470 | */ |
1471 | if (vif->type == NL80211_IFTYPE_ADHOC) | 1471 | if (vif->type == NL80211_IFTYPE_ADHOC) |
1472 | priv->bt_traffic_load = priv->notif_bt_traffic_load; | 1472 | priv->bt_traffic_load = priv->last_bt_traffic_load; |
1473 | } | 1473 | } |
1474 | 1474 | ||
1475 | void iwl_mac_remove_interface(struct ieee80211_hw *hw, | 1475 | void iwl_mac_remove_interface(struct ieee80211_hw *hw, |
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.h b/drivers/net/wireless/iwlwifi/iwl-core.h index ee8cf240d65d..808be731ecb7 100644 --- a/drivers/net/wireless/iwlwifi/iwl-core.h +++ b/drivers/net/wireless/iwlwifi/iwl-core.h | |||
@@ -291,7 +291,9 @@ struct iwl_mod_params { | |||
291 | * @chain_noise_calib_by_driver: driver has the capability to perform | 291 | * @chain_noise_calib_by_driver: driver has the capability to perform |
292 | * chain noise calibration operation | 292 | * chain noise calibration operation |
293 | * @shadow_reg_enable: HW shadhow register bit | 293 | * @shadow_reg_enable: HW shadhow register bit |
294 | */ | 294 | * @no_agg_framecnt_info: uCode do not provide aggregation frame count |
295 | * information | ||
296 | */ | ||
295 | struct iwl_base_params { | 297 | struct iwl_base_params { |
296 | int eeprom_size; | 298 | int eeprom_size; |
297 | int num_of_queues; /* def: HW dependent */ | 299 | int num_of_queues; /* def: HW dependent */ |
@@ -322,6 +324,7 @@ struct iwl_base_params { | |||
322 | const bool sensitivity_calib_by_driver; | 324 | const bool sensitivity_calib_by_driver; |
323 | const bool chain_noise_calib_by_driver; | 325 | const bool chain_noise_calib_by_driver; |
324 | const bool shadow_reg_enable; | 326 | const bool shadow_reg_enable; |
327 | const bool no_agg_framecnt_info; | ||
325 | }; | 328 | }; |
326 | /* | 329 | /* |
327 | * @advanced_bt_coexist: support advanced bt coexist | 330 | * @advanced_bt_coexist: support advanced bt coexist |
@@ -331,6 +334,7 @@ struct iwl_base_params { | |||
331 | * @agg_time_limit: maximum number of uSec in aggregation | 334 | * @agg_time_limit: maximum number of uSec in aggregation |
332 | * @ampdu_factor: Maximum A-MPDU length factor | 335 | * @ampdu_factor: Maximum A-MPDU length factor |
333 | * @ampdu_density: Minimum A-MPDU spacing | 336 | * @ampdu_density: Minimum A-MPDU spacing |
337 | * @bt_sco_disable: uCode should not response to BT in SCO/ESCO mode | ||
334 | */ | 338 | */ |
335 | struct iwl_bt_params { | 339 | struct iwl_bt_params { |
336 | bool advanced_bt_coexist; | 340 | bool advanced_bt_coexist; |
@@ -340,6 +344,7 @@ struct iwl_bt_params { | |||
340 | u16 agg_time_limit; | 344 | u16 agg_time_limit; |
341 | u8 ampdu_factor; | 345 | u8 ampdu_factor; |
342 | u8 ampdu_density; | 346 | u8 ampdu_density; |
347 | bool bt_sco_disable; | ||
343 | }; | 348 | }; |
344 | /* | 349 | /* |
345 | * @use_rts_for_aggregation: use rts/cts protection for HT traffic | 350 | * @use_rts_for_aggregation: use rts/cts protection for HT traffic |
@@ -360,6 +365,8 @@ struct iwl_ht_params { | |||
360 | * @need_dc_calib: need to perform init dc calibration | 365 | * @need_dc_calib: need to perform init dc calibration |
361 | * @need_temp_offset_calib: need to perform temperature offset calibration | 366 | * @need_temp_offset_calib: need to perform temperature offset calibration |
362 | * @scan_antennas: available antenna for scan operation | 367 | * @scan_antennas: available antenna for scan operation |
368 | * @led_mode: 0=blinking, 1=On(RF On)/Off(RF Off) | ||
369 | * @adv_pm: advance power management | ||
363 | * | 370 | * |
364 | * We enable the driver to be backward compatible wrt API version. The | 371 | * We enable the driver to be backward compatible wrt API version. The |
365 | * driver specifies which APIs it supports (with @ucode_api_max being the | 372 | * driver specifies which APIs it supports (with @ucode_api_max being the |
@@ -406,6 +413,8 @@ struct iwl_cfg { | |||
406 | const bool need_temp_offset_calib; /* if used set to true */ | 413 | const bool need_temp_offset_calib; /* if used set to true */ |
407 | u8 scan_rx_antennas[IEEE80211_NUM_BANDS]; | 414 | u8 scan_rx_antennas[IEEE80211_NUM_BANDS]; |
408 | u8 scan_tx_antennas[IEEE80211_NUM_BANDS]; | 415 | u8 scan_tx_antennas[IEEE80211_NUM_BANDS]; |
416 | enum iwl_led_mode led_mode; | ||
417 | const bool adv_pm; | ||
409 | }; | 418 | }; |
410 | 419 | ||
411 | /*************************** | 420 | /*************************** |
diff --git a/drivers/net/wireless/iwlwifi/iwl-debugfs.c b/drivers/net/wireless/iwlwifi/iwl-debugfs.c index 8fdd4efdb1d3..3cc58420d445 100644 --- a/drivers/net/wireless/iwlwifi/iwl-debugfs.c +++ b/drivers/net/wireless/iwlwifi/iwl-debugfs.c | |||
@@ -992,11 +992,8 @@ static ssize_t iwl_dbgfs_tx_queue_read(struct file *file, | |||
992 | " swq_id=%#.2x (ac %d/hwq %d)\n", | 992 | " swq_id=%#.2x (ac %d/hwq %d)\n", |
993 | cnt, q->read_ptr, q->write_ptr, | 993 | cnt, q->read_ptr, q->write_ptr, |
994 | !!test_bit(cnt, priv->queue_stopped), | 994 | !!test_bit(cnt, priv->queue_stopped), |
995 | txq->swq_id, | 995 | txq->swq_id, txq->swq_id & 3, |
996 | txq->swq_id & 0x80 ? txq->swq_id & 3 : | 996 | (txq->swq_id >> 2) & 0x1f); |
997 | txq->swq_id, | ||
998 | txq->swq_id & 0x80 ? (txq->swq_id >> 2) & | ||
999 | 0x1f : txq->swq_id); | ||
1000 | if (cnt >= 4) | 997 | if (cnt >= 4) |
1001 | continue; | 998 | continue; |
1002 | /* for the ACs, display the stop count too */ | 999 | /* for the ACs, display the stop count too */ |
@@ -1580,7 +1577,7 @@ static ssize_t iwl_dbgfs_bt_traffic_read(struct file *file, | |||
1580 | priv->bt_full_concurrent ? "full concurrency" : "3-wire"); | 1577 | priv->bt_full_concurrent ? "full concurrency" : "3-wire"); |
1581 | pos += scnprintf(buf + pos, bufsz - pos, "BT status: %s, " | 1578 | pos += scnprintf(buf + pos, bufsz - pos, "BT status: %s, " |
1582 | "last traffic notif: %d\n", | 1579 | "last traffic notif: %d\n", |
1583 | priv->bt_status ? "On" : "Off", priv->notif_bt_traffic_load); | 1580 | priv->bt_status ? "On" : "Off", priv->last_bt_traffic_load); |
1584 | pos += scnprintf(buf + pos, bufsz - pos, "ch_announcement: %d, " | 1581 | pos += scnprintf(buf + pos, bufsz - pos, "ch_announcement: %d, " |
1585 | "sco_active: %d, kill_ack_mask: %x, " | 1582 | "sco_active: %d, kill_ack_mask: %x, " |
1586 | "kill_cts_mask: %x\n", | 1583 | "kill_cts_mask: %x\n", |
diff --git a/drivers/net/wireless/iwlwifi/iwl-dev.h b/drivers/net/wireless/iwlwifi/iwl-dev.h index 9fcaaf0cfe93..ea81ced13756 100644 --- a/drivers/net/wireless/iwlwifi/iwl-dev.h +++ b/drivers/net/wireless/iwlwifi/iwl-dev.h | |||
@@ -1471,7 +1471,7 @@ struct iwl_priv { | |||
1471 | 1471 | ||
1472 | /* bt coex */ | 1472 | /* bt coex */ |
1473 | u8 bt_status; | 1473 | u8 bt_status; |
1474 | u8 bt_traffic_load, notif_bt_traffic_load; | 1474 | u8 bt_traffic_load, last_bt_traffic_load; |
1475 | bool bt_ch_announce; | 1475 | bool bt_ch_announce; |
1476 | bool bt_sco_active; | 1476 | bool bt_sco_active; |
1477 | bool bt_full_concurrent; | 1477 | bool bt_full_concurrent; |
@@ -1482,7 +1482,6 @@ struct iwl_priv { | |||
1482 | u16 bt_on_thresh; | 1482 | u16 bt_on_thresh; |
1483 | u16 bt_duration; | 1483 | u16 bt_duration; |
1484 | u16 dynamic_frag_thresh; | 1484 | u16 dynamic_frag_thresh; |
1485 | u16 dynamic_agg_thresh; | ||
1486 | u8 bt_ci_compliance; | 1485 | u8 bt_ci_compliance; |
1487 | struct work_struct bt_traffic_change_work; | 1486 | struct work_struct bt_traffic_change_work; |
1488 | 1487 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.h b/drivers/net/wireless/iwlwifi/iwl-eeprom.h index d9b590625ae4..e87be1e551aa 100644 --- a/drivers/net/wireless/iwlwifi/iwl-eeprom.h +++ b/drivers/net/wireless/iwlwifi/iwl-eeprom.h | |||
@@ -110,9 +110,18 @@ enum { | |||
110 | }; | 110 | }; |
111 | 111 | ||
112 | /* SKU Capabilities */ | 112 | /* SKU Capabilities */ |
113 | /* 3945 only */ | ||
113 | #define EEPROM_SKU_CAP_SW_RF_KILL_ENABLE (1 << 0) | 114 | #define EEPROM_SKU_CAP_SW_RF_KILL_ENABLE (1 << 0) |
114 | #define EEPROM_SKU_CAP_HW_RF_KILL_ENABLE (1 << 1) | 115 | #define EEPROM_SKU_CAP_HW_RF_KILL_ENABLE (1 << 1) |
115 | 116 | ||
117 | /* 5000 and up */ | ||
118 | #define EEPROM_SKU_CAP_BAND_POS (4) | ||
119 | #define EEPROM_SKU_CAP_BAND_SELECTION \ | ||
120 | (3 << EEPROM_SKU_CAP_BAND_POS) | ||
121 | #define EEPROM_SKU_CAP_11N_ENABLE (1 << 6) | ||
122 | #define EEPROM_SKU_CAP_AMT_ENABLE (1 << 7) | ||
123 | #define EEPROM_SKU_CAP_IPAN_ENABLE (1 << 8) | ||
124 | |||
116 | /* *regulatory* channel data format in eeprom, one for each channel. | 125 | /* *regulatory* channel data format in eeprom, one for each channel. |
117 | * There are separate entries for HT40 (40 MHz) vs. normal (20 MHz) channels. */ | 126 | * There are separate entries for HT40 (40 MHz) vs. normal (20 MHz) channels. */ |
118 | struct iwl_eeprom_channel { | 127 | struct iwl_eeprom_channel { |
@@ -397,7 +406,7 @@ struct iwl_eeprom_calib_info { | |||
397 | #define EEPROM_BOARD_REVISION (2*0x35) /* 2 bytes */ | 406 | #define EEPROM_BOARD_REVISION (2*0x35) /* 2 bytes */ |
398 | #define EEPROM_BOARD_PBA_NUMBER (2*0x3B+1) /* 9 bytes */ | 407 | #define EEPROM_BOARD_PBA_NUMBER (2*0x3B+1) /* 9 bytes */ |
399 | #define EEPROM_VERSION (2*0x44) /* 2 bytes */ | 408 | #define EEPROM_VERSION (2*0x44) /* 2 bytes */ |
400 | #define EEPROM_SKU_CAP (2*0x45) /* 1 bytes */ | 409 | #define EEPROM_SKU_CAP (2*0x45) /* 2 bytes */ |
401 | #define EEPROM_OEM_MODE (2*0x46) /* 2 bytes */ | 410 | #define EEPROM_OEM_MODE (2*0x46) /* 2 bytes */ |
402 | #define EEPROM_WOWLAN_MODE (2*0x47) /* 2 bytes */ | 411 | #define EEPROM_WOWLAN_MODE (2*0x47) /* 2 bytes */ |
403 | #define EEPROM_RADIO_CONFIG (2*0x48) /* 2 bytes */ | 412 | #define EEPROM_RADIO_CONFIG (2*0x48) /* 2 bytes */ |
@@ -504,6 +513,7 @@ struct iwl_eeprom_ops { | |||
504 | int iwl_eeprom_init(struct iwl_priv *priv); | 513 | int iwl_eeprom_init(struct iwl_priv *priv); |
505 | void iwl_eeprom_free(struct iwl_priv *priv); | 514 | void iwl_eeprom_free(struct iwl_priv *priv); |
506 | int iwl_eeprom_check_version(struct iwl_priv *priv); | 515 | int iwl_eeprom_check_version(struct iwl_priv *priv); |
516 | int iwl_eeprom_check_sku(struct iwl_priv *priv); | ||
507 | const u8 *iwl_eeprom_query_addr(const struct iwl_priv *priv, size_t offset); | 517 | const u8 *iwl_eeprom_query_addr(const struct iwl_priv *priv, size_t offset); |
508 | int iwlcore_eeprom_verify_signature(struct iwl_priv *priv); | 518 | int iwlcore_eeprom_verify_signature(struct iwl_priv *priv); |
509 | u16 iwl_eeprom_query16(const struct iwl_priv *priv, size_t offset); | 519 | u16 iwl_eeprom_query16(const struct iwl_priv *priv, size_t offset); |
diff --git a/drivers/net/wireless/iwlwifi/iwl-helpers.h b/drivers/net/wireless/iwlwifi/iwl-helpers.h index 1aaef70deaec..3f5bedd8875f 100644 --- a/drivers/net/wireless/iwlwifi/iwl-helpers.h +++ b/drivers/net/wireless/iwlwifi/iwl-helpers.h | |||
@@ -44,15 +44,6 @@ static inline struct ieee80211_conf *ieee80211_get_hw_conf( | |||
44 | return &hw->conf; | 44 | return &hw->conf; |
45 | } | 45 | } |
46 | 46 | ||
47 | static inline unsigned long elapsed_jiffies(unsigned long start, | ||
48 | unsigned long end) | ||
49 | { | ||
50 | if (end >= start) | ||
51 | return end - start; | ||
52 | |||
53 | return end + (MAX_JIFFY_OFFSET - start) + 1; | ||
54 | } | ||
55 | |||
56 | /** | 47 | /** |
57 | * iwl_queue_inc_wrap - increment queue index, wrap back to beginning | 48 | * iwl_queue_inc_wrap - increment queue index, wrap back to beginning |
58 | * @index -- current index | 49 | * @index -- current index |
@@ -104,42 +95,36 @@ static inline int iwl_alloc_fw_desc(struct pci_dev *pci_dev, | |||
104 | * | | | | | | | | | 95 | * | | | | | | | | |
105 | * | | | | | | +-+-------- AC queue (0-3) | 96 | * | | | | | | +-+-------- AC queue (0-3) |
106 | * | | | | | | | 97 | * | | | | | | |
107 | * | +-+-+-+-+------------ HW A-MPDU queue | 98 | * | +-+-+-+-+------------ HW queue ID |
108 | * | | 99 | * | |
109 | * +---------------------- indicates agg queue | 100 | * +---------------------- unused |
110 | */ | 101 | */ |
111 | static inline u8 iwl_virtual_agg_queue_num(u8 ac, u8 hwq) | 102 | static inline void iwl_set_swq_id(struct iwl_tx_queue *txq, u8 ac, u8 hwq) |
112 | { | 103 | { |
113 | BUG_ON(ac > 3); /* only have 2 bits */ | 104 | BUG_ON(ac > 3); /* only have 2 bits */ |
114 | BUG_ON(hwq > 31); /* only have 5 bits */ | 105 | BUG_ON(hwq > 31); /* only use 5 bits */ |
115 | 106 | ||
116 | return 0x80 | (hwq << 2) | ac; | 107 | txq->swq_id = (hwq << 2) | ac; |
117 | } | 108 | } |
118 | 109 | ||
119 | static inline void iwl_wake_queue(struct iwl_priv *priv, u8 queue) | 110 | static inline void iwl_wake_queue(struct iwl_priv *priv, |
111 | struct iwl_tx_queue *txq) | ||
120 | { | 112 | { |
121 | u8 ac = queue; | 113 | u8 queue = txq->swq_id; |
122 | u8 hwq = queue; | 114 | u8 ac = queue & 3; |
123 | 115 | u8 hwq = (queue >> 2) & 0x1f; | |
124 | if (queue & 0x80) { | ||
125 | ac = queue & 3; | ||
126 | hwq = (queue >> 2) & 0x1f; | ||
127 | } | ||
128 | 116 | ||
129 | if (test_and_clear_bit(hwq, priv->queue_stopped)) | 117 | if (test_and_clear_bit(hwq, priv->queue_stopped)) |
130 | if (atomic_dec_return(&priv->queue_stop_count[ac]) <= 0) | 118 | if (atomic_dec_return(&priv->queue_stop_count[ac]) <= 0) |
131 | ieee80211_wake_queue(priv->hw, ac); | 119 | ieee80211_wake_queue(priv->hw, ac); |
132 | } | 120 | } |
133 | 121 | ||
134 | static inline void iwl_stop_queue(struct iwl_priv *priv, u8 queue) | 122 | static inline void iwl_stop_queue(struct iwl_priv *priv, |
123 | struct iwl_tx_queue *txq) | ||
135 | { | 124 | { |
136 | u8 ac = queue; | 125 | u8 queue = txq->swq_id; |
137 | u8 hwq = queue; | 126 | u8 ac = queue & 3; |
138 | 127 | u8 hwq = (queue >> 2) & 0x1f; | |
139 | if (queue & 0x80) { | ||
140 | ac = queue & 3; | ||
141 | hwq = (queue >> 2) & 0x1f; | ||
142 | } | ||
143 | 128 | ||
144 | if (!test_and_set_bit(hwq, priv->queue_stopped)) | 129 | if (!test_and_set_bit(hwq, priv->queue_stopped)) |
145 | if (atomic_inc_return(&priv->queue_stop_count[ac]) > 0) | 130 | if (atomic_inc_return(&priv->queue_stop_count[ac]) > 0) |
diff --git a/drivers/net/wireless/iwlwifi/iwl-led.c b/drivers/net/wireless/iwlwifi/iwl-led.c index 5a9129219c90..516e5577ed2a 100644 --- a/drivers/net/wireless/iwlwifi/iwl-led.c +++ b/drivers/net/wireless/iwlwifi/iwl-led.c | |||
@@ -45,9 +45,8 @@ | |||
45 | /* default: IWL_LED_BLINK(0) using blinking index table */ | 45 | /* default: IWL_LED_BLINK(0) using blinking index table */ |
46 | static int led_mode; | 46 | static int led_mode; |
47 | module_param(led_mode, int, S_IRUGO); | 47 | module_param(led_mode, int, S_IRUGO); |
48 | MODULE_PARM_DESC(led_mode, "led mode: 0=blinking, 1=On(RF On)/Off(RF Off), " | 48 | MODULE_PARM_DESC(led_mode, "led mode: 0=system default, " |
49 | "(default 0)"); | 49 | "1=On(RF On)/Off(RF Off), 2=blinking"); |
50 | |||
51 | 50 | ||
52 | static const struct { | 51 | static const struct { |
53 | u16 tpt; /* Mb/s */ | 52 | u16 tpt; /* Mb/s */ |
@@ -128,7 +127,7 @@ EXPORT_SYMBOL(iwl_led_start); | |||
128 | int iwl_led_associate(struct iwl_priv *priv) | 127 | int iwl_led_associate(struct iwl_priv *priv) |
129 | { | 128 | { |
130 | IWL_DEBUG_LED(priv, "Associated\n"); | 129 | IWL_DEBUG_LED(priv, "Associated\n"); |
131 | if (led_mode == IWL_LED_BLINK) | 130 | if (priv->cfg->led_mode == IWL_LED_BLINK) |
132 | priv->allow_blinking = 1; | 131 | priv->allow_blinking = 1; |
133 | priv->last_blink_time = jiffies; | 132 | priv->last_blink_time = jiffies; |
134 | 133 | ||
@@ -223,5 +222,8 @@ void iwl_leds_init(struct iwl_priv *priv) | |||
223 | priv->last_blink_rate = 0; | 222 | priv->last_blink_rate = 0; |
224 | priv->last_blink_time = 0; | 223 | priv->last_blink_time = 0; |
225 | priv->allow_blinking = 0; | 224 | priv->allow_blinking = 0; |
225 | if (led_mode != IWL_LED_DEFAULT && | ||
226 | led_mode != priv->cfg->led_mode) | ||
227 | priv->cfg->led_mode = led_mode; | ||
226 | } | 228 | } |
227 | EXPORT_SYMBOL(iwl_leds_init); | 229 | EXPORT_SYMBOL(iwl_leds_init); |
diff --git a/drivers/net/wireless/iwlwifi/iwl-led.h b/drivers/net/wireless/iwlwifi/iwl-led.h index 49a70baa3fb6..9079b33486ef 100644 --- a/drivers/net/wireless/iwlwifi/iwl-led.h +++ b/drivers/net/wireless/iwlwifi/iwl-led.h | |||
@@ -47,14 +47,16 @@ enum led_type { | |||
47 | 47 | ||
48 | /* | 48 | /* |
49 | * LED mode | 49 | * LED mode |
50 | * IWL_LED_BLINK: adjust led blink rate based on blink table | 50 | * IWL_LED_DEFAULT: use system default |
51 | * IWL_LED_RF_STATE: turn LED on/off based on RF state | 51 | * IWL_LED_RF_STATE: turn LED on/off based on RF state |
52 | * LED ON = RF ON | 52 | * LED ON = RF ON |
53 | * LED OFF = RF OFF | 53 | * LED OFF = RF OFF |
54 | * IWL_LED_BLINK: adjust led blink rate based on blink table | ||
54 | */ | 55 | */ |
55 | enum iwl_led_mode { | 56 | enum iwl_led_mode { |
56 | IWL_LED_BLINK, | 57 | IWL_LED_DEFAULT, |
57 | IWL_LED_RF_STATE, | 58 | IWL_LED_RF_STATE, |
59 | IWL_LED_BLINK, | ||
58 | }; | 60 | }; |
59 | 61 | ||
60 | void iwl_leds_init(struct iwl_priv *priv); | 62 | void iwl_leds_init(struct iwl_priv *priv); |
diff --git a/drivers/net/wireless/iwlwifi/iwl-power.c b/drivers/net/wireless/iwlwifi/iwl-power.c index b7abd86676fd..1eec18d909d8 100644 --- a/drivers/net/wireless/iwlwifi/iwl-power.c +++ b/drivers/net/wireless/iwlwifi/iwl-power.c | |||
@@ -75,6 +75,10 @@ struct iwl_power_vec_entry { | |||
75 | 75 | ||
76 | #define NOSLP cpu_to_le16(0), 0, 0 | 76 | #define NOSLP cpu_to_le16(0), 0, 0 |
77 | #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0 | 77 | #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0 |
78 | #define ASLP (IWL_POWER_POWER_SAVE_ENA_MSK | \ | ||
79 | IWL_POWER_POWER_MANAGEMENT_ENA_MSK | \ | ||
80 | IWL_POWER_ADVANCE_PM_ENA_MSK) | ||
81 | #define ASLP_TOUT(T) cpu_to_le32(T) | ||
78 | #define TU_TO_USEC 1024 | 82 | #define TU_TO_USEC 1024 |
79 | #define SLP_TOUT(T) cpu_to_le32((T) * TU_TO_USEC) | 83 | #define SLP_TOUT(T) cpu_to_le32((T) * TU_TO_USEC) |
80 | #define SLP_VEC(X0, X1, X2, X3, X4) {cpu_to_le32(X0), \ | 84 | #define SLP_VEC(X0, X1, X2, X3, X4) {cpu_to_le32(X0), \ |
@@ -114,6 +118,52 @@ static const struct iwl_power_vec_entry range_2[IWL_POWER_NUM] = { | |||
114 | {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(4, 7, 10, 10, 0xFF)}, 0} | 118 | {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(4, 7, 10, 10, 0xFF)}, 0} |
115 | }; | 119 | }; |
116 | 120 | ||
121 | /* advance power management */ | ||
122 | /* DTIM 0 - 2 */ | ||
123 | static const struct iwl_power_vec_entry apm_range_0[IWL_POWER_NUM] = { | ||
124 | {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50), | ||
125 | SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0}, | ||
126 | {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50), | ||
127 | SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0}, | ||
128 | {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50), | ||
129 | SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0}, | ||
130 | {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50), | ||
131 | SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0}, | ||
132 | {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50), | ||
133 | SLP_VEC(1, 2, 6, 8, 0xFF), ASLP_TOUT(2)}, 2} | ||
134 | }; | ||
135 | |||
136 | |||
137 | /* for DTIM period IWL_DTIM_RANGE_0_MAX + 1 through IWL_DTIM_RANGE_1_MAX */ | ||
138 | /* DTIM 3 - 10 */ | ||
139 | static const struct iwl_power_vec_entry apm_range_1[IWL_POWER_NUM] = { | ||
140 | {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50), | ||
141 | SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0}, | ||
142 | {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50), | ||
143 | SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0}, | ||
144 | {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50), | ||
145 | SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0}, | ||
146 | {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50), | ||
147 | SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0}, | ||
148 | {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50), | ||
149 | SLP_VEC(1, 2, 6, 8, 0xFF), 0}, 2} | ||
150 | }; | ||
151 | |||
152 | /* for DTIM period > IWL_DTIM_RANGE_1_MAX */ | ||
153 | /* DTIM 11 - */ | ||
154 | static const struct iwl_power_vec_entry apm_range_2[IWL_POWER_NUM] = { | ||
155 | {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50), | ||
156 | SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0}, | ||
157 | {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50), | ||
158 | SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0}, | ||
159 | {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50), | ||
160 | SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0}, | ||
161 | {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50), | ||
162 | SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0}, | ||
163 | {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50), | ||
164 | SLP_VEC(1, 2, 6, 8, 0xFF), ASLP_TOUT(2)}, 2} | ||
165 | }; | ||
166 | |||
117 | static void iwl_static_sleep_cmd(struct iwl_priv *priv, | 167 | static void iwl_static_sleep_cmd(struct iwl_priv *priv, |
118 | struct iwl_powertable_cmd *cmd, | 168 | struct iwl_powertable_cmd *cmd, |
119 | enum iwl_power_level lvl, int period) | 169 | enum iwl_power_level lvl, int period) |
@@ -124,11 +174,19 @@ static void iwl_static_sleep_cmd(struct iwl_priv *priv, | |||
124 | u8 skip; | 174 | u8 skip; |
125 | u32 slp_itrvl; | 175 | u32 slp_itrvl; |
126 | 176 | ||
127 | table = range_2; | 177 | if (priv->cfg->adv_pm) { |
128 | if (period <= IWL_DTIM_RANGE_1_MAX) | 178 | table = apm_range_2; |
129 | table = range_1; | 179 | if (period <= IWL_DTIM_RANGE_1_MAX) |
130 | if (period <= IWL_DTIM_RANGE_0_MAX) | 180 | table = apm_range_1; |
131 | table = range_0; | 181 | if (period <= IWL_DTIM_RANGE_0_MAX) |
182 | table = apm_range_0; | ||
183 | } else { | ||
184 | table = range_2; | ||
185 | if (period <= IWL_DTIM_RANGE_1_MAX) | ||
186 | table = range_1; | ||
187 | if (period <= IWL_DTIM_RANGE_0_MAX) | ||
188 | table = range_0; | ||
189 | } | ||
132 | 190 | ||
133 | BUG_ON(lvl < 0 || lvl >= IWL_POWER_NUM); | 191 | BUG_ON(lvl < 0 || lvl >= IWL_POWER_NUM); |
134 | 192 | ||
@@ -163,6 +221,20 @@ static void iwl_static_sleep_cmd(struct iwl_priv *priv, | |||
163 | else | 221 | else |
164 | cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK; | 222 | cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK; |
165 | 223 | ||
224 | if (priv->cfg->base_params->shadow_reg_enable) | ||
225 | cmd->flags |= IWL_POWER_SHADOW_REG_ENA; | ||
226 | else | ||
227 | cmd->flags &= ~IWL_POWER_SHADOW_REG_ENA; | ||
228 | |||
229 | if (priv->cfg->bt_params && | ||
230 | priv->cfg->bt_params->advanced_bt_coexist) { | ||
231 | if (!priv->cfg->bt_params->bt_sco_disable) | ||
232 | cmd->flags |= IWL_POWER_BT_SCO_ENA; | ||
233 | else | ||
234 | cmd->flags &= ~IWL_POWER_BT_SCO_ENA; | ||
235 | } | ||
236 | |||
237 | |||
166 | slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]); | 238 | slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]); |
167 | if (slp_itrvl > IWL_CONN_MAX_LISTEN_INTERVAL) | 239 | if (slp_itrvl > IWL_CONN_MAX_LISTEN_INTERVAL) |
168 | cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] = | 240 | cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] = |
@@ -236,6 +308,19 @@ static void iwl_power_fill_sleep_cmd(struct iwl_priv *priv, | |||
236 | if (priv->power_data.pci_pm) | 308 | if (priv->power_data.pci_pm) |
237 | cmd->flags |= IWL_POWER_PCI_PM_MSK; | 309 | cmd->flags |= IWL_POWER_PCI_PM_MSK; |
238 | 310 | ||
311 | if (priv->cfg->base_params->shadow_reg_enable) | ||
312 | cmd->flags |= IWL_POWER_SHADOW_REG_ENA; | ||
313 | else | ||
314 | cmd->flags &= ~IWL_POWER_SHADOW_REG_ENA; | ||
315 | |||
316 | if (priv->cfg->bt_params && | ||
317 | priv->cfg->bt_params->advanced_bt_coexist) { | ||
318 | if (!priv->cfg->bt_params->bt_sco_disable) | ||
319 | cmd->flags |= IWL_POWER_BT_SCO_ENA; | ||
320 | else | ||
321 | cmd->flags &= ~IWL_POWER_BT_SCO_ENA; | ||
322 | } | ||
323 | |||
239 | cmd->rx_data_timeout = cpu_to_le32(1000 * dynps_ms); | 324 | cmd->rx_data_timeout = cpu_to_le32(1000 * dynps_ms); |
240 | cmd->tx_data_timeout = cpu_to_le32(1000 * dynps_ms); | 325 | cmd->tx_data_timeout = cpu_to_le32(1000 * dynps_ms); |
241 | 326 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-scan.c b/drivers/net/wireless/iwlwifi/iwl-scan.c index e1aa0e1daa5a..12d9363d0afe 100644 --- a/drivers/net/wireless/iwlwifi/iwl-scan.c +++ b/drivers/net/wireless/iwlwifi/iwl-scan.c | |||
@@ -252,8 +252,7 @@ static void iwl_rx_scan_complete_notif(struct iwl_priv *priv, | |||
252 | 252 | ||
253 | IWL_DEBUG_SCAN(priv, "Scan on %sGHz took %dms\n", | 253 | IWL_DEBUG_SCAN(priv, "Scan on %sGHz took %dms\n", |
254 | (priv->scan_band == IEEE80211_BAND_2GHZ) ? "2.4" : "5.2", | 254 | (priv->scan_band == IEEE80211_BAND_2GHZ) ? "2.4" : "5.2", |
255 | jiffies_to_msecs(elapsed_jiffies | 255 | jiffies_to_msecs(jiffies - priv->scan_start)); |
256 | (priv->scan_start, jiffies))); | ||
257 | 256 | ||
258 | queue_work(priv->workqueue, &priv->scan_completed); | 257 | queue_work(priv->workqueue, &priv->scan_completed); |
259 | 258 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-sta.c b/drivers/net/wireless/iwlwifi/iwl-sta.c index 7c7f7dcb1b1e..0a67b2fa52a1 100644 --- a/drivers/net/wireless/iwlwifi/iwl-sta.c +++ b/drivers/net/wireless/iwlwifi/iwl-sta.c | |||
@@ -400,7 +400,8 @@ static void iwl_sta_ucode_deactivate(struct iwl_priv *priv, u8 sta_id) | |||
400 | } | 400 | } |
401 | 401 | ||
402 | static int iwl_send_remove_station(struct iwl_priv *priv, | 402 | static int iwl_send_remove_station(struct iwl_priv *priv, |
403 | const u8 *addr, int sta_id) | 403 | const u8 *addr, int sta_id, |
404 | bool temporary) | ||
404 | { | 405 | { |
405 | struct iwl_rx_packet *pkt; | 406 | struct iwl_rx_packet *pkt; |
406 | int ret; | 407 | int ret; |
@@ -436,9 +437,11 @@ static int iwl_send_remove_station(struct iwl_priv *priv, | |||
436 | if (!ret) { | 437 | if (!ret) { |
437 | switch (pkt->u.rem_sta.status) { | 438 | switch (pkt->u.rem_sta.status) { |
438 | case REM_STA_SUCCESS_MSK: | 439 | case REM_STA_SUCCESS_MSK: |
439 | spin_lock_irqsave(&priv->sta_lock, flags_spin); | 440 | if (!temporary) { |
440 | iwl_sta_ucode_deactivate(priv, sta_id); | 441 | spin_lock_irqsave(&priv->sta_lock, flags_spin); |
441 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); | 442 | iwl_sta_ucode_deactivate(priv, sta_id); |
443 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); | ||
444 | } | ||
442 | IWL_DEBUG_ASSOC(priv, "REPLY_REMOVE_STA PASSED\n"); | 445 | IWL_DEBUG_ASSOC(priv, "REPLY_REMOVE_STA PASSED\n"); |
443 | break; | 446 | break; |
444 | default: | 447 | default: |
@@ -505,7 +508,7 @@ int iwl_remove_station(struct iwl_priv *priv, const u8 sta_id, | |||
505 | 508 | ||
506 | spin_unlock_irqrestore(&priv->sta_lock, flags); | 509 | spin_unlock_irqrestore(&priv->sta_lock, flags); |
507 | 510 | ||
508 | return iwl_send_remove_station(priv, addr, sta_id); | 511 | return iwl_send_remove_station(priv, addr, sta_id, false); |
509 | out_err: | 512 | out_err: |
510 | spin_unlock_irqrestore(&priv->sta_lock, flags); | 513 | spin_unlock_irqrestore(&priv->sta_lock, flags); |
511 | return -EINVAL; | 514 | return -EINVAL; |
@@ -624,6 +627,44 @@ void iwl_restore_stations(struct iwl_priv *priv, struct iwl_rxon_context *ctx) | |||
624 | } | 627 | } |
625 | EXPORT_SYMBOL(iwl_restore_stations); | 628 | EXPORT_SYMBOL(iwl_restore_stations); |
626 | 629 | ||
630 | void iwl_reprogram_ap_sta(struct iwl_priv *priv, struct iwl_rxon_context *ctx) | ||
631 | { | ||
632 | unsigned long flags; | ||
633 | int sta_id = ctx->ap_sta_id; | ||
634 | int ret; | ||
635 | struct iwl_addsta_cmd sta_cmd; | ||
636 | struct iwl_link_quality_cmd lq; | ||
637 | bool active; | ||
638 | |||
639 | spin_lock_irqsave(&priv->sta_lock, flags); | ||
640 | if (!(priv->stations[sta_id].used & IWL_STA_DRIVER_ACTIVE)) { | ||
641 | spin_unlock_irqrestore(&priv->sta_lock, flags); | ||
642 | return; | ||
643 | } | ||
644 | |||
645 | memcpy(&sta_cmd, &priv->stations[sta_id].sta, sizeof(sta_cmd)); | ||
646 | sta_cmd.mode = 0; | ||
647 | memcpy(&lq, priv->stations[sta_id].lq, sizeof(lq)); | ||
648 | |||
649 | active = priv->stations[sta_id].used & IWL_STA_UCODE_ACTIVE; | ||
650 | spin_unlock_irqrestore(&priv->sta_lock, flags); | ||
651 | |||
652 | if (active) { | ||
653 | ret = iwl_send_remove_station( | ||
654 | priv, priv->stations[sta_id].sta.sta.addr, | ||
655 | sta_id, true); | ||
656 | if (ret) | ||
657 | IWL_ERR(priv, "failed to remove STA %pM (%d)\n", | ||
658 | priv->stations[sta_id].sta.sta.addr, ret); | ||
659 | } | ||
660 | ret = iwl_send_add_sta(priv, &sta_cmd, CMD_SYNC); | ||
661 | if (ret) | ||
662 | IWL_ERR(priv, "failed to re-add STA %pM (%d)\n", | ||
663 | priv->stations[sta_id].sta.sta.addr, ret); | ||
664 | iwl_send_lq_cmd(priv, ctx, &lq, CMD_SYNC, true); | ||
665 | } | ||
666 | EXPORT_SYMBOL(iwl_reprogram_ap_sta); | ||
667 | |||
627 | int iwl_get_free_ucode_key_index(struct iwl_priv *priv) | 668 | int iwl_get_free_ucode_key_index(struct iwl_priv *priv) |
628 | { | 669 | { |
629 | int i; | 670 | int i; |
diff --git a/drivers/net/wireless/iwlwifi/iwl-sta.h b/drivers/net/wireless/iwlwifi/iwl-sta.h index 06475872eee4..206f1e1a0caf 100644 --- a/drivers/net/wireless/iwlwifi/iwl-sta.h +++ b/drivers/net/wireless/iwlwifi/iwl-sta.h | |||
@@ -63,6 +63,7 @@ u8 iwl_prep_station(struct iwl_priv *priv, struct iwl_rxon_context *ctx, | |||
63 | 63 | ||
64 | int iwl_send_lq_cmd(struct iwl_priv *priv, struct iwl_rxon_context *ctx, | 64 | int iwl_send_lq_cmd(struct iwl_priv *priv, struct iwl_rxon_context *ctx, |
65 | struct iwl_link_quality_cmd *lq, u8 flags, bool init); | 65 | struct iwl_link_quality_cmd *lq, u8 flags, bool init); |
66 | void iwl_reprogram_ap_sta(struct iwl_priv *priv, struct iwl_rxon_context *ctx); | ||
66 | 67 | ||
67 | /** | 68 | /** |
68 | * iwl_clear_driver_stations - clear knowledge of all stations from driver | 69 | * iwl_clear_driver_stations - clear knowledge of all stations from driver |
diff --git a/drivers/net/wireless/iwlwifi/iwl-tx.c b/drivers/net/wireless/iwlwifi/iwl-tx.c index feaa3670c6bb..90659bcf5804 100644 --- a/drivers/net/wireless/iwlwifi/iwl-tx.c +++ b/drivers/net/wireless/iwlwifi/iwl-tx.c | |||
@@ -359,13 +359,12 @@ int iwl_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq, | |||
359 | txq->need_update = 0; | 359 | txq->need_update = 0; |
360 | 360 | ||
361 | /* | 361 | /* |
362 | * Aggregation TX queues will get their ID when aggregation begins; | 362 | * For the default queues 0-3, set up the swq_id |
363 | * they overwrite the setting done here. The command FIFO doesn't | 363 | * already -- all others need to get one later |
364 | * need an swq_id so don't set one to catch errors, all others can | 364 | * (if they need one at all). |
365 | * be set up to the identity mapping. | ||
366 | */ | 365 | */ |
367 | if (txq_id != priv->cmd_queue) | 366 | if (txq_id < 4) |
368 | txq->swq_id = txq_id; | 367 | iwl_set_swq_id(txq, txq_id, txq_id); |
369 | 368 | ||
370 | /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise | 369 | /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise |
371 | * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */ | 370 | * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */ |
diff --git a/drivers/net/wireless/iwlwifi/iwl3945-base.c b/drivers/net/wireless/iwlwifi/iwl3945-base.c index 931c546367ea..8eb1393506bc 100644 --- a/drivers/net/wireless/iwlwifi/iwl3945-base.c +++ b/drivers/net/wireless/iwlwifi/iwl3945-base.c | |||
@@ -475,7 +475,7 @@ static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) | |||
475 | dma_addr_t phys_addr; | 475 | dma_addr_t phys_addr; |
476 | dma_addr_t txcmd_phys; | 476 | dma_addr_t txcmd_phys; |
477 | int txq_id = skb_get_queue_mapping(skb); | 477 | int txq_id = skb_get_queue_mapping(skb); |
478 | u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */ | 478 | u16 len, idx, hdr_len; |
479 | u8 id; | 479 | u8 id; |
480 | u8 unicast; | 480 | u8 unicast; |
481 | u8 sta_id; | 481 | u8 sta_id; |
@@ -612,15 +612,8 @@ static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) | |||
612 | */ | 612 | */ |
613 | len = sizeof(struct iwl3945_tx_cmd) + | 613 | len = sizeof(struct iwl3945_tx_cmd) + |
614 | sizeof(struct iwl_cmd_header) + hdr_len; | 614 | sizeof(struct iwl_cmd_header) + hdr_len; |
615 | |||
616 | len_org = len; | ||
617 | len = (len + 3) & ~3; | 615 | len = (len + 3) & ~3; |
618 | 616 | ||
619 | if (len_org != len) | ||
620 | len_org = 1; | ||
621 | else | ||
622 | len_org = 0; | ||
623 | |||
624 | /* Physical address of this Tx command's header (not MAC header!), | 617 | /* Physical address of this Tx command's header (not MAC header!), |
625 | * within command buffer array. */ | 618 | * within command buffer array. */ |
626 | txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr, | 619 | txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr, |
@@ -662,7 +655,7 @@ static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) | |||
662 | spin_unlock_irqrestore(&priv->lock, flags); | 655 | spin_unlock_irqrestore(&priv->lock, flags); |
663 | } | 656 | } |
664 | 657 | ||
665 | iwl_stop_queue(priv, skb_get_queue_mapping(skb)); | 658 | iwl_stop_queue(priv, txq); |
666 | } | 659 | } |
667 | 660 | ||
668 | return 0; | 661 | return 0; |
diff --git a/drivers/net/wireless/iwmc3200wifi/commands.c b/drivers/net/wireless/iwmc3200wifi/commands.c index 330c7d9cf101..50dee6a0a5ca 100644 --- a/drivers/net/wireless/iwmc3200wifi/commands.c +++ b/drivers/net/wireless/iwmc3200wifi/commands.c | |||
@@ -908,7 +908,7 @@ int iwm_scan_ssids(struct iwm_priv *iwm, struct cfg80211_ssid *ssids, | |||
908 | return ret; | 908 | return ret; |
909 | } | 909 | } |
910 | 910 | ||
911 | iwm->scan_id = iwm->scan_id++ % IWM_SCAN_ID_MAX; | 911 | iwm->scan_id = (iwm->scan_id + 1) % IWM_SCAN_ID_MAX; |
912 | 912 | ||
913 | return 0; | 913 | return 0; |
914 | } | 914 | } |
diff --git a/drivers/net/wireless/libertas/cfg.c b/drivers/net/wireless/libertas/cfg.c index 373930afc26b..dee32d3681a5 100644 --- a/drivers/net/wireless/libertas/cfg.c +++ b/drivers/net/wireless/libertas/cfg.c | |||
@@ -9,8 +9,6 @@ | |||
9 | #include <linux/sched.h> | 9 | #include <linux/sched.h> |
10 | #include <linux/wait.h> | 10 | #include <linux/wait.h> |
11 | #include <linux/slab.h> | 11 | #include <linux/slab.h> |
12 | #include <linux/sched.h> | ||
13 | #include <linux/wait.h> | ||
14 | #include <linux/ieee80211.h> | 12 | #include <linux/ieee80211.h> |
15 | #include <net/cfg80211.h> | 13 | #include <net/cfg80211.h> |
16 | #include <asm/unaligned.h> | 14 | #include <asm/unaligned.h> |
@@ -2062,7 +2060,7 @@ static void lbs_cfg_set_regulatory_hint(struct lbs_private *priv) | |||
2062 | }; | 2060 | }; |
2063 | 2061 | ||
2064 | /* Section 5.17.2 */ | 2062 | /* Section 5.17.2 */ |
2065 | static struct region_code_mapping regmap[] = { | 2063 | static const struct region_code_mapping regmap[] = { |
2066 | {"US ", 0x10}, /* US FCC */ | 2064 | {"US ", 0x10}, /* US FCC */ |
2067 | {"CA ", 0x20}, /* Canada */ | 2065 | {"CA ", 0x20}, /* Canada */ |
2068 | {"EU ", 0x30}, /* ETSI */ | 2066 | {"EU ", 0x30}, /* ETSI */ |
diff --git a/drivers/net/wireless/libertas/cmd.c b/drivers/net/wireless/libertas/cmd.c index 70745928f3f8..78c4da150a74 100644 --- a/drivers/net/wireless/libertas/cmd.c +++ b/drivers/net/wireless/libertas/cmd.c | |||
@@ -177,6 +177,14 @@ int lbs_host_sleep_cfg(struct lbs_private *priv, uint32_t criteria, | |||
177 | struct cmd_ds_host_sleep cmd_config; | 177 | struct cmd_ds_host_sleep cmd_config; |
178 | int ret; | 178 | int ret; |
179 | 179 | ||
180 | /* | ||
181 | * Certain firmware versions do not support EHS_REMOVE_WAKEUP command | ||
182 | * and the card will return a failure. Since we need to be | ||
183 | * able to reset the mask, in those cases we set a 0 mask instead. | ||
184 | */ | ||
185 | if (criteria == EHS_REMOVE_WAKEUP && !priv->ehs_remove_supported) | ||
186 | criteria = 0; | ||
187 | |||
180 | cmd_config.hdr.size = cpu_to_le16(sizeof(cmd_config)); | 188 | cmd_config.hdr.size = cpu_to_le16(sizeof(cmd_config)); |
181 | cmd_config.criteria = cpu_to_le32(criteria); | 189 | cmd_config.criteria = cpu_to_le32(criteria); |
182 | cmd_config.gpio = priv->wol_gpio; | 190 | cmd_config.gpio = priv->wol_gpio; |
diff --git a/drivers/net/wireless/libertas/dev.h b/drivers/net/wireless/libertas/dev.h index cb14c38caf3a..18dd9a02c459 100644 --- a/drivers/net/wireless/libertas/dev.h +++ b/drivers/net/wireless/libertas/dev.h | |||
@@ -138,6 +138,7 @@ struct lbs_private { | |||
138 | uint32_t wol_criteria; | 138 | uint32_t wol_criteria; |
139 | uint8_t wol_gpio; | 139 | uint8_t wol_gpio; |
140 | uint8_t wol_gap; | 140 | uint8_t wol_gap; |
141 | bool ehs_remove_supported; | ||
141 | 142 | ||
142 | /* Transmitting */ | 143 | /* Transmitting */ |
143 | int tx_pending_len; /* -1 while building packet */ | 144 | int tx_pending_len; /* -1 while building packet */ |
diff --git a/drivers/net/wireless/libertas/if_usb.c b/drivers/net/wireless/libertas/if_usb.c index efaf85032208..6524c70363d9 100644 --- a/drivers/net/wireless/libertas/if_usb.c +++ b/drivers/net/wireless/libertas/if_usb.c | |||
@@ -345,6 +345,13 @@ static int if_usb_probe(struct usb_interface *intf, | |||
345 | if (device_create_file(&priv->dev->dev, &dev_attr_lbs_flash_boot2)) | 345 | if (device_create_file(&priv->dev->dev, &dev_attr_lbs_flash_boot2)) |
346 | lbs_pr_err("cannot register lbs_flash_boot2 attribute\n"); | 346 | lbs_pr_err("cannot register lbs_flash_boot2 attribute\n"); |
347 | 347 | ||
348 | /* | ||
349 | * EHS_REMOVE_WAKEUP is not supported on all versions of the firmware. | ||
350 | */ | ||
351 | priv->wol_criteria = EHS_REMOVE_WAKEUP; | ||
352 | if (lbs_host_sleep_cfg(priv, priv->wol_criteria, NULL)) | ||
353 | priv->ehs_remove_supported = false; | ||
354 | |||
348 | return 0; | 355 | return 0; |
349 | 356 | ||
350 | err_start_card: | 357 | err_start_card: |
@@ -1090,12 +1097,6 @@ static int if_usb_suspend(struct usb_interface *intf, pm_message_t message) | |||
1090 | if (priv->psstate != PS_STATE_FULL_POWER) | 1097 | if (priv->psstate != PS_STATE_FULL_POWER) |
1091 | return -1; | 1098 | return -1; |
1092 | 1099 | ||
1093 | if (priv->wol_criteria == EHS_REMOVE_WAKEUP) { | ||
1094 | lbs_pr_info("Suspend attempt without " | ||
1095 | "configuring wake params!\n"); | ||
1096 | return -ENOSYS; | ||
1097 | } | ||
1098 | |||
1099 | ret = lbs_suspend(priv); | 1100 | ret = lbs_suspend(priv); |
1100 | if (ret) | 1101 | if (ret) |
1101 | goto out; | 1102 | goto out; |
diff --git a/drivers/net/wireless/libertas/main.c b/drivers/net/wireless/libertas/main.c index 46b88b118c99..143473c59393 100644 --- a/drivers/net/wireless/libertas/main.c +++ b/drivers/net/wireless/libertas/main.c | |||
@@ -851,9 +851,10 @@ struct lbs_private *lbs_add_card(void *card, struct device *dmdev) | |||
851 | priv->work_thread = create_singlethread_workqueue("lbs_worker"); | 851 | priv->work_thread = create_singlethread_workqueue("lbs_worker"); |
852 | INIT_WORK(&priv->mcast_work, lbs_set_mcast_worker); | 852 | INIT_WORK(&priv->mcast_work, lbs_set_mcast_worker); |
853 | 853 | ||
854 | priv->wol_criteria = 0xffffffff; | 854 | priv->wol_criteria = EHS_REMOVE_WAKEUP; |
855 | priv->wol_gpio = 0xff; | 855 | priv->wol_gpio = 0xff; |
856 | priv->wol_gap = 20; | 856 | priv->wol_gap = 20; |
857 | priv->ehs_remove_supported = true; | ||
857 | 858 | ||
858 | goto done; | 859 | goto done; |
859 | 860 | ||
diff --git a/drivers/net/wireless/libertas/rx.c b/drivers/net/wireless/libertas/rx.c index a4d0bca9ef2c..a2b1df21d286 100644 --- a/drivers/net/wireless/libertas/rx.c +++ b/drivers/net/wireless/libertas/rx.c | |||
@@ -55,7 +55,9 @@ int lbs_process_rxed_packet(struct lbs_private *priv, struct sk_buff *skb) | |||
55 | struct rxpd *p_rx_pd; | 55 | struct rxpd *p_rx_pd; |
56 | int hdrchop; | 56 | int hdrchop; |
57 | struct ethhdr *p_ethhdr; | 57 | struct ethhdr *p_ethhdr; |
58 | const u8 rfc1042_eth_hdr[] = { 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 }; | 58 | static const u8 rfc1042_eth_hdr[] = { |
59 | 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 | ||
60 | }; | ||
59 | 61 | ||
60 | lbs_deb_enter(LBS_DEB_RX); | 62 | lbs_deb_enter(LBS_DEB_RX); |
61 | 63 | ||
diff --git a/drivers/net/wireless/mwl8k.c b/drivers/net/wireless/mwl8k.c index 1bbcd7c1d02a..9ecf8407cb1b 100644 --- a/drivers/net/wireless/mwl8k.c +++ b/drivers/net/wireless/mwl8k.c | |||
@@ -29,6 +29,12 @@ | |||
29 | #define MWL8K_NAME KBUILD_MODNAME | 29 | #define MWL8K_NAME KBUILD_MODNAME |
30 | #define MWL8K_VERSION "0.12" | 30 | #define MWL8K_VERSION "0.12" |
31 | 31 | ||
32 | /* Module parameters */ | ||
33 | static unsigned ap_mode_default; | ||
34 | module_param(ap_mode_default, bool, 0); | ||
35 | MODULE_PARM_DESC(ap_mode_default, | ||
36 | "Set to 1 to make ap mode the default instead of sta mode"); | ||
37 | |||
32 | /* Register definitions */ | 38 | /* Register definitions */ |
33 | #define MWL8K_HIU_GEN_PTR 0x00000c10 | 39 | #define MWL8K_HIU_GEN_PTR 0x00000c10 |
34 | #define MWL8K_MODE_STA 0x0000005a | 40 | #define MWL8K_MODE_STA 0x0000005a |
@@ -92,8 +98,10 @@ struct rxd_ops { | |||
92 | struct mwl8k_device_info { | 98 | struct mwl8k_device_info { |
93 | char *part_name; | 99 | char *part_name; |
94 | char *helper_image; | 100 | char *helper_image; |
95 | char *fw_image; | 101 | char *fw_image_sta; |
102 | char *fw_image_ap; | ||
96 | struct rxd_ops *ap_rxd_ops; | 103 | struct rxd_ops *ap_rxd_ops; |
104 | u32 fw_api_ap; | ||
97 | }; | 105 | }; |
98 | 106 | ||
99 | struct mwl8k_rx_queue { | 107 | struct mwl8k_rx_queue { |
@@ -136,8 +144,8 @@ struct mwl8k_priv { | |||
136 | void __iomem *regs; | 144 | void __iomem *regs; |
137 | 145 | ||
138 | /* firmware */ | 146 | /* firmware */ |
139 | struct firmware *fw_helper; | 147 | const struct firmware *fw_helper; |
140 | struct firmware *fw_ucode; | 148 | const struct firmware *fw_ucode; |
141 | 149 | ||
142 | /* hardware/firmware parameters */ | 150 | /* hardware/firmware parameters */ |
143 | bool ap_fw; | 151 | bool ap_fw; |
@@ -210,6 +218,18 @@ struct mwl8k_priv { | |||
210 | 218 | ||
211 | /* Most recently reported noise in dBm */ | 219 | /* Most recently reported noise in dBm */ |
212 | s8 noise; | 220 | s8 noise; |
221 | |||
222 | /* | ||
223 | * preserve the queue configurations so they can be restored if/when | ||
224 | * the firmware image is swapped. | ||
225 | */ | ||
226 | struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_QUEUES]; | ||
227 | |||
228 | /* async firmware loading state */ | ||
229 | unsigned fw_state; | ||
230 | char *fw_pref; | ||
231 | char *fw_alt; | ||
232 | struct completion firmware_loading_complete; | ||
213 | }; | 233 | }; |
214 | 234 | ||
215 | /* Per interface specific private data */ | 235 | /* Per interface specific private data */ |
@@ -285,8 +305,9 @@ static const struct ieee80211_rate mwl8k_rates_50[] = { | |||
285 | }; | 305 | }; |
286 | 306 | ||
287 | /* Set or get info from Firmware */ | 307 | /* Set or get info from Firmware */ |
288 | #define MWL8K_CMD_SET 0x0001 | ||
289 | #define MWL8K_CMD_GET 0x0000 | 308 | #define MWL8K_CMD_GET 0x0000 |
309 | #define MWL8K_CMD_SET 0x0001 | ||
310 | #define MWL8K_CMD_SET_LIST 0x0002 | ||
290 | 311 | ||
291 | /* Firmware command codes */ | 312 | /* Firmware command codes */ |
292 | #define MWL8K_CMD_CODE_DNLD 0x0001 | 313 | #define MWL8K_CMD_CODE_DNLD 0x0001 |
@@ -296,6 +317,7 @@ static const struct ieee80211_rate mwl8k_rates_50[] = { | |||
296 | #define MWL8K_CMD_GET_STAT 0x0014 | 317 | #define MWL8K_CMD_GET_STAT 0x0014 |
297 | #define MWL8K_CMD_RADIO_CONTROL 0x001c | 318 | #define MWL8K_CMD_RADIO_CONTROL 0x001c |
298 | #define MWL8K_CMD_RF_TX_POWER 0x001e | 319 | #define MWL8K_CMD_RF_TX_POWER 0x001e |
320 | #define MWL8K_CMD_TX_POWER 0x001f | ||
299 | #define MWL8K_CMD_RF_ANTENNA 0x0020 | 321 | #define MWL8K_CMD_RF_ANTENNA 0x0020 |
300 | #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */ | 322 | #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */ |
301 | #define MWL8K_CMD_SET_PRE_SCAN 0x0107 | 323 | #define MWL8K_CMD_SET_PRE_SCAN 0x0107 |
@@ -333,6 +355,7 @@ static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize) | |||
333 | MWL8K_CMDNAME(GET_STAT); | 355 | MWL8K_CMDNAME(GET_STAT); |
334 | MWL8K_CMDNAME(RADIO_CONTROL); | 356 | MWL8K_CMDNAME(RADIO_CONTROL); |
335 | MWL8K_CMDNAME(RF_TX_POWER); | 357 | MWL8K_CMDNAME(RF_TX_POWER); |
358 | MWL8K_CMDNAME(TX_POWER); | ||
336 | MWL8K_CMDNAME(RF_ANTENNA); | 359 | MWL8K_CMDNAME(RF_ANTENNA); |
337 | MWL8K_CMDNAME(SET_BEACON); | 360 | MWL8K_CMDNAME(SET_BEACON); |
338 | MWL8K_CMDNAME(SET_PRE_SCAN); | 361 | MWL8K_CMDNAME(SET_PRE_SCAN); |
@@ -372,7 +395,7 @@ static void mwl8k_hw_reset(struct mwl8k_priv *priv) | |||
372 | } | 395 | } |
373 | 396 | ||
374 | /* Release fw image */ | 397 | /* Release fw image */ |
375 | static void mwl8k_release_fw(struct firmware **fw) | 398 | static void mwl8k_release_fw(const struct firmware **fw) |
376 | { | 399 | { |
377 | if (*fw == NULL) | 400 | if (*fw == NULL) |
378 | return; | 401 | return; |
@@ -386,37 +409,68 @@ static void mwl8k_release_firmware(struct mwl8k_priv *priv) | |||
386 | mwl8k_release_fw(&priv->fw_helper); | 409 | mwl8k_release_fw(&priv->fw_helper); |
387 | } | 410 | } |
388 | 411 | ||
412 | /* states for asynchronous f/w loading */ | ||
413 | static void mwl8k_fw_state_machine(const struct firmware *fw, void *context); | ||
414 | enum { | ||
415 | FW_STATE_INIT = 0, | ||
416 | FW_STATE_LOADING_PREF, | ||
417 | FW_STATE_LOADING_ALT, | ||
418 | FW_STATE_ERROR, | ||
419 | }; | ||
420 | |||
389 | /* Request fw image */ | 421 | /* Request fw image */ |
390 | static int mwl8k_request_fw(struct mwl8k_priv *priv, | 422 | static int mwl8k_request_fw(struct mwl8k_priv *priv, |
391 | const char *fname, struct firmware **fw) | 423 | const char *fname, const struct firmware **fw, |
424 | bool nowait) | ||
392 | { | 425 | { |
393 | /* release current image */ | 426 | /* release current image */ |
394 | if (*fw != NULL) | 427 | if (*fw != NULL) |
395 | mwl8k_release_fw(fw); | 428 | mwl8k_release_fw(fw); |
396 | 429 | ||
397 | return request_firmware((const struct firmware **)fw, | 430 | if (nowait) |
398 | fname, &priv->pdev->dev); | 431 | return request_firmware_nowait(THIS_MODULE, 1, fname, |
432 | &priv->pdev->dev, GFP_KERNEL, | ||
433 | priv, mwl8k_fw_state_machine); | ||
434 | else | ||
435 | return request_firmware(fw, fname, &priv->pdev->dev); | ||
399 | } | 436 | } |
400 | 437 | ||
401 | static int mwl8k_request_firmware(struct mwl8k_priv *priv) | 438 | static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image, |
439 | bool nowait) | ||
402 | { | 440 | { |
403 | struct mwl8k_device_info *di = priv->device_info; | 441 | struct mwl8k_device_info *di = priv->device_info; |
404 | int rc; | 442 | int rc; |
405 | 443 | ||
406 | if (di->helper_image != NULL) { | 444 | if (di->helper_image != NULL) { |
407 | rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw_helper); | 445 | if (nowait) |
408 | if (rc) { | 446 | rc = mwl8k_request_fw(priv, di->helper_image, |
409 | printk(KERN_ERR "%s: Error requesting helper " | 447 | &priv->fw_helper, true); |
410 | "firmware file %s\n", pci_name(priv->pdev), | 448 | else |
411 | di->helper_image); | 449 | rc = mwl8k_request_fw(priv, di->helper_image, |
450 | &priv->fw_helper, false); | ||
451 | if (rc) | ||
452 | printk(KERN_ERR "%s: Error requesting helper fw %s\n", | ||
453 | pci_name(priv->pdev), di->helper_image); | ||
454 | |||
455 | if (rc || nowait) | ||
412 | return rc; | 456 | return rc; |
413 | } | ||
414 | } | 457 | } |
415 | 458 | ||
416 | rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw_ucode); | 459 | if (nowait) { |
460 | /* | ||
461 | * if we get here, no helper image is needed. Skip the | ||
462 | * FW_STATE_INIT state. | ||
463 | */ | ||
464 | priv->fw_state = FW_STATE_LOADING_PREF; | ||
465 | rc = mwl8k_request_fw(priv, fw_image, | ||
466 | &priv->fw_ucode, | ||
467 | true); | ||
468 | } else | ||
469 | rc = mwl8k_request_fw(priv, fw_image, | ||
470 | &priv->fw_ucode, false); | ||
417 | if (rc) { | 471 | if (rc) { |
418 | printk(KERN_ERR "%s: Error requesting firmware file %s\n", | 472 | printk(KERN_ERR "%s: Error requesting firmware file %s\n", |
419 | pci_name(priv->pdev), di->fw_image); | 473 | pci_name(priv->pdev), fw_image); |
420 | mwl8k_release_fw(&priv->fw_helper); | 474 | mwl8k_release_fw(&priv->fw_helper); |
421 | return rc; | 475 | return rc; |
422 | } | 476 | } |
@@ -577,12 +631,12 @@ static int mwl8k_feed_fw_image(struct mwl8k_priv *priv, | |||
577 | static int mwl8k_load_firmware(struct ieee80211_hw *hw) | 631 | static int mwl8k_load_firmware(struct ieee80211_hw *hw) |
578 | { | 632 | { |
579 | struct mwl8k_priv *priv = hw->priv; | 633 | struct mwl8k_priv *priv = hw->priv; |
580 | struct firmware *fw = priv->fw_ucode; | 634 | const struct firmware *fw = priv->fw_ucode; |
581 | int rc; | 635 | int rc; |
582 | int loops; | 636 | int loops; |
583 | 637 | ||
584 | if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) { | 638 | if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) { |
585 | struct firmware *helper = priv->fw_helper; | 639 | const struct firmware *helper = priv->fw_helper; |
586 | 640 | ||
587 | if (helper == NULL) { | 641 | if (helper == NULL) { |
588 | printk(KERN_ERR "%s: helper image needed but none " | 642 | printk(KERN_ERR "%s: helper image needed but none " |
@@ -1125,12 +1179,10 @@ struct mwl8k_tx_desc { | |||
1125 | __le32 reserved; | 1179 | __le32 reserved; |
1126 | __le16 rate_info; | 1180 | __le16 rate_info; |
1127 | __u8 peer_id; | 1181 | __u8 peer_id; |
1128 | __u8 xmitcontrol; | 1182 | __u8 tx_frag_cnt; |
1129 | } __packed; | 1183 | } __packed; |
1130 | 1184 | ||
1131 | #define MWL8K_TX_DESCS 128 | 1185 | #define MWL8K_TX_DESCS 128 |
1132 | #define MWL8K_XMITCONTROL_NON_AMPDU 0x04 | ||
1133 | |||
1134 | 1186 | ||
1135 | static int mwl8k_txq_init(struct ieee80211_hw *hw, int index) | 1187 | static int mwl8k_txq_init(struct ieee80211_hw *hw, int index) |
1136 | { | 1188 | { |
@@ -1450,9 +1502,6 @@ mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb) | |||
1450 | tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id; | 1502 | tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id; |
1451 | else | 1503 | else |
1452 | tx->peer_id = 0; | 1504 | tx->peer_id = 0; |
1453 | |||
1454 | if (priv->ap_fw) | ||
1455 | tx->xmitcontrol = MWL8K_XMITCONTROL_NON_AMPDU; | ||
1456 | wmb(); | 1505 | wmb(); |
1457 | tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus); | 1506 | tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus); |
1458 | 1507 | ||
@@ -1816,6 +1865,7 @@ struct mwl8k_cmd_get_hw_spec_ap { | |||
1816 | __le32 wcbbase1; | 1865 | __le32 wcbbase1; |
1817 | __le32 wcbbase2; | 1866 | __le32 wcbbase2; |
1818 | __le32 wcbbase3; | 1867 | __le32 wcbbase3; |
1868 | __le32 fw_api_version; | ||
1819 | } __packed; | 1869 | } __packed; |
1820 | 1870 | ||
1821 | static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw) | 1871 | static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw) |
@@ -1823,6 +1873,7 @@ static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw) | |||
1823 | struct mwl8k_priv *priv = hw->priv; | 1873 | struct mwl8k_priv *priv = hw->priv; |
1824 | struct mwl8k_cmd_get_hw_spec_ap *cmd; | 1874 | struct mwl8k_cmd_get_hw_spec_ap *cmd; |
1825 | int rc; | 1875 | int rc; |
1876 | u32 api_version; | ||
1826 | 1877 | ||
1827 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | 1878 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
1828 | if (cmd == NULL) | 1879 | if (cmd == NULL) |
@@ -1839,6 +1890,16 @@ static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw) | |||
1839 | if (!rc) { | 1890 | if (!rc) { |
1840 | int off; | 1891 | int off; |
1841 | 1892 | ||
1893 | api_version = le32_to_cpu(cmd->fw_api_version); | ||
1894 | if (priv->device_info->fw_api_ap != api_version) { | ||
1895 | printk(KERN_ERR "%s: Unsupported fw API version for %s." | ||
1896 | " Expected %d got %d.\n", MWL8K_NAME, | ||
1897 | priv->device_info->part_name, | ||
1898 | priv->device_info->fw_api_ap, | ||
1899 | api_version); | ||
1900 | rc = -EINVAL; | ||
1901 | goto done; | ||
1902 | } | ||
1842 | SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr); | 1903 | SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr); |
1843 | priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs); | 1904 | priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs); |
1844 | priv->fw_rev = le32_to_cpu(cmd->fw_rev); | 1905 | priv->fw_rev = le32_to_cpu(cmd->fw_rev); |
@@ -1866,6 +1927,7 @@ static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw) | |||
1866 | iowrite32(priv->txq[3].txd_dma, priv->sram + off); | 1927 | iowrite32(priv->txq[3].txd_dma, priv->sram + off); |
1867 | } | 1928 | } |
1868 | 1929 | ||
1930 | done: | ||
1869 | kfree(cmd); | 1931 | kfree(cmd); |
1870 | return rc; | 1932 | return rc; |
1871 | } | 1933 | } |
@@ -2089,7 +2151,7 @@ mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble) | |||
2089 | /* | 2151 | /* |
2090 | * CMD_RF_TX_POWER. | 2152 | * CMD_RF_TX_POWER. |
2091 | */ | 2153 | */ |
2092 | #define MWL8K_TX_POWER_LEVEL_TOTAL 8 | 2154 | #define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8 |
2093 | 2155 | ||
2094 | struct mwl8k_cmd_rf_tx_power { | 2156 | struct mwl8k_cmd_rf_tx_power { |
2095 | struct mwl8k_cmd_pkt header; | 2157 | struct mwl8k_cmd_pkt header; |
@@ -2097,7 +2159,7 @@ struct mwl8k_cmd_rf_tx_power { | |||
2097 | __le16 support_level; | 2159 | __le16 support_level; |
2098 | __le16 current_level; | 2160 | __le16 current_level; |
2099 | __le16 reserved; | 2161 | __le16 reserved; |
2100 | __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL]; | 2162 | __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL]; |
2101 | } __packed; | 2163 | } __packed; |
2102 | 2164 | ||
2103 | static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm) | 2165 | static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm) |
@@ -2121,6 +2183,65 @@ static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm) | |||
2121 | } | 2183 | } |
2122 | 2184 | ||
2123 | /* | 2185 | /* |
2186 | * CMD_TX_POWER. | ||
2187 | */ | ||
2188 | #define MWL8K_TX_POWER_LEVEL_TOTAL 12 | ||
2189 | |||
2190 | struct mwl8k_cmd_tx_power { | ||
2191 | struct mwl8k_cmd_pkt header; | ||
2192 | __le16 action; | ||
2193 | __le16 band; | ||
2194 | __le16 channel; | ||
2195 | __le16 bw; | ||
2196 | __le16 sub_ch; | ||
2197 | __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL]; | ||
2198 | } __attribute__((packed)); | ||
2199 | |||
2200 | static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw, | ||
2201 | struct ieee80211_conf *conf, | ||
2202 | unsigned short pwr) | ||
2203 | { | ||
2204 | struct ieee80211_channel *channel = conf->channel; | ||
2205 | struct mwl8k_cmd_tx_power *cmd; | ||
2206 | int rc; | ||
2207 | int i; | ||
2208 | |||
2209 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | ||
2210 | if (cmd == NULL) | ||
2211 | return -ENOMEM; | ||
2212 | |||
2213 | cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER); | ||
2214 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | ||
2215 | cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST); | ||
2216 | |||
2217 | if (channel->band == IEEE80211_BAND_2GHZ) | ||
2218 | cmd->band = cpu_to_le16(0x1); | ||
2219 | else if (channel->band == IEEE80211_BAND_5GHZ) | ||
2220 | cmd->band = cpu_to_le16(0x4); | ||
2221 | |||
2222 | cmd->channel = channel->hw_value; | ||
2223 | |||
2224 | if (conf->channel_type == NL80211_CHAN_NO_HT || | ||
2225 | conf->channel_type == NL80211_CHAN_HT20) { | ||
2226 | cmd->bw = cpu_to_le16(0x2); | ||
2227 | } else { | ||
2228 | cmd->bw = cpu_to_le16(0x4); | ||
2229 | if (conf->channel_type == NL80211_CHAN_HT40MINUS) | ||
2230 | cmd->sub_ch = cpu_to_le16(0x3); | ||
2231 | else if (conf->channel_type == NL80211_CHAN_HT40PLUS) | ||
2232 | cmd->sub_ch = cpu_to_le16(0x1); | ||
2233 | } | ||
2234 | |||
2235 | for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++) | ||
2236 | cmd->power_level_list[i] = cpu_to_le16(pwr); | ||
2237 | |||
2238 | rc = mwl8k_post_cmd(hw, &cmd->header); | ||
2239 | kfree(cmd); | ||
2240 | |||
2241 | return rc; | ||
2242 | } | ||
2243 | |||
2244 | /* | ||
2124 | * CMD_RF_ANTENNA. | 2245 | * CMD_RF_ANTENNA. |
2125 | */ | 2246 | */ |
2126 | struct mwl8k_cmd_rf_antenna { | 2247 | struct mwl8k_cmd_rf_antenna { |
@@ -3288,13 +3409,16 @@ static void mwl8k_stop(struct ieee80211_hw *hw) | |||
3288 | mwl8k_txq_reclaim(hw, i, INT_MAX, 1); | 3409 | mwl8k_txq_reclaim(hw, i, INT_MAX, 1); |
3289 | } | 3410 | } |
3290 | 3411 | ||
3412 | static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image); | ||
3413 | |||
3291 | static int mwl8k_add_interface(struct ieee80211_hw *hw, | 3414 | static int mwl8k_add_interface(struct ieee80211_hw *hw, |
3292 | struct ieee80211_vif *vif) | 3415 | struct ieee80211_vif *vif) |
3293 | { | 3416 | { |
3294 | struct mwl8k_priv *priv = hw->priv; | 3417 | struct mwl8k_priv *priv = hw->priv; |
3295 | struct mwl8k_vif *mwl8k_vif; | 3418 | struct mwl8k_vif *mwl8k_vif; |
3296 | u32 macids_supported; | 3419 | u32 macids_supported; |
3297 | int macid; | 3420 | int macid, rc; |
3421 | struct mwl8k_device_info *di; | ||
3298 | 3422 | ||
3299 | /* | 3423 | /* |
3300 | * Reject interface creation if sniffer mode is active, as | 3424 | * Reject interface creation if sniffer mode is active, as |
@@ -3307,12 +3431,28 @@ static int mwl8k_add_interface(struct ieee80211_hw *hw, | |||
3307 | return -EINVAL; | 3431 | return -EINVAL; |
3308 | } | 3432 | } |
3309 | 3433 | ||
3310 | 3434 | di = priv->device_info; | |
3311 | switch (vif->type) { | 3435 | switch (vif->type) { |
3312 | case NL80211_IFTYPE_AP: | 3436 | case NL80211_IFTYPE_AP: |
3437 | if (!priv->ap_fw && di->fw_image_ap) { | ||
3438 | /* we must load the ap fw to meet this request */ | ||
3439 | if (!list_empty(&priv->vif_list)) | ||
3440 | return -EBUSY; | ||
3441 | rc = mwl8k_reload_firmware(hw, di->fw_image_ap); | ||
3442 | if (rc) | ||
3443 | return rc; | ||
3444 | } | ||
3313 | macids_supported = priv->ap_macids_supported; | 3445 | macids_supported = priv->ap_macids_supported; |
3314 | break; | 3446 | break; |
3315 | case NL80211_IFTYPE_STATION: | 3447 | case NL80211_IFTYPE_STATION: |
3448 | if (priv->ap_fw && di->fw_image_sta) { | ||
3449 | /* we must load the sta fw to meet this request */ | ||
3450 | if (!list_empty(&priv->vif_list)) | ||
3451 | return -EBUSY; | ||
3452 | rc = mwl8k_reload_firmware(hw, di->fw_image_sta); | ||
3453 | if (rc) | ||
3454 | return rc; | ||
3455 | } | ||
3316 | macids_supported = priv->sta_macids_supported; | 3456 | macids_supported = priv->sta_macids_supported; |
3317 | break; | 3457 | break; |
3318 | default: | 3458 | default: |
@@ -3382,15 +3522,19 @@ static int mwl8k_config(struct ieee80211_hw *hw, u32 changed) | |||
3382 | 3522 | ||
3383 | if (conf->power_level > 18) | 3523 | if (conf->power_level > 18) |
3384 | conf->power_level = 18; | 3524 | conf->power_level = 18; |
3385 | rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level); | ||
3386 | if (rc) | ||
3387 | goto out; | ||
3388 | 3525 | ||
3389 | if (priv->ap_fw) { | 3526 | if (priv->ap_fw) { |
3527 | rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level); | ||
3528 | if (rc) | ||
3529 | goto out; | ||
3530 | |||
3390 | rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7); | 3531 | rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7); |
3391 | if (!rc) | 3532 | if (!rc) |
3392 | rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7); | 3533 | rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7); |
3393 | } else { | 3534 | } else { |
3535 | rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level); | ||
3536 | if (rc) | ||
3537 | goto out; | ||
3394 | rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7); | 3538 | rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7); |
3395 | } | 3539 | } |
3396 | 3540 | ||
@@ -3744,6 +3888,9 @@ static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue, | |||
3744 | 3888 | ||
3745 | rc = mwl8k_fw_lock(hw); | 3889 | rc = mwl8k_fw_lock(hw); |
3746 | if (!rc) { | 3890 | if (!rc) { |
3891 | BUG_ON(queue > MWL8K_TX_QUEUES - 1); | ||
3892 | memcpy(&priv->wmm_params[queue], params, sizeof(*params)); | ||
3893 | |||
3747 | if (!priv->wmm_enabled) | 3894 | if (!priv->wmm_enabled) |
3748 | rc = mwl8k_cmd_set_wmm_mode(hw, 1); | 3895 | rc = mwl8k_cmd_set_wmm_mode(hw, 1); |
3749 | 3896 | ||
@@ -3843,21 +3990,27 @@ enum { | |||
3843 | MWL8366, | 3990 | MWL8366, |
3844 | }; | 3991 | }; |
3845 | 3992 | ||
3993 | #define MWL8K_8366_AP_FW_API 1 | ||
3994 | #define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw" | ||
3995 | #define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api) | ||
3996 | |||
3846 | static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = { | 3997 | static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = { |
3847 | [MWL8363] = { | 3998 | [MWL8363] = { |
3848 | .part_name = "88w8363", | 3999 | .part_name = "88w8363", |
3849 | .helper_image = "mwl8k/helper_8363.fw", | 4000 | .helper_image = "mwl8k/helper_8363.fw", |
3850 | .fw_image = "mwl8k/fmimage_8363.fw", | 4001 | .fw_image_sta = "mwl8k/fmimage_8363.fw", |
3851 | }, | 4002 | }, |
3852 | [MWL8687] = { | 4003 | [MWL8687] = { |
3853 | .part_name = "88w8687", | 4004 | .part_name = "88w8687", |
3854 | .helper_image = "mwl8k/helper_8687.fw", | 4005 | .helper_image = "mwl8k/helper_8687.fw", |
3855 | .fw_image = "mwl8k/fmimage_8687.fw", | 4006 | .fw_image_sta = "mwl8k/fmimage_8687.fw", |
3856 | }, | 4007 | }, |
3857 | [MWL8366] = { | 4008 | [MWL8366] = { |
3858 | .part_name = "88w8366", | 4009 | .part_name = "88w8366", |
3859 | .helper_image = "mwl8k/helper_8366.fw", | 4010 | .helper_image = "mwl8k/helper_8366.fw", |
3860 | .fw_image = "mwl8k/fmimage_8366.fw", | 4011 | .fw_image_sta = "mwl8k/fmimage_8366.fw", |
4012 | .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API), | ||
4013 | .fw_api_ap = MWL8K_8366_AP_FW_API, | ||
3861 | .ap_rxd_ops = &rxd_8366_ap_ops, | 4014 | .ap_rxd_ops = &rxd_8366_ap_ops, |
3862 | }, | 4015 | }, |
3863 | }; | 4016 | }; |
@@ -3868,6 +4021,7 @@ MODULE_FIRMWARE("mwl8k/helper_8687.fw"); | |||
3868 | MODULE_FIRMWARE("mwl8k/fmimage_8687.fw"); | 4021 | MODULE_FIRMWARE("mwl8k/fmimage_8687.fw"); |
3869 | MODULE_FIRMWARE("mwl8k/helper_8366.fw"); | 4022 | MODULE_FIRMWARE("mwl8k/helper_8366.fw"); |
3870 | MODULE_FIRMWARE("mwl8k/fmimage_8366.fw"); | 4023 | MODULE_FIRMWARE("mwl8k/fmimage_8366.fw"); |
4024 | MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API)); | ||
3871 | 4025 | ||
3872 | static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = { | 4026 | static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = { |
3873 | { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, }, | 4027 | { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, }, |
@@ -3881,94 +4035,133 @@ static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = { | |||
3881 | }; | 4035 | }; |
3882 | MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table); | 4036 | MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table); |
3883 | 4037 | ||
3884 | static int __devinit mwl8k_probe(struct pci_dev *pdev, | 4038 | static int mwl8k_request_alt_fw(struct mwl8k_priv *priv) |
3885 | const struct pci_device_id *id) | ||
3886 | { | 4039 | { |
3887 | static int printed_version = 0; | ||
3888 | struct ieee80211_hw *hw; | ||
3889 | struct mwl8k_priv *priv; | ||
3890 | int rc; | 4040 | int rc; |
3891 | int i; | 4041 | printk(KERN_ERR "%s: Error requesting preferred fw %s.\n" |
3892 | 4042 | "Trying alternative firmware %s\n", pci_name(priv->pdev), | |
3893 | if (!printed_version) { | 4043 | priv->fw_pref, priv->fw_alt); |
3894 | printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION); | 4044 | rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true); |
3895 | printed_version = 1; | ||
3896 | } | ||
3897 | |||
3898 | |||
3899 | rc = pci_enable_device(pdev); | ||
3900 | if (rc) { | 4045 | if (rc) { |
3901 | printk(KERN_ERR "%s: Cannot enable new PCI device\n", | 4046 | printk(KERN_ERR "%s: Error requesting alt fw %s\n", |
3902 | MWL8K_NAME); | 4047 | pci_name(priv->pdev), priv->fw_alt); |
3903 | return rc; | 4048 | return rc; |
3904 | } | 4049 | } |
4050 | return 0; | ||
4051 | } | ||
3905 | 4052 | ||
3906 | rc = pci_request_regions(pdev, MWL8K_NAME); | 4053 | static int mwl8k_firmware_load_success(struct mwl8k_priv *priv); |
3907 | if (rc) { | 4054 | static void mwl8k_fw_state_machine(const struct firmware *fw, void *context) |
3908 | printk(KERN_ERR "%s: Cannot obtain PCI resources\n", | 4055 | { |
3909 | MWL8K_NAME); | 4056 | struct mwl8k_priv *priv = context; |
3910 | goto err_disable_device; | 4057 | struct mwl8k_device_info *di = priv->device_info; |
3911 | } | 4058 | int rc; |
3912 | |||
3913 | pci_set_master(pdev); | ||
3914 | |||
3915 | |||
3916 | hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops); | ||
3917 | if (hw == NULL) { | ||
3918 | printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME); | ||
3919 | rc = -ENOMEM; | ||
3920 | goto err_free_reg; | ||
3921 | } | ||
3922 | 4059 | ||
3923 | SET_IEEE80211_DEV(hw, &pdev->dev); | 4060 | switch (priv->fw_state) { |
3924 | pci_set_drvdata(pdev, hw); | 4061 | case FW_STATE_INIT: |
4062 | if (!fw) { | ||
4063 | printk(KERN_ERR "%s: Error requesting helper fw %s\n", | ||
4064 | pci_name(priv->pdev), di->helper_image); | ||
4065 | goto fail; | ||
4066 | } | ||
4067 | priv->fw_helper = fw; | ||
4068 | rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode, | ||
4069 | true); | ||
4070 | if (rc && priv->fw_alt) { | ||
4071 | rc = mwl8k_request_alt_fw(priv); | ||
4072 | if (rc) | ||
4073 | goto fail; | ||
4074 | priv->fw_state = FW_STATE_LOADING_ALT; | ||
4075 | } else if (rc) | ||
4076 | goto fail; | ||
4077 | else | ||
4078 | priv->fw_state = FW_STATE_LOADING_PREF; | ||
4079 | break; | ||
3925 | 4080 | ||
3926 | priv = hw->priv; | 4081 | case FW_STATE_LOADING_PREF: |
3927 | priv->hw = hw; | 4082 | if (!fw) { |
3928 | priv->pdev = pdev; | 4083 | if (priv->fw_alt) { |
3929 | priv->device_info = &mwl8k_info_tbl[id->driver_data]; | 4084 | rc = mwl8k_request_alt_fw(priv); |
4085 | if (rc) | ||
4086 | goto fail; | ||
4087 | priv->fw_state = FW_STATE_LOADING_ALT; | ||
4088 | } else | ||
4089 | goto fail; | ||
4090 | } else { | ||
4091 | priv->fw_ucode = fw; | ||
4092 | rc = mwl8k_firmware_load_success(priv); | ||
4093 | if (rc) | ||
4094 | goto fail; | ||
4095 | else | ||
4096 | complete(&priv->firmware_loading_complete); | ||
4097 | } | ||
4098 | break; | ||
3930 | 4099 | ||
4100 | case FW_STATE_LOADING_ALT: | ||
4101 | if (!fw) { | ||
4102 | printk(KERN_ERR "%s: Error requesting alt fw %s\n", | ||
4103 | pci_name(priv->pdev), di->helper_image); | ||
4104 | goto fail; | ||
4105 | } | ||
4106 | priv->fw_ucode = fw; | ||
4107 | rc = mwl8k_firmware_load_success(priv); | ||
4108 | if (rc) | ||
4109 | goto fail; | ||
4110 | else | ||
4111 | complete(&priv->firmware_loading_complete); | ||
4112 | break; | ||
3931 | 4113 | ||
3932 | priv->sram = pci_iomap(pdev, 0, 0x10000); | 4114 | default: |
3933 | if (priv->sram == NULL) { | 4115 | printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n", |
3934 | wiphy_err(hw->wiphy, "Cannot map device SRAM\n"); | 4116 | MWL8K_NAME, priv->fw_state); |
3935 | goto err_iounmap; | 4117 | BUG_ON(1); |
3936 | } | 4118 | } |
3937 | 4119 | ||
3938 | /* | 4120 | return; |
3939 | * If BAR0 is a 32 bit BAR, the register BAR will be BAR1. | ||
3940 | * If BAR0 is a 64 bit BAR, the register BAR will be BAR2. | ||
3941 | */ | ||
3942 | priv->regs = pci_iomap(pdev, 1, 0x10000); | ||
3943 | if (priv->regs == NULL) { | ||
3944 | priv->regs = pci_iomap(pdev, 2, 0x10000); | ||
3945 | if (priv->regs == NULL) { | ||
3946 | wiphy_err(hw->wiphy, "Cannot map device registers\n"); | ||
3947 | goto err_iounmap; | ||
3948 | } | ||
3949 | } | ||
3950 | 4121 | ||
4122 | fail: | ||
4123 | priv->fw_state = FW_STATE_ERROR; | ||
4124 | complete(&priv->firmware_loading_complete); | ||
4125 | device_release_driver(&priv->pdev->dev); | ||
4126 | mwl8k_release_firmware(priv); | ||
4127 | } | ||
4128 | |||
4129 | static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image, | ||
4130 | bool nowait) | ||
4131 | { | ||
4132 | struct mwl8k_priv *priv = hw->priv; | ||
4133 | int rc; | ||
3951 | 4134 | ||
3952 | /* Reset firmware and hardware */ | 4135 | /* Reset firmware and hardware */ |
3953 | mwl8k_hw_reset(priv); | 4136 | mwl8k_hw_reset(priv); |
3954 | 4137 | ||
3955 | /* Ask userland hotplug daemon for the device firmware */ | 4138 | /* Ask userland hotplug daemon for the device firmware */ |
3956 | rc = mwl8k_request_firmware(priv); | 4139 | rc = mwl8k_request_firmware(priv, fw_image, nowait); |
3957 | if (rc) { | 4140 | if (rc) { |
3958 | wiphy_err(hw->wiphy, "Firmware files not found\n"); | 4141 | wiphy_err(hw->wiphy, "Firmware files not found\n"); |
3959 | goto err_stop_firmware; | 4142 | return rc; |
3960 | } | 4143 | } |
3961 | 4144 | ||
4145 | if (nowait) | ||
4146 | return rc; | ||
4147 | |||
3962 | /* Load firmware into hardware */ | 4148 | /* Load firmware into hardware */ |
3963 | rc = mwl8k_load_firmware(hw); | 4149 | rc = mwl8k_load_firmware(hw); |
3964 | if (rc) { | 4150 | if (rc) |
3965 | wiphy_err(hw->wiphy, "Cannot start firmware\n"); | 4151 | wiphy_err(hw->wiphy, "Cannot start firmware\n"); |
3966 | goto err_stop_firmware; | ||
3967 | } | ||
3968 | 4152 | ||
3969 | /* Reclaim memory once firmware is successfully loaded */ | 4153 | /* Reclaim memory once firmware is successfully loaded */ |
3970 | mwl8k_release_firmware(priv); | 4154 | mwl8k_release_firmware(priv); |
3971 | 4155 | ||
4156 | return rc; | ||
4157 | } | ||
4158 | |||
4159 | /* initialize hw after successfully loading a firmware image */ | ||
4160 | static int mwl8k_probe_hw(struct ieee80211_hw *hw) | ||
4161 | { | ||
4162 | struct mwl8k_priv *priv = hw->priv; | ||
4163 | int rc = 0; | ||
4164 | int i; | ||
3972 | 4165 | ||
3973 | if (priv->ap_fw) { | 4166 | if (priv->ap_fw) { |
3974 | priv->rxd_ops = priv->device_info->ap_rxd_ops; | 4167 | priv->rxd_ops = priv->device_info->ap_rxd_ops; |
@@ -3985,58 +4178,11 @@ static int __devinit mwl8k_probe(struct pci_dev *pdev, | |||
3985 | priv->wmm_enabled = false; | 4178 | priv->wmm_enabled = false; |
3986 | priv->pending_tx_pkts = 0; | 4179 | priv->pending_tx_pkts = 0; |
3987 | 4180 | ||
3988 | |||
3989 | /* | ||
3990 | * Extra headroom is the size of the required DMA header | ||
3991 | * minus the size of the smallest 802.11 frame (CTS frame). | ||
3992 | */ | ||
3993 | hw->extra_tx_headroom = | ||
3994 | sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts); | ||
3995 | |||
3996 | hw->channel_change_time = 10; | ||
3997 | |||
3998 | hw->queues = MWL8K_TX_QUEUES; | ||
3999 | |||
4000 | /* Set rssi values to dBm */ | ||
4001 | hw->flags |= IEEE80211_HW_SIGNAL_DBM; | ||
4002 | hw->vif_data_size = sizeof(struct mwl8k_vif); | ||
4003 | hw->sta_data_size = sizeof(struct mwl8k_sta); | ||
4004 | |||
4005 | priv->macids_used = 0; | ||
4006 | INIT_LIST_HEAD(&priv->vif_list); | ||
4007 | |||
4008 | /* Set default radio state and preamble */ | ||
4009 | priv->radio_on = 0; | ||
4010 | priv->radio_short_preamble = 0; | ||
4011 | |||
4012 | /* Finalize join worker */ | ||
4013 | INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker); | ||
4014 | |||
4015 | /* TX reclaim and RX tasklets. */ | ||
4016 | tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw); | ||
4017 | tasklet_disable(&priv->poll_tx_task); | ||
4018 | tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw); | ||
4019 | tasklet_disable(&priv->poll_rx_task); | ||
4020 | |||
4021 | /* Power management cookie */ | ||
4022 | priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma); | ||
4023 | if (priv->cookie == NULL) | ||
4024 | goto err_stop_firmware; | ||
4025 | |||
4026 | rc = mwl8k_rxq_init(hw, 0); | 4181 | rc = mwl8k_rxq_init(hw, 0); |
4027 | if (rc) | 4182 | if (rc) |
4028 | goto err_free_cookie; | 4183 | goto err_stop_firmware; |
4029 | rxq_refill(hw, 0, INT_MAX); | 4184 | rxq_refill(hw, 0, INT_MAX); |
4030 | 4185 | ||
4031 | mutex_init(&priv->fw_mutex); | ||
4032 | priv->fw_mutex_owner = NULL; | ||
4033 | priv->fw_mutex_depth = 0; | ||
4034 | priv->hostcmd_wait = NULL; | ||
4035 | |||
4036 | spin_lock_init(&priv->tx_lock); | ||
4037 | |||
4038 | priv->tx_wait = NULL; | ||
4039 | |||
4040 | for (i = 0; i < MWL8K_TX_QUEUES; i++) { | 4186 | for (i = 0; i < MWL8K_TX_QUEUES; i++) { |
4041 | rc = mwl8k_txq_init(hw, i); | 4187 | rc = mwl8k_txq_init(hw, i); |
4042 | if (rc) | 4188 | if (rc) |
@@ -4076,13 +4222,6 @@ static int __devinit mwl8k_probe(struct pci_dev *pdev, | |||
4076 | goto err_free_irq; | 4222 | goto err_free_irq; |
4077 | } | 4223 | } |
4078 | 4224 | ||
4079 | hw->wiphy->interface_modes = 0; | ||
4080 | if (priv->ap_macids_supported) | ||
4081 | hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP); | ||
4082 | if (priv->sta_macids_supported) | ||
4083 | hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION); | ||
4084 | |||
4085 | |||
4086 | /* Turn radio off */ | 4225 | /* Turn radio off */ |
4087 | rc = mwl8k_cmd_radio_disable(hw); | 4226 | rc = mwl8k_cmd_radio_disable(hw); |
4088 | if (rc) { | 4227 | if (rc) { |
@@ -4101,12 +4240,6 @@ static int __devinit mwl8k_probe(struct pci_dev *pdev, | |||
4101 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); | 4240 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
4102 | free_irq(priv->pdev->irq, hw); | 4241 | free_irq(priv->pdev->irq, hw); |
4103 | 4242 | ||
4104 | rc = ieee80211_register_hw(hw); | ||
4105 | if (rc) { | ||
4106 | wiphy_err(hw->wiphy, "Cannot register device\n"); | ||
4107 | goto err_free_queues; | ||
4108 | } | ||
4109 | |||
4110 | wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n", | 4243 | wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n", |
4111 | priv->device_info->part_name, | 4244 | priv->device_info->part_name, |
4112 | priv->hw_rev, hw->wiphy->perm_addr, | 4245 | priv->hw_rev, hw->wiphy->perm_addr, |
@@ -4125,14 +4258,238 @@ err_free_queues: | |||
4125 | mwl8k_txq_deinit(hw, i); | 4258 | mwl8k_txq_deinit(hw, i); |
4126 | mwl8k_rxq_deinit(hw, 0); | 4259 | mwl8k_rxq_deinit(hw, 0); |
4127 | 4260 | ||
4261 | err_stop_firmware: | ||
4262 | mwl8k_hw_reset(priv); | ||
4263 | |||
4264 | return rc; | ||
4265 | } | ||
4266 | |||
4267 | /* | ||
4268 | * invoke mwl8k_reload_firmware to change the firmware image after the device | ||
4269 | * has already been registered | ||
4270 | */ | ||
4271 | static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image) | ||
4272 | { | ||
4273 | int i, rc = 0; | ||
4274 | struct mwl8k_priv *priv = hw->priv; | ||
4275 | |||
4276 | mwl8k_stop(hw); | ||
4277 | mwl8k_rxq_deinit(hw, 0); | ||
4278 | |||
4279 | for (i = 0; i < MWL8K_TX_QUEUES; i++) | ||
4280 | mwl8k_txq_deinit(hw, i); | ||
4281 | |||
4282 | rc = mwl8k_init_firmware(hw, fw_image, false); | ||
4283 | if (rc) | ||
4284 | goto fail; | ||
4285 | |||
4286 | rc = mwl8k_probe_hw(hw); | ||
4287 | if (rc) | ||
4288 | goto fail; | ||
4289 | |||
4290 | rc = mwl8k_start(hw); | ||
4291 | if (rc) | ||
4292 | goto fail; | ||
4293 | |||
4294 | rc = mwl8k_config(hw, ~0); | ||
4295 | if (rc) | ||
4296 | goto fail; | ||
4297 | |||
4298 | for (i = 0; i < MWL8K_TX_QUEUES; i++) { | ||
4299 | rc = mwl8k_conf_tx(hw, i, &priv->wmm_params[i]); | ||
4300 | if (rc) | ||
4301 | goto fail; | ||
4302 | } | ||
4303 | |||
4304 | return rc; | ||
4305 | |||
4306 | fail: | ||
4307 | printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n"); | ||
4308 | return rc; | ||
4309 | } | ||
4310 | |||
4311 | static int mwl8k_firmware_load_success(struct mwl8k_priv *priv) | ||
4312 | { | ||
4313 | struct ieee80211_hw *hw = priv->hw; | ||
4314 | int i, rc; | ||
4315 | |||
4316 | rc = mwl8k_load_firmware(hw); | ||
4317 | mwl8k_release_firmware(priv); | ||
4318 | if (rc) { | ||
4319 | wiphy_err(hw->wiphy, "Cannot start firmware\n"); | ||
4320 | return rc; | ||
4321 | } | ||
4322 | |||
4323 | /* | ||
4324 | * Extra headroom is the size of the required DMA header | ||
4325 | * minus the size of the smallest 802.11 frame (CTS frame). | ||
4326 | */ | ||
4327 | hw->extra_tx_headroom = | ||
4328 | sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts); | ||
4329 | |||
4330 | hw->channel_change_time = 10; | ||
4331 | |||
4332 | hw->queues = MWL8K_TX_QUEUES; | ||
4333 | |||
4334 | /* Set rssi values to dBm */ | ||
4335 | hw->flags |= IEEE80211_HW_SIGNAL_DBM; | ||
4336 | hw->vif_data_size = sizeof(struct mwl8k_vif); | ||
4337 | hw->sta_data_size = sizeof(struct mwl8k_sta); | ||
4338 | |||
4339 | priv->macids_used = 0; | ||
4340 | INIT_LIST_HEAD(&priv->vif_list); | ||
4341 | |||
4342 | /* Set default radio state and preamble */ | ||
4343 | priv->radio_on = 0; | ||
4344 | priv->radio_short_preamble = 0; | ||
4345 | |||
4346 | /* Finalize join worker */ | ||
4347 | INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker); | ||
4348 | |||
4349 | /* TX reclaim and RX tasklets. */ | ||
4350 | tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw); | ||
4351 | tasklet_disable(&priv->poll_tx_task); | ||
4352 | tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw); | ||
4353 | tasklet_disable(&priv->poll_rx_task); | ||
4354 | |||
4355 | /* Power management cookie */ | ||
4356 | priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma); | ||
4357 | if (priv->cookie == NULL) | ||
4358 | return -ENOMEM; | ||
4359 | |||
4360 | mutex_init(&priv->fw_mutex); | ||
4361 | priv->fw_mutex_owner = NULL; | ||
4362 | priv->fw_mutex_depth = 0; | ||
4363 | priv->hostcmd_wait = NULL; | ||
4364 | |||
4365 | spin_lock_init(&priv->tx_lock); | ||
4366 | |||
4367 | priv->tx_wait = NULL; | ||
4368 | |||
4369 | rc = mwl8k_probe_hw(hw); | ||
4370 | if (rc) | ||
4371 | goto err_free_cookie; | ||
4372 | |||
4373 | hw->wiphy->interface_modes = 0; | ||
4374 | if (priv->ap_macids_supported || priv->device_info->fw_image_ap) | ||
4375 | hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP); | ||
4376 | if (priv->sta_macids_supported || priv->device_info->fw_image_sta) | ||
4377 | hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION); | ||
4378 | |||
4379 | rc = ieee80211_register_hw(hw); | ||
4380 | if (rc) { | ||
4381 | wiphy_err(hw->wiphy, "Cannot register device\n"); | ||
4382 | goto err_unprobe_hw; | ||
4383 | } | ||
4384 | |||
4385 | return 0; | ||
4386 | |||
4387 | err_unprobe_hw: | ||
4388 | for (i = 0; i < MWL8K_TX_QUEUES; i++) | ||
4389 | mwl8k_txq_deinit(hw, i); | ||
4390 | mwl8k_rxq_deinit(hw, 0); | ||
4391 | |||
4128 | err_free_cookie: | 4392 | err_free_cookie: |
4129 | if (priv->cookie != NULL) | 4393 | if (priv->cookie != NULL) |
4130 | pci_free_consistent(priv->pdev, 4, | 4394 | pci_free_consistent(priv->pdev, 4, |
4131 | priv->cookie, priv->cookie_dma); | 4395 | priv->cookie, priv->cookie_dma); |
4132 | 4396 | ||
4397 | return rc; | ||
4398 | } | ||
4399 | static int __devinit mwl8k_probe(struct pci_dev *pdev, | ||
4400 | const struct pci_device_id *id) | ||
4401 | { | ||
4402 | static int printed_version; | ||
4403 | struct ieee80211_hw *hw; | ||
4404 | struct mwl8k_priv *priv; | ||
4405 | struct mwl8k_device_info *di; | ||
4406 | int rc; | ||
4407 | |||
4408 | if (!printed_version) { | ||
4409 | printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION); | ||
4410 | printed_version = 1; | ||
4411 | } | ||
4412 | |||
4413 | |||
4414 | rc = pci_enable_device(pdev); | ||
4415 | if (rc) { | ||
4416 | printk(KERN_ERR "%s: Cannot enable new PCI device\n", | ||
4417 | MWL8K_NAME); | ||
4418 | return rc; | ||
4419 | } | ||
4420 | |||
4421 | rc = pci_request_regions(pdev, MWL8K_NAME); | ||
4422 | if (rc) { | ||
4423 | printk(KERN_ERR "%s: Cannot obtain PCI resources\n", | ||
4424 | MWL8K_NAME); | ||
4425 | goto err_disable_device; | ||
4426 | } | ||
4427 | |||
4428 | pci_set_master(pdev); | ||
4429 | |||
4430 | |||
4431 | hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops); | ||
4432 | if (hw == NULL) { | ||
4433 | printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME); | ||
4434 | rc = -ENOMEM; | ||
4435 | goto err_free_reg; | ||
4436 | } | ||
4437 | |||
4438 | SET_IEEE80211_DEV(hw, &pdev->dev); | ||
4439 | pci_set_drvdata(pdev, hw); | ||
4440 | |||
4441 | priv = hw->priv; | ||
4442 | priv->hw = hw; | ||
4443 | priv->pdev = pdev; | ||
4444 | priv->device_info = &mwl8k_info_tbl[id->driver_data]; | ||
4445 | |||
4446 | |||
4447 | priv->sram = pci_iomap(pdev, 0, 0x10000); | ||
4448 | if (priv->sram == NULL) { | ||
4449 | wiphy_err(hw->wiphy, "Cannot map device SRAM\n"); | ||
4450 | goto err_iounmap; | ||
4451 | } | ||
4452 | |||
4453 | /* | ||
4454 | * If BAR0 is a 32 bit BAR, the register BAR will be BAR1. | ||
4455 | * If BAR0 is a 64 bit BAR, the register BAR will be BAR2. | ||
4456 | */ | ||
4457 | priv->regs = pci_iomap(pdev, 1, 0x10000); | ||
4458 | if (priv->regs == NULL) { | ||
4459 | priv->regs = pci_iomap(pdev, 2, 0x10000); | ||
4460 | if (priv->regs == NULL) { | ||
4461 | wiphy_err(hw->wiphy, "Cannot map device registers\n"); | ||
4462 | goto err_iounmap; | ||
4463 | } | ||
4464 | } | ||
4465 | |||
4466 | /* | ||
4467 | * Choose the initial fw image depending on user input. If a second | ||
4468 | * image is available, make it the alternative image that will be | ||
4469 | * loaded if the first one fails. | ||
4470 | */ | ||
4471 | init_completion(&priv->firmware_loading_complete); | ||
4472 | di = priv->device_info; | ||
4473 | if (ap_mode_default && di->fw_image_ap) { | ||
4474 | priv->fw_pref = di->fw_image_ap; | ||
4475 | priv->fw_alt = di->fw_image_sta; | ||
4476 | } else if (!ap_mode_default && di->fw_image_sta) { | ||
4477 | priv->fw_pref = di->fw_image_sta; | ||
4478 | priv->fw_alt = di->fw_image_ap; | ||
4479 | } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) { | ||
4480 | printk(KERN_WARNING "AP fw is unavailable. Using STA fw."); | ||
4481 | priv->fw_pref = di->fw_image_sta; | ||
4482 | } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) { | ||
4483 | printk(KERN_WARNING "STA fw is unavailable. Using AP fw."); | ||
4484 | priv->fw_pref = di->fw_image_ap; | ||
4485 | } | ||
4486 | rc = mwl8k_init_firmware(hw, priv->fw_pref, true); | ||
4487 | if (rc) | ||
4488 | goto err_stop_firmware; | ||
4489 | return rc; | ||
4490 | |||
4133 | err_stop_firmware: | 4491 | err_stop_firmware: |
4134 | mwl8k_hw_reset(priv); | 4492 | mwl8k_hw_reset(priv); |
4135 | mwl8k_release_firmware(priv); | ||
4136 | 4493 | ||
4137 | err_iounmap: | 4494 | err_iounmap: |
4138 | if (priv->regs != NULL) | 4495 | if (priv->regs != NULL) |
@@ -4168,6 +4525,13 @@ static void __devexit mwl8k_remove(struct pci_dev *pdev) | |||
4168 | return; | 4525 | return; |
4169 | priv = hw->priv; | 4526 | priv = hw->priv; |
4170 | 4527 | ||
4528 | wait_for_completion(&priv->firmware_loading_complete); | ||
4529 | |||
4530 | if (priv->fw_state == FW_STATE_ERROR) { | ||
4531 | mwl8k_hw_reset(priv); | ||
4532 | goto unmap; | ||
4533 | } | ||
4534 | |||
4171 | ieee80211_stop_queues(hw); | 4535 | ieee80211_stop_queues(hw); |
4172 | 4536 | ||
4173 | ieee80211_unregister_hw(hw); | 4537 | ieee80211_unregister_hw(hw); |
@@ -4190,6 +4554,7 @@ static void __devexit mwl8k_remove(struct pci_dev *pdev) | |||
4190 | 4554 | ||
4191 | pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma); | 4555 | pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma); |
4192 | 4556 | ||
4557 | unmap: | ||
4193 | pci_iounmap(pdev, priv->regs); | 4558 | pci_iounmap(pdev, priv->regs); |
4194 | pci_iounmap(pdev, priv->sram); | 4559 | pci_iounmap(pdev, priv->sram); |
4195 | pci_set_drvdata(pdev, NULL); | 4560 | pci_set_drvdata(pdev, NULL); |
diff --git a/drivers/net/wireless/ray_cs.c b/drivers/net/wireless/ray_cs.c index 97007d9e2c1f..2b1cbba90a84 100644 --- a/drivers/net/wireless/ray_cs.c +++ b/drivers/net/wireless/ray_cs.c | |||
@@ -2286,8 +2286,8 @@ static void untranslate(ray_dev_t *local, struct sk_buff *skb, int len) | |||
2286 | struct ethhdr *peth; | 2286 | struct ethhdr *peth; |
2287 | UCHAR srcaddr[ADDRLEN]; | 2287 | UCHAR srcaddr[ADDRLEN]; |
2288 | UCHAR destaddr[ADDRLEN]; | 2288 | UCHAR destaddr[ADDRLEN]; |
2289 | static UCHAR org_bridge[3] = { 0, 0, 0xf8 }; | 2289 | static const UCHAR org_bridge[3] = { 0, 0, 0xf8 }; |
2290 | static UCHAR org_1042[3] = { 0, 0, 0 }; | 2290 | static const UCHAR org_1042[3] = { 0, 0, 0 }; |
2291 | 2291 | ||
2292 | memcpy(destaddr, ieee80211_get_DA(pmac), ADDRLEN); | 2292 | memcpy(destaddr, ieee80211_get_DA(pmac), ADDRLEN); |
2293 | memcpy(srcaddr, ieee80211_get_SA(pmac), ADDRLEN); | 2293 | memcpy(srcaddr, ieee80211_get_SA(pmac), ADDRLEN); |
diff --git a/drivers/net/wireless/rndis_wlan.c b/drivers/net/wireless/rndis_wlan.c index 71b5971da597..19f3d568f700 100644 --- a/drivers/net/wireless/rndis_wlan.c +++ b/drivers/net/wireless/rndis_wlan.c | |||
@@ -156,6 +156,12 @@ MODULE_PARM_DESC(workaround_interval, | |||
156 | #define RNDIS_STATUS_ADAPTER_NOT_OPEN cpu_to_le32(0xc0010012) | 156 | #define RNDIS_STATUS_ADAPTER_NOT_OPEN cpu_to_le32(0xc0010012) |
157 | 157 | ||
158 | 158 | ||
159 | /* Known device types */ | ||
160 | #define RNDIS_UNKNOWN 0 | ||
161 | #define RNDIS_BCM4320A 1 | ||
162 | #define RNDIS_BCM4320B 2 | ||
163 | |||
164 | |||
159 | /* NDIS data structures. Taken from wpa_supplicant driver_ndis.c | 165 | /* NDIS data structures. Taken from wpa_supplicant driver_ndis.c |
160 | * slightly modified for datatype endianess, etc | 166 | * slightly modified for datatype endianess, etc |
161 | */ | 167 | */ |
@@ -478,6 +484,7 @@ struct rndis_wlan_private { | |||
478 | struct ieee80211_rate rates[ARRAY_SIZE(rndis_rates)]; | 484 | struct ieee80211_rate rates[ARRAY_SIZE(rndis_rates)]; |
479 | u32 cipher_suites[ARRAY_SIZE(rndis_cipher_suites)]; | 485 | u32 cipher_suites[ARRAY_SIZE(rndis_cipher_suites)]; |
480 | 486 | ||
487 | int device_type; | ||
481 | int caps; | 488 | int caps; |
482 | int multicast_size; | 489 | int multicast_size; |
483 | 490 | ||
@@ -810,7 +817,8 @@ exit_unlock: | |||
810 | return ret; | 817 | return ret; |
811 | } | 818 | } |
812 | 819 | ||
813 | static int rndis_set_oid(struct usbnet *dev, __le32 oid, void *data, int len) | 820 | static int rndis_set_oid(struct usbnet *dev, __le32 oid, const void *data, |
821 | int len) | ||
814 | { | 822 | { |
815 | struct rndis_wlan_private *priv = get_rndis_wlan_priv(dev); | 823 | struct rndis_wlan_private *priv = get_rndis_wlan_priv(dev); |
816 | union { | 824 | union { |
@@ -994,7 +1002,18 @@ static int level_to_qual(int level) | |||
994 | */ | 1002 | */ |
995 | static int set_infra_mode(struct usbnet *usbdev, int mode); | 1003 | static int set_infra_mode(struct usbnet *usbdev, int mode); |
996 | static void restore_keys(struct usbnet *usbdev); | 1004 | static void restore_keys(struct usbnet *usbdev); |
997 | static int rndis_check_bssid_list(struct usbnet *usbdev); | 1005 | static int rndis_check_bssid_list(struct usbnet *usbdev, u8 *match_bssid, |
1006 | bool *matched); | ||
1007 | |||
1008 | static int rndis_start_bssid_list_scan(struct usbnet *usbdev) | ||
1009 | { | ||
1010 | __le32 tmp; | ||
1011 | |||
1012 | /* Note: OID_802_11_BSSID_LIST_SCAN clears internal BSS list. */ | ||
1013 | tmp = cpu_to_le32(1); | ||
1014 | return rndis_set_oid(usbdev, OID_802_11_BSSID_LIST_SCAN, &tmp, | ||
1015 | sizeof(tmp)); | ||
1016 | } | ||
998 | 1017 | ||
999 | static int set_essid(struct usbnet *usbdev, struct ndis_80211_ssid *ssid) | 1018 | static int set_essid(struct usbnet *usbdev, struct ndis_80211_ssid *ssid) |
1000 | { | 1019 | { |
@@ -1015,7 +1034,7 @@ static int set_essid(struct usbnet *usbdev, struct ndis_80211_ssid *ssid) | |||
1015 | return ret; | 1034 | return ret; |
1016 | } | 1035 | } |
1017 | 1036 | ||
1018 | static int set_bssid(struct usbnet *usbdev, u8 bssid[ETH_ALEN]) | 1037 | static int set_bssid(struct usbnet *usbdev, const u8 *bssid) |
1019 | { | 1038 | { |
1020 | int ret; | 1039 | int ret; |
1021 | 1040 | ||
@@ -1031,7 +1050,9 @@ static int set_bssid(struct usbnet *usbdev, u8 bssid[ETH_ALEN]) | |||
1031 | 1050 | ||
1032 | static int clear_bssid(struct usbnet *usbdev) | 1051 | static int clear_bssid(struct usbnet *usbdev) |
1033 | { | 1052 | { |
1034 | u8 broadcast_mac[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; | 1053 | static const u8 broadcast_mac[ETH_ALEN] = { |
1054 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff | ||
1055 | }; | ||
1035 | 1056 | ||
1036 | return set_bssid(usbdev, broadcast_mac); | 1057 | return set_bssid(usbdev, broadcast_mac); |
1037 | } | 1058 | } |
@@ -1904,14 +1925,14 @@ static int rndis_scan(struct wiphy *wiphy, struct net_device *dev, | |||
1904 | struct usbnet *usbdev = netdev_priv(dev); | 1925 | struct usbnet *usbdev = netdev_priv(dev); |
1905 | struct rndis_wlan_private *priv = get_rndis_wlan_priv(usbdev); | 1926 | struct rndis_wlan_private *priv = get_rndis_wlan_priv(usbdev); |
1906 | int ret; | 1927 | int ret; |
1907 | __le32 tmp; | 1928 | int delay = SCAN_DELAY_JIFFIES; |
1908 | 1929 | ||
1909 | netdev_dbg(usbdev->net, "cfg80211.scan\n"); | 1930 | netdev_dbg(usbdev->net, "cfg80211.scan\n"); |
1910 | 1931 | ||
1911 | /* Get current bssid list from device before new scan, as new scan | 1932 | /* Get current bssid list from device before new scan, as new scan |
1912 | * clears internal bssid list. | 1933 | * clears internal bssid list. |
1913 | */ | 1934 | */ |
1914 | rndis_check_bssid_list(usbdev); | 1935 | rndis_check_bssid_list(usbdev, NULL, NULL); |
1915 | 1936 | ||
1916 | if (!request) | 1937 | if (!request) |
1917 | return -EINVAL; | 1938 | return -EINVAL; |
@@ -1921,13 +1942,13 @@ static int rndis_scan(struct wiphy *wiphy, struct net_device *dev, | |||
1921 | 1942 | ||
1922 | priv->scan_request = request; | 1943 | priv->scan_request = request; |
1923 | 1944 | ||
1924 | tmp = cpu_to_le32(1); | 1945 | ret = rndis_start_bssid_list_scan(usbdev); |
1925 | ret = rndis_set_oid(usbdev, OID_802_11_BSSID_LIST_SCAN, &tmp, | ||
1926 | sizeof(tmp)); | ||
1927 | if (ret == 0) { | 1946 | if (ret == 0) { |
1947 | if (priv->device_type == RNDIS_BCM4320A) | ||
1948 | delay = HZ; | ||
1949 | |||
1928 | /* Wait before retrieving scan results from device */ | 1950 | /* Wait before retrieving scan results from device */ |
1929 | queue_delayed_work(priv->workqueue, &priv->scan_work, | 1951 | queue_delayed_work(priv->workqueue, &priv->scan_work, delay); |
1930 | SCAN_DELAY_JIFFIES); | ||
1931 | } | 1952 | } |
1932 | 1953 | ||
1933 | return ret; | 1954 | return ret; |
@@ -1981,7 +2002,8 @@ static struct cfg80211_bss *rndis_bss_info_update(struct usbnet *usbdev, | |||
1981 | GFP_KERNEL); | 2002 | GFP_KERNEL); |
1982 | } | 2003 | } |
1983 | 2004 | ||
1984 | static int rndis_check_bssid_list(struct usbnet *usbdev) | 2005 | static int rndis_check_bssid_list(struct usbnet *usbdev, u8 *match_bssid, |
2006 | bool *matched) | ||
1985 | { | 2007 | { |
1986 | void *buf = NULL; | 2008 | void *buf = NULL; |
1987 | struct ndis_80211_bssid_list_ex *bssid_list; | 2009 | struct ndis_80211_bssid_list_ex *bssid_list; |
@@ -2017,7 +2039,11 @@ resize_buf: | |||
2017 | count, len); | 2039 | count, len); |
2018 | 2040 | ||
2019 | while (count && ((void *)bssid + bssid_len) <= (buf + len)) { | 2041 | while (count && ((void *)bssid + bssid_len) <= (buf + len)) { |
2020 | rndis_bss_info_update(usbdev, bssid); | 2042 | if (rndis_bss_info_update(usbdev, bssid) && match_bssid && |
2043 | matched) { | ||
2044 | if (compare_ether_addr(bssid->mac, match_bssid)) | ||
2045 | *matched = true; | ||
2046 | } | ||
2021 | 2047 | ||
2022 | bssid = (void *)bssid + bssid_len; | 2048 | bssid = (void *)bssid + bssid_len; |
2023 | bssid_len = le32_to_cpu(bssid->length); | 2049 | bssid_len = le32_to_cpu(bssid->length); |
@@ -2041,7 +2067,7 @@ static void rndis_get_scan_results(struct work_struct *work) | |||
2041 | if (!priv->scan_request) | 2067 | if (!priv->scan_request) |
2042 | return; | 2068 | return; |
2043 | 2069 | ||
2044 | ret = rndis_check_bssid_list(usbdev); | 2070 | ret = rndis_check_bssid_list(usbdev, NULL, NULL); |
2045 | 2071 | ||
2046 | cfg80211_scan_done(priv->scan_request, ret < 0); | 2072 | cfg80211_scan_done(priv->scan_request, ret < 0); |
2047 | 2073 | ||
@@ -2495,6 +2521,91 @@ static int rndis_flush_pmksa(struct wiphy *wiphy, struct net_device *netdev) | |||
2495 | return rndis_set_oid(usbdev, OID_802_11_PMKID, &pmkid, sizeof(pmkid)); | 2521 | return rndis_set_oid(usbdev, OID_802_11_PMKID, &pmkid, sizeof(pmkid)); |
2496 | } | 2522 | } |
2497 | 2523 | ||
2524 | static void rndis_wlan_craft_connected_bss(struct usbnet *usbdev, u8 *bssid, | ||
2525 | struct ndis_80211_assoc_info *info) | ||
2526 | { | ||
2527 | struct rndis_wlan_private *priv = get_rndis_wlan_priv(usbdev); | ||
2528 | struct ieee80211_channel *channel; | ||
2529 | struct ndis_80211_conf config; | ||
2530 | struct ndis_80211_ssid ssid; | ||
2531 | s32 signal; | ||
2532 | u64 timestamp; | ||
2533 | u16 capability; | ||
2534 | u16 beacon_interval; | ||
2535 | __le32 rssi; | ||
2536 | u8 ie_buf[34]; | ||
2537 | int len, ret, ie_len; | ||
2538 | |||
2539 | /* Get signal quality, in case of error use rssi=0 and ignore error. */ | ||
2540 | len = sizeof(rssi); | ||
2541 | rssi = 0; | ||
2542 | ret = rndis_query_oid(usbdev, OID_802_11_RSSI, &rssi, &len); | ||
2543 | signal = level_to_qual(le32_to_cpu(rssi)); | ||
2544 | |||
2545 | netdev_dbg(usbdev->net, "%s(): OID_802_11_RSSI -> %d, " | ||
2546 | "rssi:%d, qual: %d\n", __func__, ret, le32_to_cpu(rssi), | ||
2547 | level_to_qual(le32_to_cpu(rssi))); | ||
2548 | |||
2549 | /* Get AP capabilities */ | ||
2550 | if (info) { | ||
2551 | capability = le16_to_cpu(info->resp_ie.capa); | ||
2552 | } else { | ||
2553 | /* Set atleast ESS/IBSS capability */ | ||
2554 | capability = (priv->infra_mode == NDIS_80211_INFRA_INFRA) ? | ||
2555 | WLAN_CAPABILITY_ESS : WLAN_CAPABILITY_IBSS; | ||
2556 | } | ||
2557 | |||
2558 | /* Get channel and beacon interval */ | ||
2559 | len = sizeof(config); | ||
2560 | ret = rndis_query_oid(usbdev, OID_802_11_CONFIGURATION, &config, &len); | ||
2561 | netdev_dbg(usbdev->net, "%s(): OID_802_11_CONFIGURATION -> %d\n", | ||
2562 | __func__, ret); | ||
2563 | if (ret >= 0) { | ||
2564 | beacon_interval = le16_to_cpu(config.beacon_period); | ||
2565 | channel = ieee80211_get_channel(priv->wdev.wiphy, | ||
2566 | KHZ_TO_MHZ(le32_to_cpu(config.ds_config))); | ||
2567 | if (!channel) { | ||
2568 | netdev_warn(usbdev->net, "%s(): could not get channel." | ||
2569 | "\n", __func__); | ||
2570 | return; | ||
2571 | } | ||
2572 | } else { | ||
2573 | netdev_warn(usbdev->net, "%s(): could not get configuration.\n", | ||
2574 | __func__); | ||
2575 | return; | ||
2576 | } | ||
2577 | |||
2578 | /* Get SSID, in case of error, use zero length SSID and ignore error. */ | ||
2579 | len = sizeof(ssid); | ||
2580 | memset(&ssid, 0, sizeof(ssid)); | ||
2581 | ret = rndis_query_oid(usbdev, OID_802_11_SSID, &ssid, &len); | ||
2582 | netdev_dbg(usbdev->net, "%s(): OID_802_11_SSID -> %d, len: %d, ssid: " | ||
2583 | "'%.32s'\n", __func__, ret, | ||
2584 | le32_to_cpu(ssid.length), ssid.essid); | ||
2585 | |||
2586 | if (le32_to_cpu(ssid.length) > 32) | ||
2587 | ssid.length = cpu_to_le32(32); | ||
2588 | |||
2589 | ie_buf[0] = WLAN_EID_SSID; | ||
2590 | ie_buf[1] = le32_to_cpu(ssid.length); | ||
2591 | memcpy(&ie_buf[2], ssid.essid, le32_to_cpu(ssid.length)); | ||
2592 | |||
2593 | ie_len = le32_to_cpu(ssid.length) + 2; | ||
2594 | |||
2595 | /* no tsf */ | ||
2596 | timestamp = 0; | ||
2597 | |||
2598 | netdev_dbg(usbdev->net, "%s(): channel:%d(freq), bssid:[%pM], tsf:%d, " | ||
2599 | "capa:%x, beacon int:%d, resp_ie(len:%d, essid:'%.32s'), " | ||
2600 | "signal:%d\n", __func__, (channel ? channel->center_freq : -1), | ||
2601 | bssid, (u32)timestamp, capability, beacon_interval, ie_len, | ||
2602 | ssid.essid, signal); | ||
2603 | |||
2604 | cfg80211_inform_bss(priv->wdev.wiphy, channel, bssid, | ||
2605 | timestamp, capability, beacon_interval, ie_buf, ie_len, | ||
2606 | signal, GFP_KERNEL); | ||
2607 | } | ||
2608 | |||
2498 | /* | 2609 | /* |
2499 | * workers, indication handlers, device poller | 2610 | * workers, indication handlers, device poller |
2500 | */ | 2611 | */ |
@@ -2507,6 +2618,7 @@ static void rndis_wlan_do_link_up_work(struct usbnet *usbdev) | |||
2507 | u8 *req_ie, *resp_ie; | 2618 | u8 *req_ie, *resp_ie; |
2508 | int ret, offset; | 2619 | int ret, offset; |
2509 | bool roamed = false; | 2620 | bool roamed = false; |
2621 | bool match_bss; | ||
2510 | 2622 | ||
2511 | if (priv->infra_mode == NDIS_80211_INFRA_INFRA && priv->connected) { | 2623 | if (priv->infra_mode == NDIS_80211_INFRA_INFRA && priv->connected) { |
2512 | /* received media connect indication while connected, either | 2624 | /* received media connect indication while connected, either |
@@ -2558,6 +2670,13 @@ static void rndis_wlan_do_link_up_work(struct usbnet *usbdev) | |||
2558 | resp_ie_len = | 2670 | resp_ie_len = |
2559 | CONTROL_BUFFER_SIZE - offset; | 2671 | CONTROL_BUFFER_SIZE - offset; |
2560 | } | 2672 | } |
2673 | } else { | ||
2674 | /* Since rndis_wlan_craft_connected_bss() might use info | ||
2675 | * later and expects info to contain valid data if | ||
2676 | * non-null, free info and set NULL here. | ||
2677 | */ | ||
2678 | kfree(info); | ||
2679 | info = NULL; | ||
2561 | } | 2680 | } |
2562 | } else if (WARN_ON(priv->infra_mode != NDIS_80211_INFRA_ADHOC)) | 2681 | } else if (WARN_ON(priv->infra_mode != NDIS_80211_INFRA_ADHOC)) |
2563 | return; | 2682 | return; |
@@ -2569,13 +2688,26 @@ static void rndis_wlan_do_link_up_work(struct usbnet *usbdev) | |||
2569 | netdev_dbg(usbdev->net, "link up work: [%pM]%s\n", | 2688 | netdev_dbg(usbdev->net, "link up work: [%pM]%s\n", |
2570 | bssid, roamed ? " roamed" : ""); | 2689 | bssid, roamed ? " roamed" : ""); |
2571 | 2690 | ||
2572 | /* Internal bss list in device always contains at least the currently | 2691 | /* Internal bss list in device should contain at least the currently |
2573 | * connected bss and we can get it to cfg80211 with | 2692 | * connected bss and we can get it to cfg80211 with |
2574 | * rndis_check_bssid_list(). | 2693 | * rndis_check_bssid_list(). |
2575 | * NOTE: This is true for Broadcom chip, but not mentioned in RNDIS | 2694 | * |
2576 | * spec. | 2695 | * NDIS spec says: "If the device is associated, but the associated |
2696 | * BSSID is not in its BSSID scan list, then the driver must add an | ||
2697 | * entry for the BSSID at the end of the data that it returns in | ||
2698 | * response to query of OID_802_11_BSSID_LIST." | ||
2699 | * | ||
2700 | * NOTE: Seems to be true for BCM4320b variant, but not BCM4320a. | ||
2577 | */ | 2701 | */ |
2578 | rndis_check_bssid_list(usbdev); | 2702 | match_bss = false; |
2703 | rndis_check_bssid_list(usbdev, bssid, &match_bss); | ||
2704 | |||
2705 | if (!is_zero_ether_addr(bssid) && !match_bss) { | ||
2706 | /* Couldn't get bss from device, we need to manually craft bss | ||
2707 | * for cfg80211. | ||
2708 | */ | ||
2709 | rndis_wlan_craft_connected_bss(usbdev, bssid, info); | ||
2710 | } | ||
2579 | 2711 | ||
2580 | if (priv->infra_mode == NDIS_80211_INFRA_INFRA) { | 2712 | if (priv->infra_mode == NDIS_80211_INFRA_INFRA) { |
2581 | if (!roamed) | 2713 | if (!roamed) |
@@ -2934,8 +3066,21 @@ static void rndis_device_poller(struct work_struct *work) | |||
2934 | * also polls device with rndis_command() and catches for media link | 3066 | * also polls device with rndis_command() and catches for media link |
2935 | * indications. | 3067 | * indications. |
2936 | */ | 3068 | */ |
2937 | if (!is_associated(usbdev)) | 3069 | if (!is_associated(usbdev)) { |
3070 | /* Workaround bad scanning in BCM4320a devices with active | ||
3071 | * background scanning when not associated. | ||
3072 | */ | ||
3073 | if (priv->device_type == RNDIS_BCM4320A && priv->radio_on && | ||
3074 | !priv->scan_request) { | ||
3075 | /* Get previous scan results */ | ||
3076 | rndis_check_bssid_list(usbdev, NULL, NULL); | ||
3077 | |||
3078 | /* Initiate new scan */ | ||
3079 | rndis_start_bssid_list_scan(usbdev); | ||
3080 | } | ||
3081 | |||
2938 | goto end; | 3082 | goto end; |
3083 | } | ||
2939 | 3084 | ||
2940 | len = sizeof(rssi); | 3085 | len = sizeof(rssi); |
2941 | ret = rndis_query_oid(usbdev, OID_802_11_RSSI, &rssi, &len); | 3086 | ret = rndis_query_oid(usbdev, OID_802_11_RSSI, &rssi, &len); |
@@ -2992,10 +3137,12 @@ end: | |||
2992 | /* | 3137 | /* |
2993 | * driver/device initialization | 3138 | * driver/device initialization |
2994 | */ | 3139 | */ |
2995 | static void rndis_copy_module_params(struct usbnet *usbdev) | 3140 | static void rndis_copy_module_params(struct usbnet *usbdev, int device_type) |
2996 | { | 3141 | { |
2997 | struct rndis_wlan_private *priv = get_rndis_wlan_priv(usbdev); | 3142 | struct rndis_wlan_private *priv = get_rndis_wlan_priv(usbdev); |
2998 | 3143 | ||
3144 | priv->device_type = device_type; | ||
3145 | |||
2999 | priv->param_country[0] = modparam_country[0]; | 3146 | priv->param_country[0] = modparam_country[0]; |
3000 | priv->param_country[1] = modparam_country[1]; | 3147 | priv->param_country[1] = modparam_country[1]; |
3001 | priv->param_country[2] = 0; | 3148 | priv->param_country[2] = 0; |
@@ -3038,12 +3185,25 @@ static void rndis_copy_module_params(struct usbnet *usbdev) | |||
3038 | priv->param_workaround_interval = modparam_workaround_interval; | 3185 | priv->param_workaround_interval = modparam_workaround_interval; |
3039 | } | 3186 | } |
3040 | 3187 | ||
3188 | static int unknown_early_init(struct usbnet *usbdev) | ||
3189 | { | ||
3190 | /* copy module parameters for unknown so that iwconfig reports txpower | ||
3191 | * and workaround parameter is copied to private structure correctly. | ||
3192 | */ | ||
3193 | rndis_copy_module_params(usbdev, RNDIS_UNKNOWN); | ||
3194 | |||
3195 | /* This is unknown device, so do not try set configuration parameters. | ||
3196 | */ | ||
3197 | |||
3198 | return 0; | ||
3199 | } | ||
3200 | |||
3041 | static int bcm4320a_early_init(struct usbnet *usbdev) | 3201 | static int bcm4320a_early_init(struct usbnet *usbdev) |
3042 | { | 3202 | { |
3043 | /* copy module parameters for bcm4320a so that iwconfig reports txpower | 3203 | /* copy module parameters for bcm4320a so that iwconfig reports txpower |
3044 | * and workaround parameter is copied to private structure correctly. | 3204 | * and workaround parameter is copied to private structure correctly. |
3045 | */ | 3205 | */ |
3046 | rndis_copy_module_params(usbdev); | 3206 | rndis_copy_module_params(usbdev, RNDIS_BCM4320A); |
3047 | 3207 | ||
3048 | /* bcm4320a doesn't handle configuration parameters well. Try | 3208 | /* bcm4320a doesn't handle configuration parameters well. Try |
3049 | * set any and you get partially zeroed mac and broken device. | 3209 | * set any and you get partially zeroed mac and broken device. |
@@ -3057,7 +3217,7 @@ static int bcm4320b_early_init(struct usbnet *usbdev) | |||
3057 | struct rndis_wlan_private *priv = get_rndis_wlan_priv(usbdev); | 3217 | struct rndis_wlan_private *priv = get_rndis_wlan_priv(usbdev); |
3058 | char buf[8]; | 3218 | char buf[8]; |
3059 | 3219 | ||
3060 | rndis_copy_module_params(usbdev); | 3220 | rndis_copy_module_params(usbdev, RNDIS_BCM4320B); |
3061 | 3221 | ||
3062 | /* Early initialization settings, setting these won't have effect | 3222 | /* Early initialization settings, setting these won't have effect |
3063 | * if called after generic_rndis_bind(). | 3223 | * if called after generic_rndis_bind(). |
@@ -3320,7 +3480,7 @@ static const struct driver_info rndis_wlan_info = { | |||
3320 | .tx_fixup = rndis_tx_fixup, | 3480 | .tx_fixup = rndis_tx_fixup, |
3321 | .reset = rndis_wlan_reset, | 3481 | .reset = rndis_wlan_reset, |
3322 | .stop = rndis_wlan_stop, | 3482 | .stop = rndis_wlan_stop, |
3323 | .early_init = bcm4320a_early_init, | 3483 | .early_init = unknown_early_init, |
3324 | .indication = rndis_wlan_indication, | 3484 | .indication = rndis_wlan_indication, |
3325 | }; | 3485 | }; |
3326 | 3486 | ||
diff --git a/drivers/net/wireless/rt2x00/Kconfig b/drivers/net/wireless/rt2x00/Kconfig index 4396d4b9bfb9..6f383cd684b0 100644 --- a/drivers/net/wireless/rt2x00/Kconfig +++ b/drivers/net/wireless/rt2x00/Kconfig | |||
@@ -53,51 +53,41 @@ config RT61PCI | |||
53 | 53 | ||
54 | When compiled as a module, this driver will be called rt61pci. | 54 | When compiled as a module, this driver will be called rt61pci. |
55 | 55 | ||
56 | config RT2800PCI_PCI | ||
57 | boolean | ||
58 | depends on PCI | ||
59 | default y | ||
60 | |||
61 | config RT2800PCI_SOC | ||
62 | boolean | ||
63 | depends on RALINK_RT288X || RALINK_RT305X | ||
64 | default y | ||
65 | |||
66 | config RT2800PCI | 56 | config RT2800PCI |
67 | tristate "Ralink rt28xx/rt30xx/rt35xx (PCI/PCIe/PCMCIA) support (EXPERIMENTAL)" | 57 | tristate "Ralink rt27xx/rt28xx/rt30xx (PCI/PCIe/PCMCIA) support" |
68 | depends on (RT2800PCI_PCI || RT2800PCI_SOC) && EXPERIMENTAL | 58 | depends on PCI || RALINK_RT288X || RALINK_RT305X |
69 | select RT2800_LIB | 59 | select RT2800_LIB |
70 | select RT2X00_LIB_PCI if RT2800PCI_PCI | 60 | select RT2X00_LIB_PCI if PCI |
71 | select RT2X00_LIB_SOC if RT2800PCI_SOC | 61 | select RT2X00_LIB_SOC if RALINK_RT288X || RALINK_RT305X |
72 | select RT2X00_LIB_HT | 62 | select RT2X00_LIB_HT |
73 | select RT2X00_LIB_FIRMWARE | 63 | select RT2X00_LIB_FIRMWARE |
74 | select RT2X00_LIB_CRYPTO | 64 | select RT2X00_LIB_CRYPTO |
75 | select CRC_CCITT | 65 | select CRC_CCITT |
76 | select EEPROM_93CX6 | 66 | select EEPROM_93CX6 |
77 | ---help--- | 67 | ---help--- |
78 | This adds support for rt2800/rt3000/rt3500 wireless chipset family. | 68 | This adds support for rt27xx/rt28xx/rt30xx wireless chipset family. |
79 | Supported chips: RT2760, RT2790, RT2860, RT2880, RT2890 & RT3052 | 69 | Supported chips: RT2760, RT2790, RT2860, RT2880, RT2890, RT3052, |
80 | 70 | RT3090, RT3091 & RT3092 | |
81 | This driver is non-functional at the moment and is intended for | ||
82 | developers. | ||
83 | 71 | ||
84 | When compiled as a module, this driver will be called "rt2800pci.ko". | 72 | When compiled as a module, this driver will be called "rt2800pci.ko". |
85 | 73 | ||
86 | if RT2800PCI | 74 | if RT2800PCI |
87 | 75 | ||
88 | config RT2800PCI_RT30XX | 76 | config RT2800PCI_RT33XX |
89 | bool "rt2800pci - Include support for rt30xx (PCI/PCIe/PCMCIA) devices" | 77 | bool "rt2800pci - Include support for rt33xx devices (EXPERIMENTAL)" |
90 | default y | 78 | depends on EXPERIMENTAL |
79 | default n | ||
91 | ---help--- | 80 | ---help--- |
92 | This adds support for rt30xx wireless chipset family to the | 81 | This adds support for rt33xx wireless chipset family to the |
93 | rt2800pci driver. | 82 | rt2800pci driver. |
94 | Supported chips: RT3090, RT3091 & RT3092 | 83 | Supported chips: RT3390 |
95 | 84 | ||
96 | Support for these devices is non-functional at the moment and is | 85 | Support for these devices is non-functional at the moment and is |
97 | intended for testers and developers. | 86 | intended for testers and developers. |
98 | 87 | ||
99 | config RT2800PCI_RT35XX | 88 | config RT2800PCI_RT35XX |
100 | bool "rt2800pci - Include support for rt35xx (PCI/PCIe/PCMCIA) devices" | 89 | bool "rt2800pci - Include support for rt35xx devices (EXPERIMENTAL)" |
90 | depends on EXPERIMENTAL | ||
101 | default n | 91 | default n |
102 | ---help--- | 92 | ---help--- |
103 | This adds support for rt35xx wireless chipset family to the | 93 | This adds support for rt35xx wireless chipset family to the |
@@ -134,8 +124,8 @@ config RT73USB | |||
134 | When compiled as a module, this driver will be called rt73usb. | 124 | When compiled as a module, this driver will be called rt73usb. |
135 | 125 | ||
136 | config RT2800USB | 126 | config RT2800USB |
137 | tristate "Ralink rt2800 (USB) support (EXPERIMENTAL)" | 127 | tristate "Ralink rt27xx/rt28xx/rt30xx (USB) support" |
138 | depends on USB && EXPERIMENTAL | 128 | depends on USB |
139 | select RT2800_LIB | 129 | select RT2800_LIB |
140 | select RT2X00_LIB_USB | 130 | select RT2X00_LIB_USB |
141 | select RT2X00_LIB_HT | 131 | select RT2X00_LIB_HT |
@@ -143,30 +133,28 @@ config RT2800USB | |||
143 | select RT2X00_LIB_CRYPTO | 133 | select RT2X00_LIB_CRYPTO |
144 | select CRC_CCITT | 134 | select CRC_CCITT |
145 | ---help--- | 135 | ---help--- |
146 | This adds experimental support for rt2800 wireless chipset family. | 136 | This adds support for rt27xx/rt28xx/rt30xx wireless chipset family. |
147 | Supported chips: RT2770, RT2870 & RT3070. | 137 | Supported chips: RT2770, RT2870 & RT3070, RT3071 & RT3072 |
148 | |||
149 | Known issues: | ||
150 | - support for RT2870 chips doesn't work with 802.11n APs yet | ||
151 | - support for RT3070 chips is non-functional at the moment | ||
152 | 138 | ||
153 | When compiled as a module, this driver will be called "rt2800usb.ko". | 139 | When compiled as a module, this driver will be called "rt2800usb.ko". |
154 | 140 | ||
155 | if RT2800USB | 141 | if RT2800USB |
156 | 142 | ||
157 | config RT2800USB_RT30XX | 143 | config RT2800USB_RT33XX |
158 | bool "rt2800usb - Include support for rt30xx (USB) devices" | 144 | bool "rt2800usb - Include support for rt33xx devices (EXPERIMENTAL)" |
159 | default y | 145 | depends on EXPERIMENTAL |
146 | default n | ||
160 | ---help--- | 147 | ---help--- |
161 | This adds support for rt30xx wireless chipset family to the | 148 | This adds support for rt33xx wireless chipset family to the |
162 | rt2800usb driver. | 149 | rt2800usb driver. |
163 | Supported chips: RT3070, RT3071 & RT3072 | 150 | Supported chips: RT3370 |
164 | 151 | ||
165 | Support for these devices is non-functional at the moment and is | 152 | Support for these devices is non-functional at the moment and is |
166 | intended for testers and developers. | 153 | intended for testers and developers. |
167 | 154 | ||
168 | config RT2800USB_RT35XX | 155 | config RT2800USB_RT35XX |
169 | bool "rt2800usb - Include support for rt35xx (USB) devices" | 156 | bool "rt2800usb - Include support for rt35xx devices (EXPERIMENTAL)" |
157 | depends on EXPERIMENTAL | ||
170 | default n | 158 | default n |
171 | ---help--- | 159 | ---help--- |
172 | This adds support for rt35xx wireless chipset family to the | 160 | This adds support for rt35xx wireless chipset family to the |
@@ -180,9 +168,9 @@ config RT2800USB_UNKNOWN | |||
180 | bool "rt2800usb - Include support for unknown (USB) devices" | 168 | bool "rt2800usb - Include support for unknown (USB) devices" |
181 | default n | 169 | default n |
182 | ---help--- | 170 | ---help--- |
183 | This adds support for rt2800 family devices that are known to | 171 | This adds support for rt2800usb devices that are known to |
184 | have a rt2800 family chipset, but for which the exact chipset | 172 | have a rt28xx family compatible chipset, but for which the exact |
185 | is unknown. | 173 | chipset is unknown. |
186 | 174 | ||
187 | Support status for these devices is unknown, and enabling these | 175 | Support status for these devices is unknown, and enabling these |
188 | devices may or may not work. | 176 | devices may or may not work. |
diff --git a/drivers/net/wireless/rt2x00/rt2800.h b/drivers/net/wireless/rt2x00/rt2800.h index 002224c9bb62..a81c4371835b 100644 --- a/drivers/net/wireless/rt2x00/rt2800.h +++ b/drivers/net/wireless/rt2x00/rt2800.h | |||
@@ -47,6 +47,7 @@ | |||
47 | * RF3021 2.4G 1T2R | 47 | * RF3021 2.4G 1T2R |
48 | * RF3022 2.4G 2T2R | 48 | * RF3022 2.4G 2T2R |
49 | * RF3052 2.4G 2T2R | 49 | * RF3052 2.4G 2T2R |
50 | * RF3320 2.4G 1T1R | ||
50 | */ | 51 | */ |
51 | #define RF2820 0x0001 | 52 | #define RF2820 0x0001 |
52 | #define RF2850 0x0002 | 53 | #define RF2850 0x0002 |
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c index b5d2ebab6ea8..75631614aba3 100644 --- a/drivers/net/wireless/rt2x00/rt2800lib.c +++ b/drivers/net/wireless/rt2x00/rt2800lib.c | |||
@@ -1544,7 +1544,8 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev, | |||
1544 | rt2x00_rf(rt2x00dev, RF3020) || | 1544 | rt2x00_rf(rt2x00dev, RF3020) || |
1545 | rt2x00_rf(rt2x00dev, RF3021) || | 1545 | rt2x00_rf(rt2x00dev, RF3021) || |
1546 | rt2x00_rf(rt2x00dev, RF3022) || | 1546 | rt2x00_rf(rt2x00dev, RF3022) || |
1547 | rt2x00_rf(rt2x00dev, RF3052)) | 1547 | rt2x00_rf(rt2x00dev, RF3052) || |
1548 | rt2x00_rf(rt2x00dev, RF3320)) | ||
1548 | rt2800_config_channel_rf3xxx(rt2x00dev, conf, rf, info); | 1549 | rt2800_config_channel_rf3xxx(rt2x00dev, conf, rf, info); |
1549 | else | 1550 | else |
1550 | rt2800_config_channel_rf2xxx(rt2x00dev, conf, rf, info); | 1551 | rt2800_config_channel_rf2xxx(rt2x00dev, conf, rf, info); |
@@ -2165,7 +2166,7 @@ static int rt2800_init_registers(struct rt2x00_dev *rt2x00dev) | |||
2165 | SHARED_KEY_MODE_ENTRY(i), 0); | 2166 | SHARED_KEY_MODE_ENTRY(i), 0); |
2166 | 2167 | ||
2167 | for (i = 0; i < 256; i++) { | 2168 | for (i = 0; i < 256; i++) { |
2168 | u32 wcid[2] = { 0xffffffff, 0x00ffffff }; | 2169 | static const u32 wcid[2] = { 0xffffffff, 0x00ffffff }; |
2169 | rt2800_register_multiwrite(rt2x00dev, MAC_WCID_ENTRY(i), | 2170 | rt2800_register_multiwrite(rt2x00dev, MAC_WCID_ENTRY(i), |
2170 | wcid, sizeof(wcid)); | 2171 | wcid, sizeof(wcid)); |
2171 | 2172 | ||
@@ -3012,7 +3013,8 @@ int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev) | |||
3012 | !rt2x00_rf(rt2x00dev, RF2020) && | 3013 | !rt2x00_rf(rt2x00dev, RF2020) && |
3013 | !rt2x00_rf(rt2x00dev, RF3021) && | 3014 | !rt2x00_rf(rt2x00dev, RF3021) && |
3014 | !rt2x00_rf(rt2x00dev, RF3022) && | 3015 | !rt2x00_rf(rt2x00dev, RF3022) && |
3015 | !rt2x00_rf(rt2x00dev, RF3052)) { | 3016 | !rt2x00_rf(rt2x00dev, RF3052) && |
3017 | !rt2x00_rf(rt2x00dev, RF3320)) { | ||
3016 | ERROR(rt2x00dev, "Invalid RF chipset detected.\n"); | 3018 | ERROR(rt2x00dev, "Invalid RF chipset detected.\n"); |
3017 | return -ENODEV; | 3019 | return -ENODEV; |
3018 | } | 3020 | } |
@@ -3276,7 +3278,8 @@ int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev) | |||
3276 | } else if (rt2x00_rf(rt2x00dev, RF3020) || | 3278 | } else if (rt2x00_rf(rt2x00dev, RF3020) || |
3277 | rt2x00_rf(rt2x00dev, RF2020) || | 3279 | rt2x00_rf(rt2x00dev, RF2020) || |
3278 | rt2x00_rf(rt2x00dev, RF3021) || | 3280 | rt2x00_rf(rt2x00dev, RF3021) || |
3279 | rt2x00_rf(rt2x00dev, RF3022)) { | 3281 | rt2x00_rf(rt2x00dev, RF3022) || |
3282 | rt2x00_rf(rt2x00dev, RF3320)) { | ||
3280 | spec->num_channels = 14; | 3283 | spec->num_channels = 14; |
3281 | spec->channels = rf_vals_3x; | 3284 | spec->channels = rf_vals_3x; |
3282 | } else if (rt2x00_rf(rt2x00dev, RF3052)) { | 3285 | } else if (rt2x00_rf(rt2x00dev, RF3052)) { |
diff --git a/drivers/net/wireless/rt2x00/rt2800pci.c b/drivers/net/wireless/rt2x00/rt2800pci.c index 5f3a018c088d..433c7f3ef837 100644 --- a/drivers/net/wireless/rt2x00/rt2800pci.c +++ b/drivers/net/wireless/rt2x00/rt2800pci.c | |||
@@ -84,20 +84,22 @@ static void rt2800pci_mcu_status(struct rt2x00_dev *rt2x00dev, const u8 token) | |||
84 | rt2800_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0); | 84 | rt2800_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0); |
85 | } | 85 | } |
86 | 86 | ||
87 | #ifdef CONFIG_RT2800PCI_SOC | 87 | #if defined(CONFIG_RALINK_RT288X) || defined(CONFIG_RALINK_RT305X) |
88 | static void rt2800pci_read_eeprom_soc(struct rt2x00_dev *rt2x00dev) | 88 | static void rt2800pci_read_eeprom_soc(struct rt2x00_dev *rt2x00dev) |
89 | { | 89 | { |
90 | u32 *base_addr = (u32 *) KSEG1ADDR(0x1F040000); /* XXX for RT3052 */ | 90 | void __iomem *base_addr = ioremap(0x1F040000, EEPROM_SIZE); |
91 | 91 | ||
92 | memcpy_fromio(rt2x00dev->eeprom, base_addr, EEPROM_SIZE); | 92 | memcpy_fromio(rt2x00dev->eeprom, base_addr, EEPROM_SIZE); |
93 | |||
94 | iounmap(base_addr); | ||
93 | } | 95 | } |
94 | #else | 96 | #else |
95 | static inline void rt2800pci_read_eeprom_soc(struct rt2x00_dev *rt2x00dev) | 97 | static inline void rt2800pci_read_eeprom_soc(struct rt2x00_dev *rt2x00dev) |
96 | { | 98 | { |
97 | } | 99 | } |
98 | #endif /* CONFIG_RT2800PCI_SOC */ | 100 | #endif /* CONFIG_RALINK_RT288X || CONFIG_RALINK_RT305X */ |
99 | 101 | ||
100 | #ifdef CONFIG_RT2800PCI_PCI | 102 | #ifdef CONFIG_PCI |
101 | static void rt2800pci_eepromregister_read(struct eeprom_93cx6 *eeprom) | 103 | static void rt2800pci_eepromregister_read(struct eeprom_93cx6 *eeprom) |
102 | { | 104 | { |
103 | struct rt2x00_dev *rt2x00dev = eeprom->data; | 105 | struct rt2x00_dev *rt2x00dev = eeprom->data; |
@@ -181,7 +183,7 @@ static inline int rt2800pci_efuse_detect(struct rt2x00_dev *rt2x00dev) | |||
181 | static inline void rt2800pci_read_eeprom_efuse(struct rt2x00_dev *rt2x00dev) | 183 | static inline void rt2800pci_read_eeprom_efuse(struct rt2x00_dev *rt2x00dev) |
182 | { | 184 | { |
183 | } | 185 | } |
184 | #endif /* CONFIG_RT2800PCI_PCI */ | 186 | #endif /* CONFIG_PCI */ |
185 | 187 | ||
186 | /* | 188 | /* |
187 | * Firmware functions | 189 | * Firmware functions |
@@ -1031,12 +1033,15 @@ static const struct rt2x00_ops rt2800pci_ops = { | |||
1031 | /* | 1033 | /* |
1032 | * RT2800pci module information. | 1034 | * RT2800pci module information. |
1033 | */ | 1035 | */ |
1034 | #ifdef CONFIG_RT2800PCI_PCI | 1036 | #ifdef CONFIG_PCI |
1035 | static DEFINE_PCI_DEVICE_TABLE(rt2800pci_device_table) = { | 1037 | static DEFINE_PCI_DEVICE_TABLE(rt2800pci_device_table) = { |
1036 | { PCI_DEVICE(0x1814, 0x0601), PCI_DEVICE_DATA(&rt2800pci_ops) }, | 1038 | { PCI_DEVICE(0x1814, 0x0601), PCI_DEVICE_DATA(&rt2800pci_ops) }, |
1037 | { PCI_DEVICE(0x1814, 0x0681), PCI_DEVICE_DATA(&rt2800pci_ops) }, | 1039 | { PCI_DEVICE(0x1814, 0x0681), PCI_DEVICE_DATA(&rt2800pci_ops) }, |
1038 | { PCI_DEVICE(0x1814, 0x0701), PCI_DEVICE_DATA(&rt2800pci_ops) }, | 1040 | { PCI_DEVICE(0x1814, 0x0701), PCI_DEVICE_DATA(&rt2800pci_ops) }, |
1039 | { PCI_DEVICE(0x1814, 0x0781), PCI_DEVICE_DATA(&rt2800pci_ops) }, | 1041 | { PCI_DEVICE(0x1814, 0x0781), PCI_DEVICE_DATA(&rt2800pci_ops) }, |
1042 | { PCI_DEVICE(0x1814, 0x3090), PCI_DEVICE_DATA(&rt2800pci_ops) }, | ||
1043 | { PCI_DEVICE(0x1814, 0x3091), PCI_DEVICE_DATA(&rt2800pci_ops) }, | ||
1044 | { PCI_DEVICE(0x1814, 0x3092), PCI_DEVICE_DATA(&rt2800pci_ops) }, | ||
1040 | { PCI_DEVICE(0x1432, 0x7708), PCI_DEVICE_DATA(&rt2800pci_ops) }, | 1045 | { PCI_DEVICE(0x1432, 0x7708), PCI_DEVICE_DATA(&rt2800pci_ops) }, |
1041 | { PCI_DEVICE(0x1432, 0x7727), PCI_DEVICE_DATA(&rt2800pci_ops) }, | 1046 | { PCI_DEVICE(0x1432, 0x7727), PCI_DEVICE_DATA(&rt2800pci_ops) }, |
1042 | { PCI_DEVICE(0x1432, 0x7728), PCI_DEVICE_DATA(&rt2800pci_ops) }, | 1047 | { PCI_DEVICE(0x1432, 0x7728), PCI_DEVICE_DATA(&rt2800pci_ops) }, |
@@ -1044,12 +1049,10 @@ static DEFINE_PCI_DEVICE_TABLE(rt2800pci_device_table) = { | |||
1044 | { PCI_DEVICE(0x1432, 0x7748), PCI_DEVICE_DATA(&rt2800pci_ops) }, | 1049 | { PCI_DEVICE(0x1432, 0x7748), PCI_DEVICE_DATA(&rt2800pci_ops) }, |
1045 | { PCI_DEVICE(0x1432, 0x7758), PCI_DEVICE_DATA(&rt2800pci_ops) }, | 1050 | { PCI_DEVICE(0x1432, 0x7758), PCI_DEVICE_DATA(&rt2800pci_ops) }, |
1046 | { PCI_DEVICE(0x1432, 0x7768), PCI_DEVICE_DATA(&rt2800pci_ops) }, | 1051 | { PCI_DEVICE(0x1432, 0x7768), PCI_DEVICE_DATA(&rt2800pci_ops) }, |
1047 | { PCI_DEVICE(0x1a3b, 0x1059), PCI_DEVICE_DATA(&rt2800pci_ops) }, | ||
1048 | #ifdef CONFIG_RT2800PCI_RT30XX | ||
1049 | { PCI_DEVICE(0x1814, 0x3090), PCI_DEVICE_DATA(&rt2800pci_ops) }, | ||
1050 | { PCI_DEVICE(0x1814, 0x3091), PCI_DEVICE_DATA(&rt2800pci_ops) }, | ||
1051 | { PCI_DEVICE(0x1814, 0x3092), PCI_DEVICE_DATA(&rt2800pci_ops) }, | ||
1052 | { PCI_DEVICE(0x1462, 0x891a), PCI_DEVICE_DATA(&rt2800pci_ops) }, | 1052 | { PCI_DEVICE(0x1462, 0x891a), PCI_DEVICE_DATA(&rt2800pci_ops) }, |
1053 | { PCI_DEVICE(0x1a3b, 0x1059), PCI_DEVICE_DATA(&rt2800pci_ops) }, | ||
1054 | #ifdef CONFIG_RT2800PCI_RT33XX | ||
1055 | { PCI_DEVICE(0x1814, 0x3390), PCI_DEVICE_DATA(&rt2800pci_ops) }, | ||
1053 | #endif | 1056 | #endif |
1054 | #ifdef CONFIG_RT2800PCI_RT35XX | 1057 | #ifdef CONFIG_RT2800PCI_RT35XX |
1055 | { PCI_DEVICE(0x1814, 0x3060), PCI_DEVICE_DATA(&rt2800pci_ops) }, | 1058 | { PCI_DEVICE(0x1814, 0x3060), PCI_DEVICE_DATA(&rt2800pci_ops) }, |
@@ -1060,19 +1063,19 @@ static DEFINE_PCI_DEVICE_TABLE(rt2800pci_device_table) = { | |||
1060 | #endif | 1063 | #endif |
1061 | { 0, } | 1064 | { 0, } |
1062 | }; | 1065 | }; |
1063 | #endif /* CONFIG_RT2800PCI_PCI */ | 1066 | #endif /* CONFIG_PCI */ |
1064 | 1067 | ||
1065 | MODULE_AUTHOR(DRV_PROJECT); | 1068 | MODULE_AUTHOR(DRV_PROJECT); |
1066 | MODULE_VERSION(DRV_VERSION); | 1069 | MODULE_VERSION(DRV_VERSION); |
1067 | MODULE_DESCRIPTION("Ralink RT2800 PCI & PCMCIA Wireless LAN driver."); | 1070 | MODULE_DESCRIPTION("Ralink RT2800 PCI & PCMCIA Wireless LAN driver."); |
1068 | MODULE_SUPPORTED_DEVICE("Ralink RT2860 PCI & PCMCIA chipset based cards"); | 1071 | MODULE_SUPPORTED_DEVICE("Ralink RT2860 PCI & PCMCIA chipset based cards"); |
1069 | #ifdef CONFIG_RT2800PCI_PCI | 1072 | #ifdef CONFIG_PCI |
1070 | MODULE_FIRMWARE(FIRMWARE_RT2860); | 1073 | MODULE_FIRMWARE(FIRMWARE_RT2860); |
1071 | MODULE_DEVICE_TABLE(pci, rt2800pci_device_table); | 1074 | MODULE_DEVICE_TABLE(pci, rt2800pci_device_table); |
1072 | #endif /* CONFIG_RT2800PCI_PCI */ | 1075 | #endif /* CONFIG_PCI */ |
1073 | MODULE_LICENSE("GPL"); | 1076 | MODULE_LICENSE("GPL"); |
1074 | 1077 | ||
1075 | #ifdef CONFIG_RT2800PCI_SOC | 1078 | #if defined(CONFIG_RALINK_RT288X) || defined(CONFIG_RALINK_RT305X) |
1076 | static int rt2800soc_probe(struct platform_device *pdev) | 1079 | static int rt2800soc_probe(struct platform_device *pdev) |
1077 | { | 1080 | { |
1078 | return rt2x00soc_probe(pdev, &rt2800pci_ops); | 1081 | return rt2x00soc_probe(pdev, &rt2800pci_ops); |
@@ -1089,9 +1092,9 @@ static struct platform_driver rt2800soc_driver = { | |||
1089 | .suspend = rt2x00soc_suspend, | 1092 | .suspend = rt2x00soc_suspend, |
1090 | .resume = rt2x00soc_resume, | 1093 | .resume = rt2x00soc_resume, |
1091 | }; | 1094 | }; |
1092 | #endif /* CONFIG_RT2800PCI_SOC */ | 1095 | #endif /* CONFIG_RALINK_RT288X || CONFIG_RALINK_RT305X */ |
1093 | 1096 | ||
1094 | #ifdef CONFIG_RT2800PCI_PCI | 1097 | #ifdef CONFIG_PCI |
1095 | static struct pci_driver rt2800pci_driver = { | 1098 | static struct pci_driver rt2800pci_driver = { |
1096 | .name = KBUILD_MODNAME, | 1099 | .name = KBUILD_MODNAME, |
1097 | .id_table = rt2800pci_device_table, | 1100 | .id_table = rt2800pci_device_table, |
@@ -1100,21 +1103,21 @@ static struct pci_driver rt2800pci_driver = { | |||
1100 | .suspend = rt2x00pci_suspend, | 1103 | .suspend = rt2x00pci_suspend, |
1101 | .resume = rt2x00pci_resume, | 1104 | .resume = rt2x00pci_resume, |
1102 | }; | 1105 | }; |
1103 | #endif /* CONFIG_RT2800PCI_PCI */ | 1106 | #endif /* CONFIG_PCI */ |
1104 | 1107 | ||
1105 | static int __init rt2800pci_init(void) | 1108 | static int __init rt2800pci_init(void) |
1106 | { | 1109 | { |
1107 | int ret = 0; | 1110 | int ret = 0; |
1108 | 1111 | ||
1109 | #ifdef CONFIG_RT2800PCI_SOC | 1112 | #if defined(CONFIG_RALINK_RT288X) || defined(CONFIG_RALINK_RT305X) |
1110 | ret = platform_driver_register(&rt2800soc_driver); | 1113 | ret = platform_driver_register(&rt2800soc_driver); |
1111 | if (ret) | 1114 | if (ret) |
1112 | return ret; | 1115 | return ret; |
1113 | #endif | 1116 | #endif |
1114 | #ifdef CONFIG_RT2800PCI_PCI | 1117 | #ifdef CONFIG_PCI |
1115 | ret = pci_register_driver(&rt2800pci_driver); | 1118 | ret = pci_register_driver(&rt2800pci_driver); |
1116 | if (ret) { | 1119 | if (ret) { |
1117 | #ifdef CONFIG_RT2800PCI_SOC | 1120 | #if defined(CONFIG_RALINK_RT288X) || defined(CONFIG_RALINK_RT305X) |
1118 | platform_driver_unregister(&rt2800soc_driver); | 1121 | platform_driver_unregister(&rt2800soc_driver); |
1119 | #endif | 1122 | #endif |
1120 | return ret; | 1123 | return ret; |
@@ -1126,10 +1129,10 @@ static int __init rt2800pci_init(void) | |||
1126 | 1129 | ||
1127 | static void __exit rt2800pci_exit(void) | 1130 | static void __exit rt2800pci_exit(void) |
1128 | { | 1131 | { |
1129 | #ifdef CONFIG_RT2800PCI_PCI | 1132 | #ifdef CONFIG_PCI |
1130 | pci_unregister_driver(&rt2800pci_driver); | 1133 | pci_unregister_driver(&rt2800pci_driver); |
1131 | #endif | 1134 | #endif |
1132 | #ifdef CONFIG_RT2800PCI_SOC | 1135 | #if defined(CONFIG_RALINK_RT288X) || defined(CONFIG_RALINK_RT305X) |
1133 | platform_driver_unregister(&rt2800soc_driver); | 1136 | platform_driver_unregister(&rt2800soc_driver); |
1134 | #endif | 1137 | #endif |
1135 | } | 1138 | } |
diff --git a/drivers/net/wireless/rt2x00/rt2800usb.c b/drivers/net/wireless/rt2x00/rt2800usb.c index 389ecba8e891..935b76d3ce4f 100644 --- a/drivers/net/wireless/rt2x00/rt2800usb.c +++ b/drivers/net/wireless/rt2x00/rt2800usb.c | |||
@@ -307,8 +307,14 @@ static void rt2800usb_write_tx_desc(struct queue_entry *entry, | |||
307 | * Initialize TXINFO descriptor | 307 | * Initialize TXINFO descriptor |
308 | */ | 308 | */ |
309 | rt2x00_desc_read(txi, 0, &word); | 309 | rt2x00_desc_read(txi, 0, &word); |
310 | |||
311 | /* | ||
312 | * The size of TXINFO_W0_USB_DMA_TX_PKT_LEN is | ||
313 | * TXWI + 802.11 header + L2 pad + payload + pad, | ||
314 | * so need to decrease size of TXINFO and USB end pad. | ||
315 | */ | ||
310 | rt2x00_set_field32(&word, TXINFO_W0_USB_DMA_TX_PKT_LEN, | 316 | rt2x00_set_field32(&word, TXINFO_W0_USB_DMA_TX_PKT_LEN, |
311 | entry->skb->len - TXINFO_DESC_SIZE); | 317 | entry->skb->len - TXINFO_DESC_SIZE - 4); |
312 | rt2x00_set_field32(&word, TXINFO_W0_WIV, | 318 | rt2x00_set_field32(&word, TXINFO_W0_WIV, |
313 | !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc->flags)); | 319 | !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc->flags)); |
314 | rt2x00_set_field32(&word, TXINFO_W0_QSEL, 2); | 320 | rt2x00_set_field32(&word, TXINFO_W0_QSEL, 2); |
@@ -326,22 +332,29 @@ static void rt2800usb_write_tx_desc(struct queue_entry *entry, | |||
326 | skbdesc->desc_len = TXINFO_DESC_SIZE + TXWI_DESC_SIZE; | 332 | skbdesc->desc_len = TXINFO_DESC_SIZE + TXWI_DESC_SIZE; |
327 | } | 333 | } |
328 | 334 | ||
329 | /* | 335 | static void rt2800usb_write_tx_data(struct queue_entry *entry, |
330 | * TX data initialization | 336 | struct txentry_desc *txdesc) |
331 | */ | ||
332 | static int rt2800usb_get_tx_data_len(struct queue_entry *entry) | ||
333 | { | 337 | { |
334 | int length; | 338 | u8 padding_len; |
335 | 339 | ||
336 | /* | 340 | /* |
337 | * The length _must_ include 4 bytes padding, | 341 | * pad(1~3 bytes) is added after each 802.11 payload. |
338 | * it should always be multiple of 4, | 342 | * USB end pad(4 bytes) is added at each USB bulk out packet end. |
339 | * but it must _not_ be a multiple of the USB packet size. | 343 | * TX frame format is : |
344 | * | TXINFO | TXWI | 802.11 header | L2 pad | payload | pad | USB end pad | | ||
345 | * |<------------- tx_pkt_len ------------->| | ||
340 | */ | 346 | */ |
341 | length = roundup(entry->skb->len + 4, 4); | 347 | rt2800_write_tx_data(entry, txdesc); |
342 | length += (4 * !(length % entry->queue->usb_maxpacket)); | 348 | padding_len = roundup(entry->skb->len + 4, 4) - entry->skb->len; |
349 | memset(skb_put(entry->skb, padding_len), 0, padding_len); | ||
350 | } | ||
343 | 351 | ||
344 | return length; | 352 | /* |
353 | * TX data initialization | ||
354 | */ | ||
355 | static int rt2800usb_get_tx_data_len(struct queue_entry *entry) | ||
356 | { | ||
357 | return entry->skb->len; | ||
345 | } | 358 | } |
346 | 359 | ||
347 | /* | 360 | /* |
@@ -579,7 +592,7 @@ static const struct rt2x00lib_ops rt2800usb_rt2x00_ops = { | |||
579 | .link_tuner = rt2800_link_tuner, | 592 | .link_tuner = rt2800_link_tuner, |
580 | .watchdog = rt2800usb_watchdog, | 593 | .watchdog = rt2800usb_watchdog, |
581 | .write_tx_desc = rt2800usb_write_tx_desc, | 594 | .write_tx_desc = rt2800usb_write_tx_desc, |
582 | .write_tx_data = rt2800_write_tx_data, | 595 | .write_tx_data = rt2800usb_write_tx_data, |
583 | .write_beacon = rt2800_write_beacon, | 596 | .write_beacon = rt2800_write_beacon, |
584 | .get_tx_data_len = rt2800usb_get_tx_data_len, | 597 | .get_tx_data_len = rt2800usb_get_tx_data_len, |
585 | .kick_tx_queue = rt2x00usb_kick_tx_queue, | 598 | .kick_tx_queue = rt2x00usb_kick_tx_queue, |
@@ -641,11 +654,19 @@ static struct usb_device_id rt2800usb_device_table[] = { | |||
641 | /* Abocom */ | 654 | /* Abocom */ |
642 | { USB_DEVICE(0x07b8, 0x2870), USB_DEVICE_DATA(&rt2800usb_ops) }, | 655 | { USB_DEVICE(0x07b8, 0x2870), USB_DEVICE_DATA(&rt2800usb_ops) }, |
643 | { USB_DEVICE(0x07b8, 0x2770), USB_DEVICE_DATA(&rt2800usb_ops) }, | 656 | { USB_DEVICE(0x07b8, 0x2770), USB_DEVICE_DATA(&rt2800usb_ops) }, |
657 | { USB_DEVICE(0x07b8, 0x3070), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
658 | { USB_DEVICE(0x07b8, 0x3071), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
659 | { USB_DEVICE(0x07b8, 0x3072), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
644 | { USB_DEVICE(0x1482, 0x3c09), USB_DEVICE_DATA(&rt2800usb_ops) }, | 660 | { USB_DEVICE(0x1482, 0x3c09), USB_DEVICE_DATA(&rt2800usb_ops) }, |
661 | /* AirTies */ | ||
662 | { USB_DEVICE(0x1eda, 0x2310), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
645 | /* Allwin */ | 663 | /* Allwin */ |
646 | { USB_DEVICE(0x8516, 0x2070), USB_DEVICE_DATA(&rt2800usb_ops) }, | 664 | { USB_DEVICE(0x8516, 0x2070), USB_DEVICE_DATA(&rt2800usb_ops) }, |
647 | { USB_DEVICE(0x8516, 0x2770), USB_DEVICE_DATA(&rt2800usb_ops) }, | 665 | { USB_DEVICE(0x8516, 0x2770), USB_DEVICE_DATA(&rt2800usb_ops) }, |
648 | { USB_DEVICE(0x8516, 0x2870), USB_DEVICE_DATA(&rt2800usb_ops) }, | 666 | { USB_DEVICE(0x8516, 0x2870), USB_DEVICE_DATA(&rt2800usb_ops) }, |
667 | { USB_DEVICE(0x8516, 0x3070), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
668 | { USB_DEVICE(0x8516, 0x3071), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
669 | { USB_DEVICE(0x8516, 0x3072), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
649 | /* Amit */ | 670 | /* Amit */ |
650 | { USB_DEVICE(0x15c5, 0x0008), USB_DEVICE_DATA(&rt2800usb_ops) }, | 671 | { USB_DEVICE(0x15c5, 0x0008), USB_DEVICE_DATA(&rt2800usb_ops) }, |
651 | /* Askey */ | 672 | /* Askey */ |
@@ -654,8 +675,13 @@ static struct usb_device_id rt2800usb_device_table[] = { | |||
654 | { USB_DEVICE(0x0b05, 0x1731), USB_DEVICE_DATA(&rt2800usb_ops) }, | 675 | { USB_DEVICE(0x0b05, 0x1731), USB_DEVICE_DATA(&rt2800usb_ops) }, |
655 | { USB_DEVICE(0x0b05, 0x1732), USB_DEVICE_DATA(&rt2800usb_ops) }, | 676 | { USB_DEVICE(0x0b05, 0x1732), USB_DEVICE_DATA(&rt2800usb_ops) }, |
656 | { USB_DEVICE(0x0b05, 0x1742), USB_DEVICE_DATA(&rt2800usb_ops) }, | 677 | { USB_DEVICE(0x0b05, 0x1742), USB_DEVICE_DATA(&rt2800usb_ops) }, |
678 | { USB_DEVICE(0x0b05, 0x1784), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
657 | /* AzureWave */ | 679 | /* AzureWave */ |
658 | { USB_DEVICE(0x13d3, 0x3247), USB_DEVICE_DATA(&rt2800usb_ops) }, | 680 | { USB_DEVICE(0x13d3, 0x3247), USB_DEVICE_DATA(&rt2800usb_ops) }, |
681 | { USB_DEVICE(0x13d3, 0x3273), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
682 | { USB_DEVICE(0x13d3, 0x3305), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
683 | { USB_DEVICE(0x13d3, 0x3307), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
684 | { USB_DEVICE(0x13d3, 0x3321), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
659 | /* Belkin */ | 685 | /* Belkin */ |
660 | { USB_DEVICE(0x050d, 0x8053), USB_DEVICE_DATA(&rt2800usb_ops) }, | 686 | { USB_DEVICE(0x050d, 0x8053), USB_DEVICE_DATA(&rt2800usb_ops) }, |
661 | { USB_DEVICE(0x050d, 0x805c), USB_DEVICE_DATA(&rt2800usb_ops) }, | 687 | { USB_DEVICE(0x050d, 0x805c), USB_DEVICE_DATA(&rt2800usb_ops) }, |
@@ -666,6 +692,7 @@ static struct usb_device_id rt2800usb_device_table[] = { | |||
666 | { USB_DEVICE(0x14b2, 0x3c06), USB_DEVICE_DATA(&rt2800usb_ops) }, | 692 | { USB_DEVICE(0x14b2, 0x3c06), USB_DEVICE_DATA(&rt2800usb_ops) }, |
667 | { USB_DEVICE(0x14b2, 0x3c07), USB_DEVICE_DATA(&rt2800usb_ops) }, | 693 | { USB_DEVICE(0x14b2, 0x3c07), USB_DEVICE_DATA(&rt2800usb_ops) }, |
668 | { USB_DEVICE(0x14b2, 0x3c09), USB_DEVICE_DATA(&rt2800usb_ops) }, | 694 | { USB_DEVICE(0x14b2, 0x3c09), USB_DEVICE_DATA(&rt2800usb_ops) }, |
695 | { USB_DEVICE(0x14b2, 0x3c12), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
669 | { USB_DEVICE(0x14b2, 0x3c23), USB_DEVICE_DATA(&rt2800usb_ops) }, | 696 | { USB_DEVICE(0x14b2, 0x3c23), USB_DEVICE_DATA(&rt2800usb_ops) }, |
670 | { USB_DEVICE(0x14b2, 0x3c25), USB_DEVICE_DATA(&rt2800usb_ops) }, | 697 | { USB_DEVICE(0x14b2, 0x3c25), USB_DEVICE_DATA(&rt2800usb_ops) }, |
671 | { USB_DEVICE(0x14b2, 0x3c27), USB_DEVICE_DATA(&rt2800usb_ops) }, | 698 | { USB_DEVICE(0x14b2, 0x3c27), USB_DEVICE_DATA(&rt2800usb_ops) }, |
@@ -674,17 +701,36 @@ static struct usb_device_id rt2800usb_device_table[] = { | |||
674 | { USB_DEVICE(0x07aa, 0x002f), USB_DEVICE_DATA(&rt2800usb_ops) }, | 701 | { USB_DEVICE(0x07aa, 0x002f), USB_DEVICE_DATA(&rt2800usb_ops) }, |
675 | { USB_DEVICE(0x07aa, 0x003c), USB_DEVICE_DATA(&rt2800usb_ops) }, | 702 | { USB_DEVICE(0x07aa, 0x003c), USB_DEVICE_DATA(&rt2800usb_ops) }, |
676 | { USB_DEVICE(0x07aa, 0x003f), USB_DEVICE_DATA(&rt2800usb_ops) }, | 703 | { USB_DEVICE(0x07aa, 0x003f), USB_DEVICE_DATA(&rt2800usb_ops) }, |
704 | { USB_DEVICE(0x18c5, 0x0012), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
677 | /* D-Link */ | 705 | /* D-Link */ |
678 | { USB_DEVICE(0x07d1, 0x3c09), USB_DEVICE_DATA(&rt2800usb_ops) }, | 706 | { USB_DEVICE(0x07d1, 0x3c09), USB_DEVICE_DATA(&rt2800usb_ops) }, |
707 | { USB_DEVICE(0x07d1, 0x3c0a), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
708 | { USB_DEVICE(0x07d1, 0x3c0d), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
709 | { USB_DEVICE(0x07d1, 0x3c0e), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
710 | { USB_DEVICE(0x07d1, 0x3c0f), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
679 | { USB_DEVICE(0x07d1, 0x3c11), USB_DEVICE_DATA(&rt2800usb_ops) }, | 711 | { USB_DEVICE(0x07d1, 0x3c11), USB_DEVICE_DATA(&rt2800usb_ops) }, |
712 | { USB_DEVICE(0x07d1, 0x3c16), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
713 | /* Draytek */ | ||
714 | { USB_DEVICE(0x07fa, 0x7712), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
680 | /* Edimax */ | 715 | /* Edimax */ |
716 | { USB_DEVICE(0x7392, 0x7711), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
681 | { USB_DEVICE(0x7392, 0x7717), USB_DEVICE_DATA(&rt2800usb_ops) }, | 717 | { USB_DEVICE(0x7392, 0x7717), USB_DEVICE_DATA(&rt2800usb_ops) }, |
682 | { USB_DEVICE(0x7392, 0x7718), USB_DEVICE_DATA(&rt2800usb_ops) }, | 718 | { USB_DEVICE(0x7392, 0x7718), USB_DEVICE_DATA(&rt2800usb_ops) }, |
719 | /* Encore */ | ||
720 | { USB_DEVICE(0x203d, 0x1480), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
721 | { USB_DEVICE(0x203d, 0x14a9), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
683 | /* EnGenius */ | 722 | /* EnGenius */ |
684 | { USB_DEVICE(0x1740, 0x9701), USB_DEVICE_DATA(&rt2800usb_ops) }, | 723 | { USB_DEVICE(0x1740, 0x9701), USB_DEVICE_DATA(&rt2800usb_ops) }, |
685 | { USB_DEVICE(0x1740, 0x9702), USB_DEVICE_DATA(&rt2800usb_ops) }, | 724 | { USB_DEVICE(0x1740, 0x9702), USB_DEVICE_DATA(&rt2800usb_ops) }, |
725 | { USB_DEVICE(0x1740, 0x9703), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
726 | { USB_DEVICE(0x1740, 0x9705), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
727 | { USB_DEVICE(0x1740, 0x9706), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
728 | { USB_DEVICE(0x1740, 0x9707), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
729 | { USB_DEVICE(0x1740, 0x9708), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
730 | { USB_DEVICE(0x1740, 0x9709), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
686 | /* Gigabyte */ | 731 | /* Gigabyte */ |
687 | { USB_DEVICE(0x1044, 0x800b), USB_DEVICE_DATA(&rt2800usb_ops) }, | 732 | { USB_DEVICE(0x1044, 0x800b), USB_DEVICE_DATA(&rt2800usb_ops) }, |
733 | { USB_DEVICE(0x1044, 0x800d), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
688 | /* Hawking */ | 734 | /* Hawking */ |
689 | { USB_DEVICE(0x0e66, 0x0001), USB_DEVICE_DATA(&rt2800usb_ops) }, | 735 | { USB_DEVICE(0x0e66, 0x0001), USB_DEVICE_DATA(&rt2800usb_ops) }, |
690 | { USB_DEVICE(0x0e66, 0x0003), USB_DEVICE_DATA(&rt2800usb_ops) }, | 736 | { USB_DEVICE(0x0e66, 0x0003), USB_DEVICE_DATA(&rt2800usb_ops) }, |
@@ -693,6 +739,10 @@ static struct usb_device_id rt2800usb_device_table[] = { | |||
693 | { USB_DEVICE(0x0e66, 0x0013), USB_DEVICE_DATA(&rt2800usb_ops) }, | 739 | { USB_DEVICE(0x0e66, 0x0013), USB_DEVICE_DATA(&rt2800usb_ops) }, |
694 | { USB_DEVICE(0x0e66, 0x0017), USB_DEVICE_DATA(&rt2800usb_ops) }, | 740 | { USB_DEVICE(0x0e66, 0x0017), USB_DEVICE_DATA(&rt2800usb_ops) }, |
695 | { USB_DEVICE(0x0e66, 0x0018), USB_DEVICE_DATA(&rt2800usb_ops) }, | 741 | { USB_DEVICE(0x0e66, 0x0018), USB_DEVICE_DATA(&rt2800usb_ops) }, |
742 | /* I-O DATA */ | ||
743 | { USB_DEVICE(0x04bb, 0x0945), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
744 | { USB_DEVICE(0x04bb, 0x0947), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
745 | { USB_DEVICE(0x04bb, 0x0948), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
696 | /* Linksys */ | 746 | /* Linksys */ |
697 | { USB_DEVICE(0x1737, 0x0070), USB_DEVICE_DATA(&rt2800usb_ops) }, | 747 | { USB_DEVICE(0x1737, 0x0070), USB_DEVICE_DATA(&rt2800usb_ops) }, |
698 | { USB_DEVICE(0x1737, 0x0071), USB_DEVICE_DATA(&rt2800usb_ops) }, | 748 | { USB_DEVICE(0x1737, 0x0071), USB_DEVICE_DATA(&rt2800usb_ops) }, |
@@ -700,17 +750,44 @@ static struct usb_device_id rt2800usb_device_table[] = { | |||
700 | { USB_DEVICE(0x0789, 0x0162), USB_DEVICE_DATA(&rt2800usb_ops) }, | 750 | { USB_DEVICE(0x0789, 0x0162), USB_DEVICE_DATA(&rt2800usb_ops) }, |
701 | { USB_DEVICE(0x0789, 0x0163), USB_DEVICE_DATA(&rt2800usb_ops) }, | 751 | { USB_DEVICE(0x0789, 0x0163), USB_DEVICE_DATA(&rt2800usb_ops) }, |
702 | { USB_DEVICE(0x0789, 0x0164), USB_DEVICE_DATA(&rt2800usb_ops) }, | 752 | { USB_DEVICE(0x0789, 0x0164), USB_DEVICE_DATA(&rt2800usb_ops) }, |
753 | { USB_DEVICE(0x0789, 0x0166), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
703 | /* Motorola */ | 754 | /* Motorola */ |
704 | { USB_DEVICE(0x100d, 0x9031), USB_DEVICE_DATA(&rt2800usb_ops) }, | 755 | { USB_DEVICE(0x100d, 0x9031), USB_DEVICE_DATA(&rt2800usb_ops) }, |
705 | /* MSI */ | 756 | /* MSI */ |
757 | { USB_DEVICE(0x0db0, 0x3820), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
758 | { USB_DEVICE(0x0db0, 0x3821), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
759 | { USB_DEVICE(0x0db0, 0x3822), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
760 | { USB_DEVICE(0x0db0, 0x3870), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
761 | { USB_DEVICE(0x0db0, 0x3871), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
706 | { USB_DEVICE(0x0db0, 0x6899), USB_DEVICE_DATA(&rt2800usb_ops) }, | 762 | { USB_DEVICE(0x0db0, 0x6899), USB_DEVICE_DATA(&rt2800usb_ops) }, |
763 | { USB_DEVICE(0x0db0, 0x821a), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
764 | { USB_DEVICE(0x0db0, 0x822a), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
765 | { USB_DEVICE(0x0db0, 0x822b), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
766 | { USB_DEVICE(0x0db0, 0x822c), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
767 | { USB_DEVICE(0x0db0, 0x870a), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
768 | { USB_DEVICE(0x0db0, 0x871a), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
769 | { USB_DEVICE(0x0db0, 0x871b), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
770 | { USB_DEVICE(0x0db0, 0x871c), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
771 | { USB_DEVICE(0x0db0, 0x899a), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
772 | /* Para */ | ||
773 | { USB_DEVICE(0x20b8, 0x8888), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
774 | /* Pegatron */ | ||
775 | { USB_DEVICE(0x1d4d, 0x000c), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
776 | { USB_DEVICE(0x1d4d, 0x000e), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
707 | /* Philips */ | 777 | /* Philips */ |
708 | { USB_DEVICE(0x0471, 0x200f), USB_DEVICE_DATA(&rt2800usb_ops) }, | 778 | { USB_DEVICE(0x0471, 0x200f), USB_DEVICE_DATA(&rt2800usb_ops) }, |
709 | /* Planex */ | 779 | /* Planex */ |
780 | { USB_DEVICE(0x2019, 0xab25), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
710 | { USB_DEVICE(0x2019, 0xed06), USB_DEVICE_DATA(&rt2800usb_ops) }, | 781 | { USB_DEVICE(0x2019, 0xed06), USB_DEVICE_DATA(&rt2800usb_ops) }, |
782 | /* Quanta */ | ||
783 | { USB_DEVICE(0x1a32, 0x0304), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
711 | /* Ralink */ | 784 | /* Ralink */ |
785 | { USB_DEVICE(0x148f, 0x2070), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
712 | { USB_DEVICE(0x148f, 0x2770), USB_DEVICE_DATA(&rt2800usb_ops) }, | 786 | { USB_DEVICE(0x148f, 0x2770), USB_DEVICE_DATA(&rt2800usb_ops) }, |
713 | { USB_DEVICE(0x148f, 0x2870), USB_DEVICE_DATA(&rt2800usb_ops) }, | 787 | { USB_DEVICE(0x148f, 0x2870), USB_DEVICE_DATA(&rt2800usb_ops) }, |
788 | { USB_DEVICE(0x148f, 0x3070), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
789 | { USB_DEVICE(0x148f, 0x3071), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
790 | { USB_DEVICE(0x148f, 0x3072), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
714 | /* Samsung */ | 791 | /* Samsung */ |
715 | { USB_DEVICE(0x04e8, 0x2018), USB_DEVICE_DATA(&rt2800usb_ops) }, | 792 | { USB_DEVICE(0x04e8, 0x2018), USB_DEVICE_DATA(&rt2800usb_ops) }, |
716 | /* Siemens */ | 793 | /* Siemens */ |
@@ -723,13 +800,22 @@ static struct usb_device_id rt2800usb_device_table[] = { | |||
723 | { USB_DEVICE(0x0df6, 0x0039), USB_DEVICE_DATA(&rt2800usb_ops) }, | 800 | { USB_DEVICE(0x0df6, 0x0039), USB_DEVICE_DATA(&rt2800usb_ops) }, |
724 | { USB_DEVICE(0x0df6, 0x003b), USB_DEVICE_DATA(&rt2800usb_ops) }, | 801 | { USB_DEVICE(0x0df6, 0x003b), USB_DEVICE_DATA(&rt2800usb_ops) }, |
725 | { USB_DEVICE(0x0df6, 0x003d), USB_DEVICE_DATA(&rt2800usb_ops) }, | 802 | { USB_DEVICE(0x0df6, 0x003d), USB_DEVICE_DATA(&rt2800usb_ops) }, |
803 | { USB_DEVICE(0x0df6, 0x003e), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
726 | { USB_DEVICE(0x0df6, 0x003f), USB_DEVICE_DATA(&rt2800usb_ops) }, | 804 | { USB_DEVICE(0x0df6, 0x003f), USB_DEVICE_DATA(&rt2800usb_ops) }, |
805 | { USB_DEVICE(0x0df6, 0x0040), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
806 | { USB_DEVICE(0x0df6, 0x0042), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
807 | { USB_DEVICE(0x0df6, 0x0047), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
808 | { USB_DEVICE(0x0df6, 0x0048), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
727 | /* SMC */ | 809 | /* SMC */ |
728 | { USB_DEVICE(0x083a, 0x6618), USB_DEVICE_DATA(&rt2800usb_ops) }, | 810 | { USB_DEVICE(0x083a, 0x6618), USB_DEVICE_DATA(&rt2800usb_ops) }, |
811 | { USB_DEVICE(0x083a, 0x7511), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
729 | { USB_DEVICE(0x083a, 0x7512), USB_DEVICE_DATA(&rt2800usb_ops) }, | 812 | { USB_DEVICE(0x083a, 0x7512), USB_DEVICE_DATA(&rt2800usb_ops) }, |
730 | { USB_DEVICE(0x083a, 0x7522), USB_DEVICE_DATA(&rt2800usb_ops) }, | 813 | { USB_DEVICE(0x083a, 0x7522), USB_DEVICE_DATA(&rt2800usb_ops) }, |
731 | { USB_DEVICE(0x083a, 0x8522), USB_DEVICE_DATA(&rt2800usb_ops) }, | 814 | { USB_DEVICE(0x083a, 0x8522), USB_DEVICE_DATA(&rt2800usb_ops) }, |
732 | { USB_DEVICE(0x083a, 0xa618), USB_DEVICE_DATA(&rt2800usb_ops) }, | 815 | { USB_DEVICE(0x083a, 0xa618), USB_DEVICE_DATA(&rt2800usb_ops) }, |
816 | { USB_DEVICE(0x083a, 0xa701), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
817 | { USB_DEVICE(0x083a, 0xa702), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
818 | { USB_DEVICE(0x083a, 0xa703), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
733 | { USB_DEVICE(0x083a, 0xb522), USB_DEVICE_DATA(&rt2800usb_ops) }, | 819 | { USB_DEVICE(0x083a, 0xb522), USB_DEVICE_DATA(&rt2800usb_ops) }, |
734 | /* Sparklan */ | 820 | /* Sparklan */ |
735 | { USB_DEVICE(0x15a9, 0x0006), USB_DEVICE_DATA(&rt2800usb_ops) }, | 821 | { USB_DEVICE(0x15a9, 0x0006), USB_DEVICE_DATA(&rt2800usb_ops) }, |
@@ -743,101 +829,16 @@ static struct usb_device_id rt2800usb_device_table[] = { | |||
743 | /* Zinwell */ | 829 | /* Zinwell */ |
744 | { USB_DEVICE(0x5a57, 0x0280), USB_DEVICE_DATA(&rt2800usb_ops) }, | 830 | { USB_DEVICE(0x5a57, 0x0280), USB_DEVICE_DATA(&rt2800usb_ops) }, |
745 | { USB_DEVICE(0x5a57, 0x0282), USB_DEVICE_DATA(&rt2800usb_ops) }, | 831 | { USB_DEVICE(0x5a57, 0x0282), USB_DEVICE_DATA(&rt2800usb_ops) }, |
832 | { USB_DEVICE(0x5a57, 0x0283), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
833 | { USB_DEVICE(0x5a57, 0x5257), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
746 | /* Zyxel */ | 834 | /* Zyxel */ |
747 | { USB_DEVICE(0x0586, 0x3416), USB_DEVICE_DATA(&rt2800usb_ops) }, | 835 | { USB_DEVICE(0x0586, 0x3416), USB_DEVICE_DATA(&rt2800usb_ops) }, |
748 | #ifdef CONFIG_RT2800USB_RT30XX | 836 | #ifdef CONFIG_RT2800USB_RT33XX |
749 | /* Abocom */ | ||
750 | { USB_DEVICE(0x07b8, 0x3070), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
751 | { USB_DEVICE(0x07b8, 0x3071), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
752 | { USB_DEVICE(0x07b8, 0x3072), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
753 | /* AirTies */ | ||
754 | { USB_DEVICE(0x1eda, 0x2310), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
755 | /* Allwin */ | ||
756 | { USB_DEVICE(0x8516, 0x3070), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
757 | { USB_DEVICE(0x8516, 0x3071), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
758 | { USB_DEVICE(0x8516, 0x3072), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
759 | /* ASUS */ | ||
760 | { USB_DEVICE(0x0b05, 0x1784), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
761 | /* AzureWave */ | ||
762 | { USB_DEVICE(0x13d3, 0x3273), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
763 | { USB_DEVICE(0x13d3, 0x3305), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
764 | { USB_DEVICE(0x13d3, 0x3307), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
765 | { USB_DEVICE(0x13d3, 0x3321), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
766 | /* Conceptronic */ | ||
767 | { USB_DEVICE(0x14b2, 0x3c12), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
768 | /* Corega */ | ||
769 | { USB_DEVICE(0x18c5, 0x0012), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
770 | /* D-Link */ | ||
771 | { USB_DEVICE(0x07d1, 0x3c0a), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
772 | { USB_DEVICE(0x07d1, 0x3c0d), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
773 | { USB_DEVICE(0x07d1, 0x3c0e), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
774 | { USB_DEVICE(0x07d1, 0x3c0f), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
775 | { USB_DEVICE(0x07d1, 0x3c16), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
776 | /* Draytek */ | ||
777 | { USB_DEVICE(0x07fa, 0x7712), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
778 | /* Edimax */ | ||
779 | { USB_DEVICE(0x7392, 0x7711), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
780 | /* Encore */ | ||
781 | { USB_DEVICE(0x203d, 0x1480), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
782 | { USB_DEVICE(0x203d, 0x14a9), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
783 | /* EnGenius */ | ||
784 | { USB_DEVICE(0x1740, 0x9703), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
785 | { USB_DEVICE(0x1740, 0x9705), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
786 | { USB_DEVICE(0x1740, 0x9706), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
787 | { USB_DEVICE(0x1740, 0x9707), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
788 | { USB_DEVICE(0x1740, 0x9708), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
789 | { USB_DEVICE(0x1740, 0x9709), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
790 | /* Gigabyte */ | ||
791 | { USB_DEVICE(0x1044, 0x800d), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
792 | /* I-O DATA */ | ||
793 | { USB_DEVICE(0x04bb, 0x0945), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
794 | { USB_DEVICE(0x04bb, 0x0947), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
795 | { USB_DEVICE(0x04bb, 0x0948), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
796 | /* Logitec */ | ||
797 | { USB_DEVICE(0x0789, 0x0166), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
798 | /* MSI */ | ||
799 | { USB_DEVICE(0x0db0, 0x3820), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
800 | { USB_DEVICE(0x0db0, 0x3821), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
801 | { USB_DEVICE(0x0db0, 0x3822), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
802 | { USB_DEVICE(0x0db0, 0x3870), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
803 | { USB_DEVICE(0x0db0, 0x3871), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
804 | { USB_DEVICE(0x0db0, 0x821a), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
805 | { USB_DEVICE(0x0db0, 0x822a), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
806 | { USB_DEVICE(0x0db0, 0x822b), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
807 | { USB_DEVICE(0x0db0, 0x822c), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
808 | { USB_DEVICE(0x0db0, 0x870a), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
809 | { USB_DEVICE(0x0db0, 0x871a), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
810 | { USB_DEVICE(0x0db0, 0x871b), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
811 | { USB_DEVICE(0x0db0, 0x871c), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
812 | { USB_DEVICE(0x0db0, 0x899a), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
813 | /* Para */ | ||
814 | { USB_DEVICE(0x20b8, 0x8888), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
815 | /* Pegatron */ | ||
816 | { USB_DEVICE(0x1d4d, 0x000c), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
817 | { USB_DEVICE(0x1d4d, 0x000e), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
818 | /* Planex */ | ||
819 | { USB_DEVICE(0x2019, 0xab25), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
820 | /* Quanta */ | ||
821 | { USB_DEVICE(0x1a32, 0x0304), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
822 | /* Ralink */ | 837 | /* Ralink */ |
823 | { USB_DEVICE(0x148f, 0x2070), USB_DEVICE_DATA(&rt2800usb_ops) }, | 838 | { USB_DEVICE(0x148f, 0x3370), USB_DEVICE_DATA(&rt2800usb_ops) }, |
824 | { USB_DEVICE(0x148f, 0x3070), USB_DEVICE_DATA(&rt2800usb_ops) }, | 839 | { USB_DEVICE(0x148f, 0x8070), USB_DEVICE_DATA(&rt2800usb_ops) }, |
825 | { USB_DEVICE(0x148f, 0x3071), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
826 | { USB_DEVICE(0x148f, 0x3072), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
827 | /* Sitecom */ | 840 | /* Sitecom */ |
828 | { USB_DEVICE(0x0df6, 0x003e), USB_DEVICE_DATA(&rt2800usb_ops) }, | 841 | { USB_DEVICE(0x0df6, 0x0050), USB_DEVICE_DATA(&rt2800usb_ops) }, |
829 | { USB_DEVICE(0x0df6, 0x0040), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
830 | { USB_DEVICE(0x0df6, 0x0042), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
831 | { USB_DEVICE(0x0df6, 0x0047), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
832 | { USB_DEVICE(0x0df6, 0x0048), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
833 | /* SMC */ | ||
834 | { USB_DEVICE(0x083a, 0x7511), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
835 | { USB_DEVICE(0x083a, 0xa701), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
836 | { USB_DEVICE(0x083a, 0xa702), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
837 | { USB_DEVICE(0x083a, 0xa703), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
838 | /* Zinwell */ | ||
839 | { USB_DEVICE(0x5a57, 0x0283), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
840 | { USB_DEVICE(0x5a57, 0x5257), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
841 | #endif | 842 | #endif |
842 | #ifdef CONFIG_RT2800USB_RT35XX | 843 | #ifdef CONFIG_RT2800USB_RT35XX |
843 | /* Allwin */ | 844 | /* Allwin */ |
@@ -851,12 +852,9 @@ static struct usb_device_id rt2800usb_device_table[] = { | |||
851 | /* I-O DATA */ | 852 | /* I-O DATA */ |
852 | { USB_DEVICE(0x04bb, 0x0944), USB_DEVICE_DATA(&rt2800usb_ops) }, | 853 | { USB_DEVICE(0x04bb, 0x0944), USB_DEVICE_DATA(&rt2800usb_ops) }, |
853 | /* Ralink */ | 854 | /* Ralink */ |
854 | { USB_DEVICE(0x148f, 0x3370), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
855 | { USB_DEVICE(0x148f, 0x3572), USB_DEVICE_DATA(&rt2800usb_ops) }, | 855 | { USB_DEVICE(0x148f, 0x3572), USB_DEVICE_DATA(&rt2800usb_ops) }, |
856 | { USB_DEVICE(0x148f, 0x8070), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
857 | /* Sitecom */ | 856 | /* Sitecom */ |
858 | { USB_DEVICE(0x0df6, 0x0041), USB_DEVICE_DATA(&rt2800usb_ops) }, | 857 | { USB_DEVICE(0x0df6, 0x0041), USB_DEVICE_DATA(&rt2800usb_ops) }, |
859 | { USB_DEVICE(0x0df6, 0x0050), USB_DEVICE_DATA(&rt2800usb_ops) }, | ||
860 | /* Zinwell */ | 858 | /* Zinwell */ |
861 | { USB_DEVICE(0x5a57, 0x0284), USB_DEVICE_DATA(&rt2800usb_ops) }, | 859 | { USB_DEVICE(0x5a57, 0x0284), USB_DEVICE_DATA(&rt2800usb_ops) }, |
862 | #endif | 860 | #endif |
diff --git a/drivers/net/wireless/rt2x00/rt2x00.h b/drivers/net/wireless/rt2x00/rt2x00.h index 42bd3a96f23b..0a55eeff871e 100644 --- a/drivers/net/wireless/rt2x00/rt2x00.h +++ b/drivers/net/wireless/rt2x00/rt2x00.h | |||
@@ -915,7 +915,7 @@ struct rt2x00_dev { | |||
915 | * in those cases REGISTER_BUSY_COUNT attempts should be | 915 | * in those cases REGISTER_BUSY_COUNT attempts should be |
916 | * taken with a REGISTER_BUSY_DELAY interval. | 916 | * taken with a REGISTER_BUSY_DELAY interval. |
917 | */ | 917 | */ |
918 | #define REGISTER_BUSY_COUNT 5 | 918 | #define REGISTER_BUSY_COUNT 100 |
919 | #define REGISTER_BUSY_DELAY 100 | 919 | #define REGISTER_BUSY_DELAY 100 |
920 | 920 | ||
921 | /* | 921 | /* |
diff --git a/drivers/net/wireless/rt2x00/rt2x00dev.c b/drivers/net/wireless/rt2x00/rt2x00dev.c index 3afa2a3ebee4..c879f9a7037c 100644 --- a/drivers/net/wireless/rt2x00/rt2x00dev.c +++ b/drivers/net/wireless/rt2x00/rt2x00dev.c | |||
@@ -250,10 +250,9 @@ void rt2x00lib_txdone(struct queue_entry *entry, | |||
250 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb); | 250 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb); |
251 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); | 251 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); |
252 | enum data_queue_qid qid = skb_get_queue_mapping(entry->skb); | 252 | enum data_queue_qid qid = skb_get_queue_mapping(entry->skb); |
253 | unsigned int header_length = ieee80211_get_hdrlen_from_skb(entry->skb); | 253 | unsigned int header_length, i; |
254 | u8 rate_idx, rate_flags, retry_rates; | 254 | u8 rate_idx, rate_flags, retry_rates; |
255 | u8 skbdesc_flags = skbdesc->flags; | 255 | u8 skbdesc_flags = skbdesc->flags; |
256 | unsigned int i; | ||
257 | bool success; | 256 | bool success; |
258 | 257 | ||
259 | /* | 258 | /* |
@@ -272,6 +271,11 @@ void rt2x00lib_txdone(struct queue_entry *entry, | |||
272 | skbdesc->flags &= ~SKBDESC_DESC_IN_SKB; | 271 | skbdesc->flags &= ~SKBDESC_DESC_IN_SKB; |
273 | 272 | ||
274 | /* | 273 | /* |
274 | * Determine the length of 802.11 header. | ||
275 | */ | ||
276 | header_length = ieee80211_get_hdrlen_from_skb(entry->skb); | ||
277 | |||
278 | /* | ||
275 | * Remove L2 padding which was added during | 279 | * Remove L2 padding which was added during |
276 | */ | 280 | */ |
277 | if (test_bit(DRIVER_REQUIRE_L2PAD, &rt2x00dev->flags)) | 281 | if (test_bit(DRIVER_REQUIRE_L2PAD, &rt2x00dev->flags)) |
diff --git a/drivers/net/wireless/rt2x00/rt2x00queue.c b/drivers/net/wireless/rt2x00/rt2x00queue.c index dc543174dfad..a3d79c7a21c6 100644 --- a/drivers/net/wireless/rt2x00/rt2x00queue.c +++ b/drivers/net/wireless/rt2x00/rt2x00queue.c | |||
@@ -204,8 +204,10 @@ void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int header_length) | |||
204 | if (!l2pad) | 204 | if (!l2pad) |
205 | return; | 205 | return; |
206 | 206 | ||
207 | memmove(skb->data + l2pad, skb->data, header_length); | 207 | memmove(skb->data + header_length, skb->data + header_length + l2pad, |
208 | skb_pull(skb, l2pad); | 208 | skb->len - header_length - l2pad); |
209 | |||
210 | skb_trim(skb, skb->len - l2pad); | ||
209 | } | 211 | } |
210 | 212 | ||
211 | static void rt2x00queue_create_tx_descriptor_seq(struct queue_entry *entry, | 213 | static void rt2x00queue_create_tx_descriptor_seq(struct queue_entry *entry, |
diff --git a/drivers/net/wireless/rt2x00/rt2x00soc.c b/drivers/net/wireless/rt2x00/rt2x00soc.c index fc98063de71d..2aa5c38022f3 100644 --- a/drivers/net/wireless/rt2x00/rt2x00soc.c +++ b/drivers/net/wireless/rt2x00/rt2x00soc.c | |||
@@ -40,6 +40,8 @@ static void rt2x00soc_free_reg(struct rt2x00_dev *rt2x00dev) | |||
40 | 40 | ||
41 | kfree(rt2x00dev->eeprom); | 41 | kfree(rt2x00dev->eeprom); |
42 | rt2x00dev->eeprom = NULL; | 42 | rt2x00dev->eeprom = NULL; |
43 | |||
44 | iounmap(rt2x00dev->csr.base); | ||
43 | } | 45 | } |
44 | 46 | ||
45 | static int rt2x00soc_alloc_reg(struct rt2x00_dev *rt2x00dev) | 47 | static int rt2x00soc_alloc_reg(struct rt2x00_dev *rt2x00dev) |
@@ -51,9 +53,9 @@ static int rt2x00soc_alloc_reg(struct rt2x00_dev *rt2x00dev) | |||
51 | if (!res) | 53 | if (!res) |
52 | return -ENODEV; | 54 | return -ENODEV; |
53 | 55 | ||
54 | rt2x00dev->csr.base = (void __iomem *)KSEG1ADDR(res->start); | 56 | rt2x00dev->csr.base = ioremap(res->start, resource_size(res)); |
55 | if (!rt2x00dev->csr.base) | 57 | if (!rt2x00dev->csr.base) |
56 | goto exit; | 58 | return -ENOMEM; |
57 | 59 | ||
58 | rt2x00dev->eeprom = kzalloc(rt2x00dev->ops->eeprom_size, GFP_KERNEL); | 60 | rt2x00dev->eeprom = kzalloc(rt2x00dev->ops->eeprom_size, GFP_KERNEL); |
59 | if (!rt2x00dev->eeprom) | 61 | if (!rt2x00dev->eeprom) |
diff --git a/drivers/net/wireless/wl12xx/Kconfig b/drivers/net/wireless/wl12xx/Kconfig index 02ad4bc15976..d2adeb1f72b7 100644 --- a/drivers/net/wireless/wl12xx/Kconfig +++ b/drivers/net/wireless/wl12xx/Kconfig | |||
@@ -1,56 +1,58 @@ | |||
1 | menuconfig WL12XX | 1 | menuconfig WL12XX_MENU |
2 | tristate "TI wl12xx driver support" | 2 | tristate "TI wl12xx driver support" |
3 | depends on MAC80211 && EXPERIMENTAL | 3 | depends on MAC80211 && EXPERIMENTAL |
4 | ---help--- | 4 | ---help--- |
5 | This will enable TI wl12xx driver support. The drivers make | 5 | This will enable TI wl12xx driver support for the following chips: |
6 | use of the mac80211 stack. | 6 | wl1271 and wl1273. |
7 | The drivers make use of the mac80211 stack. | ||
7 | 8 | ||
8 | config WL1271 | 9 | config WL12XX |
9 | tristate "TI wl1271 support" | 10 | tristate "TI wl12xx support" |
10 | depends on WL12XX && GENERIC_HARDIRQS | 11 | depends on WL12XX_MENU && GENERIC_HARDIRQS |
11 | depends on INET | 12 | depends on INET |
12 | select FW_LOADER | 13 | select FW_LOADER |
13 | select CRC7 | 14 | select CRC7 |
14 | ---help--- | 15 | ---help--- |
15 | This module adds support for wireless adapters based on the | 16 | This module adds support for wireless adapters based on TI wl1271 and |
16 | TI wl1271 chipset. | 17 | TI wl1273 chipsets. This module does *not* include support for wl1251. |
18 | For wl1251 support, use the separate homonymous driver instead. | ||
17 | 19 | ||
18 | If you choose to build a module, it'll be called wl1271. Say N if | 20 | If you choose to build a module, it will be called wl12xx. Say N if |
19 | unsure. | 21 | unsure. |
20 | 22 | ||
21 | config WL1271_HT | 23 | config WL12XX_HT |
22 | bool "TI wl1271 802.11 HT support (EXPERIMENTAL)" | 24 | bool "TI wl12xx 802.11 HT support (EXPERIMENTAL)" |
23 | depends on WL1271 && EXPERIMENTAL | 25 | depends on WL12XX && EXPERIMENTAL |
24 | default n | 26 | default n |
25 | ---help--- | 27 | ---help--- |
26 | This will enable 802.11 HT support for TI wl1271 chipset. | 28 | This will enable 802.11 HT support in the wl12xx module. |
27 | 29 | ||
28 | That configuration is temporary due to the code incomplete and | 30 | That configuration is temporary due to the code incomplete and |
29 | still in testing process. | 31 | still in testing process. |
30 | 32 | ||
31 | config WL1271_SPI | 33 | config WL12XX_SPI |
32 | tristate "TI wl1271 SPI support" | 34 | tristate "TI wl12xx SPI support" |
33 | depends on WL1271 && SPI_MASTER | 35 | depends on WL12XX && SPI_MASTER |
34 | ---help--- | 36 | ---help--- |
35 | This module adds support for the SPI interface of adapters using | 37 | This module adds support for the SPI interface of adapters using |
36 | TI wl1271 chipset. Select this if your platform is using | 38 | TI wl12xx chipsets. Select this if your platform is using |
37 | the SPI bus. | 39 | the SPI bus. |
38 | 40 | ||
39 | If you choose to build a module, it'll be called wl1251_spi. | 41 | If you choose to build a module, it'll be called wl12xx_spi. |
40 | Say N if unsure. | 42 | Say N if unsure. |
41 | 43 | ||
42 | config WL1271_SDIO | 44 | config WL12XX_SDIO |
43 | tristate "TI wl1271 SDIO support" | 45 | tristate "TI wl12xx SDIO support" |
44 | depends on WL1271 && MMC | 46 | depends on WL12XX && MMC |
45 | ---help--- | 47 | ---help--- |
46 | This module adds support for the SDIO interface of adapters using | 48 | This module adds support for the SDIO interface of adapters using |
47 | TI wl1271 chipset. Select this if your platform is using | 49 | TI wl12xx chipsets. Select this if your platform is using |
48 | the SDIO bus. | 50 | the SDIO bus. |
49 | 51 | ||
50 | If you choose to build a module, it'll be called | 52 | If you choose to build a module, it'll be called wl12xx_sdio. |
51 | wl1271_sdio. Say N if unsure. | 53 | Say N if unsure. |
52 | 54 | ||
53 | config WL12XX_PLATFORM_DATA | 55 | config WL12XX_PLATFORM_DATA |
54 | bool | 56 | bool |
55 | depends on WL1271_SDIO != n || WL1251_SDIO != n | 57 | depends on WL12XX_SDIO != n || WL1251_SDIO != n |
56 | default y | 58 | default y |
diff --git a/drivers/net/wireless/wl12xx/Makefile b/drivers/net/wireless/wl12xx/Makefile index 3a807444b2af..005a758174d9 100644 --- a/drivers/net/wireless/wl12xx/Makefile +++ b/drivers/net/wireless/wl12xx/Makefile | |||
@@ -1,12 +1,13 @@ | |||
1 | wl1271-objs = wl1271_main.o wl1271_cmd.o wl1271_io.o \ | 1 | wl12xx-objs = main.o cmd.o io.o event.o tx.o rx.o ps.o acx.o \ |
2 | wl1271_event.o wl1271_tx.o wl1271_rx.o \ | 2 | boot.o init.o debugfs.o scan.o |
3 | wl1271_ps.o wl1271_acx.o wl1271_boot.o \ | ||
4 | wl1271_init.o wl1271_debugfs.o wl1271_scan.o | ||
5 | 3 | ||
6 | wl1271-$(CONFIG_NL80211_TESTMODE) += wl1271_testmode.o | 4 | wl12xx_spi-objs = spi.o |
7 | obj-$(CONFIG_WL1271) += wl1271.o | 5 | wl12xx_sdio-objs = sdio.o |
8 | obj-$(CONFIG_WL1271_SPI) += wl1271_spi.o | 6 | |
9 | obj-$(CONFIG_WL1271_SDIO) += wl1271_sdio.o | 7 | wl12xx-$(CONFIG_NL80211_TESTMODE) += testmode.o |
8 | obj-$(CONFIG_WL12XX) += wl12xx.o | ||
9 | obj-$(CONFIG_WL12XX_SPI) += wl12xx_spi.o | ||
10 | obj-$(CONFIG_WL12XX_SDIO) += wl12xx_sdio.o | ||
10 | 11 | ||
11 | # small builtin driver bit | 12 | # small builtin driver bit |
12 | obj-$(CONFIG_WL12XX_PLATFORM_DATA) += wl12xx_platform_data.o | 13 | obj-$(CONFIG_WL12XX_PLATFORM_DATA) += wl12xx_platform_data.o |
diff --git a/drivers/net/wireless/wl12xx/wl1271_acx.c b/drivers/net/wireless/wl12xx/acx.c index bd7f95f4eef3..7cbaeb6d2a37 100644 --- a/drivers/net/wireless/wl12xx/wl1271_acx.c +++ b/drivers/net/wireless/wl12xx/acx.c | |||
@@ -21,7 +21,7 @@ | |||
21 | * | 21 | * |
22 | */ | 22 | */ |
23 | 23 | ||
24 | #include "wl1271_acx.h" | 24 | #include "acx.h" |
25 | 25 | ||
26 | #include <linux/module.h> | 26 | #include <linux/module.h> |
27 | #include <linux/platform_device.h> | 27 | #include <linux/platform_device.h> |
@@ -29,10 +29,10 @@ | |||
29 | #include <linux/spi/spi.h> | 29 | #include <linux/spi/spi.h> |
30 | #include <linux/slab.h> | 30 | #include <linux/slab.h> |
31 | 31 | ||
32 | #include "wl1271.h" | 32 | #include "wl12xx.h" |
33 | #include "wl12xx_80211.h" | 33 | #include "wl12xx_80211.h" |
34 | #include "wl1271_reg.h" | 34 | #include "reg.h" |
35 | #include "wl1271_ps.h" | 35 | #include "ps.h" |
36 | 36 | ||
37 | int wl1271_acx_wake_up_conditions(struct wl1271 *wl) | 37 | int wl1271_acx_wake_up_conditions(struct wl1271 *wl) |
38 | { | 38 | { |
@@ -862,7 +862,7 @@ out: | |||
862 | return ret; | 862 | return ret; |
863 | } | 863 | } |
864 | 864 | ||
865 | int wl1271_acx_frag_threshold(struct wl1271 *wl) | 865 | int wl1271_acx_frag_threshold(struct wl1271 *wl, u16 frag_threshold) |
866 | { | 866 | { |
867 | struct acx_frag_threshold *acx; | 867 | struct acx_frag_threshold *acx; |
868 | int ret = 0; | 868 | int ret = 0; |
@@ -876,7 +876,7 @@ int wl1271_acx_frag_threshold(struct wl1271 *wl) | |||
876 | goto out; | 876 | goto out; |
877 | } | 877 | } |
878 | 878 | ||
879 | acx->frag_threshold = cpu_to_le16(wl->conf.tx.frag_threshold); | 879 | acx->frag_threshold = cpu_to_le16(frag_threshold); |
880 | ret = wl1271_cmd_configure(wl, ACX_FRAG_CFG, acx, sizeof(*acx)); | 880 | ret = wl1271_cmd_configure(wl, ACX_FRAG_CFG, acx, sizeof(*acx)); |
881 | if (ret < 0) { | 881 | if (ret < 0) { |
882 | wl1271_warning("Setting of frag threshold failed: %d", ret); | 882 | wl1271_warning("Setting of frag threshold failed: %d", ret); |
diff --git a/drivers/net/wireless/wl12xx/wl1271_acx.h b/drivers/net/wireless/wl12xx/acx.h index b7c490845f3e..75a6306ff554 100644 --- a/drivers/net/wireless/wl12xx/wl1271_acx.h +++ b/drivers/net/wireless/wl12xx/acx.h | |||
@@ -22,11 +22,11 @@ | |||
22 | * | 22 | * |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #ifndef __WL1271_ACX_H__ | 25 | #ifndef __ACX_H__ |
26 | #define __WL1271_ACX_H__ | 26 | #define __ACX_H__ |
27 | 27 | ||
28 | #include "wl1271.h" | 28 | #include "wl12xx.h" |
29 | #include "wl1271_cmd.h" | 29 | #include "cmd.h" |
30 | 30 | ||
31 | /************************************************************************* | 31 | /************************************************************************* |
32 | 32 | ||
@@ -1161,7 +1161,7 @@ int wl1271_acx_ac_cfg(struct wl1271 *wl, u8 ac, u8 cw_min, u16 cw_max, | |||
1161 | int wl1271_acx_tid_cfg(struct wl1271 *wl, u8 queue_id, u8 channel_type, | 1161 | int wl1271_acx_tid_cfg(struct wl1271 *wl, u8 queue_id, u8 channel_type, |
1162 | u8 tsid, u8 ps_scheme, u8 ack_policy, | 1162 | u8 tsid, u8 ps_scheme, u8 ack_policy, |
1163 | u32 apsd_conf0, u32 apsd_conf1); | 1163 | u32 apsd_conf0, u32 apsd_conf1); |
1164 | int wl1271_acx_frag_threshold(struct wl1271 *wl); | 1164 | int wl1271_acx_frag_threshold(struct wl1271 *wl, u16 frag_threshold); |
1165 | int wl1271_acx_tx_config_options(struct wl1271 *wl); | 1165 | int wl1271_acx_tx_config_options(struct wl1271 *wl); |
1166 | int wl1271_acx_mem_cfg(struct wl1271 *wl); | 1166 | int wl1271_acx_mem_cfg(struct wl1271 *wl); |
1167 | int wl1271_acx_init_mem_config(struct wl1271 *wl); | 1167 | int wl1271_acx_init_mem_config(struct wl1271 *wl); |
diff --git a/drivers/net/wireless/wl12xx/wl1271_boot.c b/drivers/net/wireless/wl12xx/boot.c index 5b190728ca55..1eafb8175832 100644 --- a/drivers/net/wireless/wl12xx/wl1271_boot.c +++ b/drivers/net/wireless/wl12xx/boot.c | |||
@@ -24,11 +24,11 @@ | |||
24 | #include <linux/gpio.h> | 24 | #include <linux/gpio.h> |
25 | #include <linux/slab.h> | 25 | #include <linux/slab.h> |
26 | 26 | ||
27 | #include "wl1271_acx.h" | 27 | #include "acx.h" |
28 | #include "wl1271_reg.h" | 28 | #include "reg.h" |
29 | #include "wl1271_boot.h" | 29 | #include "boot.h" |
30 | #include "wl1271_io.h" | 30 | #include "io.h" |
31 | #include "wl1271_event.h" | 31 | #include "event.h" |
32 | 32 | ||
33 | static struct wl1271_partition_set part_table[PART_TABLE_LEN] = { | 33 | static struct wl1271_partition_set part_table[PART_TABLE_LEN] = { |
34 | [PART_DOWN] = { | 34 | [PART_DOWN] = { |
diff --git a/drivers/net/wireless/wl12xx/wl1271_boot.h b/drivers/net/wireless/wl12xx/boot.h index f73b0b15a280..c7d771959f3a 100644 --- a/drivers/net/wireless/wl12xx/wl1271_boot.h +++ b/drivers/net/wireless/wl12xx/boot.h | |||
@@ -24,7 +24,7 @@ | |||
24 | #ifndef __BOOT_H__ | 24 | #ifndef __BOOT_H__ |
25 | #define __BOOT_H__ | 25 | #define __BOOT_H__ |
26 | 26 | ||
27 | #include "wl1271.h" | 27 | #include "wl12xx.h" |
28 | 28 | ||
29 | int wl1271_boot(struct wl1271 *wl); | 29 | int wl1271_boot(struct wl1271 *wl); |
30 | 30 | ||
diff --git a/drivers/net/wireless/wl12xx/wl1271_cmd.c b/drivers/net/wireless/wl12xx/cmd.c index 5d3e8485ea4e..f3d0541aaad6 100644 --- a/drivers/net/wireless/wl12xx/wl1271_cmd.c +++ b/drivers/net/wireless/wl12xx/cmd.c | |||
@@ -29,13 +29,13 @@ | |||
29 | #include <linux/ieee80211.h> | 29 | #include <linux/ieee80211.h> |
30 | #include <linux/slab.h> | 30 | #include <linux/slab.h> |
31 | 31 | ||
32 | #include "wl1271.h" | 32 | #include "wl12xx.h" |
33 | #include "wl1271_reg.h" | 33 | #include "reg.h" |
34 | #include "wl1271_io.h" | 34 | #include "io.h" |
35 | #include "wl1271_acx.h" | 35 | #include "acx.h" |
36 | #include "wl12xx_80211.h" | 36 | #include "wl12xx_80211.h" |
37 | #include "wl1271_cmd.h" | 37 | #include "cmd.h" |
38 | #include "wl1271_event.h" | 38 | #include "event.h" |
39 | 39 | ||
40 | #define WL1271_CMD_FAST_POLL_COUNT 50 | 40 | #define WL1271_CMD_FAST_POLL_COUNT 50 |
41 | 41 | ||
diff --git a/drivers/net/wireless/wl12xx/wl1271_cmd.h b/drivers/net/wireless/wl12xx/cmd.h index a0caf4fc37b1..16d1bf814e76 100644 --- a/drivers/net/wireless/wl12xx/wl1271_cmd.h +++ b/drivers/net/wireless/wl12xx/cmd.h | |||
@@ -22,10 +22,10 @@ | |||
22 | * | 22 | * |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #ifndef __WL1271_CMD_H__ | 25 | #ifndef __CMD_H__ |
26 | #define __WL1271_CMD_H__ | 26 | #define __CMD_H__ |
27 | 27 | ||
28 | #include "wl1271.h" | 28 | #include "wl12xx.h" |
29 | 29 | ||
30 | struct acx_header; | 30 | struct acx_header; |
31 | 31 | ||
@@ -327,9 +327,6 @@ enum wl1271_channel_tune_bands { | |||
327 | 327 | ||
328 | #define WL1271_PD_REFERENCE_POINT_BAND_B_G 0 | 328 | #define WL1271_PD_REFERENCE_POINT_BAND_B_G 0 |
329 | 329 | ||
330 | #define TEST_CMD_P2G_CAL 0x02 | ||
331 | #define TEST_CMD_CHANNEL_TUNE 0x0d | ||
332 | #define TEST_CMD_UPDATE_PD_REFERENCE_POINT 0x1d | ||
333 | #define TEST_CMD_INI_FILE_RADIO_PARAM 0x19 | 330 | #define TEST_CMD_INI_FILE_RADIO_PARAM 0x19 |
334 | #define TEST_CMD_INI_FILE_GENERAL_PARAM 0x1E | 331 | #define TEST_CMD_INI_FILE_GENERAL_PARAM 0x1E |
335 | #define TEST_CMD_INI_FILE_RF_EXTENDED_PARAM 0x26 | 332 | #define TEST_CMD_INI_FILE_RF_EXTENDED_PARAM 0x26 |
@@ -375,51 +372,6 @@ struct wl1271_ext_radio_parms_cmd { | |||
375 | u8 padding[3]; | 372 | u8 padding[3]; |
376 | } __packed; | 373 | } __packed; |
377 | 374 | ||
378 | struct wl1271_cmd_cal_channel_tune { | ||
379 | struct wl1271_cmd_header header; | ||
380 | |||
381 | struct wl1271_cmd_test_header test; | ||
382 | |||
383 | u8 band; | ||
384 | u8 channel; | ||
385 | |||
386 | __le16 radio_status; | ||
387 | } __packed; | ||
388 | |||
389 | struct wl1271_cmd_cal_update_ref_point { | ||
390 | struct wl1271_cmd_header header; | ||
391 | |||
392 | struct wl1271_cmd_test_header test; | ||
393 | |||
394 | __le32 ref_power; | ||
395 | __le32 ref_detector; | ||
396 | u8 sub_band; | ||
397 | u8 padding[3]; | ||
398 | } __packed; | ||
399 | |||
400 | #define MAX_TLV_LENGTH 400 | ||
401 | #define MAX_NVS_VERSION_LENGTH 12 | ||
402 | |||
403 | #define WL1271_CAL_P2G_BAND_B_G BIT(0) | ||
404 | |||
405 | struct wl1271_cmd_cal_p2g { | ||
406 | struct wl1271_cmd_header header; | ||
407 | |||
408 | struct wl1271_cmd_test_header test; | ||
409 | |||
410 | __le16 len; | ||
411 | u8 buf[MAX_TLV_LENGTH]; | ||
412 | u8 type; | ||
413 | u8 padding; | ||
414 | |||
415 | __le16 radio_status; | ||
416 | u8 nvs_version[MAX_NVS_VERSION_LENGTH]; | ||
417 | |||
418 | u8 sub_band_mask; | ||
419 | u8 padding2; | ||
420 | } __packed; | ||
421 | |||
422 | |||
423 | /* | 375 | /* |
424 | * There are three types of disconnections: | 376 | * There are three types of disconnections: |
425 | * | 377 | * |
diff --git a/drivers/net/wireless/wl12xx/wl1271_conf.h b/drivers/net/wireless/wl12xx/conf.h index 5f78a6cb1433..a16b3616e430 100644 --- a/drivers/net/wireless/wl12xx/wl1271_conf.h +++ b/drivers/net/wireless/wl12xx/conf.h | |||
@@ -21,8 +21,8 @@ | |||
21 | * | 21 | * |
22 | */ | 22 | */ |
23 | 23 | ||
24 | #ifndef __WL1271_CONF_H__ | 24 | #ifndef __CONF_H__ |
25 | #define __WL1271_CONF_H__ | 25 | #define __CONF_H__ |
26 | 26 | ||
27 | enum { | 27 | enum { |
28 | CONF_HW_BIT_RATE_1MBPS = BIT(0), | 28 | CONF_HW_BIT_RATE_1MBPS = BIT(0), |
diff --git a/drivers/net/wireless/wl12xx/wl1271_debugfs.c b/drivers/net/wireless/wl12xx/debugfs.c index 3468b849852e..dd71b7d2105c 100644 --- a/drivers/net/wireless/wl12xx/wl1271_debugfs.c +++ b/drivers/net/wireless/wl12xx/debugfs.c | |||
@@ -21,15 +21,15 @@ | |||
21 | * | 21 | * |
22 | */ | 22 | */ |
23 | 23 | ||
24 | #include "wl1271_debugfs.h" | 24 | #include "debugfs.h" |
25 | 25 | ||
26 | #include <linux/skbuff.h> | 26 | #include <linux/skbuff.h> |
27 | #include <linux/slab.h> | 27 | #include <linux/slab.h> |
28 | 28 | ||
29 | #include "wl1271.h" | 29 | #include "wl12xx.h" |
30 | #include "wl1271_acx.h" | 30 | #include "acx.h" |
31 | #include "wl1271_ps.h" | 31 | #include "ps.h" |
32 | #include "wl1271_io.h" | 32 | #include "io.h" |
33 | 33 | ||
34 | /* ms */ | 34 | /* ms */ |
35 | #define WL1271_DEBUGFS_STATS_LIFETIME 1000 | 35 | #define WL1271_DEBUGFS_STATS_LIFETIME 1000 |
diff --git a/drivers/net/wireless/wl12xx/wl1271_debugfs.h b/drivers/net/wireless/wl12xx/debugfs.h index 00a45b2669ad..254c5b292cf6 100644 --- a/drivers/net/wireless/wl12xx/wl1271_debugfs.h +++ b/drivers/net/wireless/wl12xx/debugfs.h | |||
@@ -21,10 +21,10 @@ | |||
21 | * | 21 | * |
22 | */ | 22 | */ |
23 | 23 | ||
24 | #ifndef WL1271_DEBUGFS_H | 24 | #ifndef __DEBUGFS_H__ |
25 | #define WL1271_DEBUGFS_H | 25 | #define __DEBUGFS_H__ |
26 | 26 | ||
27 | #include "wl1271.h" | 27 | #include "wl12xx.h" |
28 | 28 | ||
29 | int wl1271_debugfs_init(struct wl1271 *wl); | 29 | int wl1271_debugfs_init(struct wl1271 *wl); |
30 | void wl1271_debugfs_exit(struct wl1271 *wl); | 30 | void wl1271_debugfs_exit(struct wl1271 *wl); |
diff --git a/drivers/net/wireless/wl12xx/wl1271_event.c b/drivers/net/wireless/wl12xx/event.c index 38ccef7d73a5..f9146f5242fb 100644 --- a/drivers/net/wireless/wl12xx/wl1271_event.c +++ b/drivers/net/wireless/wl12xx/event.c | |||
@@ -21,12 +21,12 @@ | |||
21 | * | 21 | * |
22 | */ | 22 | */ |
23 | 23 | ||
24 | #include "wl1271.h" | 24 | #include "wl12xx.h" |
25 | #include "wl1271_reg.h" | 25 | #include "reg.h" |
26 | #include "wl1271_io.h" | 26 | #include "io.h" |
27 | #include "wl1271_event.h" | 27 | #include "event.h" |
28 | #include "wl1271_ps.h" | 28 | #include "ps.h" |
29 | #include "wl1271_scan.h" | 29 | #include "scan.h" |
30 | #include "wl12xx_80211.h" | 30 | #include "wl12xx_80211.h" |
31 | 31 | ||
32 | void wl1271_pspoll_work(struct work_struct *work) | 32 | void wl1271_pspoll_work(struct work_struct *work) |
diff --git a/drivers/net/wireless/wl12xx/wl1271_event.h b/drivers/net/wireless/wl12xx/event.h index e4751667cf5e..6cce0143adb5 100644 --- a/drivers/net/wireless/wl12xx/wl1271_event.h +++ b/drivers/net/wireless/wl12xx/event.h | |||
@@ -22,8 +22,8 @@ | |||
22 | * | 22 | * |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #ifndef __WL1271_EVENT_H__ | 25 | #ifndef __EVENT_H__ |
26 | #define __WL1271_EVENT_H__ | 26 | #define __EVENT_H__ |
27 | 27 | ||
28 | /* | 28 | /* |
29 | * Mbox events | 29 | * Mbox events |
diff --git a/drivers/net/wireless/wl12xx/wl1271_ini.h b/drivers/net/wireless/wl12xx/ini.h index 2313047d4015..c330a2583dfd 100644 --- a/drivers/net/wireless/wl12xx/wl1271_ini.h +++ b/drivers/net/wireless/wl12xx/ini.h | |||
@@ -21,8 +21,8 @@ | |||
21 | * | 21 | * |
22 | */ | 22 | */ |
23 | 23 | ||
24 | #ifndef __WL1271_INI_H__ | 24 | #ifndef __INI_H__ |
25 | #define __WL1271_INI_H__ | 25 | #define __INI_H__ |
26 | 26 | ||
27 | #define WL1271_INI_MAX_SMART_REFLEX_PARAM 16 | 27 | #define WL1271_INI_MAX_SMART_REFLEX_PARAM 16 |
28 | 28 | ||
diff --git a/drivers/net/wireless/wl12xx/wl1271_init.c b/drivers/net/wireless/wl12xx/init.c index 8044bba70ee7..7949d346aadb 100644 --- a/drivers/net/wireless/wl12xx/wl1271_init.c +++ b/drivers/net/wireless/wl12xx/init.c | |||
@@ -25,11 +25,11 @@ | |||
25 | #include <linux/module.h> | 25 | #include <linux/module.h> |
26 | #include <linux/slab.h> | 26 | #include <linux/slab.h> |
27 | 27 | ||
28 | #include "wl1271_init.h" | 28 | #include "init.h" |
29 | #include "wl12xx_80211.h" | 29 | #include "wl12xx_80211.h" |
30 | #include "wl1271_acx.h" | 30 | #include "acx.h" |
31 | #include "wl1271_cmd.h" | 31 | #include "cmd.h" |
32 | #include "wl1271_reg.h" | 32 | #include "reg.h" |
33 | 33 | ||
34 | static int wl1271_init_hwenc_config(struct wl1271 *wl) | 34 | static int wl1271_init_hwenc_config(struct wl1271 *wl) |
35 | { | 35 | { |
@@ -290,7 +290,7 @@ int wl1271_hw_init(struct wl1271 *wl) | |||
290 | goto out_free_memmap; | 290 | goto out_free_memmap; |
291 | 291 | ||
292 | /* Default fragmentation threshold */ | 292 | /* Default fragmentation threshold */ |
293 | ret = wl1271_acx_frag_threshold(wl); | 293 | ret = wl1271_acx_frag_threshold(wl, wl->conf.tx.frag_threshold); |
294 | if (ret < 0) | 294 | if (ret < 0) |
295 | goto out_free_memmap; | 295 | goto out_free_memmap; |
296 | 296 | ||
diff --git a/drivers/net/wireless/wl12xx/wl1271_init.h b/drivers/net/wireless/wl12xx/init.h index bc26f8c53b91..7762421f8602 100644 --- a/drivers/net/wireless/wl12xx/wl1271_init.h +++ b/drivers/net/wireless/wl12xx/init.h | |||
@@ -21,10 +21,10 @@ | |||
21 | * | 21 | * |
22 | */ | 22 | */ |
23 | 23 | ||
24 | #ifndef __WL1271_INIT_H__ | 24 | #ifndef __INIT_H__ |
25 | #define __WL1271_INIT_H__ | 25 | #define __INIT_H__ |
26 | 26 | ||
27 | #include "wl1271.h" | 27 | #include "wl12xx.h" |
28 | 28 | ||
29 | int wl1271_hw_init_power_auth(struct wl1271 *wl); | 29 | int wl1271_hw_init_power_auth(struct wl1271 *wl); |
30 | int wl1271_init_templates_config(struct wl1271 *wl); | 30 | int wl1271_init_templates_config(struct wl1271 *wl); |
diff --git a/drivers/net/wireless/wl12xx/wl1271_io.c b/drivers/net/wireless/wl12xx/io.c index c8759acef131..35c2f1aca6ba 100644 --- a/drivers/net/wireless/wl12xx/wl1271_io.c +++ b/drivers/net/wireless/wl12xx/io.c | |||
@@ -26,9 +26,9 @@ | |||
26 | #include <linux/crc7.h> | 26 | #include <linux/crc7.h> |
27 | #include <linux/spi/spi.h> | 27 | #include <linux/spi/spi.h> |
28 | 28 | ||
29 | #include "wl1271.h" | 29 | #include "wl12xx.h" |
30 | #include "wl12xx_80211.h" | 30 | #include "wl12xx_80211.h" |
31 | #include "wl1271_io.h" | 31 | #include "io.h" |
32 | 32 | ||
33 | #define OCP_CMD_LOOP 32 | 33 | #define OCP_CMD_LOOP 32 |
34 | 34 | ||
diff --git a/drivers/net/wireless/wl12xx/wl1271_io.h b/drivers/net/wireless/wl12xx/io.h index c1f92e65ded0..844b32b170bb 100644 --- a/drivers/net/wireless/wl12xx/wl1271_io.h +++ b/drivers/net/wireless/wl12xx/io.h | |||
@@ -22,10 +22,10 @@ | |||
22 | * | 22 | * |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #ifndef __WL1271_IO_H__ | 25 | #ifndef __IO_H__ |
26 | #define __WL1271_IO_H__ | 26 | #define __IO_H__ |
27 | 27 | ||
28 | #include "wl1271_reg.h" | 28 | #include "reg.h" |
29 | 29 | ||
30 | #define HW_ACCESS_MEMORY_MAX_RANGE 0x1FFC0 | 30 | #define HW_ACCESS_MEMORY_MAX_RANGE 0x1FFC0 |
31 | 31 | ||
diff --git a/drivers/net/wireless/wl12xx/wl1271_main.c b/drivers/net/wireless/wl12xx/main.c index f5b1d19bc88d..708ffe304c6d 100644 --- a/drivers/net/wireless/wl12xx/wl1271_main.c +++ b/drivers/net/wireless/wl12xx/main.c | |||
@@ -31,20 +31,20 @@ | |||
31 | #include <linux/platform_device.h> | 31 | #include <linux/platform_device.h> |
32 | #include <linux/slab.h> | 32 | #include <linux/slab.h> |
33 | 33 | ||
34 | #include "wl1271.h" | 34 | #include "wl12xx.h" |
35 | #include "wl12xx_80211.h" | 35 | #include "wl12xx_80211.h" |
36 | #include "wl1271_reg.h" | 36 | #include "reg.h" |
37 | #include "wl1271_io.h" | 37 | #include "io.h" |
38 | #include "wl1271_event.h" | 38 | #include "event.h" |
39 | #include "wl1271_tx.h" | 39 | #include "tx.h" |
40 | #include "wl1271_rx.h" | 40 | #include "rx.h" |
41 | #include "wl1271_ps.h" | 41 | #include "ps.h" |
42 | #include "wl1271_init.h" | 42 | #include "init.h" |
43 | #include "wl1271_debugfs.h" | 43 | #include "debugfs.h" |
44 | #include "wl1271_cmd.h" | 44 | #include "cmd.h" |
45 | #include "wl1271_boot.h" | 45 | #include "boot.h" |
46 | #include "wl1271_testmode.h" | 46 | #include "testmode.h" |
47 | #include "wl1271_scan.h" | 47 | #include "scan.h" |
48 | 48 | ||
49 | #define WL1271_BOOT_RETRIES 3 | 49 | #define WL1271_BOOT_RETRIES 3 |
50 | 50 | ||
@@ -335,6 +335,27 @@ out: | |||
335 | return NOTIFY_OK; | 335 | return NOTIFY_OK; |
336 | } | 336 | } |
337 | 337 | ||
338 | static int wl1271_reg_notify(struct wiphy *wiphy, | ||
339 | struct regulatory_request *request) { | ||
340 | struct ieee80211_supported_band *band; | ||
341 | struct ieee80211_channel *ch; | ||
342 | int i; | ||
343 | |||
344 | band = wiphy->bands[IEEE80211_BAND_5GHZ]; | ||
345 | for (i = 0; i < band->n_channels; i++) { | ||
346 | ch = &band->channels[i]; | ||
347 | if (ch->flags & IEEE80211_CHAN_DISABLED) | ||
348 | continue; | ||
349 | |||
350 | if (ch->flags & IEEE80211_CHAN_RADAR) | ||
351 | ch->flags |= IEEE80211_CHAN_NO_IBSS | | ||
352 | IEEE80211_CHAN_PASSIVE_SCAN; | ||
353 | |||
354 | } | ||
355 | |||
356 | return 0; | ||
357 | } | ||
358 | |||
338 | static void wl1271_conf_init(struct wl1271 *wl) | 359 | static void wl1271_conf_init(struct wl1271 *wl) |
339 | { | 360 | { |
340 | 361 | ||
@@ -404,7 +425,7 @@ static int wl1271_plt_init(struct wl1271 *wl) | |||
404 | goto out_free_memmap; | 425 | goto out_free_memmap; |
405 | 426 | ||
406 | /* Default fragmentation threshold */ | 427 | /* Default fragmentation threshold */ |
407 | ret = wl1271_acx_frag_threshold(wl); | 428 | ret = wl1271_acx_frag_threshold(wl, wl->conf.tx.frag_threshold); |
408 | if (ret < 0) | 429 | if (ret < 0) |
409 | goto out_free_memmap; | 430 | goto out_free_memmap; |
410 | 431 | ||
@@ -884,7 +905,7 @@ static int wl1271_op_tx(struct ieee80211_hw *hw, struct sk_buff *skb) | |||
884 | set_bit(WL1271_FLAG_STA_RATES_CHANGED, &wl->flags); | 905 | set_bit(WL1271_FLAG_STA_RATES_CHANGED, &wl->flags); |
885 | } | 906 | } |
886 | 907 | ||
887 | #ifdef CONFIG_WL1271_HT | 908 | #ifdef CONFIG_WL12XX_HT |
888 | if (sta && | 909 | if (sta && |
889 | sta->ht_cap.ht_supported && | 910 | sta->ht_cap.ht_supported && |
890 | ((wl->sta_rate_set >> HW_HT_RATES_OFFSET) != | 911 | ((wl->sta_rate_set >> HW_HT_RATES_OFFSET) != |
@@ -1724,6 +1745,34 @@ out: | |||
1724 | return ret; | 1745 | return ret; |
1725 | } | 1746 | } |
1726 | 1747 | ||
1748 | static int wl1271_op_set_frag_threshold(struct ieee80211_hw *hw, u32 value) | ||
1749 | { | ||
1750 | struct wl1271 *wl = hw->priv; | ||
1751 | int ret = 0; | ||
1752 | |||
1753 | mutex_lock(&wl->mutex); | ||
1754 | |||
1755 | if (unlikely(wl->state == WL1271_STATE_OFF)) { | ||
1756 | ret = -EAGAIN; | ||
1757 | goto out; | ||
1758 | } | ||
1759 | |||
1760 | ret = wl1271_ps_elp_wakeup(wl, false); | ||
1761 | if (ret < 0) | ||
1762 | goto out; | ||
1763 | |||
1764 | ret = wl1271_acx_frag_threshold(wl, (u16)value); | ||
1765 | if (ret < 0) | ||
1766 | wl1271_warning("wl1271_op_set_frag_threshold failed: %d", ret); | ||
1767 | |||
1768 | wl1271_ps_elp_sleep(wl); | ||
1769 | |||
1770 | out: | ||
1771 | mutex_unlock(&wl->mutex); | ||
1772 | |||
1773 | return ret; | ||
1774 | } | ||
1775 | |||
1727 | static int wl1271_op_set_rts_threshold(struct ieee80211_hw *hw, u32 value) | 1776 | static int wl1271_op_set_rts_threshold(struct ieee80211_hw *hw, u32 value) |
1728 | { | 1777 | { |
1729 | struct wl1271 *wl = hw->priv; | 1778 | struct wl1271 *wl = hw->priv; |
@@ -1962,9 +2011,12 @@ static void wl1271_op_bss_info_changed(struct ieee80211_hw *hw, | |||
1962 | 2011 | ||
1963 | /* Disable the keep-alive feature */ | 2012 | /* Disable the keep-alive feature */ |
1964 | ret = wl1271_acx_keep_alive_mode(wl, false); | 2013 | ret = wl1271_acx_keep_alive_mode(wl, false); |
1965 | |||
1966 | if (ret < 0) | 2014 | if (ret < 0) |
1967 | goto out_sleep; | 2015 | goto out_sleep; |
2016 | |||
2017 | /* restore the bssid filter and go to dummy bssid */ | ||
2018 | wl1271_unjoin(wl); | ||
2019 | wl1271_dummy_join(wl); | ||
1968 | } | 2020 | } |
1969 | 2021 | ||
1970 | } | 2022 | } |
@@ -2194,24 +2246,21 @@ static struct ieee80211_rate wl1271_rates[] = { | |||
2194 | .hw_value_short = CONF_HW_BIT_RATE_54MBPS, }, | 2246 | .hw_value_short = CONF_HW_BIT_RATE_54MBPS, }, |
2195 | }; | 2247 | }; |
2196 | 2248 | ||
2197 | /* | 2249 | /* can't be const, mac80211 writes to this */ |
2198 | * Can't be const, mac80211 writes to this. The order of the channels here | ||
2199 | * is designed to improve scanning. | ||
2200 | */ | ||
2201 | static struct ieee80211_channel wl1271_channels[] = { | 2250 | static struct ieee80211_channel wl1271_channels[] = { |
2202 | { .hw_value = 1, .center_freq = 2412, .max_power = 25 }, | 2251 | { .hw_value = 1, .center_freq = 2412, .max_power = 25 }, |
2203 | { .hw_value = 5, .center_freq = 2432, .max_power = 25 }, | ||
2204 | { .hw_value = 9, .center_freq = 2452, .max_power = 25 }, | ||
2205 | { .hw_value = 13, .center_freq = 2472, .max_power = 25 }, | ||
2206 | { .hw_value = 4, .center_freq = 2427, .max_power = 25 }, | ||
2207 | { .hw_value = 8, .center_freq = 2447, .max_power = 25 }, | ||
2208 | { .hw_value = 12, .center_freq = 2467, .max_power = 25 }, | ||
2209 | { .hw_value = 3, .center_freq = 2422, .max_power = 25 }, | ||
2210 | { .hw_value = 7, .center_freq = 2442, .max_power = 25 }, | ||
2211 | { .hw_value = 11, .center_freq = 2462, .max_power = 25 }, | ||
2212 | { .hw_value = 2, .center_freq = 2417, .max_power = 25 }, | 2252 | { .hw_value = 2, .center_freq = 2417, .max_power = 25 }, |
2253 | { .hw_value = 3, .center_freq = 2422, .max_power = 25 }, | ||
2254 | { .hw_value = 4, .center_freq = 2427, .max_power = 25 }, | ||
2255 | { .hw_value = 5, .center_freq = 2432, .max_power = 25 }, | ||
2213 | { .hw_value = 6, .center_freq = 2437, .max_power = 25 }, | 2256 | { .hw_value = 6, .center_freq = 2437, .max_power = 25 }, |
2257 | { .hw_value = 7, .center_freq = 2442, .max_power = 25 }, | ||
2258 | { .hw_value = 8, .center_freq = 2447, .max_power = 25 }, | ||
2259 | { .hw_value = 9, .center_freq = 2452, .max_power = 25 }, | ||
2214 | { .hw_value = 10, .center_freq = 2457, .max_power = 25 }, | 2260 | { .hw_value = 10, .center_freq = 2457, .max_power = 25 }, |
2261 | { .hw_value = 11, .center_freq = 2462, .max_power = 25 }, | ||
2262 | { .hw_value = 12, .center_freq = 2467, .max_power = 25 }, | ||
2263 | { .hw_value = 13, .center_freq = 2472, .max_power = 25 }, | ||
2215 | }; | 2264 | }; |
2216 | 2265 | ||
2217 | /* mapping to indexes for wl1271_rates */ | 2266 | /* mapping to indexes for wl1271_rates */ |
@@ -2247,8 +2296,8 @@ static const u8 wl1271_rate_to_idx_2ghz[] = { | |||
2247 | /* 11n STA capabilities */ | 2296 | /* 11n STA capabilities */ |
2248 | #define HW_RX_HIGHEST_RATE 72 | 2297 | #define HW_RX_HIGHEST_RATE 72 |
2249 | 2298 | ||
2250 | #ifdef CONFIG_WL1271_HT | 2299 | #ifdef CONFIG_WL12XX_HT |
2251 | #define WL1271_HT_CAP { \ | 2300 | #define WL12XX_HT_CAP { \ |
2252 | .cap = IEEE80211_HT_CAP_GRN_FLD | IEEE80211_HT_CAP_SGI_20, \ | 2301 | .cap = IEEE80211_HT_CAP_GRN_FLD | IEEE80211_HT_CAP_SGI_20, \ |
2253 | .ht_supported = true, \ | 2302 | .ht_supported = true, \ |
2254 | .ampdu_factor = IEEE80211_HT_MAX_AMPDU_8K, \ | 2303 | .ampdu_factor = IEEE80211_HT_MAX_AMPDU_8K, \ |
@@ -2260,7 +2309,7 @@ static const u8 wl1271_rate_to_idx_2ghz[] = { | |||
2260 | }, \ | 2309 | }, \ |
2261 | } | 2310 | } |
2262 | #else | 2311 | #else |
2263 | #define WL1271_HT_CAP { \ | 2312 | #define WL12XX_HT_CAP { \ |
2264 | .ht_supported = false, \ | 2313 | .ht_supported = false, \ |
2265 | } | 2314 | } |
2266 | #endif | 2315 | #endif |
@@ -2271,7 +2320,7 @@ static struct ieee80211_supported_band wl1271_band_2ghz = { | |||
2271 | .n_channels = ARRAY_SIZE(wl1271_channels), | 2320 | .n_channels = ARRAY_SIZE(wl1271_channels), |
2272 | .bitrates = wl1271_rates, | 2321 | .bitrates = wl1271_rates, |
2273 | .n_bitrates = ARRAY_SIZE(wl1271_rates), | 2322 | .n_bitrates = ARRAY_SIZE(wl1271_rates), |
2274 | .ht_cap = WL1271_HT_CAP, | 2323 | .ht_cap = WL12XX_HT_CAP, |
2275 | }; | 2324 | }; |
2276 | 2325 | ||
2277 | /* 5 GHz data rates for WL1273 */ | 2326 | /* 5 GHz data rates for WL1273 */ |
@@ -2302,52 +2351,49 @@ static struct ieee80211_rate wl1271_rates_5ghz[] = { | |||
2302 | .hw_value_short = CONF_HW_BIT_RATE_54MBPS, }, | 2351 | .hw_value_short = CONF_HW_BIT_RATE_54MBPS, }, |
2303 | }; | 2352 | }; |
2304 | 2353 | ||
2305 | /* | 2354 | /* 5 GHz band channels for WL1273 */ |
2306 | * 5 GHz band channels for WL1273 - can't be const, mac80211 writes to this. | ||
2307 | * The order of the channels here is designed to improve scanning. | ||
2308 | */ | ||
2309 | static struct ieee80211_channel wl1271_channels_5ghz[] = { | 2355 | static struct ieee80211_channel wl1271_channels_5ghz[] = { |
2310 | { .hw_value = 183, .center_freq = 4915}, | 2356 | { .hw_value = 183, .center_freq = 4915}, |
2311 | { .hw_value = 188, .center_freq = 4940}, | ||
2312 | { .hw_value = 8, .center_freq = 5040}, | ||
2313 | { .hw_value = 34, .center_freq = 5170}, | ||
2314 | { .hw_value = 44, .center_freq = 5220}, | ||
2315 | { .hw_value = 60, .center_freq = 5300}, | ||
2316 | { .hw_value = 112, .center_freq = 5560}, | ||
2317 | { .hw_value = 132, .center_freq = 5660}, | ||
2318 | { .hw_value = 157, .center_freq = 5785}, | ||
2319 | { .hw_value = 184, .center_freq = 4920}, | 2357 | { .hw_value = 184, .center_freq = 4920}, |
2358 | { .hw_value = 185, .center_freq = 4925}, | ||
2359 | { .hw_value = 187, .center_freq = 4935}, | ||
2360 | { .hw_value = 188, .center_freq = 4940}, | ||
2320 | { .hw_value = 189, .center_freq = 4945}, | 2361 | { .hw_value = 189, .center_freq = 4945}, |
2321 | { .hw_value = 9, .center_freq = 5045}, | ||
2322 | { .hw_value = 36, .center_freq = 5180}, | ||
2323 | { .hw_value = 46, .center_freq = 5230}, | ||
2324 | { .hw_value = 64, .center_freq = 5320}, | ||
2325 | { .hw_value = 116, .center_freq = 5580}, | ||
2326 | { .hw_value = 136, .center_freq = 5680}, | ||
2327 | { .hw_value = 192, .center_freq = 4960}, | 2362 | { .hw_value = 192, .center_freq = 4960}, |
2328 | { .hw_value = 11, .center_freq = 5055}, | ||
2329 | { .hw_value = 38, .center_freq = 5190}, | ||
2330 | { .hw_value = 48, .center_freq = 5240}, | ||
2331 | { .hw_value = 100, .center_freq = 5500}, | ||
2332 | { .hw_value = 120, .center_freq = 5600}, | ||
2333 | { .hw_value = 140, .center_freq = 5700}, | ||
2334 | { .hw_value = 185, .center_freq = 4925}, | ||
2335 | { .hw_value = 196, .center_freq = 4980}, | 2363 | { .hw_value = 196, .center_freq = 4980}, |
2336 | { .hw_value = 12, .center_freq = 5060}, | ||
2337 | { .hw_value = 40, .center_freq = 5200}, | ||
2338 | { .hw_value = 52, .center_freq = 5260}, | ||
2339 | { .hw_value = 104, .center_freq = 5520}, | ||
2340 | { .hw_value = 124, .center_freq = 5620}, | ||
2341 | { .hw_value = 149, .center_freq = 5745}, | ||
2342 | { .hw_value = 161, .center_freq = 5805}, | ||
2343 | { .hw_value = 187, .center_freq = 4935}, | ||
2344 | { .hw_value = 7, .center_freq = 5035}, | 2364 | { .hw_value = 7, .center_freq = 5035}, |
2365 | { .hw_value = 8, .center_freq = 5040}, | ||
2366 | { .hw_value = 9, .center_freq = 5045}, | ||
2367 | { .hw_value = 11, .center_freq = 5055}, | ||
2368 | { .hw_value = 12, .center_freq = 5060}, | ||
2345 | { .hw_value = 16, .center_freq = 5080}, | 2369 | { .hw_value = 16, .center_freq = 5080}, |
2370 | { .hw_value = 34, .center_freq = 5170}, | ||
2371 | { .hw_value = 36, .center_freq = 5180}, | ||
2372 | { .hw_value = 38, .center_freq = 5190}, | ||
2373 | { .hw_value = 40, .center_freq = 5200}, | ||
2346 | { .hw_value = 42, .center_freq = 5210}, | 2374 | { .hw_value = 42, .center_freq = 5210}, |
2375 | { .hw_value = 44, .center_freq = 5220}, | ||
2376 | { .hw_value = 46, .center_freq = 5230}, | ||
2377 | { .hw_value = 48, .center_freq = 5240}, | ||
2378 | { .hw_value = 52, .center_freq = 5260}, | ||
2347 | { .hw_value = 56, .center_freq = 5280}, | 2379 | { .hw_value = 56, .center_freq = 5280}, |
2380 | { .hw_value = 60, .center_freq = 5300}, | ||
2381 | { .hw_value = 64, .center_freq = 5320}, | ||
2382 | { .hw_value = 100, .center_freq = 5500}, | ||
2383 | { .hw_value = 104, .center_freq = 5520}, | ||
2348 | { .hw_value = 108, .center_freq = 5540}, | 2384 | { .hw_value = 108, .center_freq = 5540}, |
2385 | { .hw_value = 112, .center_freq = 5560}, | ||
2386 | { .hw_value = 116, .center_freq = 5580}, | ||
2387 | { .hw_value = 120, .center_freq = 5600}, | ||
2388 | { .hw_value = 124, .center_freq = 5620}, | ||
2349 | { .hw_value = 128, .center_freq = 5640}, | 2389 | { .hw_value = 128, .center_freq = 5640}, |
2390 | { .hw_value = 132, .center_freq = 5660}, | ||
2391 | { .hw_value = 136, .center_freq = 5680}, | ||
2392 | { .hw_value = 140, .center_freq = 5700}, | ||
2393 | { .hw_value = 149, .center_freq = 5745}, | ||
2350 | { .hw_value = 153, .center_freq = 5765}, | 2394 | { .hw_value = 153, .center_freq = 5765}, |
2395 | { .hw_value = 157, .center_freq = 5785}, | ||
2396 | { .hw_value = 161, .center_freq = 5805}, | ||
2351 | { .hw_value = 165, .center_freq = 5825}, | 2397 | { .hw_value = 165, .center_freq = 5825}, |
2352 | }; | 2398 | }; |
2353 | 2399 | ||
@@ -2386,7 +2432,7 @@ static struct ieee80211_supported_band wl1271_band_5ghz = { | |||
2386 | .n_channels = ARRAY_SIZE(wl1271_channels_5ghz), | 2432 | .n_channels = ARRAY_SIZE(wl1271_channels_5ghz), |
2387 | .bitrates = wl1271_rates_5ghz, | 2433 | .bitrates = wl1271_rates_5ghz, |
2388 | .n_bitrates = ARRAY_SIZE(wl1271_rates_5ghz), | 2434 | .n_bitrates = ARRAY_SIZE(wl1271_rates_5ghz), |
2389 | .ht_cap = WL1271_HT_CAP, | 2435 | .ht_cap = WL12XX_HT_CAP, |
2390 | }; | 2436 | }; |
2391 | 2437 | ||
2392 | static const u8 *wl1271_band_rate_to_idx[] = { | 2438 | static const u8 *wl1271_band_rate_to_idx[] = { |
@@ -2406,6 +2452,7 @@ static const struct ieee80211_ops wl1271_ops = { | |||
2406 | .set_key = wl1271_op_set_key, | 2452 | .set_key = wl1271_op_set_key, |
2407 | .hw_scan = wl1271_op_hw_scan, | 2453 | .hw_scan = wl1271_op_hw_scan, |
2408 | .bss_info_changed = wl1271_op_bss_info_changed, | 2454 | .bss_info_changed = wl1271_op_bss_info_changed, |
2455 | .set_frag_threshold = wl1271_op_set_frag_threshold, | ||
2409 | .set_rts_threshold = wl1271_op_set_rts_threshold, | 2456 | .set_rts_threshold = wl1271_op_set_rts_threshold, |
2410 | .conf_tx = wl1271_op_conf_tx, | 2457 | .conf_tx = wl1271_op_conf_tx, |
2411 | .get_tsf = wl1271_op_get_tsf, | 2458 | .get_tsf = wl1271_op_get_tsf, |
@@ -2590,6 +2637,8 @@ int wl1271_init_ieee80211(struct wl1271 *wl) | |||
2590 | wl->hw->queues = 4; | 2637 | wl->hw->queues = 4; |
2591 | wl->hw->max_rates = 1; | 2638 | wl->hw->max_rates = 1; |
2592 | 2639 | ||
2640 | wl->hw->wiphy->reg_notifier = wl1271_reg_notify; | ||
2641 | |||
2593 | SET_IEEE80211_DEV(wl->hw, wl1271_wl_to_dev(wl)); | 2642 | SET_IEEE80211_DEV(wl->hw, wl1271_wl_to_dev(wl)); |
2594 | 2643 | ||
2595 | return 0; | 2644 | return 0; |
diff --git a/drivers/net/wireless/wl12xx/wl1271_ps.c b/drivers/net/wireless/wl12xx/ps.c index e3c332e2f97c..60a3738eadb0 100644 --- a/drivers/net/wireless/wl12xx/wl1271_ps.c +++ b/drivers/net/wireless/wl12xx/ps.c | |||
@@ -21,9 +21,9 @@ | |||
21 | * | 21 | * |
22 | */ | 22 | */ |
23 | 23 | ||
24 | #include "wl1271_reg.h" | 24 | #include "reg.h" |
25 | #include "wl1271_ps.h" | 25 | #include "ps.h" |
26 | #include "wl1271_io.h" | 26 | #include "io.h" |
27 | 27 | ||
28 | #define WL1271_WAKEUP_TIMEOUT 500 | 28 | #define WL1271_WAKEUP_TIMEOUT 500 |
29 | 29 | ||
diff --git a/drivers/net/wireless/wl12xx/wl1271_ps.h b/drivers/net/wireless/wl12xx/ps.h index 6ba7b032736f..8415060f08e5 100644 --- a/drivers/net/wireless/wl12xx/wl1271_ps.h +++ b/drivers/net/wireless/wl12xx/ps.h | |||
@@ -21,11 +21,11 @@ | |||
21 | * | 21 | * |
22 | */ | 22 | */ |
23 | 23 | ||
24 | #ifndef __WL1271_PS_H__ | 24 | #ifndef __PS_H__ |
25 | #define __WL1271_PS_H__ | 25 | #define __PS_H__ |
26 | 26 | ||
27 | #include "wl1271.h" | 27 | #include "wl12xx.h" |
28 | #include "wl1271_acx.h" | 28 | #include "acx.h" |
29 | 29 | ||
30 | int wl1271_ps_set_mode(struct wl1271 *wl, enum wl1271_cmd_ps_mode mode, | 30 | int wl1271_ps_set_mode(struct wl1271 *wl, enum wl1271_cmd_ps_mode mode, |
31 | u32 rates, bool send); | 31 | u32 rates, bool send); |
diff --git a/drivers/net/wireless/wl12xx/wl1271_reg.h b/drivers/net/wireless/wl12xx/reg.h index 990960771528..990960771528 100644 --- a/drivers/net/wireless/wl12xx/wl1271_reg.h +++ b/drivers/net/wireless/wl12xx/reg.h | |||
diff --git a/drivers/net/wireless/wl12xx/wl1271_rx.c b/drivers/net/wireless/wl12xx/rx.c index cacfee56a0d0..682304c30b81 100644 --- a/drivers/net/wireless/wl12xx/wl1271_rx.c +++ b/drivers/net/wireless/wl12xx/rx.c | |||
@@ -23,11 +23,11 @@ | |||
23 | 23 | ||
24 | #include <linux/gfp.h> | 24 | #include <linux/gfp.h> |
25 | 25 | ||
26 | #include "wl1271.h" | 26 | #include "wl12xx.h" |
27 | #include "wl1271_acx.h" | 27 | #include "acx.h" |
28 | #include "wl1271_reg.h" | 28 | #include "reg.h" |
29 | #include "wl1271_rx.h" | 29 | #include "rx.h" |
30 | #include "wl1271_io.h" | 30 | #include "io.h" |
31 | 31 | ||
32 | static u8 wl1271_rx_get_mem_block(struct wl1271_fw_status *status, | 32 | static u8 wl1271_rx_get_mem_block(struct wl1271_fw_status *status, |
33 | u32 drv_rx_counter) | 33 | u32 drv_rx_counter) |
@@ -61,7 +61,7 @@ static void wl1271_rx_status(struct wl1271 *wl, | |||
61 | 61 | ||
62 | status->rate_idx = wl1271_rate_to_idx(desc->rate, desc_band); | 62 | status->rate_idx = wl1271_rate_to_idx(desc->rate, desc_band); |
63 | 63 | ||
64 | #ifdef CONFIG_WL1271_HT | 64 | #ifdef CONFIG_WL12XX_HT |
65 | /* 11n support */ | 65 | /* 11n support */ |
66 | if (desc->rate <= CONF_HW_RXTX_RATE_MCS0) | 66 | if (desc->rate <= CONF_HW_RXTX_RATE_MCS0) |
67 | status->flag |= RX_FLAG_HT; | 67 | status->flag |= RX_FLAG_HT; |
diff --git a/drivers/net/wireless/wl12xx/wl1271_rx.h b/drivers/net/wireless/wl12xx/rx.h index 6d41981ce53f..3abb26fe0364 100644 --- a/drivers/net/wireless/wl12xx/wl1271_rx.h +++ b/drivers/net/wireless/wl12xx/rx.h | |||
@@ -22,8 +22,8 @@ | |||
22 | * | 22 | * |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #ifndef __WL1271_RX_H__ | 25 | #ifndef __RX_H__ |
26 | #define __WL1271_RX_H__ | 26 | #define __RX_H__ |
27 | 27 | ||
28 | #include <linux/bitops.h> | 28 | #include <linux/bitops.h> |
29 | 29 | ||
diff --git a/drivers/net/wireless/wl12xx/wl1271_scan.c b/drivers/net/wireless/wl12xx/scan.c index e0661a543a35..f3f2c5b011ee 100644 --- a/drivers/net/wireless/wl12xx/wl1271_scan.c +++ b/drivers/net/wireless/wl12xx/scan.c | |||
@@ -23,10 +23,10 @@ | |||
23 | 23 | ||
24 | #include <linux/ieee80211.h> | 24 | #include <linux/ieee80211.h> |
25 | 25 | ||
26 | #include "wl1271.h" | 26 | #include "wl12xx.h" |
27 | #include "wl1271_cmd.h" | 27 | #include "cmd.h" |
28 | #include "wl1271_scan.h" | 28 | #include "scan.h" |
29 | #include "wl1271_acx.h" | 29 | #include "acx.h" |
30 | 30 | ||
31 | void wl1271_scan_complete_work(struct work_struct *work) | 31 | void wl1271_scan_complete_work(struct work_struct *work) |
32 | { | 32 | { |
diff --git a/drivers/net/wireless/wl12xx/wl1271_scan.h b/drivers/net/wireless/wl12xx/scan.h index 6d57127b5e6b..421a750add5a 100644 --- a/drivers/net/wireless/wl12xx/wl1271_scan.h +++ b/drivers/net/wireless/wl12xx/scan.h | |||
@@ -21,10 +21,10 @@ | |||
21 | * | 21 | * |
22 | */ | 22 | */ |
23 | 23 | ||
24 | #ifndef __WL1271_SCAN_H__ | 24 | #ifndef __SCAN_H__ |
25 | #define __WL1271_SCAN_H__ | 25 | #define __SCAN_H__ |
26 | 26 | ||
27 | #include "wl1271.h" | 27 | #include "wl12xx.h" |
28 | 28 | ||
29 | int wl1271_scan(struct wl1271 *wl, const u8 *ssid, size_t ssid_len, | 29 | int wl1271_scan(struct wl1271 *wl, const u8 *ssid, size_t ssid_len, |
30 | struct cfg80211_scan_request *req); | 30 | struct cfg80211_scan_request *req); |
diff --git a/drivers/net/wireless/wl12xx/wl1271_sdio.c b/drivers/net/wireless/wl12xx/sdio.c index 784ef3432641..93cbb8d5aba9 100644 --- a/drivers/net/wireless/wl12xx/wl1271_sdio.c +++ b/drivers/net/wireless/wl12xx/sdio.c | |||
@@ -32,9 +32,9 @@ | |||
32 | #include <linux/wl12xx.h> | 32 | #include <linux/wl12xx.h> |
33 | #include <linux/pm_runtime.h> | 33 | #include <linux/pm_runtime.h> |
34 | 34 | ||
35 | #include "wl1271.h" | 35 | #include "wl12xx.h" |
36 | #include "wl12xx_80211.h" | 36 | #include "wl12xx_80211.h" |
37 | #include "wl1271_io.h" | 37 | #include "io.h" |
38 | 38 | ||
39 | #ifndef SDIO_VENDOR_ID_TI | 39 | #ifndef SDIO_VENDOR_ID_TI |
40 | #define SDIO_VENDOR_ID_TI 0x0097 | 40 | #define SDIO_VENDOR_ID_TI 0x0097 |
diff --git a/drivers/net/wireless/wl12xx/wl1271_spi.c b/drivers/net/wireless/wl12xx/spi.c index ef801680773f..46714910f98c 100644 --- a/drivers/net/wireless/wl12xx/wl1271_spi.c +++ b/drivers/net/wireless/wl12xx/spi.c | |||
@@ -28,11 +28,11 @@ | |||
28 | #include <linux/wl12xx.h> | 28 | #include <linux/wl12xx.h> |
29 | #include <linux/slab.h> | 29 | #include <linux/slab.h> |
30 | 30 | ||
31 | #include "wl1271.h" | 31 | #include "wl12xx.h" |
32 | #include "wl12xx_80211.h" | 32 | #include "wl12xx_80211.h" |
33 | #include "wl1271_io.h" | 33 | #include "io.h" |
34 | 34 | ||
35 | #include "wl1271_reg.h" | 35 | #include "reg.h" |
36 | 36 | ||
37 | #define WSPI_CMD_READ 0x40000000 | 37 | #define WSPI_CMD_READ 0x40000000 |
38 | #define WSPI_CMD_WRITE 0x00000000 | 38 | #define WSPI_CMD_WRITE 0x00000000 |
diff --git a/drivers/net/wireless/wl12xx/wl1271_testmode.c b/drivers/net/wireless/wl12xx/testmode.c index 55ec4428922b..e64403b6896d 100644 --- a/drivers/net/wireless/wl12xx/wl1271_testmode.c +++ b/drivers/net/wireless/wl12xx/testmode.c | |||
@@ -20,13 +20,13 @@ | |||
20 | * 02110-1301 USA | 20 | * 02110-1301 USA |
21 | * | 21 | * |
22 | */ | 22 | */ |
23 | #include "wl1271_testmode.h" | 23 | #include "testmode.h" |
24 | 24 | ||
25 | #include <linux/slab.h> | 25 | #include <linux/slab.h> |
26 | #include <net/genetlink.h> | 26 | #include <net/genetlink.h> |
27 | 27 | ||
28 | #include "wl1271.h" | 28 | #include "wl12xx.h" |
29 | #include "wl1271_acx.h" | 29 | #include "acx.h" |
30 | 30 | ||
31 | #define WL1271_TM_MAX_DATA_LENGTH 1024 | 31 | #define WL1271_TM_MAX_DATA_LENGTH 1024 |
32 | 32 | ||
diff --git a/drivers/net/wireless/wl12xx/wl1271_testmode.h b/drivers/net/wireless/wl12xx/testmode.h index c196d28f9d9d..8071654259ea 100644 --- a/drivers/net/wireless/wl12xx/wl1271_testmode.h +++ b/drivers/net/wireless/wl12xx/testmode.h | |||
@@ -21,8 +21,8 @@ | |||
21 | * | 21 | * |
22 | */ | 22 | */ |
23 | 23 | ||
24 | #ifndef __WL1271_TESTMODE_H__ | 24 | #ifndef __TESTMODE_H__ |
25 | #define __WL1271_TESTMODE_H__ | 25 | #define __TESTMODE_H__ |
26 | 26 | ||
27 | #include <net/mac80211.h> | 27 | #include <net/mac80211.h> |
28 | 28 | ||
diff --git a/drivers/net/wireless/wl12xx/wl1271_tx.c b/drivers/net/wireless/wl12xx/tx.c index 279be5b98d9f..d332b3f6d0fa 100644 --- a/drivers/net/wireless/wl12xx/wl1271_tx.c +++ b/drivers/net/wireless/wl12xx/tx.c | |||
@@ -24,11 +24,11 @@ | |||
24 | #include <linux/kernel.h> | 24 | #include <linux/kernel.h> |
25 | #include <linux/module.h> | 25 | #include <linux/module.h> |
26 | 26 | ||
27 | #include "wl1271.h" | 27 | #include "wl12xx.h" |
28 | #include "wl1271_io.h" | 28 | #include "io.h" |
29 | #include "wl1271_reg.h" | 29 | #include "reg.h" |
30 | #include "wl1271_ps.h" | 30 | #include "ps.h" |
31 | #include "wl1271_tx.h" | 31 | #include "tx.h" |
32 | 32 | ||
33 | static int wl1271_alloc_tx_id(struct wl1271 *wl, struct sk_buff *skb) | 33 | static int wl1271_alloc_tx_id(struct wl1271 *wl, struct sk_buff *skb) |
34 | { | 34 | { |
@@ -209,7 +209,7 @@ u32 wl1271_tx_enabled_rates_get(struct wl1271 *wl, u32 rate_set) | |||
209 | rate_set >>= 1; | 209 | rate_set >>= 1; |
210 | } | 210 | } |
211 | 211 | ||
212 | #ifdef CONFIG_WL1271_HT | 212 | #ifdef CONFIG_WL12XX_HT |
213 | /* MCS rates indication are on bits 16 - 23 */ | 213 | /* MCS rates indication are on bits 16 - 23 */ |
214 | rate_set >>= HW_HT_RATES_OFFSET - band->n_bitrates; | 214 | rate_set >>= HW_HT_RATES_OFFSET - band->n_bitrates; |
215 | 215 | ||
diff --git a/drivers/net/wireless/wl12xx/wl1271_tx.h b/drivers/net/wireless/wl12xx/tx.h index 9dc6f228c0de..903e5dc69b7a 100644 --- a/drivers/net/wireless/wl12xx/wl1271_tx.h +++ b/drivers/net/wireless/wl12xx/tx.h | |||
@@ -22,8 +22,8 @@ | |||
22 | * | 22 | * |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #ifndef __WL1271_TX_H__ | 25 | #ifndef __TX_H__ |
26 | #define __WL1271_TX_H__ | 26 | #define __TX_H__ |
27 | 27 | ||
28 | #define TX_HW_BLOCK_SPARE 2 | 28 | #define TX_HW_BLOCK_SPARE 2 |
29 | #define TX_HW_BLOCK_SIZE 252 | 29 | #define TX_HW_BLOCK_SIZE 252 |
diff --git a/drivers/net/wireless/wl12xx/wl1271.h b/drivers/net/wireless/wl12xx/wl12xx.h index ab53162b4343..3c836e6063e6 100644 --- a/drivers/net/wireless/wl12xx/wl1271.h +++ b/drivers/net/wireless/wl12xx/wl12xx.h | |||
@@ -22,8 +22,8 @@ | |||
22 | * | 22 | * |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #ifndef __WL1271_H__ | 25 | #ifndef __WL12XX_H__ |
26 | #define __WL1271_H__ | 26 | #define __WL12XX_H__ |
27 | 27 | ||
28 | #include <linux/mutex.h> | 28 | #include <linux/mutex.h> |
29 | #include <linux/completion.h> | 29 | #include <linux/completion.h> |
@@ -32,8 +32,8 @@ | |||
32 | #include <linux/bitops.h> | 32 | #include <linux/bitops.h> |
33 | #include <net/mac80211.h> | 33 | #include <net/mac80211.h> |
34 | 34 | ||
35 | #include "wl1271_conf.h" | 35 | #include "conf.h" |
36 | #include "wl1271_ini.h" | 36 | #include "ini.h" |
37 | 37 | ||
38 | #define DRIVER_NAME "wl1271" | 38 | #define DRIVER_NAME "wl1271" |
39 | #define DRIVER_PREFIX DRIVER_NAME ": " | 39 | #define DRIVER_PREFIX DRIVER_NAME ": " |
diff --git a/drivers/net/wireless/zd1211rw/zd_chip.c b/drivers/net/wireless/zd1211rw/zd_chip.c index 87a95bcfee57..30f8d404958b 100644 --- a/drivers/net/wireless/zd1211rw/zd_chip.c +++ b/drivers/net/wireless/zd1211rw/zd_chip.c | |||
@@ -1448,7 +1448,7 @@ int zd_rfwritev_locked(struct zd_chip *chip, | |||
1448 | */ | 1448 | */ |
1449 | int zd_rfwrite_cr_locked(struct zd_chip *chip, u32 value) | 1449 | int zd_rfwrite_cr_locked(struct zd_chip *chip, u32 value) |
1450 | { | 1450 | { |
1451 | struct zd_ioreq16 ioreqs[] = { | 1451 | const struct zd_ioreq16 ioreqs[] = { |
1452 | { CR244, (value >> 16) & 0xff }, | 1452 | { CR244, (value >> 16) & 0xff }, |
1453 | { CR243, (value >> 8) & 0xff }, | 1453 | { CR243, (value >> 8) & 0xff }, |
1454 | { CR242, value & 0xff }, | 1454 | { CR242, value & 0xff }, |
@@ -1475,7 +1475,7 @@ int zd_rfwritev_cr_locked(struct zd_chip *chip, | |||
1475 | int zd_chip_set_multicast_hash(struct zd_chip *chip, | 1475 | int zd_chip_set_multicast_hash(struct zd_chip *chip, |
1476 | struct zd_mc_hash *hash) | 1476 | struct zd_mc_hash *hash) |
1477 | { | 1477 | { |
1478 | struct zd_ioreq32 ioreqs[] = { | 1478 | const struct zd_ioreq32 ioreqs[] = { |
1479 | { CR_GROUP_HASH_P1, hash->low }, | 1479 | { CR_GROUP_HASH_P1, hash->low }, |
1480 | { CR_GROUP_HASH_P2, hash->high }, | 1480 | { CR_GROUP_HASH_P2, hash->high }, |
1481 | }; | 1481 | }; |
diff --git a/drivers/ssb/b43_pci_bridge.c b/drivers/ssb/b43_pci_bridge.c index ef9c6a04ad8f..744d3f6e4709 100644 --- a/drivers/ssb/b43_pci_bridge.c +++ b/drivers/ssb/b43_pci_bridge.c | |||
@@ -24,6 +24,7 @@ static const struct pci_device_id b43_pci_bridge_tbl[] = { | |||
24 | { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4312) }, | 24 | { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4312) }, |
25 | { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4315) }, | 25 | { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4315) }, |
26 | { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4318) }, | 26 | { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4318) }, |
27 | { PCI_DEVICE(PCI_VENDOR_ID_BCM_GVC, 0x4318) }, | ||
27 | { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4319) }, | 28 | { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4319) }, |
28 | { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4320) }, | 29 | { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4320) }, |
29 | { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4321) }, | 30 | { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4321) }, |
diff --git a/drivers/ssb/pci.c b/drivers/ssb/pci.c index 6e88d2b603b4..f52966305e05 100644 --- a/drivers/ssb/pci.c +++ b/drivers/ssb/pci.c | |||
@@ -573,37 +573,34 @@ static int sprom_extract(struct ssb_bus *bus, struct ssb_sprom *out, | |||
573 | ssb_dprintk(KERN_DEBUG PFX "SPROM revision %d detected.\n", out->revision); | 573 | ssb_dprintk(KERN_DEBUG PFX "SPROM revision %d detected.\n", out->revision); |
574 | memset(out->et0mac, 0xFF, 6); /* preset et0 and et1 mac */ | 574 | memset(out->et0mac, 0xFF, 6); /* preset et0 and et1 mac */ |
575 | memset(out->et1mac, 0xFF, 6); | 575 | memset(out->et1mac, 0xFF, 6); |
576 | |||
576 | if ((bus->chip_id & 0xFF00) == 0x4400) { | 577 | if ((bus->chip_id & 0xFF00) == 0x4400) { |
577 | /* Workaround: The BCM44XX chip has a stupid revision | 578 | /* Workaround: The BCM44XX chip has a stupid revision |
578 | * number stored in the SPROM. | 579 | * number stored in the SPROM. |
579 | * Always extract r1. */ | 580 | * Always extract r1. */ |
580 | out->revision = 1; | 581 | out->revision = 1; |
582 | ssb_dprintk(KERN_DEBUG PFX "SPROM treated as revision %d\n", out->revision); | ||
583 | } | ||
584 | |||
585 | switch (out->revision) { | ||
586 | case 1: | ||
587 | case 2: | ||
588 | case 3: | ||
581 | sprom_extract_r123(out, in); | 589 | sprom_extract_r123(out, in); |
582 | } else if (bus->chip_id == 0x4321) { | 590 | break; |
583 | /* the BCM4328 has a chipid == 0x4321 and a rev 4 SPROM */ | 591 | case 4: |
584 | out->revision = 4; | 592 | case 5: |
585 | sprom_extract_r45(out, in); | 593 | sprom_extract_r45(out, in); |
586 | } else { | 594 | break; |
587 | switch (out->revision) { | 595 | case 8: |
588 | case 1: | 596 | sprom_extract_r8(out, in); |
589 | case 2: | 597 | break; |
590 | case 3: | 598 | default: |
591 | sprom_extract_r123(out, in); | 599 | ssb_printk(KERN_WARNING PFX "Unsupported SPROM" |
592 | break; | 600 | " revision %d detected. Will extract" |
593 | case 4: | 601 | " v1\n", out->revision); |
594 | case 5: | 602 | out->revision = 1; |
595 | sprom_extract_r45(out, in); | 603 | sprom_extract_r123(out, in); |
596 | break; | ||
597 | case 8: | ||
598 | sprom_extract_r8(out, in); | ||
599 | break; | ||
600 | default: | ||
601 | ssb_printk(KERN_WARNING PFX "Unsupported SPROM" | ||
602 | " revision %d detected. Will extract" | ||
603 | " v1\n", out->revision); | ||
604 | out->revision = 1; | ||
605 | sprom_extract_r123(out, in); | ||
606 | } | ||
607 | } | 604 | } |
608 | 605 | ||
609 | if (out->boardflags_lo == 0xFFFF) | 606 | if (out->boardflags_lo == 0xFFFF) |
@@ -618,7 +615,7 @@ static int ssb_pci_sprom_get(struct ssb_bus *bus, | |||
618 | struct ssb_sprom *sprom) | 615 | struct ssb_sprom *sprom) |
619 | { | 616 | { |
620 | const struct ssb_sprom *fallback; | 617 | const struct ssb_sprom *fallback; |
621 | int err = -ENOMEM; | 618 | int err; |
622 | u16 *buf; | 619 | u16 *buf; |
623 | 620 | ||
624 | if (!ssb_is_sprom_available(bus)) { | 621 | if (!ssb_is_sprom_available(bus)) { |
@@ -645,7 +642,7 @@ static int ssb_pci_sprom_get(struct ssb_bus *bus, | |||
645 | 642 | ||
646 | buf = kcalloc(SSB_SPROMSIZE_WORDS_R123, sizeof(u16), GFP_KERNEL); | 643 | buf = kcalloc(SSB_SPROMSIZE_WORDS_R123, sizeof(u16), GFP_KERNEL); |
647 | if (!buf) | 644 | if (!buf) |
648 | goto out; | 645 | return -ENOMEM; |
649 | bus->sprom_size = SSB_SPROMSIZE_WORDS_R123; | 646 | bus->sprom_size = SSB_SPROMSIZE_WORDS_R123; |
650 | sprom_do_read(bus, buf); | 647 | sprom_do_read(bus, buf); |
651 | err = sprom_check_crc(buf, bus->sprom_size); | 648 | err = sprom_check_crc(buf, bus->sprom_size); |
@@ -655,7 +652,7 @@ static int ssb_pci_sprom_get(struct ssb_bus *bus, | |||
655 | buf = kcalloc(SSB_SPROMSIZE_WORDS_R4, sizeof(u16), | 652 | buf = kcalloc(SSB_SPROMSIZE_WORDS_R4, sizeof(u16), |
656 | GFP_KERNEL); | 653 | GFP_KERNEL); |
657 | if (!buf) | 654 | if (!buf) |
658 | goto out; | 655 | return -ENOMEM; |
659 | bus->sprom_size = SSB_SPROMSIZE_WORDS_R4; | 656 | bus->sprom_size = SSB_SPROMSIZE_WORDS_R4; |
660 | sprom_do_read(bus, buf); | 657 | sprom_do_read(bus, buf); |
661 | err = sprom_check_crc(buf, bus->sprom_size); | 658 | err = sprom_check_crc(buf, bus->sprom_size); |
@@ -677,7 +674,6 @@ static int ssb_pci_sprom_get(struct ssb_bus *bus, | |||
677 | 674 | ||
678 | out_free: | 675 | out_free: |
679 | kfree(buf); | 676 | kfree(buf); |
680 | out: | ||
681 | return err; | 677 | return err; |
682 | } | 678 | } |
683 | 679 | ||
diff --git a/include/linux/average.h b/include/linux/average.h new file mode 100644 index 000000000000..7706e40f95fa --- /dev/null +++ b/include/linux/average.h | |||
@@ -0,0 +1,32 @@ | |||
1 | #ifndef _LINUX_AVERAGE_H | ||
2 | #define _LINUX_AVERAGE_H | ||
3 | |||
4 | #include <linux/kernel.h> | ||
5 | |||
6 | /* Exponentially weighted moving average (EWMA) */ | ||
7 | |||
8 | /* For more documentation see lib/average.c */ | ||
9 | |||
10 | struct ewma { | ||
11 | unsigned long internal; | ||
12 | unsigned long factor; | ||
13 | unsigned long weight; | ||
14 | }; | ||
15 | |||
16 | extern void ewma_init(struct ewma *avg, unsigned long factor, | ||
17 | unsigned long weight); | ||
18 | |||
19 | extern struct ewma *ewma_add(struct ewma *avg, unsigned long val); | ||
20 | |||
21 | /** | ||
22 | * ewma_read() - Get average value | ||
23 | * @avg: Average structure | ||
24 | * | ||
25 | * Returns the average value held in @avg. | ||
26 | */ | ||
27 | static inline unsigned long ewma_read(const struct ewma *avg) | ||
28 | { | ||
29 | return DIV_ROUND_CLOSEST(avg->internal, avg->factor); | ||
30 | } | ||
31 | |||
32 | #endif /* _LINUX_AVERAGE_H */ | ||
diff --git a/include/linux/nl80211.h b/include/linux/nl80211.h index fb877b5621b7..d706bf3badc8 100644 --- a/include/linux/nl80211.h +++ b/include/linux/nl80211.h | |||
@@ -804,6 +804,30 @@ enum nl80211_commands { | |||
804 | * @NL80211_ATTR_SUPPORT_IBSS_RSN: The device supports IBSS RSN, which mostly | 804 | * @NL80211_ATTR_SUPPORT_IBSS_RSN: The device supports IBSS RSN, which mostly |
805 | * means support for per-station GTKs. | 805 | * means support for per-station GTKs. |
806 | * | 806 | * |
807 | * @NL80211_ATTR_WIPHY_ANTENNA_TX: Bitmap of allowed antennas for transmitting. | ||
808 | * This can be used to mask out antennas which are not attached or should | ||
809 | * not be used for transmitting. If an antenna is not selected in this | ||
810 | * bitmap the hardware is not allowed to transmit on this antenna. | ||
811 | * | ||
812 | * Each bit represents one antenna, starting with antenna 1 at the first | ||
813 | * bit. Depending on which antennas are selected in the bitmap, 802.11n | ||
814 | * drivers can derive which chainmasks to use (if all antennas belonging to | ||
815 | * a particular chain are disabled this chain should be disabled) and if | ||
816 | * a chain has diversity antennas wether diversity should be used or not. | ||
817 | * HT capabilities (STBC, TX Beamforming, Antenna selection) can be | ||
818 | * derived from the available chains after applying the antenna mask. | ||
819 | * Non-802.11n drivers can derive wether to use diversity or not. | ||
820 | * Drivers may reject configurations or RX/TX mask combinations they cannot | ||
821 | * support by returning -EINVAL. | ||
822 | * | ||
823 | * @NL80211_ATTR_WIPHY_ANTENNA_RX: Bitmap of allowed antennas for receiving. | ||
824 | * This can be used to mask out antennas which are not attached or should | ||
825 | * not be used for receiving. If an antenna is not selected in this bitmap | ||
826 | * the hardware should not be configured to receive on this antenna. | ||
827 | * For a more detailed descripton see @NL80211_ATTR_WIPHY_ANTENNA_TX. | ||
828 | * | ||
829 | * @NL80211_ATTR_MCAST_RATE: Multicast tx rate (in 100 kbps) for IBSS | ||
830 | * | ||
807 | * @NL80211_ATTR_MAX: highest attribute number currently defined | 831 | * @NL80211_ATTR_MAX: highest attribute number currently defined |
808 | * @__NL80211_ATTR_AFTER_LAST: internal use | 832 | * @__NL80211_ATTR_AFTER_LAST: internal use |
809 | */ | 833 | */ |
@@ -973,6 +997,11 @@ enum nl80211_attrs { | |||
973 | 997 | ||
974 | NL80211_ATTR_SUPPORT_IBSS_RSN, | 998 | NL80211_ATTR_SUPPORT_IBSS_RSN, |
975 | 999 | ||
1000 | NL80211_ATTR_WIPHY_ANTENNA_TX, | ||
1001 | NL80211_ATTR_WIPHY_ANTENNA_RX, | ||
1002 | |||
1003 | NL80211_ATTR_MCAST_RATE, | ||
1004 | |||
976 | /* add attributes here, update the policy in nl80211.c */ | 1005 | /* add attributes here, update the policy in nl80211.c */ |
977 | 1006 | ||
978 | __NL80211_ATTR_AFTER_LAST, | 1007 | __NL80211_ATTR_AFTER_LAST, |
@@ -1790,6 +1819,8 @@ enum nl80211_ps_state { | |||
1790 | * the minimum amount the RSSI level must change after an event before a | 1819 | * the minimum amount the RSSI level must change after an event before a |
1791 | * new event may be issued (to reduce effects of RSSI oscillation). | 1820 | * new event may be issued (to reduce effects of RSSI oscillation). |
1792 | * @NL80211_ATTR_CQM_RSSI_THRESHOLD_EVENT: RSSI threshold event | 1821 | * @NL80211_ATTR_CQM_RSSI_THRESHOLD_EVENT: RSSI threshold event |
1822 | * @NL80211_ATTR_CQM_PKT_LOSS_EVENT: a u32 value indicating that this many | ||
1823 | * consecutive packets were not acknowledged by the peer | ||
1793 | * @__NL80211_ATTR_CQM_AFTER_LAST: internal | 1824 | * @__NL80211_ATTR_CQM_AFTER_LAST: internal |
1794 | * @NL80211_ATTR_CQM_MAX: highest key attribute | 1825 | * @NL80211_ATTR_CQM_MAX: highest key attribute |
1795 | */ | 1826 | */ |
@@ -1798,6 +1829,7 @@ enum nl80211_attr_cqm { | |||
1798 | NL80211_ATTR_CQM_RSSI_THOLD, | 1829 | NL80211_ATTR_CQM_RSSI_THOLD, |
1799 | NL80211_ATTR_CQM_RSSI_HYST, | 1830 | NL80211_ATTR_CQM_RSSI_HYST, |
1800 | NL80211_ATTR_CQM_RSSI_THRESHOLD_EVENT, | 1831 | NL80211_ATTR_CQM_RSSI_THRESHOLD_EVENT, |
1832 | NL80211_ATTR_CQM_PKT_LOSS_EVENT, | ||
1801 | 1833 | ||
1802 | /* keep last */ | 1834 | /* keep last */ |
1803 | __NL80211_ATTR_CQM_AFTER_LAST, | 1835 | __NL80211_ATTR_CQM_AFTER_LAST, |
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index c6bcfe93b9ca..32bd56949604 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h | |||
@@ -2047,6 +2047,7 @@ | |||
2047 | #define PCI_DEVICE_ID_AFAVLAB_P030 0x2182 | 2047 | #define PCI_DEVICE_ID_AFAVLAB_P030 0x2182 |
2048 | #define PCI_SUBDEVICE_ID_AFAVLAB_P061 0x2150 | 2048 | #define PCI_SUBDEVICE_ID_AFAVLAB_P061 0x2150 |
2049 | 2049 | ||
2050 | #define PCI_VENDOR_ID_BCM_GVC 0x14a4 | ||
2050 | #define PCI_VENDOR_ID_BROADCOM 0x14e4 | 2051 | #define PCI_VENDOR_ID_BROADCOM 0x14e4 |
2051 | #define PCI_DEVICE_ID_TIGON3_5752 0x1600 | 2052 | #define PCI_DEVICE_ID_TIGON3_5752 0x1600 |
2052 | #define PCI_DEVICE_ID_TIGON3_5752M 0x1601 | 2053 | #define PCI_DEVICE_ID_TIGON3_5752M 0x1601 |
diff --git a/include/net/cfg80211.h b/include/net/cfg80211.h index 772dea243e5d..0663945cfa48 100644 --- a/include/net/cfg80211.h +++ b/include/net/cfg80211.h | |||
@@ -923,6 +923,7 @@ struct cfg80211_disassoc_request { | |||
923 | * @privacy: this is a protected network, keys will be configured | 923 | * @privacy: this is a protected network, keys will be configured |
924 | * after joining | 924 | * after joining |
925 | * @basic_rates: bitmap of basic rates to use when creating the IBSS | 925 | * @basic_rates: bitmap of basic rates to use when creating the IBSS |
926 | * @mcast_rate: per-band multicast rate index + 1 (0: disabled) | ||
926 | */ | 927 | */ |
927 | struct cfg80211_ibss_params { | 928 | struct cfg80211_ibss_params { |
928 | u8 *ssid; | 929 | u8 *ssid; |
@@ -934,6 +935,7 @@ struct cfg80211_ibss_params { | |||
934 | u32 basic_rates; | 935 | u32 basic_rates; |
935 | bool channel_fixed; | 936 | bool channel_fixed; |
936 | bool privacy; | 937 | bool privacy; |
938 | int mcast_rate[IEEE80211_NUM_BANDS]; | ||
937 | }; | 939 | }; |
938 | 940 | ||
939 | /** | 941 | /** |
@@ -1304,6 +1306,9 @@ struct cfg80211_ops { | |||
1304 | void (*mgmt_frame_register)(struct wiphy *wiphy, | 1306 | void (*mgmt_frame_register)(struct wiphy *wiphy, |
1305 | struct net_device *dev, | 1307 | struct net_device *dev, |
1306 | u16 frame_type, bool reg); | 1308 | u16 frame_type, bool reg); |
1309 | |||
1310 | int (*set_antenna)(struct wiphy *wiphy, u32 tx_ant, u32 rx_ant); | ||
1311 | int (*get_antenna)(struct wiphy *wiphy, u32 *tx_ant, u32 *rx_ant); | ||
1307 | }; | 1312 | }; |
1308 | 1313 | ||
1309 | /* | 1314 | /* |
@@ -2596,6 +2601,18 @@ void cfg80211_cqm_rssi_notify(struct net_device *dev, | |||
2596 | enum nl80211_cqm_rssi_threshold_event rssi_event, | 2601 | enum nl80211_cqm_rssi_threshold_event rssi_event, |
2597 | gfp_t gfp); | 2602 | gfp_t gfp); |
2598 | 2603 | ||
2604 | /** | ||
2605 | * cfg80211_cqm_pktloss_notify - notify userspace about packetloss to peer | ||
2606 | * @dev: network device | ||
2607 | * @peer: peer's MAC address | ||
2608 | * @num_packets: how many packets were lost -- should be a fixed threshold | ||
2609 | * but probably no less than maybe 50, or maybe a throughput dependent | ||
2610 | * threshold (to account for temporary interference) | ||
2611 | * @gfp: context flags | ||
2612 | */ | ||
2613 | void cfg80211_cqm_pktloss_notify(struct net_device *dev, | ||
2614 | const u8 *peer, u32 num_packets, gfp_t gfp); | ||
2615 | |||
2599 | /* Logging, debugging and troubleshooting/diagnostic helpers. */ | 2616 | /* Logging, debugging and troubleshooting/diagnostic helpers. */ |
2600 | 2617 | ||
2601 | /* wiphy_printk helpers, similar to dev_printk */ | 2618 | /* wiphy_printk helpers, similar to dev_printk */ |
diff --git a/include/net/mac80211.h b/include/net/mac80211.h index 9fdf982d1286..eaa4affd40cd 100644 --- a/include/net/mac80211.h +++ b/include/net/mac80211.h | |||
@@ -97,6 +97,20 @@ enum ieee80211_max_queues { | |||
97 | }; | 97 | }; |
98 | 98 | ||
99 | /** | 99 | /** |
100 | * enum ieee80211_ac_numbers - AC numbers as used in mac80211 | ||
101 | * @IEEE80211_AC_VO: voice | ||
102 | * @IEEE80211_AC_VI: video | ||
103 | * @IEEE80211_AC_BE: best effort | ||
104 | * @IEEE80211_AC_BK: background | ||
105 | */ | ||
106 | enum ieee80211_ac_numbers { | ||
107 | IEEE80211_AC_VO = 0, | ||
108 | IEEE80211_AC_VI = 1, | ||
109 | IEEE80211_AC_BE = 2, | ||
110 | IEEE80211_AC_BK = 3, | ||
111 | }; | ||
112 | |||
113 | /** | ||
100 | * struct ieee80211_tx_queue_params - transmit queue configuration | 114 | * struct ieee80211_tx_queue_params - transmit queue configuration |
101 | * | 115 | * |
102 | * The information provided in this structure is required for QoS | 116 | * The information provided in this structure is required for QoS |
@@ -205,6 +219,7 @@ enum ieee80211_bss_change { | |||
205 | * @basic_rates: bitmap of basic rates, each bit stands for an | 219 | * @basic_rates: bitmap of basic rates, each bit stands for an |
206 | * index into the rate table configured by the driver in | 220 | * index into the rate table configured by the driver in |
207 | * the current band. | 221 | * the current band. |
222 | * @mcast_rate: per-band multicast rate index + 1 (0: disabled) | ||
208 | * @bssid: The BSSID for this BSS | 223 | * @bssid: The BSSID for this BSS |
209 | * @enable_beacon: whether beaconing should be enabled or not | 224 | * @enable_beacon: whether beaconing should be enabled or not |
210 | * @channel_type: Channel type for this BSS -- the hardware might be | 225 | * @channel_type: Channel type for this BSS -- the hardware might be |
@@ -244,6 +259,7 @@ struct ieee80211_bss_conf { | |||
244 | u16 assoc_capability; | 259 | u16 assoc_capability; |
245 | u64 timestamp; | 260 | u64 timestamp; |
246 | u32 basic_rates; | 261 | u32 basic_rates; |
262 | int mcast_rate[IEEE80211_NUM_BANDS]; | ||
247 | u16 ht_operation_mode; | 263 | u16 ht_operation_mode; |
248 | s32 cqm_rssi_thold; | 264 | s32 cqm_rssi_thold; |
249 | u32 cqm_rssi_hyst; | 265 | u32 cqm_rssi_hyst; |
@@ -1652,6 +1668,11 @@ enum ieee80211_ampdu_mlme_action { | |||
1652 | * and IV16) for the given key from hardware. | 1668 | * and IV16) for the given key from hardware. |
1653 | * The callback must be atomic. | 1669 | * The callback must be atomic. |
1654 | * | 1670 | * |
1671 | * @set_frag_threshold: Configuration of fragmentation threshold. Assign this | ||
1672 | * if the device does fragmentation by itself; if this callback is | ||
1673 | * implemented then the stack will not do fragmentation. | ||
1674 | * The callback can sleep. | ||
1675 | * | ||
1655 | * @set_rts_threshold: Configuration of RTS threshold (if device needs it) | 1676 | * @set_rts_threshold: Configuration of RTS threshold (if device needs it) |
1656 | * The callback can sleep. | 1677 | * The callback can sleep. |
1657 | * | 1678 | * |
@@ -1724,6 +1745,13 @@ enum ieee80211_ampdu_mlme_action { | |||
1724 | * completion of the channel switch. | 1745 | * completion of the channel switch. |
1725 | * | 1746 | * |
1726 | * @napi_poll: Poll Rx queue for incoming data frames. | 1747 | * @napi_poll: Poll Rx queue for incoming data frames. |
1748 | * | ||
1749 | * @set_antenna: Set antenna configuration (tx_ant, rx_ant) on the device. | ||
1750 | * Parameters are bitmaps of allowed antennas to use for TX/RX. Drivers may | ||
1751 | * reject TX/RX mask combinations they cannot support by returning -EINVAL | ||
1752 | * (also see nl80211.h @NL80211_ATTR_WIPHY_ANTENNA_TX). | ||
1753 | * | ||
1754 | * @get_antenna: Get current antenna configuration from device (tx_ant, rx_ant). | ||
1727 | */ | 1755 | */ |
1728 | struct ieee80211_ops { | 1756 | struct ieee80211_ops { |
1729 | int (*tx)(struct ieee80211_hw *hw, struct sk_buff *skb); | 1757 | int (*tx)(struct ieee80211_hw *hw, struct sk_buff *skb); |
@@ -1765,6 +1793,7 @@ struct ieee80211_ops { | |||
1765 | struct ieee80211_low_level_stats *stats); | 1793 | struct ieee80211_low_level_stats *stats); |
1766 | void (*get_tkip_seq)(struct ieee80211_hw *hw, u8 hw_key_idx, | 1794 | void (*get_tkip_seq)(struct ieee80211_hw *hw, u8 hw_key_idx, |
1767 | u32 *iv32, u16 *iv16); | 1795 | u32 *iv32, u16 *iv16); |
1796 | int (*set_frag_threshold)(struct ieee80211_hw *hw, u32 value); | ||
1768 | int (*set_rts_threshold)(struct ieee80211_hw *hw, u32 value); | 1797 | int (*set_rts_threshold)(struct ieee80211_hw *hw, u32 value); |
1769 | int (*sta_add)(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | 1798 | int (*sta_add)(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
1770 | struct ieee80211_sta *sta); | 1799 | struct ieee80211_sta *sta); |
@@ -1793,6 +1822,8 @@ struct ieee80211_ops { | |||
1793 | void (*channel_switch)(struct ieee80211_hw *hw, | 1822 | void (*channel_switch)(struct ieee80211_hw *hw, |
1794 | struct ieee80211_channel_switch *ch_switch); | 1823 | struct ieee80211_channel_switch *ch_switch); |
1795 | int (*napi_poll)(struct ieee80211_hw *hw, int budget); | 1824 | int (*napi_poll)(struct ieee80211_hw *hw, int budget); |
1825 | int (*set_antenna)(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant); | ||
1826 | int (*get_antenna)(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant); | ||
1796 | }; | 1827 | }; |
1797 | 1828 | ||
1798 | /** | 1829 | /** |
@@ -2501,6 +2532,21 @@ void ieee80211_sta_block_awake(struct ieee80211_hw *hw, | |||
2501 | struct ieee80211_sta *pubsta, bool block); | 2532 | struct ieee80211_sta *pubsta, bool block); |
2502 | 2533 | ||
2503 | /** | 2534 | /** |
2535 | * ieee80211_ap_probereq_get - retrieve a Probe Request template | ||
2536 | * @hw: pointer obtained from ieee80211_alloc_hw(). | ||
2537 | * @vif: &struct ieee80211_vif pointer from the add_interface callback. | ||
2538 | * | ||
2539 | * Creates a Probe Request template which can, for example, be uploaded to | ||
2540 | * hardware. The template is filled with bssid, ssid and supported rate | ||
2541 | * information. This function must only be called from within the | ||
2542 | * .bss_info_changed callback function and only in managed mode. The function | ||
2543 | * is only useful when the interface is associated, otherwise it will return | ||
2544 | * NULL. | ||
2545 | */ | ||
2546 | struct sk_buff *ieee80211_ap_probereq_get(struct ieee80211_hw *hw, | ||
2547 | struct ieee80211_vif *vif); | ||
2548 | |||
2549 | /** | ||
2504 | * ieee80211_beacon_loss - inform hardware does not receive beacons | 2550 | * ieee80211_beacon_loss - inform hardware does not receive beacons |
2505 | * | 2551 | * |
2506 | * @vif: &struct ieee80211_vif pointer from the add_interface callback. | 2552 | * @vif: &struct ieee80211_vif pointer from the add_interface callback. |
@@ -2640,7 +2686,7 @@ enum rate_control_changed { | |||
2640 | * @rate_idx_mask: user-requested rate mask (not MCS for now) | 2686 | * @rate_idx_mask: user-requested rate mask (not MCS for now) |
2641 | * @skb: the skb that will be transmitted, the control information in it needs | 2687 | * @skb: the skb that will be transmitted, the control information in it needs |
2642 | * to be filled in | 2688 | * to be filled in |
2643 | * @ap: whether this frame is sent out in AP mode | 2689 | * @bss: whether this frame is sent out in AP or IBSS mode |
2644 | */ | 2690 | */ |
2645 | struct ieee80211_tx_rate_control { | 2691 | struct ieee80211_tx_rate_control { |
2646 | struct ieee80211_hw *hw; | 2692 | struct ieee80211_hw *hw; |
@@ -2651,7 +2697,7 @@ struct ieee80211_tx_rate_control { | |||
2651 | bool rts, short_preamble; | 2697 | bool rts, short_preamble; |
2652 | u8 max_rate_idx; | 2698 | u8 max_rate_idx; |
2653 | u32 rate_idx_mask; | 2699 | u32 rate_idx_mask; |
2654 | bool ap; | 2700 | bool bss; |
2655 | }; | 2701 | }; |
2656 | 2702 | ||
2657 | struct rate_control_ops { | 2703 | struct rate_control_ops { |
diff --git a/include/net/regulatory.h b/include/net/regulatory.h index 9e103a4e91ee..356d6e3dc20a 100644 --- a/include/net/regulatory.h +++ b/include/net/regulatory.h | |||
@@ -43,6 +43,12 @@ enum environment_cap { | |||
43 | * @intersect: indicates whether the wireless core should intersect | 43 | * @intersect: indicates whether the wireless core should intersect |
44 | * the requested regulatory domain with the presently set regulatory | 44 | * the requested regulatory domain with the presently set regulatory |
45 | * domain. | 45 | * domain. |
46 | * @processed: indicates whether or not this requests has already been | ||
47 | * processed. When the last request is processed it means that the | ||
48 | * currently regulatory domain set on cfg80211 is updated from | ||
49 | * CRDA and can be used by other regulatory requests. When a | ||
50 | * the last request is not yet processed we must yield until it | ||
51 | * is processed before processing any new requests. | ||
46 | * @country_ie_checksum: checksum of the last processed and accepted | 52 | * @country_ie_checksum: checksum of the last processed and accepted |
47 | * country IE | 53 | * country IE |
48 | * @country_ie_env: lets us know if the AP is telling us we are outdoor, | 54 | * @country_ie_env: lets us know if the AP is telling us we are outdoor, |
@@ -54,6 +60,7 @@ struct regulatory_request { | |||
54 | enum nl80211_reg_initiator initiator; | 60 | enum nl80211_reg_initiator initiator; |
55 | char alpha2[2]; | 61 | char alpha2[2]; |
56 | bool intersect; | 62 | bool intersect; |
63 | bool processed; | ||
57 | enum environment_cap country_ie_env; | 64 | enum environment_cap country_ie_env; |
58 | struct list_head list; | 65 | struct list_head list; |
59 | }; | 66 | }; |
diff --git a/lib/Kconfig b/lib/Kconfig index fa9bf2c06199..3116aa631af6 100644 --- a/lib/Kconfig +++ b/lib/Kconfig | |||
@@ -210,4 +210,7 @@ config GENERIC_ATOMIC64 | |||
210 | config LRU_CACHE | 210 | config LRU_CACHE |
211 | tristate | 211 | tristate |
212 | 212 | ||
213 | config AVERAGE | ||
214 | bool | ||
215 | |||
213 | endmenu | 216 | endmenu |
diff --git a/lib/Makefile b/lib/Makefile index e6a3763b8212..76d3b8514903 100644 --- a/lib/Makefile +++ b/lib/Makefile | |||
@@ -106,6 +106,8 @@ obj-$(CONFIG_GENERIC_ATOMIC64) += atomic64.o | |||
106 | 106 | ||
107 | obj-$(CONFIG_ATOMIC64_SELFTEST) += atomic64_test.o | 107 | obj-$(CONFIG_ATOMIC64_SELFTEST) += atomic64_test.o |
108 | 108 | ||
109 | obj-$(CONFIG_AVERAGE) += average.o | ||
110 | |||
109 | hostprogs-y := gen_crc32table | 111 | hostprogs-y := gen_crc32table |
110 | clean-files := crc32table.h | 112 | clean-files := crc32table.h |
111 | 113 | ||
diff --git a/lib/average.c b/lib/average.c new file mode 100644 index 000000000000..f1d1b4660c42 --- /dev/null +++ b/lib/average.c | |||
@@ -0,0 +1,57 @@ | |||
1 | /* | ||
2 | * lib/average.c | ||
3 | * | ||
4 | * This source code is licensed under the GNU General Public License, | ||
5 | * Version 2. See the file COPYING for more details. | ||
6 | */ | ||
7 | |||
8 | #include <linux/module.h> | ||
9 | #include <linux/average.h> | ||
10 | #include <linux/bug.h> | ||
11 | |||
12 | /** | ||
13 | * DOC: Exponentially Weighted Moving Average (EWMA) | ||
14 | * | ||
15 | * These are generic functions for calculating Exponentially Weighted Moving | ||
16 | * Averages (EWMA). We keep a structure with the EWMA parameters and a scaled | ||
17 | * up internal representation of the average value to prevent rounding errors. | ||
18 | * The factor for scaling up and the exponential weight (or decay rate) have to | ||
19 | * be specified thru the init fuction. The structure should not be accessed | ||
20 | * directly but only thru the helper functions. | ||
21 | */ | ||
22 | |||
23 | /** | ||
24 | * ewma_init() - Initialize EWMA parameters | ||
25 | * @avg: Average structure | ||
26 | * @factor: Factor to use for the scaled up internal value. The maximum value | ||
27 | * of averages can be ULONG_MAX/(factor*weight). | ||
28 | * @weight: Exponential weight, or decay rate. This defines how fast the | ||
29 | * influence of older values decreases. Has to be bigger than 1. | ||
30 | * | ||
31 | * Initialize the EWMA parameters for a given struct ewma @avg. | ||
32 | */ | ||
33 | void ewma_init(struct ewma *avg, unsigned long factor, unsigned long weight) | ||
34 | { | ||
35 | WARN_ON(weight <= 1 || factor == 0); | ||
36 | avg->internal = 0; | ||
37 | avg->weight = weight; | ||
38 | avg->factor = factor; | ||
39 | } | ||
40 | EXPORT_SYMBOL(ewma_init); | ||
41 | |||
42 | /** | ||
43 | * ewma_add() - Exponentially weighted moving average (EWMA) | ||
44 | * @avg: Average structure | ||
45 | * @val: Current value | ||
46 | * | ||
47 | * Add a sample to the average. | ||
48 | */ | ||
49 | struct ewma *ewma_add(struct ewma *avg, unsigned long val) | ||
50 | { | ||
51 | avg->internal = avg->internal ? | ||
52 | (((avg->internal * (avg->weight - 1)) + | ||
53 | (val * avg->factor)) / avg->weight) : | ||
54 | (val * avg->factor); | ||
55 | return avg; | ||
56 | } | ||
57 | EXPORT_SYMBOL(ewma_add); | ||
diff --git a/net/mac80211/cfg.c b/net/mac80211/cfg.c index 18bd0e550600..0c544074479e 100644 --- a/net/mac80211/cfg.c +++ b/net/mac80211/cfg.c | |||
@@ -1299,6 +1299,13 @@ static int ieee80211_set_wiphy_params(struct wiphy *wiphy, u32 changed) | |||
1299 | struct ieee80211_local *local = wiphy_priv(wiphy); | 1299 | struct ieee80211_local *local = wiphy_priv(wiphy); |
1300 | int err; | 1300 | int err; |
1301 | 1301 | ||
1302 | if (changed & WIPHY_PARAM_FRAG_THRESHOLD) { | ||
1303 | err = drv_set_frag_threshold(local, wiphy->frag_threshold); | ||
1304 | |||
1305 | if (err) | ||
1306 | return err; | ||
1307 | } | ||
1308 | |||
1302 | if (changed & WIPHY_PARAM_COVERAGE_CLASS) { | 1309 | if (changed & WIPHY_PARAM_COVERAGE_CLASS) { |
1303 | err = drv_set_coverage_class(local, wiphy->coverage_class); | 1310 | err = drv_set_coverage_class(local, wiphy->coverage_class); |
1304 | 1311 | ||
@@ -1621,6 +1628,23 @@ static void ieee80211_mgmt_frame_register(struct wiphy *wiphy, | |||
1621 | ieee80211_queue_work(&local->hw, &local->reconfig_filter); | 1628 | ieee80211_queue_work(&local->hw, &local->reconfig_filter); |
1622 | } | 1629 | } |
1623 | 1630 | ||
1631 | static int ieee80211_set_antenna(struct wiphy *wiphy, u32 tx_ant, u32 rx_ant) | ||
1632 | { | ||
1633 | struct ieee80211_local *local = wiphy_priv(wiphy); | ||
1634 | |||
1635 | if (local->started) | ||
1636 | return -EOPNOTSUPP; | ||
1637 | |||
1638 | return drv_set_antenna(local, tx_ant, rx_ant); | ||
1639 | } | ||
1640 | |||
1641 | static int ieee80211_get_antenna(struct wiphy *wiphy, u32 *tx_ant, u32 *rx_ant) | ||
1642 | { | ||
1643 | struct ieee80211_local *local = wiphy_priv(wiphy); | ||
1644 | |||
1645 | return drv_get_antenna(local, tx_ant, rx_ant); | ||
1646 | } | ||
1647 | |||
1624 | struct cfg80211_ops mac80211_config_ops = { | 1648 | struct cfg80211_ops mac80211_config_ops = { |
1625 | .add_virtual_intf = ieee80211_add_iface, | 1649 | .add_virtual_intf = ieee80211_add_iface, |
1626 | .del_virtual_intf = ieee80211_del_iface, | 1650 | .del_virtual_intf = ieee80211_del_iface, |
@@ -1673,4 +1697,6 @@ struct cfg80211_ops mac80211_config_ops = { | |||
1673 | .mgmt_tx = ieee80211_mgmt_tx, | 1697 | .mgmt_tx = ieee80211_mgmt_tx, |
1674 | .set_cqm_rssi_config = ieee80211_set_cqm_rssi_config, | 1698 | .set_cqm_rssi_config = ieee80211_set_cqm_rssi_config, |
1675 | .mgmt_frame_register = ieee80211_mgmt_frame_register, | 1699 | .mgmt_frame_register = ieee80211_mgmt_frame_register, |
1700 | .set_antenna = ieee80211_set_antenna, | ||
1701 | .get_antenna = ieee80211_get_antenna, | ||
1676 | }; | 1702 | }; |
diff --git a/net/mac80211/driver-ops.h b/net/mac80211/driver-ops.h index 16983825f8e8..4244554d218a 100644 --- a/net/mac80211/driver-ops.h +++ b/net/mac80211/driver-ops.h | |||
@@ -233,6 +233,20 @@ static inline void drv_get_tkip_seq(struct ieee80211_local *local, | |||
233 | trace_drv_get_tkip_seq(local, hw_key_idx, iv32, iv16); | 233 | trace_drv_get_tkip_seq(local, hw_key_idx, iv32, iv16); |
234 | } | 234 | } |
235 | 235 | ||
236 | static inline int drv_set_frag_threshold(struct ieee80211_local *local, | ||
237 | u32 value) | ||
238 | { | ||
239 | int ret = 0; | ||
240 | |||
241 | might_sleep(); | ||
242 | |||
243 | trace_drv_set_frag_threshold(local, value); | ||
244 | if (local->ops->set_frag_threshold) | ||
245 | ret = local->ops->set_frag_threshold(&local->hw, value); | ||
246 | trace_drv_return_int(local, ret); | ||
247 | return ret; | ||
248 | } | ||
249 | |||
236 | static inline int drv_set_rts_threshold(struct ieee80211_local *local, | 250 | static inline int drv_set_rts_threshold(struct ieee80211_local *local, |
237 | u32 value) | 251 | u32 value) |
238 | { | 252 | { |
@@ -428,4 +442,27 @@ static inline void drv_channel_switch(struct ieee80211_local *local, | |||
428 | trace_drv_return_void(local); | 442 | trace_drv_return_void(local); |
429 | } | 443 | } |
430 | 444 | ||
445 | |||
446 | static inline int drv_set_antenna(struct ieee80211_local *local, | ||
447 | u32 tx_ant, u32 rx_ant) | ||
448 | { | ||
449 | int ret = -EOPNOTSUPP; | ||
450 | might_sleep(); | ||
451 | if (local->ops->set_antenna) | ||
452 | ret = local->ops->set_antenna(&local->hw, tx_ant, rx_ant); | ||
453 | trace_drv_set_antenna(local, tx_ant, rx_ant, ret); | ||
454 | return ret; | ||
455 | } | ||
456 | |||
457 | static inline int drv_get_antenna(struct ieee80211_local *local, | ||
458 | u32 *tx_ant, u32 *rx_ant) | ||
459 | { | ||
460 | int ret = -EOPNOTSUPP; | ||
461 | might_sleep(); | ||
462 | if (local->ops->get_antenna) | ||
463 | ret = local->ops->get_antenna(&local->hw, tx_ant, rx_ant); | ||
464 | trace_drv_get_antenna(local, *tx_ant, *rx_ant, ret); | ||
465 | return ret; | ||
466 | } | ||
467 | |||
431 | #endif /* __MAC80211_DRIVER_OPS */ | 468 | #endif /* __MAC80211_DRIVER_OPS */ |
diff --git a/net/mac80211/driver-trace.h b/net/mac80211/driver-trace.h index 6831fb1641c8..c2772f23ac9c 100644 --- a/net/mac80211/driver-trace.h +++ b/net/mac80211/driver-trace.h | |||
@@ -531,6 +531,27 @@ TRACE_EVENT(drv_get_tkip_seq, | |||
531 | ) | 531 | ) |
532 | ); | 532 | ); |
533 | 533 | ||
534 | TRACE_EVENT(drv_set_frag_threshold, | ||
535 | TP_PROTO(struct ieee80211_local *local, u32 value), | ||
536 | |||
537 | TP_ARGS(local, value), | ||
538 | |||
539 | TP_STRUCT__entry( | ||
540 | LOCAL_ENTRY | ||
541 | __field(u32, value) | ||
542 | ), | ||
543 | |||
544 | TP_fast_assign( | ||
545 | LOCAL_ASSIGN; | ||
546 | __entry->value = value; | ||
547 | ), | ||
548 | |||
549 | TP_printk( | ||
550 | LOCAL_PR_FMT " value:%d", | ||
551 | LOCAL_PR_ARG, __entry->value | ||
552 | ) | ||
553 | ); | ||
554 | |||
534 | TRACE_EVENT(drv_set_rts_threshold, | 555 | TRACE_EVENT(drv_set_rts_threshold, |
535 | TP_PROTO(struct ieee80211_local *local, u32 value), | 556 | TP_PROTO(struct ieee80211_local *local, u32 value), |
536 | 557 | ||
@@ -862,6 +883,56 @@ TRACE_EVENT(drv_channel_switch, | |||
862 | ) | 883 | ) |
863 | ); | 884 | ); |
864 | 885 | ||
886 | TRACE_EVENT(drv_set_antenna, | ||
887 | TP_PROTO(struct ieee80211_local *local, u32 tx_ant, u32 rx_ant, int ret), | ||
888 | |||
889 | TP_ARGS(local, tx_ant, rx_ant, ret), | ||
890 | |||
891 | TP_STRUCT__entry( | ||
892 | LOCAL_ENTRY | ||
893 | __field(u32, tx_ant) | ||
894 | __field(u32, rx_ant) | ||
895 | __field(int, ret) | ||
896 | ), | ||
897 | |||
898 | TP_fast_assign( | ||
899 | LOCAL_ASSIGN; | ||
900 | __entry->tx_ant = tx_ant; | ||
901 | __entry->rx_ant = rx_ant; | ||
902 | __entry->ret = ret; | ||
903 | ), | ||
904 | |||
905 | TP_printk( | ||
906 | LOCAL_PR_FMT " tx_ant:%d rx_ant:%d ret:%d", | ||
907 | LOCAL_PR_ARG, __entry->tx_ant, __entry->rx_ant, __entry->ret | ||
908 | ) | ||
909 | ); | ||
910 | |||
911 | TRACE_EVENT(drv_get_antenna, | ||
912 | TP_PROTO(struct ieee80211_local *local, u32 tx_ant, u32 rx_ant, int ret), | ||
913 | |||
914 | TP_ARGS(local, tx_ant, rx_ant, ret), | ||
915 | |||
916 | TP_STRUCT__entry( | ||
917 | LOCAL_ENTRY | ||
918 | __field(u32, tx_ant) | ||
919 | __field(u32, rx_ant) | ||
920 | __field(int, ret) | ||
921 | ), | ||
922 | |||
923 | TP_fast_assign( | ||
924 | LOCAL_ASSIGN; | ||
925 | __entry->tx_ant = tx_ant; | ||
926 | __entry->rx_ant = rx_ant; | ||
927 | __entry->ret = ret; | ||
928 | ), | ||
929 | |||
930 | TP_printk( | ||
931 | LOCAL_PR_FMT " tx_ant:%d rx_ant:%d ret:%d", | ||
932 | LOCAL_PR_ARG, __entry->tx_ant, __entry->rx_ant, __entry->ret | ||
933 | ) | ||
934 | ); | ||
935 | |||
865 | /* | 936 | /* |
866 | * Tracing for API calls that drivers call. | 937 | * Tracing for API calls that drivers call. |
867 | */ | 938 | */ |
diff --git a/net/mac80211/ibss.c b/net/mac80211/ibss.c index 239c4836a946..410d104b1347 100644 --- a/net/mac80211/ibss.c +++ b/net/mac80211/ibss.c | |||
@@ -915,6 +915,8 @@ int ieee80211_ibss_join(struct ieee80211_sub_if_data *sdata, | |||
915 | 915 | ||
916 | sdata->u.ibss.privacy = params->privacy; | 916 | sdata->u.ibss.privacy = params->privacy; |
917 | sdata->u.ibss.basic_rates = params->basic_rates; | 917 | sdata->u.ibss.basic_rates = params->basic_rates; |
918 | memcpy(sdata->vif.bss_conf.mcast_rate, params->mcast_rate, | ||
919 | sizeof(params->mcast_rate)); | ||
918 | 920 | ||
919 | sdata->vif.bss_conf.beacon_int = params->beacon_interval; | 921 | sdata->vif.bss_conf.beacon_int = params->beacon_interval; |
920 | 922 | ||
diff --git a/net/mac80211/ieee80211_i.h b/net/mac80211/ieee80211_i.h index b80c38689927..5bc0745368fe 100644 --- a/net/mac80211/ieee80211_i.h +++ b/net/mac80211/ieee80211_i.h | |||
@@ -349,6 +349,7 @@ struct ieee80211_if_managed { | |||
349 | struct work_struct chswitch_work; | 349 | struct work_struct chswitch_work; |
350 | struct work_struct beacon_connection_loss_work; | 350 | struct work_struct beacon_connection_loss_work; |
351 | 351 | ||
352 | unsigned long beacon_timeout; | ||
352 | unsigned long probe_timeout; | 353 | unsigned long probe_timeout; |
353 | int probe_send_count; | 354 | int probe_send_count; |
354 | 355 | ||
@@ -1264,6 +1265,8 @@ void ieee80211_send_nullfunc(struct ieee80211_local *local, | |||
1264 | int powersave); | 1265 | int powersave); |
1265 | void ieee80211_sta_rx_notify(struct ieee80211_sub_if_data *sdata, | 1266 | void ieee80211_sta_rx_notify(struct ieee80211_sub_if_data *sdata, |
1266 | struct ieee80211_hdr *hdr); | 1267 | struct ieee80211_hdr *hdr); |
1268 | void ieee80211_sta_tx_notify(struct ieee80211_sub_if_data *sdata, | ||
1269 | struct ieee80211_hdr *hdr); | ||
1267 | void ieee80211_beacon_connection_loss_work(struct work_struct *work); | 1270 | void ieee80211_beacon_connection_loss_work(struct work_struct *work); |
1268 | 1271 | ||
1269 | void ieee80211_wake_queues_by_reason(struct ieee80211_hw *hw, | 1272 | void ieee80211_wake_queues_by_reason(struct ieee80211_hw *hw, |
@@ -1278,6 +1281,9 @@ void ieee80211_add_pending_skb(struct ieee80211_local *local, | |||
1278 | struct sk_buff *skb); | 1281 | struct sk_buff *skb); |
1279 | int ieee80211_add_pending_skbs(struct ieee80211_local *local, | 1282 | int ieee80211_add_pending_skbs(struct ieee80211_local *local, |
1280 | struct sk_buff_head *skbs); | 1283 | struct sk_buff_head *skbs); |
1284 | int ieee80211_add_pending_skbs_fn(struct ieee80211_local *local, | ||
1285 | struct sk_buff_head *skbs, | ||
1286 | void (*fn)(void *data), void *data); | ||
1281 | 1287 | ||
1282 | void ieee80211_send_auth(struct ieee80211_sub_if_data *sdata, | 1288 | void ieee80211_send_auth(struct ieee80211_sub_if_data *sdata, |
1283 | u16 transaction, u16 auth_alg, | 1289 | u16 transaction, u16 auth_alg, |
@@ -1287,6 +1293,10 @@ int ieee80211_build_preq_ies(struct ieee80211_local *local, u8 *buffer, | |||
1287 | const u8 *ie, size_t ie_len, | 1293 | const u8 *ie, size_t ie_len, |
1288 | enum ieee80211_band band, u32 rate_mask, | 1294 | enum ieee80211_band band, u32 rate_mask, |
1289 | u8 channel); | 1295 | u8 channel); |
1296 | struct sk_buff *ieee80211_build_probe_req(struct ieee80211_sub_if_data *sdata, | ||
1297 | u8 *dst, | ||
1298 | const u8 *ssid, size_t ssid_len, | ||
1299 | const u8 *ie, size_t ie_len); | ||
1290 | void ieee80211_send_probe_req(struct ieee80211_sub_if_data *sdata, u8 *dst, | 1300 | void ieee80211_send_probe_req(struct ieee80211_sub_if_data *sdata, u8 *dst, |
1291 | const u8 *ssid, size_t ssid_len, | 1301 | const u8 *ssid, size_t ssid_len, |
1292 | const u8 *ie, size_t ie_len); | 1302 | const u8 *ie, size_t ie_len); |
diff --git a/net/mac80211/key.c b/net/mac80211/key.c index ccd676b2f599..72df1ca7299b 100644 --- a/net/mac80211/key.c +++ b/net/mac80211/key.c | |||
@@ -84,10 +84,17 @@ static int ieee80211_key_enable_hw_accel(struct ieee80211_key *key) | |||
84 | goto out_unsupported; | 84 | goto out_unsupported; |
85 | 85 | ||
86 | sdata = key->sdata; | 86 | sdata = key->sdata; |
87 | if (sdata->vif.type == NL80211_IFTYPE_AP_VLAN) | 87 | if (sdata->vif.type == NL80211_IFTYPE_AP_VLAN) { |
88 | /* | ||
89 | * The driver doesn't know anything about VLAN interfaces. | ||
90 | * Hence, don't send GTKs for VLAN interfaces to the driver. | ||
91 | */ | ||
92 | if (!(key->conf.flags & IEEE80211_KEY_FLAG_PAIRWISE)) | ||
93 | goto out_unsupported; | ||
88 | sdata = container_of(sdata->bss, | 94 | sdata = container_of(sdata->bss, |
89 | struct ieee80211_sub_if_data, | 95 | struct ieee80211_sub_if_data, |
90 | u.ap); | 96 | u.ap); |
97 | } | ||
91 | 98 | ||
92 | ret = drv_set_key(key->local, SET_KEY, sdata, sta, &key->conf); | 99 | ret = drv_set_key(key->local, SET_KEY, sdata, sta, &key->conf); |
93 | 100 | ||
diff --git a/net/mac80211/mlme.c b/net/mac80211/mlme.c index a3a9421555af..794807914940 100644 --- a/net/mac80211/mlme.c +++ b/net/mac80211/mlme.c | |||
@@ -28,13 +28,19 @@ | |||
28 | #include "rate.h" | 28 | #include "rate.h" |
29 | #include "led.h" | 29 | #include "led.h" |
30 | 30 | ||
31 | #define IEEE80211_MAX_NULLFUNC_TRIES 2 | ||
31 | #define IEEE80211_MAX_PROBE_TRIES 5 | 32 | #define IEEE80211_MAX_PROBE_TRIES 5 |
32 | 33 | ||
33 | /* | 34 | /* |
34 | * beacon loss detection timeout | 35 | * Beacon loss timeout is calculated as N frames times the |
35 | * XXX: should depend on beacon interval | 36 | * advertised beacon interval. This may need to be somewhat |
37 | * higher than what hardware might detect to account for | ||
38 | * delays in the host processing frames. But since we also | ||
39 | * probe on beacon miss before declaring the connection lost | ||
40 | * default to what we want. | ||
36 | */ | 41 | */ |
37 | #define IEEE80211_BEACON_LOSS_TIME (2 * HZ) | 42 | #define IEEE80211_BEACON_LOSS_COUNT 7 |
43 | |||
38 | /* | 44 | /* |
39 | * Time the connection can be idle before we probe | 45 | * Time the connection can be idle before we probe |
40 | * it to see if we can still talk to the AP. | 46 | * it to see if we can still talk to the AP. |
@@ -121,7 +127,7 @@ void ieee80211_sta_reset_beacon_monitor(struct ieee80211_sub_if_data *sdata) | |||
121 | return; | 127 | return; |
122 | 128 | ||
123 | mod_timer(&sdata->u.mgd.bcn_mon_timer, | 129 | mod_timer(&sdata->u.mgd.bcn_mon_timer, |
124 | round_jiffies_up(jiffies + IEEE80211_BEACON_LOSS_TIME)); | 130 | round_jiffies_up(jiffies + sdata->u.mgd.beacon_timeout)); |
125 | } | 131 | } |
126 | 132 | ||
127 | void ieee80211_sta_reset_conn_monitor(struct ieee80211_sub_if_data *sdata) | 133 | void ieee80211_sta_reset_conn_monitor(struct ieee80211_sub_if_data *sdata) |
@@ -871,6 +877,9 @@ static void ieee80211_set_associated(struct ieee80211_sub_if_data *sdata, | |||
871 | bss_info_changed |= ieee80211_handle_bss_capability(sdata, | 877 | bss_info_changed |= ieee80211_handle_bss_capability(sdata, |
872 | cbss->capability, bss->has_erp_value, bss->erp_value); | 878 | cbss->capability, bss->has_erp_value, bss->erp_value); |
873 | 879 | ||
880 | sdata->u.mgd.beacon_timeout = usecs_to_jiffies(ieee80211_tu_to_usec( | ||
881 | IEEE80211_BEACON_LOSS_COUNT * bss_conf->beacon_int)); | ||
882 | |||
874 | sdata->u.mgd.associated = cbss; | 883 | sdata->u.mgd.associated = cbss; |
875 | memcpy(sdata->u.mgd.bssid, cbss->bssid, ETH_ALEN); | 884 | memcpy(sdata->u.mgd.bssid, cbss->bssid, ETH_ALEN); |
876 | 885 | ||
@@ -1026,6 +1035,51 @@ void ieee80211_sta_rx_notify(struct ieee80211_sub_if_data *sdata, | |||
1026 | ieee80211_sta_reset_conn_monitor(sdata); | 1035 | ieee80211_sta_reset_conn_monitor(sdata); |
1027 | } | 1036 | } |
1028 | 1037 | ||
1038 | static void ieee80211_reset_ap_probe(struct ieee80211_sub_if_data *sdata) | ||
1039 | { | ||
1040 | struct ieee80211_if_managed *ifmgd = &sdata->u.mgd; | ||
1041 | |||
1042 | if (!(ifmgd->flags & (IEEE80211_STA_BEACON_POLL | | ||
1043 | IEEE80211_STA_CONNECTION_POLL))) | ||
1044 | return; | ||
1045 | |||
1046 | ifmgd->flags &= ~(IEEE80211_STA_CONNECTION_POLL | | ||
1047 | IEEE80211_STA_BEACON_POLL); | ||
1048 | mutex_lock(&sdata->local->iflist_mtx); | ||
1049 | ieee80211_recalc_ps(sdata->local, -1); | ||
1050 | mutex_unlock(&sdata->local->iflist_mtx); | ||
1051 | |||
1052 | if (sdata->local->hw.flags & IEEE80211_HW_CONNECTION_MONITOR) | ||
1053 | return; | ||
1054 | |||
1055 | /* | ||
1056 | * We've received a probe response, but are not sure whether | ||
1057 | * we have or will be receiving any beacons or data, so let's | ||
1058 | * schedule the timers again, just in case. | ||
1059 | */ | ||
1060 | ieee80211_sta_reset_beacon_monitor(sdata); | ||
1061 | |||
1062 | mod_timer(&ifmgd->conn_mon_timer, | ||
1063 | round_jiffies_up(jiffies + | ||
1064 | IEEE80211_CONNECTION_IDLE_TIME)); | ||
1065 | } | ||
1066 | |||
1067 | void ieee80211_sta_tx_notify(struct ieee80211_sub_if_data *sdata, | ||
1068 | struct ieee80211_hdr *hdr) | ||
1069 | { | ||
1070 | if (!ieee80211_is_data(hdr->frame_control) && | ||
1071 | !ieee80211_is_nullfunc(hdr->frame_control)) | ||
1072 | return; | ||
1073 | |||
1074 | ieee80211_sta_reset_conn_monitor(sdata); | ||
1075 | |||
1076 | if (ieee80211_is_nullfunc(hdr->frame_control) && | ||
1077 | sdata->u.mgd.probe_send_count > 0) { | ||
1078 | sdata->u.mgd.probe_send_count = 0; | ||
1079 | ieee80211_queue_work(&sdata->local->hw, &sdata->work); | ||
1080 | } | ||
1081 | } | ||
1082 | |||
1029 | static void ieee80211_mgd_probe_ap_send(struct ieee80211_sub_if_data *sdata) | 1083 | static void ieee80211_mgd_probe_ap_send(struct ieee80211_sub_if_data *sdata) |
1030 | { | 1084 | { |
1031 | struct ieee80211_if_managed *ifmgd = &sdata->u.mgd; | 1085 | struct ieee80211_if_managed *ifmgd = &sdata->u.mgd; |
@@ -1041,8 +1095,19 @@ static void ieee80211_mgd_probe_ap_send(struct ieee80211_sub_if_data *sdata) | |||
1041 | if (ifmgd->probe_send_count >= unicast_limit) | 1095 | if (ifmgd->probe_send_count >= unicast_limit) |
1042 | dst = NULL; | 1096 | dst = NULL; |
1043 | 1097 | ||
1044 | ssid = ieee80211_bss_get_ie(ifmgd->associated, WLAN_EID_SSID); | 1098 | /* |
1045 | ieee80211_send_probe_req(sdata, dst, ssid + 2, ssid[1], NULL, 0); | 1099 | * When the hardware reports an accurate Tx ACK status, it's |
1100 | * better to send a nullfunc frame instead of a probe request, | ||
1101 | * as it will kick us off the AP quickly if we aren't associated | ||
1102 | * anymore. The timeout will be reset if the frame is ACKed by | ||
1103 | * the AP. | ||
1104 | */ | ||
1105 | if (sdata->local->hw.flags & IEEE80211_HW_REPORTS_TX_ACK_STATUS) | ||
1106 | ieee80211_send_nullfunc(sdata->local, sdata, 0); | ||
1107 | else { | ||
1108 | ssid = ieee80211_bss_get_ie(ifmgd->associated, WLAN_EID_SSID); | ||
1109 | ieee80211_send_probe_req(sdata, dst, ssid + 2, ssid[1], NULL, 0); | ||
1110 | } | ||
1046 | 1111 | ||
1047 | ifmgd->probe_send_count++; | 1112 | ifmgd->probe_send_count++; |
1048 | ifmgd->probe_timeout = jiffies + IEEE80211_PROBE_WAIT; | 1113 | ifmgd->probe_timeout = jiffies + IEEE80211_PROBE_WAIT; |
@@ -1108,6 +1173,30 @@ static void ieee80211_mgd_probe_ap(struct ieee80211_sub_if_data *sdata, | |||
1108 | mutex_unlock(&ifmgd->mtx); | 1173 | mutex_unlock(&ifmgd->mtx); |
1109 | } | 1174 | } |
1110 | 1175 | ||
1176 | struct sk_buff *ieee80211_ap_probereq_get(struct ieee80211_hw *hw, | ||
1177 | struct ieee80211_vif *vif) | ||
1178 | { | ||
1179 | struct ieee80211_sub_if_data *sdata = vif_to_sdata(vif); | ||
1180 | struct ieee80211_if_managed *ifmgd = &sdata->u.mgd; | ||
1181 | struct sk_buff *skb; | ||
1182 | const u8 *ssid; | ||
1183 | |||
1184 | if (WARN_ON(sdata->vif.type != NL80211_IFTYPE_STATION)) | ||
1185 | return NULL; | ||
1186 | |||
1187 | ASSERT_MGD_MTX(ifmgd); | ||
1188 | |||
1189 | if (!ifmgd->associated) | ||
1190 | return NULL; | ||
1191 | |||
1192 | ssid = ieee80211_bss_get_ie(ifmgd->associated, WLAN_EID_SSID); | ||
1193 | skb = ieee80211_build_probe_req(sdata, ifmgd->associated->bssid, | ||
1194 | ssid + 2, ssid[1], NULL, 0); | ||
1195 | |||
1196 | return skb; | ||
1197 | } | ||
1198 | EXPORT_SYMBOL(ieee80211_ap_probereq_get); | ||
1199 | |||
1111 | static void __ieee80211_connection_loss(struct ieee80211_sub_if_data *sdata) | 1200 | static void __ieee80211_connection_loss(struct ieee80211_sub_if_data *sdata) |
1112 | { | 1201 | { |
1113 | struct ieee80211_if_managed *ifmgd = &sdata->u.mgd; | 1202 | struct ieee80211_if_managed *ifmgd = &sdata->u.mgd; |
@@ -1485,29 +1574,8 @@ static void ieee80211_rx_mgmt_probe_resp(struct ieee80211_sub_if_data *sdata, | |||
1485 | ieee80211_rx_bss_info(sdata, mgmt, len, rx_status, &elems, false); | 1574 | ieee80211_rx_bss_info(sdata, mgmt, len, rx_status, &elems, false); |
1486 | 1575 | ||
1487 | if (ifmgd->associated && | 1576 | if (ifmgd->associated && |
1488 | memcmp(mgmt->bssid, ifmgd->associated->bssid, ETH_ALEN) == 0 && | 1577 | memcmp(mgmt->bssid, ifmgd->associated->bssid, ETH_ALEN) == 0) |
1489 | ifmgd->flags & (IEEE80211_STA_BEACON_POLL | | 1578 | ieee80211_reset_ap_probe(sdata); |
1490 | IEEE80211_STA_CONNECTION_POLL)) { | ||
1491 | ifmgd->flags &= ~(IEEE80211_STA_CONNECTION_POLL | | ||
1492 | IEEE80211_STA_BEACON_POLL); | ||
1493 | mutex_lock(&sdata->local->iflist_mtx); | ||
1494 | ieee80211_recalc_ps(sdata->local, -1); | ||
1495 | mutex_unlock(&sdata->local->iflist_mtx); | ||
1496 | |||
1497 | if (sdata->local->hw.flags & IEEE80211_HW_CONNECTION_MONITOR) | ||
1498 | return; | ||
1499 | |||
1500 | /* | ||
1501 | * We've received a probe response, but are not sure whether | ||
1502 | * we have or will be receiving any beacons or data, so let's | ||
1503 | * schedule the timers again, just in case. | ||
1504 | */ | ||
1505 | ieee80211_sta_reset_beacon_monitor(sdata); | ||
1506 | |||
1507 | mod_timer(&ifmgd->conn_mon_timer, | ||
1508 | round_jiffies_up(jiffies + | ||
1509 | IEEE80211_CONNECTION_IDLE_TIME)); | ||
1510 | } | ||
1511 | } | 1579 | } |
1512 | 1580 | ||
1513 | /* | 1581 | /* |
@@ -1857,12 +1925,23 @@ void ieee80211_sta_work(struct ieee80211_sub_if_data *sdata) | |||
1857 | IEEE80211_STA_CONNECTION_POLL) && | 1925 | IEEE80211_STA_CONNECTION_POLL) && |
1858 | ifmgd->associated) { | 1926 | ifmgd->associated) { |
1859 | u8 bssid[ETH_ALEN]; | 1927 | u8 bssid[ETH_ALEN]; |
1928 | int max_tries; | ||
1860 | 1929 | ||
1861 | memcpy(bssid, ifmgd->associated->bssid, ETH_ALEN); | 1930 | memcpy(bssid, ifmgd->associated->bssid, ETH_ALEN); |
1862 | if (time_is_after_jiffies(ifmgd->probe_timeout)) | 1931 | |
1932 | if (local->hw.flags & IEEE80211_HW_REPORTS_TX_ACK_STATUS) | ||
1933 | max_tries = IEEE80211_MAX_NULLFUNC_TRIES; | ||
1934 | else | ||
1935 | max_tries = IEEE80211_MAX_PROBE_TRIES; | ||
1936 | |||
1937 | /* ACK received for nullfunc probing frame */ | ||
1938 | if (!ifmgd->probe_send_count) | ||
1939 | ieee80211_reset_ap_probe(sdata); | ||
1940 | |||
1941 | else if (time_is_after_jiffies(ifmgd->probe_timeout)) | ||
1863 | run_again(ifmgd, ifmgd->probe_timeout); | 1942 | run_again(ifmgd, ifmgd->probe_timeout); |
1864 | 1943 | ||
1865 | else if (ifmgd->probe_send_count < IEEE80211_MAX_PROBE_TRIES) { | 1944 | else if (ifmgd->probe_send_count < max_tries) { |
1866 | #ifdef CONFIG_MAC80211_VERBOSE_DEBUG | 1945 | #ifdef CONFIG_MAC80211_VERBOSE_DEBUG |
1867 | wiphy_debug(local->hw.wiphy, | 1946 | wiphy_debug(local->hw.wiphy, |
1868 | "%s: No probe response from AP %pM" | 1947 | "%s: No probe response from AP %pM" |
@@ -1988,6 +2067,8 @@ void ieee80211_sta_restart(struct ieee80211_sub_if_data *sdata) | |||
1988 | add_timer(&ifmgd->timer); | 2067 | add_timer(&ifmgd->timer); |
1989 | if (test_and_clear_bit(TMR_RUNNING_CHANSW, &ifmgd->timers_running)) | 2068 | if (test_and_clear_bit(TMR_RUNNING_CHANSW, &ifmgd->timers_running)) |
1990 | add_timer(&ifmgd->chswitch_timer); | 2069 | add_timer(&ifmgd->chswitch_timer); |
2070 | ieee80211_sta_reset_beacon_monitor(sdata); | ||
2071 | ieee80211_restart_sta_timer(sdata); | ||
1991 | } | 2072 | } |
1992 | #endif | 2073 | #endif |
1993 | 2074 | ||
diff --git a/net/mac80211/rate.c b/net/mac80211/rate.c index 33f76993da08..3d5a2cb835c4 100644 --- a/net/mac80211/rate.c +++ b/net/mac80211/rate.c | |||
@@ -211,7 +211,8 @@ static bool rc_no_data_or_no_ack(struct ieee80211_tx_rate_control *txrc) | |||
211 | return (info->flags & IEEE80211_TX_CTL_NO_ACK) || !ieee80211_is_data(fc); | 211 | return (info->flags & IEEE80211_TX_CTL_NO_ACK) || !ieee80211_is_data(fc); |
212 | } | 212 | } |
213 | 213 | ||
214 | static void rc_send_low_broadcast(s8 *idx, u32 basic_rates, u8 max_rate_idx) | 214 | static void rc_send_low_broadcast(s8 *idx, u32 basic_rates, |
215 | struct ieee80211_supported_band *sband) | ||
215 | { | 216 | { |
216 | u8 i; | 217 | u8 i; |
217 | 218 | ||
@@ -222,7 +223,7 @@ static void rc_send_low_broadcast(s8 *idx, u32 basic_rates, u8 max_rate_idx) | |||
222 | if (basic_rates & (1 << *idx)) | 223 | if (basic_rates & (1 << *idx)) |
223 | return; /* selected rate is a basic rate */ | 224 | return; /* selected rate is a basic rate */ |
224 | 225 | ||
225 | for (i = *idx + 1; i <= max_rate_idx; i++) { | 226 | for (i = *idx + 1; i <= sband->n_bitrates; i++) { |
226 | if (basic_rates & (1 << i)) { | 227 | if (basic_rates & (1 << i)) { |
227 | *idx = i; | 228 | *idx = i; |
228 | return; | 229 | return; |
@@ -237,16 +238,25 @@ bool rate_control_send_low(struct ieee80211_sta *sta, | |||
237 | struct ieee80211_tx_rate_control *txrc) | 238 | struct ieee80211_tx_rate_control *txrc) |
238 | { | 239 | { |
239 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(txrc->skb); | 240 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(txrc->skb); |
241 | struct ieee80211_supported_band *sband = txrc->sband; | ||
242 | int mcast_rate; | ||
240 | 243 | ||
241 | if (!sta || !priv_sta || rc_no_data_or_no_ack(txrc)) { | 244 | if (!sta || !priv_sta || rc_no_data_or_no_ack(txrc)) { |
242 | info->control.rates[0].idx = rate_lowest_index(txrc->sband, sta); | 245 | info->control.rates[0].idx = rate_lowest_index(txrc->sband, sta); |
243 | info->control.rates[0].count = | 246 | info->control.rates[0].count = |
244 | (info->flags & IEEE80211_TX_CTL_NO_ACK) ? | 247 | (info->flags & IEEE80211_TX_CTL_NO_ACK) ? |
245 | 1 : txrc->hw->max_rate_tries; | 248 | 1 : txrc->hw->max_rate_tries; |
246 | if (!sta && txrc->ap) | 249 | if (!sta && txrc->bss) { |
250 | mcast_rate = txrc->bss_conf->mcast_rate[sband->band]; | ||
251 | if (mcast_rate > 0) { | ||
252 | info->control.rates[0].idx = mcast_rate - 1; | ||
253 | return true; | ||
254 | } | ||
255 | |||
247 | rc_send_low_broadcast(&info->control.rates[0].idx, | 256 | rc_send_low_broadcast(&info->control.rates[0].idx, |
248 | txrc->bss_conf->basic_rates, | 257 | txrc->bss_conf->basic_rates, |
249 | txrc->sband->n_bitrates); | 258 | sband); |
259 | } | ||
250 | return true; | 260 | return true; |
251 | } | 261 | } |
252 | return false; | 262 | return false; |
diff --git a/net/mac80211/rc80211_minstrel_ht.c b/net/mac80211/rc80211_minstrel_ht.c index 2d6f0259e0c6..4ad7a362fcc1 100644 --- a/net/mac80211/rc80211_minstrel_ht.c +++ b/net/mac80211/rc80211_minstrel_ht.c | |||
@@ -371,6 +371,9 @@ minstrel_aggr_check(struct minstrel_priv *mp, struct ieee80211_sta *pubsta, stru | |||
371 | if (likely(sta->ampdu_mlme.tid_tx[tid])) | 371 | if (likely(sta->ampdu_mlme.tid_tx[tid])) |
372 | return; | 372 | return; |
373 | 373 | ||
374 | if (skb_get_queue_mapping(skb) == IEEE80211_AC_VO) | ||
375 | return; | ||
376 | |||
374 | ieee80211_start_tx_ba_session(pubsta, tid); | 377 | ieee80211_start_tx_ba_session(pubsta, tid); |
375 | } | 378 | } |
376 | 379 | ||
diff --git a/net/mac80211/rx.c b/net/mac80211/rx.c index 902b03ee8f60..d2fcd22ab06d 100644 --- a/net/mac80211/rx.c +++ b/net/mac80211/rx.c | |||
@@ -1102,8 +1102,6 @@ static void ap_sta_ps_end(struct sta_info *sta) | |||
1102 | 1102 | ||
1103 | atomic_dec(&sdata->bss->num_sta_ps); | 1103 | atomic_dec(&sdata->bss->num_sta_ps); |
1104 | 1104 | ||
1105 | clear_sta_flags(sta, WLAN_STA_PS_STA); | ||
1106 | |||
1107 | #ifdef CONFIG_MAC80211_VERBOSE_PS_DEBUG | 1105 | #ifdef CONFIG_MAC80211_VERBOSE_PS_DEBUG |
1108 | printk(KERN_DEBUG "%s: STA %pM aid %d exits power save mode\n", | 1106 | printk(KERN_DEBUG "%s: STA %pM aid %d exits power save mode\n", |
1109 | sdata->name, sta->sta.addr, sta->sta.aid); | 1107 | sdata->name, sta->sta.addr, sta->sta.aid); |
diff --git a/net/mac80211/sta_info.c b/net/mac80211/sta_info.c index 6d8f897d8763..eff58571fd7e 100644 --- a/net/mac80211/sta_info.c +++ b/net/mac80211/sta_info.c | |||
@@ -199,8 +199,11 @@ static void sta_unblock(struct work_struct *wk) | |||
199 | 199 | ||
200 | if (!test_sta_flags(sta, WLAN_STA_PS_STA)) | 200 | if (!test_sta_flags(sta, WLAN_STA_PS_STA)) |
201 | ieee80211_sta_ps_deliver_wakeup(sta); | 201 | ieee80211_sta_ps_deliver_wakeup(sta); |
202 | else if (test_and_clear_sta_flags(sta, WLAN_STA_PSPOLL)) | 202 | else if (test_and_clear_sta_flags(sta, WLAN_STA_PSPOLL)) { |
203 | clear_sta_flags(sta, WLAN_STA_PS_DRIVER); | ||
203 | ieee80211_sta_ps_deliver_poll_response(sta); | 204 | ieee80211_sta_ps_deliver_poll_response(sta); |
205 | } else | ||
206 | clear_sta_flags(sta, WLAN_STA_PS_DRIVER); | ||
204 | } | 207 | } |
205 | 208 | ||
206 | static int sta_prepare_rate_control(struct ieee80211_local *local, | 209 | static int sta_prepare_rate_control(struct ieee80211_local *local, |
@@ -880,6 +883,13 @@ struct ieee80211_sta *ieee80211_find_sta(struct ieee80211_vif *vif, | |||
880 | } | 883 | } |
881 | EXPORT_SYMBOL(ieee80211_find_sta); | 884 | EXPORT_SYMBOL(ieee80211_find_sta); |
882 | 885 | ||
886 | static void clear_sta_ps_flags(void *_sta) | ||
887 | { | ||
888 | struct sta_info *sta = _sta; | ||
889 | |||
890 | clear_sta_flags(sta, WLAN_STA_PS_DRIVER | WLAN_STA_PS_STA); | ||
891 | } | ||
892 | |||
883 | /* powersave support code */ | 893 | /* powersave support code */ |
884 | void ieee80211_sta_ps_deliver_wakeup(struct sta_info *sta) | 894 | void ieee80211_sta_ps_deliver_wakeup(struct sta_info *sta) |
885 | { | 895 | { |
@@ -894,7 +904,8 @@ void ieee80211_sta_ps_deliver_wakeup(struct sta_info *sta) | |||
894 | 904 | ||
895 | /* Send all buffered frames to the station */ | 905 | /* Send all buffered frames to the station */ |
896 | sent = ieee80211_add_pending_skbs(local, &sta->tx_filtered); | 906 | sent = ieee80211_add_pending_skbs(local, &sta->tx_filtered); |
897 | buffered = ieee80211_add_pending_skbs(local, &sta->ps_tx_buf); | 907 | buffered = ieee80211_add_pending_skbs_fn(local, &sta->ps_tx_buf, |
908 | clear_sta_ps_flags, sta); | ||
898 | sent += buffered; | 909 | sent += buffered; |
899 | local->total_ps_buffered -= buffered; | 910 | local->total_ps_buffered -= buffered; |
900 | 911 | ||
@@ -973,7 +984,7 @@ void ieee80211_sta_block_awake(struct ieee80211_hw *hw, | |||
973 | 984 | ||
974 | if (block) | 985 | if (block) |
975 | set_sta_flags(sta, WLAN_STA_PS_DRIVER); | 986 | set_sta_flags(sta, WLAN_STA_PS_DRIVER); |
976 | else | 987 | else if (test_sta_flags(sta, WLAN_STA_PS_DRIVER)) |
977 | ieee80211_queue_work(hw, &sta->drv_unblock_wk); | 988 | ieee80211_queue_work(hw, &sta->drv_unblock_wk); |
978 | } | 989 | } |
979 | EXPORT_SYMBOL(ieee80211_sta_block_awake); | 990 | EXPORT_SYMBOL(ieee80211_sta_block_awake); |
diff --git a/net/mac80211/sta_info.h b/net/mac80211/sta_info.h index 9265acadef32..b562d9b6a702 100644 --- a/net/mac80211/sta_info.h +++ b/net/mac80211/sta_info.h | |||
@@ -248,6 +248,7 @@ enum plink_state { | |||
248 | * @sta: station information we share with the driver | 248 | * @sta: station information we share with the driver |
249 | * @dead: set to true when sta is unlinked | 249 | * @dead: set to true when sta is unlinked |
250 | * @uploaded: set to true when sta is uploaded to the driver | 250 | * @uploaded: set to true when sta is uploaded to the driver |
251 | * @lost_packets: number of consecutive lost packets | ||
251 | */ | 252 | */ |
252 | struct sta_info { | 253 | struct sta_info { |
253 | /* General information, mostly static */ | 254 | /* General information, mostly static */ |
@@ -335,6 +336,8 @@ struct sta_info { | |||
335 | } debugfs; | 336 | } debugfs; |
336 | #endif | 337 | #endif |
337 | 338 | ||
339 | unsigned int lost_packets; | ||
340 | |||
338 | /* keep last! */ | 341 | /* keep last! */ |
339 | struct ieee80211_sta sta; | 342 | struct ieee80211_sta sta; |
340 | }; | 343 | }; |
diff --git a/net/mac80211/status.c b/net/mac80211/status.c index 3153c19893b8..bed7e32ed908 100644 --- a/net/mac80211/status.c +++ b/net/mac80211/status.c | |||
@@ -155,8 +155,21 @@ static void ieee80211_frame_acked(struct sta_info *sta, struct sk_buff *skb) | |||
155 | 155 | ||
156 | ieee80211_queue_work(&local->hw, &local->recalc_smps); | 156 | ieee80211_queue_work(&local->hw, &local->recalc_smps); |
157 | } | 157 | } |
158 | |||
159 | if ((sdata->vif.type == NL80211_IFTYPE_STATION) && | ||
160 | (local->hw.flags & IEEE80211_HW_REPORTS_TX_ACK_STATUS)) | ||
161 | ieee80211_sta_tx_notify(sdata, (void *) skb->data); | ||
158 | } | 162 | } |
159 | 163 | ||
164 | /* | ||
165 | * Use a static threshold for now, best value to be determined | ||
166 | * by testing ... | ||
167 | * Should it depend on: | ||
168 | * - on # of retransmissions | ||
169 | * - current throughput (higher value for higher tpt)? | ||
170 | */ | ||
171 | #define STA_LOST_PKT_THRESHOLD 50 | ||
172 | |||
160 | void ieee80211_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb) | 173 | void ieee80211_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb) |
161 | { | 174 | { |
162 | struct sk_buff *skb2; | 175 | struct sk_buff *skb2; |
@@ -243,6 +256,19 @@ void ieee80211_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb) | |||
243 | if (!(info->flags & IEEE80211_TX_CTL_INJECTED) && | 256 | if (!(info->flags & IEEE80211_TX_CTL_INJECTED) && |
244 | (info->flags & IEEE80211_TX_STAT_ACK)) | 257 | (info->flags & IEEE80211_TX_STAT_ACK)) |
245 | ieee80211_frame_acked(sta, skb); | 258 | ieee80211_frame_acked(sta, skb); |
259 | |||
260 | if (local->hw.flags & IEEE80211_HW_REPORTS_TX_ACK_STATUS) { | ||
261 | if (info->flags & IEEE80211_TX_STAT_ACK) { | ||
262 | if (sta->lost_packets) | ||
263 | sta->lost_packets = 0; | ||
264 | } else if (++sta->lost_packets >= STA_LOST_PKT_THRESHOLD) { | ||
265 | cfg80211_cqm_pktloss_notify(sta->sdata->dev, | ||
266 | sta->sta.addr, | ||
267 | sta->lost_packets, | ||
268 | GFP_ATOMIC); | ||
269 | sta->lost_packets = 0; | ||
270 | } | ||
271 | } | ||
246 | } | 272 | } |
247 | 273 | ||
248 | rcu_read_unlock(); | 274 | rcu_read_unlock(); |
diff --git a/net/mac80211/tx.c b/net/mac80211/tx.c index 96c594309506..e69483647f33 100644 --- a/net/mac80211/tx.c +++ b/net/mac80211/tx.c | |||
@@ -622,7 +622,8 @@ ieee80211_tx_h_rate_ctrl(struct ieee80211_tx_data *tx) | |||
622 | txrc.max_rate_idx = -1; | 622 | txrc.max_rate_idx = -1; |
623 | else | 623 | else |
624 | txrc.max_rate_idx = fls(txrc.rate_idx_mask) - 1; | 624 | txrc.max_rate_idx = fls(txrc.rate_idx_mask) - 1; |
625 | txrc.ap = tx->sdata->vif.type == NL80211_IFTYPE_AP; | 625 | txrc.bss = (tx->sdata->vif.type == NL80211_IFTYPE_AP || |
626 | tx->sdata->vif.type == NL80211_IFTYPE_ADHOC); | ||
626 | 627 | ||
627 | /* set up RTS protection if desired */ | 628 | /* set up RTS protection if desired */ |
628 | if (len > tx->local->hw.wiphy->rts_threshold) { | 629 | if (len > tx->local->hw.wiphy->rts_threshold) { |
@@ -1033,6 +1034,7 @@ static bool __ieee80211_parse_tx_radiotap(struct ieee80211_tx_data *tx, | |||
1033 | struct ieee80211_radiotap_header *rthdr = | 1034 | struct ieee80211_radiotap_header *rthdr = |
1034 | (struct ieee80211_radiotap_header *) skb->data; | 1035 | (struct ieee80211_radiotap_header *) skb->data; |
1035 | struct ieee80211_supported_band *sband; | 1036 | struct ieee80211_supported_band *sband; |
1037 | bool hw_frag; | ||
1036 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); | 1038 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
1037 | int ret = ieee80211_radiotap_iterator_init(&iterator, rthdr, skb->len, | 1039 | int ret = ieee80211_radiotap_iterator_init(&iterator, rthdr, skb->len, |
1038 | NULL); | 1040 | NULL); |
@@ -1042,6 +1044,9 @@ static bool __ieee80211_parse_tx_radiotap(struct ieee80211_tx_data *tx, | |||
1042 | info->flags |= IEEE80211_TX_INTFL_DONT_ENCRYPT; | 1044 | info->flags |= IEEE80211_TX_INTFL_DONT_ENCRYPT; |
1043 | tx->flags &= ~IEEE80211_TX_FRAGMENTED; | 1045 | tx->flags &= ~IEEE80211_TX_FRAGMENTED; |
1044 | 1046 | ||
1047 | /* packet is fragmented in HW if we have a non-NULL driver callback */ | ||
1048 | hw_frag = (tx->local->ops->set_frag_threshold != NULL); | ||
1049 | |||
1045 | /* | 1050 | /* |
1046 | * for every radiotap entry that is present | 1051 | * for every radiotap entry that is present |
1047 | * (ieee80211_radiotap_iterator_next returns -ENOENT when no more | 1052 | * (ieee80211_radiotap_iterator_next returns -ENOENT when no more |
@@ -1078,7 +1083,8 @@ static bool __ieee80211_parse_tx_radiotap(struct ieee80211_tx_data *tx, | |||
1078 | } | 1083 | } |
1079 | if (*iterator.this_arg & IEEE80211_RADIOTAP_F_WEP) | 1084 | if (*iterator.this_arg & IEEE80211_RADIOTAP_F_WEP) |
1080 | info->flags &= ~IEEE80211_TX_INTFL_DONT_ENCRYPT; | 1085 | info->flags &= ~IEEE80211_TX_INTFL_DONT_ENCRYPT; |
1081 | if (*iterator.this_arg & IEEE80211_RADIOTAP_F_FRAG) | 1086 | if ((*iterator.this_arg & IEEE80211_RADIOTAP_F_FRAG) && |
1087 | !hw_frag) | ||
1082 | tx->flags |= IEEE80211_TX_FRAGMENTED; | 1088 | tx->flags |= IEEE80211_TX_FRAGMENTED; |
1083 | break; | 1089 | break; |
1084 | 1090 | ||
@@ -1181,8 +1187,10 @@ ieee80211_tx_prepare(struct ieee80211_sub_if_data *sdata, | |||
1181 | /* | 1187 | /* |
1182 | * Set this flag (used below to indicate "automatic fragmentation"), | 1188 | * Set this flag (used below to indicate "automatic fragmentation"), |
1183 | * it will be cleared/left by radiotap as desired. | 1189 | * it will be cleared/left by radiotap as desired. |
1190 | * Only valid when fragmentation is done by the stack. | ||
1184 | */ | 1191 | */ |
1185 | tx->flags |= IEEE80211_TX_FRAGMENTED; | 1192 | if (!local->ops->set_frag_threshold) |
1193 | tx->flags |= IEEE80211_TX_FRAGMENTED; | ||
1186 | 1194 | ||
1187 | /* process and remove the injection radiotap header */ | 1195 | /* process and remove the injection radiotap header */ |
1188 | if (unlikely(info->flags & IEEE80211_TX_INTFL_HAS_RADIOTAP)) { | 1196 | if (unlikely(info->flags & IEEE80211_TX_INTFL_HAS_RADIOTAP)) { |
@@ -2301,7 +2309,7 @@ struct sk_buff *ieee80211_beacon_get_tim(struct ieee80211_hw *hw, | |||
2301 | txrc.max_rate_idx = -1; | 2309 | txrc.max_rate_idx = -1; |
2302 | else | 2310 | else |
2303 | txrc.max_rate_idx = fls(txrc.rate_idx_mask) - 1; | 2311 | txrc.max_rate_idx = fls(txrc.rate_idx_mask) - 1; |
2304 | txrc.ap = true; | 2312 | txrc.bss = true; |
2305 | rate_control_get_rate(sdata, NULL, &txrc); | 2313 | rate_control_get_rate(sdata, NULL, &txrc); |
2306 | 2314 | ||
2307 | info->control.vif = vif; | 2315 | info->control.vif = vif; |
diff --git a/net/mac80211/util.c b/net/mac80211/util.c index 0b6fc92bc0d7..e497476174ce 100644 --- a/net/mac80211/util.c +++ b/net/mac80211/util.c | |||
@@ -368,8 +368,9 @@ void ieee80211_add_pending_skb(struct ieee80211_local *local, | |||
368 | spin_unlock_irqrestore(&local->queue_stop_reason_lock, flags); | 368 | spin_unlock_irqrestore(&local->queue_stop_reason_lock, flags); |
369 | } | 369 | } |
370 | 370 | ||
371 | int ieee80211_add_pending_skbs(struct ieee80211_local *local, | 371 | int ieee80211_add_pending_skbs_fn(struct ieee80211_local *local, |
372 | struct sk_buff_head *skbs) | 372 | struct sk_buff_head *skbs, |
373 | void (*fn)(void *data), void *data) | ||
373 | { | 374 | { |
374 | struct ieee80211_hw *hw = &local->hw; | 375 | struct ieee80211_hw *hw = &local->hw; |
375 | struct sk_buff *skb; | 376 | struct sk_buff *skb; |
@@ -394,6 +395,9 @@ int ieee80211_add_pending_skbs(struct ieee80211_local *local, | |||
394 | __skb_queue_tail(&local->pending[queue], skb); | 395 | __skb_queue_tail(&local->pending[queue], skb); |
395 | } | 396 | } |
396 | 397 | ||
398 | if (fn) | ||
399 | fn(data); | ||
400 | |||
397 | for (i = 0; i < hw->queues; i++) | 401 | for (i = 0; i < hw->queues; i++) |
398 | __ieee80211_wake_queue(hw, i, | 402 | __ieee80211_wake_queue(hw, i, |
399 | IEEE80211_QUEUE_STOP_REASON_SKB_ADD); | 403 | IEEE80211_QUEUE_STOP_REASON_SKB_ADD); |
@@ -402,6 +406,12 @@ int ieee80211_add_pending_skbs(struct ieee80211_local *local, | |||
402 | return ret; | 406 | return ret; |
403 | } | 407 | } |
404 | 408 | ||
409 | int ieee80211_add_pending_skbs(struct ieee80211_local *local, | ||
410 | struct sk_buff_head *skbs) | ||
411 | { | ||
412 | return ieee80211_add_pending_skbs_fn(local, skbs, NULL, NULL); | ||
413 | } | ||
414 | |||
405 | void ieee80211_stop_queues_by_reason(struct ieee80211_hw *hw, | 415 | void ieee80211_stop_queues_by_reason(struct ieee80211_hw *hw, |
406 | enum queue_stop_reason reason) | 416 | enum queue_stop_reason reason) |
407 | { | 417 | { |
@@ -1011,9 +1021,10 @@ int ieee80211_build_preq_ies(struct ieee80211_local *local, u8 *buffer, | |||
1011 | return pos - buffer; | 1021 | return pos - buffer; |
1012 | } | 1022 | } |
1013 | 1023 | ||
1014 | void ieee80211_send_probe_req(struct ieee80211_sub_if_data *sdata, u8 *dst, | 1024 | struct sk_buff *ieee80211_build_probe_req(struct ieee80211_sub_if_data *sdata, |
1015 | const u8 *ssid, size_t ssid_len, | 1025 | u8 *dst, |
1016 | const u8 *ie, size_t ie_len) | 1026 | const u8 *ssid, size_t ssid_len, |
1027 | const u8 *ie, size_t ie_len) | ||
1017 | { | 1028 | { |
1018 | struct ieee80211_local *local = sdata->local; | 1029 | struct ieee80211_local *local = sdata->local; |
1019 | struct sk_buff *skb; | 1030 | struct sk_buff *skb; |
@@ -1027,7 +1038,7 @@ void ieee80211_send_probe_req(struct ieee80211_sub_if_data *sdata, u8 *dst, | |||
1027 | if (!buf) { | 1038 | if (!buf) { |
1028 | printk(KERN_DEBUG "%s: failed to allocate temporary IE " | 1039 | printk(KERN_DEBUG "%s: failed to allocate temporary IE " |
1029 | "buffer\n", sdata->name); | 1040 | "buffer\n", sdata->name); |
1030 | return; | 1041 | return NULL; |
1031 | } | 1042 | } |
1032 | 1043 | ||
1033 | chan = ieee80211_frequency_to_channel( | 1044 | chan = ieee80211_frequency_to_channel( |
@@ -1050,8 +1061,20 @@ void ieee80211_send_probe_req(struct ieee80211_sub_if_data *sdata, u8 *dst, | |||
1050 | } | 1061 | } |
1051 | 1062 | ||
1052 | IEEE80211_SKB_CB(skb)->flags |= IEEE80211_TX_INTFL_DONT_ENCRYPT; | 1063 | IEEE80211_SKB_CB(skb)->flags |= IEEE80211_TX_INTFL_DONT_ENCRYPT; |
1053 | ieee80211_tx_skb(sdata, skb); | ||
1054 | kfree(buf); | 1064 | kfree(buf); |
1065 | |||
1066 | return skb; | ||
1067 | } | ||
1068 | |||
1069 | void ieee80211_send_probe_req(struct ieee80211_sub_if_data *sdata, u8 *dst, | ||
1070 | const u8 *ssid, size_t ssid_len, | ||
1071 | const u8 *ie, size_t ie_len) | ||
1072 | { | ||
1073 | struct sk_buff *skb; | ||
1074 | |||
1075 | skb = ieee80211_build_probe_req(sdata, dst, ssid, ssid_len, ie, ie_len); | ||
1076 | if (skb) | ||
1077 | ieee80211_tx_skb(sdata, skb); | ||
1055 | } | 1078 | } |
1056 | 1079 | ||
1057 | u32 ieee80211_sta_get_rates(struct ieee80211_local *local, | 1080 | u32 ieee80211_sta_get_rates(struct ieee80211_local *local, |
@@ -1152,6 +1175,9 @@ int ieee80211_reconfig(struct ieee80211_local *local) | |||
1152 | } | 1175 | } |
1153 | mutex_unlock(&local->sta_mtx); | 1176 | mutex_unlock(&local->sta_mtx); |
1154 | 1177 | ||
1178 | /* setup fragmentation threshold */ | ||
1179 | drv_set_frag_threshold(local, hw->wiphy->frag_threshold); | ||
1180 | |||
1155 | /* setup RTS threshold */ | 1181 | /* setup RTS threshold */ |
1156 | drv_set_rts_threshold(local, hw->wiphy->rts_threshold); | 1182 | drv_set_rts_threshold(local, hw->wiphy->rts_threshold); |
1157 | 1183 | ||
diff --git a/net/mac80211/wme.c b/net/mac80211/wme.c index 34e6d02da779..58e75bbc1f91 100644 --- a/net/mac80211/wme.c +++ b/net/mac80211/wme.c | |||
@@ -21,7 +21,16 @@ | |||
21 | /* Default mapping in classifier to work with default | 21 | /* Default mapping in classifier to work with default |
22 | * queue setup. | 22 | * queue setup. |
23 | */ | 23 | */ |
24 | const int ieee802_1d_to_ac[8] = { 2, 3, 3, 2, 1, 1, 0, 0 }; | 24 | const int ieee802_1d_to_ac[8] = { |
25 | IEEE80211_AC_BE, | ||
26 | IEEE80211_AC_BK, | ||
27 | IEEE80211_AC_BK, | ||
28 | IEEE80211_AC_BE, | ||
29 | IEEE80211_AC_VI, | ||
30 | IEEE80211_AC_VI, | ||
31 | IEEE80211_AC_VO, | ||
32 | IEEE80211_AC_VO | ||
33 | }; | ||
25 | 34 | ||
26 | static int wme_downgrade_ac(struct sk_buff *skb) | 35 | static int wme_downgrade_ac(struct sk_buff *skb) |
27 | { | 36 | { |
diff --git a/net/wireless/core.c b/net/wireless/core.c index 9c21ebf9780e..630bcf0a2f04 100644 --- a/net/wireless/core.c +++ b/net/wireless/core.c | |||
@@ -4,6 +4,8 @@ | |||
4 | * Copyright 2006-2010 Johannes Berg <johannes@sipsolutions.net> | 4 | * Copyright 2006-2010 Johannes Berg <johannes@sipsolutions.net> |
5 | */ | 5 | */ |
6 | 6 | ||
7 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | ||
8 | |||
7 | #include <linux/if.h> | 9 | #include <linux/if.h> |
8 | #include <linux/module.h> | 10 | #include <linux/module.h> |
9 | #include <linux/err.h> | 11 | #include <linux/err.h> |
@@ -216,8 +218,7 @@ int cfg80211_dev_rename(struct cfg80211_registered_device *rdev, | |||
216 | rdev->wiphy.debugfsdir, | 218 | rdev->wiphy.debugfsdir, |
217 | rdev->wiphy.debugfsdir->d_parent, | 219 | rdev->wiphy.debugfsdir->d_parent, |
218 | newname)) | 220 | newname)) |
219 | printk(KERN_ERR "cfg80211: failed to rename debugfs dir to %s!\n", | 221 | pr_err("failed to rename debugfs dir to %s!\n", newname); |
220 | newname); | ||
221 | 222 | ||
222 | nl80211_notify_dev_rename(rdev); | 223 | nl80211_notify_dev_rename(rdev); |
223 | 224 | ||
@@ -699,8 +700,7 @@ static int cfg80211_netdev_notifier_call(struct notifier_block * nb, | |||
699 | 700 | ||
700 | if (sysfs_create_link(&dev->dev.kobj, &rdev->wiphy.dev.kobj, | 701 | if (sysfs_create_link(&dev->dev.kobj, &rdev->wiphy.dev.kobj, |
701 | "phy80211")) { | 702 | "phy80211")) { |
702 | printk(KERN_ERR "wireless: failed to add phy80211 " | 703 | pr_err("failed to add phy80211 symlink to netdev!\n"); |
703 | "symlink to netdev!\n"); | ||
704 | } | 704 | } |
705 | wdev->netdev = dev; | 705 | wdev->netdev = dev; |
706 | wdev->sme_state = CFG80211_SME_IDLE; | 706 | wdev->sme_state = CFG80211_SME_IDLE; |
diff --git a/net/wireless/lib80211.c b/net/wireless/lib80211.c index 97d411f74507..3268fac5ab22 100644 --- a/net/wireless/lib80211.c +++ b/net/wireless/lib80211.c | |||
@@ -13,6 +13,8 @@ | |||
13 | * | 13 | * |
14 | */ | 14 | */ |
15 | 15 | ||
16 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | ||
17 | |||
16 | #include <linux/module.h> | 18 | #include <linux/module.h> |
17 | #include <linux/ctype.h> | 19 | #include <linux/ctype.h> |
18 | #include <linux/ieee80211.h> | 20 | #include <linux/ieee80211.h> |
@@ -224,8 +226,8 @@ int lib80211_unregister_crypto_ops(struct lib80211_crypto_ops *ops) | |||
224 | return -EINVAL; | 226 | return -EINVAL; |
225 | 227 | ||
226 | found: | 228 | found: |
227 | printk(KERN_DEBUG "lib80211_crypt: unregistered algorithm " | 229 | printk(KERN_DEBUG "lib80211_crypt: unregistered algorithm '%s'\n", |
228 | "'%s'\n", ops->name); | 230 | ops->name); |
229 | list_del(&alg->list); | 231 | list_del(&alg->list); |
230 | spin_unlock_irqrestore(&lib80211_crypto_lock, flags); | 232 | spin_unlock_irqrestore(&lib80211_crypto_lock, flags); |
231 | kfree(alg); | 233 | kfree(alg); |
@@ -270,7 +272,7 @@ static struct lib80211_crypto_ops lib80211_crypt_null = { | |||
270 | 272 | ||
271 | static int __init lib80211_init(void) | 273 | static int __init lib80211_init(void) |
272 | { | 274 | { |
273 | printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION "\n"); | 275 | pr_info(DRV_DESCRIPTION "\n"); |
274 | return lib80211_register_crypto_ops(&lib80211_crypt_null); | 276 | return lib80211_register_crypto_ops(&lib80211_crypt_null); |
275 | } | 277 | } |
276 | 278 | ||
diff --git a/net/wireless/lib80211_crypt_tkip.c b/net/wireless/lib80211_crypt_tkip.c index 0fe40510e2cb..7ea4f2b0770e 100644 --- a/net/wireless/lib80211_crypt_tkip.c +++ b/net/wireless/lib80211_crypt_tkip.c | |||
@@ -10,6 +10,8 @@ | |||
10 | * more details. | 10 | * more details. |
11 | */ | 11 | */ |
12 | 12 | ||
13 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | ||
14 | |||
13 | #include <linux/err.h> | 15 | #include <linux/err.h> |
14 | #include <linux/module.h> | 16 | #include <linux/module.h> |
15 | #include <linux/init.h> | 17 | #include <linux/init.h> |
@@ -99,8 +101,7 @@ static void *lib80211_tkip_init(int key_idx) | |||
99 | priv->tx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0, | 101 | priv->tx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0, |
100 | CRYPTO_ALG_ASYNC); | 102 | CRYPTO_ALG_ASYNC); |
101 | if (IS_ERR(priv->tx_tfm_arc4)) { | 103 | if (IS_ERR(priv->tx_tfm_arc4)) { |
102 | printk(KERN_DEBUG "lib80211_crypt_tkip: could not allocate " | 104 | printk(KERN_DEBUG pr_fmt("could not allocate crypto API arc4\n")); |
103 | "crypto API arc4\n"); | ||
104 | priv->tx_tfm_arc4 = NULL; | 105 | priv->tx_tfm_arc4 = NULL; |
105 | goto fail; | 106 | goto fail; |
106 | } | 107 | } |
@@ -108,8 +109,7 @@ static void *lib80211_tkip_init(int key_idx) | |||
108 | priv->tx_tfm_michael = crypto_alloc_hash("michael_mic", 0, | 109 | priv->tx_tfm_michael = crypto_alloc_hash("michael_mic", 0, |
109 | CRYPTO_ALG_ASYNC); | 110 | CRYPTO_ALG_ASYNC); |
110 | if (IS_ERR(priv->tx_tfm_michael)) { | 111 | if (IS_ERR(priv->tx_tfm_michael)) { |
111 | printk(KERN_DEBUG "lib80211_crypt_tkip: could not allocate " | 112 | printk(KERN_DEBUG pr_fmt("could not allocate crypto API michael_mic\n")); |
112 | "crypto API michael_mic\n"); | ||
113 | priv->tx_tfm_michael = NULL; | 113 | priv->tx_tfm_michael = NULL; |
114 | goto fail; | 114 | goto fail; |
115 | } | 115 | } |
@@ -117,8 +117,7 @@ static void *lib80211_tkip_init(int key_idx) | |||
117 | priv->rx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0, | 117 | priv->rx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0, |
118 | CRYPTO_ALG_ASYNC); | 118 | CRYPTO_ALG_ASYNC); |
119 | if (IS_ERR(priv->rx_tfm_arc4)) { | 119 | if (IS_ERR(priv->rx_tfm_arc4)) { |
120 | printk(KERN_DEBUG "lib80211_crypt_tkip: could not allocate " | 120 | printk(KERN_DEBUG pr_fmt("could not allocate crypto API arc4\n")); |
121 | "crypto API arc4\n"); | ||
122 | priv->rx_tfm_arc4 = NULL; | 121 | priv->rx_tfm_arc4 = NULL; |
123 | goto fail; | 122 | goto fail; |
124 | } | 123 | } |
@@ -126,8 +125,7 @@ static void *lib80211_tkip_init(int key_idx) | |||
126 | priv->rx_tfm_michael = crypto_alloc_hash("michael_mic", 0, | 125 | priv->rx_tfm_michael = crypto_alloc_hash("michael_mic", 0, |
127 | CRYPTO_ALG_ASYNC); | 126 | CRYPTO_ALG_ASYNC); |
128 | if (IS_ERR(priv->rx_tfm_michael)) { | 127 | if (IS_ERR(priv->rx_tfm_michael)) { |
129 | printk(KERN_DEBUG "lib80211_crypt_tkip: could not allocate " | 128 | printk(KERN_DEBUG pr_fmt("could not allocate crypto API michael_mic\n")); |
130 | "crypto API michael_mic\n"); | ||
131 | priv->rx_tfm_michael = NULL; | 129 | priv->rx_tfm_michael = NULL; |
132 | goto fail; | 130 | goto fail; |
133 | } | 131 | } |
@@ -536,7 +534,7 @@ static int michael_mic(struct crypto_hash *tfm_michael, u8 * key, u8 * hdr, | |||
536 | struct scatterlist sg[2]; | 534 | struct scatterlist sg[2]; |
537 | 535 | ||
538 | if (tfm_michael == NULL) { | 536 | if (tfm_michael == NULL) { |
539 | printk(KERN_WARNING "michael_mic: tfm_michael == NULL\n"); | 537 | pr_warn("%s(): tfm_michael == NULL\n", __func__); |
540 | return -1; | 538 | return -1; |
541 | } | 539 | } |
542 | sg_init_table(sg, 2); | 540 | sg_init_table(sg, 2); |
diff --git a/net/wireless/mlme.c b/net/wireless/mlme.c index 26838d903b9a..6980a0c315b2 100644 --- a/net/wireless/mlme.c +++ b/net/wireless/mlme.c | |||
@@ -1028,3 +1028,15 @@ void cfg80211_cqm_rssi_notify(struct net_device *dev, | |||
1028 | nl80211_send_cqm_rssi_notify(rdev, dev, rssi_event, gfp); | 1028 | nl80211_send_cqm_rssi_notify(rdev, dev, rssi_event, gfp); |
1029 | } | 1029 | } |
1030 | EXPORT_SYMBOL(cfg80211_cqm_rssi_notify); | 1030 | EXPORT_SYMBOL(cfg80211_cqm_rssi_notify); |
1031 | |||
1032 | void cfg80211_cqm_pktloss_notify(struct net_device *dev, | ||
1033 | const u8 *peer, u32 num_packets, gfp_t gfp) | ||
1034 | { | ||
1035 | struct wireless_dev *wdev = dev->ieee80211_ptr; | ||
1036 | struct wiphy *wiphy = wdev->wiphy; | ||
1037 | struct cfg80211_registered_device *rdev = wiphy_to_dev(wiphy); | ||
1038 | |||
1039 | /* Indicate roaming trigger event to user space */ | ||
1040 | nl80211_send_cqm_pktloss_notify(rdev, dev, peer, num_packets, gfp); | ||
1041 | } | ||
1042 | EXPORT_SYMBOL(cfg80211_cqm_pktloss_notify); | ||
diff --git a/net/wireless/nl80211.c b/net/wireless/nl80211.c index 4e78e3f26798..67ff7e92cb99 100644 --- a/net/wireless/nl80211.c +++ b/net/wireless/nl80211.c | |||
@@ -166,7 +166,13 @@ static const struct nla_policy nl80211_policy[NL80211_ATTR_MAX+1] = { | |||
166 | 166 | ||
167 | [NL80211_ATTR_WIPHY_TX_POWER_SETTING] = { .type = NLA_U32 }, | 167 | [NL80211_ATTR_WIPHY_TX_POWER_SETTING] = { .type = NLA_U32 }, |
168 | [NL80211_ATTR_WIPHY_TX_POWER_LEVEL] = { .type = NLA_U32 }, | 168 | [NL80211_ATTR_WIPHY_TX_POWER_LEVEL] = { .type = NLA_U32 }, |
169 | |||
169 | [NL80211_ATTR_FRAME_TYPE] = { .type = NLA_U16 }, | 170 | [NL80211_ATTR_FRAME_TYPE] = { .type = NLA_U16 }, |
171 | |||
172 | [NL80211_ATTR_WIPHY_ANTENNA_TX] = { .type = NLA_U32 }, | ||
173 | [NL80211_ATTR_WIPHY_ANTENNA_RX] = { .type = NLA_U32 }, | ||
174 | |||
175 | [NL80211_ATTR_MCAST_RATE] = { .type = NLA_U32 }, | ||
170 | }; | 176 | }; |
171 | 177 | ||
172 | /* policy for the key attributes */ | 178 | /* policy for the key attributes */ |
@@ -526,7 +532,6 @@ static int nl80211_send_wiphy(struct sk_buff *msg, u32 pid, u32 seq, int flags, | |||
526 | dev->wiphy.rts_threshold); | 532 | dev->wiphy.rts_threshold); |
527 | NLA_PUT_U8(msg, NL80211_ATTR_WIPHY_COVERAGE_CLASS, | 533 | NLA_PUT_U8(msg, NL80211_ATTR_WIPHY_COVERAGE_CLASS, |
528 | dev->wiphy.coverage_class); | 534 | dev->wiphy.coverage_class); |
529 | |||
530 | NLA_PUT_U8(msg, NL80211_ATTR_MAX_NUM_SCAN_SSIDS, | 535 | NLA_PUT_U8(msg, NL80211_ATTR_MAX_NUM_SCAN_SSIDS, |
531 | dev->wiphy.max_scan_ssids); | 536 | dev->wiphy.max_scan_ssids); |
532 | NLA_PUT_U16(msg, NL80211_ATTR_MAX_SCAN_IE_LEN, | 537 | NLA_PUT_U16(msg, NL80211_ATTR_MAX_SCAN_IE_LEN, |
@@ -545,6 +550,16 @@ static int nl80211_send_wiphy(struct sk_buff *msg, u32 pid, u32 seq, int flags, | |||
545 | if (dev->wiphy.flags & WIPHY_FLAG_CONTROL_PORT_PROTOCOL) | 550 | if (dev->wiphy.flags & WIPHY_FLAG_CONTROL_PORT_PROTOCOL) |
546 | NLA_PUT_FLAG(msg, NL80211_ATTR_CONTROL_PORT_ETHERTYPE); | 551 | NLA_PUT_FLAG(msg, NL80211_ATTR_CONTROL_PORT_ETHERTYPE); |
547 | 552 | ||
553 | if (dev->ops->get_antenna) { | ||
554 | u32 tx_ant = 0, rx_ant = 0; | ||
555 | int res; | ||
556 | res = dev->ops->get_antenna(&dev->wiphy, &tx_ant, &rx_ant); | ||
557 | if (!res) { | ||
558 | NLA_PUT_U32(msg, NL80211_ATTR_WIPHY_ANTENNA_TX, tx_ant); | ||
559 | NLA_PUT_U32(msg, NL80211_ATTR_WIPHY_ANTENNA_RX, rx_ant); | ||
560 | } | ||
561 | } | ||
562 | |||
548 | nl_modes = nla_nest_start(msg, NL80211_ATTR_SUPPORTED_IFTYPES); | 563 | nl_modes = nla_nest_start(msg, NL80211_ATTR_SUPPORTED_IFTYPES); |
549 | if (!nl_modes) | 564 | if (!nl_modes) |
550 | goto nla_put_failure; | 565 | goto nla_put_failure; |
@@ -1024,6 +1039,22 @@ static int nl80211_set_wiphy(struct sk_buff *skb, struct genl_info *info) | |||
1024 | goto bad_res; | 1039 | goto bad_res; |
1025 | } | 1040 | } |
1026 | 1041 | ||
1042 | if (info->attrs[NL80211_ATTR_WIPHY_ANTENNA_TX] && | ||
1043 | info->attrs[NL80211_ATTR_WIPHY_ANTENNA_RX]) { | ||
1044 | u32 tx_ant, rx_ant; | ||
1045 | if (!rdev->ops->set_antenna) { | ||
1046 | result = -EOPNOTSUPP; | ||
1047 | goto bad_res; | ||
1048 | } | ||
1049 | |||
1050 | tx_ant = nla_get_u32(info->attrs[NL80211_ATTR_WIPHY_ANTENNA_TX]); | ||
1051 | rx_ant = nla_get_u32(info->attrs[NL80211_ATTR_WIPHY_ANTENNA_RX]); | ||
1052 | |||
1053 | result = rdev->ops->set_antenna(&rdev->wiphy, tx_ant, rx_ant); | ||
1054 | if (result) | ||
1055 | goto bad_res; | ||
1056 | } | ||
1057 | |||
1027 | changed = 0; | 1058 | changed = 0; |
1028 | 1059 | ||
1029 | if (info->attrs[NL80211_ATTR_WIPHY_RETRY_SHORT]) { | 1060 | if (info->attrs[NL80211_ATTR_WIPHY_RETRY_SHORT]) { |
@@ -3569,6 +3600,34 @@ static int nl80211_disassociate(struct sk_buff *skb, struct genl_info *info) | |||
3569 | local_state_change); | 3600 | local_state_change); |
3570 | } | 3601 | } |
3571 | 3602 | ||
3603 | static bool | ||
3604 | nl80211_parse_mcast_rate(struct cfg80211_registered_device *rdev, | ||
3605 | int mcast_rate[IEEE80211_NUM_BANDS], | ||
3606 | int rateval) | ||
3607 | { | ||
3608 | struct wiphy *wiphy = &rdev->wiphy; | ||
3609 | bool found = false; | ||
3610 | int band, i; | ||
3611 | |||
3612 | for (band = 0; band < IEEE80211_NUM_BANDS; band++) { | ||
3613 | struct ieee80211_supported_band *sband; | ||
3614 | |||
3615 | sband = wiphy->bands[band]; | ||
3616 | if (!sband) | ||
3617 | continue; | ||
3618 | |||
3619 | for (i = 0; i < sband->n_bitrates; i++) { | ||
3620 | if (sband->bitrates[i].bitrate == rateval) { | ||
3621 | mcast_rate[band] = i + 1; | ||
3622 | found = true; | ||
3623 | break; | ||
3624 | } | ||
3625 | } | ||
3626 | } | ||
3627 | |||
3628 | return found; | ||
3629 | } | ||
3630 | |||
3572 | static int nl80211_join_ibss(struct sk_buff *skb, struct genl_info *info) | 3631 | static int nl80211_join_ibss(struct sk_buff *skb, struct genl_info *info) |
3573 | { | 3632 | { |
3574 | struct cfg80211_registered_device *rdev = info->user_ptr[0]; | 3633 | struct cfg80211_registered_device *rdev = info->user_ptr[0]; |
@@ -3653,6 +3712,11 @@ static int nl80211_join_ibss(struct sk_buff *skb, struct genl_info *info) | |||
3653 | } | 3712 | } |
3654 | } | 3713 | } |
3655 | 3714 | ||
3715 | if (info->attrs[NL80211_ATTR_MCAST_RATE] && | ||
3716 | !nl80211_parse_mcast_rate(rdev, ibss.mcast_rate, | ||
3717 | nla_get_u32(info->attrs[NL80211_ATTR_MCAST_RATE]))) | ||
3718 | return -EINVAL; | ||
3719 | |||
3656 | if (ibss.privacy && info->attrs[NL80211_ATTR_KEYS]) { | 3720 | if (ibss.privacy && info->attrs[NL80211_ATTR_KEYS]) { |
3657 | connkeys = nl80211_parse_connkeys(rdev, | 3721 | connkeys = nl80211_parse_connkeys(rdev, |
3658 | info->attrs[NL80211_ATTR_KEYS]); | 3722 | info->attrs[NL80211_ATTR_KEYS]); |
@@ -5651,6 +5715,51 @@ nl80211_send_cqm_rssi_notify(struct cfg80211_registered_device *rdev, | |||
5651 | nlmsg_free(msg); | 5715 | nlmsg_free(msg); |
5652 | } | 5716 | } |
5653 | 5717 | ||
5718 | void | ||
5719 | nl80211_send_cqm_pktloss_notify(struct cfg80211_registered_device *rdev, | ||
5720 | struct net_device *netdev, const u8 *peer, | ||
5721 | u32 num_packets, gfp_t gfp) | ||
5722 | { | ||
5723 | struct sk_buff *msg; | ||
5724 | struct nlattr *pinfoattr; | ||
5725 | void *hdr; | ||
5726 | |||
5727 | msg = nlmsg_new(NLMSG_GOODSIZE, gfp); | ||
5728 | if (!msg) | ||
5729 | return; | ||
5730 | |||
5731 | hdr = nl80211hdr_put(msg, 0, 0, 0, NL80211_CMD_NOTIFY_CQM); | ||
5732 | if (!hdr) { | ||
5733 | nlmsg_free(msg); | ||
5734 | return; | ||
5735 | } | ||
5736 | |||
5737 | NLA_PUT_U32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx); | ||
5738 | NLA_PUT_U32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex); | ||
5739 | NLA_PUT(msg, NL80211_ATTR_MAC, ETH_ALEN, peer); | ||
5740 | |||
5741 | pinfoattr = nla_nest_start(msg, NL80211_ATTR_CQM); | ||
5742 | if (!pinfoattr) | ||
5743 | goto nla_put_failure; | ||
5744 | |||
5745 | NLA_PUT_U32(msg, NL80211_ATTR_CQM_PKT_LOSS_EVENT, num_packets); | ||
5746 | |||
5747 | nla_nest_end(msg, pinfoattr); | ||
5748 | |||
5749 | if (genlmsg_end(msg, hdr) < 0) { | ||
5750 | nlmsg_free(msg); | ||
5751 | return; | ||
5752 | } | ||
5753 | |||
5754 | genlmsg_multicast_netns(wiphy_net(&rdev->wiphy), msg, 0, | ||
5755 | nl80211_mlme_mcgrp.id, gfp); | ||
5756 | return; | ||
5757 | |||
5758 | nla_put_failure: | ||
5759 | genlmsg_cancel(msg, hdr); | ||
5760 | nlmsg_free(msg); | ||
5761 | } | ||
5762 | |||
5654 | static int nl80211_netlink_notify(struct notifier_block * nb, | 5763 | static int nl80211_netlink_notify(struct notifier_block * nb, |
5655 | unsigned long state, | 5764 | unsigned long state, |
5656 | void *_notify) | 5765 | void *_notify) |
diff --git a/net/wireless/nl80211.h b/net/wireless/nl80211.h index 30d2f939150d..16c2f7190768 100644 --- a/net/wireless/nl80211.h +++ b/net/wireless/nl80211.h | |||
@@ -87,5 +87,9 @@ nl80211_send_cqm_rssi_notify(struct cfg80211_registered_device *rdev, | |||
87 | struct net_device *netdev, | 87 | struct net_device *netdev, |
88 | enum nl80211_cqm_rssi_threshold_event rssi_event, | 88 | enum nl80211_cqm_rssi_threshold_event rssi_event, |
89 | gfp_t gfp); | 89 | gfp_t gfp); |
90 | void | ||
91 | nl80211_send_cqm_pktloss_notify(struct cfg80211_registered_device *rdev, | ||
92 | struct net_device *netdev, const u8 *peer, | ||
93 | u32 num_packets, gfp_t gfp); | ||
90 | 94 | ||
91 | #endif /* __NET_WIRELESS_NL80211_H */ | 95 | #endif /* __NET_WIRELESS_NL80211_H */ |
diff --git a/net/wireless/reg.c b/net/wireless/reg.c index 3be18d9a944f..5ed615f94e0c 100644 --- a/net/wireless/reg.c +++ b/net/wireless/reg.c | |||
@@ -32,6 +32,9 @@ | |||
32 | * rely on some SHA1 checksum of the regdomain for example. | 32 | * rely on some SHA1 checksum of the regdomain for example. |
33 | * | 33 | * |
34 | */ | 34 | */ |
35 | |||
36 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | ||
37 | |||
35 | #include <linux/kernel.h> | 38 | #include <linux/kernel.h> |
36 | #include <linux/slab.h> | 39 | #include <linux/slab.h> |
37 | #include <linux/list.h> | 40 | #include <linux/list.h> |
@@ -48,7 +51,7 @@ | |||
48 | #ifdef CONFIG_CFG80211_REG_DEBUG | 51 | #ifdef CONFIG_CFG80211_REG_DEBUG |
49 | #define REG_DBG_PRINT(format, args...) \ | 52 | #define REG_DBG_PRINT(format, args...) \ |
50 | do { \ | 53 | do { \ |
51 | printk(KERN_DEBUG "cfg80211: " format , ## args); \ | 54 | printk(KERN_DEBUG pr_fmt(format), ##args); \ |
52 | } while (0) | 55 | } while (0) |
53 | #else | 56 | #else |
54 | #define REG_DBG_PRINT(args...) | 57 | #define REG_DBG_PRINT(args...) |
@@ -96,6 +99,9 @@ struct reg_beacon { | |||
96 | struct ieee80211_channel chan; | 99 | struct ieee80211_channel chan; |
97 | }; | 100 | }; |
98 | 101 | ||
102 | static void reg_todo(struct work_struct *work); | ||
103 | static DECLARE_WORK(reg_work, reg_todo); | ||
104 | |||
99 | /* We keep a static world regulatory domain in case of the absence of CRDA */ | 105 | /* We keep a static world regulatory domain in case of the absence of CRDA */ |
100 | static const struct ieee80211_regdomain world_regdom = { | 106 | static const struct ieee80211_regdomain world_regdom = { |
101 | .n_reg_rules = 5, | 107 | .n_reg_rules = 5, |
@@ -367,11 +373,10 @@ static int call_crda(const char *alpha2) | |||
367 | }; | 373 | }; |
368 | 374 | ||
369 | if (!is_world_regdom((char *) alpha2)) | 375 | if (!is_world_regdom((char *) alpha2)) |
370 | printk(KERN_INFO "cfg80211: Calling CRDA for country: %c%c\n", | 376 | pr_info("Calling CRDA for country: %c%c\n", |
371 | alpha2[0], alpha2[1]); | 377 | alpha2[0], alpha2[1]); |
372 | else | 378 | else |
373 | printk(KERN_INFO "cfg80211: Calling CRDA to update world " | 379 | pr_info("Calling CRDA to update world regulatory domain\n"); |
374 | "regulatory domain\n"); | ||
375 | 380 | ||
376 | /* query internal regulatory database (if it exists) */ | 381 | /* query internal regulatory database (if it exists) */ |
377 | reg_regdb_query(alpha2); | 382 | reg_regdb_query(alpha2); |
@@ -1317,6 +1322,21 @@ static int ignore_request(struct wiphy *wiphy, | |||
1317 | return -EINVAL; | 1322 | return -EINVAL; |
1318 | } | 1323 | } |
1319 | 1324 | ||
1325 | static void reg_set_request_processed(void) | ||
1326 | { | ||
1327 | bool need_more_processing = false; | ||
1328 | |||
1329 | last_request->processed = true; | ||
1330 | |||
1331 | spin_lock(®_requests_lock); | ||
1332 | if (!list_empty(®_requests_list)) | ||
1333 | need_more_processing = true; | ||
1334 | spin_unlock(®_requests_lock); | ||
1335 | |||
1336 | if (need_more_processing) | ||
1337 | schedule_work(®_work); | ||
1338 | } | ||
1339 | |||
1320 | /** | 1340 | /** |
1321 | * __regulatory_hint - hint to the wireless core a regulatory domain | 1341 | * __regulatory_hint - hint to the wireless core a regulatory domain |
1322 | * @wiphy: if the hint comes from country information from an AP, this | 1342 | * @wiphy: if the hint comes from country information from an AP, this |
@@ -1392,8 +1412,10 @@ new_request: | |||
1392 | * have applied the requested regulatory domain before we just | 1412 | * have applied the requested regulatory domain before we just |
1393 | * inform userspace we have processed the request | 1413 | * inform userspace we have processed the request |
1394 | */ | 1414 | */ |
1395 | if (r == -EALREADY) | 1415 | if (r == -EALREADY) { |
1396 | nl80211_send_reg_change_event(last_request); | 1416 | nl80211_send_reg_change_event(last_request); |
1417 | reg_set_request_processed(); | ||
1418 | } | ||
1397 | return r; | 1419 | return r; |
1398 | } | 1420 | } |
1399 | 1421 | ||
@@ -1409,16 +1431,13 @@ static void reg_process_hint(struct regulatory_request *reg_request) | |||
1409 | 1431 | ||
1410 | BUG_ON(!reg_request->alpha2); | 1432 | BUG_ON(!reg_request->alpha2); |
1411 | 1433 | ||
1412 | mutex_lock(&cfg80211_mutex); | ||
1413 | mutex_lock(®_mutex); | ||
1414 | |||
1415 | if (wiphy_idx_valid(reg_request->wiphy_idx)) | 1434 | if (wiphy_idx_valid(reg_request->wiphy_idx)) |
1416 | wiphy = wiphy_idx_to_wiphy(reg_request->wiphy_idx); | 1435 | wiphy = wiphy_idx_to_wiphy(reg_request->wiphy_idx); |
1417 | 1436 | ||
1418 | if (reg_request->initiator == NL80211_REGDOM_SET_BY_DRIVER && | 1437 | if (reg_request->initiator == NL80211_REGDOM_SET_BY_DRIVER && |
1419 | !wiphy) { | 1438 | !wiphy) { |
1420 | kfree(reg_request); | 1439 | kfree(reg_request); |
1421 | goto out; | 1440 | return; |
1422 | } | 1441 | } |
1423 | 1442 | ||
1424 | r = __regulatory_hint(wiphy, reg_request); | 1443 | r = __regulatory_hint(wiphy, reg_request); |
@@ -1426,28 +1445,46 @@ static void reg_process_hint(struct regulatory_request *reg_request) | |||
1426 | if (r == -EALREADY && wiphy && | 1445 | if (r == -EALREADY && wiphy && |
1427 | wiphy->flags & WIPHY_FLAG_STRICT_REGULATORY) | 1446 | wiphy->flags & WIPHY_FLAG_STRICT_REGULATORY) |
1428 | wiphy_update_regulatory(wiphy, initiator); | 1447 | wiphy_update_regulatory(wiphy, initiator); |
1429 | out: | ||
1430 | mutex_unlock(®_mutex); | ||
1431 | mutex_unlock(&cfg80211_mutex); | ||
1432 | } | 1448 | } |
1433 | 1449 | ||
1434 | /* Processes regulatory hints, this is all the NL80211_REGDOM_SET_BY_* */ | 1450 | /* |
1451 | * Processes regulatory hints, this is all the NL80211_REGDOM_SET_BY_* | ||
1452 | * Regulatory hints come on a first come first serve basis and we | ||
1453 | * must process each one atomically. | ||
1454 | */ | ||
1435 | static void reg_process_pending_hints(void) | 1455 | static void reg_process_pending_hints(void) |
1436 | { | 1456 | { |
1437 | struct regulatory_request *reg_request; | 1457 | struct regulatory_request *reg_request; |
1438 | 1458 | ||
1459 | mutex_lock(&cfg80211_mutex); | ||
1460 | mutex_lock(®_mutex); | ||
1461 | |||
1462 | /* When last_request->processed becomes true this will be rescheduled */ | ||
1463 | if (last_request && !last_request->processed) { | ||
1464 | REG_DBG_PRINT("Pending regulatory request, waiting " | ||
1465 | "for it to be processed..."); | ||
1466 | goto out; | ||
1467 | } | ||
1468 | |||
1439 | spin_lock(®_requests_lock); | 1469 | spin_lock(®_requests_lock); |
1440 | while (!list_empty(®_requests_list)) { | ||
1441 | reg_request = list_first_entry(®_requests_list, | ||
1442 | struct regulatory_request, | ||
1443 | list); | ||
1444 | list_del_init(®_request->list); | ||
1445 | 1470 | ||
1471 | if (list_empty(®_requests_list)) { | ||
1446 | spin_unlock(®_requests_lock); | 1472 | spin_unlock(®_requests_lock); |
1447 | reg_process_hint(reg_request); | 1473 | goto out; |
1448 | spin_lock(®_requests_lock); | ||
1449 | } | 1474 | } |
1475 | |||
1476 | reg_request = list_first_entry(®_requests_list, | ||
1477 | struct regulatory_request, | ||
1478 | list); | ||
1479 | list_del_init(®_request->list); | ||
1480 | |||
1450 | spin_unlock(®_requests_lock); | 1481 | spin_unlock(®_requests_lock); |
1482 | |||
1483 | reg_process_hint(reg_request); | ||
1484 | |||
1485 | out: | ||
1486 | mutex_unlock(®_mutex); | ||
1487 | mutex_unlock(&cfg80211_mutex); | ||
1451 | } | 1488 | } |
1452 | 1489 | ||
1453 | /* Processes beacon hints -- this has nothing to do with country IEs */ | 1490 | /* Processes beacon hints -- this has nothing to do with country IEs */ |
@@ -1494,8 +1531,6 @@ static void reg_todo(struct work_struct *work) | |||
1494 | reg_process_pending_beacon_hints(); | 1531 | reg_process_pending_beacon_hints(); |
1495 | } | 1532 | } |
1496 | 1533 | ||
1497 | static DECLARE_WORK(reg_work, reg_todo); | ||
1498 | |||
1499 | static void queue_regulatory_request(struct regulatory_request *request) | 1534 | static void queue_regulatory_request(struct regulatory_request *request) |
1500 | { | 1535 | { |
1501 | if (isalpha(request->alpha2[0])) | 1536 | if (isalpha(request->alpha2[0])) |
@@ -1530,12 +1565,7 @@ static int regulatory_hint_core(const char *alpha2) | |||
1530 | request->alpha2[1] = alpha2[1]; | 1565 | request->alpha2[1] = alpha2[1]; |
1531 | request->initiator = NL80211_REGDOM_SET_BY_CORE; | 1566 | request->initiator = NL80211_REGDOM_SET_BY_CORE; |
1532 | 1567 | ||
1533 | /* | 1568 | queue_regulatory_request(request); |
1534 | * This ensures last_request is populated once modules | ||
1535 | * come swinging in and calling regulatory hints and | ||
1536 | * wiphy_apply_custom_regulatory(). | ||
1537 | */ | ||
1538 | reg_process_hint(request); | ||
1539 | 1569 | ||
1540 | return 0; | 1570 | return 0; |
1541 | } | 1571 | } |
@@ -1823,8 +1853,7 @@ static void print_rd_rules(const struct ieee80211_regdomain *rd) | |||
1823 | const struct ieee80211_freq_range *freq_range = NULL; | 1853 | const struct ieee80211_freq_range *freq_range = NULL; |
1824 | const struct ieee80211_power_rule *power_rule = NULL; | 1854 | const struct ieee80211_power_rule *power_rule = NULL; |
1825 | 1855 | ||
1826 | printk(KERN_INFO " (start_freq - end_freq @ bandwidth), " | 1856 | pr_info(" (start_freq - end_freq @ bandwidth), (max_antenna_gain, max_eirp)\n"); |
1827 | "(max_antenna_gain, max_eirp)\n"); | ||
1828 | 1857 | ||
1829 | for (i = 0; i < rd->n_reg_rules; i++) { | 1858 | for (i = 0; i < rd->n_reg_rules; i++) { |
1830 | reg_rule = &rd->reg_rules[i]; | 1859 | reg_rule = &rd->reg_rules[i]; |
@@ -1836,16 +1865,14 @@ static void print_rd_rules(const struct ieee80211_regdomain *rd) | |||
1836 | * in certain regions | 1865 | * in certain regions |
1837 | */ | 1866 | */ |
1838 | if (power_rule->max_antenna_gain) | 1867 | if (power_rule->max_antenna_gain) |
1839 | printk(KERN_INFO " (%d KHz - %d KHz @ %d KHz), " | 1868 | pr_info(" (%d KHz - %d KHz @ %d KHz), (%d mBi, %d mBm)\n", |
1840 | "(%d mBi, %d mBm)\n", | ||
1841 | freq_range->start_freq_khz, | 1869 | freq_range->start_freq_khz, |
1842 | freq_range->end_freq_khz, | 1870 | freq_range->end_freq_khz, |
1843 | freq_range->max_bandwidth_khz, | 1871 | freq_range->max_bandwidth_khz, |
1844 | power_rule->max_antenna_gain, | 1872 | power_rule->max_antenna_gain, |
1845 | power_rule->max_eirp); | 1873 | power_rule->max_eirp); |
1846 | else | 1874 | else |
1847 | printk(KERN_INFO " (%d KHz - %d KHz @ %d KHz), " | 1875 | pr_info(" (%d KHz - %d KHz @ %d KHz), (N/A, %d mBm)\n", |
1848 | "(N/A, %d mBm)\n", | ||
1849 | freq_range->start_freq_khz, | 1876 | freq_range->start_freq_khz, |
1850 | freq_range->end_freq_khz, | 1877 | freq_range->end_freq_khz, |
1851 | freq_range->max_bandwidth_khz, | 1878 | freq_range->max_bandwidth_khz, |
@@ -1864,27 +1891,20 @@ static void print_regdomain(const struct ieee80211_regdomain *rd) | |||
1864 | rdev = cfg80211_rdev_by_wiphy_idx( | 1891 | rdev = cfg80211_rdev_by_wiphy_idx( |
1865 | last_request->wiphy_idx); | 1892 | last_request->wiphy_idx); |
1866 | if (rdev) { | 1893 | if (rdev) { |
1867 | printk(KERN_INFO "cfg80211: Current regulatory " | 1894 | pr_info("Current regulatory domain updated by AP to: %c%c\n", |
1868 | "domain updated by AP to: %c%c\n", | ||
1869 | rdev->country_ie_alpha2[0], | 1895 | rdev->country_ie_alpha2[0], |
1870 | rdev->country_ie_alpha2[1]); | 1896 | rdev->country_ie_alpha2[1]); |
1871 | } else | 1897 | } else |
1872 | printk(KERN_INFO "cfg80211: Current regulatory " | 1898 | pr_info("Current regulatory domain intersected:\n"); |
1873 | "domain intersected:\n"); | ||
1874 | } else | 1899 | } else |
1875 | printk(KERN_INFO "cfg80211: Current regulatory " | 1900 | pr_info("Current regulatory domain intersected:\n"); |
1876 | "domain intersected:\n"); | ||
1877 | } else if (is_world_regdom(rd->alpha2)) | 1901 | } else if (is_world_regdom(rd->alpha2)) |
1878 | printk(KERN_INFO "cfg80211: World regulatory " | 1902 | pr_info("World regulatory domain updated:\n"); |
1879 | "domain updated:\n"); | ||
1880 | else { | 1903 | else { |
1881 | if (is_unknown_alpha2(rd->alpha2)) | 1904 | if (is_unknown_alpha2(rd->alpha2)) |
1882 | printk(KERN_INFO "cfg80211: Regulatory domain " | 1905 | pr_info("Regulatory domain changed to driver built-in settings (unknown country)\n"); |
1883 | "changed to driver built-in settings " | ||
1884 | "(unknown country)\n"); | ||
1885 | else | 1906 | else |
1886 | printk(KERN_INFO "cfg80211: Regulatory domain " | 1907 | pr_info("Regulatory domain changed to country: %c%c\n", |
1887 | "changed to country: %c%c\n", | ||
1888 | rd->alpha2[0], rd->alpha2[1]); | 1908 | rd->alpha2[0], rd->alpha2[1]); |
1889 | } | 1909 | } |
1890 | print_rd_rules(rd); | 1910 | print_rd_rules(rd); |
@@ -1892,8 +1912,7 @@ static void print_regdomain(const struct ieee80211_regdomain *rd) | |||
1892 | 1912 | ||
1893 | static void print_regdomain_info(const struct ieee80211_regdomain *rd) | 1913 | static void print_regdomain_info(const struct ieee80211_regdomain *rd) |
1894 | { | 1914 | { |
1895 | printk(KERN_INFO "cfg80211: Regulatory domain: %c%c\n", | 1915 | pr_info("Regulatory domain: %c%c\n", rd->alpha2[0], rd->alpha2[1]); |
1896 | rd->alpha2[0], rd->alpha2[1]); | ||
1897 | print_rd_rules(rd); | 1916 | print_rd_rules(rd); |
1898 | } | 1917 | } |
1899 | 1918 | ||
@@ -1944,8 +1963,7 @@ static int __set_regdom(const struct ieee80211_regdomain *rd) | |||
1944 | return -EINVAL; | 1963 | return -EINVAL; |
1945 | 1964 | ||
1946 | if (!is_valid_rd(rd)) { | 1965 | if (!is_valid_rd(rd)) { |
1947 | printk(KERN_ERR "cfg80211: Invalid " | 1966 | pr_err("Invalid regulatory domain detected:\n"); |
1948 | "regulatory domain detected:\n"); | ||
1949 | print_regdomain_info(rd); | 1967 | print_regdomain_info(rd); |
1950 | return -EINVAL; | 1968 | return -EINVAL; |
1951 | } | 1969 | } |
@@ -2061,6 +2079,8 @@ int set_regdom(const struct ieee80211_regdomain *rd) | |||
2061 | 2079 | ||
2062 | nl80211_send_reg_change_event(last_request); | 2080 | nl80211_send_reg_change_event(last_request); |
2063 | 2081 | ||
2082 | reg_set_request_processed(); | ||
2083 | |||
2064 | mutex_unlock(®_mutex); | 2084 | mutex_unlock(®_mutex); |
2065 | 2085 | ||
2066 | return r; | 2086 | return r; |
@@ -2117,8 +2137,7 @@ int __init regulatory_init(void) | |||
2117 | * early boot for call_usermodehelper(). For now treat these | 2137 | * early boot for call_usermodehelper(). For now treat these |
2118 | * errors as non-fatal. | 2138 | * errors as non-fatal. |
2119 | */ | 2139 | */ |
2120 | printk(KERN_ERR "cfg80211: kobject_uevent_env() was unable " | 2140 | pr_err("kobject_uevent_env() was unable to call CRDA during init\n"); |
2121 | "to call CRDA during init"); | ||
2122 | #ifdef CONFIG_CFG80211_REG_DEBUG | 2141 | #ifdef CONFIG_CFG80211_REG_DEBUG |
2123 | /* We want to find out exactly why when debugging */ | 2142 | /* We want to find out exactly why when debugging */ |
2124 | WARN_ON(err); | 2143 | WARN_ON(err); |
diff --git a/net/wireless/util.c b/net/wireless/util.c index 76120aeda57d..fee020b15a4e 100644 --- a/net/wireless/util.c +++ b/net/wireless/util.c | |||
@@ -502,7 +502,7 @@ int ieee80211_data_from_8023(struct sk_buff *skb, const u8 *addr, | |||
502 | skb_orphan(skb); | 502 | skb_orphan(skb); |
503 | 503 | ||
504 | if (pskb_expand_head(skb, head_need, 0, GFP_ATOMIC)) { | 504 | if (pskb_expand_head(skb, head_need, 0, GFP_ATOMIC)) { |
505 | printk(KERN_ERR "failed to reallocate Tx buffer\n"); | 505 | pr_err("failed to reallocate Tx buffer\n"); |
506 | return -ENOMEM; | 506 | return -ENOMEM; |
507 | } | 507 | } |
508 | skb->truesize += head_need; | 508 | skb->truesize += head_need; |
@@ -685,20 +685,17 @@ void cfg80211_upload_connect_keys(struct wireless_dev *wdev) | |||
685 | continue; | 685 | continue; |
686 | if (rdev->ops->add_key(wdev->wiphy, dev, i, false, NULL, | 686 | if (rdev->ops->add_key(wdev->wiphy, dev, i, false, NULL, |
687 | &wdev->connect_keys->params[i])) { | 687 | &wdev->connect_keys->params[i])) { |
688 | printk(KERN_ERR "%s: failed to set key %d\n", | 688 | netdev_err(dev, "failed to set key %d\n", i); |
689 | dev->name, i); | ||
690 | continue; | 689 | continue; |
691 | } | 690 | } |
692 | if (wdev->connect_keys->def == i) | 691 | if (wdev->connect_keys->def == i) |
693 | if (rdev->ops->set_default_key(wdev->wiphy, dev, i)) { | 692 | if (rdev->ops->set_default_key(wdev->wiphy, dev, i)) { |
694 | printk(KERN_ERR "%s: failed to set defkey %d\n", | 693 | netdev_err(dev, "failed to set defkey %d\n", i); |
695 | dev->name, i); | ||
696 | continue; | 694 | continue; |
697 | } | 695 | } |
698 | if (wdev->connect_keys->defmgmt == i) | 696 | if (wdev->connect_keys->defmgmt == i) |
699 | if (rdev->ops->set_default_mgmt_key(wdev->wiphy, dev, i)) | 697 | if (rdev->ops->set_default_mgmt_key(wdev->wiphy, dev, i)) |
700 | printk(KERN_ERR "%s: failed to set mgtdef %d\n", | 698 | netdev_err(dev, "failed to set mgtdef %d\n", i); |
701 | dev->name, i); | ||
702 | } | 699 | } |
703 | 700 | ||
704 | kfree(wdev->connect_keys); | 701 | kfree(wdev->connect_keys); |
diff --git a/net/wireless/wext-core.c b/net/wireless/wext-core.c index dc675a3daa3d..fdbc23c10d8c 100644 --- a/net/wireless/wext-core.c +++ b/net/wireless/wext-core.c | |||
@@ -467,8 +467,8 @@ void wireless_send_event(struct net_device * dev, | |||
467 | * The best the driver could do is to log an error message. | 467 | * The best the driver could do is to log an error message. |
468 | * We will do it ourselves instead... | 468 | * We will do it ourselves instead... |
469 | */ | 469 | */ |
470 | printk(KERN_ERR "%s (WE) : Invalid/Unknown Wireless Event (0x%04X)\n", | 470 | netdev_err(dev, "(WE) : Invalid/Unknown Wireless Event (0x%04X)\n", |
471 | dev->name, cmd); | 471 | cmd); |
472 | return; | 472 | return; |
473 | } | 473 | } |
474 | 474 | ||
@@ -476,11 +476,13 @@ void wireless_send_event(struct net_device * dev, | |||
476 | if (descr->header_type == IW_HEADER_TYPE_POINT) { | 476 | if (descr->header_type == IW_HEADER_TYPE_POINT) { |
477 | /* Check if number of token fits within bounds */ | 477 | /* Check if number of token fits within bounds */ |
478 | if (wrqu->data.length > descr->max_tokens) { | 478 | if (wrqu->data.length > descr->max_tokens) { |
479 | printk(KERN_ERR "%s (WE) : Wireless Event too big (%d)\n", dev->name, wrqu->data.length); | 479 | netdev_err(dev, "(WE) : Wireless Event too big (%d)\n", |
480 | wrqu->data.length); | ||
480 | return; | 481 | return; |
481 | } | 482 | } |
482 | if (wrqu->data.length < descr->min_tokens) { | 483 | if (wrqu->data.length < descr->min_tokens) { |
483 | printk(KERN_ERR "%s (WE) : Wireless Event too small (%d)\n", dev->name, wrqu->data.length); | 484 | netdev_err(dev, "(WE) : Wireless Event too small (%d)\n", |
485 | wrqu->data.length); | ||
484 | return; | 486 | return; |
485 | } | 487 | } |
486 | /* Calculate extra_len - extra is NULL for restricted events */ | 488 | /* Calculate extra_len - extra is NULL for restricted events */ |