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authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>2013-04-09 17:06:39 -0400
committerJason Cooper <jason@lakedaemon.net>2013-04-15 10:53:53 -0400
commit513a7917b13370d9fbc41331413428dd713cb3fc (patch)
tree933e15bf6ac76dd394e57f66d1fbcd059b855f68
parent3b723ae8c68af92977ac16144559e0ba884a35c2 (diff)
arm: mvebu: PCIe Device Tree informations for Armada XP GP
The Marvell Armada XP GP board has 3 physical full-size PCIe slots, so we enable the corresponding PCIe interfaces in the Device Tree. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
-rw-r--r--arch/arm/boot/dts/armada-xp-gp.dts21
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts
index e57e9c72eb66..04f28a712b98 100644
--- a/arch/arm/boot/dts/armada-xp-gp.dts
+++ b/arch/arm/boot/dts/armada-xp-gp.dts
@@ -138,5 +138,26 @@
138 bank-width = <2>; 138 bank-width = <2>;
139 }; 139 };
140 }; 140 };
141
142 pcie-controller {
143 status = "okay";
144
145 /*
146 * The 3 slots are physically present as
147 * standard PCIe slots on the board.
148 */
149 pcie@1,0 {
150 /* Port 0, Lane 0 */
151 status = "okay";
152 };
153 pcie@9,0 {
154 /* Port 2, Lane 0 */
155 status = "okay";
156 };
157 pcie@10,0 {
158 /* Port 3, Lane 0 */
159 status = "okay";
160 };
161 };
141 }; 162 };
142}; 163};