diff options
author | Magnus Damm <damm@opensource.se> | 2013-07-11 12:22:19 -0400 |
---|---|---|
committer | Simon Horman <horms+renesas@verge.net.au> | 2013-07-17 01:26:56 -0400 |
commit | 512e53bc7f0088e3adfd89b3fea3447495fc8423 (patch) | |
tree | 16f011bbec8839107a77e0fa4d71fb9a28bede51 | |
parent | 9a1456242c7c644d0032032ba80e8538b8322d3c (diff) |
ARM: shmobile: Introduce r8a7790_read_mode_pins()
Break out the r8a7790 boot mode code into a separate
function so it can be shared by multiple users.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r-- | arch/arm/mach-shmobile/clock-r8a7790.c | 11 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/include/mach/r8a7790.h | 3 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/setup-r8a7790.c | 14 |
3 files changed, 19 insertions, 9 deletions
diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c index 62d8162c7e70..50d96f9cf981 100644 --- a/arch/arm/mach-shmobile/clock-r8a7790.c +++ b/arch/arm/mach-shmobile/clock-r8a7790.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <linux/clkdev.h> | 24 | #include <linux/clkdev.h> |
25 | #include <mach/clock.h> | 25 | #include <mach/clock.h> |
26 | #include <mach/common.h> | 26 | #include <mach/common.h> |
27 | #include <mach/r8a7790.h> | ||
27 | 28 | ||
28 | /* | 29 | /* |
29 | * MD EXTAL PLL0 PLL1 PLL3 | 30 | * MD EXTAL PLL0 PLL1 PLL3 |
@@ -42,8 +43,6 @@ | |||
42 | * see "p1 / 2" on R8A7790_CLOCK_ROOT() below | 43 | * see "p1 / 2" on R8A7790_CLOCK_ROOT() below |
43 | */ | 44 | */ |
44 | 45 | ||
45 | #define MD(nr) (1 << nr) | ||
46 | |||
47 | #define CPG_BASE 0xe6150000 | 46 | #define CPG_BASE 0xe6150000 |
48 | #define CPG_LEN 0x1000 | 47 | #define CPG_LEN 0x1000 |
49 | 48 | ||
@@ -53,7 +52,6 @@ | |||
53 | #define SMSTPCR5 0xe6150144 | 52 | #define SMSTPCR5 0xe6150144 |
54 | #define SMSTPCR7 0xe615014c | 53 | #define SMSTPCR7 0xe615014c |
55 | 54 | ||
56 | #define MODEMR 0xE6160060 | ||
57 | #define SDCKCR 0xE6150074 | 55 | #define SDCKCR 0xE6150074 |
58 | #define SD2CKCR 0xE6150078 | 56 | #define SD2CKCR 0xE6150078 |
59 | #define SD3CKCR 0xE615007C | 57 | #define SD3CKCR 0xE615007C |
@@ -288,14 +286,9 @@ static struct clk_lookup lookups[] = { | |||
288 | 286 | ||
289 | void __init r8a7790_clock_init(void) | 287 | void __init r8a7790_clock_init(void) |
290 | { | 288 | { |
291 | void __iomem *modemr = ioremap_nocache(MODEMR, PAGE_SIZE); | 289 | u32 mode = r8a7790_read_mode_pins(); |
292 | u32 mode; | ||
293 | int k, ret = 0; | 290 | int k, ret = 0; |
294 | 291 | ||
295 | BUG_ON(!modemr); | ||
296 | mode = ioread32(modemr); | ||
297 | iounmap(modemr); | ||
298 | |||
299 | switch (mode & (MD(14) | MD(13))) { | 292 | switch (mode & (MD(14) | MD(13))) { |
300 | case 0: | 293 | case 0: |
301 | R8A7790_CLOCK_ROOT(15, &extal_clk, 172, 208, 106, 88); | 294 | R8A7790_CLOCK_ROOT(15, &extal_clk, 172, 208, 106, 88); |
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7790.h b/arch/arm/mach-shmobile/include/mach/r8a7790.h index 7851cc1bc9fb..7aaef409a059 100644 --- a/arch/arm/mach-shmobile/include/mach/r8a7790.h +++ b/arch/arm/mach-shmobile/include/mach/r8a7790.h | |||
@@ -7,4 +7,7 @@ void r8a7790_pinmux_init(void); | |||
7 | void r8a7790_init_delay(void); | 7 | void r8a7790_init_delay(void); |
8 | void r8a7790_timer_init(void); | 8 | void r8a7790_timer_init(void); |
9 | 9 | ||
10 | #define MD(nr) BIT(nr) | ||
11 | u32 r8a7790_read_mode_pins(void); | ||
12 | |||
10 | #endif /* __ASM_R8A7790_H__ */ | 13 | #endif /* __ASM_R8A7790_H__ */ |
diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c index f01542e13e58..6acddc139d88 100644 --- a/arch/arm/mach-shmobile/setup-r8a7790.c +++ b/arch/arm/mach-shmobile/setup-r8a7790.c | |||
@@ -196,6 +196,20 @@ void __init r8a7790_add_standard_devices(void) | |||
196 | r8a7790_register_cmt(00); | 196 | r8a7790_register_cmt(00); |
197 | } | 197 | } |
198 | 198 | ||
199 | #define MODEMR 0xe6160060 | ||
200 | |||
201 | u32 __init r8a7790_read_mode_pins(void) | ||
202 | { | ||
203 | void __iomem *modemr = ioremap_nocache(MODEMR, 4); | ||
204 | u32 mode; | ||
205 | |||
206 | BUG_ON(!modemr); | ||
207 | mode = ioread32(modemr); | ||
208 | iounmap(modemr); | ||
209 | |||
210 | return mode; | ||
211 | } | ||
212 | |||
199 | void __init r8a7790_timer_init(void) | 213 | void __init r8a7790_timer_init(void) |
200 | { | 214 | { |
201 | void __iomem *cntcr; | 215 | void __iomem *cntcr; |