aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorLinus Walleij <linus.walleij@linaro.org>2013-11-15 08:06:00 -0500
committerLinus Walleij <linus.walleij@linaro.org>2013-11-26 15:01:56 -0500
commit5026119fbef49ce64fc5469c5d3c2d7c313469fb (patch)
tree1893f6f206135da854b2dc3ac7c54f73cac8e6da
parent1a780d45b10eb904be6a923fa09365255b5e733b (diff)
ARM: ux500: move the WLAN GPIO pin setup to the device tree
This moves some of the pin setup related to the CW1200 WLAN module over to the device tree. As the driver is not yet activated for the CW1200 WLAN we do not assign this pinctrl state to any device node yet. Get rid of the cmdline argument passing of a certain U9500 platform variant, as this is not supported by the kernel or any device tree. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r--arch/arm/boot/dts/ste-href-family-pinctrl.dtsi19
-rw-r--r--arch/arm/mach-ux500/board-mop500-pins.c75
2 files changed, 19 insertions, 75 deletions
diff --git a/arch/arm/boot/dts/ste-href-family-pinctrl.dtsi b/arch/arm/boot/dts/ste-href-family-pinctrl.dtsi
index 854a4a6e521e..addfcc7c2750 100644
--- a/arch/arm/boot/dts/ste-href-family-pinctrl.dtsi
+++ b/arch/arm/boot/dts/ste-href-family-pinctrl.dtsi
@@ -721,6 +721,25 @@
721 }; 721 };
722 }; 722 };
723 }; 723 };
724
725 wlan {
726 wlan_default_mode: wlan_default {
727 /*
728 * Activate this mode with the WLAN chip.
729 * These are plain GPIO pins used by WLAN
730 */
731 default_cfg1 {
732 ste,pins =
733 "GPIO226_AF8", /* WLAN_PMU_EN */
734 "GPIO85_D5"; /* WLAN_ENA */
735 ste,config = <&gpio_out_lo>;
736 };
737 default_cfg2 {
738 ste,pins = "GPIO4_AH6"; /* WLAN_IRQ on UART1 */
739 ste,config = <&gpio_in_pu>;
740 };
741 };
742 };
724 }; 743 };
725 }; 744 };
726}; 745};
diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c
index 4535702a8e3f..d0d527a3d205 100644
--- a/arch/arm/mach-ux500/board-mop500-pins.c
+++ b/arch/arm/mach-ux500/board-mop500-pins.c
@@ -16,19 +16,11 @@
16 16
17#include "board-mop500.h" 17#include "board-mop500.h"
18 18
19enum custom_pin_cfg_t {
20 PINS_FOR_DEFAULT,
21 PINS_FOR_U9500,
22};
23
24static enum custom_pin_cfg_t pinsfor;
25
26/* These simply sets bias for pins */ 19/* These simply sets bias for pins */
27#define BIAS(a,b) static unsigned long a[] = { b } 20#define BIAS(a,b) static unsigned long a[] = { b }
28 21
29BIAS(pd, PIN_PULL_DOWN); 22BIAS(pd, PIN_PULL_DOWN);
30BIAS(in_pu, PIN_INPUT_PULLUP); 23BIAS(in_pu, PIN_INPUT_PULLUP);
31BIAS(in_pd, PIN_INPUT_PULLDOWN);
32BIAS(out_lo, PIN_OUTPUT_LOW); 24BIAS(out_lo, PIN_OUTPUT_LOW);
33 25
34BIAS(abx500_out_lo, PIN_CONF_PACKED(PIN_CONFIG_OUTPUT, 0)); 26BIAS(abx500_out_lo, PIN_CONF_PACKED(PIN_CONFIG_OUTPUT, 0));
@@ -38,8 +30,6 @@ BIAS(abx500_in_nopull, PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_DOWN, 0));
38/* These also force them into GPIO mode */ 30/* These also force them into GPIO mode */
39BIAS(gpio_in_pu, PIN_INPUT_PULLUP|PIN_GPIOMODE_ENABLED); 31BIAS(gpio_in_pu, PIN_INPUT_PULLUP|PIN_GPIOMODE_ENABLED);
40BIAS(gpio_in_pd, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED); 32BIAS(gpio_in_pd, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED);
41BIAS(gpio_in_pu_slpm_gpio_nopull, PIN_INPUT_PULLUP|PIN_GPIOMODE_ENABLED|PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL);
42BIAS(gpio_in_pd_slpm_gpio_nopull, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED|PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL);
43BIAS(gpio_out_hi, PIN_OUTPUT_HIGH|PIN_GPIOMODE_ENABLED); 33BIAS(gpio_out_hi, PIN_OUTPUT_HIGH|PIN_GPIOMODE_ENABLED);
44BIAS(gpio_out_lo, PIN_OUTPUT_LOW|PIN_GPIOMODE_ENABLED); 34BIAS(gpio_out_lo, PIN_OUTPUT_LOW|PIN_GPIOMODE_ENABLED);
45 35
@@ -317,8 +307,6 @@ static struct pinctrl_map __initdata ab8505_pinmap[] = {
317 * and SSP1 ports (previously connected to the AB8500) as generic GPIO lines. 307 * and SSP1 ports (previously connected to the AB8500) as generic GPIO lines.
318 */ 308 */
319static struct pinctrl_map __initdata hrefv60_pinmap[] = { 309static struct pinctrl_map __initdata hrefv60_pinmap[] = {
320 /* Drive WLAN_ENA low */
321 DB8500_PIN_HOG("GPIO85_D5", gpio_out_lo), /* WLAN_ENA */
322 /* 310 /*
323 * XENON Flashgun on image processor GPIO (controlled from image 311 * XENON Flashgun on image processor GPIO (controlled from image
324 * processor firmware), mux in these image processor GPIO lines 0 312 * processor firmware), mux in these image processor GPIO lines 0
@@ -384,27 +372,6 @@ static struct pinctrl_map __initdata hrefv60_pinmap[] = {
384 DB8500_PIN_HOG("GPIO83_D3", gpio_in_pu), /* ACC_INT2 */ 372 DB8500_PIN_HOG("GPIO83_D3", gpio_in_pu), /* ACC_INT2 */
385}; 373};
386 374
387static struct pinctrl_map __initdata u9500_pinmap[] = {
388 /* WLAN_IRQ line */
389 DB8500_PIN_HOG("GPIO144_B13", gpio_in_pu),
390 /* HSI */
391 DB8500_MUX_HOG("hsir_a_1", "hsi"),
392 DB8500_MUX_HOG("hsit_a_2", "hsi"),
393 DB8500_PIN_HOG("GPIO219_AG10", in_pd), /* RX FLA0 */
394 DB8500_PIN_HOG("GPIO220_AH10", in_pd), /* RX DAT0 */
395 DB8500_PIN_HOG("GPIO221_AJ11", out_lo), /* RX RDY0 */
396 DB8500_PIN_HOG("GPIO222_AJ9", out_lo), /* TX FLA0 */
397 DB8500_PIN_HOG("GPIO223_AH9", out_lo), /* TX DAT0 */
398 DB8500_PIN_HOG("GPIO224_AG9", in_pd), /* TX RDY0 */
399 DB8500_PIN_HOG("GPIO225_AG8", in_pd), /* CAWAKE0 */
400 DB8500_PIN_HOG("GPIO226_AF8", gpio_out_hi), /* ACWAKE0 */
401};
402
403static struct pinctrl_map __initdata u8500_pinmap[] = {
404 DB8500_PIN_HOG("GPIO226_AF8", gpio_out_lo), /* WLAN_PMU_EN */
405 DB8500_PIN_HOG("GPIO4_AH6", gpio_in_pu), /* WLAN_IRQ */
406};
407
408static struct pinctrl_map __initdata snowball_pinmap[] = { 375static struct pinctrl_map __initdata snowball_pinmap[] = {
409 /* Mux in SSP0 connected to AB8500, pull down RXD pin */ 376 /* Mux in SSP0 connected to AB8500, pull down RXD pin */
410 DB8500_MUX_HOG("ssp0_a_1", "ssp0"), 377 DB8500_MUX_HOG("ssp0_a_1", "ssp0"),
@@ -426,47 +393,8 @@ static struct pinctrl_map __initdata snowball_pinmap[] = {
426 DB8500_PIN_HOG("GPIO216_AG12", gpio_in_pu), /* WLAN_IRQ */ 393 DB8500_PIN_HOG("GPIO216_AG12", gpio_in_pu), /* WLAN_IRQ */
427}; 394};
428 395
429/*
430 * passing "pinsfor=" in kernel cmdline allows for custom
431 * configuration of GPIOs on u8500 derived boards.
432 */
433static int __init early_pinsfor(char *p)
434{
435 pinsfor = PINS_FOR_DEFAULT;
436
437 if (strcmp(p, "u9500-21") == 0)
438 pinsfor = PINS_FOR_U9500;
439
440 return 0;
441}
442early_param("pinsfor", early_pinsfor);
443
444int pins_for_u9500(void)
445{
446 if (pinsfor == PINS_FOR_U9500)
447 return 1;
448
449 return 0;
450}
451
452static void __init mop500_href_family_pinmaps_init(void)
453{
454 switch (pinsfor) {
455 case PINS_FOR_U9500:
456 pinctrl_register_mappings(u9500_pinmap,
457 ARRAY_SIZE(u9500_pinmap));
458 break;
459 case PINS_FOR_DEFAULT:
460 pinctrl_register_mappings(u8500_pinmap,
461 ARRAY_SIZE(u8500_pinmap));
462 default:
463 break;
464 }
465}
466
467void __init mop500_pinmaps_init(void) 396void __init mop500_pinmaps_init(void)
468{ 397{
469 mop500_href_family_pinmaps_init();
470 if (machine_is_u8520()) 398 if (machine_is_u8520())
471 pinctrl_register_mappings(ab8505_pinmap, 399 pinctrl_register_mappings(ab8505_pinmap,
472 ARRAY_SIZE(ab8505_pinmap)); 400 ARRAY_SIZE(ab8505_pinmap));
@@ -479,8 +407,6 @@ void __init snowball_pinmaps_init(void)
479{ 407{
480 pinctrl_register_mappings(snowball_pinmap, 408 pinctrl_register_mappings(snowball_pinmap,
481 ARRAY_SIZE(snowball_pinmap)); 409 ARRAY_SIZE(snowball_pinmap));
482 pinctrl_register_mappings(u8500_pinmap,
483 ARRAY_SIZE(u8500_pinmap));
484 pinctrl_register_mappings(ab8500_pinmap, 410 pinctrl_register_mappings(ab8500_pinmap,
485 ARRAY_SIZE(ab8500_pinmap)); 411 ARRAY_SIZE(ab8500_pinmap));
486} 412}
@@ -489,7 +415,6 @@ void __init hrefv60_pinmaps_init(void)
489{ 415{
490 pinctrl_register_mappings(hrefv60_pinmap, 416 pinctrl_register_mappings(hrefv60_pinmap,
491 ARRAY_SIZE(hrefv60_pinmap)); 417 ARRAY_SIZE(hrefv60_pinmap));
492 mop500_href_family_pinmaps_init();
493 pinctrl_register_mappings(ab8500_pinmap, 418 pinctrl_register_mappings(ab8500_pinmap,
494 ARRAY_SIZE(ab8500_pinmap)); 419 ARRAY_SIZE(ab8500_pinmap));
495} 420}