diff options
| author | Thierry Reding <treding@nvidia.com> | 2015-01-21 11:13:00 -0500 |
|---|---|---|
| committer | Michael Turquette <mturquette@linaro.org> | 2015-01-24 19:56:55 -0500 |
| commit | 4e88f3de89fbb7b5a5a0aca20376b276d26732ac (patch) | |
| tree | 010afff654b43fd252c9b1482b034781a3cbfaa1 | |
| parent | 97bf6af1f928216fd6c5a66e8a57bfa95a659672 (diff) | |
clk: Introduce clk_has_parent()
This new function is similar to clk_set_parent(), except that it doesn't
actually change the parent. It merely checks that the given parent clock
can be a parent for the given clock.
A situation where this is useful is to check that a particular setup is
valid before switching to it. One specific use-case for this is atomic
modesetting in the DRM framework where setting a mode is divided into a
check phase where a given configuration is validated before applying
changes to the hardware.
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
| -rw-r--r-- | drivers/clk/clk.c | 30 | ||||
| -rw-r--r-- | include/linux/clk.h | 17 |
2 files changed, 47 insertions, 0 deletions
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index f4963b7d4e17..5272ad71929f 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c | |||
| @@ -1652,6 +1652,36 @@ void __clk_reparent(struct clk *clk, struct clk *new_parent) | |||
| 1652 | } | 1652 | } |
| 1653 | 1653 | ||
| 1654 | /** | 1654 | /** |
| 1655 | * clk_has_parent - check if a clock is a possible parent for another | ||
| 1656 | * @clk: clock source | ||
| 1657 | * @parent: parent clock source | ||
| 1658 | * | ||
| 1659 | * This function can be used in drivers that need to check that a clock can be | ||
| 1660 | * the parent of another without actually changing the parent. | ||
| 1661 | * | ||
| 1662 | * Returns true if @parent is a possible parent for @clk, false otherwise. | ||
| 1663 | */ | ||
| 1664 | bool clk_has_parent(struct clk *clk, struct clk *parent) | ||
| 1665 | { | ||
| 1666 | unsigned int i; | ||
| 1667 | |||
| 1668 | /* NULL clocks should be nops, so return success if either is NULL. */ | ||
| 1669 | if (!clk || !parent) | ||
| 1670 | return true; | ||
| 1671 | |||
| 1672 | /* Optimize for the case where the parent is already the parent. */ | ||
| 1673 | if (clk->parent == parent) | ||
| 1674 | return true; | ||
| 1675 | |||
| 1676 | for (i = 0; i < clk->num_parents; i++) | ||
| 1677 | if (strcmp(clk->parent_names[i], parent->name) == 0) | ||
| 1678 | return true; | ||
| 1679 | |||
| 1680 | return false; | ||
| 1681 | } | ||
| 1682 | EXPORT_SYMBOL_GPL(clk_has_parent); | ||
| 1683 | |||
| 1684 | /** | ||
| 1655 | * clk_set_parent - switch the parent of a mux clk | 1685 | * clk_set_parent - switch the parent of a mux clk |
| 1656 | * @clk: the mux clk whose input we are switching | 1686 | * @clk: the mux clk whose input we are switching |
| 1657 | * @parent: the new input to clk | 1687 | * @parent: the new input to clk |
diff --git a/include/linux/clk.h b/include/linux/clk.h index c7f258a81761..ba7e9eda4347 100644 --- a/include/linux/clk.h +++ b/include/linux/clk.h | |||
| @@ -302,6 +302,18 @@ long clk_round_rate(struct clk *clk, unsigned long rate); | |||
| 302 | int clk_set_rate(struct clk *clk, unsigned long rate); | 302 | int clk_set_rate(struct clk *clk, unsigned long rate); |
| 303 | 303 | ||
| 304 | /** | 304 | /** |
| 305 | * clk_has_parent - check if a clock is a possible parent for another | ||
| 306 | * @clk: clock source | ||
| 307 | * @parent: parent clock source | ||
| 308 | * | ||
| 309 | * This function can be used in drivers that need to check that a clock can be | ||
| 310 | * the parent of another without actually changing the parent. | ||
| 311 | * | ||
| 312 | * Returns true if @parent is a possible parent for @clk, false otherwise. | ||
| 313 | */ | ||
| 314 | bool clk_has_parent(struct clk *clk, struct clk *parent); | ||
| 315 | |||
| 316 | /** | ||
| 305 | * clk_set_parent - set the parent clock source for this clock | 317 | * clk_set_parent - set the parent clock source for this clock |
| 306 | * @clk: clock source | 318 | * @clk: clock source |
| 307 | * @parent: parent clock source | 319 | * @parent: parent clock source |
| @@ -374,6 +386,11 @@ static inline long clk_round_rate(struct clk *clk, unsigned long rate) | |||
| 374 | return 0; | 386 | return 0; |
| 375 | } | 387 | } |
| 376 | 388 | ||
| 389 | static inline bool clk_has_parent(struct clk *clk, struct clk *parent) | ||
| 390 | { | ||
| 391 | return true; | ||
| 392 | } | ||
| 393 | |||
| 377 | static inline int clk_set_parent(struct clk *clk, struct clk *parent) | 394 | static inline int clk_set_parent(struct clk *clk, struct clk *parent) |
| 378 | { | 395 | { |
| 379 | return 0; | 396 | return 0; |
