diff options
| author | Will Deacon <will.deacon@arm.com> | 2012-12-02 12:44:36 -0500 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2013-01-10 16:09:32 -0500 |
| commit | 4e3c1944808b0278ea4733afcde5cb9421f8a570 (patch) | |
| tree | 4e2e78617620b6c0d252dbff98eeaa811e3c0fab | |
| parent | 8e9c24a2b2e00368262b974d6ea1ac5310570bbe (diff) | |
ARM: virt: use PSR_N_BIT for detecting boot CPU mode mismatch
During boot, we detect whether or not all CPUs are brought up in the
same mode and signal this to the kernel using the N bit in the SPSR.
This patch tidies up the checking code to use the PSR_N_BIT macro,
rather than hardcoding the bit field and commenting it as such.
Signed-off-by: Will Deacon <will.deacon@arm.com>
| -rw-r--r-- | arch/arm/include/asm/virt.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/include/asm/virt.h b/arch/arm/include/asm/virt.h index 86164df86cb4..50af92bac737 100644 --- a/arch/arm/include/asm/virt.h +++ b/arch/arm/include/asm/virt.h | |||
| @@ -24,9 +24,9 @@ | |||
| 24 | /* | 24 | /* |
| 25 | * Flag indicating that the kernel was not entered in the same mode on every | 25 | * Flag indicating that the kernel was not entered in the same mode on every |
| 26 | * CPU. The zImage loader stashes this value in an SPSR, so we need an | 26 | * CPU. The zImage loader stashes this value in an SPSR, so we need an |
| 27 | * architecturally defined flag bit here (the N flag, as it happens) | 27 | * architecturally defined flag bit here. |
| 28 | */ | 28 | */ |
| 29 | #define BOOT_CPU_MODE_MISMATCH (1<<31) | 29 | #define BOOT_CPU_MODE_MISMATCH PSR_N_BIT |
| 30 | 30 | ||
| 31 | #ifndef __ASSEMBLY__ | 31 | #ifndef __ASSEMBLY__ |
| 32 | 32 | ||