aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2014-10-10 22:04:49 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2014-10-10 22:04:49 -0400
commit4d9708ea5e5a45973df7cf965805fdfb185dd5bf (patch)
tree833a918e85f1e3bff8cb182517707d12836d10a8
parent754c780953397dd5ee5191b7b3ca67e09088ce7a (diff)
parenta66d05d504a24894a8fdf11e4569752f313e5764 (diff)
Merge tag 'media/v3.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media
Pull media updates from Mauro Carvalho Chehab: - new IR driver: hix5hd2-ir - the virtual test driver (vivi) was replaced by vivid, with has an almost complete set of features to emulate most v4l2 devices and properly test all sorts of userspace apps - the as102 driver had several bugs fixed and was properly split into a frontend and a core driver. With that, it got promoted from staging into mainstream - one new CI driver got added for CIMaX SP2/SP2HF (sp2 driver) - one new frontend driver for Toshiba ISDB-T/ISDB-S demod (tc90522) - one new PCI driver for ISDB-T/ISDB-S (pt3 driver) - saa7134 driver got support for go7007-based devices - added a new PCI driver for Techwell 68xx chipsets (tw68) - a new platform driver was added (coda) - new tuner drivers: mxl301rf and qm1d1c0042 - a new DVB USB driver was added for DVBSky S860 & similar devices - added a new SDR driver (hackrf) - usbtv got audio support - several platform drivers are now compiled with COMPILE_TEST - a series of compiler fixup patches, making sparse/spatch happier with the media stuff and removing several warnings, especially on those platform drivers that didn't use to compile on x86 - Support for several new modern devices got added - lots of other fixes, improvements and cleanups * tag 'media/v3.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (544 commits) [media] ir-hix5hd2: fix build on c6x arch [media] pt3: fix DTV FE I2C driver load error paths Revert "[media] media: em28xx - remove reset_resume interface" [media] exynos4-is: fix some warnings when compiling on arm64 [media] usb drivers: use %zu instead of %zd [media] pci drivers: use %zu instead of %zd [media] dvb-frontends: use %zu instead of %zd [media] s5p-mfc: Fix several printk warnings [media] s5p_mfc_opr: Fix warnings [media] ti-vpe: Fix typecast [media] s3c-camif: fix dma_addr_t printks [media] s5p_mfc_opr_v6: get rid of warnings when compiled with 64 bits [media] s5p_mfc_opr_v5: Fix lots of warnings on x86_64 [media] em28xx: Fix identation [media] drxd: remove a dead code [media] saa7146: remove return after BUG() [media] cx88: remove return after BUG() [media] cx88: fix cards table CodingStyle [media] radio-sf16fmr2: declare some structs as static [media] radio-sf16fmi: declare pnp_attached as static ...
-rw-r--r--Documentation/DocBook/media/v4l/compat.xml6
-rw-r--r--Documentation/DocBook/media/v4l/controls.xml55
-rw-r--r--Documentation/DocBook/media/v4l/pixfmt-packed-rgb.xml52
-rw-r--r--Documentation/DocBook/media/v4l/vidioc-dqevent.xml7
-rw-r--r--Documentation/DocBook/media/v4l/vidioc-g-edid.xml14
-rw-r--r--Documentation/DocBook/media/v4l/vidioc-subscribe-event.xml2
-rw-r--r--Documentation/devicetree/bindings/media/hix5hd2-ir.txt25
-rwxr-xr-xDocumentation/dvb/get_dvb_firmware24
-rw-r--r--Documentation/video4linux/vivid.txt1111
-rw-r--r--MAINTAINERS28
-rw-r--r--drivers/media/common/b2c2/flexcop.h2
-rw-r--r--drivers/media/common/saa7146/saa7146_fops.c3
-rw-r--r--drivers/media/common/siano/sms-cards.c6
-rw-r--r--drivers/media/common/siano/sms-cards.h1
-rw-r--r--drivers/media/common/siano/smscoreapi.c4
-rw-r--r--drivers/media/dvb-core/dmxdev.c7
-rw-r--r--drivers/media/dvb-core/dvb-usb-ids.h2
-rw-r--r--drivers/media/dvb-core/dvb_frontend.c45
-rw-r--r--drivers/media/dvb-core/dvb_frontend.h2
-rw-r--r--drivers/media/dvb-core/dvb_ringbuffer.c26
-rw-r--r--drivers/media/dvb-core/dvb_ringbuffer.h2
-rw-r--r--drivers/media/dvb-frontends/Kconfig20
-rw-r--r--drivers/media/dvb-frontends/Makefile4
-rw-r--r--drivers/media/dvb-frontends/af9013.c24
-rw-r--r--drivers/media/dvb-frontends/af9033.c757
-rw-r--r--drivers/media/dvb-frontends/af9033.h58
-rw-r--r--drivers/media/dvb-frontends/af9033_priv.h1
-rw-r--r--drivers/media/dvb-frontends/as102_fe.c480
-rw-r--r--drivers/media/dvb-frontends/as102_fe.h29
-rw-r--r--drivers/media/dvb-frontends/as102_fe_types.h (renamed from drivers/staging/media/as102/as10x_types.h)6
-rw-r--r--drivers/media/dvb-frontends/bcm3510.c6
-rw-r--r--drivers/media/dvb-frontends/cxd2820r_c.c4
-rw-r--r--drivers/media/dvb-frontends/cxd2820r_core.c4
-rw-r--r--drivers/media/dvb-frontends/cxd2820r_t.c4
-rw-r--r--drivers/media/dvb-frontends/dib7000p.c2
-rw-r--r--drivers/media/dvb-frontends/drx39xyj/drxj.c38
-rw-r--r--drivers/media/dvb-frontends/drxd_hard.c9
-rw-r--r--drivers/media/dvb-frontends/drxk_hard.c37
-rw-r--r--drivers/media/dvb-frontends/m88ds3103.c101
-rw-r--r--drivers/media/dvb-frontends/m88ds3103.h35
-rw-r--r--drivers/media/dvb-frontends/mb86a16.c6
-rw-r--r--drivers/media/dvb-frontends/mb86a20s.c14
-rw-r--r--drivers/media/dvb-frontends/mt312.c2
-rw-r--r--drivers/media/dvb-frontends/or51211.c2
-rw-r--r--drivers/media/dvb-frontends/rtl2832.c2
-rw-r--r--drivers/media/dvb-frontends/rtl2832_sdr.c118
-rw-r--r--drivers/media/dvb-frontends/si2165.c63
-rw-r--r--drivers/media/dvb-frontends/si2165_priv.h2
-rw-r--r--drivers/media/dvb-frontends/si2168.c129
-rw-r--r--drivers/media/dvb-frontends/si2168.h6
-rw-r--r--drivers/media/dvb-frontends/si2168_priv.h2
-rw-r--r--drivers/media/dvb-frontends/si21xx.c3
-rw-r--r--drivers/media/dvb-frontends/sp2.c441
-rw-r--r--drivers/media/dvb-frontends/sp2.h53
-rw-r--r--drivers/media/dvb-frontends/sp2_priv.h50
-rw-r--r--drivers/media/dvb-frontends/sp8870.c3
-rw-r--r--drivers/media/dvb-frontends/stv0367.c12
-rw-r--r--drivers/media/dvb-frontends/stv0900_core.c7
-rw-r--r--drivers/media/dvb-frontends/stv0900_sw.c3
-rw-r--r--drivers/media/dvb-frontends/tc90522.c840
-rw-r--r--drivers/media/dvb-frontends/tc90522.h42
-rw-r--r--drivers/media/dvb-frontends/tda10071.c2
-rw-r--r--drivers/media/dvb-frontends/zl10039.c2
-rw-r--r--drivers/media/firewire/firedtv-avc.c10
-rw-r--r--drivers/media/i2c/adv7343_regs.h2
-rw-r--r--drivers/media/i2c/adv7604.c2
-rw-r--r--drivers/media/i2c/adv7842.c4
-rw-r--r--drivers/media/i2c/lm3560.c4
-rw-r--r--drivers/media/i2c/ov7670.c14
-rw-r--r--drivers/media/i2c/s5k5baf.c2
-rw-r--r--drivers/media/i2c/saa6752hs.c6
-rw-r--r--drivers/media/i2c/smiapp/smiapp-core.c143
-rw-r--r--drivers/media/i2c/smiapp/smiapp.h4
-rw-r--r--drivers/media/i2c/soc_camera/mt9t112.c4
-rw-r--r--drivers/media/i2c/soc_camera/ov772x.c5
-rw-r--r--drivers/media/i2c/soc_camera/ov9740.c4
-rw-r--r--drivers/media/i2c/tda7432.c2
-rw-r--r--drivers/media/i2c/tvp7002.c21
-rw-r--r--drivers/media/i2c/vs6624.c14
-rw-r--r--drivers/media/media-device.c6
-rw-r--r--drivers/media/media-devnode.c3
-rw-r--r--drivers/media/parport/pms.c7
-rw-r--r--drivers/media/pci/Kconfig2
-rw-r--r--drivers/media/pci/Makefile3
-rw-r--r--drivers/media/pci/bt8xx/bttv-driver.c5
-rw-r--r--drivers/media/pci/bt8xx/dst_ca.c4
-rw-r--r--drivers/media/pci/cx18/cx18-alsa-pcm.c2
-rw-r--r--drivers/media/pci/cx18/cx18-firmware.c6
-rw-r--r--drivers/media/pci/cx18/cx18-queue.c2
-rw-r--r--drivers/media/pci/cx23885/Kconfig9
-rw-r--r--drivers/media/pci/cx23885/Makefile1
-rw-r--r--drivers/media/pci/cx23885/altera-ci.c8
-rw-r--r--drivers/media/pci/cx23885/altera-ci.h4
-rw-r--r--drivers/media/pci/cx23885/cimax2.c4
-rw-r--r--drivers/media/pci/cx23885/cimax2.h4
-rw-r--r--drivers/media/pci/cx23885/cx23885-417.c503
-rw-r--r--drivers/media/pci/cx23885/cx23885-alsa.c109
-rw-r--r--drivers/media/pci/cx23885/cx23885-av.c5
-rw-r--r--drivers/media/pci/cx23885/cx23885-av.h5
-rw-r--r--drivers/media/pci/cx23885/cx23885-cards.c32
-rw-r--r--drivers/media/pci/cx23885/cx23885-core.c362
-rw-r--r--drivers/media/pci/cx23885/cx23885-dvb.c323
-rw-r--r--drivers/media/pci/cx23885/cx23885-f300.c4
-rw-r--r--drivers/media/pci/cx23885/cx23885-i2c.c12
-rw-r--r--drivers/media/pci/cx23885/cx23885-input.c5
-rw-r--r--drivers/media/pci/cx23885/cx23885-input.h5
-rw-r--r--drivers/media/pci/cx23885/cx23885-ioctl.c10
-rw-r--r--drivers/media/pci/cx23885/cx23885-ioctl.h4
-rw-r--r--drivers/media/pci/cx23885/cx23885-ir.c5
-rw-r--r--drivers/media/pci/cx23885/cx23885-ir.h5
-rw-r--r--drivers/media/pci/cx23885/cx23885-reg.h4
-rw-r--r--drivers/media/pci/cx23885/cx23885-vbi.c284
-rw-r--r--drivers/media/pci/cx23885/cx23885-video.c1294
-rw-r--r--drivers/media/pci/cx23885/cx23885-video.h5
-rw-r--r--drivers/media/pci/cx23885/cx23885.h136
-rw-r--r--drivers/media/pci/cx23885/cx23888-ir.c5
-rw-r--r--drivers/media/pci/cx23885/cx23888-ir.h5
-rw-r--r--drivers/media/pci/cx23885/netup-eeprom.c4
-rw-r--r--drivers/media/pci/cx23885/netup-eeprom.h4
-rw-r--r--drivers/media/pci/cx23885/netup-init.c4
-rw-r--r--drivers/media/pci/cx23885/netup-init.h4
-rw-r--r--drivers/media/pci/cx25821/cx25821-video-upstream.c5
-rw-r--r--drivers/media/pci/cx88/cx88-cards.c632
-rw-r--r--drivers/media/pci/cx88/cx88-video.c3
-rw-r--r--drivers/media/pci/ddbridge/ddbridge-core.c30
-rw-r--r--drivers/media/pci/ddbridge/ddbridge.h12
-rw-r--r--drivers/media/pci/dm1105/dm1105.c2
-rw-r--r--drivers/media/pci/ivtv/ivtv-alsa-pcm.c2
-rw-r--r--drivers/media/pci/ivtv/ivtv-firmware.c4
-rw-r--r--drivers/media/pci/ivtv/ivtv-irq.c12
-rw-r--r--drivers/media/pci/mantis/hopper_vp3028.c2
-rw-r--r--drivers/media/pci/mantis/mantis_common.h2
-rw-r--r--drivers/media/pci/mantis/mantis_vp1033.c4
-rw-r--r--drivers/media/pci/mantis/mantis_vp1034.c2
-rw-r--r--drivers/media/pci/mantis/mantis_vp1041.c4
-rw-r--r--drivers/media/pci/mantis/mantis_vp2033.c4
-rw-r--r--drivers/media/pci/mantis/mantis_vp2040.c4
-rw-r--r--drivers/media/pci/mantis/mantis_vp3030.c4
-rw-r--r--drivers/media/pci/ngene/ngene-cards.c2
-rw-r--r--drivers/media/pci/ngene/ngene-core.c14
-rw-r--r--drivers/media/pci/ngene/ngene-dvb.c7
-rw-r--r--drivers/media/pci/ngene/ngene.h2
-rw-r--r--drivers/media/pci/pt3/Kconfig10
-rw-r--r--drivers/media/pci/pt3/Makefile8
-rw-r--r--drivers/media/pci/pt3/pt3.c876
-rw-r--r--drivers/media/pci/pt3/pt3.h186
-rw-r--r--drivers/media/pci/pt3/pt3_dma.c225
-rw-r--r--drivers/media/pci/pt3/pt3_i2c.c240
-rw-r--r--drivers/media/pci/saa7134/Kconfig8
-rw-r--r--drivers/media/pci/saa7134/Makefile2
-rw-r--r--drivers/media/pci/saa7134/saa7134-cards.c29
-rw-r--r--drivers/media/pci/saa7134/saa7134-core.c10
-rw-r--r--drivers/media/pci/saa7134/saa7134-go7007.c531
-rw-r--r--drivers/media/pci/saa7134/saa7134-vbi.c2
-rw-r--r--drivers/media/pci/saa7134/saa7134-video.c2
-rw-r--r--drivers/media/pci/saa7134/saa7134.h5
-rw-r--r--drivers/media/pci/saa7164/saa7164-api.c3
-rw-r--r--drivers/media/pci/saa7164/saa7164-core.c6
-rw-r--r--drivers/media/pci/solo6x10/Kconfig1
-rw-r--r--drivers/media/pci/solo6x10/solo6x10-disp.c4
-rw-r--r--drivers/media/pci/solo6x10/solo6x10-eeprom.c8
-rw-r--r--drivers/media/pci/solo6x10/solo6x10.h4
-rw-r--r--drivers/media/pci/sta2x11/Kconfig1
-rw-r--r--drivers/media/pci/sta2x11/sta2x11_vip.c2
-rw-r--r--drivers/media/pci/ttpci/Kconfig4
-rw-r--r--drivers/media/pci/ttpci/Makefile2
-rw-r--r--drivers/media/pci/ttpci/av7110.c8
-rw-r--r--drivers/media/pci/tw68/Kconfig10
-rw-r--r--drivers/media/pci/tw68/Makefile3
-rw-r--r--drivers/media/pci/tw68/tw68-core.c434
-rw-r--r--drivers/media/pci/tw68/tw68-reg.h195
-rw-r--r--drivers/media/pci/tw68/tw68-risc.c230
-rw-r--r--drivers/media/pci/tw68/tw68-video.c1051
-rw-r--r--drivers/media/pci/tw68/tw68.h231
-rw-r--r--drivers/media/pci/zoran/zoran_device.c2
-rw-r--r--drivers/media/platform/Kconfig54
-rw-r--r--drivers/media/platform/Makefile8
-rw-r--r--drivers/media/platform/blackfin/Kconfig1
-rw-r--r--drivers/media/platform/coda.c3933
-rw-r--r--drivers/media/platform/coda/Makefile3
-rw-r--r--drivers/media/platform/coda/coda-bit.c1861
-rw-r--r--drivers/media/platform/coda/coda-common.c2052
-rw-r--r--drivers/media/platform/coda/coda-h264.c37
-rw-r--r--drivers/media/platform/coda/coda.h287
-rw-r--r--drivers/media/platform/coda/coda_regs.h (renamed from drivers/media/platform/coda.h)0
-rw-r--r--drivers/media/platform/davinci/Kconfig18
-rw-r--r--drivers/media/platform/davinci/dm355_ccdc.c2
-rw-r--r--drivers/media/platform/davinci/dm644x_ccdc.c14
-rw-r--r--drivers/media/platform/davinci/vpfe_capture.c16
-rw-r--r--drivers/media/platform/davinci/vpif.c1
-rw-r--r--drivers/media/platform/davinci/vpif_capture.c13
-rw-r--r--drivers/media/platform/davinci/vpif_display.c22
-rw-r--r--drivers/media/platform/exynos-gsc/gsc-core.c6
-rw-r--r--drivers/media/platform/exynos-gsc/gsc-m2m.c3
-rw-r--r--drivers/media/platform/exynos-gsc/gsc-regs.c8
-rw-r--r--drivers/media/platform/exynos4-is/Kconfig5
-rw-r--r--drivers/media/platform/exynos4-is/fimc-is-errno.c4
-rw-r--r--drivers/media/platform/exynos4-is/fimc-is-errno.h4
-rw-r--r--drivers/media/platform/exynos4-is/fimc-is-param.c2
-rw-r--r--drivers/media/platform/exynos4-is/fimc-is.c10
-rw-r--r--drivers/media/platform/exynos4-is/fimc-isp-video.c9
-rw-r--r--drivers/media/platform/exynos4-is/media-dev.c4
-rw-r--r--drivers/media/platform/exynos4-is/mipi-csis.c3
-rw-r--r--drivers/media/platform/marvell-ccic/Kconfig2
-rw-r--r--drivers/media/platform/marvell-ccic/mcam-core.c2
-rw-r--r--drivers/media/platform/mx2_emmaprp.c2
-rw-r--r--drivers/media/platform/omap/Kconfig2
-rw-r--r--drivers/media/platform/omap/omap_vout.c16
-rw-r--r--drivers/media/platform/omap/omap_vout_vrfb.c10
-rw-r--r--drivers/media/platform/omap/omap_vout_vrfb.h18
-rw-r--r--drivers/media/platform/omap3isp/cfa_coef_table.h10
-rw-r--r--drivers/media/platform/omap3isp/gamma_table.h10
-rw-r--r--drivers/media/platform/omap3isp/isp.c20
-rw-r--r--drivers/media/platform/omap3isp/isp.h10
-rw-r--r--drivers/media/platform/omap3isp/ispccdc.c424
-rw-r--r--drivers/media/platform/omap3isp/ispccdc.h21
-rw-r--r--drivers/media/platform/omap3isp/ispccp2.c10
-rw-r--r--drivers/media/platform/omap3isp/ispccp2.h10
-rw-r--r--drivers/media/platform/omap3isp/ispcsi2.c10
-rw-r--r--drivers/media/platform/omap3isp/ispcsi2.h10
-rw-r--r--drivers/media/platform/omap3isp/ispcsiphy.c10
-rw-r--r--drivers/media/platform/omap3isp/ispcsiphy.h10
-rw-r--r--drivers/media/platform/omap3isp/isph3a.h10
-rw-r--r--drivers/media/platform/omap3isp/isph3a_aewb.c10
-rw-r--r--drivers/media/platform/omap3isp/isph3a_af.c10
-rw-r--r--drivers/media/platform/omap3isp/isphist.c10
-rw-r--r--drivers/media/platform/omap3isp/isphist.h10
-rw-r--r--drivers/media/platform/omap3isp/isppreview.c10
-rw-r--r--drivers/media/platform/omap3isp/isppreview.h10
-rw-r--r--drivers/media/platform/omap3isp/ispreg.h20
-rw-r--r--drivers/media/platform/omap3isp/ispresizer.c80
-rw-r--r--drivers/media/platform/omap3isp/ispresizer.h13
-rw-r--r--drivers/media/platform/omap3isp/ispstat.c10
-rw-r--r--drivers/media/platform/omap3isp/ispstat.h10
-rw-r--r--drivers/media/platform/omap3isp/ispvideo.c59
-rw-r--r--drivers/media/platform/omap3isp/ispvideo.h12
-rw-r--r--drivers/media/platform/omap3isp/luma_enhance_table.h10
-rw-r--r--drivers/media/platform/omap3isp/noise_filter_table.h10
-rw-r--r--drivers/media/platform/s3c-camif/camif-capture.c4
-rw-r--r--drivers/media/platform/s3c-camif/camif-regs.c4
-rw-r--r--drivers/media/platform/s5p-g2d/g2d.c7
-rw-r--r--drivers/media/platform/s5p-jpeg/jpeg-core.c2
-rw-r--r--drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c2
-rw-r--r--drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c11
-rw-r--r--drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c6
-rw-r--r--drivers/media/platform/s5p-mfc/s5p_mfc.c83
-rw-r--r--drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v5.c1
-rw-r--r--drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c1
-rw-r--r--drivers/media/platform/s5p-mfc/s5p_mfc_common.h6
-rw-r--r--drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c27
-rw-r--r--drivers/media/platform/s5p-mfc/s5p_mfc_debug.h6
-rw-r--r--drivers/media/platform/s5p-mfc/s5p_mfc_dec.c54
-rw-r--r--drivers/media/platform/s5p-mfc/s5p_mfc_enc.c67
-rw-r--r--drivers/media/platform/s5p-mfc/s5p_mfc_opr.c4
-rw-r--r--drivers/media/platform/s5p-mfc/s5p_mfc_opr.h488
-rw-r--r--drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c31
-rw-r--r--drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c491
-rw-r--r--drivers/media/platform/s5p-mfc/s5p_mfc_pm.c2
-rw-r--r--drivers/media/platform/s5p-tv/Kconfig4
-rw-r--r--drivers/media/platform/s5p-tv/hdmi_drv.c2
-rw-r--r--drivers/media/platform/s5p-tv/sdo_drv.c2
-rw-r--r--drivers/media/platform/s5p-tv/sii9234_drv.c2
-rw-r--r--drivers/media/platform/sh_veu.c4
-rw-r--r--drivers/media/platform/soc_camera/Kconfig16
-rw-r--r--drivers/media/platform/soc_camera/atmel-isi.c13
-rw-r--r--drivers/media/platform/soc_camera/mx2_camera.c5
-rw-r--r--drivers/media/platform/soc_camera/pxa_camera.c2
-rw-r--r--drivers/media/platform/soc_camera/rcar_vin.c4
-rw-r--r--drivers/media/platform/soc_camera/soc_camera.c21
-rw-r--r--drivers/media/platform/ti-vpe/vpdma.c4
-rw-r--r--drivers/media/platform/ti-vpe/vpe.c20
-rw-r--r--drivers/media/platform/via-camera.c13
-rw-r--r--drivers/media/platform/vivi.c1542
-rw-r--r--drivers/media/platform/vivid/Kconfig19
-rw-r--r--drivers/media/platform/vivid/Makefile6
-rw-r--r--drivers/media/platform/vivid/vivid-core.c1390
-rw-r--r--drivers/media/platform/vivid/vivid-core.h520
-rw-r--r--drivers/media/platform/vivid/vivid-ctrls.c1502
-rw-r--r--drivers/media/platform/vivid/vivid-ctrls.h34
-rw-r--r--drivers/media/platform/vivid/vivid-kthread-cap.c886
-rw-r--r--drivers/media/platform/vivid/vivid-kthread-cap.h26
-rw-r--r--drivers/media/platform/vivid/vivid-kthread-out.c305
-rw-r--r--drivers/media/platform/vivid/vivid-kthread-out.h26
-rw-r--r--drivers/media/platform/vivid/vivid-osd.c400
-rw-r--r--drivers/media/platform/vivid/vivid-osd.h27
-rw-r--r--drivers/media/platform/vivid/vivid-radio-common.c189
-rw-r--r--drivers/media/platform/vivid/vivid-radio-common.h40
-rw-r--r--drivers/media/platform/vivid/vivid-radio-rx.c287
-rw-r--r--drivers/media/platform/vivid/vivid-radio-rx.h31
-rw-r--r--drivers/media/platform/vivid/vivid-radio-tx.c141
-rw-r--r--drivers/media/platform/vivid/vivid-radio-tx.h29
-rw-r--r--drivers/media/platform/vivid/vivid-rds-gen.c166
-rw-r--r--drivers/media/platform/vivid/vivid-rds-gen.h53
-rw-r--r--drivers/media/platform/vivid/vivid-sdr-cap.c499
-rw-r--r--drivers/media/platform/vivid/vivid-sdr-cap.h34
-rw-r--r--drivers/media/platform/vivid/vivid-tpg-colors.c310
-rw-r--r--drivers/media/platform/vivid/vivid-tpg-colors.h64
-rw-r--r--drivers/media/platform/vivid/vivid-tpg.c1439
-rw-r--r--drivers/media/platform/vivid/vivid-tpg.h439
-rw-r--r--drivers/media/platform/vivid/vivid-vbi-cap.c371
-rw-r--r--drivers/media/platform/vivid/vivid-vbi-cap.h40
-rw-r--r--drivers/media/platform/vivid/vivid-vbi-gen.c323
-rw-r--r--drivers/media/platform/vivid/vivid-vbi-gen.h33
-rw-r--r--drivers/media/platform/vivid/vivid-vbi-out.c248
-rw-r--r--drivers/media/platform/vivid/vivid-vbi-out.h34
-rw-r--r--drivers/media/platform/vivid/vivid-vid-cap.c1730
-rw-r--r--drivers/media/platform/vivid/vivid-vid-cap.h71
-rw-r--r--drivers/media/platform/vivid/vivid-vid-common.c571
-rw-r--r--drivers/media/platform/vivid/vivid-vid-common.h61
-rw-r--r--drivers/media/platform/vivid/vivid-vid-out.c1146
-rw-r--r--drivers/media/platform/vivid/vivid-vid-out.h56
-rw-r--r--drivers/media/radio/radio-gemtek.c2
-rw-r--r--drivers/media/radio/radio-sf16fmi.c6
-rw-r--r--drivers/media/radio/radio-sf16fmr2.c4
-rw-r--r--drivers/media/radio/radio-tea5764.c12
-rw-r--r--drivers/media/radio/si470x/radio-si470x-common.c4
-rw-r--r--drivers/media/radio/si470x/radio-si470x-usb.c4
-rw-r--r--drivers/media/radio/wl128x/fmdrv_common.c11
-rw-r--r--drivers/media/radio/wl128x/fmdrv_rx.c10
-rw-r--r--drivers/media/radio/wl128x/fmdrv_tx.c2
-rw-r--r--drivers/media/rc/Kconfig15
-rw-r--r--drivers/media/rc/Makefile1
-rw-r--r--drivers/media/rc/ene_ir.c2
-rw-r--r--drivers/media/rc/fintek-cir.c6
-rw-r--r--drivers/media/rc/img-ir/img-ir-hw.c6
-rw-r--r--drivers/media/rc/img-ir/img-ir-hw.h6
-rw-r--r--drivers/media/rc/imon.c304
-rw-r--r--drivers/media/rc/ir-hix5hd2.c351
-rw-r--r--drivers/media/rc/ite-cir.c3
-rw-r--r--drivers/media/rc/keymaps/Makefile1
-rw-r--r--drivers/media/rc/keymaps/rc-dvbsky.c78
-rw-r--r--drivers/media/rc/lirc_dev.c14
-rw-r--r--drivers/media/rc/mceusb.c15
-rw-r--r--drivers/media/rc/nuvoton-cir.c6
-rw-r--r--drivers/media/rc/st_rc.c16
-rw-r--r--drivers/media/rc/streamzap.c6
-rw-r--r--drivers/media/tuners/Kconfig17
-rw-r--r--drivers/media/tuners/Makefile4
-rw-r--r--drivers/media/tuners/e4000.c75
-rw-r--r--drivers/media/tuners/it913x.c478
-rw-r--r--drivers/media/tuners/it913x.h (renamed from drivers/media/tuners/tuner_it913x.h)41
-rw-r--r--drivers/media/tuners/m88ts2022.c355
-rw-r--r--drivers/media/tuners/m88ts2022_priv.h5
-rw-r--r--drivers/media/tuners/msi001.c56
-rw-r--r--drivers/media/tuners/mt2060.c3
-rw-r--r--drivers/media/tuners/mt2063.c26
-rw-r--r--drivers/media/tuners/mxl301rf.c349
-rw-r--r--drivers/media/tuners/mxl301rf.h26
-rw-r--r--drivers/media/tuners/mxl5005s.c3
-rw-r--r--drivers/media/tuners/qm1d1c0042.c448
-rw-r--r--drivers/media/tuners/qm1d1c0042.h37
-rw-r--r--drivers/media/tuners/si2157.c86
-rw-r--r--drivers/media/tuners/si2157.h2
-rw-r--r--drivers/media/tuners/si2157_priv.h3
-rw-r--r--drivers/media/tuners/tda18212.c272
-rw-r--r--drivers/media/tuners/tda18212.h19
-rw-r--r--drivers/media/tuners/tda18271-common.c19
-rw-r--r--drivers/media/tuners/tda18271-priv.h4
-rw-r--r--drivers/media/tuners/tuner-xc2028.c62
-rw-r--r--drivers/media/tuners/tuner_it913x.c453
-rw-r--r--drivers/media/tuners/tuner_it913x_priv.h78
-rw-r--r--drivers/media/tuners/xc4000.c62
-rw-r--r--drivers/media/tuners/xc5000.c242
-rw-r--r--drivers/media/usb/Kconfig4
-rw-r--r--drivers/media/usb/Makefile4
-rw-r--r--drivers/media/usb/airspy/airspy.c222
-rw-r--r--drivers/media/usb/as102/Kconfig (renamed from drivers/staging/media/as102/Kconfig)0
-rw-r--r--drivers/media/usb/as102/Makefile (renamed from drivers/staging/media/as102/Makefile)3
-rw-r--r--drivers/media/usb/as102/as102_drv.c (renamed from drivers/staging/media/as102/as102_drv.c)152
-rw-r--r--drivers/media/usb/as102/as102_drv.h (renamed from drivers/staging/media/as102/as102_drv.h)26
-rw-r--r--drivers/media/usb/as102/as102_fw.c (renamed from drivers/staging/media/as102/as102_fw.c)4
-rw-r--r--drivers/media/usb/as102/as102_fw.h (renamed from drivers/staging/media/as102/as102_fw.h)4
-rw-r--r--drivers/media/usb/as102/as102_usb_drv.c (renamed from drivers/staging/media/as102/as102_usb_drv.c)53
-rw-r--r--drivers/media/usb/as102/as102_usb_drv.h (renamed from drivers/staging/media/as102/as102_usb_drv.h)4
-rw-r--r--drivers/media/usb/as102/as10x_cmd.c (renamed from drivers/staging/media/as102/as10x_cmd.c)23
-rw-r--r--drivers/media/usb/as102/as10x_cmd.h (renamed from drivers/staging/media/as102/as10x_cmd.h)108
-rw-r--r--drivers/media/usb/as102/as10x_cmd_cfg.c (renamed from drivers/staging/media/as102/as10x_cmd_cfg.c)9
-rw-r--r--drivers/media/usb/as102/as10x_cmd_stream.c (renamed from drivers/staging/media/as102/as10x_cmd_stream.c)4
-rw-r--r--drivers/media/usb/as102/as10x_handle.h (renamed from drivers/staging/media/as102/as10x_handle.h)7
-rw-r--r--drivers/media/usb/au0828/au0828-cards.c36
-rw-r--r--drivers/media/usb/au0828/au0828-core.c84
-rw-r--r--drivers/media/usb/au0828/au0828-dvb.c110
-rw-r--r--drivers/media/usb/au0828/au0828-i2c.c15
-rw-r--r--drivers/media/usb/au0828/au0828-input.c36
-rw-r--r--drivers/media/usb/au0828/au0828-vbi.c4
-rw-r--r--drivers/media/usb/au0828/au0828-video.c90
-rw-r--r--drivers/media/usb/au0828/au0828.h34
-rw-r--r--drivers/media/usb/cx231xx/cx231xx-avcore.c14
-rw-r--r--drivers/media/usb/cx231xx/cx231xx-cards.c10
-rw-r--r--drivers/media/usb/cx231xx/cx231xx-core.c2
-rw-r--r--drivers/media/usb/cx231xx/cx231xx-dvb.c8
-rw-r--r--drivers/media/usb/dvb-usb-v2/Kconfig7
-rw-r--r--drivers/media/usb/dvb-usb-v2/Makefile3
-rw-r--r--drivers/media/usb/dvb-usb-v2/af9015.c2
-rw-r--r--drivers/media/usb/dvb-usb-v2/af9035.c644
-rw-r--r--drivers/media/usb/dvb-usb-v2/af9035.h12
-rw-r--r--drivers/media/usb/dvb-usb-v2/anysee.c185
-rw-r--r--drivers/media/usb/dvb-usb-v2/anysee.h3
-rw-r--r--drivers/media/usb/dvb-usb-v2/dvb_usb.h3
-rw-r--r--drivers/media/usb/dvb-usb-v2/dvb_usb_core.c28
-rw-r--r--drivers/media/usb/dvb-usb-v2/dvb_usb_urb.c2
-rw-r--r--drivers/media/usb/dvb-usb-v2/dvbsky.c460
-rw-r--r--drivers/media/usb/dvb-usb-v2/lmedm04.c2
-rw-r--r--drivers/media/usb/dvb-usb-v2/mxl111sf.c8
-rw-r--r--drivers/media/usb/dvb-usb/Kconfig2
-rw-r--r--drivers/media/usb/dvb-usb/af9005.c2
-rw-r--r--drivers/media/usb/dvb-usb/cxusb.c130
-rw-r--r--drivers/media/usb/dvb-usb/cxusb.h4
-rw-r--r--drivers/media/usb/dvb-usb/dib0700_devices.c383
-rw-r--r--drivers/media/usb/dvb-usb/dibusb-common.c12
-rw-r--r--drivers/media/usb/dvb-usb/dw2102.c14
-rw-r--r--drivers/media/usb/dvb-usb/opera1.c4
-rw-r--r--drivers/media/usb/dvb-usb/pctv452e.c8
-rw-r--r--drivers/media/usb/em28xx/em28xx-audio.c10
-rw-r--r--drivers/media/usb/em28xx/em28xx-cards.c43
-rw-r--r--drivers/media/usb/em28xx/em28xx-core.c47
-rw-r--r--drivers/media/usb/em28xx/em28xx-dvb.c37
-rw-r--r--drivers/media/usb/em28xx/em28xx-input.c29
-rw-r--r--drivers/media/usb/em28xx/em28xx-vbi.c11
-rw-r--r--drivers/media/usb/em28xx/em28xx-video.c29
-rw-r--r--drivers/media/usb/em28xx/em28xx.h19
-rw-r--r--drivers/media/usb/go7007/go7007-usb.c4
-rw-r--r--drivers/media/usb/gspca/gspca.c5
-rw-r--r--drivers/media/usb/gspca/gspca.h2
-rw-r--r--drivers/media/usb/gspca/kinect.c12
-rw-r--r--drivers/media/usb/gspca/sn9c20x.c12
-rw-r--r--drivers/media/usb/hackrf/Kconfig10
-rw-r--r--drivers/media/usb/hackrf/Makefile1
-rw-r--r--drivers/media/usb/hackrf/hackrf.c1142
-rw-r--r--drivers/media/usb/hdpvr/hdpvr-control.c21
-rw-r--r--drivers/media/usb/hdpvr/hdpvr-core.c27
-rw-r--r--drivers/media/usb/msi2500/msi2500.c174
-rw-r--r--drivers/media/usb/pwc/pwc-v4l.c2
-rw-r--r--drivers/media/usb/s2255/s2255drv.c2
-rw-r--r--drivers/media/usb/siano/smsusb.c6
-rw-r--r--drivers/media/usb/ttusb-dec/ttusbdecfe.c3
-rw-r--r--drivers/media/usb/usbtv/Kconfig3
-rw-r--r--drivers/media/usb/usbtv/Makefile3
-rw-r--r--drivers/media/usb/usbtv/usbtv-audio.c385
-rw-r--r--drivers/media/usb/usbtv/usbtv-core.c17
-rw-r--r--drivers/media/usb/usbtv/usbtv-video.c18
-rw-r--r--drivers/media/usb/usbtv/usbtv.h21
-rw-r--r--drivers/media/usb/uvc/uvc_ctrl.c60
-rw-r--r--drivers/media/usb/uvc/uvc_driver.c20
-rw-r--r--drivers/media/usb/uvc/uvc_v4l2.c1
-rw-r--r--drivers/media/usb/uvc/uvc_video.c10
-rw-r--r--drivers/media/usb/uvc/uvcvideo.h5
-rw-r--r--drivers/media/v4l2-core/tuner-core.c10
-rw-r--r--drivers/media/v4l2-core/v4l2-common.c9
-rw-r--r--drivers/media/v4l2-core/v4l2-compat-ioctl32.c30
-rw-r--r--drivers/media/v4l2-core/v4l2-ctrls.c6
-rw-r--r--drivers/media/v4l2-core/v4l2-dv-timings.c3
-rw-r--r--drivers/media/v4l2-core/v4l2-ioctl.c6
-rw-r--r--drivers/media/v4l2-core/v4l2-subdev.c9
-rw-r--r--drivers/media/v4l2-core/videobuf-core.c11
-rw-r--r--drivers/media/v4l2-core/videobuf-dma-sg.c6
-rw-r--r--drivers/media/v4l2-core/videobuf2-core.c66
-rw-r--r--drivers/staging/media/Kconfig2
-rw-r--r--drivers/staging/media/Makefile1
-rw-r--r--drivers/staging/media/as102/as102_fe.c571
-rw-r--r--drivers/staging/media/davinci_vpfe/Kconfig1
-rw-r--r--drivers/staging/media/dt3155v4l/Kconfig1
-rw-r--r--drivers/staging/media/lirc/lirc_imon.c1
-rw-r--r--drivers/staging/media/lirc/lirc_sasem.c1
-rw-r--r--drivers/staging/media/omap4iss/Kconfig1
-rw-r--r--include/media/davinci/dm644x_ccdc.h2
-rw-r--r--include/media/omap3isp.h3
-rw-r--r--include/media/rc-map.h1
-rw-r--r--include/media/videobuf2-core.h15
-rw-r--r--include/uapi/linux/Kbuild1
-rw-r--r--include/uapi/linux/smiapp.h29
-rw-r--r--include/uapi/linux/v4l2-controls.h6
-rw-r--r--include/uapi/linux/v4l2-dv-timings.h9
-rw-r--r--include/uapi/linux/videodev2.h13
474 files changed, 36213 insertions, 13050 deletions
diff --git a/Documentation/DocBook/media/v4l/compat.xml b/Documentation/DocBook/media/v4l/compat.xml
index 3a626d1b8f2e..07ffc76553ba 100644
--- a/Documentation/DocBook/media/v4l/compat.xml
+++ b/Documentation/DocBook/media/v4l/compat.xml
@@ -2566,6 +2566,12 @@ fields changed from _s32 to _u32.
2566 <para>Added compound control types and &VIDIOC-QUERY-EXT-CTRL;. 2566 <para>Added compound control types and &VIDIOC-QUERY-EXT-CTRL;.
2567 </para> 2567 </para>
2568 </listitem> 2568 </listitem>
2569 <title>V4L2 in Linux 3.18</title>
2570 <orderedlist>
2571 <listitem>
2572 <para>Added <constant>V4L2_CID_PAN_SPEED</constant> and
2573 <constant>V4L2_CID_TILT_SPEED</constant> camera controls.</para>
2574 </listitem>
2569 </orderedlist> 2575 </orderedlist>
2570 </section> 2576 </section>
2571 2577
diff --git a/Documentation/DocBook/media/v4l/controls.xml b/Documentation/DocBook/media/v4l/controls.xml
index 9f5ffd85560b..e013e4bf244c 100644
--- a/Documentation/DocBook/media/v4l/controls.xml
+++ b/Documentation/DocBook/media/v4l/controls.xml
@@ -3965,6 +3965,27 @@ by exposure, white balance or focus controls.</entry>
3965 </row> 3965 </row>
3966 <row><entry></entry></row> 3966 <row><entry></entry></row>
3967 3967
3968 <row>
3969 <entry spanname="id"><constant>V4L2_CID_PAN_SPEED</constant>&nbsp;</entry>
3970 <entry>integer</entry>
3971 </row><row><entry spanname="descr">This control turns the
3972camera horizontally at the specific speed. The unit is undefined. A
3973positive value moves the camera to the right (clockwise when viewed
3974from above), a negative value to the left. A value of zero stops the motion
3975if one is in progress and has no effect otherwise.</entry>
3976 </row>
3977 <row><entry></entry></row>
3978
3979 <row>
3980 <entry spanname="id"><constant>V4L2_CID_TILT_SPEED</constant>&nbsp;</entry>
3981 <entry>integer</entry>
3982 </row><row><entry spanname="descr">This control turns the
3983camera vertically at the specified speed. The unit is undefined. A
3984positive value moves the camera up, a negative value down. A value of zero
3985stops the motion if one is in progress and has no effect otherwise.</entry>
3986 </row>
3987 <row><entry></entry></row>
3988
3968 </tbody> 3989 </tbody>
3969 </tgroup> 3990 </tgroup>
3970 </table> 3991 </table>
@@ -4790,6 +4811,40 @@ interface and may change in the future.</para>
4790 conversion. 4811 conversion.
4791 </entry> 4812 </entry>
4792 </row> 4813 </row>
4814 <row>
4815 <entry spanname="id"><constant>V4L2_CID_TEST_PATTERN_RED</constant></entry>
4816 <entry>integer</entry>
4817 </row>
4818 <row>
4819 <entry spanname="descr">Test pattern red colour component.
4820 </entry>
4821 </row>
4822 <row>
4823 <entry spanname="id"><constant>V4L2_CID_TEST_PATTERN_GREENR</constant></entry>
4824 <entry>integer</entry>
4825 </row>
4826 <row>
4827 <entry spanname="descr">Test pattern green (next to red)
4828 colour component.
4829 </entry>
4830 </row>
4831 <row>
4832 <entry spanname="id"><constant>V4L2_CID_TEST_PATTERN_BLUE</constant></entry>
4833 <entry>integer</entry>
4834 </row>
4835 <row>
4836 <entry spanname="descr">Test pattern blue colour component.
4837 </entry>
4838 </row>
4839 <row>
4840 <entry spanname="id"><constant>V4L2_CID_TEST_PATTERN_GREENB</constant></entry>
4841 <entry>integer</entry>
4842 </row>
4843 <row>
4844 <entry spanname="descr">Test pattern green (next to blue)
4845 colour component.
4846 </entry>
4847 </row>
4793 <row><entry></entry></row> 4848 <row><entry></entry></row>
4794 </tbody> 4849 </tbody>
4795 </tgroup> 4850 </tgroup>
diff --git a/Documentation/DocBook/media/v4l/pixfmt-packed-rgb.xml b/Documentation/DocBook/media/v4l/pixfmt-packed-rgb.xml
index 2aae8e9452a4..6ab4f0f3db64 100644
--- a/Documentation/DocBook/media/v4l/pixfmt-packed-rgb.xml
+++ b/Documentation/DocBook/media/v4l/pixfmt-packed-rgb.xml
@@ -237,9 +237,9 @@ for a pixel lie next to each other in memory.</para>
237 <entry>g<subscript>4</subscript></entry> 237 <entry>g<subscript>4</subscript></entry>
238 <entry>g<subscript>3</subscript></entry> 238 <entry>g<subscript>3</subscript></entry>
239 </row> 239 </row>
240 <row id="V4L2-PIX-FMT-RGB555X"> 240 <row id="V4L2-PIX-FMT-ARGB555X">
241 <entry><constant>V4L2_PIX_FMT_RGB555X</constant></entry> 241 <entry><constant>V4L2_PIX_FMT_ARGB555X</constant></entry>
242 <entry>'RGBQ'</entry> 242 <entry>'AR15' | (1 &lt;&lt; 31)</entry>
243 <entry></entry> 243 <entry></entry>
244 <entry>a</entry> 244 <entry>a</entry>
245 <entry>r<subscript>4</subscript></entry> 245 <entry>r<subscript>4</subscript></entry>
@@ -259,6 +259,28 @@ for a pixel lie next to each other in memory.</para>
259 <entry>b<subscript>1</subscript></entry> 259 <entry>b<subscript>1</subscript></entry>
260 <entry>b<subscript>0</subscript></entry> 260 <entry>b<subscript>0</subscript></entry>
261 </row> 261 </row>
262 <row id="V4L2-PIX-FMT-XRGB555X">
263 <entry><constant>V4L2_PIX_FMT_XRGB555X</constant></entry>
264 <entry>'XR15' | (1 &lt;&lt; 31)</entry>
265 <entry></entry>
266 <entry>-</entry>
267 <entry>r<subscript>4</subscript></entry>
268 <entry>r<subscript>3</subscript></entry>
269 <entry>r<subscript>2</subscript></entry>
270 <entry>r<subscript>1</subscript></entry>
271 <entry>r<subscript>0</subscript></entry>
272 <entry>g<subscript>4</subscript></entry>
273 <entry>g<subscript>3</subscript></entry>
274 <entry></entry>
275 <entry>g<subscript>2</subscript></entry>
276 <entry>g<subscript>1</subscript></entry>
277 <entry>g<subscript>0</subscript></entry>
278 <entry>b<subscript>4</subscript></entry>
279 <entry>b<subscript>3</subscript></entry>
280 <entry>b<subscript>2</subscript></entry>
281 <entry>b<subscript>1</subscript></entry>
282 <entry>b<subscript>0</subscript></entry>
283 </row>
262 <row id="V4L2-PIX-FMT-RGB565X"> 284 <row id="V4L2-PIX-FMT-RGB565X">
263 <entry><constant>V4L2_PIX_FMT_RGB565X</constant></entry> 285 <entry><constant>V4L2_PIX_FMT_RGB565X</constant></entry>
264 <entry>'RGBR'</entry> 286 <entry>'RGBR'</entry>
@@ -464,7 +486,7 @@ for a pixel lie next to each other in memory.</para>
464 </row> 486 </row>
465 <row id="V4L2-PIX-FMT-ARGB32"> 487 <row id="V4L2-PIX-FMT-ARGB32">
466 <entry><constant>V4L2_PIX_FMT_ARGB32</constant></entry> 488 <entry><constant>V4L2_PIX_FMT_ARGB32</constant></entry>
467 <entry>'AX24'</entry> 489 <entry>'BA24'</entry>
468 <entry></entry> 490 <entry></entry>
469 <entry>a<subscript>7</subscript></entry> 491 <entry>a<subscript>7</subscript></entry>
470 <entry>a<subscript>6</subscript></entry> 492 <entry>a<subscript>6</subscript></entry>
@@ -800,6 +822,28 @@ image</title>
800 <entry>g<subscript>4</subscript></entry> 822 <entry>g<subscript>4</subscript></entry>
801 <entry>g<subscript>3</subscript></entry> 823 <entry>g<subscript>3</subscript></entry>
802 </row> 824 </row>
825 <row id="V4L2-PIX-FMT-RGB555X">
826 <entry><constant>V4L2_PIX_FMT_RGB555X</constant></entry>
827 <entry>'RGBQ'</entry>
828 <entry></entry>
829 <entry>a</entry>
830 <entry>r<subscript>4</subscript></entry>
831 <entry>r<subscript>3</subscript></entry>
832 <entry>r<subscript>2</subscript></entry>
833 <entry>r<subscript>1</subscript></entry>
834 <entry>r<subscript>0</subscript></entry>
835 <entry>g<subscript>4</subscript></entry>
836 <entry>g<subscript>3</subscript></entry>
837 <entry></entry>
838 <entry>g<subscript>2</subscript></entry>
839 <entry>g<subscript>1</subscript></entry>
840 <entry>g<subscript>0</subscript></entry>
841 <entry>b<subscript>4</subscript></entry>
842 <entry>b<subscript>3</subscript></entry>
843 <entry>b<subscript>2</subscript></entry>
844 <entry>b<subscript>1</subscript></entry>
845 <entry>b<subscript>0</subscript></entry>
846 </row>
803 <row id="V4L2-PIX-FMT-BGR32"> 847 <row id="V4L2-PIX-FMT-BGR32">
804 <entry><constant>V4L2_PIX_FMT_BGR32</constant></entry> 848 <entry><constant>V4L2_PIX_FMT_BGR32</constant></entry>
805 <entry>'BGR4'</entry> 849 <entry>'BGR4'</entry>
diff --git a/Documentation/DocBook/media/v4l/vidioc-dqevent.xml b/Documentation/DocBook/media/v4l/vidioc-dqevent.xml
index cb7732582f03..b036f8963353 100644
--- a/Documentation/DocBook/media/v4l/vidioc-dqevent.xml
+++ b/Documentation/DocBook/media/v4l/vidioc-dqevent.xml
@@ -76,21 +76,22 @@
76 <entry></entry> 76 <entry></entry>
77 <entry>&v4l2-event-vsync;</entry> 77 <entry>&v4l2-event-vsync;</entry>
78 <entry><structfield>vsync</structfield></entry> 78 <entry><structfield>vsync</structfield></entry>
79 <entry>Event data for event V4L2_EVENT_VSYNC. 79 <entry>Event data for event <constant>V4L2_EVENT_VSYNC</constant>.
80 </entry> 80 </entry>
81 </row> 81 </row>
82 <row> 82 <row>
83 <entry></entry> 83 <entry></entry>
84 <entry>&v4l2-event-ctrl;</entry> 84 <entry>&v4l2-event-ctrl;</entry>
85 <entry><structfield>ctrl</structfield></entry> 85 <entry><structfield>ctrl</structfield></entry>
86 <entry>Event data for event V4L2_EVENT_CTRL. 86 <entry>Event data for event <constant>V4L2_EVENT_CTRL</constant>.
87 </entry> 87 </entry>
88 </row> 88 </row>
89 <row> 89 <row>
90 <entry></entry> 90 <entry></entry>
91 <entry>&v4l2-event-frame-sync;</entry> 91 <entry>&v4l2-event-frame-sync;</entry>
92 <entry><structfield>frame_sync</structfield></entry> 92 <entry><structfield>frame_sync</structfield></entry>
93 <entry>Event data for event V4L2_EVENT_FRAME_SYNC.</entry> 93 <entry>Event data for event
94 <constant>V4L2_EVENT_FRAME_SYNC</constant>.</entry>
94 </row> 95 </row>
95 <row> 96 <row>
96 <entry></entry> 97 <entry></entry>
diff --git a/Documentation/DocBook/media/v4l/vidioc-g-edid.xml b/Documentation/DocBook/media/v4l/vidioc-g-edid.xml
index ce4563b87131..6df40db4c8ba 100644
--- a/Documentation/DocBook/media/v4l/vidioc-g-edid.xml
+++ b/Documentation/DocBook/media/v4l/vidioc-g-edid.xml
@@ -24,7 +24,7 @@
24 <funcdef>int <function>ioctl</function></funcdef> 24 <funcdef>int <function>ioctl</function></funcdef>
25 <paramdef>int <parameter>fd</parameter></paramdef> 25 <paramdef>int <parameter>fd</parameter></paramdef>
26 <paramdef>int <parameter>request</parameter></paramdef> 26 <paramdef>int <parameter>request</parameter></paramdef>
27 <paramdef>const struct v4l2_edid *<parameter>argp</parameter></paramdef> 27 <paramdef>struct v4l2_edid *<parameter>argp</parameter></paramdef>
28 </funcprototype> 28 </funcprototype>
29 </funcsynopsis> 29 </funcsynopsis>
30 </refsynopsisdiv> 30 </refsynopsisdiv>
@@ -125,17 +125,17 @@
125 <structfield>blocks</structfield> is 0, then the EDID is disabled or erased.</entry> 125 <structfield>blocks</structfield> is 0, then the EDID is disabled or erased.</entry>
126 </row> 126 </row>
127 <row> 127 <row>
128 <entry>__u8&nbsp;*</entry>
129 <entry><structfield>edid</structfield></entry>
130 <entry>Pointer to memory that contains the EDID. The minimum size is
131 <structfield>blocks</structfield>&nbsp;*&nbsp;128.</entry>
132 </row>
133 <row>
134 <entry>__u32</entry> 128 <entry>__u32</entry>
135 <entry><structfield>reserved</structfield>[5]</entry> 129 <entry><structfield>reserved</structfield>[5]</entry>
136 <entry>Reserved for future extensions. Applications and drivers must 130 <entry>Reserved for future extensions. Applications and drivers must
137 set the array to zero.</entry> 131 set the array to zero.</entry>
138 </row> 132 </row>
133 <row>
134 <entry>__u8&nbsp;*</entry>
135 <entry><structfield>edid</structfield></entry>
136 <entry>Pointer to memory that contains the EDID. The minimum size is
137 <structfield>blocks</structfield>&nbsp;*&nbsp;128.</entry>
138 </row>
139 </tbody> 139 </tbody>
140 </tgroup> 140 </tgroup>
141 </table> 141 </table>
diff --git a/Documentation/DocBook/media/v4l/vidioc-subscribe-event.xml b/Documentation/DocBook/media/v4l/vidioc-subscribe-event.xml
index 9f6095608837..d7c9365ecdbe 100644
--- a/Documentation/DocBook/media/v4l/vidioc-subscribe-event.xml
+++ b/Documentation/DocBook/media/v4l/vidioc-subscribe-event.xml
@@ -176,7 +176,7 @@
176 </row> 176 </row>
177 <row> 177 <row>
178 <entry><constant>V4L2_EVENT_MOTION_DET</constant></entry> 178 <entry><constant>V4L2_EVENT_MOTION_DET</constant></entry>
179 <entry>5</entry> 179 <entry>6</entry>
180 <entry> 180 <entry>
181 <para>Triggered whenever the motion detection state for one or more of the regions 181 <para>Triggered whenever the motion detection state for one or more of the regions
182 changes. This event has a &v4l2-event-motion-det; associated with it.</para> 182 changes. This event has a &v4l2-event-motion-det; associated with it.</para>
diff --git a/Documentation/devicetree/bindings/media/hix5hd2-ir.txt b/Documentation/devicetree/bindings/media/hix5hd2-ir.txt
new file mode 100644
index 000000000000..fb5e7606643a
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/hix5hd2-ir.txt
@@ -0,0 +1,25 @@
1Device-Tree bindings for hix5hd2 ir IP
2
3Required properties:
4 - compatible: Should contain "hisilicon,hix5hd2-ir".
5 - reg: Base physical address of the controller and length of memory
6 mapped region.
7 - interrupts: interrupt-specifier for the sole interrupt generated by
8 the device. The interrupt specifier format depends on the interrupt
9 controller parent.
10 - clocks: clock phandle and specifier pair.
11 - hisilicon,power-syscon: phandle of syscon used to control power.
12
13Optional properties:
14 - linux,rc-map-name : Remote control map name.
15
16Example node:
17
18 ir: ir@f8001000 {
19 compatible = "hisilicon,hix5hd2-ir";
20 reg = <0xf8001000 0x1000>;
21 interrupts = <0 47 4>;
22 clocks = <&clock HIX5HD2_FIXED_24M>;
23 hisilicon,power-syscon = <&sysctrl>;
24 linux,rc-map-name = "rc-tivo";
25 };
diff --git a/Documentation/dvb/get_dvb_firmware b/Documentation/dvb/get_dvb_firmware
index 26c623dd3aa3..91b43d2738c7 100755
--- a/Documentation/dvb/get_dvb_firmware
+++ b/Documentation/dvb/get_dvb_firmware
@@ -708,23 +708,25 @@ sub drxk_terratec_htc_stick {
708} 708}
709 709
710sub it9135 { 710sub it9135 {
711 my $sourcefile = "dvb-usb-it9135.zip"; 711 my $url = "http://www.ite.com.tw/uploads/firmware/v3.25.0.0/";
712 my $url = "http://www.ite.com.tw/uploads/firmware/v3.6.0.0/$sourcefile"; 712 my $file1 = "dvb-usb-it9135-01.zip";
713 my $hash = "1e55f6c8833f1d0ae067c2bb2953e6a9";
714 my $tmpdir = tempdir(DIR => "/tmp", CLEANUP => 0);
715 my $outfile = "dvb-usb-it9135.fw";
716 my $fwfile1 = "dvb-usb-it9135-01.fw"; 713 my $fwfile1 = "dvb-usb-it9135-01.fw";
714 my $hash1 = "02fcf11174eda84745dae7e61c5ff9ba";
715 my $file2 = "dvb-usb-it9135-02.zip";
717 my $fwfile2 = "dvb-usb-it9135-02.fw"; 716 my $fwfile2 = "dvb-usb-it9135-02.fw";
717 my $hash2 = "d5e1437dc24358578e07999475d4cac9";
718 718
719 checkstandard(); 719 checkstandard();
720 720
721 wgetfile($sourcefile, $url); 721 wgetfile($file1, $url . $file1);
722 unzip($sourcefile, $tmpdir); 722 unzip($file1, "");
723 verify("$tmpdir/$outfile", $hash); 723 verify("$fwfile1", $hash1);
724 extract("$tmpdir/$outfile", 64, 8128, "$fwfile1"); 724
725 extract("$tmpdir/$outfile", 12866, 5817, "$fwfile2"); 725 wgetfile($file2, $url . $file2);
726 unzip($file2, "");
727 verify("$fwfile2", $hash2);
726 728
727 "$fwfile1 $fwfile2" 729 "$file1 $file2"
728} 730}
729 731
730sub tda10071 { 732sub tda10071 {
diff --git a/Documentation/video4linux/vivid.txt b/Documentation/video4linux/vivid.txt
new file mode 100644
index 000000000000..eeb11a28e4fc
--- /dev/null
+++ b/Documentation/video4linux/vivid.txt
@@ -0,0 +1,1111 @@
1vivid: Virtual Video Test Driver
2================================
3
4This driver emulates video4linux hardware of various types: video capture, video
5output, vbi capture and output, radio receivers and transmitters and a software
6defined radio receiver. In addition a simple framebuffer device is available for
7testing capture and output overlays.
8
9Up to 64 vivid instances can be created, each with up to 16 inputs and 16 outputs.
10
11Each input can be a webcam, TV capture device, S-Video capture device or an HDMI
12capture device. Each output can be an S-Video output device or an HDMI output
13device.
14
15These inputs and outputs act exactly as a real hardware device would behave. This
16allows you to use this driver as a test input for application development, since
17you can test the various features without requiring special hardware.
18
19This document describes the features implemented by this driver:
20
21- Support for read()/write(), MMAP, USERPTR and DMABUF streaming I/O.
22- A large list of test patterns and variations thereof
23- Working brightness, contrast, saturation and hue controls
24- Support for the alpha color component
25- Full colorspace support, including limited/full RGB range
26- All possible control types are present
27- Support for various pixel aspect ratios and video aspect ratios
28- Error injection to test what happens if errors occur
29- Supports crop/compose/scale in any combination for both input and output
30- Can emulate up to 4K resolutions
31- All Field settings are supported for testing interlaced capturing
32- Supports all standard YUV and RGB formats, including two multiplanar YUV formats
33- Raw and Sliced VBI capture and output support
34- Radio receiver and transmitter support, including RDS support
35- Software defined radio (SDR) support
36- Capture and output overlay support
37
38These features will be described in more detail below.
39
40
41Table of Contents
42-----------------
43
44Section 1: Configuring the driver
45Section 2: Video Capture
46Section 2.1: Webcam Input
47Section 2.2: TV and S-Video Inputs
48Section 2.3: HDMI Input
49Section 3: Video Output
50Section 3.1: S-Video Output
51Section 3.2: HDMI Output
52Section 4: VBI Capture
53Section 5: VBI Output
54Section 6: Radio Receiver
55Section 7: Radio Transmitter
56Section 8: Software Defined Radio Receiver
57Section 9: Controls
58Section 9.1: User Controls - Test Controls
59Section 9.2: User Controls - Video Capture
60Section 9.3: User Controls - Audio
61Section 9.4: Vivid Controls
62Section 9.4.1: Test Pattern Controls
63Section 9.4.2: Capture Feature Selection Controls
64Section 9.4.3: Output Feature Selection Controls
65Section 9.4.4: Error Injection Controls
66Section 9.4.5: VBI Raw Capture Controls
67Section 9.5: Digital Video Controls
68Section 9.6: FM Radio Receiver Controls
69Section 9.7: FM Radio Modulator
70Section 10: Video, VBI and RDS Looping
71Section 10.1: Video and Sliced VBI looping
72Section 10.2: Radio & RDS Looping
73Section 11: Cropping, Composing, Scaling
74Section 12: Formats
75Section 13: Capture Overlay
76Section 14: Output Overlay
77Section 15: Some Future Improvements
78
79
80Section 1: Configuring the driver
81---------------------------------
82
83By default the driver will create a single instance that has a video capture
84device with webcam, TV, S-Video and HDMI inputs, a video output device with
85S-Video and HDMI outputs, one vbi capture device, one vbi output device, one
86radio receiver device, one radio transmitter device and one SDR device.
87
88The number of instances, devices, video inputs and outputs and their types are
89all configurable using the following module options:
90
91n_devs: number of driver instances to create. By default set to 1. Up to 64
92 instances can be created.
93
94node_types: which devices should each driver instance create. An array of
95 hexadecimal values, one for each instance. The default is 0x1d3d.
96 Each value is a bitmask with the following meaning:
97 bit 0: Video Capture node
98 bit 2-3: VBI Capture node: 0 = none, 1 = raw vbi, 2 = sliced vbi, 3 = both
99 bit 4: Radio Receiver node
100 bit 5: Software Defined Radio Receiver node
101 bit 8: Video Output node
102 bit 10-11: VBI Output node: 0 = none, 1 = raw vbi, 2 = sliced vbi, 3 = both
103 bit 12: Radio Transmitter node
104 bit 16: Framebuffer for testing overlays
105
106 So to create four instances, the first two with just one video capture
107 device, the second two with just one video output device you would pass
108 these module options to vivid:
109
110 n_devs=4 node_types=0x1,0x1,0x100,0x100
111
112num_inputs: the number of inputs, one for each instance. By default 4 inputs
113 are created for each video capture device. At most 16 inputs can be created,
114 and there must be at least one.
115
116input_types: the input types for each instance, the default is 0xe4. This defines
117 what the type of each input is when the inputs are created for each driver
118 instance. This is a hexadecimal value with up to 16 pairs of bits, each
119 pair gives the type and bits 0-1 map to input 0, bits 2-3 map to input 1,
120 30-31 map to input 15. Each pair of bits has the following meaning:
121
122 00: this is a webcam input
123 01: this is a TV tuner input
124 10: this is an S-Video input
125 11: this is an HDMI input
126
127 So to create a video capture device with 8 inputs where input 0 is a TV
128 tuner, inputs 1-3 are S-Video inputs and inputs 4-7 are HDMI inputs you
129 would use the following module options:
130
131 num_inputs=8 input_types=0xffa9
132
133num_outputs: the number of outputs, one for each instance. By default 2 outputs
134 are created for each video output device. At most 16 outputs can be
135 created, and there must be at least one.
136
137output_types: the output types for each instance, the default is 0x02. This defines
138 what the type of each output is when the outputs are created for each
139 driver instance. This is a hexadecimal value with up to 16 bits, each bit
140 gives the type and bit 0 maps to output 0, bit 1 maps to output 1, bit
141 15 maps to output 15. The meaning of each bit is as follows:
142
143 0: this is an S-Video output
144 1: this is an HDMI output
145
146 So to create a video output device with 8 outputs where outputs 0-3 are
147 S-Video outputs and outputs 4-7 are HDMI outputs you would use the
148 following module options:
149
150 num_outputs=8 output_types=0xf0
151
152vid_cap_nr: give the desired videoX start number for each video capture device.
153 The default is -1 which will just take the first free number. This allows
154 you to map capture video nodes to specific videoX device nodes. Example:
155
156 n_devs=4 vid_cap_nr=2,4,6,8
157
158 This will attempt to assign /dev/video2 for the video capture device of
159 the first vivid instance, video4 for the next up to video8 for the last
160 instance. If it can't succeed, then it will just take the next free
161 number.
162
163vid_out_nr: give the desired videoX start number for each video output device.
164 The default is -1 which will just take the first free number.
165
166vbi_cap_nr: give the desired vbiX start number for each vbi capture device.
167 The default is -1 which will just take the first free number.
168
169vbi_out_nr: give the desired vbiX start number for each vbi output device.
170 The default is -1 which will just take the first free number.
171
172radio_rx_nr: give the desired radioX start number for each radio receiver device.
173 The default is -1 which will just take the first free number.
174
175radio_tx_nr: give the desired radioX start number for each radio transmitter
176 device. The default is -1 which will just take the first free number.
177
178sdr_cap_nr: give the desired swradioX start number for each SDR capture device.
179 The default is -1 which will just take the first free number.
180
181ccs_cap_mode: specify the allowed video capture crop/compose/scaling combination
182 for each driver instance. Video capture devices can have any combination
183 of cropping, composing and scaling capabilities and this will tell the
184 vivid driver which of those is should emulate. By default the user can
185 select this through controls.
186
187 The value is either -1 (controlled by the user) or a set of three bits,
188 each enabling (1) or disabling (0) one of the features:
189
190 bit 0: Enable crop support. Cropping will take only part of the
191 incoming picture.
192 bit 1: Enable compose support. Composing will copy the incoming
193 picture into a larger buffer.
194 bit 2: Enable scaling support. Scaling can scale the incoming
195 picture. The scaler of the vivid driver can enlarge up
196 or down to four times the original size. The scaler is
197 very simple and low-quality. Simplicity and speed were
198 key, not quality.
199
200 Note that this value is ignored by webcam inputs: those enumerate
201 discrete framesizes and that is incompatible with cropping, composing
202 or scaling.
203
204ccs_out_mode: specify the allowed video output crop/compose/scaling combination
205 for each driver instance. Video output devices can have any combination
206 of cropping, composing and scaling capabilities and this will tell the
207 vivid driver which of those is should emulate. By default the user can
208 select this through controls.
209
210 The value is either -1 (controlled by the user) or a set of three bits,
211 each enabling (1) or disabling (0) one of the features:
212
213 bit 0: Enable crop support. Cropping will take only part of the
214 outgoing buffer.
215 bit 1: Enable compose support. Composing will copy the incoming
216 buffer into a larger picture frame.
217 bit 2: Enable scaling support. Scaling can scale the incoming
218 buffer. The scaler of the vivid driver can enlarge up
219 or down to four times the original size. The scaler is
220 very simple and low-quality. Simplicity and speed were
221 key, not quality.
222
223multiplanar: select whether each device instance supports multi-planar formats,
224 and thus the V4L2 multi-planar API. By default the first device instance
225 is single-planar, the second multi-planar, and it keeps alternating.
226
227 This module option can override that for each instance. Values are:
228
229 0: use alternating single and multi-planar devices.
230 1: this is a single-planar instance.
231 2: this is a multi-planar instance.
232
233vivid_debug: enable driver debugging info
234
235no_error_inj: if set disable the error injecting controls. This option is
236 needed in order to run a tool like v4l2-compliance. Tools like that
237 exercise all controls including a control like 'Disconnect' which
238 emulates a USB disconnect, making the device inaccessible and so
239 all tests that v4l2-compliance is doing will fail afterwards.
240
241 There may be other situations as well where you want to disable the
242 error injection support of vivid. When this option is set, then the
243 controls that select crop, compose and scale behavior are also
244 removed. Unless overridden by ccs_cap_mode and/or ccs_out_mode the
245 will default to enabling crop, compose and scaling.
246
247Taken together, all these module options allow you to precisely customize
248the driver behavior and test your application with all sorts of permutations.
249It is also very suitable to emulate hardware that is not yet available, e.g.
250when developing software for a new upcoming device.
251
252
253Section 2: Video Capture
254------------------------
255
256This is probably the most frequently used feature. The video capture device
257can be configured by using the module options num_inputs, input_types and
258ccs_cap_mode (see section 1 for more detailed information), but by default
259four inputs are configured: a webcam, a TV tuner, an S-Video and an HDMI
260input, one input for each input type. Those are described in more detail
261below.
262
263Special attention has been given to the rate at which new frames become
264available. The jitter will be around 1 jiffie (that depends on the HZ
265configuration of your kernel, so usually 1/100, 1/250 or 1/1000 of a second),
266but the long-term behavior is exactly following the framerate. So a
267framerate of 59.94 Hz is really different from 60 Hz. If the framerate
268exceeds your kernel's HZ value, then you will get dropped frames, but the
269frame/field sequence counting will keep track of that so the sequence
270count will skip whenever frames are dropped.
271
272
273Section 2.1: Webcam Input
274-------------------------
275
276The webcam input supports three framesizes: 320x180, 640x360 and 1280x720. It
277supports frames per second settings of 10, 15, 25, 30, 50 and 60 fps. Which ones
278are available depends on the chosen framesize: the larger the framesize, the
279lower the maximum frames per second.
280
281The initially selected colorspace when you switch to the webcam input will be
282sRGB.
283
284
285Section 2.2: TV and S-Video Inputs
286----------------------------------
287
288The only difference between the TV and S-Video input is that the TV has a
289tuner. Otherwise they behave identically.
290
291These inputs support audio inputs as well: one TV and one Line-In. They
292both support all TV standards. If the standard is queried, then the Vivid
293controls 'Standard Signal Mode' and 'Standard' determine what
294the result will be.
295
296These inputs support all combinations of the field setting. Special care has
297been taken to faithfully reproduce how fields are handled for the different
298TV standards. This is particularly noticable when generating a horizontally
299moving image so the temporal effect of using interlaced formats becomes clearly
300visible. For 50 Hz standards the top field is the oldest and the bottom field
301is the newest in time. For 60 Hz standards that is reversed: the bottom field
302is the oldest and the top field is the newest in time.
303
304When you start capturing in V4L2_FIELD_ALTERNATE mode the first buffer will
305contain the top field for 50 Hz standards and the bottom field for 60 Hz
306standards. This is what capture hardware does as well.
307
308Finally, for PAL/SECAM standards the first half of the top line contains noise.
309This simulates the Wide Screen Signal that is commonly placed there.
310
311The initially selected colorspace when you switch to the TV or S-Video input
312will be SMPTE-170M.
313
314The pixel aspect ratio will depend on the TV standard. The video aspect ratio
315can be selected through the 'Standard Aspect Ratio' Vivid control.
316Choices are '4x3', '16x9' which will give letterboxed widescreen video and
317'16x9 Anomorphic' which will give full screen squashed anamorphic widescreen
318video that will need to be scaled accordingly.
319
320The TV 'tuner' supports a frequency range of 44-958 MHz. Channels are available
321every 6 MHz, starting from 49.25 MHz. For each channel the generated image
322will be in color for the +/- 0.25 MHz around it, and in grayscale for
323+/- 1 MHz around the channel. Beyond that it is just noise. The VIDIOC_G_TUNER
324ioctl will return 100% signal strength for +/- 0.25 MHz and 50% for +/- 1 MHz.
325It will also return correct afc values to show whether the frequency is too
326low or too high.
327
328The audio subchannels that are returned are MONO for the +/- 1 MHz range around
329a valid channel frequency. When the frequency is within +/- 0.25 MHz of the
330channel it will return either MONO, STEREO, either MONO | SAP (for NTSC) or
331LANG1 | LANG2 (for others), or STEREO | SAP.
332
333Which one is returned depends on the chosen channel, each next valid channel
334will cycle through the possible audio subchannel combinations. This allows
335you to test the various combinations by just switching channels..
336
337Finally, for these inputs the v4l2_timecode struct is filled in in the
338dequeued v4l2_buffer struct.
339
340
341Section 2.3: HDMI Input
342-----------------------
343
344The HDMI inputs supports all CEA-861 and DMT timings, both progressive and
345interlaced, for pixelclock frequencies between 25 and 600 MHz. The field
346mode for interlaced formats is always V4L2_FIELD_ALTERNATE. For HDMI the
347field order is always top field first, and when you start capturing an
348interlaced format you will receive the top field first.
349
350The initially selected colorspace when you switch to the HDMI input or
351select an HDMI timing is based on the format resolution: for resolutions
352less than or equal to 720x576 the colorspace is set to SMPTE-170M, for
353others it is set to REC-709 (CEA-861 timings) or sRGB (VESA DMT timings).
354
355The pixel aspect ratio will depend on the HDMI timing: for 720x480 is it
356set as for the NTSC TV standard, for 720x576 it is set as for the PAL TV
357standard, and for all others a 1:1 pixel aspect ratio is returned.
358
359The video aspect ratio can be selected through the 'DV Timings Aspect Ratio'
360Vivid control. Choices are 'Source Width x Height' (just use the
361same ratio as the chosen format), '4x3' or '16x9', either of which can
362result in pillarboxed or letterboxed video.
363
364For HDMI inputs it is possible to set the EDID. By default a simple EDID
365is provided. You can only set the EDID for HDMI inputs. Internally, however,
366the EDID is shared between all HDMI inputs.
367
368No interpretation is done of the EDID data.
369
370
371Section 3: Video Output
372-----------------------
373
374The video output device can be configured by using the module options
375num_outputs, output_types and ccs_out_mode (see section 1 for more detailed
376information), but by default two outputs are configured: an S-Video and an
377HDMI input, one output for each output type. Those are described in more detail
378below.
379
380Like with video capture the framerate is also exact in the long term.
381
382
383Section 3.1: S-Video Output
384---------------------------
385
386This output supports audio outputs as well: "Line-Out 1" and "Line-Out 2".
387The S-Video output supports all TV standards.
388
389This output supports all combinations of the field setting.
390
391The initially selected colorspace when you switch to the TV or S-Video input
392will be SMPTE-170M.
393
394
395Section 3.2: HDMI Output
396------------------------
397
398The HDMI output supports all CEA-861 and DMT timings, both progressive and
399interlaced, for pixelclock frequencies between 25 and 600 MHz. The field
400mode for interlaced formats is always V4L2_FIELD_ALTERNATE.
401
402The initially selected colorspace when you switch to the HDMI output or
403select an HDMI timing is based on the format resolution: for resolutions
404less than or equal to 720x576 the colorspace is set to SMPTE-170M, for
405others it is set to REC-709 (CEA-861 timings) or sRGB (VESA DMT timings).
406
407The pixel aspect ratio will depend on the HDMI timing: for 720x480 is it
408set as for the NTSC TV standard, for 720x576 it is set as for the PAL TV
409standard, and for all others a 1:1 pixel aspect ratio is returned.
410
411An HDMI output has a valid EDID which can be obtained through VIDIOC_G_EDID.
412
413
414Section 4: VBI Capture
415----------------------
416
417There are three types of VBI capture devices: those that only support raw
418(undecoded) VBI, those that only support sliced (decoded) VBI and those that
419support both. This is determined by the node_types module option. In all
420cases the driver will generate valid VBI data: for 60 Hz standards it will
421generate Closed Caption and XDS data. The closed caption stream will
422alternate between "Hello world!" and "Closed captions test" every second.
423The XDS stream will give the current time once a minute. For 50 Hz standards
424it will generate the Wide Screen Signal which is based on the actual Video
425Aspect Ratio control setting and teletext pages 100-159, one page per frame.
426
427The VBI device will only work for the S-Video and TV inputs, it will give
428back an error if the current input is a webcam or HDMI.
429
430
431Section 5: VBI Output
432---------------------
433
434There are three types of VBI output devices: those that only support raw
435(undecoded) VBI, those that only support sliced (decoded) VBI and those that
436support both. This is determined by the node_types module option.
437
438The sliced VBI output supports the Wide Screen Signal and the teletext signal
439for 50 Hz standards and Closed Captioning + XDS for 60 Hz standards.
440
441The VBI device will only work for the S-Video output, it will give
442back an error if the current output is HDMI.
443
444
445Section 6: Radio Receiver
446-------------------------
447
448The radio receiver emulates an FM/AM/SW receiver. The FM band also supports RDS.
449The frequency ranges are:
450
451 FM: 64 MHz - 108 MHz
452 AM: 520 kHz - 1710 kHz
453 SW: 2300 kHz - 26.1 MHz
454
455Valid channels are emulated every 1 MHz for FM and every 100 kHz for AM and SW.
456The signal strength decreases the further the frequency is from the valid
457frequency until it becomes 0% at +/- 50 kHz (FM) or 5 kHz (AM/SW) from the
458ideal frequency. The initial frequency when the driver is loaded is set to
45995 MHz.
460
461The FM receiver supports RDS as well, both using 'Block I/O' and 'Controls'
462modes. In the 'Controls' mode the RDS information is stored in read-only
463controls. These controls are updated every time the frequency is changed,
464or when the tuner status is requested. The Block I/O method uses the read()
465interface to pass the RDS blocks on to the application for decoding.
466
467The RDS signal is 'detected' for +/- 12.5 kHz around the channel frequency,
468and the further the frequency is away from the valid frequency the more RDS
469errors are randomly introduced into the block I/O stream, up to 50% of all
470blocks if you are +/- 12.5 kHz from the channel frequency. All four errors
471can occur in equal proportions: blocks marked 'CORRECTED', blocks marked
472'ERROR', blocks marked 'INVALID' and dropped blocks.
473
474The generated RDS stream contains all the standard fields contained in a
4750B group, and also radio text and the current time.
476
477The receiver supports HW frequency seek, either in Bounded mode, Wrap Around
478mode or both, which is configurable with the "Radio HW Seek Mode" control.
479
480
481Section 7: Radio Transmitter
482----------------------------
483
484The radio transmitter emulates an FM/AM/SW transmitter. The FM band also supports RDS.
485The frequency ranges are:
486
487 FM: 64 MHz - 108 MHz
488 AM: 520 kHz - 1710 kHz
489 SW: 2300 kHz - 26.1 MHz
490
491The initial frequency when the driver is loaded is 95.5 MHz.
492
493The FM transmitter supports RDS as well, both using 'Block I/O' and 'Controls'
494modes. In the 'Controls' mode the transmitted RDS information is configured
495using controls, and in 'Block I/O' mode the blocks are passed to the driver
496using write().
497
498
499Section 8: Software Defined Radio Receiver
500------------------------------------------
501
502The SDR receiver has three frequency bands for the ADC tuner:
503
504 - 300 kHz
505 - 900 kHz - 2800 kHz
506 - 3200 kHz
507
508The RF tuner supports 50 MHz - 2000 MHz.
509
510The generated data contains the In-phase and Quadrature components of a
5111 kHz tone that has an amplitude of sqrt(2).
512
513
514Section 9: Controls
515-------------------
516
517Different devices support different controls. The sections below will describe
518each control and which devices support them.
519
520
521Section 9.1: User Controls - Test Controls
522------------------------------------------
523
524The Button, Boolean, Integer 32 Bits, Integer 64 Bits, Menu, String, Bitmask and
525Integer Menu are controls that represent all possible control types. The Menu
526control and the Integer Menu control both have 'holes' in their menu list,
527meaning that one or more menu items return EINVAL when VIDIOC_QUERYMENU is called.
528Both menu controls also have a non-zero minimum control value. These features
529allow you to check if your application can handle such things correctly.
530These controls are supported for every device type.
531
532
533Section 9.2: User Controls - Video Capture
534------------------------------------------
535
536The following controls are specific to video capture.
537
538The Brightness, Contrast, Saturation and Hue controls actually work and are
539standard. There is one special feature with the Brightness control: each
540video input has its own brightness value, so changing input will restore
541the brightness for that input. In addition, each video input uses a different
542brightness range (minimum and maximum control values). Switching inputs will
543cause a control event to be sent with the V4L2_EVENT_CTRL_CH_RANGE flag set.
544This allows you to test controls that can change their range.
545
546The 'Gain, Automatic' and Gain controls can be used to test volatile controls:
547if 'Gain, Automatic' is set, then the Gain control is volatile and changes
548constantly. If 'Gain, Automatic' is cleared, then the Gain control is a normal
549control.
550
551The 'Horizontal Flip' and 'Vertical Flip' controls can be used to flip the
552image. These combine with the 'Sensor Flipped Horizontally/Vertically' Vivid
553controls.
554
555The 'Alpha Component' control can be used to set the alpha component for
556formats containing an alpha channel.
557
558
559Section 9.3: User Controls - Audio
560----------------------------------
561
562The following controls are specific to video capture and output and radio
563receivers and transmitters.
564
565The 'Volume' and 'Mute' audio controls are typical for such devices to
566control the volume and mute the audio. They don't actually do anything in
567the vivid driver.
568
569
570Section 9.4: Vivid Controls
571---------------------------
572
573These vivid custom controls control the image generation, error injection, etc.
574
575
576Section 9.4.1: Test Pattern Controls
577------------------------------------
578
579The Test Pattern Controls are all specific to video capture.
580
581Test Pattern: selects which test pattern to use. Use the CSC Colorbar for
582 testing colorspace conversions: the colors used in that test pattern
583 map to valid colors in all colorspaces. The colorspace conversion
584 is disabled for the other test patterns.
585
586OSD Text Mode: selects whether the text superimposed on the
587 test pattern should be shown, and if so, whether only counters should
588 be displayed or the full text.
589
590Horizontal Movement: selects whether the test pattern should
591 move to the left or right and at what speed.
592
593Vertical Movement: does the same for the vertical direction.
594
595Show Border: show a two-pixel wide border at the edge of the actual image,
596 excluding letter or pillarboxing.
597
598Show Square: show a square in the middle of the image. If the image is
599 displayed with the correct pixel and image aspect ratio corrections,
600 then the width and height of the square on the monitor should be
601 the same.
602
603Insert SAV Code in Image: adds a SAV (Start of Active Video) code to the image.
604 This can be used to check if such codes in the image are inadvertently
605 interpreted instead of being ignored.
606
607Insert EAV Code in Image: does the same for the EAV (End of Active Video) code.
608
609
610Section 9.4.2: Capture Feature Selection Controls
611-------------------------------------------------
612
613These controls are all specific to video capture.
614
615Sensor Flipped Horizontally: the image is flipped horizontally and the
616 V4L2_IN_ST_HFLIP input status flag is set. This emulates the case where
617 a sensor is for example mounted upside down.
618
619Sensor Flipped Vertically: the image is flipped vertically and the
620 V4L2_IN_ST_VFLIP input status flag is set. This emulates the case where
621 a sensor is for example mounted upside down.
622
623Standard Aspect Ratio: selects if the image aspect ratio as used for the TV or
624 S-Video input should be 4x3, 16x9 or anamorphic widescreen. This may
625 introduce letterboxing.
626
627DV Timings Aspect Ratio: selects if the image aspect ratio as used for the HDMI
628 input should be the same as the source width and height ratio, or if
629 it should be 4x3 or 16x9. This may introduce letter or pillarboxing.
630
631Timestamp Source: selects when the timestamp for each buffer is taken.
632
633Colorspace: selects which colorspace should be used when generating the image.
634 This only applies if the CSC Colorbar test pattern is selected,
635 otherwise the test pattern will go through unconverted (except for
636 the so-called 'Transfer Function' corrections and the R'G'B' to Y'CbCr
637 conversion). This behavior is also what you want, since a 75% Colorbar
638 should really have 75% signal intensity and should not be affected
639 by colorspace conversions.
640
641 Changing the colorspace will result in the V4L2_EVENT_SOURCE_CHANGE
642 to be sent since it emulates a detected colorspace change.
643
644Limited RGB Range (16-235): selects if the RGB range of the HDMI source should
645 be limited or full range. This combines with the Digital Video 'Rx RGB
646 Quantization Range' control and can be used to test what happens if
647 a source provides you with the wrong quantization range information.
648 See the description of that control for more details.
649
650Apply Alpha To Red Only: apply the alpha channel as set by the 'Alpha Component'
651 user control to the red color of the test pattern only.
652
653Enable Capture Cropping: enables crop support. This control is only present if
654 the ccs_cap_mode module option is set to the default value of -1 and if
655 the no_error_inj module option is set to 0 (the default).
656
657Enable Capture Composing: enables composing support. This control is only
658 present if the ccs_cap_mode module option is set to the default value of
659 -1 and if the no_error_inj module option is set to 0 (the default).
660
661Enable Capture Scaler: enables support for a scaler (maximum 4 times upscaling
662 and downscaling). This control is only present if the ccs_cap_mode
663 module option is set to the default value of -1 and if the no_error_inj
664 module option is set to 0 (the default).
665
666Maximum EDID Blocks: determines how many EDID blocks the driver supports.
667 Note that the vivid driver does not actually interpret new EDID
668 data, it just stores it. It allows for up to 256 EDID blocks
669 which is the maximum supported by the standard.
670
671Fill Percentage of Frame: can be used to draw only the top X percent
672 of the image. Since each frame has to be drawn by the driver, this
673 demands a lot of the CPU. For large resolutions this becomes
674 problematic. By drawing only part of the image this CPU load can
675 be reduced.
676
677
678Section 9.4.3: Output Feature Selection Controls
679------------------------------------------------
680
681These controls are all specific to video output.
682
683Enable Output Cropping: enables crop support. This control is only present if
684 the ccs_out_mode module option is set to the default value of -1 and if
685 the no_error_inj module option is set to 0 (the default).
686
687Enable Output Composing: enables composing support. This control is only
688 present if the ccs_out_mode module option is set to the default value of
689 -1 and if the no_error_inj module option is set to 0 (the default).
690
691Enable Output Scaler: enables support for a scaler (maximum 4 times upscaling
692 and downscaling). This control is only present if the ccs_out_mode
693 module option is set to the default value of -1 and if the no_error_inj
694 module option is set to 0 (the default).
695
696
697Section 9.4.4: Error Injection Controls
698---------------------------------------
699
700The following two controls are only valid for video and vbi capture.
701
702Standard Signal Mode: selects the behavior of VIDIOC_QUERYSTD: what should
703 it return?
704
705 Changing this control will result in the V4L2_EVENT_SOURCE_CHANGE
706 to be sent since it emulates a changed input condition (e.g. a cable
707 was plugged in or out).
708
709Standard: selects the standard that VIDIOC_QUERYSTD should return if the
710 previous control is set to "Selected Standard".
711
712 Changing this control will result in the V4L2_EVENT_SOURCE_CHANGE
713 to be sent since it emulates a changed input standard.
714
715
716The following two controls are only valid for video capture.
717
718DV Timings Signal Mode: selects the behavior of VIDIOC_QUERY_DV_TIMINGS: what
719 should it return?
720
721 Changing this control will result in the V4L2_EVENT_SOURCE_CHANGE
722 to be sent since it emulates a changed input condition (e.g. a cable
723 was plugged in or out).
724
725DV Timings: selects the timings the VIDIOC_QUERY_DV_TIMINGS should return
726 if the previous control is set to "Selected DV Timings".
727
728 Changing this control will result in the V4L2_EVENT_SOURCE_CHANGE
729 to be sent since it emulates changed input timings.
730
731
732The following controls are only present if the no_error_inj module option
733is set to 0 (the default). These controls are valid for video and vbi
734capture and output streams and for the SDR capture device except for the
735Disconnect control which is valid for all devices.
736
737Wrap Sequence Number: test what happens when you wrap the sequence number in
738 struct v4l2_buffer around.
739
740Wrap Timestamp: test what happens when you wrap the timestamp in struct
741 v4l2_buffer around.
742
743Percentage of Dropped Buffers: sets the percentage of buffers that
744 are never returned by the driver (i.e., they are dropped).
745
746Disconnect: emulates a USB disconnect. The device will act as if it has
747 been disconnected. Only after all open filehandles to the device
748 node have been closed will the device become 'connected' again.
749
750Inject V4L2_BUF_FLAG_ERROR: when pressed, the next frame returned by
751 the driver will have the error flag set (i.e. the frame is marked
752 corrupt).
753
754Inject VIDIOC_REQBUFS Error: when pressed, the next REQBUFS or CREATE_BUFS
755 ioctl call will fail with an error. To be precise: the videobuf2
756 queue_setup() op will return -EINVAL.
757
758Inject VIDIOC_QBUF Error: when pressed, the next VIDIOC_QBUF or
759 VIDIOC_PREPARE_BUFFER ioctl call will fail with an error. To be
760 precise: the videobuf2 buf_prepare() op will return -EINVAL.
761
762Inject VIDIOC_STREAMON Error: when pressed, the next VIDIOC_STREAMON ioctl
763 call will fail with an error. To be precise: the videobuf2
764 start_streaming() op will return -EINVAL.
765
766Inject Fatal Streaming Error: when pressed, the streaming core will be
767 marked as having suffered a fatal error, the only way to recover
768 from that is to stop streaming. To be precise: the videobuf2
769 vb2_queue_error() function is called.
770
771
772Section 9.4.5: VBI Raw Capture Controls
773---------------------------------------
774
775Interlaced VBI Format: if set, then the raw VBI data will be interlaced instead
776 of providing it grouped by field.
777
778
779Section 9.5: Digital Video Controls
780-----------------------------------
781
782Rx RGB Quantization Range: sets the RGB quantization detection of the HDMI
783 input. This combines with the Vivid 'Limited RGB Range (16-235)'
784 control and can be used to test what happens if a source provides
785 you with the wrong quantization range information. This can be tested
786 by selecting an HDMI input, setting this control to Full or Limited
787 range and selecting the opposite in the 'Limited RGB Range (16-235)'
788 control. The effect is easy to see if the 'Gray Ramp' test pattern
789 is selected.
790
791Tx RGB Quantization Range: sets the RGB quantization detection of the HDMI
792 output. It is currently not used for anything in vivid, but most HDMI
793 transmitters would typically have this control.
794
795Transmit Mode: sets the transmit mode of the HDMI output to HDMI or DVI-D. This
796 affects the reported colorspace since DVI_D outputs will always use
797 sRGB.
798
799
800Section 9.6: FM Radio Receiver Controls
801---------------------------------------
802
803RDS Reception: set if the RDS receiver should be enabled.
804
805RDS Program Type:
806RDS PS Name:
807RDS Radio Text:
808RDS Traffic Announcement:
809RDS Traffic Program:
810RDS Music: these are all read-only controls. If RDS Rx I/O Mode is set to
811 "Block I/O", then they are inactive as well. If RDS Rx I/O Mode is set
812 to "Controls", then these controls report the received RDS data. Note
813 that the vivid implementation of this is pretty basic: they are only
814 updated when you set a new frequency or when you get the tuner status
815 (VIDIOC_G_TUNER).
816
817Radio HW Seek Mode: can be one of "Bounded", "Wrap Around" or "Both". This
818 determines if VIDIOC_S_HW_FREQ_SEEK will be bounded by the frequency
819 range or wrap-around or if it is selectable by the user.
820
821Radio Programmable HW Seek: if set, then the user can provide the lower and
822 upper bound of the HW Seek. Otherwise the frequency range boundaries
823 will be used.
824
825Generate RBDS Instead of RDS: if set, then generate RBDS (the US variant of
826 RDS) data instead of RDS (European-style RDS). This affects only the
827 PICODE and PTY codes.
828
829RDS Rx I/O Mode: this can be "Block I/O" where the RDS blocks have to be read()
830 by the application, or "Controls" where the RDS data is provided by
831 the RDS controls mentioned above.
832
833
834Section 9.7: FM Radio Modulator Controls
835----------------------------------------
836
837RDS Program ID:
838RDS Program Type:
839RDS PS Name:
840RDS Radio Text:
841RDS Stereo:
842RDS Artificial Head:
843RDS Compressed:
844RDS Dymanic PTY:
845RDS Traffic Announcement:
846RDS Traffic Program:
847RDS Music: these are all controls that set the RDS data that is transmitted by
848 the FM modulator.
849
850RDS Tx I/O Mode: this can be "Block I/O" where the application has to use write()
851 to pass the RDS blocks to the driver, or "Controls" where the RDS data is
852 provided by the RDS controls mentioned above.
853
854
855Section 10: Video, VBI and RDS Looping
856--------------------------------------
857
858The vivid driver supports looping of video output to video input, VBI output
859to VBI input and RDS output to RDS input. For video/VBI looping this emulates
860as if a cable was hooked up between the output and input connector. So video
861and VBI looping is only supported between S-Video and HDMI inputs and outputs.
862VBI is only valid for S-Video as it makes no sense for HDMI.
863
864Since radio is wireless this looping always happens if the radio receiver
865frequency is close to the radio transmitter frequency. In that case the radio
866transmitter will 'override' the emulated radio stations.
867
868Looping is currently supported only between devices created by the same
869vivid driver instance.
870
871
872Section 10.1: Video and Sliced VBI looping
873------------------------------------------
874
875The way to enable video/VBI looping is currently fairly crude. A 'Loop Video'
876control is available in the "Vivid" control class of the video
877output and VBI output devices. When checked the video looping will be enabled.
878Once enabled any video S-Video or HDMI input will show a static test pattern
879until the video output has started. At that time the video output will be
880looped to the video input provided that:
881
882- the input type matches the output type. So the HDMI input cannot receive
883 video from the S-Video output.
884
885- the video resolution of the video input must match that of the video output.
886 So it is not possible to loop a 50 Hz (720x576) S-Video output to a 60 Hz
887 (720x480) S-Video input, or a 720p60 HDMI output to a 1080p30 input.
888
889- the pixel formats must be identical on both sides. Otherwise the driver would
890 have to do pixel format conversion as well, and that's taking things too far.
891
892- the field settings must be identical on both sides. Same reason as above:
893 requiring the driver to convert from one field format to another complicated
894 matters too much. This also prohibits capturing with 'Field Top' or 'Field
895 Bottom' when the output video is set to 'Field Alternate'. This combination,
896 while legal, became too complicated to support. Both sides have to be 'Field
897 Alternate' for this to work. Also note that for this specific case the
898 sequence and field counting in struct v4l2_buffer on the capture side may not
899 be 100% accurate.
900
901- on the input side the "Standard Signal Mode" for the S-Video input or the
902 "DV Timings Signal Mode" for the HDMI input should be configured so that a
903 valid signal is passed to the video input.
904
905The framerates do not have to match, although this might change in the future.
906
907By default you will see the OSD text superimposed on top of the looped video.
908This can be turned off by changing the "OSD Text Mode" control of the video
909capture device.
910
911For VBI looping to work all of the above must be valid and in addition the vbi
912output must be configured for sliced VBI. The VBI capture side can be configured
913for either raw or sliced VBI. Note that at the moment only CC/XDS (60 Hz formats)
914and WSS (50 Hz formats) VBI data is looped. Teletext VBI data is not looped.
915
916
917Section 10.2: Radio & RDS Looping
918---------------------------------
919
920As mentioned in section 6 the radio receiver emulates stations are regular
921frequency intervals. Depending on the frequency of the radio receiver a
922signal strength value is calculated (this is returned by VIDIOC_G_TUNER).
923However, it will also look at the frequency set by the radio transmitter and
924if that results in a higher signal strength than the settings of the radio
925transmitter will be used as if it was a valid station. This also includes
926the RDS data (if any) that the transmitter 'transmits'. This is received
927faithfully on the receiver side. Note that when the driver is loaded the
928frequencies of the radio receiver and transmitter are not identical, so
929initially no looping takes place.
930
931
932Section 11: Cropping, Composing, Scaling
933----------------------------------------
934
935This driver supports cropping, composing and scaling in any combination. Normally
936which features are supported can be selected through the Vivid controls,
937but it is also possible to hardcode it when the module is loaded through the
938ccs_cap_mode and ccs_out_mode module options. See section 1 on the details of
939these module options.
940
941This allows you to test your application for all these variations.
942
943Note that the webcam input never supports cropping, composing or scaling. That
944only applies to the TV/S-Video/HDMI inputs and outputs. The reason is that
945webcams, including this virtual implementation, normally use
946VIDIOC_ENUM_FRAMESIZES to list a set of discrete framesizes that it supports.
947And that does not combine with cropping, composing or scaling. This is
948primarily a limitation of the V4L2 API which is carefully reproduced here.
949
950The minimum and maximum resolutions that the scaler can achieve are 16x16 and
951(4096 * 4) x (2160 x 4), but it can only scale up or down by a factor of 4 or
952less. So for a source resolution of 1280x720 the minimum the scaler can do is
953320x180 and the maximum is 5120x2880. You can play around with this using the
954qv4l2 test tool and you will see these dependencies.
955
956This driver also supports larger 'bytesperline' settings, something that
957VIDIOC_S_FMT allows but that few drivers implement.
958
959The scaler is a simple scaler that uses the Coarse Bresenham algorithm. It's
960designed for speed and simplicity, not quality.
961
962If the combination of crop, compose and scaling allows it, then it is possible
963to change crop and compose rectangles on the fly.
964
965
966Section 12: Formats
967-------------------
968
969The driver supports all the regular packed YUYV formats, 16, 24 and 32 RGB
970packed formats and two multiplanar formats (one luma and one chroma plane).
971
972The alpha component can be set through the 'Alpha Component' User control
973for those formats that support it. If the 'Apply Alpha To Red Only' control
974is set, then the alpha component is only used for the color red and set to
9750 otherwise.
976
977The driver has to be configured to support the multiplanar formats. By default
978the first driver instance is single-planar, the second is multi-planar, and it
979keeps alternating. This can be changed by setting the multiplanar module option,
980see section 1 for more details on that option.
981
982If the driver instance is using the multiplanar formats/API, then the first
983single planar format (YUYV) and the multiplanar NV16M and NV61M formats the
984will have a plane that has a non-zero data_offset of 128 bytes. It is rare for
985data_offset to be non-zero, so this is a useful feature for testing applications.
986
987Video output will also honor any data_offset that the application set.
988
989
990Section 13: Capture Overlay
991---------------------------
992
993Note: capture overlay support is implemented primarily to test the existing
994V4L2 capture overlay API. In practice few if any GPUs support such overlays
995anymore, and neither are they generally needed anymore since modern hardware
996is so much more capable. By setting flag 0x10000 in the node_types module
997option the vivid driver will create a simple framebuffer device that can be
998used for testing this API. Whether this API should be used for new drivers is
999questionable.
1000
1001This driver has support for a destructive capture overlay with bitmap clipping
1002and list clipping (up to 16 rectangles) capabilities. Overlays are not
1003supported for multiplanar formats. It also honors the struct v4l2_window field
1004setting: if it is set to FIELD_TOP or FIELD_BOTTOM and the capture setting is
1005FIELD_ALTERNATE, then only the top or bottom fields will be copied to the overlay.
1006
1007The overlay only works if you are also capturing at that same time. This is a
1008vivid limitation since it copies from a buffer to the overlay instead of
1009filling the overlay directly. And if you are not capturing, then no buffers
1010are available to fill.
1011
1012In addition, the pixelformat of the capture format and that of the framebuffer
1013must be the same for the overlay to work. Otherwise VIDIOC_OVERLAY will return
1014an error.
1015
1016In order to really see what it going on you will need to create two vivid
1017instances: the first with a framebuffer enabled. You configure the capture
1018overlay of the second instance to use the framebuffer of the first, then
1019you start capturing in the second instance. For the first instance you setup
1020the output overlay for the video output, turn on video looping and capture
1021to see the blended framebuffer overlay that's being written to by the second
1022instance. This setup would require the following commands:
1023
1024 $ sudo modprobe vivid n_devs=2 node_types=0x10101,0x1 multiplanar=1,1
1025 $ v4l2-ctl -d1 --find-fb
1026 /dev/fb1 is the framebuffer associated with base address 0x12800000
1027 $ sudo v4l2-ctl -d2 --set-fbuf fb=1
1028 $ v4l2-ctl -d1 --set-fbuf fb=1
1029 $ v4l2-ctl -d0 --set-fmt-video=pixelformat='AR15'
1030 $ v4l2-ctl -d1 --set-fmt-video-out=pixelformat='AR15'
1031 $ v4l2-ctl -d2 --set-fmt-video=pixelformat='AR15'
1032 $ v4l2-ctl -d0 -i2
1033 $ v4l2-ctl -d2 -i2
1034 $ v4l2-ctl -d2 -c horizontal_movement=4
1035 $ v4l2-ctl -d1 --overlay=1
1036 $ v4l2-ctl -d1 -c loop_video=1
1037 $ v4l2-ctl -d2 --stream-mmap --overlay=1
1038
1039And from another console:
1040
1041 $ v4l2-ctl -d1 --stream-out-mmap
1042
1043And yet another console:
1044
1045 $ qv4l2
1046
1047and start streaming.
1048
1049As you can see, this is not for the faint of heart...
1050
1051
1052Section 14: Output Overlay
1053--------------------------
1054
1055Note: output overlays are primarily implemented in order to test the existing
1056V4L2 output overlay API. Whether this API should be used for new drivers is
1057questionable.
1058
1059This driver has support for an output overlay and is capable of:
1060
1061 - bitmap clipping,
1062 - list clipping (up to 16 rectangles)
1063 - chromakey
1064 - source chromakey
1065 - global alpha
1066 - local alpha
1067 - local inverse alpha
1068
1069Output overlays are not supported for multiplanar formats. In addition, the
1070pixelformat of the capture format and that of the framebuffer must be the
1071same for the overlay to work. Otherwise VIDIOC_OVERLAY will return an error.
1072
1073Output overlays only work if the driver has been configured to create a
1074framebuffer by setting flag 0x10000 in the node_types module option. The
1075created framebuffer has a size of 720x576 and supports ARGB 1:5:5:5 and
1076RGB 5:6:5.
1077
1078In order to see the effects of the various clipping, chromakeying or alpha
1079processing capabilities you need to turn on video looping and see the results
1080on the capture side. The use of the clipping, chromakeying or alpha processing
1081capabilities will slow down the video loop considerably as a lot of checks have
1082to be done per pixel.
1083
1084
1085Section 15: Some Future Improvements
1086------------------------------------
1087
1088Just as a reminder and in no particular order:
1089
1090- Add a virtual alsa driver to test audio
1091- Add virtual sub-devices and media controller support
1092- Some support for testing compressed video
1093- Add support to loop raw VBI output to raw VBI input
1094- Add support to loop teletext sliced VBI output to VBI input
1095- Fix sequence/field numbering when looping of video with alternate fields
1096- Add support for V4L2_CID_BG_COLOR for video outputs
1097- Add ARGB888 overlay support: better testing of the alpha channel
1098- Add custom DV timings support
1099- Add support for V4L2_DV_FL_REDUCED_FPS
1100- Improve pixel aspect support in the tpg code by passing a real v4l2_fract
1101- Use per-queue locks and/or per-device locks to improve throughput
1102- Add support to loop from a specific output to a specific input across
1103 vivid instances
1104- Add support for VIDIOC_EXPBUF once support for that has been added to vb2
1105- The SDR radio should use the same 'frequencies' for stations as the normal
1106 radio receiver, and give back noise if the frequency doesn't match up with
1107 a station frequency
1108- Improve the sine generation of the SDR radio.
1109- Make a thread for the RDS generation, that would help in particular for the
1110 "Controls" RDS Rx I/O Mode as the read-only RDS controls could be updated
1111 in real-time.
diff --git a/MAINTAINERS b/MAINTAINERS
index 8b0902106cc0..2cddff1dd439 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -4233,6 +4233,16 @@ L: linuxppc-dev@lists.ozlabs.org
4233S: Odd Fixes 4233S: Odd Fixes
4234F: drivers/tty/hvc/ 4234F: drivers/tty/hvc/
4235 4235
4236HACKRF MEDIA DRIVER
4237M: Antti Palosaari <crope@iki.fi>
4238L: linux-media@vger.kernel.org
4239W: http://linuxtv.org/
4240W: http://palosaari.fi/linux/
4241Q: http://patchwork.linuxtv.org/project/linux-media/list/
4242T: git git://linuxtv.org/anttip/media_tree.git
4243S: Maintained
4244F: drivers/media/usb/hackrf/
4245
4236HARDWARE MONITORING 4246HARDWARE MONITORING
4237M: Jean Delvare <jdelvare@suse.de> 4247M: Jean Delvare <jdelvare@suse.de>
4238M: Guenter Roeck <linux@roeck-us.net> 4248M: Guenter Roeck <linux@roeck-us.net>
@@ -5131,7 +5141,7 @@ W: http://palosaari.fi/linux/
5131Q: http://patchwork.linuxtv.org/project/linux-media/list/ 5141Q: http://patchwork.linuxtv.org/project/linux-media/list/
5132T: git git://linuxtv.org/anttip/media_tree.git 5142T: git git://linuxtv.org/anttip/media_tree.git
5133S: Maintained 5143S: Maintained
5134F: drivers/media/tuners/tuner_it913x* 5144F: drivers/media/tuners/it913x*
5135 5145
5136IVTV VIDEO4LINUX DRIVER 5146IVTV VIDEO4LINUX DRIVER
5137M: Andy Walls <awalls@md.metrocast.net> 5147M: Andy Walls <awalls@md.metrocast.net>
@@ -8672,6 +8682,14 @@ F: include/sound/dmaengine_pcm.h
8672F: sound/core/pcm_dmaengine.c 8682F: sound/core/pcm_dmaengine.c
8673F: sound/soc/soc-generic-dmaengine-pcm.c 8683F: sound/soc/soc-generic-dmaengine-pcm.c
8674 8684
8685SP2 MEDIA DRIVER
8686M: Olli Salonen <olli.salonen@iki.fi>
8687L: linux-media@vger.kernel.org
8688W: http://linuxtv.org/
8689Q: http://patchwork.linuxtv.org/project/linux-media/list/
8690S: Maintained
8691F: drivers/media/dvb-frontends/sp2*
8692
8675SPARC + UltraSPARC (sparc/sparc64) 8693SPARC + UltraSPARC (sparc/sparc64)
8676M: "David S. Miller" <davem@davemloft.net> 8694M: "David S. Miller" <davem@davemloft.net>
8677L: sparclinux@vger.kernel.org 8695L: sparclinux@vger.kernel.org
@@ -9375,6 +9393,14 @@ T: git git://linuxtv.org/media_tree.git
9375S: Odd fixes 9393S: Odd fixes
9376F: drivers/media/usb/tm6000/ 9394F: drivers/media/usb/tm6000/
9377 9395
9396TW68 VIDEO4LINUX DRIVER
9397M: Hans Verkuil <hverkuil@xs4all.nl>
9398L: linux-media@vger.kernel.org
9399T: git git://linuxtv.org/media_tree.git
9400W: http://linuxtv.org
9401S: Odd Fixes
9402F: drivers/media/pci/tw68/
9403
9378TPM DEVICE DRIVER 9404TPM DEVICE DRIVER
9379M: Peter Huewe <peterhuewe@gmx.de> 9405M: Peter Huewe <peterhuewe@gmx.de>
9380M: Ashley Lai <ashley@ashleylai.com> 9406M: Ashley Lai <ashley@ashleylai.com>
diff --git a/drivers/media/common/b2c2/flexcop.h b/drivers/media/common/b2c2/flexcop.h
index 897b10c85ad9..8942bdacbf61 100644
--- a/drivers/media/common/b2c2/flexcop.h
+++ b/drivers/media/common/b2c2/flexcop.h
@@ -4,7 +4,7 @@
4 * see flexcop.c for copyright information 4 * see flexcop.c for copyright information
5 */ 5 */
6#ifndef __FLEXCOP_H__ 6#ifndef __FLEXCOP_H__
7#define __FLEXCOP_H___ 7#define __FLEXCOP_H__
8 8
9#define FC_LOG_PREFIX "b2c2-flexcop" 9#define FC_LOG_PREFIX "b2c2-flexcop"
10#include "flexcop-common.h" 10#include "flexcop-common.h"
diff --git a/drivers/media/common/saa7146/saa7146_fops.c b/drivers/media/common/saa7146/saa7146_fops.c
index 6c47f3fe9b0f..b7d63933dae6 100644
--- a/drivers/media/common/saa7146/saa7146_fops.c
+++ b/drivers/media/common/saa7146/saa7146_fops.c
@@ -311,7 +311,6 @@ static int fops_mmap(struct file *file, struct vm_area_struct * vma)
311 } 311 }
312 default: 312 default:
313 BUG(); 313 BUG();
314 return 0;
315 } 314 }
316 315
317 if (mutex_lock_interruptible(vdev->lock)) 316 if (mutex_lock_interruptible(vdev->lock))
@@ -399,7 +398,6 @@ static ssize_t fops_read(struct file *file, char __user *data, size_t count, lof
399 return -EINVAL; 398 return -EINVAL;
400 default: 399 default:
401 BUG(); 400 BUG();
402 return 0;
403 } 401 }
404} 402}
405 403
@@ -423,7 +421,6 @@ static ssize_t fops_write(struct file *file, const char __user *data, size_t cou
423 return -EINVAL; 421 return -EINVAL;
424 default: 422 default:
425 BUG(); 423 BUG();
426 return -EINVAL;
427 } 424 }
428} 425}
429 426
diff --git a/drivers/media/common/siano/sms-cards.c b/drivers/media/common/siano/sms-cards.c
index 82769993eeb7..82c7a1289f05 100644
--- a/drivers/media/common/siano/sms-cards.c
+++ b/drivers/media/common/siano/sms-cards.c
@@ -157,6 +157,12 @@ static struct sms_board sms_boards[] = {
157 .type = SMS_DENVER_2160, 157 .type = SMS_DENVER_2160,
158 .default_mode = DEVICE_MODE_DAB_TDMB, 158 .default_mode = DEVICE_MODE_DAB_TDMB,
159 }, 159 },
160 [SMS1XXX_BOARD_PCTV_77E] = {
161 .name = "Hauppauge microStick 77e",
162 .type = SMS_NOVA_B0,
163 .fw[DEVICE_MODE_DVBT_BDA] = SMS_FW_DVB_NOVA_12MHZ_B0,
164 .default_mode = DEVICE_MODE_DVBT_BDA,
165 },
160}; 166};
161 167
162struct sms_board *sms_get_board(unsigned id) 168struct sms_board *sms_get_board(unsigned id)
diff --git a/drivers/media/common/siano/sms-cards.h b/drivers/media/common/siano/sms-cards.h
index c63b544c49c5..4c4caddf9869 100644
--- a/drivers/media/common/siano/sms-cards.h
+++ b/drivers/media/common/siano/sms-cards.h
@@ -45,6 +45,7 @@
45#define SMS1XXX_BOARD_SIANO_RIO 18 45#define SMS1XXX_BOARD_SIANO_RIO 18
46#define SMS1XXX_BOARD_SIANO_DENVER_1530 19 46#define SMS1XXX_BOARD_SIANO_DENVER_1530 19
47#define SMS1XXX_BOARD_SIANO_DENVER_2160 20 47#define SMS1XXX_BOARD_SIANO_DENVER_2160 20
48#define SMS1XXX_BOARD_PCTV_77E 21
48 49
49struct sms_board_gpio_cfg { 50struct sms_board_gpio_cfg {
50 int lna_vhf_exist; 51 int lna_vhf_exist;
diff --git a/drivers/media/common/siano/smscoreapi.c b/drivers/media/common/siano/smscoreapi.c
index 050984c5b1e3..a3677438205e 100644
--- a/drivers/media/common/siano/smscoreapi.c
+++ b/drivers/media/common/siano/smscoreapi.c
@@ -2129,8 +2129,6 @@ int smscore_gpio_get_level(struct smscore_device_t *coredev, u8 pin_num,
2129 2129
2130static int __init smscore_module_init(void) 2130static int __init smscore_module_init(void)
2131{ 2131{
2132 int rc = 0;
2133
2134 INIT_LIST_HEAD(&g_smscore_notifyees); 2132 INIT_LIST_HEAD(&g_smscore_notifyees);
2135 INIT_LIST_HEAD(&g_smscore_devices); 2133 INIT_LIST_HEAD(&g_smscore_devices);
2136 kmutex_init(&g_smscore_deviceslock); 2134 kmutex_init(&g_smscore_deviceslock);
@@ -2138,7 +2136,7 @@ static int __init smscore_module_init(void)
2138 INIT_LIST_HEAD(&g_smscore_registry); 2136 INIT_LIST_HEAD(&g_smscore_registry);
2139 kmutex_init(&g_smscore_registrylock); 2137 kmutex_init(&g_smscore_registrylock);
2140 2138
2141 return rc; 2139 return 0;
2142} 2140}
2143 2141
2144static void __exit smscore_module_exit(void) 2142static void __exit smscore_module_exit(void)
diff --git a/drivers/media/dvb-core/dmxdev.c b/drivers/media/dvb-core/dmxdev.c
index c0363f1b6c90..abff803ad69a 100644
--- a/drivers/media/dvb-core/dmxdev.c
+++ b/drivers/media/dvb-core/dmxdev.c
@@ -1087,8 +1087,8 @@ static unsigned int dvb_demux_poll(struct file *file, poll_table *wait)
1087 struct dmxdev_filter *dmxdevfilter = file->private_data; 1087 struct dmxdev_filter *dmxdevfilter = file->private_data;
1088 unsigned int mask = 0; 1088 unsigned int mask = 0;
1089 1089
1090 if (!dmxdevfilter) 1090 if ((!dmxdevfilter) || dmxdevfilter->dev->exit)
1091 return -EINVAL; 1091 return POLLERR;
1092 1092
1093 poll_wait(file, &dmxdevfilter->buffer.queue, wait); 1093 poll_wait(file, &dmxdevfilter->buffer.queue, wait);
1094 1094
@@ -1181,6 +1181,9 @@ static unsigned int dvb_dvr_poll(struct file *file, poll_table *wait)
1181 1181
1182 dprintk("function : %s\n", __func__); 1182 dprintk("function : %s\n", __func__);
1183 1183
1184 if (dmxdev->exit)
1185 return POLLERR;
1186
1184 poll_wait(file, &dmxdev->dvr_buffer.queue, wait); 1187 poll_wait(file, &dmxdev->dvr_buffer.queue, wait);
1185 1188
1186 if ((file->f_flags & O_ACCMODE) == O_RDONLY) { 1189 if ((file->f_flags & O_ACCMODE) == O_RDONLY) {
diff --git a/drivers/media/dvb-core/dvb-usb-ids.h b/drivers/media/dvb-core/dvb-usb-ids.h
index 12ce19c98ded..e07a84e7bc56 100644
--- a/drivers/media/dvb-core/dvb-usb-ids.h
+++ b/drivers/media/dvb-core/dvb-usb-ids.h
@@ -144,6 +144,7 @@
144#define USB_PID_ITETECH_IT9135 0x9135 144#define USB_PID_ITETECH_IT9135 0x9135
145#define USB_PID_ITETECH_IT9135_9005 0x9005 145#define USB_PID_ITETECH_IT9135_9005 0x9005
146#define USB_PID_ITETECH_IT9135_9006 0x9006 146#define USB_PID_ITETECH_IT9135_9006 0x9006
147#define USB_PID_ITETECH_IT9303 0x9306
147#define USB_PID_KWORLD_399U 0xe399 148#define USB_PID_KWORLD_399U 0xe399
148#define USB_PID_KWORLD_399U_2 0xe400 149#define USB_PID_KWORLD_399U_2 0xe400
149#define USB_PID_KWORLD_395U 0xe396 150#define USB_PID_KWORLD_395U 0xe396
@@ -244,6 +245,7 @@
244#define USB_PID_TECHNOTREND_CONNECT_S2400 0x3006 245#define USB_PID_TECHNOTREND_CONNECT_S2400 0x3006
245#define USB_PID_TECHNOTREND_CONNECT_S2400_8KEEPROM 0x3009 246#define USB_PID_TECHNOTREND_CONNECT_S2400_8KEEPROM 0x3009
246#define USB_PID_TECHNOTREND_CONNECT_CT3650 0x300d 247#define USB_PID_TECHNOTREND_CONNECT_CT3650 0x300d
248#define USB_PID_TECHNOTREND_CONNECT_CT2_4650_CI 0x3012
247#define USB_PID_TECHNOTREND_TVSTICK_CT2_4400 0x3014 249#define USB_PID_TECHNOTREND_TVSTICK_CT2_4400 0x3014
248#define USB_PID_TERRATEC_CINERGY_DT_XS_DIVERSITY 0x005a 250#define USB_PID_TERRATEC_CINERGY_DT_XS_DIVERSITY 0x005a
249#define USB_PID_TERRATEC_CINERGY_DT_XS_DIVERSITY_2 0x0081 251#define USB_PID_TERRATEC_CINERGY_DT_XS_DIVERSITY_2 0x0081
diff --git a/drivers/media/dvb-core/dvb_frontend.c b/drivers/media/dvb-core/dvb_frontend.c
index c2a6a0a85813..b8579ee68bd6 100644
--- a/drivers/media/dvb-core/dvb_frontend.c
+++ b/drivers/media/dvb-core/dvb_frontend.c
@@ -1934,15 +1934,13 @@ static int dvb_frontend_ioctl_properties(struct file *file,
1934 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 1934 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1935 int err = 0; 1935 int err = 0;
1936 1936
1937 struct dtv_properties *tvps = NULL; 1937 struct dtv_properties *tvps = parg;
1938 struct dtv_property *tvp = NULL; 1938 struct dtv_property *tvp = NULL;
1939 int i; 1939 int i;
1940 1940
1941 dev_dbg(fe->dvb->device, "%s:\n", __func__); 1941 dev_dbg(fe->dvb->device, "%s:\n", __func__);
1942 1942
1943 if(cmd == FE_SET_PROPERTY) { 1943 if (cmd == FE_SET_PROPERTY) {
1944 tvps = (struct dtv_properties __user *)parg;
1945
1946 dev_dbg(fe->dvb->device, "%s: properties.num = %d\n", __func__, tvps->num); 1944 dev_dbg(fe->dvb->device, "%s: properties.num = %d\n", __func__, tvps->num);
1947 dev_dbg(fe->dvb->device, "%s: properties.props = %p\n", __func__, tvps->props); 1945 dev_dbg(fe->dvb->device, "%s: properties.props = %p\n", __func__, tvps->props);
1948 1946
@@ -1957,7 +1955,8 @@ static int dvb_frontend_ioctl_properties(struct file *file,
1957 goto out; 1955 goto out;
1958 } 1956 }
1959 1957
1960 if (copy_from_user(tvp, tvps->props, tvps->num * sizeof(struct dtv_property))) { 1958 if (copy_from_user(tvp, (void __user *)tvps->props,
1959 tvps->num * sizeof(struct dtv_property))) {
1961 err = -EFAULT; 1960 err = -EFAULT;
1962 goto out; 1961 goto out;
1963 } 1962 }
@@ -1972,10 +1971,7 @@ static int dvb_frontend_ioctl_properties(struct file *file,
1972 if (c->state == DTV_TUNE) 1971 if (c->state == DTV_TUNE)
1973 dev_dbg(fe->dvb->device, "%s: Property cache is full, tuning\n", __func__); 1972 dev_dbg(fe->dvb->device, "%s: Property cache is full, tuning\n", __func__);
1974 1973
1975 } else 1974 } else if (cmd == FE_GET_PROPERTY) {
1976 if(cmd == FE_GET_PROPERTY) {
1977 tvps = (struct dtv_properties __user *)parg;
1978
1979 dev_dbg(fe->dvb->device, "%s: properties.num = %d\n", __func__, tvps->num); 1975 dev_dbg(fe->dvb->device, "%s: properties.num = %d\n", __func__, tvps->num);
1980 dev_dbg(fe->dvb->device, "%s: properties.props = %p\n", __func__, tvps->props); 1976 dev_dbg(fe->dvb->device, "%s: properties.props = %p\n", __func__, tvps->props);
1981 1977
@@ -1990,7 +1986,8 @@ static int dvb_frontend_ioctl_properties(struct file *file,
1990 goto out; 1986 goto out;
1991 } 1987 }
1992 1988
1993 if (copy_from_user(tvp, tvps->props, tvps->num * sizeof(struct dtv_property))) { 1989 if (copy_from_user(tvp, (void __user *)tvps->props,
1990 tvps->num * sizeof(struct dtv_property))) {
1994 err = -EFAULT; 1991 err = -EFAULT;
1995 goto out; 1992 goto out;
1996 } 1993 }
@@ -2012,7 +2009,8 @@ static int dvb_frontend_ioctl_properties(struct file *file,
2012 (tvp + i)->result = err; 2009 (tvp + i)->result = err;
2013 } 2010 }
2014 2011
2015 if (copy_to_user(tvps->props, tvp, tvps->num * sizeof(struct dtv_property))) { 2012 if (copy_to_user((void __user *)tvps->props, tvp,
2013 tvps->num * sizeof(struct dtv_property))) {
2016 err = -EFAULT; 2014 err = -EFAULT;
2017 goto out; 2015 goto out;
2018 } 2016 }
@@ -2072,6 +2070,23 @@ static int dtv_set_frontend(struct dvb_frontend *fe)
2072 case SYS_DVBC_ANNEX_C: 2070 case SYS_DVBC_ANNEX_C:
2073 rolloff = 113; 2071 rolloff = 113;
2074 break; 2072 break;
2073 case SYS_DVBS:
2074 case SYS_TURBO:
2075 rolloff = 135;
2076 break;
2077 case SYS_DVBS2:
2078 switch (c->rolloff) {
2079 case ROLLOFF_20:
2080 rolloff = 120;
2081 break;
2082 case ROLLOFF_25:
2083 rolloff = 125;
2084 break;
2085 default:
2086 case ROLLOFF_35:
2087 rolloff = 135;
2088 }
2089 break;
2075 default: 2090 default:
2076 break; 2091 break;
2077 } 2092 }
@@ -2550,7 +2565,9 @@ int dvb_frontend_suspend(struct dvb_frontend *fe)
2550 dev_dbg(fe->dvb->device, "%s: adap=%d fe=%d\n", __func__, fe->dvb->num, 2565 dev_dbg(fe->dvb->device, "%s: adap=%d fe=%d\n", __func__, fe->dvb->num,
2551 fe->id); 2566 fe->id);
2552 2567
2553 if (fe->ops.tuner_ops.sleep) 2568 if (fe->ops.tuner_ops.suspend)
2569 ret = fe->ops.tuner_ops.suspend(fe);
2570 else if (fe->ops.tuner_ops.sleep)
2554 ret = fe->ops.tuner_ops.sleep(fe); 2571 ret = fe->ops.tuner_ops.sleep(fe);
2555 2572
2556 if (fe->ops.sleep) 2573 if (fe->ops.sleep)
@@ -2572,7 +2589,9 @@ int dvb_frontend_resume(struct dvb_frontend *fe)
2572 if (fe->ops.init) 2589 if (fe->ops.init)
2573 ret = fe->ops.init(fe); 2590 ret = fe->ops.init(fe);
2574 2591
2575 if (fe->ops.tuner_ops.init) 2592 if (fe->ops.tuner_ops.resume)
2593 ret = fe->ops.tuner_ops.resume(fe);
2594 else if (fe->ops.tuner_ops.init)
2576 ret = fe->ops.tuner_ops.init(fe); 2595 ret = fe->ops.tuner_ops.init(fe);
2577 2596
2578 fe->exit = DVB_FE_NO_EXIT; 2597 fe->exit = DVB_FE_NO_EXIT;
diff --git a/drivers/media/dvb-core/dvb_frontend.h b/drivers/media/dvb-core/dvb_frontend.h
index d398de4b6ef4..816269e5f706 100644
--- a/drivers/media/dvb-core/dvb_frontend.h
+++ b/drivers/media/dvb-core/dvb_frontend.h
@@ -201,6 +201,8 @@ struct dvb_tuner_ops {
201 int (*release)(struct dvb_frontend *fe); 201 int (*release)(struct dvb_frontend *fe);
202 int (*init)(struct dvb_frontend *fe); 202 int (*init)(struct dvb_frontend *fe);
203 int (*sleep)(struct dvb_frontend *fe); 203 int (*sleep)(struct dvb_frontend *fe);
204 int (*suspend)(struct dvb_frontend *fe);
205 int (*resume)(struct dvb_frontend *fe);
204 206
205 /** This is for simple PLLs - set all parameters in one go. */ 207 /** This is for simple PLLs - set all parameters in one go. */
206 int (*set_params)(struct dvb_frontend *fe); 208 int (*set_params)(struct dvb_frontend *fe);
diff --git a/drivers/media/dvb-core/dvb_ringbuffer.c b/drivers/media/dvb-core/dvb_ringbuffer.c
index a5712cd7c65f..1100e98a7b1d 100644
--- a/drivers/media/dvb-core/dvb_ringbuffer.c
+++ b/drivers/media/dvb-core/dvb_ringbuffer.c
@@ -166,6 +166,31 @@ ssize_t dvb_ringbuffer_write(struct dvb_ringbuffer *rbuf, const u8 *buf, size_t
166 return len; 166 return len;
167} 167}
168 168
169ssize_t dvb_ringbuffer_write_user(struct dvb_ringbuffer *rbuf,
170 const u8 __user *buf, size_t len)
171{
172 int status;
173 size_t todo = len;
174 size_t split;
175
176 split = (rbuf->pwrite + len > rbuf->size) ? rbuf->size - rbuf->pwrite : 0;
177
178 if (split > 0) {
179 status = copy_from_user(rbuf->data+rbuf->pwrite, buf, split);
180 if (status)
181 return len - todo;
182 buf += split;
183 todo -= split;
184 rbuf->pwrite = 0;
185 }
186 status = copy_from_user(rbuf->data+rbuf->pwrite, buf, todo);
187 if (status)
188 return len - todo;
189 rbuf->pwrite = (rbuf->pwrite + todo) % rbuf->size;
190
191 return len;
192}
193
169ssize_t dvb_ringbuffer_pkt_write(struct dvb_ringbuffer *rbuf, u8* buf, size_t len) 194ssize_t dvb_ringbuffer_pkt_write(struct dvb_ringbuffer *rbuf, u8* buf, size_t len)
170{ 195{
171 int status; 196 int status;
@@ -297,3 +322,4 @@ EXPORT_SYMBOL(dvb_ringbuffer_flush_spinlock_wakeup);
297EXPORT_SYMBOL(dvb_ringbuffer_read_user); 322EXPORT_SYMBOL(dvb_ringbuffer_read_user);
298EXPORT_SYMBOL(dvb_ringbuffer_read); 323EXPORT_SYMBOL(dvb_ringbuffer_read);
299EXPORT_SYMBOL(dvb_ringbuffer_write); 324EXPORT_SYMBOL(dvb_ringbuffer_write);
325EXPORT_SYMBOL(dvb_ringbuffer_write_user);
diff --git a/drivers/media/dvb-core/dvb_ringbuffer.h b/drivers/media/dvb-core/dvb_ringbuffer.h
index 41f04dae69b6..9e1e11b7c39c 100644
--- a/drivers/media/dvb-core/dvb_ringbuffer.h
+++ b/drivers/media/dvb-core/dvb_ringbuffer.h
@@ -133,6 +133,8 @@ extern void dvb_ringbuffer_read(struct dvb_ringbuffer *rbuf,
133*/ 133*/
134extern ssize_t dvb_ringbuffer_write(struct dvb_ringbuffer *rbuf, const u8 *buf, 134extern ssize_t dvb_ringbuffer_write(struct dvb_ringbuffer *rbuf, const u8 *buf,
135 size_t len); 135 size_t len);
136extern ssize_t dvb_ringbuffer_write_user(struct dvb_ringbuffer *rbuf,
137 const u8 __user *buf, size_t len);
136 138
137 139
138/** 140/**
diff --git a/drivers/media/dvb-frontends/Kconfig b/drivers/media/dvb-frontends/Kconfig
index fe0ddcca192c..5a134547e325 100644
--- a/drivers/media/dvb-frontends/Kconfig
+++ b/drivers/media/dvb-frontends/Kconfig
@@ -471,6 +471,11 @@ config DVB_SI2168
471 help 471 help
472 Say Y when you want to support this frontend. 472 Say Y when you want to support this frontend.
473 473
474config DVB_AS102_FE
475 tristate
476 depends on DVB_CORE
477 default DVB_AS102
478
474comment "DVB-C (cable) frontends" 479comment "DVB-C (cable) frontends"
475 depends on DVB_CORE 480 depends on DVB_CORE
476 481
@@ -643,6 +648,14 @@ config DVB_MB86A20S
643 A driver for Fujitsu mb86a20s ISDB-T/ISDB-Tsb demodulator. 648 A driver for Fujitsu mb86a20s ISDB-T/ISDB-Tsb demodulator.
644 Say Y when you want to support this frontend. 649 Say Y when you want to support this frontend.
645 650
651config DVB_TC90522
652 tristate "Toshiba TC90522"
653 depends on DVB_CORE && I2C
654 default m if !MEDIA_SUBDRV_AUTOSELECT
655 help
656 A Toshiba TC90522 2xISDB-T + 2xISDB-S demodulator.
657 Say Y when you want to support this frontend.
658
646comment "Digital terrestrial only tuners/PLL" 659comment "Digital terrestrial only tuners/PLL"
647 depends on DVB_CORE 660 depends on DVB_CORE
648 661
@@ -720,6 +733,13 @@ config DVB_A8293
720 depends on DVB_CORE && I2C 733 depends on DVB_CORE && I2C
721 default m if !MEDIA_SUBDRV_AUTOSELECT 734 default m if !MEDIA_SUBDRV_AUTOSELECT
722 735
736config DVB_SP2
737 tristate "CIMaX SP2"
738 depends on DVB_CORE && I2C
739 default m if !MEDIA_SUBDRV_AUTOSELECT
740 help
741 CIMaX SP2/SP2HF Common Interface module.
742
723config DVB_LGS8GL5 743config DVB_LGS8GL5
724 tristate "Silicon Legend LGS-8GL5 demodulator (OFDM)" 744 tristate "Silicon Legend LGS-8GL5 demodulator (OFDM)"
725 depends on DVB_CORE && I2C 745 depends on DVB_CORE && I2C
diff --git a/drivers/media/dvb-frontends/Makefile b/drivers/media/dvb-frontends/Makefile
index edf103d45920..ba59df63d050 100644
--- a/drivers/media/dvb-frontends/Makefile
+++ b/drivers/media/dvb-frontends/Makefile
@@ -107,10 +107,12 @@ obj-$(CONFIG_DVB_DRXK) += drxk.o
107obj-$(CONFIG_DVB_TDA18271C2DD) += tda18271c2dd.o 107obj-$(CONFIG_DVB_TDA18271C2DD) += tda18271c2dd.o
108obj-$(CONFIG_DVB_SI2165) += si2165.o 108obj-$(CONFIG_DVB_SI2165) += si2165.o
109obj-$(CONFIG_DVB_A8293) += a8293.o 109obj-$(CONFIG_DVB_A8293) += a8293.o
110obj-$(CONFIG_DVB_SP2) += sp2.o
110obj-$(CONFIG_DVB_TDA10071) += tda10071.o 111obj-$(CONFIG_DVB_TDA10071) += tda10071.o
111obj-$(CONFIG_DVB_RTL2830) += rtl2830.o 112obj-$(CONFIG_DVB_RTL2830) += rtl2830.o
112obj-$(CONFIG_DVB_RTL2832) += rtl2832.o 113obj-$(CONFIG_DVB_RTL2832) += rtl2832.o
113obj-$(CONFIG_DVB_RTL2832_SDR) += rtl2832_sdr.o 114obj-$(CONFIG_DVB_RTL2832_SDR) += rtl2832_sdr.o
114obj-$(CONFIG_DVB_M88RS2000) += m88rs2000.o 115obj-$(CONFIG_DVB_M88RS2000) += m88rs2000.o
115obj-$(CONFIG_DVB_AF9033) += af9033.o 116obj-$(CONFIG_DVB_AF9033) += af9033.o
116 117obj-$(CONFIG_DVB_AS102_FE) += as102_fe.o
118obj-$(CONFIG_DVB_TC90522) += tc90522.o
diff --git a/drivers/media/dvb-frontends/af9013.c b/drivers/media/dvb-frontends/af9013.c
index ecf6388d2200..8001690d7576 100644
--- a/drivers/media/dvb-frontends/af9013.c
+++ b/drivers/media/dvb-frontends/af9013.c
@@ -683,7 +683,7 @@ static int af9013_set_frontend(struct dvb_frontend *fe)
683 683
684 switch (c->transmission_mode) { 684 switch (c->transmission_mode) {
685 case TRANSMISSION_MODE_AUTO: 685 case TRANSMISSION_MODE_AUTO:
686 auto_mode = 1; 686 auto_mode = true;
687 break; 687 break;
688 case TRANSMISSION_MODE_2K: 688 case TRANSMISSION_MODE_2K:
689 break; 689 break;
@@ -693,12 +693,12 @@ static int af9013_set_frontend(struct dvb_frontend *fe)
693 default: 693 default:
694 dev_dbg(&state->i2c->dev, "%s: invalid transmission_mode\n", 694 dev_dbg(&state->i2c->dev, "%s: invalid transmission_mode\n",
695 __func__); 695 __func__);
696 auto_mode = 1; 696 auto_mode = true;
697 } 697 }
698 698
699 switch (c->guard_interval) { 699 switch (c->guard_interval) {
700 case GUARD_INTERVAL_AUTO: 700 case GUARD_INTERVAL_AUTO:
701 auto_mode = 1; 701 auto_mode = true;
702 break; 702 break;
703 case GUARD_INTERVAL_1_32: 703 case GUARD_INTERVAL_1_32:
704 break; 704 break;
@@ -714,12 +714,12 @@ static int af9013_set_frontend(struct dvb_frontend *fe)
714 default: 714 default:
715 dev_dbg(&state->i2c->dev, "%s: invalid guard_interval\n", 715 dev_dbg(&state->i2c->dev, "%s: invalid guard_interval\n",
716 __func__); 716 __func__);
717 auto_mode = 1; 717 auto_mode = true;
718 } 718 }
719 719
720 switch (c->hierarchy) { 720 switch (c->hierarchy) {
721 case HIERARCHY_AUTO: 721 case HIERARCHY_AUTO:
722 auto_mode = 1; 722 auto_mode = true;
723 break; 723 break;
724 case HIERARCHY_NONE: 724 case HIERARCHY_NONE:
725 break; 725 break;
@@ -734,12 +734,12 @@ static int af9013_set_frontend(struct dvb_frontend *fe)
734 break; 734 break;
735 default: 735 default:
736 dev_dbg(&state->i2c->dev, "%s: invalid hierarchy\n", __func__); 736 dev_dbg(&state->i2c->dev, "%s: invalid hierarchy\n", __func__);
737 auto_mode = 1; 737 auto_mode = true;
738 } 738 }
739 739
740 switch (c->modulation) { 740 switch (c->modulation) {
741 case QAM_AUTO: 741 case QAM_AUTO:
742 auto_mode = 1; 742 auto_mode = true;
743 break; 743 break;
744 case QPSK: 744 case QPSK:
745 break; 745 break;
@@ -751,7 +751,7 @@ static int af9013_set_frontend(struct dvb_frontend *fe)
751 break; 751 break;
752 default: 752 default:
753 dev_dbg(&state->i2c->dev, "%s: invalid modulation\n", __func__); 753 dev_dbg(&state->i2c->dev, "%s: invalid modulation\n", __func__);
754 auto_mode = 1; 754 auto_mode = true;
755 } 755 }
756 756
757 /* Use HP. How and which case we can switch to LP? */ 757 /* Use HP. How and which case we can switch to LP? */
@@ -759,7 +759,7 @@ static int af9013_set_frontend(struct dvb_frontend *fe)
759 759
760 switch (c->code_rate_HP) { 760 switch (c->code_rate_HP) {
761 case FEC_AUTO: 761 case FEC_AUTO:
762 auto_mode = 1; 762 auto_mode = true;
763 break; 763 break;
764 case FEC_1_2: 764 case FEC_1_2:
765 break; 765 break;
@@ -778,12 +778,12 @@ static int af9013_set_frontend(struct dvb_frontend *fe)
778 default: 778 default:
779 dev_dbg(&state->i2c->dev, "%s: invalid code_rate_HP\n", 779 dev_dbg(&state->i2c->dev, "%s: invalid code_rate_HP\n",
780 __func__); 780 __func__);
781 auto_mode = 1; 781 auto_mode = true;
782 } 782 }
783 783
784 switch (c->code_rate_LP) { 784 switch (c->code_rate_LP) {
785 case FEC_AUTO: 785 case FEC_AUTO:
786 auto_mode = 1; 786 auto_mode = true;
787 break; 787 break;
788 case FEC_1_2: 788 case FEC_1_2:
789 break; 789 break;
@@ -804,7 +804,7 @@ static int af9013_set_frontend(struct dvb_frontend *fe)
804 default: 804 default:
805 dev_dbg(&state->i2c->dev, "%s: invalid code_rate_LP\n", 805 dev_dbg(&state->i2c->dev, "%s: invalid code_rate_LP\n",
806 __func__); 806 __func__);
807 auto_mode = 1; 807 auto_mode = true;
808 } 808 }
809 809
810 switch (c->bandwidth_hz) { 810 switch (c->bandwidth_hz) {
diff --git a/drivers/media/dvb-frontends/af9033.c b/drivers/media/dvb-frontends/af9033.c
index 5c90ea683a7e..63a89c1c59ff 100644
--- a/drivers/media/dvb-frontends/af9033.c
+++ b/drivers/media/dvb-frontends/af9033.c
@@ -24,29 +24,35 @@
24/* Max transfer size done by I2C transfer functions */ 24/* Max transfer size done by I2C transfer functions */
25#define MAX_XFER_SIZE 64 25#define MAX_XFER_SIZE 64
26 26
27struct af9033_state { 27struct af9033_dev {
28 struct i2c_adapter *i2c; 28 struct i2c_client *client;
29 struct dvb_frontend fe; 29 struct dvb_frontend fe;
30 struct af9033_config cfg; 30 struct af9033_config cfg;
31 bool is_af9035;
32 bool is_it9135;
31 33
32 u32 bandwidth_hz; 34 u32 bandwidth_hz;
33 bool ts_mode_parallel; 35 bool ts_mode_parallel;
34 bool ts_mode_serial; 36 bool ts_mode_serial;
35 37
36 u32 ber; 38 fe_status_t fe_status;
37 u32 ucb; 39 u64 post_bit_error_prev; /* for old read_ber we return (curr - prev) */
38 unsigned long last_stat_check; 40 u64 post_bit_error;
41 u64 post_bit_count;
42 u64 error_block_count;
43 u64 total_block_count;
44 struct delayed_work stat_work;
39}; 45};
40 46
41/* write multiple registers */ 47/* write multiple registers */
42static int af9033_wr_regs(struct af9033_state *state, u32 reg, const u8 *val, 48static int af9033_wr_regs(struct af9033_dev *dev, u32 reg, const u8 *val,
43 int len) 49 int len)
44{ 50{
45 int ret; 51 int ret;
46 u8 buf[MAX_XFER_SIZE]; 52 u8 buf[MAX_XFER_SIZE];
47 struct i2c_msg msg[1] = { 53 struct i2c_msg msg[1] = {
48 { 54 {
49 .addr = state->cfg.i2c_addr, 55 .addr = dev->client->addr,
50 .flags = 0, 56 .flags = 0,
51 .len = 3 + len, 57 .len = 3 + len,
52 .buf = buf, 58 .buf = buf,
@@ -54,9 +60,9 @@ static int af9033_wr_regs(struct af9033_state *state, u32 reg, const u8 *val,
54 }; 60 };
55 61
56 if (3 + len > sizeof(buf)) { 62 if (3 + len > sizeof(buf)) {
57 dev_warn(&state->i2c->dev, 63 dev_warn(&dev->client->dev,
58 "%s: i2c wr reg=%04x: len=%d is too big!\n", 64 "i2c wr reg=%04x: len=%d is too big!\n",
59 KBUILD_MODNAME, reg, len); 65 reg, len);
60 return -EINVAL; 66 return -EINVAL;
61 } 67 }
62 68
@@ -65,12 +71,12 @@ static int af9033_wr_regs(struct af9033_state *state, u32 reg, const u8 *val,
65 buf[2] = (reg >> 0) & 0xff; 71 buf[2] = (reg >> 0) & 0xff;
66 memcpy(&buf[3], val, len); 72 memcpy(&buf[3], val, len);
67 73
68 ret = i2c_transfer(state->i2c, msg, 1); 74 ret = i2c_transfer(dev->client->adapter, msg, 1);
69 if (ret == 1) { 75 if (ret == 1) {
70 ret = 0; 76 ret = 0;
71 } else { 77 } else {
72 dev_warn(&state->i2c->dev, "%s: i2c wr failed=%d reg=%06x " \ 78 dev_warn(&dev->client->dev, "i2c wr failed=%d reg=%06x len=%d\n",
73 "len=%d\n", KBUILD_MODNAME, ret, reg, len); 79 ret, reg, len);
74 ret = -EREMOTEIO; 80 ret = -EREMOTEIO;
75 } 81 }
76 82
@@ -78,31 +84,31 @@ static int af9033_wr_regs(struct af9033_state *state, u32 reg, const u8 *val,
78} 84}
79 85
80/* read multiple registers */ 86/* read multiple registers */
81static int af9033_rd_regs(struct af9033_state *state, u32 reg, u8 *val, int len) 87static int af9033_rd_regs(struct af9033_dev *dev, u32 reg, u8 *val, int len)
82{ 88{
83 int ret; 89 int ret;
84 u8 buf[3] = { (reg >> 16) & 0xff, (reg >> 8) & 0xff, 90 u8 buf[3] = { (reg >> 16) & 0xff, (reg >> 8) & 0xff,
85 (reg >> 0) & 0xff }; 91 (reg >> 0) & 0xff };
86 struct i2c_msg msg[2] = { 92 struct i2c_msg msg[2] = {
87 { 93 {
88 .addr = state->cfg.i2c_addr, 94 .addr = dev->client->addr,
89 .flags = 0, 95 .flags = 0,
90 .len = sizeof(buf), 96 .len = sizeof(buf),
91 .buf = buf 97 .buf = buf
92 }, { 98 }, {
93 .addr = state->cfg.i2c_addr, 99 .addr = dev->client->addr,
94 .flags = I2C_M_RD, 100 .flags = I2C_M_RD,
95 .len = len, 101 .len = len,
96 .buf = val 102 .buf = val
97 } 103 }
98 }; 104 };
99 105
100 ret = i2c_transfer(state->i2c, msg, 2); 106 ret = i2c_transfer(dev->client->adapter, msg, 2);
101 if (ret == 2) { 107 if (ret == 2) {
102 ret = 0; 108 ret = 0;
103 } else { 109 } else {
104 dev_warn(&state->i2c->dev, "%s: i2c rd failed=%d reg=%06x " \ 110 dev_warn(&dev->client->dev, "i2c rd failed=%d reg=%06x len=%d\n",
105 "len=%d\n", KBUILD_MODNAME, ret, reg, len); 111 ret, reg, len);
106 ret = -EREMOTEIO; 112 ret = -EREMOTEIO;
107 } 113 }
108 114
@@ -111,19 +117,19 @@ static int af9033_rd_regs(struct af9033_state *state, u32 reg, u8 *val, int len)
111 117
112 118
113/* write single register */ 119/* write single register */
114static int af9033_wr_reg(struct af9033_state *state, u32 reg, u8 val) 120static int af9033_wr_reg(struct af9033_dev *dev, u32 reg, u8 val)
115{ 121{
116 return af9033_wr_regs(state, reg, &val, 1); 122 return af9033_wr_regs(dev, reg, &val, 1);
117} 123}
118 124
119/* read single register */ 125/* read single register */
120static int af9033_rd_reg(struct af9033_state *state, u32 reg, u8 *val) 126static int af9033_rd_reg(struct af9033_dev *dev, u32 reg, u8 *val)
121{ 127{
122 return af9033_rd_regs(state, reg, val, 1); 128 return af9033_rd_regs(dev, reg, val, 1);
123} 129}
124 130
125/* write single register with mask */ 131/* write single register with mask */
126static int af9033_wr_reg_mask(struct af9033_state *state, u32 reg, u8 val, 132static int af9033_wr_reg_mask(struct af9033_dev *dev, u32 reg, u8 val,
127 u8 mask) 133 u8 mask)
128{ 134{
129 int ret; 135 int ret;
@@ -131,7 +137,7 @@ static int af9033_wr_reg_mask(struct af9033_state *state, u32 reg, u8 val,
131 137
132 /* no need for read if whole reg is written */ 138 /* no need for read if whole reg is written */
133 if (mask != 0xff) { 139 if (mask != 0xff) {
134 ret = af9033_rd_regs(state, reg, &tmp, 1); 140 ret = af9033_rd_regs(dev, reg, &tmp, 1);
135 if (ret) 141 if (ret)
136 return ret; 142 return ret;
137 143
@@ -140,17 +146,17 @@ static int af9033_wr_reg_mask(struct af9033_state *state, u32 reg, u8 val,
140 val |= tmp; 146 val |= tmp;
141 } 147 }
142 148
143 return af9033_wr_regs(state, reg, &val, 1); 149 return af9033_wr_regs(dev, reg, &val, 1);
144} 150}
145 151
146/* read single register with mask */ 152/* read single register with mask */
147static int af9033_rd_reg_mask(struct af9033_state *state, u32 reg, u8 *val, 153static int af9033_rd_reg_mask(struct af9033_dev *dev, u32 reg, u8 *val,
148 u8 mask) 154 u8 mask)
149{ 155{
150 int ret, i; 156 int ret, i;
151 u8 tmp; 157 u8 tmp;
152 158
153 ret = af9033_rd_regs(state, reg, &tmp, 1); 159 ret = af9033_rd_regs(dev, reg, &tmp, 1);
154 if (ret) 160 if (ret)
155 return ret; 161 return ret;
156 162
@@ -167,18 +173,17 @@ static int af9033_rd_reg_mask(struct af9033_state *state, u32 reg, u8 *val,
167} 173}
168 174
169/* write reg val table using reg addr auto increment */ 175/* write reg val table using reg addr auto increment */
170static int af9033_wr_reg_val_tab(struct af9033_state *state, 176static int af9033_wr_reg_val_tab(struct af9033_dev *dev,
171 const struct reg_val *tab, int tab_len) 177 const struct reg_val *tab, int tab_len)
172{ 178{
173#define MAX_TAB_LEN 212 179#define MAX_TAB_LEN 212
174 int ret, i, j; 180 int ret, i, j;
175 u8 buf[1 + MAX_TAB_LEN]; 181 u8 buf[1 + MAX_TAB_LEN];
176 182
177 dev_dbg(&state->i2c->dev, "%s: tab_len=%d\n", __func__, tab_len); 183 dev_dbg(&dev->client->dev, "tab_len=%d\n", tab_len);
178 184
179 if (tab_len > sizeof(buf)) { 185 if (tab_len > sizeof(buf)) {
180 dev_warn(&state->i2c->dev, "%s: tab len %d is too big\n", 186 dev_warn(&dev->client->dev, "tab len %d is too big\n", tab_len);
181 KBUILD_MODNAME, tab_len);
182 return -EINVAL; 187 return -EINVAL;
183 } 188 }
184 189
@@ -186,7 +191,7 @@ static int af9033_wr_reg_val_tab(struct af9033_state *state,
186 buf[j] = tab[i].val; 191 buf[j] = tab[i].val;
187 192
188 if (i == tab_len - 1 || tab[i].reg != tab[i + 1].reg - 1) { 193 if (i == tab_len - 1 || tab[i].reg != tab[i + 1].reg - 1) {
189 ret = af9033_wr_regs(state, tab[i].reg - j, buf, j + 1); 194 ret = af9033_wr_regs(dev, tab[i].reg - j, buf, j + 1);
190 if (ret < 0) 195 if (ret < 0)
191 goto err; 196 goto err;
192 197
@@ -199,16 +204,16 @@ static int af9033_wr_reg_val_tab(struct af9033_state *state,
199 return 0; 204 return 0;
200 205
201err: 206err:
202 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret); 207 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
203 208
204 return ret; 209 return ret;
205} 210}
206 211
207static u32 af9033_div(struct af9033_state *state, u32 a, u32 b, u32 x) 212static u32 af9033_div(struct af9033_dev *dev, u32 a, u32 b, u32 x)
208{ 213{
209 u32 r = 0, c = 0, i; 214 u32 r = 0, c = 0, i;
210 215
211 dev_dbg(&state->i2c->dev, "%s: a=%d b=%d x=%d\n", __func__, a, b, x); 216 dev_dbg(&dev->client->dev, "a=%d b=%d x=%d\n", a, b, x);
212 217
213 if (a > b) { 218 if (a > b) {
214 c = a / b; 219 c = a / b;
@@ -225,22 +230,15 @@ static u32 af9033_div(struct af9033_state *state, u32 a, u32 b, u32 x)
225 } 230 }
226 r = (c << (u32)x) + r; 231 r = (c << (u32)x) + r;
227 232
228 dev_dbg(&state->i2c->dev, "%s: a=%d b=%d x=%d r=%d r=%x\n", 233 dev_dbg(&dev->client->dev, "a=%d b=%d x=%d r=%d r=%x\n", a, b, x, r, r);
229 __func__, a, b, x, r, r);
230 234
231 return r; 235 return r;
232} 236}
233 237
234static void af9033_release(struct dvb_frontend *fe)
235{
236 struct af9033_state *state = fe->demodulator_priv;
237
238 kfree(state);
239}
240
241static int af9033_init(struct dvb_frontend *fe) 238static int af9033_init(struct dvb_frontend *fe)
242{ 239{
243 struct af9033_state *state = fe->demodulator_priv; 240 struct af9033_dev *dev = fe->demodulator_priv;
241 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
244 int ret, i, len; 242 int ret, i, len;
245 const struct reg_val *init; 243 const struct reg_val *init;
246 u8 buf[4]; 244 u8 buf[4];
@@ -248,7 +246,7 @@ static int af9033_init(struct dvb_frontend *fe)
248 struct reg_val_mask tab[] = { 246 struct reg_val_mask tab[] = {
249 { 0x80fb24, 0x00, 0x08 }, 247 { 0x80fb24, 0x00, 0x08 },
250 { 0x80004c, 0x00, 0xff }, 248 { 0x80004c, 0x00, 0xff },
251 { 0x00f641, state->cfg.tuner, 0xff }, 249 { 0x00f641, dev->cfg.tuner, 0xff },
252 { 0x80f5ca, 0x01, 0x01 }, 250 { 0x80f5ca, 0x01, 0x01 },
253 { 0x80f715, 0x01, 0x01 }, 251 { 0x80f715, 0x01, 0x01 },
254 { 0x00f41f, 0x04, 0x04 }, 252 { 0x00f41f, 0x04, 0x04 },
@@ -267,88 +265,82 @@ static int af9033_init(struct dvb_frontend *fe)
267 { 0x00d830, 0x01, 0xff }, 265 { 0x00d830, 0x01, 0xff },
268 { 0x00d831, 0x00, 0xff }, 266 { 0x00d831, 0x00, 0xff },
269 { 0x00d832, 0x00, 0xff }, 267 { 0x00d832, 0x00, 0xff },
270 { 0x80f985, state->ts_mode_serial, 0x01 }, 268 { 0x80f985, dev->ts_mode_serial, 0x01 },
271 { 0x80f986, state->ts_mode_parallel, 0x01 }, 269 { 0x80f986, dev->ts_mode_parallel, 0x01 },
272 { 0x00d827, 0x00, 0xff }, 270 { 0x00d827, 0x00, 0xff },
273 { 0x00d829, 0x00, 0xff }, 271 { 0x00d829, 0x00, 0xff },
274 { 0x800045, state->cfg.adc_multiplier, 0xff }, 272 { 0x800045, dev->cfg.adc_multiplier, 0xff },
275 }; 273 };
276 274
277 /* program clock control */ 275 /* program clock control */
278 clock_cw = af9033_div(state, state->cfg.clock, 1000000ul, 19ul); 276 clock_cw = af9033_div(dev, dev->cfg.clock, 1000000ul, 19ul);
279 buf[0] = (clock_cw >> 0) & 0xff; 277 buf[0] = (clock_cw >> 0) & 0xff;
280 buf[1] = (clock_cw >> 8) & 0xff; 278 buf[1] = (clock_cw >> 8) & 0xff;
281 buf[2] = (clock_cw >> 16) & 0xff; 279 buf[2] = (clock_cw >> 16) & 0xff;
282 buf[3] = (clock_cw >> 24) & 0xff; 280 buf[3] = (clock_cw >> 24) & 0xff;
283 281
284 dev_dbg(&state->i2c->dev, "%s: clock=%d clock_cw=%08x\n", 282 dev_dbg(&dev->client->dev, "clock=%d clock_cw=%08x\n",
285 __func__, state->cfg.clock, clock_cw); 283 dev->cfg.clock, clock_cw);
286 284
287 ret = af9033_wr_regs(state, 0x800025, buf, 4); 285 ret = af9033_wr_regs(dev, 0x800025, buf, 4);
288 if (ret < 0) 286 if (ret < 0)
289 goto err; 287 goto err;
290 288
291 /* program ADC control */ 289 /* program ADC control */
292 for (i = 0; i < ARRAY_SIZE(clock_adc_lut); i++) { 290 for (i = 0; i < ARRAY_SIZE(clock_adc_lut); i++) {
293 if (clock_adc_lut[i].clock == state->cfg.clock) 291 if (clock_adc_lut[i].clock == dev->cfg.clock)
294 break; 292 break;
295 } 293 }
296 294
297 adc_cw = af9033_div(state, clock_adc_lut[i].adc, 1000000ul, 19ul); 295 adc_cw = af9033_div(dev, clock_adc_lut[i].adc, 1000000ul, 19ul);
298 buf[0] = (adc_cw >> 0) & 0xff; 296 buf[0] = (adc_cw >> 0) & 0xff;
299 buf[1] = (adc_cw >> 8) & 0xff; 297 buf[1] = (adc_cw >> 8) & 0xff;
300 buf[2] = (adc_cw >> 16) & 0xff; 298 buf[2] = (adc_cw >> 16) & 0xff;
301 299
302 dev_dbg(&state->i2c->dev, "%s: adc=%d adc_cw=%06x\n", 300 dev_dbg(&dev->client->dev, "adc=%d adc_cw=%06x\n",
303 __func__, clock_adc_lut[i].adc, adc_cw); 301 clock_adc_lut[i].adc, adc_cw);
304 302
305 ret = af9033_wr_regs(state, 0x80f1cd, buf, 3); 303 ret = af9033_wr_regs(dev, 0x80f1cd, buf, 3);
306 if (ret < 0) 304 if (ret < 0)
307 goto err; 305 goto err;
308 306
309 /* program register table */ 307 /* program register table */
310 for (i = 0; i < ARRAY_SIZE(tab); i++) { 308 for (i = 0; i < ARRAY_SIZE(tab); i++) {
311 ret = af9033_wr_reg_mask(state, tab[i].reg, tab[i].val, 309 ret = af9033_wr_reg_mask(dev, tab[i].reg, tab[i].val,
312 tab[i].mask); 310 tab[i].mask);
313 if (ret < 0) 311 if (ret < 0)
314 goto err; 312 goto err;
315 } 313 }
316 314
317 /* feed clock to RF tuner */ 315 /* clock output */
318 switch (state->cfg.tuner) { 316 if (dev->cfg.dyn0_clk) {
319 case AF9033_TUNER_IT9135_38: 317 ret = af9033_wr_reg(dev, 0x80fba8, 0x00);
320 case AF9033_TUNER_IT9135_51:
321 case AF9033_TUNER_IT9135_52:
322 case AF9033_TUNER_IT9135_60:
323 case AF9033_TUNER_IT9135_61:
324 case AF9033_TUNER_IT9135_62:
325 ret = af9033_wr_reg(state, 0x80fba8, 0x00);
326 if (ret < 0) 318 if (ret < 0)
327 goto err; 319 goto err;
328 } 320 }
329 321
330 /* settings for TS interface */ 322 /* settings for TS interface */
331 if (state->cfg.ts_mode == AF9033_TS_MODE_USB) { 323 if (dev->cfg.ts_mode == AF9033_TS_MODE_USB) {
332 ret = af9033_wr_reg_mask(state, 0x80f9a5, 0x00, 0x01); 324 ret = af9033_wr_reg_mask(dev, 0x80f9a5, 0x00, 0x01);
333 if (ret < 0) 325 if (ret < 0)
334 goto err; 326 goto err;
335 327
336 ret = af9033_wr_reg_mask(state, 0x80f9b5, 0x01, 0x01); 328 ret = af9033_wr_reg_mask(dev, 0x80f9b5, 0x01, 0x01);
337 if (ret < 0) 329 if (ret < 0)
338 goto err; 330 goto err;
339 } else { 331 } else {
340 ret = af9033_wr_reg_mask(state, 0x80f990, 0x00, 0x01); 332 ret = af9033_wr_reg_mask(dev, 0x80f990, 0x00, 0x01);
341 if (ret < 0) 333 if (ret < 0)
342 goto err; 334 goto err;
343 335
344 ret = af9033_wr_reg_mask(state, 0x80f9b5, 0x00, 0x01); 336 ret = af9033_wr_reg_mask(dev, 0x80f9b5, 0x00, 0x01);
345 if (ret < 0) 337 if (ret < 0)
346 goto err; 338 goto err;
347 } 339 }
348 340
349 /* load OFSM settings */ 341 /* load OFSM settings */
350 dev_dbg(&state->i2c->dev, "%s: load ofsm settings\n", __func__); 342 dev_dbg(&dev->client->dev, "load ofsm settings\n");
351 switch (state->cfg.tuner) { 343 switch (dev->cfg.tuner) {
352 case AF9033_TUNER_IT9135_38: 344 case AF9033_TUNER_IT9135_38:
353 case AF9033_TUNER_IT9135_51: 345 case AF9033_TUNER_IT9135_51:
354 case AF9033_TUNER_IT9135_52: 346 case AF9033_TUNER_IT9135_52:
@@ -367,14 +359,13 @@ static int af9033_init(struct dvb_frontend *fe)
367 break; 359 break;
368 } 360 }
369 361
370 ret = af9033_wr_reg_val_tab(state, init, len); 362 ret = af9033_wr_reg_val_tab(dev, init, len);
371 if (ret < 0) 363 if (ret < 0)
372 goto err; 364 goto err;
373 365
374 /* load tuner specific settings */ 366 /* load tuner specific settings */
375 dev_dbg(&state->i2c->dev, "%s: load tuner specific settings\n", 367 dev_dbg(&dev->client->dev, "load tuner specific settings\n");
376 __func__); 368 switch (dev->cfg.tuner) {
377 switch (state->cfg.tuner) {
378 case AF9033_TUNER_TUA9001: 369 case AF9033_TUNER_TUA9001:
379 len = ARRAY_SIZE(tuner_init_tua9001); 370 len = ARRAY_SIZE(tuner_init_tua9001);
380 init = tuner_init_tua9001; 371 init = tuner_init_tua9001;
@@ -424,90 +415,108 @@ static int af9033_init(struct dvb_frontend *fe)
424 init = tuner_init_it9135_62; 415 init = tuner_init_it9135_62;
425 break; 416 break;
426 default: 417 default:
427 dev_dbg(&state->i2c->dev, "%s: unsupported tuner ID=%d\n", 418 dev_dbg(&dev->client->dev, "unsupported tuner ID=%d\n",
428 __func__, state->cfg.tuner); 419 dev->cfg.tuner);
429 ret = -ENODEV; 420 ret = -ENODEV;
430 goto err; 421 goto err;
431 } 422 }
432 423
433 ret = af9033_wr_reg_val_tab(state, init, len); 424 ret = af9033_wr_reg_val_tab(dev, init, len);
434 if (ret < 0) 425 if (ret < 0)
435 goto err; 426 goto err;
436 427
437 if (state->cfg.ts_mode == AF9033_TS_MODE_SERIAL) { 428 if (dev->cfg.ts_mode == AF9033_TS_MODE_SERIAL) {
438 ret = af9033_wr_reg_mask(state, 0x00d91c, 0x01, 0x01); 429 ret = af9033_wr_reg_mask(dev, 0x00d91c, 0x01, 0x01);
439 if (ret < 0) 430 if (ret < 0)
440 goto err; 431 goto err;
441 432
442 ret = af9033_wr_reg_mask(state, 0x00d917, 0x00, 0x01); 433 ret = af9033_wr_reg_mask(dev, 0x00d917, 0x00, 0x01);
443 if (ret < 0) 434 if (ret < 0)
444 goto err; 435 goto err;
445 436
446 ret = af9033_wr_reg_mask(state, 0x00d916, 0x00, 0x01); 437 ret = af9033_wr_reg_mask(dev, 0x00d916, 0x00, 0x01);
447 if (ret < 0) 438 if (ret < 0)
448 goto err; 439 goto err;
449 } 440 }
450 441
451 switch (state->cfg.tuner) { 442 switch (dev->cfg.tuner) {
452 case AF9033_TUNER_IT9135_60: 443 case AF9033_TUNER_IT9135_60:
453 case AF9033_TUNER_IT9135_61: 444 case AF9033_TUNER_IT9135_61:
454 case AF9033_TUNER_IT9135_62: 445 case AF9033_TUNER_IT9135_62:
455 ret = af9033_wr_reg(state, 0x800000, 0x01); 446 ret = af9033_wr_reg(dev, 0x800000, 0x01);
456 if (ret < 0) 447 if (ret < 0)
457 goto err; 448 goto err;
458 } 449 }
459 450
460 state->bandwidth_hz = 0; /* force to program all parameters */ 451 dev->bandwidth_hz = 0; /* force to program all parameters */
452 /* init stats here in order signal app which stats are supported */
453 c->strength.len = 1;
454 c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
455 c->cnr.len = 1;
456 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
457 c->block_count.len = 1;
458 c->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
459 c->block_error.len = 1;
460 c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
461 c->post_bit_count.len = 1;
462 c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
463 c->post_bit_error.len = 1;
464 c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
465 /* start statistics polling */
466 schedule_delayed_work(&dev->stat_work, msecs_to_jiffies(2000));
461 467
462 return 0; 468 return 0;
463 469
464err: 470err:
465 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret); 471 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
466 472
467 return ret; 473 return ret;
468} 474}
469 475
470static int af9033_sleep(struct dvb_frontend *fe) 476static int af9033_sleep(struct dvb_frontend *fe)
471{ 477{
472 struct af9033_state *state = fe->demodulator_priv; 478 struct af9033_dev *dev = fe->demodulator_priv;
473 int ret, i; 479 int ret, i;
474 u8 tmp; 480 u8 tmp;
475 481
476 ret = af9033_wr_reg(state, 0x80004c, 1); 482 /* stop statistics polling */
483 cancel_delayed_work_sync(&dev->stat_work);
484
485 ret = af9033_wr_reg(dev, 0x80004c, 1);
477 if (ret < 0) 486 if (ret < 0)
478 goto err; 487 goto err;
479 488
480 ret = af9033_wr_reg(state, 0x800000, 0); 489 ret = af9033_wr_reg(dev, 0x800000, 0);
481 if (ret < 0) 490 if (ret < 0)
482 goto err; 491 goto err;
483 492
484 for (i = 100, tmp = 1; i && tmp; i--) { 493 for (i = 100, tmp = 1; i && tmp; i--) {
485 ret = af9033_rd_reg(state, 0x80004c, &tmp); 494 ret = af9033_rd_reg(dev, 0x80004c, &tmp);
486 if (ret < 0) 495 if (ret < 0)
487 goto err; 496 goto err;
488 497
489 usleep_range(200, 10000); 498 usleep_range(200, 10000);
490 } 499 }
491 500
492 dev_dbg(&state->i2c->dev, "%s: loop=%d\n", __func__, i); 501 dev_dbg(&dev->client->dev, "loop=%d\n", i);
493 502
494 if (i == 0) { 503 if (i == 0) {
495 ret = -ETIMEDOUT; 504 ret = -ETIMEDOUT;
496 goto err; 505 goto err;
497 } 506 }
498 507
499 ret = af9033_wr_reg_mask(state, 0x80fb24, 0x08, 0x08); 508 ret = af9033_wr_reg_mask(dev, 0x80fb24, 0x08, 0x08);
500 if (ret < 0) 509 if (ret < 0)
501 goto err; 510 goto err;
502 511
503 /* prevent current leak (?) */ 512 /* prevent current leak (?) */
504 if (state->cfg.ts_mode == AF9033_TS_MODE_SERIAL) { 513 if (dev->cfg.ts_mode == AF9033_TS_MODE_SERIAL) {
505 /* enable parallel TS */ 514 /* enable parallel TS */
506 ret = af9033_wr_reg_mask(state, 0x00d917, 0x00, 0x01); 515 ret = af9033_wr_reg_mask(dev, 0x00d917, 0x00, 0x01);
507 if (ret < 0) 516 if (ret < 0)
508 goto err; 517 goto err;
509 518
510 ret = af9033_wr_reg_mask(state, 0x00d916, 0x01, 0x01); 519 ret = af9033_wr_reg_mask(dev, 0x00d916, 0x01, 0x01);
511 if (ret < 0) 520 if (ret < 0)
512 goto err; 521 goto err;
513 } 522 }
@@ -515,7 +524,7 @@ static int af9033_sleep(struct dvb_frontend *fe)
515 return 0; 524 return 0;
516 525
517err: 526err:
518 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret); 527 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
519 528
520 return ret; 529 return ret;
521} 530}
@@ -533,14 +542,14 @@ static int af9033_get_tune_settings(struct dvb_frontend *fe,
533 542
534static int af9033_set_frontend(struct dvb_frontend *fe) 543static int af9033_set_frontend(struct dvb_frontend *fe)
535{ 544{
536 struct af9033_state *state = fe->demodulator_priv; 545 struct af9033_dev *dev = fe->demodulator_priv;
537 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 546 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
538 int ret, i, spec_inv, sampling_freq; 547 int ret, i, spec_inv, sampling_freq;
539 u8 tmp, buf[3], bandwidth_reg_val; 548 u8 tmp, buf[3], bandwidth_reg_val;
540 u32 if_frequency, freq_cw, adc_freq; 549 u32 if_frequency, freq_cw, adc_freq;
541 550
542 dev_dbg(&state->i2c->dev, "%s: frequency=%d bandwidth_hz=%d\n", 551 dev_dbg(&dev->client->dev, "frequency=%d bandwidth_hz=%d\n",
543 __func__, c->frequency, c->bandwidth_hz); 552 c->frequency, c->bandwidth_hz);
544 553
545 /* check bandwidth */ 554 /* check bandwidth */
546 switch (c->bandwidth_hz) { 555 switch (c->bandwidth_hz) {
@@ -554,8 +563,7 @@ static int af9033_set_frontend(struct dvb_frontend *fe)
554 bandwidth_reg_val = 0x02; 563 bandwidth_reg_val = 0x02;
555 break; 564 break;
556 default: 565 default:
557 dev_dbg(&state->i2c->dev, "%s: invalid bandwidth_hz\n", 566 dev_dbg(&dev->client->dev, "invalid bandwidth_hz\n");
558 __func__);
559 ret = -EINVAL; 567 ret = -EINVAL;
560 goto err; 568 goto err;
561 } 569 }
@@ -565,23 +573,23 @@ static int af9033_set_frontend(struct dvb_frontend *fe)
565 fe->ops.tuner_ops.set_params(fe); 573 fe->ops.tuner_ops.set_params(fe);
566 574
567 /* program CFOE coefficients */ 575 /* program CFOE coefficients */
568 if (c->bandwidth_hz != state->bandwidth_hz) { 576 if (c->bandwidth_hz != dev->bandwidth_hz) {
569 for (i = 0; i < ARRAY_SIZE(coeff_lut); i++) { 577 for (i = 0; i < ARRAY_SIZE(coeff_lut); i++) {
570 if (coeff_lut[i].clock == state->cfg.clock && 578 if (coeff_lut[i].clock == dev->cfg.clock &&
571 coeff_lut[i].bandwidth_hz == c->bandwidth_hz) { 579 coeff_lut[i].bandwidth_hz == c->bandwidth_hz) {
572 break; 580 break;
573 } 581 }
574 } 582 }
575 ret = af9033_wr_regs(state, 0x800001, 583 ret = af9033_wr_regs(dev, 0x800001,
576 coeff_lut[i].val, sizeof(coeff_lut[i].val)); 584 coeff_lut[i].val, sizeof(coeff_lut[i].val));
577 } 585 }
578 586
579 /* program frequency control */ 587 /* program frequency control */
580 if (c->bandwidth_hz != state->bandwidth_hz) { 588 if (c->bandwidth_hz != dev->bandwidth_hz) {
581 spec_inv = state->cfg.spec_inv ? -1 : 1; 589 spec_inv = dev->cfg.spec_inv ? -1 : 1;
582 590
583 for (i = 0; i < ARRAY_SIZE(clock_adc_lut); i++) { 591 for (i = 0; i < ARRAY_SIZE(clock_adc_lut); i++) {
584 if (clock_adc_lut[i].clock == state->cfg.clock) 592 if (clock_adc_lut[i].clock == dev->cfg.clock)
585 break; 593 break;
586 } 594 }
587 adc_freq = clock_adc_lut[i].adc; 595 adc_freq = clock_adc_lut[i].adc;
@@ -602,12 +610,12 @@ static int af9033_set_frontend(struct dvb_frontend *fe)
602 else 610 else
603 sampling_freq *= -1; 611 sampling_freq *= -1;
604 612
605 freq_cw = af9033_div(state, sampling_freq, adc_freq, 23ul); 613 freq_cw = af9033_div(dev, sampling_freq, adc_freq, 23ul);
606 614
607 if (spec_inv == -1) 615 if (spec_inv == -1)
608 freq_cw = 0x800000 - freq_cw; 616 freq_cw = 0x800000 - freq_cw;
609 617
610 if (state->cfg.adc_multiplier == AF9033_ADC_MULTIPLIER_2X) 618 if (dev->cfg.adc_multiplier == AF9033_ADC_MULTIPLIER_2X)
611 freq_cw /= 2; 619 freq_cw /= 2;
612 620
613 buf[0] = (freq_cw >> 0) & 0xff; 621 buf[0] = (freq_cw >> 0) & 0xff;
@@ -618,26 +626,26 @@ static int af9033_set_frontend(struct dvb_frontend *fe)
618 if (if_frequency == 0) 626 if (if_frequency == 0)
619 buf[2] = 0; 627 buf[2] = 0;
620 628
621 ret = af9033_wr_regs(state, 0x800029, buf, 3); 629 ret = af9033_wr_regs(dev, 0x800029, buf, 3);
622 if (ret < 0) 630 if (ret < 0)
623 goto err; 631 goto err;
624 632
625 state->bandwidth_hz = c->bandwidth_hz; 633 dev->bandwidth_hz = c->bandwidth_hz;
626 } 634 }
627 635
628 ret = af9033_wr_reg_mask(state, 0x80f904, bandwidth_reg_val, 0x03); 636 ret = af9033_wr_reg_mask(dev, 0x80f904, bandwidth_reg_val, 0x03);
629 if (ret < 0) 637 if (ret < 0)
630 goto err; 638 goto err;
631 639
632 ret = af9033_wr_reg(state, 0x800040, 0x00); 640 ret = af9033_wr_reg(dev, 0x800040, 0x00);
633 if (ret < 0) 641 if (ret < 0)
634 goto err; 642 goto err;
635 643
636 ret = af9033_wr_reg(state, 0x800047, 0x00); 644 ret = af9033_wr_reg(dev, 0x800047, 0x00);
637 if (ret < 0) 645 if (ret < 0)
638 goto err; 646 goto err;
639 647
640 ret = af9033_wr_reg_mask(state, 0x80f999, 0x00, 0x01); 648 ret = af9033_wr_reg_mask(dev, 0x80f999, 0x00, 0x01);
641 if (ret < 0) 649 if (ret < 0)
642 goto err; 650 goto err;
643 651
@@ -646,33 +654,33 @@ static int af9033_set_frontend(struct dvb_frontend *fe)
646 else 654 else
647 tmp = 0x01; /* UHF */ 655 tmp = 0x01; /* UHF */
648 656
649 ret = af9033_wr_reg(state, 0x80004b, tmp); 657 ret = af9033_wr_reg(dev, 0x80004b, tmp);
650 if (ret < 0) 658 if (ret < 0)
651 goto err; 659 goto err;
652 660
653 ret = af9033_wr_reg(state, 0x800000, 0x00); 661 ret = af9033_wr_reg(dev, 0x800000, 0x00);
654 if (ret < 0) 662 if (ret < 0)
655 goto err; 663 goto err;
656 664
657 return 0; 665 return 0;
658 666
659err: 667err:
660 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret); 668 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
661 669
662 return ret; 670 return ret;
663} 671}
664 672
665static int af9033_get_frontend(struct dvb_frontend *fe) 673static int af9033_get_frontend(struct dvb_frontend *fe)
666{ 674{
667 struct af9033_state *state = fe->demodulator_priv; 675 struct af9033_dev *dev = fe->demodulator_priv;
668 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 676 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
669 int ret; 677 int ret;
670 u8 buf[8]; 678 u8 buf[8];
671 679
672 dev_dbg(&state->i2c->dev, "%s:\n", __func__); 680 dev_dbg(&dev->client->dev, "\n");
673 681
674 /* read all needed registers */ 682 /* read all needed registers */
675 ret = af9033_rd_regs(state, 0x80f900, buf, sizeof(buf)); 683 ret = af9033_rd_regs(dev, 0x80f900, buf, sizeof(buf));
676 if (ret < 0) 684 if (ret < 0)
677 goto err; 685 goto err;
678 686
@@ -784,21 +792,21 @@ static int af9033_get_frontend(struct dvb_frontend *fe)
784 return 0; 792 return 0;
785 793
786err: 794err:
787 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret); 795 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
788 796
789 return ret; 797 return ret;
790} 798}
791 799
792static int af9033_read_status(struct dvb_frontend *fe, fe_status_t *status) 800static int af9033_read_status(struct dvb_frontend *fe, fe_status_t *status)
793{ 801{
794 struct af9033_state *state = fe->demodulator_priv; 802 struct af9033_dev *dev = fe->demodulator_priv;
795 int ret; 803 int ret;
796 u8 tmp; 804 u8 tmp;
797 805
798 *status = 0; 806 *status = 0;
799 807
800 /* radio channel status, 0=no result, 1=has signal, 2=no signal */ 808 /* radio channel status, 0=no result, 1=has signal, 2=no signal */
801 ret = af9033_rd_reg(state, 0x800047, &tmp); 809 ret = af9033_rd_reg(dev, 0x800047, &tmp);
802 if (ret < 0) 810 if (ret < 0)
803 goto err; 811 goto err;
804 812
@@ -808,7 +816,7 @@ static int af9033_read_status(struct dvb_frontend *fe, fe_status_t *status)
808 816
809 if (tmp != 0x02) { 817 if (tmp != 0x02) {
810 /* TPS lock */ 818 /* TPS lock */
811 ret = af9033_rd_reg_mask(state, 0x80f5a9, &tmp, 0x01); 819 ret = af9033_rd_reg_mask(dev, 0x80f5a9, &tmp, 0x01);
812 if (ret < 0) 820 if (ret < 0)
813 goto err; 821 goto err;
814 822
@@ -817,7 +825,7 @@ static int af9033_read_status(struct dvb_frontend *fe, fe_status_t *status)
817 FE_HAS_VITERBI; 825 FE_HAS_VITERBI;
818 826
819 /* full lock */ 827 /* full lock */
820 ret = af9033_rd_reg_mask(state, 0x80f999, &tmp, 0x01); 828 ret = af9033_rd_reg_mask(dev, 0x80f999, &tmp, 0x01);
821 if (ret < 0) 829 if (ret < 0)
822 goto err; 830 goto err;
823 831
@@ -827,76 +835,38 @@ static int af9033_read_status(struct dvb_frontend *fe, fe_status_t *status)
827 FE_HAS_LOCK; 835 FE_HAS_LOCK;
828 } 836 }
829 837
838 dev->fe_status = *status;
839
830 return 0; 840 return 0;
831 841
832err: 842err:
833 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret); 843 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
834 844
835 return ret; 845 return ret;
836} 846}
837 847
838static int af9033_read_snr(struct dvb_frontend *fe, u16 *snr) 848static int af9033_read_snr(struct dvb_frontend *fe, u16 *snr)
839{ 849{
840 struct af9033_state *state = fe->demodulator_priv; 850 struct af9033_dev *dev = fe->demodulator_priv;
841 int ret, i, len; 851 struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
842 u8 buf[3], tmp;
843 u32 snr_val;
844 const struct val_snr *uninitialized_var(snr_lut);
845
846 /* read value */
847 ret = af9033_rd_regs(state, 0x80002c, buf, 3);
848 if (ret < 0)
849 goto err;
850 852
851 snr_val = (buf[2] << 16) | (buf[1] << 8) | buf[0]; 853 /* use DVBv5 CNR */
852 854 if (c->cnr.stat[0].scale == FE_SCALE_DECIBEL)
853 /* read current modulation */ 855 *snr = div_s64(c->cnr.stat[0].svalue, 100); /* 1000x => 10x */
854 ret = af9033_rd_reg(state, 0x80f903, &tmp); 856 else
855 if (ret < 0) 857 *snr = 0;
856 goto err;
857
858 switch ((tmp >> 0) & 3) {
859 case 0:
860 len = ARRAY_SIZE(qpsk_snr_lut);
861 snr_lut = qpsk_snr_lut;
862 break;
863 case 1:
864 len = ARRAY_SIZE(qam16_snr_lut);
865 snr_lut = qam16_snr_lut;
866 break;
867 case 2:
868 len = ARRAY_SIZE(qam64_snr_lut);
869 snr_lut = qam64_snr_lut;
870 break;
871 default:
872 goto err;
873 }
874
875 for (i = 0; i < len; i++) {
876 tmp = snr_lut[i].snr;
877
878 if (snr_val < snr_lut[i].val)
879 break;
880 }
881
882 *snr = tmp * 10; /* dB/10 */
883 858
884 return 0; 859 return 0;
885
886err:
887 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
888
889 return ret;
890} 860}
891 861
892static int af9033_read_signal_strength(struct dvb_frontend *fe, u16 *strength) 862static int af9033_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
893{ 863{
894 struct af9033_state *state = fe->demodulator_priv; 864 struct af9033_dev *dev = fe->demodulator_priv;
895 int ret; 865 int ret;
896 u8 strength2; 866 u8 strength2;
897 867
898 /* read signal strength of 0-100 scale */ 868 /* read signal strength of 0-100 scale */
899 ret = af9033_rd_reg(state, 0x800048, &strength2); 869 ret = af9033_rd_reg(dev, 0x800048, &strength2);
900 if (ret < 0) 870 if (ret < 0)
901 goto err; 871 goto err;
902 872
@@ -906,244 +876,225 @@ static int af9033_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
906 return 0; 876 return 0;
907 877
908err: 878err:
909 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret); 879 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
910
911 return ret;
912}
913
914static int af9033_update_ch_stat(struct af9033_state *state)
915{
916 int ret = 0;
917 u32 err_cnt, bit_cnt;
918 u16 abort_cnt;
919 u8 buf[7];
920
921 /* only update data every half second */
922 if (time_after(jiffies, state->last_stat_check + msecs_to_jiffies(500))) {
923 ret = af9033_rd_regs(state, 0x800032, buf, sizeof(buf));
924 if (ret < 0)
925 goto err;
926 /* in 8 byte packets? */
927 abort_cnt = (buf[1] << 8) + buf[0];
928 /* in bits */
929 err_cnt = (buf[4] << 16) + (buf[3] << 8) + buf[2];
930 /* in 8 byte packets? always(?) 0x2710 = 10000 */
931 bit_cnt = (buf[6] << 8) + buf[5];
932
933 if (bit_cnt < abort_cnt) {
934 abort_cnt = 1000;
935 state->ber = 0xffffffff;
936 } else {
937 /* 8 byte packets, that have not been rejected already */
938 bit_cnt -= (u32)abort_cnt;
939 if (bit_cnt == 0) {
940 state->ber = 0xffffffff;
941 } else {
942 err_cnt -= (u32)abort_cnt * 8 * 8;
943 bit_cnt *= 8 * 8;
944 state->ber = err_cnt * (0xffffffff / bit_cnt);
945 }
946 }
947 state->ucb += abort_cnt;
948 state->last_stat_check = jiffies;
949 }
950
951 return 0;
952err:
953 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
954 880
955 return ret; 881 return ret;
956} 882}
957 883
958static int af9033_read_ber(struct dvb_frontend *fe, u32 *ber) 884static int af9033_read_ber(struct dvb_frontend *fe, u32 *ber)
959{ 885{
960 struct af9033_state *state = fe->demodulator_priv; 886 struct af9033_dev *dev = fe->demodulator_priv;
961 int ret;
962
963 ret = af9033_update_ch_stat(state);
964 if (ret < 0)
965 return ret;
966 887
967 *ber = state->ber; 888 *ber = (dev->post_bit_error - dev->post_bit_error_prev);
889 dev->post_bit_error_prev = dev->post_bit_error;
968 890
969 return 0; 891 return 0;
970} 892}
971 893
972static int af9033_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) 894static int af9033_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
973{ 895{
974 struct af9033_state *state = fe->demodulator_priv; 896 struct af9033_dev *dev = fe->demodulator_priv;
975 int ret;
976
977 ret = af9033_update_ch_stat(state);
978 if (ret < 0)
979 return ret;
980
981 *ucblocks = state->ucb;
982 897
898 *ucblocks = dev->error_block_count;
983 return 0; 899 return 0;
984} 900}
985 901
986static int af9033_i2c_gate_ctrl(struct dvb_frontend *fe, int enable) 902static int af9033_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
987{ 903{
988 struct af9033_state *state = fe->demodulator_priv; 904 struct af9033_dev *dev = fe->demodulator_priv;
989 int ret; 905 int ret;
990 906
991 dev_dbg(&state->i2c->dev, "%s: enable=%d\n", __func__, enable); 907 dev_dbg(&dev->client->dev, "enable=%d\n", enable);
992 908
993 ret = af9033_wr_reg_mask(state, 0x00fa04, enable, 0x01); 909 ret = af9033_wr_reg_mask(dev, 0x00fa04, enable, 0x01);
994 if (ret < 0) 910 if (ret < 0)
995 goto err; 911 goto err;
996 912
997 return 0; 913 return 0;
998 914
999err: 915err:
1000 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret); 916 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
1001 917
1002 return ret; 918 return ret;
1003} 919}
1004 920
1005static int af9033_pid_filter_ctrl(struct dvb_frontend *fe, int onoff) 921static int af9033_pid_filter_ctrl(struct dvb_frontend *fe, int onoff)
1006{ 922{
1007 struct af9033_state *state = fe->demodulator_priv; 923 struct af9033_dev *dev = fe->demodulator_priv;
1008 int ret; 924 int ret;
1009 925
1010 dev_dbg(&state->i2c->dev, "%s: onoff=%d\n", __func__, onoff); 926 dev_dbg(&dev->client->dev, "onoff=%d\n", onoff);
1011 927
1012 ret = af9033_wr_reg_mask(state, 0x80f993, onoff, 0x01); 928 ret = af9033_wr_reg_mask(dev, 0x80f993, onoff, 0x01);
1013 if (ret < 0) 929 if (ret < 0)
1014 goto err; 930 goto err;
1015 931
1016 return 0; 932 return 0;
1017 933
1018err: 934err:
1019 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret); 935 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
1020 936
1021 return ret; 937 return ret;
1022} 938}
1023 939
1024static int af9033_pid_filter(struct dvb_frontend *fe, int index, u16 pid, int onoff) 940static int af9033_pid_filter(struct dvb_frontend *fe, int index, u16 pid,
941 int onoff)
1025{ 942{
1026 struct af9033_state *state = fe->demodulator_priv; 943 struct af9033_dev *dev = fe->demodulator_priv;
1027 int ret; 944 int ret;
1028 u8 wbuf[2] = {(pid >> 0) & 0xff, (pid >> 8) & 0xff}; 945 u8 wbuf[2] = {(pid >> 0) & 0xff, (pid >> 8) & 0xff};
1029 946
1030 dev_dbg(&state->i2c->dev, "%s: index=%d pid=%04x onoff=%d\n", 947 dev_dbg(&dev->client->dev, "index=%d pid=%04x onoff=%d\n",
1031 __func__, index, pid, onoff); 948 index, pid, onoff);
1032 949
1033 if (pid > 0x1fff) 950 if (pid > 0x1fff)
1034 return 0; 951 return 0;
1035 952
1036 ret = af9033_wr_regs(state, 0x80f996, wbuf, 2); 953 ret = af9033_wr_regs(dev, 0x80f996, wbuf, 2);
1037 if (ret < 0) 954 if (ret < 0)
1038 goto err; 955 goto err;
1039 956
1040 ret = af9033_wr_reg(state, 0x80f994, onoff); 957 ret = af9033_wr_reg(dev, 0x80f994, onoff);
1041 if (ret < 0) 958 if (ret < 0)
1042 goto err; 959 goto err;
1043 960
1044 ret = af9033_wr_reg(state, 0x80f995, index); 961 ret = af9033_wr_reg(dev, 0x80f995, index);
1045 if (ret < 0) 962 if (ret < 0)
1046 goto err; 963 goto err;
1047 964
1048 return 0; 965 return 0;
1049 966
1050err: 967err:
1051 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret); 968 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
1052 969
1053 return ret; 970 return ret;
1054} 971}
1055 972
1056static struct dvb_frontend_ops af9033_ops; 973static void af9033_stat_work(struct work_struct *work)
1057
1058struct dvb_frontend *af9033_attach(const struct af9033_config *config,
1059 struct i2c_adapter *i2c,
1060 struct af9033_ops *ops)
1061{ 974{
1062 int ret; 975 struct af9033_dev *dev = container_of(work, struct af9033_dev, stat_work.work);
1063 struct af9033_state *state; 976 struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
1064 u8 buf[8]; 977 int ret, tmp, i, len;
978 u8 u8tmp, buf[7];
979
980 dev_dbg(&dev->client->dev, "\n");
981
982 /* signal strength */
983 if (dev->fe_status & FE_HAS_SIGNAL) {
984 if (dev->is_af9035) {
985 ret = af9033_rd_reg(dev, 0x80004a, &u8tmp);
986 tmp = -u8tmp * 1000;
987 } else {
988 ret = af9033_rd_reg(dev, 0x8000f7, &u8tmp);
989 tmp = (u8tmp - 100) * 1000;
990 }
991 if (ret)
992 goto err;
1065 993
1066 dev_dbg(&i2c->dev, "%s:\n", __func__); 994 c->strength.len = 1;
995 c->strength.stat[0].scale = FE_SCALE_DECIBEL;
996 c->strength.stat[0].svalue = tmp;
997 } else {
998 c->strength.len = 1;
999 c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
1000 }
1067 1001
1068 /* allocate memory for the internal state */ 1002 /* CNR */
1069 state = kzalloc(sizeof(struct af9033_state), GFP_KERNEL); 1003 if (dev->fe_status & FE_HAS_VITERBI) {
1070 if (state == NULL) 1004 u32 snr_val;
1071 goto err; 1005 const struct val_snr *snr_lut;
1072 1006
1073 /* setup the state */ 1007 /* read value */
1074 state->i2c = i2c; 1008 ret = af9033_rd_regs(dev, 0x80002c, buf, 3);
1075 memcpy(&state->cfg, config, sizeof(struct af9033_config)); 1009 if (ret)
1010 goto err;
1076 1011
1077 if (state->cfg.clock != 12000000) { 1012 snr_val = (buf[2] << 16) | (buf[1] << 8) | (buf[0] << 0);
1078 dev_err(&state->i2c->dev, "%s: af9033: unsupported clock=%d, " \
1079 "only 12000000 Hz is supported currently\n",
1080 KBUILD_MODNAME, state->cfg.clock);
1081 goto err;
1082 }
1083 1013
1084 /* firmware version */ 1014 /* read current modulation */
1085 ret = af9033_rd_regs(state, 0x0083e9, &buf[0], 4); 1015 ret = af9033_rd_reg(dev, 0x80f903, &u8tmp);
1086 if (ret < 0) 1016 if (ret)
1087 goto err; 1017 goto err;
1088 1018
1089 ret = af9033_rd_regs(state, 0x804191, &buf[4], 4); 1019 switch ((u8tmp >> 0) & 3) {
1090 if (ret < 0) 1020 case 0:
1091 goto err; 1021 len = ARRAY_SIZE(qpsk_snr_lut);
1022 snr_lut = qpsk_snr_lut;
1023 break;
1024 case 1:
1025 len = ARRAY_SIZE(qam16_snr_lut);
1026 snr_lut = qam16_snr_lut;
1027 break;
1028 case 2:
1029 len = ARRAY_SIZE(qam64_snr_lut);
1030 snr_lut = qam64_snr_lut;
1031 break;
1032 default:
1033 goto err_schedule_delayed_work;
1034 }
1092 1035
1093 dev_info(&state->i2c->dev, "%s: firmware version: LINK=%d.%d.%d.%d " \ 1036 for (i = 0; i < len; i++) {
1094 "OFDM=%d.%d.%d.%d\n", KBUILD_MODNAME, buf[0], buf[1], 1037 tmp = snr_lut[i].snr * 1000;
1095 buf[2], buf[3], buf[4], buf[5], buf[6], buf[7]); 1038 if (snr_val < snr_lut[i].val)
1039 break;
1040 }
1096 1041
1097 /* sleep */ 1042 c->cnr.len = 1;
1098 switch (state->cfg.tuner) { 1043 c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
1099 case AF9033_TUNER_IT9135_38: 1044 c->cnr.stat[0].svalue = tmp;
1100 case AF9033_TUNER_IT9135_51: 1045 } else {
1101 case AF9033_TUNER_IT9135_52: 1046 c->cnr.len = 1;
1102 case AF9033_TUNER_IT9135_60: 1047 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
1103 case AF9033_TUNER_IT9135_61: 1048 }
1104 case AF9033_TUNER_IT9135_62:
1105 /* IT9135 did not like to sleep at that early */
1106 break;
1107 default:
1108 ret = af9033_wr_reg(state, 0x80004c, 1);
1109 if (ret < 0)
1110 goto err;
1111 1049
1112 ret = af9033_wr_reg(state, 0x800000, 0); 1050 /* UCB/PER/BER */
1113 if (ret < 0) 1051 if (dev->fe_status & FE_HAS_LOCK) {
1052 /* outer FEC, 204 byte packets */
1053 u16 abort_packet_count, rsd_packet_count;
1054 /* inner FEC, bits */
1055 u32 rsd_bit_err_count;
1056
1057 /*
1058 * Packet count used for measurement is 10000
1059 * (rsd_packet_count). Maybe it should be increased?
1060 */
1061
1062 ret = af9033_rd_regs(dev, 0x800032, buf, 7);
1063 if (ret)
1114 goto err; 1064 goto err;
1115 }
1116 1065
1117 /* configure internal TS mode */ 1066 abort_packet_count = (buf[1] << 8) | (buf[0] << 0);
1118 switch (state->cfg.ts_mode) { 1067 rsd_bit_err_count = (buf[4] << 16) | (buf[3] << 8) | buf[2];
1119 case AF9033_TS_MODE_PARALLEL: 1068 rsd_packet_count = (buf[6] << 8) | (buf[5] << 0);
1120 state->ts_mode_parallel = true;
1121 break;
1122 case AF9033_TS_MODE_SERIAL:
1123 state->ts_mode_serial = true;
1124 break;
1125 case AF9033_TS_MODE_USB:
1126 /* usb mode for AF9035 */
1127 default:
1128 break;
1129 }
1130 1069
1131 /* create dvb_frontend */ 1070 dev->error_block_count += abort_packet_count;
1132 memcpy(&state->fe.ops, &af9033_ops, sizeof(struct dvb_frontend_ops)); 1071 dev->total_block_count += rsd_packet_count;
1133 state->fe.demodulator_priv = state; 1072 dev->post_bit_error += rsd_bit_err_count;
1073 dev->post_bit_count += rsd_packet_count * 204 * 8;
1134 1074
1135 if (ops) { 1075 c->block_count.len = 1;
1136 ops->pid_filter = af9033_pid_filter; 1076 c->block_count.stat[0].scale = FE_SCALE_COUNTER;
1137 ops->pid_filter_ctrl = af9033_pid_filter_ctrl; 1077 c->block_count.stat[0].uvalue = dev->total_block_count;
1138 } 1078
1079 c->block_error.len = 1;
1080 c->block_error.stat[0].scale = FE_SCALE_COUNTER;
1081 c->block_error.stat[0].uvalue = dev->error_block_count;
1082
1083 c->post_bit_count.len = 1;
1084 c->post_bit_count.stat[0].scale = FE_SCALE_COUNTER;
1085 c->post_bit_count.stat[0].uvalue = dev->post_bit_count;
1139 1086
1140 return &state->fe; 1087 c->post_bit_error.len = 1;
1088 c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
1089 c->post_bit_error.stat[0].uvalue = dev->post_bit_error;
1090 }
1141 1091
1092err_schedule_delayed_work:
1093 schedule_delayed_work(&dev->stat_work, msecs_to_jiffies(2000));
1094 return;
1142err: 1095err:
1143 kfree(state); 1096 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
1144 return NULL;
1145} 1097}
1146EXPORT_SYMBOL(af9033_attach);
1147 1098
1148static struct dvb_frontend_ops af9033_ops = { 1099static struct dvb_frontend_ops af9033_ops = {
1149 .delsys = { SYS_DVBT }, 1100 .delsys = { SYS_DVBT },
@@ -1170,8 +1121,6 @@ static struct dvb_frontend_ops af9033_ops = {
1170 FE_CAN_MUTE_TS 1121 FE_CAN_MUTE_TS
1171 }, 1122 },
1172 1123
1173 .release = af9033_release,
1174
1175 .init = af9033_init, 1124 .init = af9033_init,
1176 .sleep = af9033_sleep, 1125 .sleep = af9033_sleep,
1177 1126
@@ -1188,6 +1137,150 @@ static struct dvb_frontend_ops af9033_ops = {
1188 .i2c_gate_ctrl = af9033_i2c_gate_ctrl, 1137 .i2c_gate_ctrl = af9033_i2c_gate_ctrl,
1189}; 1138};
1190 1139
1140static int af9033_probe(struct i2c_client *client,
1141 const struct i2c_device_id *id)
1142{
1143 struct af9033_config *cfg = client->dev.platform_data;
1144 struct af9033_dev *dev;
1145 int ret;
1146 u8 buf[8];
1147 u32 reg;
1148
1149 /* allocate memory for the internal state */
1150 dev = kzalloc(sizeof(struct af9033_dev), GFP_KERNEL);
1151 if (dev == NULL) {
1152 ret = -ENOMEM;
1153 dev_err(&client->dev, "Could not allocate memory for state\n");
1154 goto err;
1155 }
1156
1157 /* setup the state */
1158 dev->client = client;
1159 INIT_DELAYED_WORK(&dev->stat_work, af9033_stat_work);
1160 memcpy(&dev->cfg, cfg, sizeof(struct af9033_config));
1161
1162 if (dev->cfg.clock != 12000000) {
1163 ret = -ENODEV;
1164 dev_err(&dev->client->dev,
1165 "unsupported clock %d Hz, only 12000000 Hz is supported currently\n",
1166 dev->cfg.clock);
1167 goto err_kfree;
1168 }
1169
1170 /* firmware version */
1171 switch (dev->cfg.tuner) {
1172 case AF9033_TUNER_IT9135_38:
1173 case AF9033_TUNER_IT9135_51:
1174 case AF9033_TUNER_IT9135_52:
1175 case AF9033_TUNER_IT9135_60:
1176 case AF9033_TUNER_IT9135_61:
1177 case AF9033_TUNER_IT9135_62:
1178 dev->is_it9135 = true;
1179 reg = 0x004bfc;
1180 break;
1181 default:
1182 dev->is_af9035 = true;
1183 reg = 0x0083e9;
1184 break;
1185 }
1186
1187 ret = af9033_rd_regs(dev, reg, &buf[0], 4);
1188 if (ret < 0)
1189 goto err_kfree;
1190
1191 ret = af9033_rd_regs(dev, 0x804191, &buf[4], 4);
1192 if (ret < 0)
1193 goto err_kfree;
1194
1195 dev_info(&dev->client->dev,
1196 "firmware version: LINK %d.%d.%d.%d - OFDM %d.%d.%d.%d\n",
1197 buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6],
1198 buf[7]);
1199
1200 /* sleep */
1201 switch (dev->cfg.tuner) {
1202 case AF9033_TUNER_IT9135_38:
1203 case AF9033_TUNER_IT9135_51:
1204 case AF9033_TUNER_IT9135_52:
1205 case AF9033_TUNER_IT9135_60:
1206 case AF9033_TUNER_IT9135_61:
1207 case AF9033_TUNER_IT9135_62:
1208 /* IT9135 did not like to sleep at that early */
1209 break;
1210 default:
1211 ret = af9033_wr_reg(dev, 0x80004c, 1);
1212 if (ret < 0)
1213 goto err_kfree;
1214
1215 ret = af9033_wr_reg(dev, 0x800000, 0);
1216 if (ret < 0)
1217 goto err_kfree;
1218 }
1219
1220 /* configure internal TS mode */
1221 switch (dev->cfg.ts_mode) {
1222 case AF9033_TS_MODE_PARALLEL:
1223 dev->ts_mode_parallel = true;
1224 break;
1225 case AF9033_TS_MODE_SERIAL:
1226 dev->ts_mode_serial = true;
1227 break;
1228 case AF9033_TS_MODE_USB:
1229 /* usb mode for AF9035 */
1230 default:
1231 break;
1232 }
1233
1234 /* create dvb_frontend */
1235 memcpy(&dev->fe.ops, &af9033_ops, sizeof(struct dvb_frontend_ops));
1236 dev->fe.demodulator_priv = dev;
1237 *cfg->fe = &dev->fe;
1238 if (cfg->ops) {
1239 cfg->ops->pid_filter = af9033_pid_filter;
1240 cfg->ops->pid_filter_ctrl = af9033_pid_filter_ctrl;
1241 }
1242 i2c_set_clientdata(client, dev);
1243
1244 dev_info(&dev->client->dev, "Afatech AF9033 successfully attached\n");
1245 return 0;
1246err_kfree:
1247 kfree(dev);
1248err:
1249 dev_dbg(&client->dev, "failed=%d\n", ret);
1250 return ret;
1251}
1252
1253static int af9033_remove(struct i2c_client *client)
1254{
1255 struct af9033_dev *dev = i2c_get_clientdata(client);
1256
1257 dev_dbg(&dev->client->dev, "\n");
1258
1259 dev->fe.ops.release = NULL;
1260 dev->fe.demodulator_priv = NULL;
1261 kfree(dev);
1262
1263 return 0;
1264}
1265
1266static const struct i2c_device_id af9033_id_table[] = {
1267 {"af9033", 0},
1268 {}
1269};
1270MODULE_DEVICE_TABLE(i2c, af9033_id_table);
1271
1272static struct i2c_driver af9033_driver = {
1273 .driver = {
1274 .owner = THIS_MODULE,
1275 .name = "af9033",
1276 },
1277 .probe = af9033_probe,
1278 .remove = af9033_remove,
1279 .id_table = af9033_id_table,
1280};
1281
1282module_i2c_driver(af9033_driver);
1283
1191MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>"); 1284MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
1192MODULE_DESCRIPTION("Afatech AF9033 DVB-T demodulator driver"); 1285MODULE_DESCRIPTION("Afatech AF9033 DVB-T demodulator driver");
1193MODULE_LICENSE("GPL"); 1286MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb-frontends/af9033.h b/drivers/media/dvb-frontends/af9033.h
index 539f4db678b8..6ad22b69a636 100644
--- a/drivers/media/dvb-frontends/af9033.h
+++ b/drivers/media/dvb-frontends/af9033.h
@@ -24,13 +24,12 @@
24 24
25#include <linux/kconfig.h> 25#include <linux/kconfig.h>
26 26
27/*
28 * I2C address (TODO: are these in 8-bit format?)
29 * 0x38, 0x3a, 0x3c, 0x3e
30 */
27struct af9033_config { 31struct af9033_config {
28 /* 32 /*
29 * I2C address
30 */
31 u8 i2c_addr;
32
33 /*
34 * clock Hz 33 * clock Hz
35 * 12000000, 22000000, 24000000, 34000000, 32000000, 28000000, 26000000, 34 * 12000000, 22000000, 24000000, 34000000, 32000000, 28000000, 26000000,
36 * 30000000, 36000000, 20480000, 16384000 35 * 30000000, 36000000, 20480000, 16384000
@@ -75,8 +74,23 @@ struct af9033_config {
75 * input spectrum inversion 74 * input spectrum inversion
76 */ 75 */
77 bool spec_inv; 76 bool spec_inv;
78};
79 77
78 /*
79 *
80 */
81 bool dyn0_clk;
82
83 /*
84 * PID filter ops
85 */
86 struct af9033_ops *ops;
87
88 /*
89 * frontend
90 * returned by that driver
91 */
92 struct dvb_frontend **fe;
93};
80 94
81struct af9033_ops { 95struct af9033_ops {
82 int (*pid_filter_ctrl)(struct dvb_frontend *fe, int onoff); 96 int (*pid_filter_ctrl)(struct dvb_frontend *fe, int onoff);
@@ -84,36 +98,4 @@ struct af9033_ops {
84 int onoff); 98 int onoff);
85}; 99};
86 100
87
88#if IS_ENABLED(CONFIG_DVB_AF9033)
89extern
90struct dvb_frontend *af9033_attach(const struct af9033_config *config,
91 struct i2c_adapter *i2c,
92 struct af9033_ops *ops);
93
94#else
95static inline
96struct dvb_frontend *af9033_attach(const struct af9033_config *config,
97 struct i2c_adapter *i2c,
98 struct af9033_ops *ops)
99{
100 pr_warn("%s: driver disabled by Kconfig\n", __func__);
101 return NULL;
102}
103
104static inline int af9033_pid_filter_ctrl(struct dvb_frontend *fe, int onoff)
105{
106 pr_warn("%s: driver disabled by Kconfig\n", __func__);
107 return -ENODEV;
108}
109
110static inline int af9033_pid_filter(struct dvb_frontend *fe, int index, u16 pid,
111 int onoff)
112{
113 pr_warn("%s: driver disabled by Kconfig\n", __func__);
114 return -ENODEV;
115}
116
117#endif
118
119#endif /* AF9033_H */ 101#endif /* AF9033_H */
diff --git a/drivers/media/dvb-frontends/af9033_priv.h b/drivers/media/dvb-frontends/af9033_priv.h
index ded7b67d7526..c12c92cb5855 100644
--- a/drivers/media/dvb-frontends/af9033_priv.h
+++ b/drivers/media/dvb-frontends/af9033_priv.h
@@ -24,6 +24,7 @@
24 24
25#include "dvb_frontend.h" 25#include "dvb_frontend.h"
26#include "af9033.h" 26#include "af9033.h"
27#include <linux/math64.h>
27 28
28struct reg_val { 29struct reg_val {
29 u32 reg; 30 u32 reg;
diff --git a/drivers/media/dvb-frontends/as102_fe.c b/drivers/media/dvb-frontends/as102_fe.c
new file mode 100644
index 000000000000..493665899565
--- /dev/null
+++ b/drivers/media/dvb-frontends/as102_fe.c
@@ -0,0 +1,480 @@
1/*
2 * Abilis Systems Single DVB-T Receiver
3 * Copyright (C) 2008 Pierrick Hascoet <pierrick.hascoet@abilis.com>
4 * Copyright (C) 2010 Devin Heitmueller <dheitmueller@kernellabs.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include <dvb_frontend.h>
18
19#include "as102_fe.h"
20
21struct as102_state {
22 struct dvb_frontend frontend;
23 struct as10x_demod_stats demod_stats;
24
25 const struct as102_fe_ops *ops;
26 void *priv;
27 uint8_t elna_cfg;
28
29 /* signal strength */
30 uint16_t signal_strength;
31 /* bit error rate */
32 uint32_t ber;
33};
34
35static uint8_t as102_fe_get_code_rate(fe_code_rate_t arg)
36{
37 uint8_t c;
38
39 switch (arg) {
40 case FEC_1_2:
41 c = CODE_RATE_1_2;
42 break;
43 case FEC_2_3:
44 c = CODE_RATE_2_3;
45 break;
46 case FEC_3_4:
47 c = CODE_RATE_3_4;
48 break;
49 case FEC_5_6:
50 c = CODE_RATE_5_6;
51 break;
52 case FEC_7_8:
53 c = CODE_RATE_7_8;
54 break;
55 default:
56 c = CODE_RATE_UNKNOWN;
57 break;
58 }
59
60 return c;
61}
62
63static int as102_fe_set_frontend(struct dvb_frontend *fe)
64{
65 struct as102_state *state = fe->demodulator_priv;
66 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
67 struct as10x_tune_args tune_args = { 0 };
68
69 /* set frequency */
70 tune_args.freq = c->frequency / 1000;
71
72 /* fix interleaving_mode */
73 tune_args.interleaving_mode = INTLV_NATIVE;
74
75 switch (c->bandwidth_hz) {
76 case 8000000:
77 tune_args.bandwidth = BW_8_MHZ;
78 break;
79 case 7000000:
80 tune_args.bandwidth = BW_7_MHZ;
81 break;
82 case 6000000:
83 tune_args.bandwidth = BW_6_MHZ;
84 break;
85 default:
86 tune_args.bandwidth = BW_8_MHZ;
87 }
88
89 switch (c->guard_interval) {
90 case GUARD_INTERVAL_1_32:
91 tune_args.guard_interval = GUARD_INT_1_32;
92 break;
93 case GUARD_INTERVAL_1_16:
94 tune_args.guard_interval = GUARD_INT_1_16;
95 break;
96 case GUARD_INTERVAL_1_8:
97 tune_args.guard_interval = GUARD_INT_1_8;
98 break;
99 case GUARD_INTERVAL_1_4:
100 tune_args.guard_interval = GUARD_INT_1_4;
101 break;
102 case GUARD_INTERVAL_AUTO:
103 default:
104 tune_args.guard_interval = GUARD_UNKNOWN;
105 break;
106 }
107
108 switch (c->modulation) {
109 case QPSK:
110 tune_args.modulation = CONST_QPSK;
111 break;
112 case QAM_16:
113 tune_args.modulation = CONST_QAM16;
114 break;
115 case QAM_64:
116 tune_args.modulation = CONST_QAM64;
117 break;
118 default:
119 tune_args.modulation = CONST_UNKNOWN;
120 break;
121 }
122
123 switch (c->transmission_mode) {
124 case TRANSMISSION_MODE_2K:
125 tune_args.transmission_mode = TRANS_MODE_2K;
126 break;
127 case TRANSMISSION_MODE_8K:
128 tune_args.transmission_mode = TRANS_MODE_8K;
129 break;
130 default:
131 tune_args.transmission_mode = TRANS_MODE_UNKNOWN;
132 }
133
134 switch (c->hierarchy) {
135 case HIERARCHY_NONE:
136 tune_args.hierarchy = HIER_NONE;
137 break;
138 case HIERARCHY_1:
139 tune_args.hierarchy = HIER_ALPHA_1;
140 break;
141 case HIERARCHY_2:
142 tune_args.hierarchy = HIER_ALPHA_2;
143 break;
144 case HIERARCHY_4:
145 tune_args.hierarchy = HIER_ALPHA_4;
146 break;
147 case HIERARCHY_AUTO:
148 tune_args.hierarchy = HIER_UNKNOWN;
149 break;
150 }
151
152 pr_debug("as102: tuner parameters: freq: %d bw: 0x%02x gi: 0x%02x\n",
153 c->frequency,
154 tune_args.bandwidth,
155 tune_args.guard_interval);
156
157 /*
158 * Detect a hierarchy selection
159 * if HP/LP are both set to FEC_NONE, HP will be selected.
160 */
161 if ((tune_args.hierarchy != HIER_NONE) &&
162 ((c->code_rate_LP == FEC_NONE) ||
163 (c->code_rate_HP == FEC_NONE))) {
164
165 if (c->code_rate_LP == FEC_NONE) {
166 tune_args.hier_select = HIER_HIGH_PRIORITY;
167 tune_args.code_rate =
168 as102_fe_get_code_rate(c->code_rate_HP);
169 }
170
171 if (c->code_rate_HP == FEC_NONE) {
172 tune_args.hier_select = HIER_LOW_PRIORITY;
173 tune_args.code_rate =
174 as102_fe_get_code_rate(c->code_rate_LP);
175 }
176
177 pr_debug("as102: \thierarchy: 0x%02x selected: %s code_rate_%s: 0x%02x\n",
178 tune_args.hierarchy,
179 tune_args.hier_select == HIER_HIGH_PRIORITY ?
180 "HP" : "LP",
181 tune_args.hier_select == HIER_HIGH_PRIORITY ?
182 "HP" : "LP",
183 tune_args.code_rate);
184 } else {
185 tune_args.code_rate =
186 as102_fe_get_code_rate(c->code_rate_HP);
187 }
188
189 /* Set frontend arguments */
190 return state->ops->set_tune(state->priv, &tune_args);
191}
192
193static int as102_fe_get_frontend(struct dvb_frontend *fe)
194{
195 struct as102_state *state = fe->demodulator_priv;
196 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
197 int ret = 0;
198 struct as10x_tps tps = { 0 };
199
200 /* send abilis command: GET_TPS */
201 ret = state->ops->get_tps(state->priv, &tps);
202 if (ret < 0)
203 return ret;
204
205 /* extract constellation */
206 switch (tps.modulation) {
207 case CONST_QPSK:
208 c->modulation = QPSK;
209 break;
210 case CONST_QAM16:
211 c->modulation = QAM_16;
212 break;
213 case CONST_QAM64:
214 c->modulation = QAM_64;
215 break;
216 }
217
218 /* extract hierarchy */
219 switch (tps.hierarchy) {
220 case HIER_NONE:
221 c->hierarchy = HIERARCHY_NONE;
222 break;
223 case HIER_ALPHA_1:
224 c->hierarchy = HIERARCHY_1;
225 break;
226 case HIER_ALPHA_2:
227 c->hierarchy = HIERARCHY_2;
228 break;
229 case HIER_ALPHA_4:
230 c->hierarchy = HIERARCHY_4;
231 break;
232 }
233
234 /* extract code rate HP */
235 switch (tps.code_rate_HP) {
236 case CODE_RATE_1_2:
237 c->code_rate_HP = FEC_1_2;
238 break;
239 case CODE_RATE_2_3:
240 c->code_rate_HP = FEC_2_3;
241 break;
242 case CODE_RATE_3_4:
243 c->code_rate_HP = FEC_3_4;
244 break;
245 case CODE_RATE_5_6:
246 c->code_rate_HP = FEC_5_6;
247 break;
248 case CODE_RATE_7_8:
249 c->code_rate_HP = FEC_7_8;
250 break;
251 }
252
253 /* extract code rate LP */
254 switch (tps.code_rate_LP) {
255 case CODE_RATE_1_2:
256 c->code_rate_LP = FEC_1_2;
257 break;
258 case CODE_RATE_2_3:
259 c->code_rate_LP = FEC_2_3;
260 break;
261 case CODE_RATE_3_4:
262 c->code_rate_LP = FEC_3_4;
263 break;
264 case CODE_RATE_5_6:
265 c->code_rate_LP = FEC_5_6;
266 break;
267 case CODE_RATE_7_8:
268 c->code_rate_LP = FEC_7_8;
269 break;
270 }
271
272 /* extract guard interval */
273 switch (tps.guard_interval) {
274 case GUARD_INT_1_32:
275 c->guard_interval = GUARD_INTERVAL_1_32;
276 break;
277 case GUARD_INT_1_16:
278 c->guard_interval = GUARD_INTERVAL_1_16;
279 break;
280 case GUARD_INT_1_8:
281 c->guard_interval = GUARD_INTERVAL_1_8;
282 break;
283 case GUARD_INT_1_4:
284 c->guard_interval = GUARD_INTERVAL_1_4;
285 break;
286 }
287
288 /* extract transmission mode */
289 switch (tps.transmission_mode) {
290 case TRANS_MODE_2K:
291 c->transmission_mode = TRANSMISSION_MODE_2K;
292 break;
293 case TRANS_MODE_8K:
294 c->transmission_mode = TRANSMISSION_MODE_8K;
295 break;
296 }
297
298 return 0;
299}
300
301static int as102_fe_get_tune_settings(struct dvb_frontend *fe,
302 struct dvb_frontend_tune_settings *settings) {
303
304 settings->min_delay_ms = 1000;
305
306 return 0;
307}
308
309static int as102_fe_read_status(struct dvb_frontend *fe, fe_status_t *status)
310{
311 int ret = 0;
312 struct as102_state *state = fe->demodulator_priv;
313 struct as10x_tune_status tstate = { 0 };
314
315 /* send abilis command: GET_TUNE_STATUS */
316 ret = state->ops->get_status(state->priv, &tstate);
317 if (ret < 0)
318 return ret;
319
320 state->signal_strength = tstate.signal_strength;
321 state->ber = tstate.BER;
322
323 switch (tstate.tune_state) {
324 case TUNE_STATUS_SIGNAL_DVB_OK:
325 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER;
326 break;
327 case TUNE_STATUS_STREAM_DETECTED:
328 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_SYNC |
329 FE_HAS_VITERBI;
330 break;
331 case TUNE_STATUS_STREAM_TUNED:
332 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_SYNC |
333 FE_HAS_LOCK | FE_HAS_VITERBI;
334 break;
335 default:
336 *status = TUNE_STATUS_NOT_TUNED;
337 }
338
339 pr_debug("as102: tuner status: 0x%02x, strength %d, per: %d, ber: %d\n",
340 tstate.tune_state, tstate.signal_strength,
341 tstate.PER, tstate.BER);
342
343 if (!(*status & FE_HAS_LOCK)) {
344 memset(&state->demod_stats, 0, sizeof(state->demod_stats));
345 return 0;
346 }
347
348 ret = state->ops->get_stats(state->priv, &state->demod_stats);
349 if (ret < 0)
350 memset(&state->demod_stats, 0, sizeof(state->demod_stats));
351
352 return ret;
353}
354
355/*
356 * Note:
357 * - in AS102 SNR=MER
358 * - the SNR will be returned in linear terms, i.e. not in dB
359 * - the accuracy equals ±2dB for a SNR range from 4dB to 30dB
360 * - the accuracy is >2dB for SNR values outside this range
361 */
362static int as102_fe_read_snr(struct dvb_frontend *fe, u16 *snr)
363{
364 struct as102_state *state = fe->demodulator_priv;
365
366 *snr = state->demod_stats.mer;
367
368 return 0;
369}
370
371static int as102_fe_read_ber(struct dvb_frontend *fe, u32 *ber)
372{
373 struct as102_state *state = fe->demodulator_priv;
374
375 *ber = state->ber;
376
377 return 0;
378}
379
380static int as102_fe_read_signal_strength(struct dvb_frontend *fe,
381 u16 *strength)
382{
383 struct as102_state *state = fe->demodulator_priv;
384
385 *strength = (((0xffff * 400) * state->signal_strength + 41000) * 2);
386
387 return 0;
388}
389
390static int as102_fe_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
391{
392 struct as102_state *state = fe->demodulator_priv;
393
394 if (state->demod_stats.has_started)
395 *ucblocks = state->demod_stats.bad_frame_count;
396 else
397 *ucblocks = 0;
398
399 return 0;
400}
401
402static int as102_fe_ts_bus_ctrl(struct dvb_frontend *fe, int acquire)
403{
404 struct as102_state *state = fe->demodulator_priv;
405
406 return state->ops->stream_ctrl(state->priv, acquire,
407 state->elna_cfg);
408}
409
410static void as102_fe_release(struct dvb_frontend *fe)
411{
412 struct as102_state *state = fe->demodulator_priv;
413
414 kfree(state);
415}
416
417
418static struct dvb_frontend_ops as102_fe_ops = {
419 .delsys = { SYS_DVBT },
420 .info = {
421 .name = "Abilis AS102 DVB-T",
422 .frequency_min = 174000000,
423 .frequency_max = 862000000,
424 .frequency_stepsize = 166667,
425 .caps = FE_CAN_INVERSION_AUTO
426 | FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4
427 | FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO
428 | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QPSK
429 | FE_CAN_QAM_AUTO
430 | FE_CAN_TRANSMISSION_MODE_AUTO
431 | FE_CAN_GUARD_INTERVAL_AUTO
432 | FE_CAN_HIERARCHY_AUTO
433 | FE_CAN_RECOVER
434 | FE_CAN_MUTE_TS
435 },
436
437 .set_frontend = as102_fe_set_frontend,
438 .get_frontend = as102_fe_get_frontend,
439 .get_tune_settings = as102_fe_get_tune_settings,
440
441 .read_status = as102_fe_read_status,
442 .read_snr = as102_fe_read_snr,
443 .read_ber = as102_fe_read_ber,
444 .read_signal_strength = as102_fe_read_signal_strength,
445 .read_ucblocks = as102_fe_read_ucblocks,
446 .ts_bus_ctrl = as102_fe_ts_bus_ctrl,
447 .release = as102_fe_release,
448};
449
450struct dvb_frontend *as102_attach(const char *name,
451 const struct as102_fe_ops *ops,
452 void *priv,
453 uint8_t elna_cfg)
454{
455 struct as102_state *state;
456 struct dvb_frontend *fe;
457
458 state = kzalloc(sizeof(struct as102_state), GFP_KERNEL);
459 if (state == NULL) {
460 pr_err("%s: unable to allocate memory for state\n", __func__);
461 return NULL;
462 }
463 fe = &state->frontend;
464 fe->demodulator_priv = state;
465 state->ops = ops;
466 state->priv = priv;
467 state->elna_cfg = elna_cfg;
468
469 /* init frontend callback ops */
470 memcpy(&fe->ops, &as102_fe_ops, sizeof(struct dvb_frontend_ops));
471 strncpy(fe->ops.info.name, name, sizeof(fe->ops.info.name));
472
473 return fe;
474
475}
476EXPORT_SYMBOL_GPL(as102_attach);
477
478MODULE_DESCRIPTION("as102-fe");
479MODULE_LICENSE("GPL");
480MODULE_AUTHOR("Pierrick Hascoet <pierrick.hascoet@abilis.com>");
diff --git a/drivers/media/dvb-frontends/as102_fe.h b/drivers/media/dvb-frontends/as102_fe.h
new file mode 100644
index 000000000000..a7c91430ca3d
--- /dev/null
+++ b/drivers/media/dvb-frontends/as102_fe.h
@@ -0,0 +1,29 @@
1/*
2 * Abilis Systems Single DVB-T Receiver
3 * Copyright (C) 2014 Mauro Carvalho Chehab <m.chehab@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2, or (at your option)
8 * any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include "as102_fe_types.h"
17
18struct as102_fe_ops {
19 int (*set_tune)(void *priv, struct as10x_tune_args *tune_args);
20 int (*get_tps)(void *priv, struct as10x_tps *tps);
21 int (*get_status)(void *priv, struct as10x_tune_status *tstate);
22 int (*get_stats)(void *priv, struct as10x_demod_stats *demod_stats);
23 int (*stream_ctrl)(void *priv, int acquire, uint32_t elna_cfg);
24};
25
26struct dvb_frontend *as102_attach(const char *name,
27 const struct as102_fe_ops *ops,
28 void *priv,
29 uint8_t elna_cfg);
diff --git a/drivers/staging/media/as102/as10x_types.h b/drivers/media/dvb-frontends/as102_fe_types.h
index af26e057d9a2..80a5398b580f 100644
--- a/drivers/staging/media/as102/as10x_types.h
+++ b/drivers/media/dvb-frontends/as102_fe_types.h
@@ -11,16 +11,10 @@
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 */ 14 */
19#ifndef _AS10X_TYPES_H_ 15#ifndef _AS10X_TYPES_H_
20#define _AS10X_TYPES_H_ 16#define _AS10X_TYPES_H_
21 17
22#include "as10x_handle.h"
23
24/*********************************/ 18/*********************************/
25/* MACRO DEFINITIONS */ 19/* MACRO DEFINITIONS */
26/*********************************/ 20/*********************************/
diff --git a/drivers/media/dvb-frontends/bcm3510.c b/drivers/media/dvb-frontends/bcm3510.c
index 39a29dd29519..638c7aa0fb7e 100644
--- a/drivers/media/dvb-frontends/bcm3510.c
+++ b/drivers/media/dvb-frontends/bcm3510.c
@@ -639,12 +639,12 @@ static int bcm3510_download_firmware(struct dvb_frontend* fe)
639 err("could not load firmware (%s): %d",BCM3510_DEFAULT_FIRMWARE,ret); 639 err("could not load firmware (%s): %d",BCM3510_DEFAULT_FIRMWARE,ret);
640 return ret; 640 return ret;
641 } 641 }
642 deb_info("got firmware: %zd\n",fw->size); 642 deb_info("got firmware: %zu\n", fw->size);
643 643
644 b = fw->data; 644 b = fw->data;
645 for (i = 0; i < fw->size;) { 645 for (i = 0; i < fw->size;) {
646 addr = le16_to_cpu( *( (u16 *)&b[i] ) ); 646 addr = le16_to_cpu(*((__le16 *)&b[i]));
647 len = le16_to_cpu( *( (u16 *)&b[i+2] ) ); 647 len = le16_to_cpu(*((__le16 *)&b[i+2]));
648 deb_info("firmware chunk, addr: 0x%04x, len: 0x%04x, total length: 0x%04zx\n",addr,len,fw->size); 648 deb_info("firmware chunk, addr: 0x%04x, len: 0x%04x, total length: 0x%04zx\n",addr,len,fw->size);
649 if ((ret = bcm3510_write_ram(st,addr,&b[i+4],len)) < 0) { 649 if ((ret = bcm3510_write_ram(st,addr,&b[i+4],len)) < 0) {
650 err("firmware download failed: %d\n",ret); 650 err("firmware download failed: %d\n",ret);
diff --git a/drivers/media/dvb-frontends/cxd2820r_c.c b/drivers/media/dvb-frontends/cxd2820r_c.c
index 0f4657e01cde..149fdca3fb44 100644
--- a/drivers/media/dvb-frontends/cxd2820r_c.c
+++ b/drivers/media/dvb-frontends/cxd2820r_c.c
@@ -65,7 +65,7 @@ int cxd2820r_set_frontend_c(struct dvb_frontend *fe)
65 } 65 }
66 66
67 priv->delivery_system = SYS_DVBC_ANNEX_A; 67 priv->delivery_system = SYS_DVBC_ANNEX_A;
68 priv->ber_running = 0; /* tune stops BER counter */ 68 priv->ber_running = false; /* tune stops BER counter */
69 69
70 /* program IF frequency */ 70 /* program IF frequency */
71 if (fe->ops.tuner_ops.get_if_frequency) { 71 if (fe->ops.tuner_ops.get_if_frequency) {
@@ -168,7 +168,7 @@ int cxd2820r_read_ber_c(struct dvb_frontend *fe, u32 *ber)
168 start_ber = 1; 168 start_ber = 1;
169 } 169 }
170 } else { 170 } else {
171 priv->ber_running = 1; 171 priv->ber_running = true;
172 start_ber = 1; 172 start_ber = 1;
173 } 173 }
174 174
diff --git a/drivers/media/dvb-frontends/cxd2820r_core.c b/drivers/media/dvb-frontends/cxd2820r_core.c
index 51ef89312615..422e84bbb008 100644
--- a/drivers/media/dvb-frontends/cxd2820r_core.c
+++ b/drivers/media/dvb-frontends/cxd2820r_core.c
@@ -564,10 +564,10 @@ static enum dvbfe_search cxd2820r_search(struct dvb_frontend *fe)
564 564
565 /* check if we have a valid signal */ 565 /* check if we have a valid signal */
566 if (status & FE_HAS_LOCK) { 566 if (status & FE_HAS_LOCK) {
567 priv->last_tune_failed = 0; 567 priv->last_tune_failed = false;
568 return DVBFE_ALGO_SEARCH_SUCCESS; 568 return DVBFE_ALGO_SEARCH_SUCCESS;
569 } else { 569 } else {
570 priv->last_tune_failed = 1; 570 priv->last_tune_failed = true;
571 return DVBFE_ALGO_SEARCH_AGAIN; 571 return DVBFE_ALGO_SEARCH_AGAIN;
572 } 572 }
573 573
diff --git a/drivers/media/dvb-frontends/cxd2820r_t.c b/drivers/media/dvb-frontends/cxd2820r_t.c
index 9b5a45b907bc..51401d036530 100644
--- a/drivers/media/dvb-frontends/cxd2820r_t.c
+++ b/drivers/media/dvb-frontends/cxd2820r_t.c
@@ -89,7 +89,7 @@ int cxd2820r_set_frontend_t(struct dvb_frontend *fe)
89 } 89 }
90 90
91 priv->delivery_system = SYS_DVBT; 91 priv->delivery_system = SYS_DVBT;
92 priv->ber_running = 0; /* tune stops BER counter */ 92 priv->ber_running = false; /* tune stops BER counter */
93 93
94 /* program IF frequency */ 94 /* program IF frequency */
95 if (fe->ops.tuner_ops.get_if_frequency) { 95 if (fe->ops.tuner_ops.get_if_frequency) {
@@ -272,7 +272,7 @@ int cxd2820r_read_ber_t(struct dvb_frontend *fe, u32 *ber)
272 start_ber = 1; 272 start_ber = 1;
273 } 273 }
274 } else { 274 } else {
275 priv->ber_running = 1; 275 priv->ber_running = true;
276 start_ber = 1; 276 start_ber = 1;
277 } 277 }
278 278
diff --git a/drivers/media/dvb-frontends/dib7000p.c b/drivers/media/dvb-frontends/dib7000p.c
index 661760d60232..589134e95175 100644
--- a/drivers/media/dvb-frontends/dib7000p.c
+++ b/drivers/media/dvb-frontends/dib7000p.c
@@ -2559,7 +2559,7 @@ static void dib7090_setHostBusMux(struct dib7000p_state *state, int mode)
2559 dib7000p_write_word(state, 1288, reg_1288); 2559 dib7000p_write_word(state, 1288, reg_1288);
2560} 2560}
2561 2561
2562int dib7090_set_diversity_in(struct dvb_frontend *fe, int onoff) 2562static int dib7090_set_diversity_in(struct dvb_frontend *fe, int onoff)
2563{ 2563{
2564 struct dib7000p_state *state = fe->demodulator_priv; 2564 struct dib7000p_state *state = fe->demodulator_priv;
2565 u16 reg_1287; 2565 u16 reg_1287;
diff --git a/drivers/media/dvb-frontends/drx39xyj/drxj.c b/drivers/media/dvb-frontends/drx39xyj/drxj.c
index 7ca7a21df183..5ec221ffdfca 100644
--- a/drivers/media/dvb-frontends/drx39xyj/drxj.c
+++ b/drivers/media/dvb-frontends/drx39xyj/drxj.c
@@ -2174,7 +2174,7 @@ int drxj_dap_atomic_read_reg32(struct i2c_device_addr *dev_addr,
2174 u32 addr, 2174 u32 addr,
2175 u32 *data, u32 flags) 2175 u32 *data, u32 flags)
2176{ 2176{
2177 u8 buf[sizeof(*data)]; 2177 u8 buf[sizeof(*data)] = { 0 };
2178 int rc = -EIO; 2178 int rc = -EIO;
2179 u32 word = 0; 2179 u32 word = 0;
2180 2180
@@ -4193,7 +4193,7 @@ int drxj_dap_scu_atomic_read_reg16(struct i2c_device_addr *dev_addr,
4193 u32 addr, 4193 u32 addr,
4194 u16 *data, u32 flags) 4194 u16 *data, u32 flags)
4195{ 4195{
4196 u8 buf[2]; 4196 u8 buf[2] = { 0 };
4197 int rc = -EIO; 4197 int rc = -EIO;
4198 u16 word = 0; 4198 u16 word = 0;
4199 4199
@@ -10667,7 +10667,7 @@ ctrl_sig_quality(struct drx_demod_instance *demod,
10667 enum drx_standard standard = ext_attr->standard; 10667 enum drx_standard standard = ext_attr->standard;
10668 int rc; 10668 int rc;
10669 u32 ber, cnt, err, pkt; 10669 u32 ber, cnt, err, pkt;
10670 u16 mer, strength; 10670 u16 mer, strength = 0;
10671 10671
10672 rc = get_sig_strength(demod, &strength); 10672 rc = get_sig_strength(demod, &strength);
10673 if (rc < 0) { 10673 if (rc < 0) {
@@ -11602,7 +11602,7 @@ static u16 drx_u_code_compute_crc(u8 *block_data, u16 nr_words)
11602 u32 carry = 0; 11602 u32 carry = 0;
11603 11603
11604 while (i < nr_words) { 11604 while (i < nr_words) {
11605 crc_word |= (u32)be16_to_cpu(*(u32 *)(block_data)); 11605 crc_word |= (u32)be16_to_cpu(*(__be16 *)(block_data));
11606 for (j = 0; j < 16; j++) { 11606 for (j = 0; j < 16; j++) {
11607 crc_word <<= 1; 11607 crc_word <<= 1;
11608 if (carry != 0) 11608 if (carry != 0)
@@ -11629,7 +11629,7 @@ static int drx_check_firmware(struct drx_demod_instance *demod, u8 *mc_data,
11629 int i; 11629 int i;
11630 unsigned count = 2 * sizeof(u16); 11630 unsigned count = 2 * sizeof(u16);
11631 u32 mc_dev_type, mc_version, mc_base_version; 11631 u32 mc_dev_type, mc_version, mc_base_version;
11632 u16 mc_nr_of_blks = be16_to_cpu(*(u32 *)(mc_data + sizeof(u16))); 11632 u16 mc_nr_of_blks = be16_to_cpu(*(__be16 *)(mc_data + sizeof(u16)));
11633 11633
11634 /* 11634 /*
11635 * Scan microcode blocks first for version info 11635 * Scan microcode blocks first for version info
@@ -11647,13 +11647,13 @@ static int drx_check_firmware(struct drx_demod_instance *demod, u8 *mc_data,
11647 goto eof; 11647 goto eof;
11648 11648
11649 /* Process block header */ 11649 /* Process block header */
11650 block_hdr.addr = be32_to_cpu(*(u32 *)(mc_data + count)); 11650 block_hdr.addr = be32_to_cpu(*(__be32 *)(mc_data + count));
11651 count += sizeof(u32); 11651 count += sizeof(u32);
11652 block_hdr.size = be16_to_cpu(*(u32 *)(mc_data + count)); 11652 block_hdr.size = be16_to_cpu(*(__be16 *)(mc_data + count));
11653 count += sizeof(u16); 11653 count += sizeof(u16);
11654 block_hdr.flags = be16_to_cpu(*(u32 *)(mc_data + count)); 11654 block_hdr.flags = be16_to_cpu(*(__be16 *)(mc_data + count));
11655 count += sizeof(u16); 11655 count += sizeof(u16);
11656 block_hdr.CRC = be16_to_cpu(*(u32 *)(mc_data + count)); 11656 block_hdr.CRC = be16_to_cpu(*(__be16 *)(mc_data + count));
11657 count += sizeof(u16); 11657 count += sizeof(u16);
11658 11658
11659 pr_debug("%u: addr %u, size %u, flags 0x%04x, CRC 0x%04x\n", 11659 pr_debug("%u: addr %u, size %u, flags 0x%04x, CRC 0x%04x\n",
@@ -11667,7 +11667,7 @@ static int drx_check_firmware(struct drx_demod_instance *demod, u8 *mc_data,
11667 if (block_hdr.addr + sizeof(u16) > size) 11667 if (block_hdr.addr + sizeof(u16) > size)
11668 goto eof; 11668 goto eof;
11669 11669
11670 auxtype = be16_to_cpu(*(u32 *)(auxblk)); 11670 auxtype = be16_to_cpu(*(__be16 *)(auxblk));
11671 11671
11672 /* Aux block. Check type */ 11672 /* Aux block. Check type */
11673 if (DRX_ISMCVERTYPE(auxtype)) { 11673 if (DRX_ISMCVERTYPE(auxtype)) {
@@ -11675,11 +11675,11 @@ static int drx_check_firmware(struct drx_demod_instance *demod, u8 *mc_data,
11675 goto eof; 11675 goto eof;
11676 11676
11677 auxblk += sizeof(u16); 11677 auxblk += sizeof(u16);
11678 mc_dev_type = be32_to_cpu(*(u32 *)(auxblk)); 11678 mc_dev_type = be32_to_cpu(*(__be32 *)(auxblk));
11679 auxblk += sizeof(u32); 11679 auxblk += sizeof(u32);
11680 mc_version = be32_to_cpu(*(u32 *)(auxblk)); 11680 mc_version = be32_to_cpu(*(__be32 *)(auxblk));
11681 auxblk += sizeof(u32); 11681 auxblk += sizeof(u32);
11682 mc_base_version = be32_to_cpu(*(u32 *)(auxblk)); 11682 mc_base_version = be32_to_cpu(*(__be32 *)(auxblk));
11683 11683
11684 DRX_ATTR_MCRECORD(demod).aux_type = auxtype; 11684 DRX_ATTR_MCRECORD(demod).aux_type = auxtype;
11685 DRX_ATTR_MCRECORD(demod).mc_dev_type = mc_dev_type; 11685 DRX_ATTR_MCRECORD(demod).mc_dev_type = mc_dev_type;
@@ -11765,9 +11765,9 @@ static int drx_ctrl_u_code(struct drx_demod_instance *demod,
11765 11765
11766 mc_data = (void *)mc_data_init; 11766 mc_data = (void *)mc_data_init;
11767 /* Check data */ 11767 /* Check data */
11768 mc_magic_word = be16_to_cpu(*(u32 *)(mc_data)); 11768 mc_magic_word = be16_to_cpu(*(__be16 *)(mc_data));
11769 mc_data += sizeof(u16); 11769 mc_data += sizeof(u16);
11770 mc_nr_of_blks = be16_to_cpu(*(u32 *)(mc_data)); 11770 mc_nr_of_blks = be16_to_cpu(*(__be16 *)(mc_data));
11771 mc_data += sizeof(u16); 11771 mc_data += sizeof(u16);
11772 11772
11773 if ((mc_magic_word != DRX_UCODE_MAGIC_WORD) || (mc_nr_of_blks == 0)) { 11773 if ((mc_magic_word != DRX_UCODE_MAGIC_WORD) || (mc_nr_of_blks == 0)) {
@@ -11791,13 +11791,13 @@ static int drx_ctrl_u_code(struct drx_demod_instance *demod,
11791 u16 mc_block_nr_bytes = 0; 11791 u16 mc_block_nr_bytes = 0;
11792 11792
11793 /* Process block header */ 11793 /* Process block header */
11794 block_hdr.addr = be32_to_cpu(*(u32 *)(mc_data)); 11794 block_hdr.addr = be32_to_cpu(*(__be32 *)(mc_data));
11795 mc_data += sizeof(u32); 11795 mc_data += sizeof(u32);
11796 block_hdr.size = be16_to_cpu(*(u32 *)(mc_data)); 11796 block_hdr.size = be16_to_cpu(*(__be16 *)(mc_data));
11797 mc_data += sizeof(u16); 11797 mc_data += sizeof(u16);
11798 block_hdr.flags = be16_to_cpu(*(u32 *)(mc_data)); 11798 block_hdr.flags = be16_to_cpu(*(__be16 *)(mc_data));
11799 mc_data += sizeof(u16); 11799 mc_data += sizeof(u16);
11800 block_hdr.CRC = be16_to_cpu(*(u32 *)(mc_data)); 11800 block_hdr.CRC = be16_to_cpu(*(__be16 *)(mc_data));
11801 mc_data += sizeof(u16); 11801 mc_data += sizeof(u16);
11802 11802
11803 pr_debug("%u: addr %u, size %u, flags 0x%04x, CRC 0x%04x\n", 11803 pr_debug("%u: addr %u, size %u, flags 0x%04x, CRC 0x%04x\n",
diff --git a/drivers/media/dvb-frontends/drxd_hard.c b/drivers/media/dvb-frontends/drxd_hard.c
index ae2276db77bc..687e893d29fe 100644
--- a/drivers/media/dvb-frontends/drxd_hard.c
+++ b/drivers/media/dvb-frontends/drxd_hard.c
@@ -2628,10 +2628,11 @@ static int DRXD_init(struct drxd_state *state, const u8 *fw, u32 fw_size)
2628 break; 2628 break;
2629 2629
2630 /* Apply I2c address patch to B1 */ 2630 /* Apply I2c address patch to B1 */
2631 if (!state->type_A && state->m_HiI2cPatch != NULL) 2631 if (!state->type_A && state->m_HiI2cPatch != NULL) {
2632 status = WriteTable(state, state->m_HiI2cPatch); 2632 status = WriteTable(state, state->m_HiI2cPatch);
2633 if (status < 0) 2633 if (status < 0)
2634 break; 2634 break;
2635 }
2635 2636
2636 if (state->type_A) { 2637 if (state->type_A) {
2637 /* HI firmware patch for UIO readout, 2638 /* HI firmware patch for UIO readout,
@@ -2830,14 +2831,8 @@ static int drxd_read_status(struct dvb_frontend *fe, fe_status_t * status)
2830static int drxd_init(struct dvb_frontend *fe) 2831static int drxd_init(struct dvb_frontend *fe)
2831{ 2832{
2832 struct drxd_state *state = fe->demodulator_priv; 2833 struct drxd_state *state = fe->demodulator_priv;
2833 int err = 0;
2834 2834
2835/* if (request_firmware(&state->fw, "drxd.fw", state->dev)<0) */
2836 return DRXD_init(state, NULL, 0); 2835 return DRXD_init(state, NULL, 0);
2837
2838 err = DRXD_init(state, state->fw->data, state->fw->size);
2839 release_firmware(state->fw);
2840 return err;
2841} 2836}
2842 2837
2843static int drxd_config_i2c(struct dvb_frontend *fe, int onoff) 2838static int drxd_config_i2c(struct dvb_frontend *fe, int onoff)
diff --git a/drivers/media/dvb-frontends/drxk_hard.c b/drivers/media/dvb-frontends/drxk_hard.c
index cce94a75b2e1..672195147d01 100644
--- a/drivers/media/dvb-frontends/drxk_hard.c
+++ b/drivers/media/dvb-frontends/drxk_hard.c
@@ -1028,7 +1028,7 @@ static int hi_command(struct drxk_state *state, u16 cmd, u16 *p_result)
1028 ((state->m_hi_cfg_ctrl) & 1028 ((state->m_hi_cfg_ctrl) &
1029 SIO_HI_RA_RAM_PAR_5_CFG_SLEEP__M) == 1029 SIO_HI_RA_RAM_PAR_5_CFG_SLEEP__M) ==
1030 SIO_HI_RA_RAM_PAR_5_CFG_SLEEP_ZZZ); 1030 SIO_HI_RA_RAM_PAR_5_CFG_SLEEP_ZZZ);
1031 if (powerdown_cmd == false) { 1031 if (!powerdown_cmd) {
1032 /* Wait until command rdy */ 1032 /* Wait until command rdy */
1033 u32 retry_count = 0; 1033 u32 retry_count = 0;
1034 u16 wait_cmd; 1034 u16 wait_cmd;
@@ -1129,7 +1129,7 @@ static int mpegts_configure_pins(struct drxk_state *state, bool mpeg_enable)
1129 if (status < 0) 1129 if (status < 0)
1130 goto error; 1130 goto error;
1131 1131
1132 if (mpeg_enable == false) { 1132 if (!mpeg_enable) {
1133 /* Set MPEG TS pads to inputmode */ 1133 /* Set MPEG TS pads to inputmode */
1134 status = write16(state, SIO_PDR_MSTRT_CFG__A, 0x0000); 1134 status = write16(state, SIO_PDR_MSTRT_CFG__A, 0x0000);
1135 if (status < 0) 1135 if (status < 0)
@@ -1190,7 +1190,7 @@ static int mpegts_configure_pins(struct drxk_state *state, bool mpeg_enable)
1190 if (status < 0) 1190 if (status < 0)
1191 goto error; 1191 goto error;
1192 1192
1193 if (state->m_enable_parallel == true) { 1193 if (state->m_enable_parallel) {
1194 /* parallel -> enable MD1 to MD7 */ 1194 /* parallel -> enable MD1 to MD7 */
1195 status = write16(state, SIO_PDR_MD1_CFG__A, 1195 status = write16(state, SIO_PDR_MD1_CFG__A,
1196 sio_pdr_mdx_cfg); 1196 sio_pdr_mdx_cfg);
@@ -1392,7 +1392,7 @@ static int dvbt_enable_ofdm_token_ring(struct drxk_state *state, bool enable)
1392 1392
1393 dprintk(1, "\n"); 1393 dprintk(1, "\n");
1394 1394
1395 if (enable == false) { 1395 if (!enable) {
1396 desired_ctrl = SIO_OFDM_SH_OFDM_RING_ENABLE_OFF; 1396 desired_ctrl = SIO_OFDM_SH_OFDM_RING_ENABLE_OFF;
1397 desired_status = SIO_OFDM_SH_OFDM_RING_STATUS_DOWN; 1397 desired_status = SIO_OFDM_SH_OFDM_RING_STATUS_DOWN;
1398 } 1398 }
@@ -2012,7 +2012,7 @@ static int mpegts_dto_setup(struct drxk_state *state,
2012 goto error; 2012 goto error;
2013 fec_oc_reg_mode &= (~FEC_OC_MODE_PARITY__M); 2013 fec_oc_reg_mode &= (~FEC_OC_MODE_PARITY__M);
2014 fec_oc_reg_ipr_mode &= (~FEC_OC_IPR_MODE_MVAL_DIS_PAR__M); 2014 fec_oc_reg_ipr_mode &= (~FEC_OC_IPR_MODE_MVAL_DIS_PAR__M);
2015 if (state->m_insert_rs_byte == true) { 2015 if (state->m_insert_rs_byte) {
2016 /* enable parity symbol forward */ 2016 /* enable parity symbol forward */
2017 fec_oc_reg_mode |= FEC_OC_MODE_PARITY__M; 2017 fec_oc_reg_mode |= FEC_OC_MODE_PARITY__M;
2018 /* MVAL disable during parity bytes */ 2018 /* MVAL disable during parity bytes */
@@ -2023,7 +2023,7 @@ static int mpegts_dto_setup(struct drxk_state *state,
2023 2023
2024 /* Check serial or parallel output */ 2024 /* Check serial or parallel output */
2025 fec_oc_reg_ipr_mode &= (~(FEC_OC_IPR_MODE_SERIAL__M)); 2025 fec_oc_reg_ipr_mode &= (~(FEC_OC_IPR_MODE_SERIAL__M));
2026 if (state->m_enable_parallel == false) { 2026 if (!state->m_enable_parallel) {
2027 /* MPEG data output is serial -> set ipr_mode[0] */ 2027 /* MPEG data output is serial -> set ipr_mode[0] */
2028 fec_oc_reg_ipr_mode |= FEC_OC_IPR_MODE_SERIAL__M; 2028 fec_oc_reg_ipr_mode |= FEC_OC_IPR_MODE_SERIAL__M;
2029 } 2029 }
@@ -2136,19 +2136,19 @@ static int mpegts_configure_polarity(struct drxk_state *state)
2136 2136
2137 /* Control selective inversion of output bits */ 2137 /* Control selective inversion of output bits */
2138 fec_oc_reg_ipr_invert &= (~(invert_data_mask)); 2138 fec_oc_reg_ipr_invert &= (~(invert_data_mask));
2139 if (state->m_invert_data == true) 2139 if (state->m_invert_data)
2140 fec_oc_reg_ipr_invert |= invert_data_mask; 2140 fec_oc_reg_ipr_invert |= invert_data_mask;
2141 fec_oc_reg_ipr_invert &= (~(FEC_OC_IPR_INVERT_MERR__M)); 2141 fec_oc_reg_ipr_invert &= (~(FEC_OC_IPR_INVERT_MERR__M));
2142 if (state->m_invert_err == true) 2142 if (state->m_invert_err)
2143 fec_oc_reg_ipr_invert |= FEC_OC_IPR_INVERT_MERR__M; 2143 fec_oc_reg_ipr_invert |= FEC_OC_IPR_INVERT_MERR__M;
2144 fec_oc_reg_ipr_invert &= (~(FEC_OC_IPR_INVERT_MSTRT__M)); 2144 fec_oc_reg_ipr_invert &= (~(FEC_OC_IPR_INVERT_MSTRT__M));
2145 if (state->m_invert_str == true) 2145 if (state->m_invert_str)
2146 fec_oc_reg_ipr_invert |= FEC_OC_IPR_INVERT_MSTRT__M; 2146 fec_oc_reg_ipr_invert |= FEC_OC_IPR_INVERT_MSTRT__M;
2147 fec_oc_reg_ipr_invert &= (~(FEC_OC_IPR_INVERT_MVAL__M)); 2147 fec_oc_reg_ipr_invert &= (~(FEC_OC_IPR_INVERT_MVAL__M));
2148 if (state->m_invert_val == true) 2148 if (state->m_invert_val)
2149 fec_oc_reg_ipr_invert |= FEC_OC_IPR_INVERT_MVAL__M; 2149 fec_oc_reg_ipr_invert |= FEC_OC_IPR_INVERT_MVAL__M;
2150 fec_oc_reg_ipr_invert &= (~(FEC_OC_IPR_INVERT_MCLK__M)); 2150 fec_oc_reg_ipr_invert &= (~(FEC_OC_IPR_INVERT_MCLK__M));
2151 if (state->m_invert_clk == true) 2151 if (state->m_invert_clk)
2152 fec_oc_reg_ipr_invert |= FEC_OC_IPR_INVERT_MCLK__M; 2152 fec_oc_reg_ipr_invert |= FEC_OC_IPR_INVERT_MCLK__M;
2153 2153
2154 return write16(state, FEC_OC_IPR_INVERT__A, fec_oc_reg_ipr_invert); 2154 return write16(state, FEC_OC_IPR_INVERT__A, fec_oc_reg_ipr_invert);
@@ -2220,12 +2220,13 @@ static int set_agc_rf(struct drxk_state *state,
2220 } 2220 }
2221 2221
2222 /* Set TOP, only if IF-AGC is in AUTO mode */ 2222 /* Set TOP, only if IF-AGC is in AUTO mode */
2223 if (p_if_agc_settings->ctrl_mode == DRXK_AGC_CTRL_AUTO) 2223 if (p_if_agc_settings->ctrl_mode == DRXK_AGC_CTRL_AUTO) {
2224 status = write16(state, 2224 status = write16(state,
2225 SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A, 2225 SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A,
2226 p_agc_cfg->top); 2226 p_agc_cfg->top);
2227 if (status < 0) 2227 if (status < 0)
2228 goto error; 2228 goto error;
2229 }
2229 2230
2230 /* Cut-Off current */ 2231 /* Cut-Off current */
2231 status = write16(state, SCU_RAM_AGC_RF_IACCU_HI_CO__A, 2232 status = write16(state, SCU_RAM_AGC_RF_IACCU_HI_CO__A,
@@ -3352,7 +3353,7 @@ static int dvbt_ctrl_set_inc_enable(struct drxk_state *state, bool *enabled)
3352 int status; 3353 int status;
3353 3354
3354 dprintk(1, "\n"); 3355 dprintk(1, "\n");
3355 if (*enabled == true) 3356 if (*enabled)
3356 status = write16(state, IQM_CF_BYPASSDET__A, 0); 3357 status = write16(state, IQM_CF_BYPASSDET__A, 0);
3357 else 3358 else
3358 status = write16(state, IQM_CF_BYPASSDET__A, 1); 3359 status = write16(state, IQM_CF_BYPASSDET__A, 1);
@@ -3368,7 +3369,7 @@ static int dvbt_ctrl_set_fr_enable(struct drxk_state *state, bool *enabled)
3368 int status; 3369 int status;
3369 3370
3370 dprintk(1, "\n"); 3371 dprintk(1, "\n");
3371 if (*enabled == true) { 3372 if (*enabled) {
3372 /* write mask to 1 */ 3373 /* write mask to 1 */
3373 status = write16(state, OFDM_SC_RA_RAM_FR_THRES_8K__A, 3374 status = write16(state, OFDM_SC_RA_RAM_FR_THRES_8K__A,
3374 DEFAULT_FR_THRES_8K); 3375 DEFAULT_FR_THRES_8K);
@@ -6794,11 +6795,11 @@ struct dvb_frontend *drxk_attach(const struct drxk_config *config,
6794 state->enable_merr_cfg = config->enable_merr_cfg; 6795 state->enable_merr_cfg = config->enable_merr_cfg;
6795 6796
6796 if (config->dynamic_clk) { 6797 if (config->dynamic_clk) {
6797 state->m_dvbt_static_clk = 0; 6798 state->m_dvbt_static_clk = false;
6798 state->m_dvbc_static_clk = 0; 6799 state->m_dvbc_static_clk = false;
6799 } else { 6800 } else {
6800 state->m_dvbt_static_clk = 1; 6801 state->m_dvbt_static_clk = true;
6801 state->m_dvbc_static_clk = 1; 6802 state->m_dvbc_static_clk = true;
6802 } 6803 }
6803 6804
6804 6805
diff --git a/drivers/media/dvb-frontends/m88ds3103.c b/drivers/media/dvb-frontends/m88ds3103.c
index dfe0c2f7f1ef..81657e94c5a4 100644
--- a/drivers/media/dvb-frontends/m88ds3103.c
+++ b/drivers/media/dvb-frontends/m88ds3103.c
@@ -159,6 +159,7 @@ static int m88ds3103_wr_reg_val_tab(struct m88ds3103_priv *priv,
159{ 159{
160 int ret, i, j; 160 int ret, i, j;
161 u8 buf[83]; 161 u8 buf[83];
162
162 dev_dbg(&priv->i2c->dev, "%s: tab_len=%d\n", __func__, tab_len); 163 dev_dbg(&priv->i2c->dev, "%s: tab_len=%d\n", __func__, tab_len);
163 164
164 if (tab_len > 83) { 165 if (tab_len > 83) {
@@ -247,8 +248,9 @@ static int m88ds3103_set_frontend(struct dvb_frontend *fe)
247 u8 u8tmp, u8tmp1, u8tmp2; 248 u8 u8tmp, u8tmp1, u8tmp2;
248 u8 buf[2]; 249 u8 buf[2];
249 u16 u16tmp, divide_ratio; 250 u16 u16tmp, divide_ratio;
250 u32 tuner_frequency, target_mclk, ts_clk; 251 u32 tuner_frequency, target_mclk;
251 s32 s32tmp; 252 s32 s32tmp;
253
252 dev_dbg(&priv->i2c->dev, 254 dev_dbg(&priv->i2c->dev,
253 "%s: delivery_system=%d modulation=%d frequency=%d symbol_rate=%d inversion=%d pilot=%d rolloff=%d\n", 255 "%s: delivery_system=%d modulation=%d frequency=%d symbol_rate=%d inversion=%d pilot=%d rolloff=%d\n",
254 __func__, c->delivery_system, 256 __func__, c->delivery_system,
@@ -316,9 +318,6 @@ static int m88ds3103_set_frontend(struct dvb_frontend *fe)
316 target_mclk = 144000; 318 target_mclk = 144000;
317 break; 319 break;
318 case M88DS3103_TS_PARALLEL: 320 case M88DS3103_TS_PARALLEL:
319 case M88DS3103_TS_PARALLEL_12:
320 case M88DS3103_TS_PARALLEL_16:
321 case M88DS3103_TS_PARALLEL_19_2:
322 case M88DS3103_TS_CI: 321 case M88DS3103_TS_CI:
323 if (c->symbol_rate < 18000000) 322 if (c->symbol_rate < 18000000)
324 target_mclk = 96000; 323 target_mclk = 96000;
@@ -352,33 +351,17 @@ static int m88ds3103_set_frontend(struct dvb_frontend *fe)
352 switch (priv->cfg->ts_mode) { 351 switch (priv->cfg->ts_mode) {
353 case M88DS3103_TS_SERIAL: 352 case M88DS3103_TS_SERIAL:
354 u8tmp1 = 0x00; 353 u8tmp1 = 0x00;
355 ts_clk = 0; 354 u8tmp = 0x06;
356 u8tmp = 0x46;
357 break; 355 break;
358 case M88DS3103_TS_SERIAL_D7: 356 case M88DS3103_TS_SERIAL_D7:
359 u8tmp1 = 0x20; 357 u8tmp1 = 0x20;
360 ts_clk = 0; 358 u8tmp = 0x06;
361 u8tmp = 0x46;
362 break; 359 break;
363 case M88DS3103_TS_PARALLEL: 360 case M88DS3103_TS_PARALLEL:
364 ts_clk = 24000; 361 u8tmp = 0x02;
365 u8tmp = 0x42;
366 break;
367 case M88DS3103_TS_PARALLEL_12:
368 ts_clk = 12000;
369 u8tmp = 0x42;
370 break;
371 case M88DS3103_TS_PARALLEL_16:
372 ts_clk = 16000;
373 u8tmp = 0x42;
374 break;
375 case M88DS3103_TS_PARALLEL_19_2:
376 ts_clk = 19200;
377 u8tmp = 0x42;
378 break; 362 break;
379 case M88DS3103_TS_CI: 363 case M88DS3103_TS_CI:
380 ts_clk = 6000; 364 u8tmp = 0x03;
381 u8tmp = 0x43;
382 break; 365 break;
383 default: 366 default:
384 dev_dbg(&priv->i2c->dev, "%s: invalid ts_mode\n", __func__); 367 dev_dbg(&priv->i2c->dev, "%s: invalid ts_mode\n", __func__);
@@ -386,6 +369,9 @@ static int m88ds3103_set_frontend(struct dvb_frontend *fe)
386 goto err; 369 goto err;
387 } 370 }
388 371
372 if (priv->cfg->ts_clk_pol)
373 u8tmp |= 0x40;
374
389 /* TS mode */ 375 /* TS mode */
390 ret = m88ds3103_wr_reg(priv, 0xfd, u8tmp); 376 ret = m88ds3103_wr_reg(priv, 0xfd, u8tmp);
391 if (ret) 377 if (ret)
@@ -399,8 +385,8 @@ static int m88ds3103_set_frontend(struct dvb_frontend *fe)
399 goto err; 385 goto err;
400 } 386 }
401 387
402 if (ts_clk) { 388 if (priv->cfg->ts_clk) {
403 divide_ratio = DIV_ROUND_UP(target_mclk, ts_clk); 389 divide_ratio = DIV_ROUND_UP(target_mclk, priv->cfg->ts_clk);
404 u8tmp1 = divide_ratio / 2; 390 u8tmp1 = divide_ratio / 2;
405 u8tmp2 = DIV_ROUND_UP(divide_ratio, 2); 391 u8tmp2 = DIV_ROUND_UP(divide_ratio, 2);
406 } else { 392 } else {
@@ -411,7 +397,7 @@ static int m88ds3103_set_frontend(struct dvb_frontend *fe)
411 397
412 dev_dbg(&priv->i2c->dev, 398 dev_dbg(&priv->i2c->dev,
413 "%s: target_mclk=%d ts_clk=%d divide_ratio=%d\n", 399 "%s: target_mclk=%d ts_clk=%d divide_ratio=%d\n",
414 __func__, target_mclk, ts_clk, divide_ratio); 400 __func__, target_mclk, priv->cfg->ts_clk, divide_ratio);
415 401
416 u8tmp1--; 402 u8tmp1--;
417 u8tmp2--; 403 u8tmp2--;
@@ -536,6 +522,7 @@ static int m88ds3103_init(struct dvb_frontend *fe)
536 const struct firmware *fw = NULL; 522 const struct firmware *fw = NULL;
537 u8 *fw_file = M88DS3103_FIRMWARE; 523 u8 *fw_file = M88DS3103_FIRMWARE;
538 u8 u8tmp; 524 u8 u8tmp;
525
539 dev_dbg(&priv->i2c->dev, "%s:\n", __func__); 526 dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
540 527
541 /* set cold state by default */ 528 /* set cold state by default */
@@ -648,6 +635,7 @@ static int m88ds3103_sleep(struct dvb_frontend *fe)
648{ 635{
649 struct m88ds3103_priv *priv = fe->demodulator_priv; 636 struct m88ds3103_priv *priv = fe->demodulator_priv;
650 int ret; 637 int ret;
638
651 dev_dbg(&priv->i2c->dev, "%s:\n", __func__); 639 dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
652 640
653 priv->delivery_system = SYS_UNDEFINED; 641 priv->delivery_system = SYS_UNDEFINED;
@@ -682,6 +670,7 @@ static int m88ds3103_get_frontend(struct dvb_frontend *fe)
682 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 670 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
683 int ret; 671 int ret;
684 u8 buf[3]; 672 u8 buf[3];
673
685 dev_dbg(&priv->i2c->dev, "%s:\n", __func__); 674 dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
686 675
687 if (!priv->warm || !(priv->fe_status & FE_HAS_LOCK)) { 676 if (!priv->warm || !(priv->fe_status & FE_HAS_LOCK)) {
@@ -857,6 +846,7 @@ static int m88ds3103_read_snr(struct dvb_frontend *fe, u16 *snr)
857 u8 buf[3]; 846 u8 buf[3];
858 u16 noise, signal; 847 u16 noise, signal;
859 u32 noise_tot, signal_tot; 848 u32 noise_tot, signal_tot;
849
860 dev_dbg(&priv->i2c->dev, "%s:\n", __func__); 850 dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
861 /* reports SNR in resolution of 0.1 dB */ 851 /* reports SNR in resolution of 0.1 dB */
862 852
@@ -933,6 +923,7 @@ static int m88ds3103_read_ber(struct dvb_frontend *fe, u32 *ber)
933 int ret; 923 int ret;
934 unsigned int utmp; 924 unsigned int utmp;
935 u8 buf[3], u8tmp; 925 u8 buf[3], u8tmp;
926
936 dev_dbg(&priv->i2c->dev, "%s:\n", __func__); 927 dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
937 928
938 switch (c->delivery_system) { 929 switch (c->delivery_system) {
@@ -1013,6 +1004,7 @@ static int m88ds3103_set_tone(struct dvb_frontend *fe,
1013 struct m88ds3103_priv *priv = fe->demodulator_priv; 1004 struct m88ds3103_priv *priv = fe->demodulator_priv;
1014 int ret; 1005 int ret;
1015 u8 u8tmp, tone, reg_a1_mask; 1006 u8 u8tmp, tone, reg_a1_mask;
1007
1016 dev_dbg(&priv->i2c->dev, "%s: fe_sec_tone_mode=%d\n", __func__, 1008 dev_dbg(&priv->i2c->dev, "%s: fe_sec_tone_mode=%d\n", __func__,
1017 fe_sec_tone_mode); 1009 fe_sec_tone_mode);
1018 1010
@@ -1053,12 +1045,64 @@ err:
1053 return ret; 1045 return ret;
1054} 1046}
1055 1047
1048static int m88ds3103_set_voltage(struct dvb_frontend *fe,
1049 fe_sec_voltage_t fe_sec_voltage)
1050{
1051 struct m88ds3103_priv *priv = fe->demodulator_priv;
1052 int ret;
1053 u8 u8tmp;
1054 bool voltage_sel, voltage_dis;
1055
1056 dev_dbg(&priv->i2c->dev, "%s: fe_sec_voltage=%d\n", __func__,
1057 fe_sec_voltage);
1058
1059 if (!priv->warm) {
1060 ret = -EAGAIN;
1061 goto err;
1062 }
1063
1064 switch (fe_sec_voltage) {
1065 case SEC_VOLTAGE_18:
1066 voltage_sel = true;
1067 voltage_dis = false;
1068 break;
1069 case SEC_VOLTAGE_13:
1070 voltage_sel = false;
1071 voltage_dis = false;
1072 break;
1073 case SEC_VOLTAGE_OFF:
1074 voltage_sel = false;
1075 voltage_dis = true;
1076 break;
1077 default:
1078 dev_dbg(&priv->i2c->dev, "%s: invalid fe_sec_voltage\n",
1079 __func__);
1080 ret = -EINVAL;
1081 goto err;
1082 }
1083
1084 /* output pin polarity */
1085 voltage_sel ^= priv->cfg->lnb_hv_pol;
1086 voltage_dis ^= priv->cfg->lnb_en_pol;
1087
1088 u8tmp = voltage_dis << 1 | voltage_sel << 0;
1089 ret = m88ds3103_wr_reg_mask(priv, 0xa2, u8tmp, 0x03);
1090 if (ret)
1091 goto err;
1092
1093 return 0;
1094err:
1095 dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
1096 return ret;
1097}
1098
1056static int m88ds3103_diseqc_send_master_cmd(struct dvb_frontend *fe, 1099static int m88ds3103_diseqc_send_master_cmd(struct dvb_frontend *fe,
1057 struct dvb_diseqc_master_cmd *diseqc_cmd) 1100 struct dvb_diseqc_master_cmd *diseqc_cmd)
1058{ 1101{
1059 struct m88ds3103_priv *priv = fe->demodulator_priv; 1102 struct m88ds3103_priv *priv = fe->demodulator_priv;
1060 int ret, i; 1103 int ret, i;
1061 u8 u8tmp; 1104 u8 u8tmp;
1105
1062 dev_dbg(&priv->i2c->dev, "%s: msg=%*ph\n", __func__, 1106 dev_dbg(&priv->i2c->dev, "%s: msg=%*ph\n", __func__,
1063 diseqc_cmd->msg_len, diseqc_cmd->msg); 1107 diseqc_cmd->msg_len, diseqc_cmd->msg);
1064 1108
@@ -1130,6 +1174,7 @@ static int m88ds3103_diseqc_send_burst(struct dvb_frontend *fe,
1130 struct m88ds3103_priv *priv = fe->demodulator_priv; 1174 struct m88ds3103_priv *priv = fe->demodulator_priv;
1131 int ret, i; 1175 int ret, i;
1132 u8 u8tmp, burst; 1176 u8 u8tmp, burst;
1177
1133 dev_dbg(&priv->i2c->dev, "%s: fe_sec_mini_cmd=%d\n", __func__, 1178 dev_dbg(&priv->i2c->dev, "%s: fe_sec_mini_cmd=%d\n", __func__,
1134 fe_sec_mini_cmd); 1179 fe_sec_mini_cmd);
1135 1180
@@ -1202,6 +1247,7 @@ static int m88ds3103_get_tune_settings(struct dvb_frontend *fe,
1202static void m88ds3103_release(struct dvb_frontend *fe) 1247static void m88ds3103_release(struct dvb_frontend *fe)
1203{ 1248{
1204 struct m88ds3103_priv *priv = fe->demodulator_priv; 1249 struct m88ds3103_priv *priv = fe->demodulator_priv;
1250
1205 i2c_del_mux_adapter(priv->i2c_adapter); 1251 i2c_del_mux_adapter(priv->i2c_adapter);
1206 kfree(priv); 1252 kfree(priv);
1207} 1253}
@@ -1370,6 +1416,7 @@ static struct dvb_frontend_ops m88ds3103_ops = {
1370 .diseqc_send_burst = m88ds3103_diseqc_send_burst, 1416 .diseqc_send_burst = m88ds3103_diseqc_send_burst,
1371 1417
1372 .set_tone = m88ds3103_set_tone, 1418 .set_tone = m88ds3103_set_tone,
1419 .set_voltage = m88ds3103_set_voltage,
1373}; 1420};
1374 1421
1375MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>"); 1422MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
diff --git a/drivers/media/dvb-frontends/m88ds3103.h b/drivers/media/dvb-frontends/m88ds3103.h
index bbb7e3aa5675..9b3b4962da7c 100644
--- a/drivers/media/dvb-frontends/m88ds3103.h
+++ b/drivers/media/dvb-frontends/m88ds3103.h
@@ -47,14 +47,23 @@ struct m88ds3103_config {
47 */ 47 */
48#define M88DS3103_TS_SERIAL 0 /* TS output pin D0, normal */ 48#define M88DS3103_TS_SERIAL 0 /* TS output pin D0, normal */
49#define M88DS3103_TS_SERIAL_D7 1 /* TS output pin D7 */ 49#define M88DS3103_TS_SERIAL_D7 1 /* TS output pin D7 */
50#define M88DS3103_TS_PARALLEL 2 /* 24 MHz, normal */ 50#define M88DS3103_TS_PARALLEL 2 /* TS Parallel mode */
51#define M88DS3103_TS_PARALLEL_12 3 /* 12 MHz */ 51#define M88DS3103_TS_CI 3 /* TS CI Mode */
52#define M88DS3103_TS_PARALLEL_16 4 /* 16 MHz */
53#define M88DS3103_TS_PARALLEL_19_2 5 /* 19.2 MHz */
54#define M88DS3103_TS_CI 6 /* 6 MHz */
55 u8 ts_mode; 52 u8 ts_mode;
56 53
57 /* 54 /*
55 * TS clk in KHz
56 * Default: 0.
57 */
58 u32 ts_clk;
59
60 /*
61 * TS clk polarity.
62 * Default: 0. 1-active at falling edge; 0-active at rising edge.
63 */
64 u8 ts_clk_pol:1;
65
66 /*
58 * spectrum inversion 67 * spectrum inversion
59 * Default: 0 68 * Default: 0
60 */ 69 */
@@ -86,6 +95,22 @@ struct m88ds3103_config {
86 * Default: none, must set 95 * Default: none, must set
87 */ 96 */
88 u8 agc; 97 u8 agc;
98
99 /*
100 * LNB H/V pin polarity
101 * Default: 0.
102 * 1: pin high set to VOLTAGE_13, pin low to set VOLTAGE_18.
103 * 0: pin high set to VOLTAGE_18, pin low to set VOLTAGE_13.
104 */
105 u8 lnb_hv_pol:1;
106
107 /*
108 * LNB enable pin polarity
109 * Default: 0.
110 * 1: pin high to enable, pin low to disable.
111 * 0: pin high to disable, pin low to enable.
112 */
113 u8 lnb_en_pol:1;
89}; 114};
90 115
91/* 116/*
diff --git a/drivers/media/dvb-frontends/mb86a16.c b/drivers/media/dvb-frontends/mb86a16.c
index 9ae40abfd71a..3ddea4471d2b 100644
--- a/drivers/media/dvb-frontends/mb86a16.c
+++ b/drivers/media/dvb-frontends/mb86a16.c
@@ -28,7 +28,7 @@
28#include "mb86a16.h" 28#include "mb86a16.h"
29#include "mb86a16_priv.h" 29#include "mb86a16_priv.h"
30 30
31unsigned int verbose = 5; 31static unsigned int verbose = 5;
32module_param(verbose, int, 0644); 32module_param(verbose, int, 0644);
33 33
34#define ABS(x) ((x) < 0 ? (-x) : (x)) 34#define ABS(x) ((x) < 0 ? (-x) : (x))
@@ -115,9 +115,11 @@ static int mb86a16_read(struct mb86a16_state *state, u8 reg, u8 *val)
115 }; 115 };
116 ret = i2c_transfer(state->i2c_adap, msg, 2); 116 ret = i2c_transfer(state->i2c_adap, msg, 2);
117 if (ret != 2) { 117 if (ret != 2) {
118 dprintk(verbose, MB86A16_ERROR, 1, "read error(reg=0x%02x, ret=0x%i)", 118 dprintk(verbose, MB86A16_ERROR, 1, "read error(reg=0x%02x, ret=%i)",
119 reg, ret); 119 reg, ret);
120 120
121 if (ret < 0)
122 return ret;
121 return -EREMOTEIO; 123 return -EREMOTEIO;
122 } 124 }
123 *val = b1[0]; 125 *val = b1[0];
diff --git a/drivers/media/dvb-frontends/mb86a20s.c b/drivers/media/dvb-frontends/mb86a20s.c
index b931179c70a4..e6f165a5b90d 100644
--- a/drivers/media/dvb-frontends/mb86a20s.c
+++ b/drivers/media/dvb-frontends/mb86a20s.c
@@ -33,7 +33,7 @@ enum mb86a20s_bandwidth {
33 MB86A20S_3SEG = 3, 33 MB86A20S_3SEG = 3,
34}; 34};
35 35
36u8 mb86a20s_subchannel[] = { 36static u8 mb86a20s_subchannel[] = {
37 0xb0, 0xc0, 0xd0, 0xe0, 37 0xb0, 0xc0, 0xd0, 0xe0,
38 0xf0, 0x00, 0x10, 0x20, 38 0xf0, 0x00, 0x10, 0x20,
39}; 39};
@@ -1228,7 +1228,7 @@ struct linear_segments {
1228 * All tables below return a dB/1000 measurement 1228 * All tables below return a dB/1000 measurement
1229 */ 1229 */
1230 1230
1231static struct linear_segments cnr_to_db_table[] = { 1231static const struct linear_segments cnr_to_db_table[] = {
1232 { 19648, 0}, 1232 { 19648, 0},
1233 { 18187, 1000}, 1233 { 18187, 1000},
1234 { 16534, 2000}, 1234 { 16534, 2000},
@@ -1262,7 +1262,7 @@ static struct linear_segments cnr_to_db_table[] = {
1262 { 788, 30000}, 1262 { 788, 30000},
1263}; 1263};
1264 1264
1265static struct linear_segments cnr_64qam_table[] = { 1265static const struct linear_segments cnr_64qam_table[] = {
1266 { 3922688, 0}, 1266 { 3922688, 0},
1267 { 3920384, 1000}, 1267 { 3920384, 1000},
1268 { 3902720, 2000}, 1268 { 3902720, 2000},
@@ -1296,7 +1296,7 @@ static struct linear_segments cnr_64qam_table[] = {
1296 { 388864, 30000}, 1296 { 388864, 30000},
1297}; 1297};
1298 1298
1299static struct linear_segments cnr_16qam_table[] = { 1299static const struct linear_segments cnr_16qam_table[] = {
1300 { 5314816, 0}, 1300 { 5314816, 0},
1301 { 5219072, 1000}, 1301 { 5219072, 1000},
1302 { 5118720, 2000}, 1302 { 5118720, 2000},
@@ -1330,7 +1330,7 @@ static struct linear_segments cnr_16qam_table[] = {
1330 { 95744, 30000}, 1330 { 95744, 30000},
1331}; 1331};
1332 1332
1333struct linear_segments cnr_qpsk_table[] = { 1333static const struct linear_segments cnr_qpsk_table[] = {
1334 { 2834176, 0}, 1334 { 2834176, 0},
1335 { 2683648, 1000}, 1335 { 2683648, 1000},
1336 { 2536960, 2000}, 1336 { 2536960, 2000},
@@ -1364,7 +1364,7 @@ struct linear_segments cnr_qpsk_table[] = {
1364 { 11520, 30000}, 1364 { 11520, 30000},
1365}; 1365};
1366 1366
1367static u32 interpolate_value(u32 value, struct linear_segments *segments, 1367static u32 interpolate_value(u32 value, const struct linear_segments *segments,
1368 unsigned len) 1368 unsigned len)
1369{ 1369{
1370 u64 tmp64; 1370 u64 tmp64;
@@ -1448,7 +1448,7 @@ static int mb86a20s_get_blk_error_layer_CNR(struct dvb_frontend *fe)
1448 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 1448 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1449 u32 mer, cnr; 1449 u32 mer, cnr;
1450 int rc, val, layer; 1450 int rc, val, layer;
1451 struct linear_segments *segs; 1451 const struct linear_segments *segs;
1452 unsigned segs_len; 1452 unsigned segs_len;
1453 1453
1454 dev_dbg(&state->i2c->dev, "%s called.\n", __func__); 1454 dev_dbg(&state->i2c->dev, "%s called.\n", __func__);
diff --git a/drivers/media/dvb-frontends/mt312.c b/drivers/media/dvb-frontends/mt312.c
index a74ac0ddb833..2163490c1e6b 100644
--- a/drivers/media/dvb-frontends/mt312.c
+++ b/drivers/media/dvb-frontends/mt312.c
@@ -103,7 +103,7 @@ static int mt312_write(struct mt312_state *state, const enum mt312_reg_addr reg,
103 103
104 if (1 + count > sizeof(buf)) { 104 if (1 + count > sizeof(buf)) {
105 printk(KERN_WARNING 105 printk(KERN_WARNING
106 "mt312: write: len=%zd is too big!\n", count); 106 "mt312: write: len=%zu is too big!\n", count);
107 return -EINVAL; 107 return -EINVAL;
108 } 108 }
109 109
diff --git a/drivers/media/dvb-frontends/or51211.c b/drivers/media/dvb-frontends/or51211.c
index 10cfc0579168..873ea1da844b 100644
--- a/drivers/media/dvb-frontends/or51211.c
+++ b/drivers/media/dvb-frontends/or51211.c
@@ -111,7 +111,7 @@ static int or51211_load_firmware (struct dvb_frontend* fe,
111 u8 tudata[585]; 111 u8 tudata[585];
112 int i; 112 int i;
113 113
114 dprintk("Firmware is %zd bytes\n",fw->size); 114 dprintk("Firmware is %zu bytes\n", fw->size);
115 115
116 /* Get eprom data */ 116 /* Get eprom data */
117 tudata[0] = 17; 117 tudata[0] = 17;
diff --git a/drivers/media/dvb-frontends/rtl2832.c b/drivers/media/dvb-frontends/rtl2832.c
index fdbed35c87fa..eb737cf29a36 100644
--- a/drivers/media/dvb-frontends/rtl2832.c
+++ b/drivers/media/dvb-frontends/rtl2832.c
@@ -936,7 +936,7 @@ static void rtl2832_i2c_gate_work(struct work_struct *work)
936 if (ret != 1) 936 if (ret != 1)
937 goto err; 937 goto err;
938 938
939 priv->i2c_gate_state = 0; 939 priv->i2c_gate_state = false;
940 940
941 return; 941 return;
942err: 942err:
diff --git a/drivers/media/dvb-frontends/rtl2832_sdr.c b/drivers/media/dvb-frontends/rtl2832_sdr.c
index 023e0f49c786..7bf98cf6bbe1 100644
--- a/drivers/media/dvb-frontends/rtl2832_sdr.c
+++ b/drivers/media/dvb-frontends/rtl2832_sdr.c
@@ -329,7 +329,7 @@ static int rtl2832_sdr_rd_reg_mask(struct rtl2832_sdr_state *s, u16 reg,
329static struct rtl2832_sdr_frame_buf *rtl2832_sdr_get_next_fill_buf( 329static struct rtl2832_sdr_frame_buf *rtl2832_sdr_get_next_fill_buf(
330 struct rtl2832_sdr_state *s) 330 struct rtl2832_sdr_state *s)
331{ 331{
332 unsigned long flags = 0; 332 unsigned long flags;
333 struct rtl2832_sdr_frame_buf *buf = NULL; 333 struct rtl2832_sdr_frame_buf *buf = NULL;
334 334
335 spin_lock_irqsave(&s->queued_bufs_lock, flags); 335 spin_lock_irqsave(&s->queued_bufs_lock, flags);
@@ -365,17 +365,19 @@ static unsigned int rtl2832_sdr_convert_stream(struct rtl2832_sdr_state *s,
365 dst_len = 0; 365 dst_len = 0;
366 } 366 }
367 367
368 /* calculate samping rate and output it in 10 seconds intervals */ 368 /* calculate sample rate and output it in 10 seconds intervals */
369 if (unlikely(time_is_before_jiffies(s->jiffies_next))) { 369 if (unlikely(time_is_before_jiffies(s->jiffies_next))) {
370#define MSECS 10000UL 370 #define MSECS 10000UL
371 unsigned int msecs = jiffies_to_msecs(jiffies -
372 s->jiffies_next + msecs_to_jiffies(MSECS));
371 unsigned int samples = s->sample - s->sample_measured; 373 unsigned int samples = s->sample - s->sample_measured;
372 374
373 s->jiffies_next = jiffies + msecs_to_jiffies(MSECS); 375 s->jiffies_next = jiffies + msecs_to_jiffies(MSECS);
374 s->sample_measured = s->sample; 376 s->sample_measured = s->sample;
375 dev_dbg(&s->udev->dev, 377 dev_dbg(&s->udev->dev,
376 "slen=%d samples=%u msecs=%lu sampling rate=%lu\n", 378 "slen=%u samples=%u msecs=%u sample rate=%lu\n",
377 src_len, samples, MSECS, 379 src_len, samples, msecs,
378 samples * 1000UL / MSECS); 380 samples * 1000UL / msecs);
379 } 381 }
380 382
381 /* total number of I+Q pairs */ 383 /* total number of I+Q pairs */
@@ -394,8 +396,8 @@ static void rtl2832_sdr_urb_complete(struct urb *urb)
394 struct rtl2832_sdr_frame_buf *fbuf; 396 struct rtl2832_sdr_frame_buf *fbuf;
395 397
396 dev_dbg_ratelimited(&s->udev->dev, 398 dev_dbg_ratelimited(&s->udev->dev,
397 "%s: status=%d length=%d/%d errors=%d\n", 399 "status=%d length=%d/%d errors=%d\n",
398 __func__, urb->status, urb->actual_length, 400 urb->status, urb->actual_length,
399 urb->transfer_buffer_length, urb->error_count); 401 urb->transfer_buffer_length, urb->error_count);
400 402
401 switch (urb->status) { 403 switch (urb->status) {
@@ -443,7 +445,7 @@ static int rtl2832_sdr_kill_urbs(struct rtl2832_sdr_state *s)
443 int i; 445 int i;
444 446
445 for (i = s->urbs_submitted - 1; i >= 0; i--) { 447 for (i = s->urbs_submitted - 1; i >= 0; i--) {
446 dev_dbg(&s->udev->dev, "%s: kill urb=%d\n", __func__, i); 448 dev_dbg(&s->udev->dev, "kill urb=%d\n", i);
447 /* stop the URB */ 449 /* stop the URB */
448 usb_kill_urb(s->urb_list[i]); 450 usb_kill_urb(s->urb_list[i]);
449 } 451 }
@@ -457,7 +459,7 @@ static int rtl2832_sdr_submit_urbs(struct rtl2832_sdr_state *s)
457 int i, ret; 459 int i, ret;
458 460
459 for (i = 0; i < s->urbs_initialized; i++) { 461 for (i = 0; i < s->urbs_initialized; i++) {
460 dev_dbg(&s->udev->dev, "%s: submit urb=%d\n", __func__, i); 462 dev_dbg(&s->udev->dev, "submit urb=%d\n", i);
461 ret = usb_submit_urb(s->urb_list[i], GFP_ATOMIC); 463 ret = usb_submit_urb(s->urb_list[i], GFP_ATOMIC);
462 if (ret) { 464 if (ret) {
463 dev_err(&s->udev->dev, 465 dev_err(&s->udev->dev,
@@ -477,8 +479,7 @@ static int rtl2832_sdr_free_stream_bufs(struct rtl2832_sdr_state *s)
477 if (s->flags & USB_STATE_URB_BUF) { 479 if (s->flags & USB_STATE_URB_BUF) {
478 while (s->buf_num) { 480 while (s->buf_num) {
479 s->buf_num--; 481 s->buf_num--;
480 dev_dbg(&s->udev->dev, "%s: free buf=%d\n", 482 dev_dbg(&s->udev->dev, "free buf=%d\n", s->buf_num);
481 __func__, s->buf_num);
482 usb_free_coherent(s->udev, s->buf_size, 483 usb_free_coherent(s->udev, s->buf_size,
483 s->buf_list[s->buf_num], 484 s->buf_list[s->buf_num],
484 s->dma_addr[s->buf_num]); 485 s->dma_addr[s->buf_num]);
@@ -494,24 +495,22 @@ static int rtl2832_sdr_alloc_stream_bufs(struct rtl2832_sdr_state *s)
494 s->buf_num = 0; 495 s->buf_num = 0;
495 s->buf_size = BULK_BUFFER_SIZE; 496 s->buf_size = BULK_BUFFER_SIZE;
496 497
497 dev_dbg(&s->udev->dev, 498 dev_dbg(&s->udev->dev, "all in all I will use %u bytes for streaming\n",
498 "%s: all in all I will use %u bytes for streaming\n", 499 MAX_BULK_BUFS * BULK_BUFFER_SIZE);
499 __func__, MAX_BULK_BUFS * BULK_BUFFER_SIZE);
500 500
501 for (s->buf_num = 0; s->buf_num < MAX_BULK_BUFS; s->buf_num++) { 501 for (s->buf_num = 0; s->buf_num < MAX_BULK_BUFS; s->buf_num++) {
502 s->buf_list[s->buf_num] = usb_alloc_coherent(s->udev, 502 s->buf_list[s->buf_num] = usb_alloc_coherent(s->udev,
503 BULK_BUFFER_SIZE, GFP_ATOMIC, 503 BULK_BUFFER_SIZE, GFP_ATOMIC,
504 &s->dma_addr[s->buf_num]); 504 &s->dma_addr[s->buf_num]);
505 if (!s->buf_list[s->buf_num]) { 505 if (!s->buf_list[s->buf_num]) {
506 dev_dbg(&s->udev->dev, "%s: alloc buf=%d failed\n", 506 dev_dbg(&s->udev->dev, "alloc buf=%d failed\n",
507 __func__, s->buf_num); 507 s->buf_num);
508 rtl2832_sdr_free_stream_bufs(s); 508 rtl2832_sdr_free_stream_bufs(s);
509 return -ENOMEM; 509 return -ENOMEM;
510 } 510 }
511 511
512 dev_dbg(&s->udev->dev, "%s: alloc buf=%d %p (dma %llu)\n", 512 dev_dbg(&s->udev->dev, "alloc buf=%d %p (dma %llu)\n",
513 __func__, s->buf_num, 513 s->buf_num, s->buf_list[s->buf_num],
514 s->buf_list[s->buf_num],
515 (long long)s->dma_addr[s->buf_num]); 514 (long long)s->dma_addr[s->buf_num]);
516 s->flags |= USB_STATE_URB_BUF; 515 s->flags |= USB_STATE_URB_BUF;
517 } 516 }
@@ -527,8 +526,7 @@ static int rtl2832_sdr_free_urbs(struct rtl2832_sdr_state *s)
527 526
528 for (i = s->urbs_initialized - 1; i >= 0; i--) { 527 for (i = s->urbs_initialized - 1; i >= 0; i--) {
529 if (s->urb_list[i]) { 528 if (s->urb_list[i]) {
530 dev_dbg(&s->udev->dev, "%s: free urb=%d\n", 529 dev_dbg(&s->udev->dev, "free urb=%d\n", i);
531 __func__, i);
532 /* free the URBs */ 530 /* free the URBs */
533 usb_free_urb(s->urb_list[i]); 531 usb_free_urb(s->urb_list[i]);
534 } 532 }
@@ -544,10 +542,10 @@ static int rtl2832_sdr_alloc_urbs(struct rtl2832_sdr_state *s)
544 542
545 /* allocate the URBs */ 543 /* allocate the URBs */
546 for (i = 0; i < MAX_BULK_BUFS; i++) { 544 for (i = 0; i < MAX_BULK_BUFS; i++) {
547 dev_dbg(&s->udev->dev, "%s: alloc urb=%d\n", __func__, i); 545 dev_dbg(&s->udev->dev, "alloc urb=%d\n", i);
548 s->urb_list[i] = usb_alloc_urb(0, GFP_ATOMIC); 546 s->urb_list[i] = usb_alloc_urb(0, GFP_ATOMIC);
549 if (!s->urb_list[i]) { 547 if (!s->urb_list[i]) {
550 dev_dbg(&s->udev->dev, "%s: failed\n", __func__); 548 dev_dbg(&s->udev->dev, "failed\n");
551 for (j = 0; j < i; j++) 549 for (j = 0; j < i; j++)
552 usb_free_urb(s->urb_list[j]); 550 usb_free_urb(s->urb_list[j]);
553 return -ENOMEM; 551 return -ENOMEM;
@@ -570,9 +568,9 @@ static int rtl2832_sdr_alloc_urbs(struct rtl2832_sdr_state *s)
570/* Must be called with vb_queue_lock hold */ 568/* Must be called with vb_queue_lock hold */
571static void rtl2832_sdr_cleanup_queued_bufs(struct rtl2832_sdr_state *s) 569static void rtl2832_sdr_cleanup_queued_bufs(struct rtl2832_sdr_state *s)
572{ 570{
573 unsigned long flags = 0; 571 unsigned long flags;
574 572
575 dev_dbg(&s->udev->dev, "%s:\n", __func__); 573 dev_dbg(&s->udev->dev, "\n");
576 574
577 spin_lock_irqsave(&s->queued_bufs_lock, flags); 575 spin_lock_irqsave(&s->queued_bufs_lock, flags);
578 while (!list_empty(&s->queued_bufs)) { 576 while (!list_empty(&s->queued_bufs)) {
@@ -591,7 +589,7 @@ static void rtl2832_sdr_release_sec(struct dvb_frontend *fe)
591{ 589{
592 struct rtl2832_sdr_state *s = fe->sec_priv; 590 struct rtl2832_sdr_state *s = fe->sec_priv;
593 591
594 dev_dbg(&s->udev->dev, "%s:\n", __func__); 592 dev_dbg(&s->udev->dev, "\n");
595 593
596 mutex_lock(&s->vb_queue_lock); 594 mutex_lock(&s->vb_queue_lock);
597 mutex_lock(&s->v4l2_lock); 595 mutex_lock(&s->v4l2_lock);
@@ -613,7 +611,7 @@ static int rtl2832_sdr_querycap(struct file *file, void *fh,
613{ 611{
614 struct rtl2832_sdr_state *s = video_drvdata(file); 612 struct rtl2832_sdr_state *s = video_drvdata(file);
615 613
616 dev_dbg(&s->udev->dev, "%s:\n", __func__); 614 dev_dbg(&s->udev->dev, "\n");
617 615
618 strlcpy(cap->driver, KBUILD_MODNAME, sizeof(cap->driver)); 616 strlcpy(cap->driver, KBUILD_MODNAME, sizeof(cap->driver));
619 strlcpy(cap->card, s->vdev.name, sizeof(cap->card)); 617 strlcpy(cap->card, s->vdev.name, sizeof(cap->card));
@@ -631,15 +629,15 @@ static int rtl2832_sdr_queue_setup(struct vb2_queue *vq,
631{ 629{
632 struct rtl2832_sdr_state *s = vb2_get_drv_priv(vq); 630 struct rtl2832_sdr_state *s = vb2_get_drv_priv(vq);
633 631
634 dev_dbg(&s->udev->dev, "%s: *nbuffers=%d\n", __func__, *nbuffers); 632 dev_dbg(&s->udev->dev, "nbuffers=%d\n", *nbuffers);
635 633
636 /* Need at least 8 buffers */ 634 /* Need at least 8 buffers */
637 if (vq->num_buffers + *nbuffers < 8) 635 if (vq->num_buffers + *nbuffers < 8)
638 *nbuffers = 8 - vq->num_buffers; 636 *nbuffers = 8 - vq->num_buffers;
639 *nplanes = 1; 637 *nplanes = 1;
640 sizes[0] = PAGE_ALIGN(s->buffersize); 638 sizes[0] = PAGE_ALIGN(s->buffersize);
641 dev_dbg(&s->udev->dev, "%s: nbuffers=%d sizes[0]=%d\n", 639 dev_dbg(&s->udev->dev, "nbuffers=%d sizes[0]=%d\n",
642 __func__, *nbuffers, sizes[0]); 640 *nbuffers, sizes[0]);
643 return 0; 641 return 0;
644} 642}
645 643
@@ -659,7 +657,7 @@ static void rtl2832_sdr_buf_queue(struct vb2_buffer *vb)
659 struct rtl2832_sdr_state *s = vb2_get_drv_priv(vb->vb2_queue); 657 struct rtl2832_sdr_state *s = vb2_get_drv_priv(vb->vb2_queue);
660 struct rtl2832_sdr_frame_buf *buf = 658 struct rtl2832_sdr_frame_buf *buf =
661 container_of(vb, struct rtl2832_sdr_frame_buf, vb); 659 container_of(vb, struct rtl2832_sdr_frame_buf, vb);
662 unsigned long flags = 0; 660 unsigned long flags;
663 661
664 /* Check the device has not disconnected between prep and queuing */ 662 /* Check the device has not disconnected between prep and queuing */
665 if (!s->udev) { 663 if (!s->udev) {
@@ -681,7 +679,7 @@ static int rtl2832_sdr_set_adc(struct rtl2832_sdr_state *s)
681 u64 u64tmp; 679 u64 u64tmp;
682 u32 u32tmp; 680 u32 u32tmp;
683 681
684 dev_dbg(&s->udev->dev, "%s: f_adc=%u\n", __func__, s->f_adc); 682 dev_dbg(&s->udev->dev, "f_adc=%u\n", s->f_adc);
685 683
686 if (!test_bit(POWER_ON, &s->flags)) 684 if (!test_bit(POWER_ON, &s->flags))
687 return 0; 685 return 0;
@@ -715,8 +713,7 @@ static int rtl2832_sdr_set_adc(struct rtl2832_sdr_state *s)
715 u64tmp = -u64tmp; 713 u64tmp = -u64tmp;
716 u32tmp = u64tmp & 0x3fffff; 714 u32tmp = u64tmp & 0x3fffff;
717 715
718 dev_dbg(&s->udev->dev, "%s: f_if=%u if_ctl=%08x\n", 716 dev_dbg(&s->udev->dev, "f_if=%u if_ctl=%08x\n", f_if, u32tmp);
719 __func__, f_if, u32tmp);
720 717
721 buf[0] = (u32tmp >> 16) & 0xff; 718 buf[0] = (u32tmp >> 16) & 0xff;
722 buf[1] = (u32tmp >> 8) & 0xff; 719 buf[1] = (u32tmp >> 8) & 0xff;
@@ -903,7 +900,7 @@ static void rtl2832_sdr_unset_adc(struct rtl2832_sdr_state *s)
903{ 900{
904 int ret; 901 int ret;
905 902
906 dev_dbg(&s->udev->dev, "%s:\n", __func__); 903 dev_dbg(&s->udev->dev, "\n");
907 904
908 /* PID filter */ 905 /* PID filter */
909 ret = rtl2832_sdr_wr_regs(s, 0x061, "\xe0", 1); 906 ret = rtl2832_sdr_wr_regs(s, 0x061, "\xe0", 1);
@@ -964,8 +961,8 @@ static int rtl2832_sdr_set_tuner_freq(struct rtl2832_sdr_state *s)
964 c->frequency = s->f_tuner; 961 c->frequency = s->f_tuner;
965 c->delivery_system = SYS_DVBT; 962 c->delivery_system = SYS_DVBT;
966 963
967 dev_dbg(&s->udev->dev, "%s: frequency=%u bandwidth=%d\n", 964 dev_dbg(&s->udev->dev, "frequency=%u bandwidth=%d\n",
968 __func__, c->frequency, c->bandwidth_hz); 965 c->frequency, c->bandwidth_hz);
969 966
970 if (!test_bit(POWER_ON, &s->flags)) 967 if (!test_bit(POWER_ON, &s->flags))
971 return 0; 968 return 0;
@@ -980,7 +977,7 @@ static int rtl2832_sdr_set_tuner(struct rtl2832_sdr_state *s)
980{ 977{
981 struct dvb_frontend *fe = s->fe; 978 struct dvb_frontend *fe = s->fe;
982 979
983 dev_dbg(&s->udev->dev, "%s:\n", __func__); 980 dev_dbg(&s->udev->dev, "\n");
984 981
985 if (fe->ops.tuner_ops.init) 982 if (fe->ops.tuner_ops.init)
986 fe->ops.tuner_ops.init(fe); 983 fe->ops.tuner_ops.init(fe);
@@ -992,7 +989,7 @@ static void rtl2832_sdr_unset_tuner(struct rtl2832_sdr_state *s)
992{ 989{
993 struct dvb_frontend *fe = s->fe; 990 struct dvb_frontend *fe = s->fe;
994 991
995 dev_dbg(&s->udev->dev, "%s:\n", __func__); 992 dev_dbg(&s->udev->dev, "\n");
996 993
997 if (fe->ops.tuner_ops.sleep) 994 if (fe->ops.tuner_ops.sleep)
998 fe->ops.tuner_ops.sleep(fe); 995 fe->ops.tuner_ops.sleep(fe);
@@ -1005,7 +1002,7 @@ static int rtl2832_sdr_start_streaming(struct vb2_queue *vq, unsigned int count)
1005 struct rtl2832_sdr_state *s = vb2_get_drv_priv(vq); 1002 struct rtl2832_sdr_state *s = vb2_get_drv_priv(vq);
1006 int ret; 1003 int ret;
1007 1004
1008 dev_dbg(&s->udev->dev, "%s:\n", __func__); 1005 dev_dbg(&s->udev->dev, "\n");
1009 1006
1010 if (!s->udev) 1007 if (!s->udev)
1011 return -ENODEV; 1008 return -ENODEV;
@@ -1054,7 +1051,7 @@ static void rtl2832_sdr_stop_streaming(struct vb2_queue *vq)
1054{ 1051{
1055 struct rtl2832_sdr_state *s = vb2_get_drv_priv(vq); 1052 struct rtl2832_sdr_state *s = vb2_get_drv_priv(vq);
1056 1053
1057 dev_dbg(&s->udev->dev, "%s:\n", __func__); 1054 dev_dbg(&s->udev->dev, "\n");
1058 1055
1059 mutex_lock(&s->v4l2_lock); 1056 mutex_lock(&s->v4l2_lock);
1060 1057
@@ -1088,8 +1085,7 @@ static int rtl2832_sdr_g_tuner(struct file *file, void *priv,
1088{ 1085{
1089 struct rtl2832_sdr_state *s = video_drvdata(file); 1086 struct rtl2832_sdr_state *s = video_drvdata(file);
1090 1087
1091 dev_dbg(&s->udev->dev, "%s: index=%d type=%d\n", 1088 dev_dbg(&s->udev->dev, "index=%d type=%d\n", v->index, v->type);
1092 __func__, v->index, v->type);
1093 1089
1094 if (v->index == 0) { 1090 if (v->index == 0) {
1095 strlcpy(v->name, "ADC: Realtek RTL2832", sizeof(v->name)); 1091 strlcpy(v->name, "ADC: Realtek RTL2832", sizeof(v->name));
@@ -1115,7 +1111,7 @@ static int rtl2832_sdr_s_tuner(struct file *file, void *priv,
1115{ 1111{
1116 struct rtl2832_sdr_state *s = video_drvdata(file); 1112 struct rtl2832_sdr_state *s = video_drvdata(file);
1117 1113
1118 dev_dbg(&s->udev->dev, "%s:\n", __func__); 1114 dev_dbg(&s->udev->dev, "\n");
1119 1115
1120 if (v->index > 1) 1116 if (v->index > 1)
1121 return -EINVAL; 1117 return -EINVAL;
@@ -1127,8 +1123,8 @@ static int rtl2832_sdr_enum_freq_bands(struct file *file, void *priv,
1127{ 1123{
1128 struct rtl2832_sdr_state *s = video_drvdata(file); 1124 struct rtl2832_sdr_state *s = video_drvdata(file);
1129 1125
1130 dev_dbg(&s->udev->dev, "%s: tuner=%d type=%d index=%d\n", 1126 dev_dbg(&s->udev->dev, "tuner=%d type=%d index=%d\n",
1131 __func__, band->tuner, band->type, band->index); 1127 band->tuner, band->type, band->index);
1132 1128
1133 if (band->tuner == 0) { 1129 if (band->tuner == 0) {
1134 if (band->index >= ARRAY_SIZE(bands_adc)) 1130 if (band->index >= ARRAY_SIZE(bands_adc))
@@ -1153,8 +1149,8 @@ static int rtl2832_sdr_g_frequency(struct file *file, void *priv,
1153 struct rtl2832_sdr_state *s = video_drvdata(file); 1149 struct rtl2832_sdr_state *s = video_drvdata(file);
1154 int ret = 0; 1150 int ret = 0;
1155 1151
1156 dev_dbg(&s->udev->dev, "%s: tuner=%d type=%d\n", 1152 dev_dbg(&s->udev->dev, "tuner=%d type=%d\n",
1157 __func__, f->tuner, f->type); 1153 f->tuner, f->type);
1158 1154
1159 if (f->tuner == 0) { 1155 if (f->tuner == 0) {
1160 f->frequency = s->f_adc; 1156 f->frequency = s->f_adc;
@@ -1175,8 +1171,8 @@ static int rtl2832_sdr_s_frequency(struct file *file, void *priv,
1175 struct rtl2832_sdr_state *s = video_drvdata(file); 1171 struct rtl2832_sdr_state *s = video_drvdata(file);
1176 int ret, band; 1172 int ret, band;
1177 1173
1178 dev_dbg(&s->udev->dev, "%s: tuner=%d type=%d frequency=%u\n", 1174 dev_dbg(&s->udev->dev, "tuner=%d type=%d frequency=%u\n",
1179 __func__, f->tuner, f->type, f->frequency); 1175 f->tuner, f->type, f->frequency);
1180 1176
1181 /* ADC band midpoints */ 1177 /* ADC band midpoints */
1182 #define BAND_ADC_0 ((bands_adc[0].rangehigh + bands_adc[1].rangelow) / 2) 1178 #define BAND_ADC_0 ((bands_adc[0].rangehigh + bands_adc[1].rangelow) / 2)
@@ -1194,15 +1190,13 @@ static int rtl2832_sdr_s_frequency(struct file *file, void *priv,
1194 bands_adc[band].rangelow, 1190 bands_adc[band].rangelow,
1195 bands_adc[band].rangehigh); 1191 bands_adc[band].rangehigh);
1196 1192
1197 dev_dbg(&s->udev->dev, "%s: ADC frequency=%u Hz\n", 1193 dev_dbg(&s->udev->dev, "ADC frequency=%u Hz\n", s->f_adc);
1198 __func__, s->f_adc);
1199 ret = rtl2832_sdr_set_adc(s); 1194 ret = rtl2832_sdr_set_adc(s);
1200 } else if (f->tuner == 1) { 1195 } else if (f->tuner == 1) {
1201 s->f_tuner = clamp_t(unsigned int, f->frequency, 1196 s->f_tuner = clamp_t(unsigned int, f->frequency,
1202 bands_fm[0].rangelow, 1197 bands_fm[0].rangelow,
1203 bands_fm[0].rangehigh); 1198 bands_fm[0].rangehigh);
1204 dev_dbg(&s->udev->dev, "%s: RF frequency=%u Hz\n", 1199 dev_dbg(&s->udev->dev, "RF frequency=%u Hz\n", f->frequency);
1205 __func__, f->frequency);
1206 1200
1207 ret = rtl2832_sdr_set_tuner_freq(s); 1201 ret = rtl2832_sdr_set_tuner_freq(s);
1208 } else { 1202 } else {
@@ -1217,7 +1211,7 @@ static int rtl2832_sdr_enum_fmt_sdr_cap(struct file *file, void *priv,
1217{ 1211{
1218 struct rtl2832_sdr_state *s = video_drvdata(file); 1212 struct rtl2832_sdr_state *s = video_drvdata(file);
1219 1213
1220 dev_dbg(&s->udev->dev, "%s:\n", __func__); 1214 dev_dbg(&s->udev->dev, "\n");
1221 1215
1222 if (f->index >= s->num_formats) 1216 if (f->index >= s->num_formats)
1223 return -EINVAL; 1217 return -EINVAL;
@@ -1233,7 +1227,7 @@ static int rtl2832_sdr_g_fmt_sdr_cap(struct file *file, void *priv,
1233{ 1227{
1234 struct rtl2832_sdr_state *s = video_drvdata(file); 1228 struct rtl2832_sdr_state *s = video_drvdata(file);
1235 1229
1236 dev_dbg(&s->udev->dev, "%s:\n", __func__); 1230 dev_dbg(&s->udev->dev, "\n");
1237 1231
1238 f->fmt.sdr.pixelformat = s->pixelformat; 1232 f->fmt.sdr.pixelformat = s->pixelformat;
1239 f->fmt.sdr.buffersize = s->buffersize; 1233 f->fmt.sdr.buffersize = s->buffersize;
@@ -1250,7 +1244,7 @@ static int rtl2832_sdr_s_fmt_sdr_cap(struct file *file, void *priv,
1250 struct vb2_queue *q = &s->vb_queue; 1244 struct vb2_queue *q = &s->vb_queue;
1251 int i; 1245 int i;
1252 1246
1253 dev_dbg(&s->udev->dev, "%s: pixelformat fourcc %4.4s\n", __func__, 1247 dev_dbg(&s->udev->dev, "pixelformat fourcc %4.4s\n",
1254 (char *)&f->fmt.sdr.pixelformat); 1248 (char *)&f->fmt.sdr.pixelformat);
1255 1249
1256 if (vb2_is_busy(q)) 1250 if (vb2_is_busy(q))
@@ -1280,7 +1274,7 @@ static int rtl2832_sdr_try_fmt_sdr_cap(struct file *file, void *priv,
1280 struct rtl2832_sdr_state *s = video_drvdata(file); 1274 struct rtl2832_sdr_state *s = video_drvdata(file);
1281 int i; 1275 int i;
1282 1276
1283 dev_dbg(&s->udev->dev, "%s: pixelformat fourcc %4.4s\n", __func__, 1277 dev_dbg(&s->udev->dev, "pixelformat fourcc %4.4s\n",
1284 (char *)&f->fmt.sdr.pixelformat); 1278 (char *)&f->fmt.sdr.pixelformat);
1285 1279
1286 memset(f->fmt.sdr.reserved, 0, sizeof(f->fmt.sdr.reserved)); 1280 memset(f->fmt.sdr.reserved, 0, sizeof(f->fmt.sdr.reserved));
@@ -1354,8 +1348,8 @@ static int rtl2832_sdr_s_ctrl(struct v4l2_ctrl *ctrl)
1354 int ret; 1348 int ret;
1355 1349
1356 dev_dbg(&s->udev->dev, 1350 dev_dbg(&s->udev->dev,
1357 "%s: id=%d name=%s val=%d min=%lld max=%lld step=%lld\n", 1351 "id=%d name=%s val=%d min=%lld max=%lld step=%lld\n",
1358 __func__, ctrl->id, ctrl->name, ctrl->val, 1352 ctrl->id, ctrl->name, ctrl->val,
1359 ctrl->minimum, ctrl->maximum, ctrl->step); 1353 ctrl->minimum, ctrl->maximum, ctrl->step);
1360 1354
1361 switch (ctrl->id) { 1355 switch (ctrl->id) {
@@ -1432,7 +1426,7 @@ struct dvb_frontend *rtl2832_sdr_attach(struct dvb_frontend *fe,
1432 s->pixelformat = formats[0].pixelformat; 1426 s->pixelformat = formats[0].pixelformat;
1433 s->buffersize = formats[0].buffersize; 1427 s->buffersize = formats[0].buffersize;
1434 s->num_formats = NUM_FORMATS; 1428 s->num_formats = NUM_FORMATS;
1435 if (rtl2832_sdr_emulated_fmt == false) 1429 if (!rtl2832_sdr_emulated_fmt)
1436 s->num_formats -= 1; 1430 s->num_formats -= 1;
1437 1431
1438 mutex_init(&s->v4l2_lock); 1432 mutex_init(&s->v4l2_lock);
diff --git a/drivers/media/dvb-frontends/si2165.c b/drivers/media/dvb-frontends/si2165.c
index 3a2d6c5aded6..98ddb49ad52b 100644
--- a/drivers/media/dvb-frontends/si2165.c
+++ b/drivers/media/dvb-frontends/si2165.c
@@ -1,5 +1,5 @@
1/* 1/*
2 Driver for Silicon Labs SI2165 DVB-C/-T Demodulator 2 Driver for Silicon Labs Si2161 DVB-T and Si2165 DVB-C/-T Demodulator
3 3
4 Copyright (C) 2013-2014 Matthias Schwarzott <zzam@gentoo.org> 4 Copyright (C) 2013-2014 Matthias Schwarzott <zzam@gentoo.org>
5 5
@@ -44,9 +44,7 @@ struct si2165_state {
44 44
45 struct si2165_config config; 45 struct si2165_config config;
46 46
47 /* chip revision */ 47 u8 chip_revcode;
48 u8 revcode;
49 /* chip type */
50 u8 chip_type; 48 u8 chip_type;
51 49
52 /* calculated by xtal and div settings */ 50 /* calculated by xtal and div settings */
@@ -312,7 +310,7 @@ static u32 si2165_get_fe_clk(struct si2165_state *state)
312 return state->adc_clk; 310 return state->adc_clk;
313} 311}
314 312
315static bool si2165_wait_init_done(struct si2165_state *state) 313static int si2165_wait_init_done(struct si2165_state *state)
316{ 314{
317 int ret = -EINVAL; 315 int ret = -EINVAL;
318 u8 val = 0; 316 u8 val = 0;
@@ -407,7 +405,7 @@ static int si2165_upload_firmware(struct si2165_state *state)
407 int ret; 405 int ret;
408 406
409 const struct firmware *fw = NULL; 407 const struct firmware *fw = NULL;
410 u8 *fw_file = SI2165_FIRMWARE; 408 u8 *fw_file;
411 const u8 *data; 409 const u8 *data;
412 u32 len; 410 u32 len;
413 u32 offset; 411 u32 offset;
@@ -415,10 +413,20 @@ static int si2165_upload_firmware(struct si2165_state *state)
415 u8 block_count; 413 u8 block_count;
416 u16 crc_expected; 414 u16 crc_expected;
417 415
416 switch (state->chip_revcode) {
417 case 0x03: /* revision D */
418 fw_file = SI2165_FIRMWARE_REV_D;
419 break;
420 default:
421 dev_info(&state->i2c->dev, "%s: no firmware file for revision=%d\n",
422 KBUILD_MODNAME, state->chip_revcode);
423 return 0;
424 }
425
418 /* request the firmware, this will block and timeout */ 426 /* request the firmware, this will block and timeout */
419 ret = request_firmware(&fw, fw_file, state->i2c->dev.parent); 427 ret = request_firmware(&fw, fw_file, state->i2c->dev.parent);
420 if (ret) { 428 if (ret) {
421 dev_warn(&state->i2c->dev, "%s: firmare file '%s' not found\n", 429 dev_warn(&state->i2c->dev, "%s: firmware file '%s' not found\n",
422 KBUILD_MODNAME, fw_file); 430 KBUILD_MODNAME, fw_file);
423 goto error; 431 goto error;
424 } 432 }
@@ -908,7 +916,7 @@ static void si2165_release(struct dvb_frontend *fe)
908 916
909static struct dvb_frontend_ops si2165_ops = { 917static struct dvb_frontend_ops si2165_ops = {
910 .info = { 918 .info = {
911 .name = "Silicon Labs Si2165", 919 .name = "Silicon Labs ",
912 .caps = FE_CAN_FEC_1_2 | 920 .caps = FE_CAN_FEC_1_2 |
913 FE_CAN_FEC_2_3 | 921 FE_CAN_FEC_2_3 |
914 FE_CAN_FEC_3_4 | 922 FE_CAN_FEC_3_4 |
@@ -948,6 +956,8 @@ struct dvb_frontend *si2165_attach(const struct si2165_config *config,
948 int n; 956 int n;
949 int io_ret; 957 int io_ret;
950 u8 val; 958 u8 val;
959 char rev_char;
960 const char *chip_name;
951 961
952 if (config == NULL || i2c == NULL) 962 if (config == NULL || i2c == NULL)
953 goto error; 963 goto error;
@@ -984,7 +994,7 @@ struct dvb_frontend *si2165_attach(const struct si2165_config *config,
984 if (val != state->config.chip_mode) 994 if (val != state->config.chip_mode)
985 goto error; 995 goto error;
986 996
987 io_ret = si2165_readreg8(state, 0x0023 , &state->revcode); 997 io_ret = si2165_readreg8(state, 0x0023, &state->chip_revcode);
988 if (io_ret < 0) 998 if (io_ret < 0)
989 goto error; 999 goto error;
990 1000
@@ -997,22 +1007,35 @@ struct dvb_frontend *si2165_attach(const struct si2165_config *config,
997 if (io_ret < 0) 1007 if (io_ret < 0)
998 goto error; 1008 goto error;
999 1009
1000 dev_info(&state->i2c->dev, "%s: hardware revision 0x%02x, chip type 0x%02x\n", 1010 if (state->chip_revcode < 26)
1001 KBUILD_MODNAME, state->revcode, state->chip_type); 1011 rev_char = 'A' + state->chip_revcode;
1012 else
1013 rev_char = '?';
1002 1014
1003 /* It is a guess that register 0x0118 (chip type?) can be used to 1015 switch (state->chip_type) {
1004 * differ between si2161, si2163 and si2165 1016 case 0x06:
1005 * Only si2165 has been tested. 1017 chip_name = "Si2161";
1006 */ 1018 state->has_dvbt = true;
1007 if (state->revcode == 0x03 && state->chip_type == 0x07) { 1019 break;
1020 case 0x07:
1021 chip_name = "Si2165";
1008 state->has_dvbt = true; 1022 state->has_dvbt = true;
1009 state->has_dvbc = true; 1023 state->has_dvbc = true;
1010 } else { 1024 break;
1011 dev_err(&state->i2c->dev, "%s: Unsupported chip.\n", 1025 default:
1012 KBUILD_MODNAME); 1026 dev_err(&state->i2c->dev, "%s: Unsupported Silicon Labs chip (type %d, rev %d)\n",
1027 KBUILD_MODNAME, state->chip_type, state->chip_revcode);
1013 goto error; 1028 goto error;
1014 } 1029 }
1015 1030
1031 dev_info(&state->i2c->dev,
1032 "%s: Detected Silicon Labs %s-%c (type %d, rev %d)\n",
1033 KBUILD_MODNAME, chip_name, rev_char, state->chip_type,
1034 state->chip_revcode);
1035
1036 strlcat(state->frontend.ops.info.name, chip_name,
1037 sizeof(state->frontend.ops.info.name));
1038
1016 n = 0; 1039 n = 0;
1017 if (state->has_dvbt) { 1040 if (state->has_dvbt) {
1018 state->frontend.ops.delsys[n++] = SYS_DVBT; 1041 state->frontend.ops.delsys[n++] = SYS_DVBT;
@@ -1037,4 +1060,4 @@ MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
1037MODULE_DESCRIPTION("Silicon Labs Si2165 DVB-C/-T Demodulator driver"); 1060MODULE_DESCRIPTION("Silicon Labs Si2165 DVB-C/-T Demodulator driver");
1038MODULE_AUTHOR("Matthias Schwarzott <zzam@gentoo.org>"); 1061MODULE_AUTHOR("Matthias Schwarzott <zzam@gentoo.org>");
1039MODULE_LICENSE("GPL"); 1062MODULE_LICENSE("GPL");
1040MODULE_FIRMWARE(SI2165_FIRMWARE); 1063MODULE_FIRMWARE(SI2165_FIRMWARE_REV_D);
diff --git a/drivers/media/dvb-frontends/si2165_priv.h b/drivers/media/dvb-frontends/si2165_priv.h
index d4cc93fe1096..2b70cf12cd79 100644
--- a/drivers/media/dvb-frontends/si2165_priv.h
+++ b/drivers/media/dvb-frontends/si2165_priv.h
@@ -18,6 +18,6 @@
18#ifndef _DVB_SI2165_PRIV 18#ifndef _DVB_SI2165_PRIV
19#define _DVB_SI2165_PRIV 19#define _DVB_SI2165_PRIV
20 20
21#define SI2165_FIRMWARE "dvb-demod-si2165.fw" 21#define SI2165_FIRMWARE_REV_D "dvb-demod-si2165.fw"
22 22
23#endif /* _DVB_SI2165_PRIV */ 23#endif /* _DVB_SI2165_PRIV */
diff --git a/drivers/media/dvb-frontends/si2168.c b/drivers/media/dvb-frontends/si2168.c
index 8f81d979de30..1cd93be281ed 100644
--- a/drivers/media/dvb-frontends/si2168.c
+++ b/drivers/media/dvb-frontends/si2168.c
@@ -55,8 +55,7 @@ static int si2168_cmd_execute(struct si2168 *s, struct si2168_cmd *cmd)
55 break; 55 break;
56 } 56 }
57 57
58 dev_dbg(&s->client->dev, "%s: cmd execution took %d ms\n", 58 dev_dbg(&s->client->dev, "cmd execution took %d ms\n",
59 __func__,
60 jiffies_to_msecs(jiffies) - 59 jiffies_to_msecs(jiffies) -
61 (jiffies_to_msecs(timeout) - TIMEOUT)); 60 (jiffies_to_msecs(timeout) - TIMEOUT));
62 61
@@ -75,7 +74,7 @@ err_mutex_unlock:
75 74
76 return 0; 75 return 0;
77err: 76err:
78 dev_dbg(&s->client->dev, "%s: failed=%d\n", __func__, ret); 77 dev_dbg(&s->client->dev, "failed=%d\n", ret);
79 return ret; 78 return ret;
80} 79}
81 80
@@ -150,12 +149,12 @@ static int si2168_read_status(struct dvb_frontend *fe, fe_status_t *status)
150 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE; 149 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
151 } 150 }
152 151
153 dev_dbg(&s->client->dev, "%s: status=%02x args=%*ph\n", 152 dev_dbg(&s->client->dev, "status=%02x args=%*ph\n",
154 __func__, *status, cmd.rlen, cmd.args); 153 *status, cmd.rlen, cmd.args);
155 154
156 return 0; 155 return 0;
157err: 156err:
158 dev_dbg(&s->client->dev, "%s: failed=%d\n", __func__, ret); 157 dev_dbg(&s->client->dev, "failed=%d\n", ret);
159 return ret; 158 return ret;
160} 159}
161 160
@@ -168,10 +167,10 @@ static int si2168_set_frontend(struct dvb_frontend *fe)
168 u8 bandwidth, delivery_system; 167 u8 bandwidth, delivery_system;
169 168
170 dev_dbg(&s->client->dev, 169 dev_dbg(&s->client->dev,
171 "%s: delivery_system=%u modulation=%u frequency=%u bandwidth_hz=%u symbol_rate=%u inversion=%u\n", 170 "delivery_system=%u modulation=%u frequency=%u bandwidth_hz=%u symbol_rate=%u inversion=%u, stream_id=%d\n",
172 __func__, c->delivery_system, c->modulation, 171 c->delivery_system, c->modulation,
173 c->frequency, c->bandwidth_hz, c->symbol_rate, 172 c->frequency, c->bandwidth_hz, c->symbol_rate,
174 c->inversion); 173 c->inversion, c->stream_id);
175 174
176 if (!s->active) { 175 if (!s->active) {
177 ret = -EAGAIN; 176 ret = -EAGAIN;
@@ -235,6 +234,18 @@ static int si2168_set_frontend(struct dvb_frontend *fe)
235 if (ret) 234 if (ret)
236 goto err; 235 goto err;
237 236
237 if (c->delivery_system == SYS_DVBT2) {
238 /* select PLP */
239 cmd.args[0] = 0x52;
240 cmd.args[1] = c->stream_id & 0xff;
241 cmd.args[2] = c->stream_id == NO_STREAM_ID_FILTER ? 0 : 1;
242 cmd.wlen = 3;
243 cmd.rlen = 1;
244 ret = si2168_cmd_execute(s, &cmd);
245 if (ret)
246 goto err;
247 }
248
238 memcpy(cmd.args, "\x51\x03", 2); 249 memcpy(cmd.args, "\x51\x03", 2);
239 cmd.wlen = 2; 250 cmd.wlen = 2;
240 cmd.rlen = 12; 251 cmd.rlen = 12;
@@ -297,13 +308,6 @@ static int si2168_set_frontend(struct dvb_frontend *fe)
297 if (ret) 308 if (ret)
298 goto err; 309 goto err;
299 310
300 memcpy(cmd.args, "\x14\x00\x01\x10\x16\x00", 6);
301 cmd.wlen = 6;
302 cmd.rlen = 4;
303 ret = si2168_cmd_execute(s, &cmd);
304 if (ret)
305 goto err;
306
307 memcpy(cmd.args, "\x14\x00\x09\x10\xe3\x18", 6); 311 memcpy(cmd.args, "\x14\x00\x09\x10\xe3\x18", 6);
308 cmd.wlen = 6; 312 cmd.wlen = 6;
309 cmd.rlen = 4; 313 cmd.rlen = 4;
@@ -343,7 +347,7 @@ static int si2168_set_frontend(struct dvb_frontend *fe)
343 347
344 return 0; 348 return 0;
345err: 349err:
346 dev_dbg(&s->client->dev, "%s: failed=%d\n", __func__, ret); 350 dev_dbg(&s->client->dev, "failed=%d\n", ret);
347 return ret; 351 return ret;
348} 352}
349 353
@@ -357,8 +361,9 @@ static int si2168_init(struct dvb_frontend *fe)
357 struct si2168_cmd cmd; 361 struct si2168_cmd cmd;
358 unsigned int chip_id; 362 unsigned int chip_id;
359 363
360 dev_dbg(&s->client->dev, "%s:\n", __func__); 364 dev_dbg(&s->client->dev, "\n");
361 365
366 /* initialize */
362 memcpy(cmd.args, "\xc0\x12\x00\x0c\x00\x0d\x16\x00\x00\x00\x00\x00\x00", 13); 367 memcpy(cmd.args, "\xc0\x12\x00\x0c\x00\x0d\x16\x00\x00\x00\x00\x00\x00", 13);
363 cmd.wlen = 13; 368 cmd.wlen = 13;
364 cmd.rlen = 0; 369 cmd.rlen = 0;
@@ -366,6 +371,26 @@ static int si2168_init(struct dvb_frontend *fe)
366 if (ret) 371 if (ret)
367 goto err; 372 goto err;
368 373
374 if (s->fw_loaded) {
375 /* resume */
376 memcpy(cmd.args, "\xc0\x06\x08\x0f\x00\x20\x21\x01", 8);
377 cmd.wlen = 8;
378 cmd.rlen = 1;
379 ret = si2168_cmd_execute(s, &cmd);
380 if (ret)
381 goto err;
382
383 memcpy(cmd.args, "\x85", 1);
384 cmd.wlen = 1;
385 cmd.rlen = 1;
386 ret = si2168_cmd_execute(s, &cmd);
387 if (ret)
388 goto err;
389
390 goto warm;
391 }
392
393 /* power up */
369 memcpy(cmd.args, "\xc0\x06\x01\x0f\x00\x20\x20\x01", 8); 394 memcpy(cmd.args, "\xc0\x06\x01\x0f\x00\x20\x20\x01", 8);
370 cmd.wlen = 8; 395 cmd.wlen = 8;
371 cmd.rlen = 1; 396 cmd.rlen = 1;
@@ -400,16 +425,16 @@ static int si2168_init(struct dvb_frontend *fe)
400 break; 425 break;
401 default: 426 default:
402 dev_err(&s->client->dev, 427 dev_err(&s->client->dev,
403 "%s: unkown chip version Si21%d-%c%c%c\n", 428 "unknown chip version Si21%d-%c%c%c\n",
404 KBUILD_MODNAME, cmd.args[2], cmd.args[1], 429 cmd.args[2], cmd.args[1],
405 cmd.args[3], cmd.args[4]); 430 cmd.args[3], cmd.args[4]);
406 ret = -EINVAL; 431 ret = -EINVAL;
407 goto err; 432 goto err;
408 } 433 }
409 434
410 /* cold state - try to download firmware */ 435 /* cold state - try to download firmware */
411 dev_info(&s->client->dev, "%s: found a '%s' in cold state\n", 436 dev_info(&s->client->dev, "found a '%s' in cold state\n",
412 KBUILD_MODNAME, si2168_ops.info.name); 437 si2168_ops.info.name);
413 438
414 /* request the firmware, this will block and timeout */ 439 /* request the firmware, this will block and timeout */
415 ret = request_firmware(&fw, fw_file, &s->client->dev); 440 ret = request_firmware(&fw, fw_file, &s->client->dev);
@@ -422,18 +447,18 @@ static int si2168_init(struct dvb_frontend *fe)
422 447
423 if (ret == 0) { 448 if (ret == 0) {
424 dev_notice(&s->client->dev, 449 dev_notice(&s->client->dev,
425 "%s: please install firmware file '%s'\n", 450 "please install firmware file '%s'\n",
426 KBUILD_MODNAME, SI2168_B40_FIRMWARE); 451 SI2168_B40_FIRMWARE);
427 } else { 452 } else {
428 dev_err(&s->client->dev, 453 dev_err(&s->client->dev,
429 "%s: firmware file '%s' not found\n", 454 "firmware file '%s' not found\n",
430 KBUILD_MODNAME, fw_file); 455 fw_file);
431 goto err; 456 goto err;
432 } 457 }
433 } 458 }
434 459
435 dev_info(&s->client->dev, "%s: downloading firmware from file '%s'\n", 460 dev_info(&s->client->dev, "downloading firmware from file '%s'\n",
436 KBUILD_MODNAME, fw_file); 461 fw_file);
437 462
438 for (remaining = fw->size; remaining > 0; remaining -= i2c_wr_max) { 463 for (remaining = fw->size; remaining > 0; remaining -= i2c_wr_max) {
439 len = remaining; 464 len = remaining;
@@ -446,8 +471,8 @@ static int si2168_init(struct dvb_frontend *fe)
446 ret = si2168_cmd_execute(s, &cmd); 471 ret = si2168_cmd_execute(s, &cmd);
447 if (ret) { 472 if (ret) {
448 dev_err(&s->client->dev, 473 dev_err(&s->client->dev,
449 "%s: firmware download failed=%d\n", 474 "firmware download failed=%d\n",
450 KBUILD_MODNAME, ret); 475 ret);
451 goto err; 476 goto err;
452 } 477 }
453 } 478 }
@@ -462,8 +487,20 @@ static int si2168_init(struct dvb_frontend *fe)
462 if (ret) 487 if (ret)
463 goto err; 488 goto err;
464 489
465 dev_info(&s->client->dev, "%s: found a '%s' in warm state\n", 490 /* set ts mode */
466 KBUILD_MODNAME, si2168_ops.info.name); 491 memcpy(cmd.args, "\x14\x00\x01\x10\x10\x00", 6);
492 cmd.args[4] |= s->ts_mode;
493 cmd.wlen = 6;
494 cmd.rlen = 4;
495 ret = si2168_cmd_execute(s, &cmd);
496 if (ret)
497 goto err;
498
499 s->fw_loaded = true;
500
501warm:
502 dev_info(&s->client->dev, "found a '%s' in warm state\n",
503 si2168_ops.info.name);
467 504
468 s->active = true; 505 s->active = true;
469 506
@@ -472,7 +509,7 @@ err:
472 if (fw) 509 if (fw)
473 release_firmware(fw); 510 release_firmware(fw);
474 511
475 dev_dbg(&s->client->dev, "%s: failed=%d\n", __func__, ret); 512 dev_dbg(&s->client->dev, "failed=%d\n", ret);
476 return ret; 513 return ret;
477} 514}
478 515
@@ -482,7 +519,7 @@ static int si2168_sleep(struct dvb_frontend *fe)
482 int ret; 519 int ret;
483 struct si2168_cmd cmd; 520 struct si2168_cmd cmd;
484 521
485 dev_dbg(&s->client->dev, "%s:\n", __func__); 522 dev_dbg(&s->client->dev, "\n");
486 523
487 s->active = false; 524 s->active = false;
488 525
@@ -495,7 +532,7 @@ static int si2168_sleep(struct dvb_frontend *fe)
495 532
496 return 0; 533 return 0;
497err: 534err:
498 dev_dbg(&s->client->dev, "%s: failed=%d\n", __func__, ret); 535 dev_dbg(&s->client->dev, "failed=%d\n", ret);
499 return ret; 536 return ret;
500} 537}
501 538
@@ -528,8 +565,7 @@ static int si2168_select(struct i2c_adapter *adap, void *mux_priv, u32 chan)
528 /* open tuner I2C gate */ 565 /* open tuner I2C gate */
529 ret = __i2c_transfer(s->client->adapter, &gate_open_msg, 1); 566 ret = __i2c_transfer(s->client->adapter, &gate_open_msg, 1);
530 if (ret != 1) { 567 if (ret != 1) {
531 dev_warn(&s->client->dev, "%s: i2c write failed=%d\n", 568 dev_warn(&s->client->dev, "i2c write failed=%d\n", ret);
532 KBUILD_MODNAME, ret);
533 if (ret >= 0) 569 if (ret >= 0)
534 ret = -EREMOTEIO; 570 ret = -EREMOTEIO;
535 } else { 571 } else {
@@ -553,8 +589,7 @@ static int si2168_deselect(struct i2c_adapter *adap, void *mux_priv, u32 chan)
553 /* close tuner I2C gate */ 589 /* close tuner I2C gate */
554 ret = __i2c_transfer(s->client->adapter, &gate_close_msg, 1); 590 ret = __i2c_transfer(s->client->adapter, &gate_close_msg, 1);
555 if (ret != 1) { 591 if (ret != 1) {
556 dev_warn(&s->client->dev, "%s: i2c write failed=%d\n", 592 dev_warn(&s->client->dev, "i2c write failed=%d\n", ret);
557 KBUILD_MODNAME, ret);
558 if (ret >= 0) 593 if (ret >= 0)
559 ret = -EREMOTEIO; 594 ret = -EREMOTEIO;
560 } else { 595 } else {
@@ -587,7 +622,8 @@ static const struct dvb_frontend_ops si2168_ops = {
587 FE_CAN_GUARD_INTERVAL_AUTO | 622 FE_CAN_GUARD_INTERVAL_AUTO |
588 FE_CAN_HIERARCHY_AUTO | 623 FE_CAN_HIERARCHY_AUTO |
589 FE_CAN_MUTE_TS | 624 FE_CAN_MUTE_TS |
590 FE_CAN_2G_MODULATION 625 FE_CAN_2G_MODULATION |
626 FE_CAN_MULTISTREAM
591 }, 627 },
592 628
593 .get_tune_settings = si2168_get_tune_settings, 629 .get_tune_settings = si2168_get_tune_settings,
@@ -607,12 +643,12 @@ static int si2168_probe(struct i2c_client *client,
607 struct si2168 *s; 643 struct si2168 *s;
608 int ret; 644 int ret;
609 645
610 dev_dbg(&client->dev, "%s:\n", __func__); 646 dev_dbg(&client->dev, "\n");
611 647
612 s = kzalloc(sizeof(struct si2168), GFP_KERNEL); 648 s = kzalloc(sizeof(struct si2168), GFP_KERNEL);
613 if (!s) { 649 if (!s) {
614 ret = -ENOMEM; 650 ret = -ENOMEM;
615 dev_err(&client->dev, "%s: kzalloc() failed\n", KBUILD_MODNAME); 651 dev_err(&client->dev, "kzalloc() failed\n");
616 goto err; 652 goto err;
617 } 653 }
618 654
@@ -633,16 +669,17 @@ static int si2168_probe(struct i2c_client *client,
633 669
634 *config->i2c_adapter = s->adapter; 670 *config->i2c_adapter = s->adapter;
635 *config->fe = &s->fe; 671 *config->fe = &s->fe;
672 s->ts_mode = config->ts_mode;
673 s->fw_loaded = false;
636 674
637 i2c_set_clientdata(client, s); 675 i2c_set_clientdata(client, s);
638 676
639 dev_info(&s->client->dev, 677 dev_info(&s->client->dev,
640 "%s: Silicon Labs Si2168 successfully attached\n", 678 "Silicon Labs Si2168 successfully attached\n");
641 KBUILD_MODNAME);
642 return 0; 679 return 0;
643err: 680err:
644 kfree(s); 681 kfree(s);
645 dev_dbg(&client->dev, "%s: failed=%d\n", __func__, ret); 682 dev_dbg(&client->dev, "failed=%d\n", ret);
646 return ret; 683 return ret;
647} 684}
648 685
@@ -650,7 +687,7 @@ static int si2168_remove(struct i2c_client *client)
650{ 687{
651 struct si2168 *s = i2c_get_clientdata(client); 688 struct si2168 *s = i2c_get_clientdata(client);
652 689
653 dev_dbg(&client->dev, "%s:\n", __func__); 690 dev_dbg(&client->dev, "\n");
654 691
655 i2c_del_mux_adapter(s->adapter); 692 i2c_del_mux_adapter(s->adapter);
656 693
diff --git a/drivers/media/dvb-frontends/si2168.h b/drivers/media/dvb-frontends/si2168.h
index 3c5b5ab01796..e086d6719451 100644
--- a/drivers/media/dvb-frontends/si2168.h
+++ b/drivers/media/dvb-frontends/si2168.h
@@ -34,6 +34,12 @@ struct si2168_config {
34 * returned by driver 34 * returned by driver
35 */ 35 */
36 struct i2c_adapter **i2c_adapter; 36 struct i2c_adapter **i2c_adapter;
37
38 /* TS mode */
39 u8 ts_mode;
37}; 40};
38 41
42#define SI2168_TS_PARALLEL 0x06
43#define SI2168_TS_SERIAL 0x03
44
39#endif 45#endif
diff --git a/drivers/media/dvb-frontends/si2168_priv.h b/drivers/media/dvb-frontends/si2168_priv.h
index ebbf502ec313..e13983ed4be1 100644
--- a/drivers/media/dvb-frontends/si2168_priv.h
+++ b/drivers/media/dvb-frontends/si2168_priv.h
@@ -36,6 +36,8 @@ struct si2168 {
36 fe_delivery_system_t delivery_system; 36 fe_delivery_system_t delivery_system;
37 fe_status_t fe_status; 37 fe_status_t fe_status;
38 bool active; 38 bool active;
39 bool fw_loaded;
40 u8 ts_mode;
39}; 41};
40 42
41/* firmare command struct */ 43/* firmare command struct */
diff --git a/drivers/media/dvb-frontends/si21xx.c b/drivers/media/dvb-frontends/si21xx.c
index 73b47cc6a13b..16850e2bf02f 100644
--- a/drivers/media/dvb-frontends/si21xx.c
+++ b/drivers/media/dvb-frontends/si21xx.c
@@ -236,6 +236,9 @@ static int si21_writeregs(struct si21xx_state *state, u8 reg1,
236 .len = len + 1 236 .len = len + 1
237 }; 237 };
238 238
239 if (len > sizeof(buf) - 1)
240 return -EINVAL;
241
239 msg.buf[0] = reg1; 242 msg.buf[0] = reg1;
240 memcpy(msg.buf + 1, data, len); 243 memcpy(msg.buf + 1, data, len);
241 244
diff --git a/drivers/media/dvb-frontends/sp2.c b/drivers/media/dvb-frontends/sp2.c
new file mode 100644
index 000000000000..9b684d5c8f91
--- /dev/null
+++ b/drivers/media/dvb-frontends/sp2.c
@@ -0,0 +1,441 @@
1/*
2 * CIMaX SP2/SP2HF (Atmel T90FJR) CI driver
3 *
4 * Copyright (C) 2014 Olli Salonen <olli.salonen@iki.fi>
5 *
6 * Heavily based on CIMax2(R) SP2 driver in conjunction with NetUp Dual
7 * DVB-S2 CI card (cimax2) with following copyrights:
8 *
9 * Copyright (C) 2009 NetUP Inc.
10 * Copyright (C) 2009 Igor M. Liplianin <liplianin@netup.ru>
11 * Copyright (C) 2009 Abylay Ospan <aospan@netup.ru>
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 */
23
24#include "sp2_priv.h"
25
26static int sp2_read_i2c(struct sp2 *s, u8 reg, u8 *buf, int len)
27{
28 int ret;
29 struct i2c_client *client = s->client;
30 struct i2c_adapter *adap = client->adapter;
31 struct i2c_msg msg[] = {
32 {
33 .addr = client->addr,
34 .flags = 0,
35 .buf = &reg,
36 .len = 1
37 }, {
38 .addr = client->addr,
39 .flags = I2C_M_RD,
40 .buf = buf,
41 .len = len
42 }
43 };
44
45 ret = i2c_transfer(adap, msg, 2);
46
47 if (ret != 2) {
48 dev_err(&client->dev, "i2c read error, reg = 0x%02x, status = %d\n",
49 reg, ret);
50 if (ret < 0)
51 return ret;
52 else
53 return -EIO;
54 }
55
56 dev_dbg(&s->client->dev, "addr=0x%04x, reg = 0x%02x, data = %02x\n",
57 client->addr, reg, buf[0]);
58
59 return 0;
60}
61
62static int sp2_write_i2c(struct sp2 *s, u8 reg, u8 *buf, int len)
63{
64 int ret;
65 u8 buffer[35];
66 struct i2c_client *client = s->client;
67 struct i2c_adapter *adap = client->adapter;
68 struct i2c_msg msg = {
69 .addr = client->addr,
70 .flags = 0,
71 .buf = &buffer[0],
72 .len = len + 1
73 };
74
75 if ((len + 1) > sizeof(buffer)) {
76 dev_err(&client->dev, "i2c wr reg=%02x: len=%d is too big!\n",
77 reg, len);
78 return -EINVAL;
79 }
80
81 buffer[0] = reg;
82 memcpy(&buffer[1], buf, len);
83
84 ret = i2c_transfer(adap, &msg, 1);
85
86 if (ret != 1) {
87 dev_err(&client->dev, "i2c write error, reg = 0x%02x, status = %d\n",
88 reg, ret);
89 if (ret < 0)
90 return ret;
91 else
92 return -EIO;
93 }
94
95 return 0;
96}
97
98static int sp2_ci_op_cam(struct dvb_ca_en50221 *en50221, int slot, u8 acs,
99 u8 read, int addr, u8 data)
100{
101 struct sp2 *s = en50221->data;
102 u8 store;
103 int mem, ret;
104 int (*ci_op_cam)(void*, u8, int, u8, int*) = s->ci_control;
105
106 dev_dbg(&s->client->dev, "slot=%d, acs=0x%02x, addr=0x%04x, data = 0x%02x",
107 slot, acs, addr, data);
108
109 if (slot != 0)
110 return -EINVAL;
111
112 /*
113 * change module access type between IO space and attribute memory
114 * when needed
115 */
116 if (s->module_access_type != acs) {
117 ret = sp2_read_i2c(s, 0x00, &store, 1);
118
119 if (ret)
120 return ret;
121
122 store &= ~(SP2_MOD_CTL_ACS1 | SP2_MOD_CTL_ACS0);
123 store |= acs;
124
125 ret = sp2_write_i2c(s, 0x00, &store, 1);
126 if (ret)
127 return ret;
128 }
129
130 s->module_access_type = acs;
131
132 /* implementation of ci_op_cam is device specific */
133 if (ci_op_cam) {
134 ret = ci_op_cam(s->priv, read, addr, data, &mem);
135 } else {
136 dev_err(&s->client->dev, "callback not defined");
137 return -EINVAL;
138 }
139
140 if (ret)
141 return ret;
142
143 if (read) {
144 dev_dbg(&s->client->dev, "cam read, addr=0x%04x, data = 0x%04x",
145 addr, mem);
146 return mem;
147 } else {
148 return 0;
149 }
150}
151
152int sp2_ci_read_attribute_mem(struct dvb_ca_en50221 *en50221,
153 int slot, int addr)
154{
155 return sp2_ci_op_cam(en50221, slot, SP2_CI_ATTR_ACS,
156 SP2_CI_RD, addr, 0);
157}
158
159int sp2_ci_write_attribute_mem(struct dvb_ca_en50221 *en50221,
160 int slot, int addr, u8 data)
161{
162 return sp2_ci_op_cam(en50221, slot, SP2_CI_ATTR_ACS,
163 SP2_CI_WR, addr, data);
164}
165
166int sp2_ci_read_cam_control(struct dvb_ca_en50221 *en50221,
167 int slot, u8 addr)
168{
169 return sp2_ci_op_cam(en50221, slot, SP2_CI_IO_ACS,
170 SP2_CI_RD, addr, 0);
171}
172
173int sp2_ci_write_cam_control(struct dvb_ca_en50221 *en50221,
174 int slot, u8 addr, u8 data)
175{
176 return sp2_ci_op_cam(en50221, slot, SP2_CI_IO_ACS,
177 SP2_CI_WR, addr, data);
178}
179
180int sp2_ci_slot_reset(struct dvb_ca_en50221 *en50221, int slot)
181{
182 struct sp2 *s = en50221->data;
183 u8 buf;
184 int ret;
185
186 dev_dbg(&s->client->dev, "slot: %d\n", slot);
187
188 if (slot != 0)
189 return -EINVAL;
190
191 /* RST on */
192 buf = SP2_MOD_CTL_RST;
193 ret = sp2_write_i2c(s, 0x00, &buf, 1);
194
195 if (ret)
196 return ret;
197
198 usleep_range(500, 600);
199
200 /* RST off */
201 buf = 0x00;
202 ret = sp2_write_i2c(s, 0x00, &buf, 1);
203
204 if (ret)
205 return ret;
206
207 msleep(1000);
208
209 return 0;
210}
211
212int sp2_ci_slot_shutdown(struct dvb_ca_en50221 *en50221, int slot)
213{
214 struct sp2 *s = en50221->data;
215
216 dev_dbg(&s->client->dev, "slot:%d\n", slot);
217
218 /* not implemented */
219 return 0;
220}
221
222int sp2_ci_slot_ts_enable(struct dvb_ca_en50221 *en50221, int slot)
223{
224 struct sp2 *s = en50221->data;
225 u8 buf;
226
227 dev_dbg(&s->client->dev, "slot:%d\n", slot);
228
229 if (slot != 0)
230 return -EINVAL;
231
232 sp2_read_i2c(s, 0x00, &buf, 1);
233
234 /* disable bypass and enable TS */
235 buf |= (SP2_MOD_CTL_TSOEN | SP2_MOD_CTL_TSIEN);
236 return sp2_write_i2c(s, 0, &buf, 1);
237}
238
239int sp2_ci_poll_slot_status(struct dvb_ca_en50221 *en50221,
240 int slot, int open)
241{
242 struct sp2 *s = en50221->data;
243 u8 buf[2];
244 int ret;
245
246 dev_dbg(&s->client->dev, "slot:%d open:%d\n", slot, open);
247
248 /*
249 * CAM module INSERT/REMOVE processing. Slow operation because of i2c
250 * transfers. Throttle read to one per sec.
251 */
252 if (time_after(jiffies, s->next_status_checked_time)) {
253 ret = sp2_read_i2c(s, 0x00, buf, 1);
254 s->next_status_checked_time = jiffies + msecs_to_jiffies(1000);
255
256 if (ret)
257 return 0;
258
259 if (buf[0] & SP2_MOD_CTL_DET)
260 s->status = DVB_CA_EN50221_POLL_CAM_PRESENT |
261 DVB_CA_EN50221_POLL_CAM_READY;
262 else
263 s->status = 0;
264 }
265
266 return s->status;
267}
268
269int sp2_init(struct sp2 *s)
270{
271 int ret = 0;
272 u8 buf;
273 u8 cimax_init[34] = {
274 0x00, /* module A control*/
275 0x00, /* auto select mask high A */
276 0x00, /* auto select mask low A */
277 0x00, /* auto select pattern high A */
278 0x00, /* auto select pattern low A */
279 0x44, /* memory access time A, 600 ns */
280 0x00, /* invert input A */
281 0x00, /* RFU */
282 0x00, /* RFU */
283 0x00, /* module B control*/
284 0x00, /* auto select mask high B */
285 0x00, /* auto select mask low B */
286 0x00, /* auto select pattern high B */
287 0x00, /* auto select pattern low B */
288 0x44, /* memory access time B, 600 ns */
289 0x00, /* invert input B */
290 0x00, /* RFU */
291 0x00, /* RFU */
292 0x00, /* auto select mask high Ext */
293 0x00, /* auto select mask low Ext */
294 0x00, /* auto select pattern high Ext */
295 0x00, /* auto select pattern low Ext */
296 0x00, /* RFU */
297 0x02, /* destination - module A */
298 0x01, /* power control reg, VCC power on */
299 0x00, /* RFU */
300 0x00, /* int status read only */
301 0x00, /* Interrupt Mask Register */
302 0x05, /* EXTINT=active-high, INT=push-pull */
303 0x00, /* USCG1 */
304 0x04, /* ack active low */
305 0x00, /* LOCK = 0 */
306 0x22, /* unknown */
307 0x00, /* synchronization? */
308 };
309
310 dev_dbg(&s->client->dev, "\n");
311
312 s->ca.owner = THIS_MODULE;
313 s->ca.read_attribute_mem = sp2_ci_read_attribute_mem;
314 s->ca.write_attribute_mem = sp2_ci_write_attribute_mem;
315 s->ca.read_cam_control = sp2_ci_read_cam_control;
316 s->ca.write_cam_control = sp2_ci_write_cam_control;
317 s->ca.slot_reset = sp2_ci_slot_reset;
318 s->ca.slot_shutdown = sp2_ci_slot_shutdown;
319 s->ca.slot_ts_enable = sp2_ci_slot_ts_enable;
320 s->ca.poll_slot_status = sp2_ci_poll_slot_status;
321 s->ca.data = s;
322 s->module_access_type = 0;
323
324 /* initialize all regs */
325 ret = sp2_write_i2c(s, 0x00, &cimax_init[0], 34);
326 if (ret)
327 goto err;
328
329 /* lock registers */
330 buf = 1;
331 ret = sp2_write_i2c(s, 0x1f, &buf, 1);
332 if (ret)
333 goto err;
334
335 /* power on slots */
336 ret = sp2_write_i2c(s, 0x18, &buf, 1);
337 if (ret)
338 goto err;
339
340 ret = dvb_ca_en50221_init(s->dvb_adap, &s->ca, 0, 1);
341 if (ret)
342 goto err;
343
344 return 0;
345
346err:
347 dev_dbg(&s->client->dev, "init failed=%d\n", ret);
348 return ret;
349}
350
351int sp2_exit(struct i2c_client *client)
352{
353 struct sp2 *s;
354
355 dev_dbg(&client->dev, "\n");
356
357 if (client == NULL)
358 return 0;
359
360 s = i2c_get_clientdata(client);
361 if (s == NULL)
362 return 0;
363
364 if (s->ca.data == NULL)
365 return 0;
366
367 dvb_ca_en50221_release(&s->ca);
368
369 return 0;
370}
371
372static int sp2_probe(struct i2c_client *client,
373 const struct i2c_device_id *id)
374{
375 struct sp2_config *cfg = client->dev.platform_data;
376 struct sp2 *s;
377 int ret;
378
379 dev_dbg(&client->dev, "\n");
380
381 s = kzalloc(sizeof(struct sp2), GFP_KERNEL);
382 if (!s) {
383 ret = -ENOMEM;
384 dev_err(&client->dev, "kzalloc() failed\n");
385 goto err;
386 }
387
388 s->client = client;
389 s->dvb_adap = cfg->dvb_adap;
390 s->priv = cfg->priv;
391 s->ci_control = cfg->ci_control;
392
393 i2c_set_clientdata(client, s);
394
395 ret = sp2_init(s);
396 if (ret)
397 goto err;
398
399 dev_info(&s->client->dev, "CIMaX SP2 successfully attached\n");
400 return 0;
401err:
402 dev_dbg(&client->dev, "init failed=%d\n", ret);
403 kfree(s);
404
405 return ret;
406}
407
408static int sp2_remove(struct i2c_client *client)
409{
410 struct si2157 *s = i2c_get_clientdata(client);
411
412 dev_dbg(&client->dev, "\n");
413
414 sp2_exit(client);
415 if (s != NULL)
416 kfree(s);
417
418 return 0;
419}
420
421static const struct i2c_device_id sp2_id[] = {
422 {"sp2", 0},
423 {}
424};
425MODULE_DEVICE_TABLE(i2c, sp2_id);
426
427static struct i2c_driver sp2_driver = {
428 .driver = {
429 .owner = THIS_MODULE,
430 .name = "sp2",
431 },
432 .probe = sp2_probe,
433 .remove = sp2_remove,
434 .id_table = sp2_id,
435};
436
437module_i2c_driver(sp2_driver);
438
439MODULE_DESCRIPTION("CIMaX SP2/HF CI driver");
440MODULE_AUTHOR("Olli Salonen <olli.salonen@iki.fi>");
441MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb-frontends/sp2.h b/drivers/media/dvb-frontends/sp2.h
new file mode 100644
index 000000000000..6cceea022d49
--- /dev/null
+++ b/drivers/media/dvb-frontends/sp2.h
@@ -0,0 +1,53 @@
1/*
2 * CIMaX SP2/HF CI driver
3 *
4 * Copyright (C) 2014 Olli Salonen <olli.salonen@iki.fi>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#ifndef SP2_H
18#define SP2_H
19
20#include <linux/kconfig.h>
21#include "dvb_ca_en50221.h"
22
23/*
24 * I2C address
25 * 0x40 (port 0)
26 * 0x41 (port 1)
27 */
28struct sp2_config {
29 /* dvb_adapter to attach the ci to */
30 struct dvb_adapter *dvb_adap;
31
32 /* function ci_control handles the device specific ci ops */
33 void *ci_control;
34
35 /* priv is passed back to function ci_control */
36 void *priv;
37};
38
39extern int sp2_ci_read_attribute_mem(struct dvb_ca_en50221 *en50221,
40 int slot, int addr);
41extern int sp2_ci_write_attribute_mem(struct dvb_ca_en50221 *en50221,
42 int slot, int addr, u8 data);
43extern int sp2_ci_read_cam_control(struct dvb_ca_en50221 *en50221,
44 int slot, u8 addr);
45extern int sp2_ci_write_cam_control(struct dvb_ca_en50221 *en50221,
46 int slot, u8 addr, u8 data);
47extern int sp2_ci_slot_reset(struct dvb_ca_en50221 *en50221, int slot);
48extern int sp2_ci_slot_shutdown(struct dvb_ca_en50221 *en50221, int slot);
49extern int sp2_ci_slot_ts_enable(struct dvb_ca_en50221 *en50221, int slot);
50extern int sp2_ci_poll_slot_status(struct dvb_ca_en50221 *en50221,
51 int slot, int open);
52
53#endif
diff --git a/drivers/media/dvb-frontends/sp2_priv.h b/drivers/media/dvb-frontends/sp2_priv.h
new file mode 100644
index 000000000000..37fef7bcd63f
--- /dev/null
+++ b/drivers/media/dvb-frontends/sp2_priv.h
@@ -0,0 +1,50 @@
1/*
2 * CIMaX SP2/HF CI driver
3 *
4 * Copyright (C) 2014 Olli Salonen <olli.salonen@iki.fi>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#ifndef SP2_PRIV_H
18#define SP2_PRIV_H
19
20#include "sp2.h"
21#include "dvb_frontend.h"
22
23/* state struct */
24struct sp2 {
25 int status;
26 struct i2c_client *client;
27 struct dvb_adapter *dvb_adap;
28 struct dvb_ca_en50221 ca;
29 int module_access_type;
30 unsigned long next_status_checked_time;
31 void *priv;
32 void *ci_control;
33};
34
35#define SP2_CI_ATTR_ACS 0x00
36#define SP2_CI_IO_ACS 0x04
37#define SP2_CI_WR 0
38#define SP2_CI_RD 1
39
40/* Module control register (0x00 module A, 0x09 module B) bits */
41#define SP2_MOD_CTL_DET 0x01
42#define SP2_MOD_CTL_AUTO 0x02
43#define SP2_MOD_CTL_ACS0 0x04
44#define SP2_MOD_CTL_ACS1 0x08
45#define SP2_MOD_CTL_HAD 0x10
46#define SP2_MOD_CTL_TSIEN 0x20
47#define SP2_MOD_CTL_TSOEN 0x40
48#define SP2_MOD_CTL_RST 0x80
49
50#endif
diff --git a/drivers/media/dvb-frontends/sp8870.c b/drivers/media/dvb-frontends/sp8870.c
index 2aa8ef76eba2..57dc2abaa87b 100644
--- a/drivers/media/dvb-frontends/sp8870.c
+++ b/drivers/media/dvb-frontends/sp8870.c
@@ -394,8 +394,7 @@ static int sp8870_read_ber (struct dvb_frontend* fe, u32 * ber)
394 if (ret < 0) 394 if (ret < 0)
395 return -EIO; 395 return -EIO;
396 396
397 tmp = ret << 6; 397 tmp = ret << 6;
398
399 if (tmp >= 0x3FFF0) 398 if (tmp >= 0x3FFF0)
400 tmp = ~0; 399 tmp = ~0;
401 400
diff --git a/drivers/media/dvb-frontends/stv0367.c b/drivers/media/dvb-frontends/stv0367.c
index 59b6e661acc0..b31ff265ff24 100644
--- a/drivers/media/dvb-frontends/stv0367.c
+++ b/drivers/media/dvb-frontends/stv0367.c
@@ -59,7 +59,6 @@ struct stv0367cab_state {
59 int locked; /* channel found */ 59 int locked; /* channel found */
60 u32 freq_khz; /* found frequency (in kHz) */ 60 u32 freq_khz; /* found frequency (in kHz) */
61 u32 symbol_rate; /* found symbol rate (in Bds) */ 61 u32 symbol_rate; /* found symbol rate (in Bds) */
62 enum stv0367cab_mod modulation; /* modulation */
63 fe_spectral_inversion_t spect_inv; /* Spectrum Inversion */ 62 fe_spectral_inversion_t spect_inv; /* Spectrum Inversion */
64}; 63};
65 64
@@ -554,7 +553,7 @@ static struct st_register def0367ter[STV0367TER_NBREGS] = {
554#define RF_LOOKUP_TABLE_SIZE 31 553#define RF_LOOKUP_TABLE_SIZE 31
555#define RF_LOOKUP_TABLE2_SIZE 16 554#define RF_LOOKUP_TABLE2_SIZE 16
556/* RF Level (for RF AGC->AGC1) Lookup Table, depends on the board and tuner.*/ 555/* RF Level (for RF AGC->AGC1) Lookup Table, depends on the board and tuner.*/
557s32 stv0367cab_RF_LookUp1[RF_LOOKUP_TABLE_SIZE][RF_LOOKUP_TABLE_SIZE] = { 556static const s32 stv0367cab_RF_LookUp1[RF_LOOKUP_TABLE_SIZE][RF_LOOKUP_TABLE_SIZE] = {
558 {/*AGC1*/ 557 {/*AGC1*/
559 48, 50, 51, 53, 54, 56, 57, 58, 60, 61, 62, 63, 558 48, 50, 51, 53, 54, 56, 57, 58, 60, 61, 62, 63,
560 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 559 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75,
@@ -566,7 +565,7 @@ s32 stv0367cab_RF_LookUp1[RF_LOOKUP_TABLE_SIZE][RF_LOOKUP_TABLE_SIZE] = {
566 } 565 }
567}; 566};
568/* RF Level (for IF AGC->AGC2) Lookup Table, depends on the board and tuner.*/ 567/* RF Level (for IF AGC->AGC2) Lookup Table, depends on the board and tuner.*/
569s32 stv0367cab_RF_LookUp2[RF_LOOKUP_TABLE2_SIZE][RF_LOOKUP_TABLE2_SIZE] = { 568static const s32 stv0367cab_RF_LookUp2[RF_LOOKUP_TABLE2_SIZE][RF_LOOKUP_TABLE2_SIZE] = {
570 {/*AGC2*/ 569 {/*AGC2*/
571 28, 29, 31, 32, 34, 35, 36, 37, 570 28, 29, 31, 32, 34, 35, 36, 37,
572 38, 39, 40, 41, 42, 43, 44, 45, 571 38, 39, 40, 41, 42, 43, 44, 45,
@@ -1935,8 +1934,6 @@ static int stv0367ter_get_frontend(struct dvb_frontend *fe)
1935 struct dtv_frontend_properties *p = &fe->dtv_property_cache; 1934 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1936 struct stv0367_state *state = fe->demodulator_priv; 1935 struct stv0367_state *state = fe->demodulator_priv;
1937 struct stv0367ter_state *ter_state = state->ter_state; 1936 struct stv0367ter_state *ter_state = state->ter_state;
1938
1939 int error = 0;
1940 enum stv0367_ter_mode mode; 1937 enum stv0367_ter_mode mode;
1941 int constell = 0,/* snr = 0,*/ Data = 0; 1938 int constell = 0,/* snr = 0,*/ Data = 0;
1942 1939
@@ -2020,7 +2017,7 @@ static int stv0367ter_get_frontend(struct dvb_frontend *fe)
2020 2017
2021 p->guard_interval = stv0367_readbits(state, F367TER_SYR_GUARD); 2018 p->guard_interval = stv0367_readbits(state, F367TER_SYR_GUARD);
2022 2019
2023 return error; 2020 return 0;
2024} 2021}
2025 2022
2026static int stv0367ter_read_snr(struct dvb_frontend *fe, u16 *snr) 2023static int stv0367ter_read_snr(struct dvb_frontend *fe, u16 *snr)
@@ -2999,7 +2996,6 @@ enum stv0367_cab_signal_type stv0367cab_algo(struct stv0367_state *state,
2999 2996
3000 if (QAMFEC_Lock) { 2997 if (QAMFEC_Lock) {
3001 signalType = FE_CAB_DATAOK; 2998 signalType = FE_CAB_DATAOK;
3002 cab_state->modulation = p->modulation;
3003 cab_state->spect_inv = stv0367_readbits(state, 2999 cab_state->spect_inv = stv0367_readbits(state,
3004 F367CAB_QUAD_INV); 3000 F367CAB_QUAD_INV);
3005#if 0 3001#if 0
@@ -3165,7 +3161,7 @@ static int stv0367cab_get_frontend(struct dvb_frontend *fe)
3165 case FE_CAB_MOD_QAM128: 3161 case FE_CAB_MOD_QAM128:
3166 p->modulation = QAM_128; 3162 p->modulation = QAM_128;
3167 break; 3163 break;
3168 case QAM_256: 3164 case FE_CAB_MOD_QAM256:
3169 p->modulation = QAM_256; 3165 p->modulation = QAM_256;
3170 break; 3166 break;
3171 default: 3167 default:
diff --git a/drivers/media/dvb-frontends/stv0900_core.c b/drivers/media/dvb-frontends/stv0900_core.c
index e5a87b57d855..2c88abfab531 100644
--- a/drivers/media/dvb-frontends/stv0900_core.c
+++ b/drivers/media/dvb-frontends/stv0900_core.c
@@ -1270,7 +1270,6 @@ enum fe_stv0900_error stv0900_st_dvbs2_single(struct stv0900_internal *intp,
1270 enum fe_stv0900_demod_mode LDPC_Mode, 1270 enum fe_stv0900_demod_mode LDPC_Mode,
1271 enum fe_stv0900_demod_num demod) 1271 enum fe_stv0900_demod_num demod)
1272{ 1272{
1273 enum fe_stv0900_error error = STV0900_NO_ERROR;
1274 s32 reg_ind; 1273 s32 reg_ind;
1275 1274
1276 dprintk("%s\n", __func__); 1275 dprintk("%s\n", __func__);
@@ -1337,7 +1336,7 @@ enum fe_stv0900_error stv0900_st_dvbs2_single(struct stv0900_internal *intp,
1337 break; 1336 break;
1338 } 1337 }
1339 1338
1340 return error; 1339 return STV0900_NO_ERROR;
1341} 1340}
1342 1341
1343static enum fe_stv0900_error stv0900_init_internal(struct dvb_frontend *fe, 1342static enum fe_stv0900_error stv0900_init_internal(struct dvb_frontend *fe,
@@ -1555,8 +1554,6 @@ static int stv0900_status(struct stv0900_internal *intp,
1555static int stv0900_set_mis(struct stv0900_internal *intp, 1554static int stv0900_set_mis(struct stv0900_internal *intp,
1556 enum fe_stv0900_demod_num demod, int mis) 1555 enum fe_stv0900_demod_num demod, int mis)
1557{ 1556{
1558 enum fe_stv0900_error error = STV0900_NO_ERROR;
1559
1560 dprintk("%s\n", __func__); 1557 dprintk("%s\n", __func__);
1561 1558
1562 if (mis < 0 || mis > 255) { 1559 if (mis < 0 || mis > 255) {
@@ -1569,7 +1566,7 @@ static int stv0900_set_mis(struct stv0900_internal *intp,
1569 stv0900_write_reg(intp, ISIBITENA, 0xff); 1566 stv0900_write_reg(intp, ISIBITENA, 0xff);
1570 } 1567 }
1571 1568
1572 return error; 1569 return STV0900_NO_ERROR;
1573} 1570}
1574 1571
1575 1572
diff --git a/drivers/media/dvb-frontends/stv0900_sw.c b/drivers/media/dvb-frontends/stv0900_sw.c
index 4ce1d260b3eb..a0a7b1664c53 100644
--- a/drivers/media/dvb-frontends/stv0900_sw.c
+++ b/drivers/media/dvb-frontends/stv0900_sw.c
@@ -1733,9 +1733,10 @@ static void stv0900_set_search_standard(struct stv0900_internal *intp,
1733 break; 1733 break;
1734 case STV0900_SEARCH_DSS: 1734 case STV0900_SEARCH_DSS:
1735 dprintk("Search Standard = DSS\n"); 1735 dprintk("Search Standard = DSS\n");
1736 case STV0900_SEARCH_DVBS2:
1737 break; 1736 break;
1737 case STV0900_SEARCH_DVBS2:
1738 dprintk("Search Standard = DVBS2\n"); 1738 dprintk("Search Standard = DVBS2\n");
1739 break;
1739 case STV0900_AUTO_SEARCH: 1740 case STV0900_AUTO_SEARCH:
1740 default: 1741 default:
1741 dprintk("Search Standard = AUTO\n"); 1742 dprintk("Search Standard = AUTO\n");
diff --git a/drivers/media/dvb-frontends/tc90522.c b/drivers/media/dvb-frontends/tc90522.c
new file mode 100644
index 000000000000..d9905fb52f84
--- /dev/null
+++ b/drivers/media/dvb-frontends/tc90522.c
@@ -0,0 +1,840 @@
1/*
2 * Toshiba TC90522 Demodulator
3 *
4 * Copyright (C) 2014 Akihiro Tsukada <tskd08@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17/*
18 * NOTICE:
19 * This driver is incomplete and lacks init/config of the chips,
20 * as the necessary info is not disclosed.
21 * It assumes that users of this driver (such as a PCI bridge of
22 * DTV receiver cards) properly init and configure the chip
23 * via I2C *before* calling this driver's init() function.
24 *
25 * Currently, PT3 driver is the only one that uses this driver,
26 * and contains init/config code in its firmware.
27 * Thus some part of the code might be dependent on PT3 specific config.
28 */
29
30#include <linux/kernel.h>
31#include <linux/math64.h>
32#include <linux/dvb/frontend.h>
33#include "dvb_math.h"
34#include "tc90522.h"
35
36#define TC90522_I2C_THRU_REG 0xfe
37
38#define TC90522_MODULE_IDX(addr) (((u8)(addr) & 0x02U) >> 1)
39
40struct tc90522_state {
41 struct tc90522_config cfg;
42 struct dvb_frontend fe;
43 struct i2c_client *i2c_client;
44 struct i2c_adapter tuner_i2c;
45
46 bool lna;
47};
48
49struct reg_val {
50 u8 reg;
51 u8 val;
52};
53
54static int
55reg_write(struct tc90522_state *state, const struct reg_val *regs, int num)
56{
57 int i, ret;
58 struct i2c_msg msg;
59
60 ret = 0;
61 msg.addr = state->i2c_client->addr;
62 msg.flags = 0;
63 msg.len = 2;
64 for (i = 0; i < num; i++) {
65 msg.buf = (u8 *)&regs[i];
66 ret = i2c_transfer(state->i2c_client->adapter, &msg, 1);
67 if (ret == 0)
68 ret = -EIO;
69 if (ret < 0)
70 return ret;
71 }
72 return 0;
73}
74
75static int reg_read(struct tc90522_state *state, u8 reg, u8 *val, u8 len)
76{
77 struct i2c_msg msgs[2] = {
78 {
79 .addr = state->i2c_client->addr,
80 .flags = 0,
81 .buf = &reg,
82 .len = 1,
83 },
84 {
85 .addr = state->i2c_client->addr,
86 .flags = I2C_M_RD,
87 .buf = val,
88 .len = len,
89 },
90 };
91 int ret;
92
93 ret = i2c_transfer(state->i2c_client->adapter, msgs, ARRAY_SIZE(msgs));
94 if (ret == ARRAY_SIZE(msgs))
95 ret = 0;
96 else if (ret >= 0)
97 ret = -EIO;
98 return ret;
99}
100
101static struct tc90522_state *cfg_to_state(struct tc90522_config *c)
102{
103 return container_of(c, struct tc90522_state, cfg);
104}
105
106
107static int tc90522s_set_tsid(struct dvb_frontend *fe)
108{
109 struct reg_val set_tsid[] = {
110 { 0x8f, 00 },
111 { 0x90, 00 }
112 };
113
114 set_tsid[0].val = (fe->dtv_property_cache.stream_id & 0xff00) >> 8;
115 set_tsid[1].val = fe->dtv_property_cache.stream_id & 0xff;
116 return reg_write(fe->demodulator_priv, set_tsid, ARRAY_SIZE(set_tsid));
117}
118
119static int tc90522t_set_layers(struct dvb_frontend *fe)
120{
121 struct reg_val rv;
122 u8 laysel;
123
124 laysel = ~fe->dtv_property_cache.isdbt_layer_enabled & 0x07;
125 laysel = (laysel & 0x01) << 2 | (laysel & 0x02) | (laysel & 0x04) >> 2;
126 rv.reg = 0x71;
127 rv.val = laysel;
128 return reg_write(fe->demodulator_priv, &rv, 1);
129}
130
131/* frontend ops */
132
133static int tc90522s_read_status(struct dvb_frontend *fe, fe_status_t *status)
134{
135 struct tc90522_state *state;
136 int ret;
137 u8 reg;
138
139 state = fe->demodulator_priv;
140 ret = reg_read(state, 0xc3, &reg, 1);
141 if (ret < 0)
142 return ret;
143
144 *status = 0;
145 if (reg & 0x80) /* input level under min ? */
146 return 0;
147 *status |= FE_HAS_SIGNAL;
148
149 if (reg & 0x60) /* carrier? */
150 return 0;
151 *status |= FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_SYNC;
152
153 if (reg & 0x10)
154 return 0;
155 if (reg_read(state, 0xc5, &reg, 1) < 0 || !(reg & 0x03))
156 return 0;
157 *status |= FE_HAS_LOCK;
158 return 0;
159}
160
161static int tc90522t_read_status(struct dvb_frontend *fe, fe_status_t *status)
162{
163 struct tc90522_state *state;
164 int ret;
165 u8 reg;
166
167 state = fe->demodulator_priv;
168 ret = reg_read(state, 0x96, &reg, 1);
169 if (ret < 0)
170 return ret;
171
172 *status = 0;
173 if (reg & 0xe0) {
174 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_VITERBI
175 | FE_HAS_SYNC | FE_HAS_LOCK;
176 return 0;
177 }
178
179 ret = reg_read(state, 0x80, &reg, 1);
180 if (ret < 0)
181 return ret;
182
183 if (reg & 0xf0)
184 return 0;
185 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER;
186
187 if (reg & 0x0c)
188 return 0;
189 *status |= FE_HAS_SYNC | FE_HAS_VITERBI;
190
191 if (reg & 0x02)
192 return 0;
193 *status |= FE_HAS_LOCK;
194 return 0;
195}
196
197static const fe_code_rate_t fec_conv_sat[] = {
198 FEC_NONE, /* unused */
199 FEC_1_2, /* for BPSK */
200 FEC_1_2, FEC_2_3, FEC_3_4, FEC_5_6, FEC_7_8, /* for QPSK */
201 FEC_2_3, /* for 8PSK. (trellis code) */
202};
203
204static int tc90522s_get_frontend(struct dvb_frontend *fe)
205{
206 struct tc90522_state *state;
207 struct dtv_frontend_properties *c;
208 struct dtv_fe_stats *stats;
209 int ret, i;
210 int layers;
211 u8 val[10];
212 u32 cndat;
213
214 state = fe->demodulator_priv;
215 c = &fe->dtv_property_cache;
216 c->delivery_system = SYS_ISDBS;
217
218 layers = 0;
219 ret = reg_read(state, 0xe8, val, 3);
220 if (ret == 0) {
221 int slots;
222 u8 v;
223
224 /* high/single layer */
225 v = (val[0] & 0x70) >> 4;
226 c->modulation = (v == 7) ? PSK_8 : QPSK;
227 c->fec_inner = fec_conv_sat[v];
228 c->layer[0].fec = c->fec_inner;
229 c->layer[0].modulation = c->modulation;
230 c->layer[0].segment_count = val[1] & 0x3f; /* slots */
231
232 /* low layer */
233 v = (val[0] & 0x07);
234 c->layer[1].fec = fec_conv_sat[v];
235 if (v == 0) /* no low layer */
236 c->layer[1].segment_count = 0;
237 else
238 c->layer[1].segment_count = val[2] & 0x3f; /* slots */
239 /* actually, BPSK if v==1, but not defined in fe_modulation_t */
240 c->layer[1].modulation = QPSK;
241 layers = (v > 0) ? 2 : 1;
242
243 slots = c->layer[0].segment_count + c->layer[1].segment_count;
244 c->symbol_rate = 28860000 * slots / 48;
245 }
246
247 /* statistics */
248
249 stats = &c->strength;
250 stats->len = 0;
251 /* let the connected tuner set RSSI property cache */
252 if (fe->ops.tuner_ops.get_rf_strength) {
253 u16 dummy;
254
255 fe->ops.tuner_ops.get_rf_strength(fe, &dummy);
256 }
257
258 stats = &c->cnr;
259 stats->len = 1;
260 stats->stat[0].scale = FE_SCALE_NOT_AVAILABLE;
261 cndat = 0;
262 ret = reg_read(state, 0xbc, val, 2);
263 if (ret == 0)
264 cndat = val[0] << 8 | val[1];
265 if (cndat >= 3000) {
266 u32 p, p4;
267 s64 cn;
268
269 cndat -= 3000; /* cndat: 4.12 fixed point float */
270 /*
271 * cnr[mdB] = -1634.6 * P^5 + 14341 * P^4 - 50259 * P^3
272 * + 88977 * P^2 - 89565 * P + 58857
273 * (P = sqrt(cndat) / 64)
274 */
275 /* p := sqrt(cndat) << 8 = P << 14, 2.14 fixed point float */
276 /* cn = cnr << 3 */
277 p = int_sqrt(cndat << 16);
278 p4 = cndat * cndat;
279 cn = div64_s64(-16346LL * p4 * p, 10) >> 35;
280 cn += (14341LL * p4) >> 21;
281 cn -= (50259LL * cndat * p) >> 23;
282 cn += (88977LL * cndat) >> 9;
283 cn -= (89565LL * p) >> 11;
284 cn += 58857 << 3;
285 stats->stat[0].svalue = cn >> 3;
286 stats->stat[0].scale = FE_SCALE_DECIBEL;
287 }
288
289 /* per-layer post viterbi BER (or PER? config dependent?) */
290 stats = &c->post_bit_error;
291 memset(stats, 0, sizeof(*stats));
292 stats->len = layers;
293 ret = reg_read(state, 0xeb, val, 10);
294 if (ret < 0)
295 for (i = 0; i < layers; i++)
296 stats->stat[i].scale = FE_SCALE_NOT_AVAILABLE;
297 else {
298 for (i = 0; i < layers; i++) {
299 stats->stat[i].scale = FE_SCALE_COUNTER;
300 stats->stat[i].uvalue = val[i * 5] << 16
301 | val[i * 5 + 1] << 8 | val[i * 5 + 2];
302 }
303 }
304 stats = &c->post_bit_count;
305 memset(stats, 0, sizeof(*stats));
306 stats->len = layers;
307 if (ret < 0)
308 for (i = 0; i < layers; i++)
309 stats->stat[i].scale = FE_SCALE_NOT_AVAILABLE;
310 else {
311 for (i = 0; i < layers; i++) {
312 stats->stat[i].scale = FE_SCALE_COUNTER;
313 stats->stat[i].uvalue =
314 val[i * 5 + 3] << 8 | val[i * 5 + 4];
315 stats->stat[i].uvalue *= 204 * 8;
316 }
317 }
318
319 return 0;
320}
321
322
323static const fe_transmit_mode_t tm_conv[] = {
324 TRANSMISSION_MODE_2K,
325 TRANSMISSION_MODE_4K,
326 TRANSMISSION_MODE_8K,
327 0
328};
329
330static const fe_code_rate_t fec_conv_ter[] = {
331 FEC_1_2, FEC_2_3, FEC_3_4, FEC_5_6, FEC_7_8, 0, 0, 0
332};
333
334static const fe_modulation_t mod_conv[] = {
335 DQPSK, QPSK, QAM_16, QAM_64, 0, 0, 0, 0
336};
337
338static int tc90522t_get_frontend(struct dvb_frontend *fe)
339{
340 struct tc90522_state *state;
341 struct dtv_frontend_properties *c;
342 struct dtv_fe_stats *stats;
343 int ret, i;
344 int layers;
345 u8 val[15], mode;
346 u32 cndat;
347
348 state = fe->demodulator_priv;
349 c = &fe->dtv_property_cache;
350 c->delivery_system = SYS_ISDBT;
351 c->bandwidth_hz = 6000000;
352 mode = 1;
353 ret = reg_read(state, 0xb0, val, 1);
354 if (ret == 0) {
355 mode = (val[0] & 0xc0) >> 2;
356 c->transmission_mode = tm_conv[mode];
357 c->guard_interval = (val[0] & 0x30) >> 4;
358 }
359
360 ret = reg_read(state, 0xb2, val, 6);
361 layers = 0;
362 if (ret == 0) {
363 u8 v;
364
365 c->isdbt_partial_reception = val[0] & 0x01;
366 c->isdbt_sb_mode = (val[0] & 0xc0) == 0x01;
367
368 /* layer A */
369 v = (val[2] & 0x78) >> 3;
370 if (v == 0x0f)
371 c->layer[0].segment_count = 0;
372 else {
373 layers++;
374 c->layer[0].segment_count = v;
375 c->layer[0].fec = fec_conv_ter[(val[1] & 0x1c) >> 2];
376 c->layer[0].modulation = mod_conv[(val[1] & 0xe0) >> 5];
377 v = (val[1] & 0x03) << 1 | (val[2] & 0x80) >> 7;
378 c->layer[0].interleaving = v;
379 }
380
381 /* layer B */
382 v = (val[3] & 0x03) << 1 | (val[4] & 0xc0) >> 6;
383 if (v == 0x0f)
384 c->layer[1].segment_count = 0;
385 else {
386 layers++;
387 c->layer[1].segment_count = v;
388 c->layer[1].fec = fec_conv_ter[(val[3] & 0xe0) >> 5];
389 c->layer[1].modulation = mod_conv[(val[2] & 0x07)];
390 c->layer[1].interleaving = (val[3] & 0x1c) >> 2;
391 }
392
393 /* layer C */
394 v = (val[5] & 0x1e) >> 1;
395 if (v == 0x0f)
396 c->layer[2].segment_count = 0;
397 else {
398 layers++;
399 c->layer[2].segment_count = v;
400 c->layer[2].fec = fec_conv_ter[(val[4] & 0x07)];
401 c->layer[2].modulation = mod_conv[(val[4] & 0x38) >> 3];
402 c->layer[2].interleaving = (val[5] & 0xe0) >> 5;
403 }
404 }
405
406 /* statistics */
407
408 stats = &c->strength;
409 stats->len = 0;
410 /* let the connected tuner set RSSI property cache */
411 if (fe->ops.tuner_ops.get_rf_strength) {
412 u16 dummy;
413
414 fe->ops.tuner_ops.get_rf_strength(fe, &dummy);
415 }
416
417 stats = &c->cnr;
418 stats->len = 1;
419 stats->stat[0].scale = FE_SCALE_NOT_AVAILABLE;
420 cndat = 0;
421 ret = reg_read(state, 0x8b, val, 3);
422 if (ret == 0)
423 cndat = val[0] << 16 | val[1] << 8 | val[2];
424 if (cndat != 0) {
425 u32 p, tmp;
426 s64 cn;
427
428 /*
429 * cnr[mdB] = 0.024 P^4 - 1.6 P^3 + 39.8 P^2 + 549.1 P + 3096.5
430 * (P = 10log10(5505024/cndat))
431 */
432 /* cn = cnr << 3 (61.3 fixed point float */
433 /* p = 10log10(5505024/cndat) << 24 (8.24 fixed point float)*/
434 p = intlog10(5505024) - intlog10(cndat);
435 p *= 10;
436
437 cn = 24772;
438 cn += div64_s64(43827LL * p, 10) >> 24;
439 tmp = p >> 8;
440 cn += div64_s64(3184LL * tmp * tmp, 10) >> 32;
441 tmp = p >> 13;
442 cn -= div64_s64(128LL * tmp * tmp * tmp, 10) >> 33;
443 tmp = p >> 18;
444 cn += div64_s64(192LL * tmp * tmp * tmp * tmp, 1000) >> 24;
445
446 stats->stat[0].svalue = cn >> 3;
447 stats->stat[0].scale = FE_SCALE_DECIBEL;
448 }
449
450 /* per-layer post viterbi BER (or PER? config dependent?) */
451 stats = &c->post_bit_error;
452 memset(stats, 0, sizeof(*stats));
453 stats->len = layers;
454 ret = reg_read(state, 0x9d, val, 15);
455 if (ret < 0)
456 for (i = 0; i < layers; i++)
457 stats->stat[i].scale = FE_SCALE_NOT_AVAILABLE;
458 else {
459 for (i = 0; i < layers; i++) {
460 stats->stat[i].scale = FE_SCALE_COUNTER;
461 stats->stat[i].uvalue = val[i * 3] << 16
462 | val[i * 3 + 1] << 8 | val[i * 3 + 2];
463 }
464 }
465 stats = &c->post_bit_count;
466 memset(stats, 0, sizeof(*stats));
467 stats->len = layers;
468 if (ret < 0)
469 for (i = 0; i < layers; i++)
470 stats->stat[i].scale = FE_SCALE_NOT_AVAILABLE;
471 else {
472 for (i = 0; i < layers; i++) {
473 stats->stat[i].scale = FE_SCALE_COUNTER;
474 stats->stat[i].uvalue =
475 val[9 + i * 2] << 8 | val[9 + i * 2 + 1];
476 stats->stat[i].uvalue *= 204 * 8;
477 }
478 }
479
480 return 0;
481}
482
483static const struct reg_val reset_sat = { 0x03, 0x01 };
484static const struct reg_val reset_ter = { 0x01, 0x40 };
485
486static int tc90522_set_frontend(struct dvb_frontend *fe)
487{
488 struct tc90522_state *state;
489 int ret;
490
491 state = fe->demodulator_priv;
492
493 if (fe->ops.tuner_ops.set_params)
494 ret = fe->ops.tuner_ops.set_params(fe);
495 else
496 ret = -ENODEV;
497 if (ret < 0)
498 goto failed;
499
500 if (fe->ops.delsys[0] == SYS_ISDBS) {
501 ret = tc90522s_set_tsid(fe);
502 if (ret < 0)
503 goto failed;
504 ret = reg_write(state, &reset_sat, 1);
505 } else {
506 ret = tc90522t_set_layers(fe);
507 if (ret < 0)
508 goto failed;
509 ret = reg_write(state, &reset_ter, 1);
510 }
511 if (ret < 0)
512 goto failed;
513
514 return 0;
515
516failed:
517 dev_warn(&state->tuner_i2c.dev, "(%s) failed. [adap%d-fe%d]\n",
518 __func__, fe->dvb->num, fe->id);
519 return ret;
520}
521
522static int tc90522_get_tune_settings(struct dvb_frontend *fe,
523 struct dvb_frontend_tune_settings *settings)
524{
525 if (fe->ops.delsys[0] == SYS_ISDBS) {
526 settings->min_delay_ms = 250;
527 settings->step_size = 1000;
528 settings->max_drift = settings->step_size * 2;
529 } else {
530 settings->min_delay_ms = 400;
531 settings->step_size = 142857;
532 settings->max_drift = settings->step_size;
533 }
534 return 0;
535}
536
537static int tc90522_set_if_agc(struct dvb_frontend *fe, bool on)
538{
539 struct reg_val agc_sat[] = {
540 { 0x0a, 0x00 },
541 { 0x10, 0x30 },
542 { 0x11, 0x00 },
543 { 0x03, 0x01 },
544 };
545 struct reg_val agc_ter[] = {
546 { 0x25, 0x00 },
547 { 0x23, 0x4c },
548 { 0x01, 0x40 },
549 };
550 struct tc90522_state *state;
551 struct reg_val *rv;
552 int num;
553
554 state = fe->demodulator_priv;
555 if (fe->ops.delsys[0] == SYS_ISDBS) {
556 agc_sat[0].val = on ? 0xff : 0x00;
557 agc_sat[1].val |= 0x80;
558 agc_sat[1].val |= on ? 0x01 : 0x00;
559 agc_sat[2].val |= on ? 0x40 : 0x00;
560 rv = agc_sat;
561 num = ARRAY_SIZE(agc_sat);
562 } else {
563 agc_ter[0].val = on ? 0x40 : 0x00;
564 agc_ter[1].val |= on ? 0x00 : 0x01;
565 rv = agc_ter;
566 num = ARRAY_SIZE(agc_ter);
567 }
568 return reg_write(state, rv, num);
569}
570
571static const struct reg_val sleep_sat = { 0x17, 0x01 };
572static const struct reg_val sleep_ter = { 0x03, 0x90 };
573
574static int tc90522_sleep(struct dvb_frontend *fe)
575{
576 struct tc90522_state *state;
577 int ret;
578
579 state = fe->demodulator_priv;
580 if (fe->ops.delsys[0] == SYS_ISDBS)
581 ret = reg_write(state, &sleep_sat, 1);
582 else {
583 ret = reg_write(state, &sleep_ter, 1);
584 if (ret == 0 && fe->ops.set_lna &&
585 fe->dtv_property_cache.lna == LNA_AUTO) {
586 fe->dtv_property_cache.lna = 0;
587 ret = fe->ops.set_lna(fe);
588 fe->dtv_property_cache.lna = LNA_AUTO;
589 }
590 }
591 if (ret < 0)
592 dev_warn(&state->tuner_i2c.dev,
593 "(%s) failed. [adap%d-fe%d]\n",
594 __func__, fe->dvb->num, fe->id);
595 return ret;
596}
597
598static const struct reg_val wakeup_sat = { 0x17, 0x00 };
599static const struct reg_val wakeup_ter = { 0x03, 0x80 };
600
601static int tc90522_init(struct dvb_frontend *fe)
602{
603 struct tc90522_state *state;
604 int ret;
605
606 /*
607 * Because the init sequence is not public,
608 * the parent device/driver should have init'ed the device before.
609 * just wake up the device here.
610 */
611
612 state = fe->demodulator_priv;
613 if (fe->ops.delsys[0] == SYS_ISDBS)
614 ret = reg_write(state, &wakeup_sat, 1);
615 else {
616 ret = reg_write(state, &wakeup_ter, 1);
617 if (ret == 0 && fe->ops.set_lna &&
618 fe->dtv_property_cache.lna == LNA_AUTO) {
619 fe->dtv_property_cache.lna = 1;
620 ret = fe->ops.set_lna(fe);
621 fe->dtv_property_cache.lna = LNA_AUTO;
622 }
623 }
624 if (ret < 0) {
625 dev_warn(&state->tuner_i2c.dev,
626 "(%s) failed. [adap%d-fe%d]\n",
627 __func__, fe->dvb->num, fe->id);
628 return ret;
629 }
630
631 /* prefer 'all-layers' to 'none' as a default */
632 if (fe->dtv_property_cache.isdbt_layer_enabled == 0)
633 fe->dtv_property_cache.isdbt_layer_enabled = 7;
634 return tc90522_set_if_agc(fe, true);
635}
636
637
638/*
639 * tuner I2C adapter functions
640 */
641
642static int
643tc90522_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
644{
645 struct tc90522_state *state;
646 struct i2c_msg *new_msgs;
647 int i, j;
648 int ret, rd_num;
649 u8 wbuf[256];
650 u8 *p, *bufend;
651
652 if (num <= 0)
653 return -EINVAL;
654
655 rd_num = 0;
656 for (i = 0; i < num; i++)
657 if (msgs[i].flags & I2C_M_RD)
658 rd_num++;
659 new_msgs = kmalloc(sizeof(*new_msgs) * (num + rd_num), GFP_KERNEL);
660 if (!new_msgs)
661 return -ENOMEM;
662
663 state = i2c_get_adapdata(adap);
664 p = wbuf;
665 bufend = wbuf + sizeof(wbuf);
666 for (i = 0, j = 0; i < num; i++, j++) {
667 new_msgs[j].addr = state->i2c_client->addr;
668 new_msgs[j].flags = msgs[i].flags;
669
670 if (msgs[i].flags & I2C_M_RD) {
671 new_msgs[j].flags &= ~I2C_M_RD;
672 if (p + 2 > bufend)
673 break;
674 p[0] = TC90522_I2C_THRU_REG;
675 p[1] = msgs[i].addr << 1 | 0x01;
676 new_msgs[j].buf = p;
677 new_msgs[j].len = 2;
678 p += 2;
679 j++;
680 new_msgs[j].addr = state->i2c_client->addr;
681 new_msgs[j].flags = msgs[i].flags;
682 new_msgs[j].buf = msgs[i].buf;
683 new_msgs[j].len = msgs[i].len;
684 continue;
685 }
686
687 if (p + msgs[i].len + 2 > bufend)
688 break;
689 p[0] = TC90522_I2C_THRU_REG;
690 p[1] = msgs[i].addr << 1;
691 memcpy(p + 2, msgs[i].buf, msgs[i].len);
692 new_msgs[j].buf = p;
693 new_msgs[j].len = msgs[i].len + 2;
694 p += new_msgs[j].len;
695 }
696
697 if (i < num)
698 ret = -ENOMEM;
699 else
700 ret = i2c_transfer(state->i2c_client->adapter, new_msgs, j);
701 if (ret >= 0 && ret < j)
702 ret = -EIO;
703 kfree(new_msgs);
704 return (ret == j) ? num : ret;
705}
706
707static u32 tc90522_functionality(struct i2c_adapter *adap)
708{
709 return I2C_FUNC_I2C;
710}
711
712static const struct i2c_algorithm tc90522_tuner_i2c_algo = {
713 .master_xfer = &tc90522_master_xfer,
714 .functionality = &tc90522_functionality,
715};
716
717
718/*
719 * I2C driver functions
720 */
721
722static const struct dvb_frontend_ops tc90522_ops_sat = {
723 .delsys = { SYS_ISDBS },
724 .info = {
725 .name = "Toshiba TC90522 ISDB-S module",
726 .frequency_min = 950000,
727 .frequency_max = 2150000,
728 .caps = FE_CAN_INVERSION_AUTO | FE_CAN_FEC_AUTO |
729 FE_CAN_QAM_AUTO | FE_CAN_TRANSMISSION_MODE_AUTO |
730 FE_CAN_GUARD_INTERVAL_AUTO | FE_CAN_HIERARCHY_AUTO,
731 },
732
733 .init = tc90522_init,
734 .sleep = tc90522_sleep,
735 .set_frontend = tc90522_set_frontend,
736 .get_tune_settings = tc90522_get_tune_settings,
737
738 .get_frontend = tc90522s_get_frontend,
739 .read_status = tc90522s_read_status,
740};
741
742static const struct dvb_frontend_ops tc90522_ops_ter = {
743 .delsys = { SYS_ISDBT },
744 .info = {
745 .name = "Toshiba TC90522 ISDB-T module",
746 .frequency_min = 470000000,
747 .frequency_max = 770000000,
748 .frequency_stepsize = 142857,
749 .caps = FE_CAN_INVERSION_AUTO |
750 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
751 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
752 FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 |
753 FE_CAN_QAM_AUTO | FE_CAN_TRANSMISSION_MODE_AUTO |
754 FE_CAN_GUARD_INTERVAL_AUTO | FE_CAN_RECOVER |
755 FE_CAN_HIERARCHY_AUTO,
756 },
757
758 .init = tc90522_init,
759 .sleep = tc90522_sleep,
760 .set_frontend = tc90522_set_frontend,
761 .get_tune_settings = tc90522_get_tune_settings,
762
763 .get_frontend = tc90522t_get_frontend,
764 .read_status = tc90522t_read_status,
765};
766
767
768static int tc90522_probe(struct i2c_client *client,
769 const struct i2c_device_id *id)
770{
771 struct tc90522_state *state;
772 struct tc90522_config *cfg;
773 const struct dvb_frontend_ops *ops;
774 struct i2c_adapter *adap;
775 int ret;
776
777 state = kzalloc(sizeof(*state), GFP_KERNEL);
778 if (!state)
779 return -ENOMEM;
780 state->i2c_client = client;
781
782 cfg = client->dev.platform_data;
783 memcpy(&state->cfg, cfg, sizeof(state->cfg));
784 cfg->fe = state->cfg.fe = &state->fe;
785 ops = id->driver_data == 0 ? &tc90522_ops_sat : &tc90522_ops_ter;
786 memcpy(&state->fe.ops, ops, sizeof(*ops));
787 state->fe.demodulator_priv = state;
788
789 adap = &state->tuner_i2c;
790 adap->owner = THIS_MODULE;
791 adap->algo = &tc90522_tuner_i2c_algo;
792 adap->dev.parent = &client->dev;
793 strlcpy(adap->name, "tc90522_sub", sizeof(adap->name));
794 i2c_set_adapdata(adap, state);
795 ret = i2c_add_adapter(adap);
796 if (ret < 0)
797 goto err;
798 cfg->tuner_i2c = state->cfg.tuner_i2c = adap;
799
800 i2c_set_clientdata(client, &state->cfg);
801 dev_info(&client->dev, "Toshiba TC90522 attached.\n");
802 return 0;
803
804err:
805 kfree(state);
806 return ret;
807}
808
809static int tc90522_remove(struct i2c_client *client)
810{
811 struct tc90522_state *state;
812
813 state = cfg_to_state(i2c_get_clientdata(client));
814 i2c_del_adapter(&state->tuner_i2c);
815 kfree(state);
816 return 0;
817}
818
819
820static const struct i2c_device_id tc90522_id[] = {
821 { TC90522_I2C_DEV_SAT, 0 },
822 { TC90522_I2C_DEV_TER, 1 },
823 {}
824};
825MODULE_DEVICE_TABLE(i2c, tc90522_id);
826
827static struct i2c_driver tc90522_driver = {
828 .driver = {
829 .name = "tc90522",
830 },
831 .probe = tc90522_probe,
832 .remove = tc90522_remove,
833 .id_table = tc90522_id,
834};
835
836module_i2c_driver(tc90522_driver);
837
838MODULE_DESCRIPTION("Toshiba TC90522 frontend");
839MODULE_AUTHOR("Akihiro TSUKADA");
840MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb-frontends/tc90522.h b/drivers/media/dvb-frontends/tc90522.h
new file mode 100644
index 000000000000..b1cbddfa6ee6
--- /dev/null
+++ b/drivers/media/dvb-frontends/tc90522.h
@@ -0,0 +1,42 @@
1/*
2 * Toshiba TC90522 Demodulator
3 *
4 * Copyright (C) 2014 Akihiro Tsukada <tskd08@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17/*
18 * The demod has 4 input (2xISDB-T and 2xISDB-S),
19 * and provides independent sub modules for each input.
20 * As the sub modules work in parallel and have the separate i2c addr's,
21 * this driver treats each sub module as one demod device.
22 */
23
24#ifndef TC90522_H
25#define TC90522_H
26
27#include <linux/i2c.h>
28#include "dvb_frontend.h"
29
30/* I2C device types */
31#define TC90522_I2C_DEV_SAT "tc90522sat"
32#define TC90522_I2C_DEV_TER "tc90522ter"
33
34struct tc90522_config {
35 /* [OUT] frontend returned by driver */
36 struct dvb_frontend *fe;
37
38 /* [OUT] tuner I2C adapter returned by driver */
39 struct i2c_adapter *tuner_i2c;
40};
41
42#endif /* TC90522_H */
diff --git a/drivers/media/dvb-frontends/tda10071.c b/drivers/media/dvb-frontends/tda10071.c
index 9619be5d4827..4a19b85995f1 100644
--- a/drivers/media/dvb-frontends/tda10071.c
+++ b/drivers/media/dvb-frontends/tda10071.c
@@ -1037,7 +1037,7 @@ static int tda10071_init(struct dvb_frontend *fe)
1037 ret = -EFAULT; 1037 ret = -EFAULT;
1038 goto error; 1038 goto error;
1039 } else { 1039 } else {
1040 priv->warm = 1; 1040 priv->warm = true;
1041 } 1041 }
1042 1042
1043 cmd.args[0] = CMD_GET_FW_VERSION; 1043 cmd.args[0] = CMD_GET_FW_VERSION;
diff --git a/drivers/media/dvb-frontends/zl10039.c b/drivers/media/dvb-frontends/zl10039.c
index 91b6b2e9b792..ee09ec26c553 100644
--- a/drivers/media/dvb-frontends/zl10039.c
+++ b/drivers/media/dvb-frontends/zl10039.c
@@ -111,7 +111,7 @@ static int zl10039_write(struct zl10039_state *state,
111 111
112 if (1 + count > sizeof(buf)) { 112 if (1 + count > sizeof(buf)) {
113 printk(KERN_WARNING 113 printk(KERN_WARNING
114 "%s: i2c wr reg=%04x: len=%zd is too big!\n", 114 "%s: i2c wr reg=%04x: len=%zu is too big!\n",
115 KBUILD_MODNAME, reg, count); 115 KBUILD_MODNAME, reg, count);
116 return -EINVAL; 116 return -EINVAL;
117 } 117 }
diff --git a/drivers/media/firewire/firedtv-avc.c b/drivers/media/firewire/firedtv-avc.c
index d1a1a1324ef8..251a556112a9 100644
--- a/drivers/media/firewire/firedtv-avc.c
+++ b/drivers/media/firewire/firedtv-avc.c
@@ -1157,6 +1157,10 @@ int avc_ca_pmt(struct firedtv *fdtv, char *msg, int length)
1157 if (pmt_cmd_id != 1 && pmt_cmd_id != 4) 1157 if (pmt_cmd_id != 1 && pmt_cmd_id != 4)
1158 dev_err(fdtv->device, 1158 dev_err(fdtv->device,
1159 "invalid pmt_cmd_id %d\n", pmt_cmd_id); 1159 "invalid pmt_cmd_id %d\n", pmt_cmd_id);
1160 if (program_info_length > sizeof(c->operand) - 4 - write_pos) {
1161 ret = -EINVAL;
1162 goto out;
1163 }
1160 1164
1161 memcpy(&c->operand[write_pos], &msg[read_pos], 1165 memcpy(&c->operand[write_pos], &msg[read_pos],
1162 program_info_length); 1166 program_info_length);
@@ -1180,6 +1184,12 @@ int avc_ca_pmt(struct firedtv *fdtv, char *msg, int length)
1180 dev_err(fdtv->device, "invalid pmt_cmd_id %d " 1184 dev_err(fdtv->device, "invalid pmt_cmd_id %d "
1181 "at stream level\n", pmt_cmd_id); 1185 "at stream level\n", pmt_cmd_id);
1182 1186
1187 if (es_info_length > sizeof(c->operand) - 4 -
1188 write_pos) {
1189 ret = -EINVAL;
1190 goto out;
1191 }
1192
1183 memcpy(&c->operand[write_pos], &msg[read_pos], 1193 memcpy(&c->operand[write_pos], &msg[read_pos],
1184 es_info_length); 1194 es_info_length);
1185 read_pos += es_info_length; 1195 read_pos += es_info_length;
diff --git a/drivers/media/i2c/adv7343_regs.h b/drivers/media/i2c/adv7343_regs.h
index 446606764346..2f04ce4b9118 100644
--- a/drivers/media/i2c/adv7343_regs.h
+++ b/drivers/media/i2c/adv7343_regs.h
@@ -13,7 +13,7 @@
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 */ 14 */
15 15
16#ifndef ADV7343_REG_H 16#ifndef ADV7343_REGS_H
17#define ADV7343_REGS_H 17#define ADV7343_REGS_H
18 18
19struct adv7343_std_info { 19struct adv7343_std_info {
diff --git a/drivers/media/i2c/adv7604.c b/drivers/media/i2c/adv7604.c
index de88b980a837..47795ff71688 100644
--- a/drivers/media/i2c/adv7604.c
+++ b/drivers/media/i2c/adv7604.c
@@ -1593,7 +1593,7 @@ static int adv7604_query_dv_timings(struct v4l2_subdev *sd,
1593 bt->height += hdmi_read16(sd, 0x0b, 0xfff); 1593 bt->height += hdmi_read16(sd, 0x0b, 0xfff);
1594 bt->il_vfrontporch = hdmi_read16(sd, 0x2c, 0x1fff) / 2; 1594 bt->il_vfrontporch = hdmi_read16(sd, 0x2c, 0x1fff) / 2;
1595 bt->il_vsync = hdmi_read16(sd, 0x30, 0x1fff) / 2; 1595 bt->il_vsync = hdmi_read16(sd, 0x30, 0x1fff) / 2;
1596 bt->vbackporch = hdmi_read16(sd, 0x34, 0x1fff) / 2; 1596 bt->il_vbackporch = hdmi_read16(sd, 0x34, 0x1fff) / 2;
1597 } 1597 }
1598 adv7604_fill_optional_dv_timings_fields(sd, timings); 1598 adv7604_fill_optional_dv_timings_fields(sd, timings);
1599 } else { 1599 } else {
diff --git a/drivers/media/i2c/adv7842.c b/drivers/media/i2c/adv7842.c
index 0d554919cdd5..48b628bc6714 100644
--- a/drivers/media/i2c/adv7842.c
+++ b/drivers/media/i2c/adv7842.c
@@ -1435,6 +1435,8 @@ static int adv7842_query_dv_timings(struct v4l2_subdev *sd,
1435 1435
1436 v4l2_dbg(1, debug, sd, "%s:\n", __func__); 1436 v4l2_dbg(1, debug, sd, "%s:\n", __func__);
1437 1437
1438 memset(timings, 0, sizeof(struct v4l2_dv_timings));
1439
1438 /* SDP block */ 1440 /* SDP block */
1439 if (state->mode == ADV7842_MODE_SDP) 1441 if (state->mode == ADV7842_MODE_SDP)
1440 return -ENODATA; 1442 return -ENODATA;
@@ -1483,7 +1485,7 @@ static int adv7842_query_dv_timings(struct v4l2_subdev *sd,
1483 hdmi_read(sd, 0x2d)) / 2; 1485 hdmi_read(sd, 0x2d)) / 2;
1484 bt->il_vsync = ((hdmi_read(sd, 0x30) & 0x1f) * 256 + 1486 bt->il_vsync = ((hdmi_read(sd, 0x30) & 0x1f) * 256 +
1485 hdmi_read(sd, 0x31)) / 2; 1487 hdmi_read(sd, 0x31)) / 2;
1486 bt->vbackporch = ((hdmi_read(sd, 0x34) & 0x1f) * 256 + 1488 bt->il_vbackporch = ((hdmi_read(sd, 0x34) & 0x1f) * 256 +
1487 hdmi_read(sd, 0x35)) / 2; 1489 hdmi_read(sd, 0x35)) / 2;
1488 } 1490 }
1489 adv7842_fill_optional_dv_timings_fields(sd, timings); 1491 adv7842_fill_optional_dv_timings_fields(sd, timings);
diff --git a/drivers/media/i2c/lm3560.c b/drivers/media/i2c/lm3560.c
index c23de593c17d..d9ece4b2d047 100644
--- a/drivers/media/i2c/lm3560.c
+++ b/drivers/media/i2c/lm3560.c
@@ -100,14 +100,14 @@ static int lm3560_enable_ctrl(struct lm3560_flash *flash,
100 int rval; 100 int rval;
101 101
102 if (led_no == LM3560_LED0) { 102 if (led_no == LM3560_LED0) {
103 if (on == true) 103 if (on)
104 rval = regmap_update_bits(flash->regmap, 104 rval = regmap_update_bits(flash->regmap,
105 REG_ENABLE, 0x08, 0x08); 105 REG_ENABLE, 0x08, 0x08);
106 else 106 else
107 rval = regmap_update_bits(flash->regmap, 107 rval = regmap_update_bits(flash->regmap,
108 REG_ENABLE, 0x08, 0x00); 108 REG_ENABLE, 0x08, 0x00);
109 } else { 109 } else {
110 if (on == true) 110 if (on)
111 rval = regmap_update_bits(flash->regmap, 111 rval = regmap_update_bits(flash->regmap,
112 REG_ENABLE, 0x10, 0x10); 112 REG_ENABLE, 0x10, 0x10);
113 else 113 else
diff --git a/drivers/media/i2c/ov7670.c b/drivers/media/i2c/ov7670.c
index cdd7c1b7259b..dd3db2458a4f 100644
--- a/drivers/media/i2c/ov7670.c
+++ b/drivers/media/i2c/ov7670.c
@@ -19,6 +19,7 @@
19#include <media/v4l2-device.h> 19#include <media/v4l2-device.h>
20#include <media/v4l2-ctrls.h> 20#include <media/v4l2-ctrls.h>
21#include <media/v4l2-mediabus.h> 21#include <media/v4l2-mediabus.h>
22#include <media/v4l2-image-sizes.h>
22#include <media/ov7670.h> 23#include <media/ov7670.h>
23 24
24MODULE_AUTHOR("Jonathan Corbet <corbet@lwn.net>"); 25MODULE_AUTHOR("Jonathan Corbet <corbet@lwn.net>");
@@ -30,19 +31,6 @@ module_param(debug, bool, 0644);
30MODULE_PARM_DESC(debug, "Debug level (0-1)"); 31MODULE_PARM_DESC(debug, "Debug level (0-1)");
31 32
32/* 33/*
33 * Basic window sizes. These probably belong somewhere more globally
34 * useful.
35 */
36#define VGA_WIDTH 640
37#define VGA_HEIGHT 480
38#define QVGA_WIDTH 320
39#define QVGA_HEIGHT 240
40#define CIF_WIDTH 352
41#define CIF_HEIGHT 288
42#define QCIF_WIDTH 176
43#define QCIF_HEIGHT 144
44
45/*
46 * The 7670 sits on i2c with ID 0x42 34 * The 7670 sits on i2c with ID 0x42
47 */ 35 */
48#define OV7670_I2C_ADDR 0x42 36#define OV7670_I2C_ADDR 0x42
diff --git a/drivers/media/i2c/s5k5baf.c b/drivers/media/i2c/s5k5baf.c
index 564f05f2c9ef..0e461a6fd065 100644
--- a/drivers/media/i2c/s5k5baf.c
+++ b/drivers/media/i2c/s5k5baf.c
@@ -816,7 +816,7 @@ static void s5k5baf_hw_find_min_fiv(struct s5k5baf *state)
816 "error setting frame interval: %d\n", err); 816 "error setting frame interval: %d\n", err);
817 state->error = -EINVAL; 817 state->error = -EINVAL;
818 } 818 }
819 }; 819 }
820 v4l2_err(&state->sd, "cannot find correct frame interval\n"); 820 v4l2_err(&state->sd, "cannot find correct frame interval\n");
821 state->error = -ERANGE; 821 state->error = -ERANGE;
822} 822}
diff --git a/drivers/media/i2c/saa6752hs.c b/drivers/media/i2c/saa6752hs.c
index 04e9e55018a5..4024ea6f1371 100644
--- a/drivers/media/i2c/saa6752hs.c
+++ b/drivers/media/i2c/saa6752hs.c
@@ -660,7 +660,7 @@ static const struct v4l2_subdev_ops saa6752hs_ops = {
660static int saa6752hs_probe(struct i2c_client *client, 660static int saa6752hs_probe(struct i2c_client *client,
661 const struct i2c_device_id *id) 661 const struct i2c_device_id *id)
662{ 662{
663 struct saa6752hs_state *h = kzalloc(sizeof(*h), GFP_KERNEL); 663 struct saa6752hs_state *h;
664 struct v4l2_subdev *sd; 664 struct v4l2_subdev *sd;
665 struct v4l2_ctrl_handler *hdl; 665 struct v4l2_ctrl_handler *hdl;
666 u8 addr = 0x13; 666 u8 addr = 0x13;
@@ -668,6 +668,8 @@ static int saa6752hs_probe(struct i2c_client *client,
668 668
669 v4l_info(client, "chip found @ 0x%x (%s)\n", 669 v4l_info(client, "chip found @ 0x%x (%s)\n",
670 client->addr << 1, client->adapter->name); 670 client->addr << 1, client->adapter->name);
671
672 h = devm_kzalloc(&client->dev, sizeof(*h), GFP_KERNEL);
671 if (h == NULL) 673 if (h == NULL)
672 return -ENOMEM; 674 return -ENOMEM;
673 sd = &h->sd; 675 sd = &h->sd;
@@ -752,7 +754,6 @@ static int saa6752hs_probe(struct i2c_client *client,
752 int err = hdl->error; 754 int err = hdl->error;
753 755
754 v4l2_ctrl_handler_free(hdl); 756 v4l2_ctrl_handler_free(hdl);
755 kfree(h);
756 return err; 757 return err;
757 } 758 }
758 v4l2_ctrl_cluster(3, &h->video_bitrate_mode); 759 v4l2_ctrl_cluster(3, &h->video_bitrate_mode);
@@ -767,7 +768,6 @@ static int saa6752hs_remove(struct i2c_client *client)
767 768
768 v4l2_device_unregister_subdev(sd); 769 v4l2_device_unregister_subdev(sd);
769 v4l2_ctrl_handler_free(&to_state(sd)->hdl); 770 v4l2_ctrl_handler_free(&to_state(sd)->hdl);
770 kfree(to_state(sd));
771 return 0; 771 return 0;
772} 772}
773 773
diff --git a/drivers/media/i2c/smiapp/smiapp-core.c b/drivers/media/i2c/smiapp/smiapp-core.c
index 62acb10630f9..932ed9be9ff3 100644
--- a/drivers/media/i2c/smiapp/smiapp-core.c
+++ b/drivers/media/i2c/smiapp/smiapp-core.c
@@ -31,8 +31,9 @@
31#include <linux/device.h> 31#include <linux/device.h>
32#include <linux/gpio.h> 32#include <linux/gpio.h>
33#include <linux/module.h> 33#include <linux/module.h>
34#include <linux/slab.h>
35#include <linux/regulator/consumer.h> 34#include <linux/regulator/consumer.h>
35#include <linux/slab.h>
36#include <linux/smiapp.h>
36#include <linux/v4l2-mediabus.h> 37#include <linux/v4l2-mediabus.h>
37#include <media/v4l2-device.h> 38#include <media/v4l2-device.h>
38 39
@@ -297,8 +298,9 @@ static int smiapp_pll_update(struct smiapp_sensor *sensor)
297 if (rval < 0) 298 if (rval < 0)
298 return rval; 299 return rval;
299 300
300 *sensor->pixel_rate_parray->p_cur.p_s64 = pll->vt_pix_clk_freq_hz; 301 __v4l2_ctrl_s_ctrl_int64(sensor->pixel_rate_parray,
301 *sensor->pixel_rate_csi->p_cur.p_s64 = pll->pixel_rate_csi; 302 pll->vt_pix_clk_freq_hz);
303 __v4l2_ctrl_s_ctrl_int64(sensor->pixel_rate_csi, pll->pixel_rate_csi);
302 304
303 return 0; 305 return 0;
304} 306}
@@ -319,13 +321,7 @@ static void __smiapp_update_exposure_limits(struct smiapp_sensor *sensor)
319 + sensor->vblank->val 321 + sensor->vblank->val
320 - sensor->limits[SMIAPP_LIMIT_COARSE_INTEGRATION_TIME_MAX_MARGIN]; 322 - sensor->limits[SMIAPP_LIMIT_COARSE_INTEGRATION_TIME_MAX_MARGIN];
321 323
322 ctrl->maximum = max; 324 __v4l2_ctrl_modify_range(ctrl, ctrl->minimum, max, ctrl->step, max);
323 if (ctrl->default_value > max)
324 ctrl->default_value = max;
325 if (ctrl->val > max)
326 ctrl->val = max;
327 if (ctrl->cur.val > max)
328 ctrl->cur.val = max;
329} 325}
330 326
331/* 327/*
@@ -404,6 +400,14 @@ static void smiapp_update_mbus_formats(struct smiapp_sensor *sensor)
404 pixel_order_str[pixel_order]); 400 pixel_order_str[pixel_order]);
405} 401}
406 402
403static const char * const smiapp_test_patterns[] = {
404 "Disabled",
405 "Solid Colour",
406 "Eight Vertical Colour Bars",
407 "Colour Bars With Fade to Grey",
408 "Pseudorandom Sequence (PN9)",
409};
410
407static int smiapp_set_ctrl(struct v4l2_ctrl *ctrl) 411static int smiapp_set_ctrl(struct v4l2_ctrl *ctrl)
408{ 412{
409 struct smiapp_sensor *sensor = 413 struct smiapp_sensor *sensor =
@@ -477,6 +481,39 @@ static int smiapp_set_ctrl(struct v4l2_ctrl *ctrl)
477 481
478 return smiapp_pll_update(sensor); 482 return smiapp_pll_update(sensor);
479 483
484 case V4L2_CID_TEST_PATTERN: {
485 unsigned int i;
486
487 for (i = 0; i < ARRAY_SIZE(sensor->test_data); i++)
488 v4l2_ctrl_activate(
489 sensor->test_data[i],
490 ctrl->val ==
491 V4L2_SMIAPP_TEST_PATTERN_MODE_SOLID_COLOUR);
492
493 return smiapp_write(
494 sensor, SMIAPP_REG_U16_TEST_PATTERN_MODE, ctrl->val);
495 }
496
497 case V4L2_CID_TEST_PATTERN_RED:
498 return smiapp_write(
499 sensor, SMIAPP_REG_U16_TEST_DATA_RED, ctrl->val);
500
501 case V4L2_CID_TEST_PATTERN_GREENR:
502 return smiapp_write(
503 sensor, SMIAPP_REG_U16_TEST_DATA_GREENR, ctrl->val);
504
505 case V4L2_CID_TEST_PATTERN_BLUE:
506 return smiapp_write(
507 sensor, SMIAPP_REG_U16_TEST_DATA_BLUE, ctrl->val);
508
509 case V4L2_CID_TEST_PATTERN_GREENB:
510 return smiapp_write(
511 sensor, SMIAPP_REG_U16_TEST_DATA_GREENB, ctrl->val);
512
513 case V4L2_CID_PIXEL_RATE:
514 /* For v4l2_ctrl_s_ctrl_int64() used internally. */
515 return 0;
516
480 default: 517 default:
481 return -EINVAL; 518 return -EINVAL;
482 } 519 }
@@ -489,10 +526,10 @@ static const struct v4l2_ctrl_ops smiapp_ctrl_ops = {
489static int smiapp_init_controls(struct smiapp_sensor *sensor) 526static int smiapp_init_controls(struct smiapp_sensor *sensor)
490{ 527{
491 struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd); 528 struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd);
492 unsigned int max; 529 unsigned int max, i;
493 int rval; 530 int rval;
494 531
495 rval = v4l2_ctrl_handler_init(&sensor->pixel_array->ctrl_handler, 7); 532 rval = v4l2_ctrl_handler_init(&sensor->pixel_array->ctrl_handler, 12);
496 if (rval) 533 if (rval)
497 return rval; 534 return rval;
498 sensor->pixel_array->ctrl_handler.lock = &sensor->mutex; 535 sensor->pixel_array->ctrl_handler.lock = &sensor->mutex;
@@ -535,6 +572,20 @@ static int smiapp_init_controls(struct smiapp_sensor *sensor)
535 &sensor->pixel_array->ctrl_handler, &smiapp_ctrl_ops, 572 &sensor->pixel_array->ctrl_handler, &smiapp_ctrl_ops,
536 V4L2_CID_PIXEL_RATE, 1, INT_MAX, 1, 1); 573 V4L2_CID_PIXEL_RATE, 1, INT_MAX, 1, 1);
537 574
575 v4l2_ctrl_new_std_menu_items(&sensor->pixel_array->ctrl_handler,
576 &smiapp_ctrl_ops, V4L2_CID_TEST_PATTERN,
577 ARRAY_SIZE(smiapp_test_patterns) - 1,
578 0, 0, smiapp_test_patterns);
579
580 for (i = 0; i < ARRAY_SIZE(sensor->test_data); i++) {
581 int max_value = (1 << sensor->csi_format->width) - 1;
582 sensor->test_data[i] =
583 v4l2_ctrl_new_std(
584 &sensor->pixel_array->ctrl_handler,
585 &smiapp_ctrl_ops, V4L2_CID_TEST_PATTERN_RED + i,
586 0, max_value, 1, max_value);
587 }
588
538 if (sensor->pixel_array->ctrl_handler.error) { 589 if (sensor->pixel_array->ctrl_handler.error) {
539 dev_err(&client->dev, 590 dev_err(&client->dev,
540 "pixel array controls initialization failed (%d)\n", 591 "pixel array controls initialization failed (%d)\n",
@@ -782,36 +833,25 @@ static void smiapp_update_blanking(struct smiapp_sensor *sensor)
782{ 833{
783 struct v4l2_ctrl *vblank = sensor->vblank; 834 struct v4l2_ctrl *vblank = sensor->vblank;
784 struct v4l2_ctrl *hblank = sensor->hblank; 835 struct v4l2_ctrl *hblank = sensor->hblank;
836 int min, max;
785 837
786 vblank->minimum = 838 min = max_t(int,
787 max_t(int, 839 sensor->limits[SMIAPP_LIMIT_MIN_FRAME_BLANKING_LINES],
788 sensor->limits[SMIAPP_LIMIT_MIN_FRAME_BLANKING_LINES], 840 sensor->limits[SMIAPP_LIMIT_MIN_FRAME_LENGTH_LINES_BIN] -
789 sensor->limits[SMIAPP_LIMIT_MIN_FRAME_LENGTH_LINES_BIN] - 841 sensor->pixel_array->crop[SMIAPP_PA_PAD_SRC].height);
790 sensor->pixel_array->crop[SMIAPP_PA_PAD_SRC].height); 842 max = sensor->limits[SMIAPP_LIMIT_MAX_FRAME_LENGTH_LINES_BIN] -
791 vblank->maximum =
792 sensor->limits[SMIAPP_LIMIT_MAX_FRAME_LENGTH_LINES_BIN] -
793 sensor->pixel_array->crop[SMIAPP_PA_PAD_SRC].height; 843 sensor->pixel_array->crop[SMIAPP_PA_PAD_SRC].height;
794 844
795 vblank->val = clamp_t(int, vblank->val, 845 __v4l2_ctrl_modify_range(vblank, min, max, vblank->step, min);
796 vblank->minimum, vblank->maximum); 846
797 vblank->default_value = vblank->minimum; 847 min = max_t(int,
798 vblank->val = vblank->val; 848 sensor->limits[SMIAPP_LIMIT_MIN_LINE_LENGTH_PCK_BIN] -
799 vblank->cur.val = vblank->val; 849 sensor->pixel_array->crop[SMIAPP_PA_PAD_SRC].width,
800 850 sensor->limits[SMIAPP_LIMIT_MIN_LINE_BLANKING_PCK_BIN]);
801 hblank->minimum = 851 max = sensor->limits[SMIAPP_LIMIT_MAX_LINE_LENGTH_PCK_BIN] -
802 max_t(int,
803 sensor->limits[SMIAPP_LIMIT_MIN_LINE_LENGTH_PCK_BIN] -
804 sensor->pixel_array->crop[SMIAPP_PA_PAD_SRC].width,
805 sensor->limits[SMIAPP_LIMIT_MIN_LINE_BLANKING_PCK_BIN]);
806 hblank->maximum =
807 sensor->limits[SMIAPP_LIMIT_MAX_LINE_LENGTH_PCK_BIN] -
808 sensor->pixel_array->crop[SMIAPP_PA_PAD_SRC].width; 852 sensor->pixel_array->crop[SMIAPP_PA_PAD_SRC].width;
809 853
810 hblank->val = clamp_t(int, hblank->val, 854 __v4l2_ctrl_modify_range(hblank, min, max, hblank->step, min);
811 hblank->minimum, hblank->maximum);
812 hblank->default_value = hblank->minimum;
813 hblank->val = hblank->val;
814 hblank->cur.val = hblank->val;
815 855
816 __smiapp_update_exposure_limits(sensor); 856 __smiapp_update_exposure_limits(sensor);
817} 857}
@@ -1272,7 +1312,7 @@ static void smiapp_power_off(struct smiapp_sensor *sensor)
1272 clk_disable_unprepare(sensor->ext_clk); 1312 clk_disable_unprepare(sensor->ext_clk);
1273 usleep_range(5000, 5000); 1313 usleep_range(5000, 5000);
1274 regulator_disable(sensor->vana); 1314 regulator_disable(sensor->vana);
1275 sensor->streaming = 0; 1315 sensor->streaming = false;
1276} 1316}
1277 1317
1278static int smiapp_set_power(struct v4l2_subdev *subdev, int on) 1318static int smiapp_set_power(struct v4l2_subdev *subdev, int on)
@@ -1462,13 +1502,13 @@ static int smiapp_set_stream(struct v4l2_subdev *subdev, int enable)
1462 return 0; 1502 return 0;
1463 1503
1464 if (enable) { 1504 if (enable) {
1465 sensor->streaming = 1; 1505 sensor->streaming = true;
1466 rval = smiapp_start_streaming(sensor); 1506 rval = smiapp_start_streaming(sensor);
1467 if (rval < 0) 1507 if (rval < 0)
1468 sensor->streaming = 0; 1508 sensor->streaming = false;
1469 } else { 1509 } else {
1470 rval = smiapp_stop_streaming(sensor); 1510 rval = smiapp_stop_streaming(sensor);
1471 sensor->streaming = 0; 1511 sensor->streaming = false;
1472 } 1512 }
1473 1513
1474 return rval; 1514 return rval;
@@ -1664,17 +1704,34 @@ static int smiapp_set_format(struct v4l2_subdev *subdev,
1664 if (fmt->pad == ssd->source_pad) { 1704 if (fmt->pad == ssd->source_pad) {
1665 u32 code = fmt->format.code; 1705 u32 code = fmt->format.code;
1666 int rval = __smiapp_get_format(subdev, fh, fmt); 1706 int rval = __smiapp_get_format(subdev, fh, fmt);
1707 bool range_changed = false;
1708 unsigned int i;
1667 1709
1668 if (!rval && subdev == &sensor->src->sd) { 1710 if (!rval && subdev == &sensor->src->sd) {
1669 const struct smiapp_csi_data_format *csi_format = 1711 const struct smiapp_csi_data_format *csi_format =
1670 smiapp_validate_csi_data_format(sensor, code); 1712 smiapp_validate_csi_data_format(sensor, code);
1671 if (fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE) 1713
1714 if (fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
1715 if (csi_format->width !=
1716 sensor->csi_format->width)
1717 range_changed = true;
1718
1672 sensor->csi_format = csi_format; 1719 sensor->csi_format = csi_format;
1720 }
1721
1673 fmt->format.code = csi_format->code; 1722 fmt->format.code = csi_format->code;
1674 } 1723 }
1675 1724
1676 mutex_unlock(&sensor->mutex); 1725 mutex_unlock(&sensor->mutex);
1677 return rval; 1726 if (rval || !range_changed)
1727 return rval;
1728
1729 for (i = 0; i < ARRAY_SIZE(sensor->test_data); i++)
1730 v4l2_ctrl_modify_range(
1731 sensor->test_data[i],
1732 0, (1 << sensor->csi_format->width) - 1, 1, 0);
1733
1734 return 0;
1678 } 1735 }
1679 1736
1680 /* Sink pad. Width and height are changeable here. */ 1737 /* Sink pad. Width and height are changeable here. */
diff --git a/drivers/media/i2c/smiapp/smiapp.h b/drivers/media/i2c/smiapp/smiapp.h
index 7cc5aae662fd..874b49ffd88f 100644
--- a/drivers/media/i2c/smiapp/smiapp.h
+++ b/drivers/media/i2c/smiapp/smiapp.h
@@ -54,6 +54,8 @@
54 (1000 + (SMIAPP_RESET_DELAY_CLOCKS * 1000 \ 54 (1000 + (SMIAPP_RESET_DELAY_CLOCKS * 1000 \
55 + (clk) / 1000 - 1) / ((clk) / 1000)) 55 + (clk) / 1000 - 1) / ((clk) / 1000))
56 56
57#define SMIAPP_COLOUR_COMPONENTS 4
58
57#include "smiapp-limits.h" 59#include "smiapp-limits.h"
58 60
59struct smiapp_quirk; 61struct smiapp_quirk;
@@ -241,6 +243,8 @@ struct smiapp_sensor {
241 /* src controls */ 243 /* src controls */
242 struct v4l2_ctrl *link_freq; 244 struct v4l2_ctrl *link_freq;
243 struct v4l2_ctrl *pixel_rate_csi; 245 struct v4l2_ctrl *pixel_rate_csi;
246 /* test pattern colour components */
247 struct v4l2_ctrl *test_data[SMIAPP_COLOUR_COMPONENTS];
244}; 248};
245 249
246#define to_smiapp_subdev(_sd) \ 250#define to_smiapp_subdev(_sd) \
diff --git a/drivers/media/i2c/soc_camera/mt9t112.c b/drivers/media/i2c/soc_camera/mt9t112.c
index 46f431a13782..996d7b4007a5 100644
--- a/drivers/media/i2c/soc_camera/mt9t112.c
+++ b/drivers/media/i2c/soc_camera/mt9t112.c
@@ -29,6 +29,7 @@
29#include <media/soc_camera.h> 29#include <media/soc_camera.h>
30#include <media/v4l2-clk.h> 30#include <media/v4l2-clk.h>
31#include <media/v4l2-common.h> 31#include <media/v4l2-common.h>
32#include <media/v4l2-image-sizes.h>
32 33
33/* you can check PLL/clock info */ 34/* you can check PLL/clock info */
34/* #define EXT_CLOCK 24000000 */ 35/* #define EXT_CLOCK 24000000 */
@@ -42,9 +43,6 @@
42#define MAX_WIDTH 2048 43#define MAX_WIDTH 2048
43#define MAX_HEIGHT 1536 44#define MAX_HEIGHT 1536
44 45
45#define VGA_WIDTH 640
46#define VGA_HEIGHT 480
47
48/* 46/*
49 * macro of read/write 47 * macro of read/write
50 */ 48 */
diff --git a/drivers/media/i2c/soc_camera/ov772x.c b/drivers/media/i2c/soc_camera/ov772x.c
index 7f2b3c8926af..970a04e1e56e 100644
--- a/drivers/media/i2c/soc_camera/ov772x.c
+++ b/drivers/media/i2c/soc_camera/ov772x.c
@@ -29,6 +29,7 @@
29#include <media/v4l2-clk.h> 29#include <media/v4l2-clk.h>
30#include <media/v4l2-ctrls.h> 30#include <media/v4l2-ctrls.h>
31#include <media/v4l2-subdev.h> 31#include <media/v4l2-subdev.h>
32#include <media/v4l2-image-sizes.h>
32 33
33/* 34/*
34 * register offset 35 * register offset
@@ -360,10 +361,6 @@
360#define SCAL0_ACTRL 0x08 /* Auto scaling factor control */ 361#define SCAL0_ACTRL 0x08 /* Auto scaling factor control */
361#define SCAL1_2_ACTRL 0x04 /* Auto scaling factor control */ 362#define SCAL1_2_ACTRL 0x04 /* Auto scaling factor control */
362 363
363#define VGA_WIDTH 640
364#define VGA_HEIGHT 480
365#define QVGA_WIDTH 320
366#define QVGA_HEIGHT 240
367#define OV772X_MAX_WIDTH VGA_WIDTH 364#define OV772X_MAX_WIDTH VGA_WIDTH
368#define OV772X_MAX_HEIGHT VGA_HEIGHT 365#define OV772X_MAX_HEIGHT VGA_HEIGHT
369 366
diff --git a/drivers/media/i2c/soc_camera/ov9740.c b/drivers/media/i2c/soc_camera/ov9740.c
index ea76863dfdb4..ee9eb635d540 100644
--- a/drivers/media/i2c/soc_camera/ov9740.c
+++ b/drivers/media/i2c/soc_camera/ov9740.c
@@ -564,13 +564,13 @@ static int ov9740_set_res(struct i2c_client *client, u32 width, u32 height)
564 u32 y_start; 564 u32 y_start;
565 u32 x_end; 565 u32 x_end;
566 u32 y_end; 566 u32 y_end;
567 bool scaling = 0; 567 bool scaling = false;
568 u32 scale_input_x; 568 u32 scale_input_x;
569 u32 scale_input_y; 569 u32 scale_input_y;
570 int ret; 570 int ret;
571 571
572 if ((width != OV9740_MAX_WIDTH) || (height != OV9740_MAX_HEIGHT)) 572 if ((width != OV9740_MAX_WIDTH) || (height != OV9740_MAX_HEIGHT))
573 scaling = 1; 573 scaling = true;
574 574
575 /* 575 /*
576 * Try to use as much of the sensor area as possible when supporting 576 * Try to use as much of the sensor area as possible when supporting
diff --git a/drivers/media/i2c/tda7432.c b/drivers/media/i2c/tda7432.c
index 72af644fa051..cf93021a6500 100644
--- a/drivers/media/i2c/tda7432.c
+++ b/drivers/media/i2c/tda7432.c
@@ -293,7 +293,7 @@ static int tda7432_s_ctrl(struct v4l2_ctrl *ctrl)
293 if (t->mute->val) { 293 if (t->mute->val) {
294 lf |= TDA7432_MUTE; 294 lf |= TDA7432_MUTE;
295 lr |= TDA7432_MUTE; 295 lr |= TDA7432_MUTE;
296 lf |= TDA7432_MUTE; 296 rf |= TDA7432_MUTE;
297 rr |= TDA7432_MUTE; 297 rr |= TDA7432_MUTE;
298 } 298 }
299 /* Mute & update balance*/ 299 /* Mute & update balance*/
diff --git a/drivers/media/i2c/tvp7002.c b/drivers/media/i2c/tvp7002.c
index 11f2387e1dab..51bac762638b 100644
--- a/drivers/media/i2c/tvp7002.c
+++ b/drivers/media/i2c/tvp7002.c
@@ -775,25 +775,20 @@ static int tvp7002_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned index,
775static int tvp7002_s_stream(struct v4l2_subdev *sd, int enable) 775static int tvp7002_s_stream(struct v4l2_subdev *sd, int enable)
776{ 776{
777 struct tvp7002 *device = to_tvp7002(sd); 777 struct tvp7002 *device = to_tvp7002(sd);
778 int error = 0; 778 int error;
779 779
780 if (device->streaming == enable) 780 if (device->streaming == enable)
781 return 0; 781 return 0;
782 782
783 if (enable) { 783 /* low impedance: on, high impedance: off */
784 /* Set output state on (low impedance means stream on) */ 784 error = tvp7002_write(sd, TVP7002_MISC_CTL_2, enable ? 0x00 : 0x03);
785 error = tvp7002_write(sd, TVP7002_MISC_CTL_2, 0x00); 785 if (error) {
786 device->streaming = enable; 786 v4l2_dbg(1, debug, sd, "Fail to set streaming\n");
787 } else { 787 return error;
788 /* Set output state off (high impedance means stream off) */
789 error = tvp7002_write(sd, TVP7002_MISC_CTL_2, 0x03);
790 if (error)
791 v4l2_dbg(1, debug, sd, "Unable to stop streaming\n");
792
793 device->streaming = enable;
794 } 788 }
795 789
796 return error; 790 device->streaming = enable;
791 return 0;
797} 792}
798 793
799/* 794/*
diff --git a/drivers/media/i2c/vs6624.c b/drivers/media/i2c/vs6624.c
index 23f4f65fccd7..373f2df52492 100644
--- a/drivers/media/i2c/vs6624.c
+++ b/drivers/media/i2c/vs6624.c
@@ -30,22 +30,10 @@
30#include <media/v4l2-ctrls.h> 30#include <media/v4l2-ctrls.h>
31#include <media/v4l2-device.h> 31#include <media/v4l2-device.h>
32#include <media/v4l2-mediabus.h> 32#include <media/v4l2-mediabus.h>
33#include <media/v4l2-image-sizes.h>
33 34
34#include "vs6624_regs.h" 35#include "vs6624_regs.h"
35 36
36#define VGA_WIDTH 640
37#define VGA_HEIGHT 480
38#define QVGA_WIDTH 320
39#define QVGA_HEIGHT 240
40#define QQVGA_WIDTH 160
41#define QQVGA_HEIGHT 120
42#define CIF_WIDTH 352
43#define CIF_HEIGHT 288
44#define QCIF_WIDTH 176
45#define QCIF_HEIGHT 144
46#define QQCIF_WIDTH 88
47#define QQCIF_HEIGHT 72
48
49#define MAX_FRAME_RATE 30 37#define MAX_FRAME_RATE 30
50 38
51struct vs6624 { 39struct vs6624 {
diff --git a/drivers/media/media-device.c b/drivers/media/media-device.c
index 73a432934bd8..7b39440192d6 100644
--- a/drivers/media/media-device.c
+++ b/drivers/media/media-device.c
@@ -103,10 +103,8 @@ static long media_device_enum_entities(struct media_device *mdev,
103 return -EINVAL; 103 return -EINVAL;
104 104
105 u_ent.id = ent->id; 105 u_ent.id = ent->id;
106 if (ent->name) { 106 if (ent->name)
107 strncpy(u_ent.name, ent->name, sizeof(u_ent.name)); 107 strlcpy(u_ent.name, ent->name, sizeof(u_ent.name));
108 u_ent.name[sizeof(u_ent.name) - 1] = '\0';
109 }
110 u_ent.type = ent->type; 108 u_ent.type = ent->type;
111 u_ent.revision = ent->revision; 109 u_ent.revision = ent->revision;
112 u_ent.flags = ent->flags; 110 u_ent.flags = ent->flags;
diff --git a/drivers/media/media-devnode.c b/drivers/media/media-devnode.c
index 7acd19c881de..ebf9626e5ae5 100644
--- a/drivers/media/media-devnode.c
+++ b/drivers/media/media-devnode.c
@@ -192,7 +192,6 @@ static int media_open(struct inode *inode, struct file *filp)
192static int media_release(struct inode *inode, struct file *filp) 192static int media_release(struct inode *inode, struct file *filp)
193{ 193{
194 struct media_devnode *mdev = media_devnode_data(filp); 194 struct media_devnode *mdev = media_devnode_data(filp);
195 int ret = 0;
196 195
197 if (mdev->fops->release) 196 if (mdev->fops->release)
198 mdev->fops->release(filp); 197 mdev->fops->release(filp);
@@ -201,7 +200,7 @@ static int media_release(struct inode *inode, struct file *filp)
201 return value is ignored. */ 200 return value is ignored. */
202 put_device(&mdev->dev); 201 put_device(&mdev->dev);
203 filp->private_data = NULL; 202 filp->private_data = NULL;
204 return ret; 203 return 0;
205} 204}
206 205
207static const struct file_operations media_devnode_fops = { 206static const struct file_operations media_devnode_fops = {
diff --git a/drivers/media/parport/pms.c b/drivers/media/parport/pms.c
index 9bc105b3db1b..e6b497528cea 100644
--- a/drivers/media/parport/pms.c
+++ b/drivers/media/parport/pms.c
@@ -629,11 +629,15 @@ static int pms_capture(struct pms *dev, char __user *buf, int rgb555, int count)
629{ 629{
630 int y; 630 int y;
631 int dw = 2 * dev->width; 631 int dw = 2 * dev->width;
632 char tmp[dw + 32]; /* using a temp buffer is faster than direct */ 632 char *tmp; /* using a temp buffer is faster than direct */
633 int cnt = 0; 633 int cnt = 0;
634 int len = 0; 634 int len = 0;
635 unsigned char r8 = 0x5; /* value for reg8 */ 635 unsigned char r8 = 0x5; /* value for reg8 */
636 636
637 tmp = kmalloc(dw + 32, GFP_KERNEL);
638 if (!tmp)
639 return 0;
640
637 if (rgb555) 641 if (rgb555)
638 r8 |= 0x20; /* else use untranslated rgb = 565 */ 642 r8 |= 0x20; /* else use untranslated rgb = 565 */
639 mvv_write(dev, 0x08, r8); /* capture rgb555/565, init DRAM, PC enable */ 643 mvv_write(dev, 0x08, r8); /* capture rgb555/565, init DRAM, PC enable */
@@ -664,6 +668,7 @@ static int pms_capture(struct pms *dev, char __user *buf, int rgb555, int count)
664 len += dt; 668 len += dt;
665 } 669 }
666 } 670 }
671 kfree(tmp);
667 return len; 672 return len;
668} 673}
669 674
diff --git a/drivers/media/pci/Kconfig b/drivers/media/pci/Kconfig
index 5c16c9c2203e..f8cec8e8cf82 100644
--- a/drivers/media/pci/Kconfig
+++ b/drivers/media/pci/Kconfig
@@ -20,6 +20,7 @@ source "drivers/media/pci/ivtv/Kconfig"
20source "drivers/media/pci/zoran/Kconfig" 20source "drivers/media/pci/zoran/Kconfig"
21source "drivers/media/pci/saa7146/Kconfig" 21source "drivers/media/pci/saa7146/Kconfig"
22source "drivers/media/pci/solo6x10/Kconfig" 22source "drivers/media/pci/solo6x10/Kconfig"
23source "drivers/media/pci/tw68/Kconfig"
23endif 24endif
24 25
25if MEDIA_ANALOG_TV_SUPPORT || MEDIA_DIGITAL_TV_SUPPORT 26if MEDIA_ANALOG_TV_SUPPORT || MEDIA_DIGITAL_TV_SUPPORT
@@ -41,6 +42,7 @@ source "drivers/media/pci/b2c2/Kconfig"
41source "drivers/media/pci/pluto2/Kconfig" 42source "drivers/media/pci/pluto2/Kconfig"
42source "drivers/media/pci/dm1105/Kconfig" 43source "drivers/media/pci/dm1105/Kconfig"
43source "drivers/media/pci/pt1/Kconfig" 44source "drivers/media/pci/pt1/Kconfig"
45source "drivers/media/pci/pt3/Kconfig"
44source "drivers/media/pci/mantis/Kconfig" 46source "drivers/media/pci/mantis/Kconfig"
45source "drivers/media/pci/ngene/Kconfig" 47source "drivers/media/pci/ngene/Kconfig"
46source "drivers/media/pci/ddbridge/Kconfig" 48source "drivers/media/pci/ddbridge/Kconfig"
diff --git a/drivers/media/pci/Makefile b/drivers/media/pci/Makefile
index e5b53fb569ef..a12926e4b51f 100644
--- a/drivers/media/pci/Makefile
+++ b/drivers/media/pci/Makefile
@@ -7,10 +7,10 @@ obj-y += ttpci/ \
7 pluto2/ \ 7 pluto2/ \
8 dm1105/ \ 8 dm1105/ \
9 pt1/ \ 9 pt1/ \
10 pt3/ \
10 mantis/ \ 11 mantis/ \
11 ngene/ \ 12 ngene/ \
12 ddbridge/ \ 13 ddbridge/ \
13 b2c2/ \
14 saa7146/ 14 saa7146/
15 15
16obj-$(CONFIG_VIDEO_IVTV) += ivtv/ 16obj-$(CONFIG_VIDEO_IVTV) += ivtv/
@@ -22,6 +22,7 @@ obj-$(CONFIG_VIDEO_CX88) += cx88/
22obj-$(CONFIG_VIDEO_BT848) += bt8xx/ 22obj-$(CONFIG_VIDEO_BT848) += bt8xx/
23obj-$(CONFIG_VIDEO_SAA7134) += saa7134/ 23obj-$(CONFIG_VIDEO_SAA7134) += saa7134/
24obj-$(CONFIG_VIDEO_SAA7164) += saa7164/ 24obj-$(CONFIG_VIDEO_SAA7164) += saa7164/
25obj-$(CONFIG_VIDEO_TW68) += tw68/
25obj-$(CONFIG_VIDEO_MEYE) += meye/ 26obj-$(CONFIG_VIDEO_MEYE) += meye/
26obj-$(CONFIG_STA2X11_VIP) += sta2x11/ 27obj-$(CONFIG_STA2X11_VIP) += sta2x11/
27obj-$(CONFIG_VIDEO_SOLO6X10) += solo6x10/ 28obj-$(CONFIG_VIDEO_SOLO6X10) += solo6x10/
diff --git a/drivers/media/pci/bt8xx/bttv-driver.c b/drivers/media/pci/bt8xx/bttv-driver.c
index 970e542d3a51..4a8176c09fc9 100644
--- a/drivers/media/pci/bt8xx/bttv-driver.c
+++ b/drivers/media/pci/bt8xx/bttv-driver.c
@@ -1531,7 +1531,6 @@ bttv_switch_overlay(struct bttv *btv, struct bttv_fh *fh,
1531{ 1531{
1532 struct bttv_buffer *old; 1532 struct bttv_buffer *old;
1533 unsigned long flags; 1533 unsigned long flags;
1534 int retval = 0;
1535 1534
1536 dprintk("switch_overlay: enter [new=%p]\n", new); 1535 dprintk("switch_overlay: enter [new=%p]\n", new);
1537 if (new) 1536 if (new)
@@ -1551,7 +1550,7 @@ bttv_switch_overlay(struct bttv *btv, struct bttv_fh *fh,
1551 if (NULL == new) 1550 if (NULL == new)
1552 free_btres_lock(btv,fh,RESOURCE_OVERLAY); 1551 free_btres_lock(btv,fh,RESOURCE_OVERLAY);
1553 dprintk("switch_overlay: done\n"); 1552 dprintk("switch_overlay: done\n");
1554 return retval; 1553 return 0;
1555} 1554}
1556 1555
1557/* ----------------------------------------------------------------------- */ 1556/* ----------------------------------------------------------------------- */
@@ -3856,7 +3855,7 @@ static irqreturn_t bttv_irq(int irq, void *dev_id)
3856 3855
3857 btwrite(btread(BT848_INT_MASK) & (-1 ^ BT848_INT_GPINT), 3856 btwrite(btread(BT848_INT_MASK) & (-1 ^ BT848_INT_GPINT),
3858 BT848_INT_MASK); 3857 BT848_INT_MASK);
3859 }; 3858 }
3860 3859
3861 bttv_print_irqbits(stat,astat); 3860 bttv_print_irqbits(stat,astat);
3862 3861
diff --git a/drivers/media/pci/bt8xx/dst_ca.c b/drivers/media/pci/bt8xx/dst_ca.c
index 0e788fca992c..c22c4ae06844 100644
--- a/drivers/media/pci/bt8xx/dst_ca.c
+++ b/drivers/media/pci/bt8xx/dst_ca.c
@@ -674,11 +674,9 @@ static int dst_ca_release(struct inode *inode, struct file *file)
674 674
675static ssize_t dst_ca_read(struct file *file, char __user *buffer, size_t length, loff_t *offset) 675static ssize_t dst_ca_read(struct file *file, char __user *buffer, size_t length, loff_t *offset)
676{ 676{
677 ssize_t bytes_read = 0;
678
679 dprintk(verbose, DST_CA_DEBUG, 1, " Device read."); 677 dprintk(verbose, DST_CA_DEBUG, 1, " Device read.");
680 678
681 return bytes_read; 679 return 0;
682} 680}
683 681
684static ssize_t dst_ca_write(struct file *file, const char __user *buffer, size_t length, loff_t *offset) 682static ssize_t dst_ca_write(struct file *file, const char __user *buffer, size_t length, loff_t *offset)
diff --git a/drivers/media/pci/cx18/cx18-alsa-pcm.c b/drivers/media/pci/cx18/cx18-alsa-pcm.c
index 180077c49123..ffb6acdc575f 100644
--- a/drivers/media/pci/cx18/cx18-alsa-pcm.c
+++ b/drivers/media/pci/cx18/cx18-alsa-pcm.c
@@ -80,7 +80,7 @@ void cx18_alsa_announce_pcm_data(struct snd_cx18_card *cxsc, u8 *pcm_data,
80 int period_elapsed = 0; 80 int period_elapsed = 0;
81 int length; 81 int length;
82 82
83 dprintk("cx18 alsa announce ptr=%p data=%p num_bytes=%zd\n", cxsc, 83 dprintk("cx18 alsa announce ptr=%p data=%p num_bytes=%zu\n", cxsc,
84 pcm_data, num_bytes); 84 pcm_data, num_bytes);
85 85
86 substream = cxsc->capture_pcm_substream; 86 substream = cxsc->capture_pcm_substream;
diff --git a/drivers/media/pci/cx18/cx18-firmware.c b/drivers/media/pci/cx18/cx18-firmware.c
index a1c1cec05f98..c6c83445f8bf 100644
--- a/drivers/media/pci/cx18/cx18-firmware.c
+++ b/drivers/media/pci/cx18/cx18-firmware.c
@@ -130,7 +130,7 @@ static int load_cpu_fw_direct(const char *fn, u8 __iomem *mem, struct cx18 *cx)
130 } 130 }
131 } 131 }
132 if (!test_bit(CX18_F_I_LOADED_FW, &cx->i_flags)) 132 if (!test_bit(CX18_F_I_LOADED_FW, &cx->i_flags))
133 CX18_INFO("loaded %s firmware (%zd bytes)\n", fn, fw->size); 133 CX18_INFO("loaded %s firmware (%zu bytes)\n", fn, fw->size);
134 size = fw->size; 134 size = fw->size;
135 release_firmware(fw); 135 release_firmware(fw);
136 cx18_setup_page(cx, SCB_OFFSET); 136 cx18_setup_page(cx, SCB_OFFSET);
@@ -164,7 +164,7 @@ static int load_apu_fw_direct(const char *fn, u8 __iomem *dst, struct cx18 *cx,
164 164
165 apu_version = (vers[0] << 24) | (vers[4] << 16) | vers[32]; 165 apu_version = (vers[0] << 24) | (vers[4] << 16) | vers[32];
166 while (offset + sizeof(seghdr) < fw->size) { 166 while (offset + sizeof(seghdr) < fw->size) {
167 const u32 *shptr = src + offset / 4; 167 const __le32 *shptr = (__force __le32 *)src + offset / 4;
168 168
169 seghdr.sync1 = le32_to_cpu(shptr[0]); 169 seghdr.sync1 = le32_to_cpu(shptr[0]);
170 seghdr.sync2 = le32_to_cpu(shptr[1]); 170 seghdr.sync2 = le32_to_cpu(shptr[1]);
@@ -202,7 +202,7 @@ static int load_apu_fw_direct(const char *fn, u8 __iomem *dst, struct cx18 *cx,
202 offset += seghdr.size; 202 offset += seghdr.size;
203 } 203 }
204 if (!test_bit(CX18_F_I_LOADED_FW, &cx->i_flags)) 204 if (!test_bit(CX18_F_I_LOADED_FW, &cx->i_flags))
205 CX18_INFO("loaded %s firmware V%08x (%zd bytes)\n", 205 CX18_INFO("loaded %s firmware V%08x (%zu bytes)\n",
206 fn, apu_version, fw->size); 206 fn, apu_version, fw->size);
207 size = fw->size; 207 size = fw->size;
208 release_firmware(fw); 208 release_firmware(fw);
diff --git a/drivers/media/pci/cx18/cx18-queue.c b/drivers/media/pci/cx18/cx18-queue.c
index 8884537bd62f..2a247d264b87 100644
--- a/drivers/media/pci/cx18/cx18-queue.c
+++ b/drivers/media/pci/cx18/cx18-queue.c
@@ -364,7 +364,7 @@ int cx18_stream_alloc(struct cx18_stream *s)
364 ((char __iomem *)cx->scb->cpu_mdl)); 364 ((char __iomem *)cx->scb->cpu_mdl));
365 365
366 CX18_ERR("Too many buffers, cannot fit in SCB area\n"); 366 CX18_ERR("Too many buffers, cannot fit in SCB area\n");
367 CX18_ERR("Max buffers = %zd\n", 367 CX18_ERR("Max buffers = %zu\n",
368 bufsz / sizeof(struct cx18_mdl_ent)); 368 bufsz / sizeof(struct cx18_mdl_ent));
369 return -ENOMEM; 369 return -ENOMEM;
370 } 370 }
diff --git a/drivers/media/pci/cx23885/Kconfig b/drivers/media/pci/cx23885/Kconfig
index e12c006e6e2d..f613314b360b 100644
--- a/drivers/media/pci/cx23885/Kconfig
+++ b/drivers/media/pci/cx23885/Kconfig
@@ -3,12 +3,11 @@ config VIDEO_CX23885
3 depends on DVB_CORE && VIDEO_DEV && PCI && I2C && INPUT && SND 3 depends on DVB_CORE && VIDEO_DEV && PCI && I2C && INPUT && SND
4 select SND_PCM 4 select SND_PCM
5 select I2C_ALGOBIT 5 select I2C_ALGOBIT
6 select VIDEO_BTCX
7 select VIDEO_TUNER 6 select VIDEO_TUNER
8 select VIDEO_TVEEPROM 7 select VIDEO_TVEEPROM
9 depends on RC_CORE 8 depends on RC_CORE
10 select VIDEOBUF_DVB 9 select VIDEOBUF2_DVB
11 select VIDEOBUF_DMA_SG 10 select VIDEOBUF2_DMA_SG
12 select VIDEO_CX25840 11 select VIDEO_CX25840
13 select VIDEO_CX2341X 12 select VIDEO_CX2341X
14 select DVB_DIB7000P if MEDIA_SUBDRV_AUTOSELECT 13 select DVB_DIB7000P if MEDIA_SUBDRV_AUTOSELECT
@@ -32,12 +31,16 @@ config VIDEO_CX23885
32 select DVB_A8293 if MEDIA_SUBDRV_AUTOSELECT 31 select DVB_A8293 if MEDIA_SUBDRV_AUTOSELECT
33 select DVB_MB86A20S if MEDIA_SUBDRV_AUTOSELECT 32 select DVB_MB86A20S if MEDIA_SUBDRV_AUTOSELECT
34 select DVB_SI2165 if MEDIA_SUBDRV_AUTOSELECT 33 select DVB_SI2165 if MEDIA_SUBDRV_AUTOSELECT
34 select DVB_SI2168 if MEDIA_SUBDRV_AUTOSELECT
35 select DVB_M88DS3103 if MEDIA_SUBDRV_AUTOSELECT
35 select MEDIA_TUNER_MT2063 if MEDIA_SUBDRV_AUTOSELECT 36 select MEDIA_TUNER_MT2063 if MEDIA_SUBDRV_AUTOSELECT
36 select MEDIA_TUNER_MT2131 if MEDIA_SUBDRV_AUTOSELECT 37 select MEDIA_TUNER_MT2131 if MEDIA_SUBDRV_AUTOSELECT
37 select MEDIA_TUNER_XC2028 if MEDIA_SUBDRV_AUTOSELECT 38 select MEDIA_TUNER_XC2028 if MEDIA_SUBDRV_AUTOSELECT
38 select MEDIA_TUNER_TDA8290 if MEDIA_SUBDRV_AUTOSELECT 39 select MEDIA_TUNER_TDA8290 if MEDIA_SUBDRV_AUTOSELECT
39 select MEDIA_TUNER_TDA18271 if MEDIA_SUBDRV_AUTOSELECT 40 select MEDIA_TUNER_TDA18271 if MEDIA_SUBDRV_AUTOSELECT
40 select MEDIA_TUNER_XC5000 if MEDIA_SUBDRV_AUTOSELECT 41 select MEDIA_TUNER_XC5000 if MEDIA_SUBDRV_AUTOSELECT
42 select MEDIA_TUNER_SI2157 if MEDIA_SUBDRV_AUTOSELECT
43 select MEDIA_TUNER_M88TS2022 if MEDIA_SUBDRV_AUTOSELECT
41 select DVB_TUNER_DIB0070 if MEDIA_SUBDRV_AUTOSELECT 44 select DVB_TUNER_DIB0070 if MEDIA_SUBDRV_AUTOSELECT
42 ---help--- 45 ---help---
43 This is a video4linux driver for Conexant 23885 based 46 This is a video4linux driver for Conexant 23885 based
diff --git a/drivers/media/pci/cx23885/Makefile b/drivers/media/pci/cx23885/Makefile
index 2a2cafb8cf5b..a2cbdcf15a8c 100644
--- a/drivers/media/pci/cx23885/Makefile
+++ b/drivers/media/pci/cx23885/Makefile
@@ -8,7 +8,6 @@ obj-$(CONFIG_VIDEO_CX23885) += cx23885.o
8obj-$(CONFIG_MEDIA_ALTERA_CI) += altera-ci.o 8obj-$(CONFIG_MEDIA_ALTERA_CI) += altera-ci.o
9 9
10ccflags-y += -Idrivers/media/i2c 10ccflags-y += -Idrivers/media/i2c
11ccflags-y += -Idrivers/media/common
12ccflags-y += -Idrivers/media/tuners 11ccflags-y += -Idrivers/media/tuners
13ccflags-y += -Idrivers/media/dvb-core 12ccflags-y += -Idrivers/media/dvb-core
14ccflags-y += -Idrivers/media/dvb-frontends 13ccflags-y += -Idrivers/media/dvb-frontends
diff --git a/drivers/media/pci/cx23885/altera-ci.c b/drivers/media/pci/cx23885/altera-ci.c
index 2926f7fadccd..2bbbf545b042 100644
--- a/drivers/media/pci/cx23885/altera-ci.c
+++ b/drivers/media/pci/cx23885/altera-ci.c
@@ -16,10 +16,6 @@
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * 17 *
18 * GNU General Public License for more details. 18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */ 19 */
24 20
25/* 21/*
@@ -52,8 +48,8 @@
52 * | DATA7| DATA6| DATA5| DATA4| DATA3| DATA2| DATA1| DATA0| 48 * | DATA7| DATA6| DATA5| DATA4| DATA3| DATA2| DATA1| DATA0|
53 * +-------+-------+-------+-------+-------+-------+-------+-------+ 49 * +-------+-------+-------+-------+-------+-------+-------+-------+
54 */ 50 */
55#include <media/videobuf-dma-sg.h> 51#include <dvb_demux.h>
56#include <media/videobuf-dvb.h> 52#include <dvb_frontend.h>
57#include "altera-ci.h" 53#include "altera-ci.h"
58#include "dvb_ca_en50221.h" 54#include "dvb_ca_en50221.h"
59 55
diff --git a/drivers/media/pci/cx23885/altera-ci.h b/drivers/media/pci/cx23885/altera-ci.h
index 4998c96caebe..5028f0cf83f4 100644
--- a/drivers/media/pci/cx23885/altera-ci.h
+++ b/drivers/media/pci/cx23885/altera-ci.h
@@ -16,10 +16,6 @@
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * 17 *
18 * GNU General Public License for more details. 18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */ 19 */
24#ifndef __ALTERA_CI_H 20#ifndef __ALTERA_CI_H
25#define __ALTERA_CI_H 21#define __ALTERA_CI_H
diff --git a/drivers/media/pci/cx23885/cimax2.c b/drivers/media/pci/cx23885/cimax2.c
index 16fa7ea4d4aa..631e4f24aea6 100644
--- a/drivers/media/pci/cx23885/cimax2.c
+++ b/drivers/media/pci/cx23885/cimax2.c
@@ -17,10 +17,6 @@
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * 18 *
19 * GNU General Public License for more details. 19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 */ 20 */
25 21
26#include "cx23885.h" 22#include "cx23885.h"
diff --git a/drivers/media/pci/cx23885/cimax2.h b/drivers/media/pci/cx23885/cimax2.h
index 518744a4c8a5..565e958f6f8d 100644
--- a/drivers/media/pci/cx23885/cimax2.h
+++ b/drivers/media/pci/cx23885/cimax2.h
@@ -17,10 +17,6 @@
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * 18 *
19 * GNU General Public License for more details. 19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 */ 20 */
25 21
26#ifndef CIMAX2_H 22#ifndef CIMAX2_H
diff --git a/drivers/media/pci/cx23885/cx23885-417.c b/drivers/media/pci/cx23885/cx23885-417.c
index bf89fc88692e..3948db386fb5 100644
--- a/drivers/media/pci/cx23885/cx23885-417.c
+++ b/drivers/media/pci/cx23885/cx23885-417.c
@@ -18,10 +18,6 @@
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details. 20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 */ 21 */
26 22
27#include <linux/module.h> 23#include <linux/module.h>
@@ -865,6 +861,11 @@ static int cx23885_api_cmd(struct cx23885_dev *dev,
865 return err; 861 return err;
866} 862}
867 863
864static int cx23885_api_func(void *priv, u32 cmd, int in, int out, u32 data[CX2341X_MBOX_MAX_DATA])
865{
866 return cx23885_mbox_func(priv, cmd, in, out, data);
867}
868
868static int cx23885_find_mailbox(struct cx23885_dev *dev) 869static int cx23885_find_mailbox(struct cx23885_dev *dev)
869{ 870{
870 u32 signature[4] = { 871 u32 signature[4] = {
@@ -941,7 +942,7 @@ static int cx23885_load_firmware(struct cx23885_dev *dev)
941 942
942 if (firmware->size != CX23885_FIRM_IMAGE_SIZE) { 943 if (firmware->size != CX23885_FIRM_IMAGE_SIZE) {
943 printk(KERN_ERR "ERROR: Firmware size mismatch " 944 printk(KERN_ERR "ERROR: Firmware size mismatch "
944 "(have %zd, expected %d)\n", 945 "(have %zu, expected %d)\n",
945 firmware->size, CX23885_FIRM_IMAGE_SIZE); 946 firmware->size, CX23885_FIRM_IMAGE_SIZE);
946 release_firmware(firmware); 947 release_firmware(firmware);
947 return -1; 948 return -1;
@@ -1033,12 +1034,12 @@ static void cx23885_codec_settings(struct cx23885_dev *dev)
1033 cx23885_api_cmd(dev, CX2341X_ENC_SET_FRAME_SIZE, 2, 0, 1034 cx23885_api_cmd(dev, CX2341X_ENC_SET_FRAME_SIZE, 2, 0,
1034 dev->ts1.height, dev->ts1.width); 1035 dev->ts1.height, dev->ts1.width);
1035 1036
1036 dev->mpeg_params.width = dev->ts1.width; 1037 dev->cxhdl.width = dev->ts1.width;
1037 dev->mpeg_params.height = dev->ts1.height; 1038 dev->cxhdl.height = dev->ts1.height;
1038 dev->mpeg_params.is_50hz = 1039 dev->cxhdl.is_50hz =
1039 (dev->encodernorm.id & V4L2_STD_625_50) != 0; 1040 (dev->encodernorm.id & V4L2_STD_625_50) != 0;
1040 1041
1041 cx2341x_update(dev, cx23885_mbox_func, NULL, &dev->mpeg_params); 1042 cx2341x_handler_setup(&dev->cxhdl);
1042 1043
1043 cx23885_api_cmd(dev, CX2341X_ENC_MISC, 2, 0, 3, 1); 1044 cx23885_api_cmd(dev, CX2341X_ENC_MISC, 2, 0, 3, 1);
1044 cx23885_api_cmd(dev, CX2341X_ENC_MISC, 2, 0, 4, 1); 1045 cx23885_api_cmd(dev, CX2341X_ENC_MISC, 2, 0, 4, 1);
@@ -1137,85 +1138,107 @@ static int cx23885_initialize_codec(struct cx23885_dev *dev, int startencoder)
1137 1138
1138/* ------------------------------------------------------------------ */ 1139/* ------------------------------------------------------------------ */
1139 1140
1140static int bb_buf_setup(struct videobuf_queue *q, 1141static int queue_setup(struct vb2_queue *q, const struct v4l2_format *fmt,
1141 unsigned int *count, unsigned int *size) 1142 unsigned int *num_buffers, unsigned int *num_planes,
1143 unsigned int sizes[], void *alloc_ctxs[])
1142{ 1144{
1143 struct cx23885_fh *fh = q->priv_data; 1145 struct cx23885_dev *dev = q->drv_priv;
1144
1145 fh->dev->ts1.ts_packet_size = mpeglinesize;
1146 fh->dev->ts1.ts_packet_count = mpeglines;
1147
1148 *size = fh->dev->ts1.ts_packet_size * fh->dev->ts1.ts_packet_count;
1149 *count = mpegbufs;
1150 1146
1147 dev->ts1.ts_packet_size = mpeglinesize;
1148 dev->ts1.ts_packet_count = mpeglines;
1149 *num_planes = 1;
1150 sizes[0] = mpeglinesize * mpeglines;
1151 *num_buffers = mpegbufs;
1151 return 0; 1152 return 0;
1152} 1153}
1153 1154
1154static int bb_buf_prepare(struct videobuf_queue *q, 1155static int buffer_prepare(struct vb2_buffer *vb)
1155 struct videobuf_buffer *vb, enum v4l2_field field)
1156{ 1156{
1157 struct cx23885_fh *fh = q->priv_data; 1157 struct cx23885_dev *dev = vb->vb2_queue->drv_priv;
1158 return cx23885_buf_prepare(q, &fh->dev->ts1, 1158 struct cx23885_buffer *buf =
1159 (struct cx23885_buffer *)vb, 1159 container_of(vb, struct cx23885_buffer, vb);
1160 field); 1160
1161 return cx23885_buf_prepare(buf, &dev->ts1);
1161} 1162}
1162 1163
1163static void bb_buf_queue(struct videobuf_queue *q, 1164static void buffer_finish(struct vb2_buffer *vb)
1164 struct videobuf_buffer *vb)
1165{ 1165{
1166 struct cx23885_fh *fh = q->priv_data; 1166 struct cx23885_dev *dev = vb->vb2_queue->drv_priv;
1167 cx23885_buf_queue(&fh->dev->ts1, (struct cx23885_buffer *)vb); 1167 struct cx23885_buffer *buf = container_of(vb,
1168 struct cx23885_buffer, vb);
1169 struct sg_table *sgt = vb2_dma_sg_plane_desc(vb, 0);
1170
1171 cx23885_free_buffer(dev, buf);
1172
1173 dma_unmap_sg(&dev->pci->dev, sgt->sgl, sgt->nents, DMA_FROM_DEVICE);
1168} 1174}
1169 1175
1170static void bb_buf_release(struct videobuf_queue *q, 1176static void buffer_queue(struct vb2_buffer *vb)
1171 struct videobuf_buffer *vb)
1172{ 1177{
1173 cx23885_free_buffer(q, (struct cx23885_buffer *)vb); 1178 struct cx23885_dev *dev = vb->vb2_queue->drv_priv;
1174} 1179 struct cx23885_buffer *buf = container_of(vb,
1180 struct cx23885_buffer, vb);
1175 1181
1176static struct videobuf_queue_ops cx23885_qops = { 1182 cx23885_buf_queue(&dev->ts1, buf);
1177 .buf_setup = bb_buf_setup, 1183}
1178 .buf_prepare = bb_buf_prepare,
1179 .buf_queue = bb_buf_queue,
1180 .buf_release = bb_buf_release,
1181};
1182 1184
1183/* ------------------------------------------------------------------ */ 1185static int cx23885_start_streaming(struct vb2_queue *q, unsigned int count)
1186{
1187 struct cx23885_dev *dev = q->drv_priv;
1188 struct cx23885_dmaqueue *dmaq = &dev->ts1.mpegq;
1189 unsigned long flags;
1190 int ret;
1191
1192 ret = cx23885_initialize_codec(dev, 1);
1193 if (ret == 0) {
1194 struct cx23885_buffer *buf = list_entry(dmaq->active.next,
1195 struct cx23885_buffer, queue);
1196
1197 cx23885_start_dma(&dev->ts1, dmaq, buf);
1198 return 0;
1199 }
1200 spin_lock_irqsave(&dev->slock, flags);
1201 while (!list_empty(&dmaq->active)) {
1202 struct cx23885_buffer *buf = list_entry(dmaq->active.next,
1203 struct cx23885_buffer, queue);
1184 1204
1185static const u32 *ctrl_classes[] = { 1205 list_del(&buf->queue);
1186 cx2341x_mpeg_ctrls, 1206 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_QUEUED);
1187 NULL 1207 }
1188}; 1208 spin_unlock_irqrestore(&dev->slock, flags);
1209 return ret;
1210}
1189 1211
1190static int cx23885_queryctrl(struct cx23885_dev *dev, 1212static void cx23885_stop_streaming(struct vb2_queue *q)
1191 struct v4l2_queryctrl *qctrl)
1192{ 1213{
1193 qctrl->id = v4l2_ctrl_next(ctrl_classes, qctrl->id); 1214 struct cx23885_dev *dev = q->drv_priv;
1194 if (qctrl->id == 0)
1195 return -EINVAL;
1196 1215
1197 /* MPEG V4L2 controls */ 1216 /* stop mpeg capture */
1198 if (cx2341x_ctrl_query(&dev->mpeg_params, qctrl)) 1217 cx23885_api_cmd(dev, CX2341X_ENC_STOP_CAPTURE, 3, 0,
1199 qctrl->flags |= V4L2_CTRL_FLAG_DISABLED; 1218 CX23885_END_NOW, CX23885_MPEG_CAPTURE,
1219 CX23885_RAW_BITS_NONE);
1200 1220
1201 return 0; 1221 msleep(500);
1222 cx23885_417_check_encoder(dev);
1223 cx23885_cancel_buffers(&dev->ts1);
1202} 1224}
1203 1225
1204static int cx23885_querymenu(struct cx23885_dev *dev, 1226static struct vb2_ops cx23885_qops = {
1205 struct v4l2_querymenu *qmenu) 1227 .queue_setup = queue_setup,
1206{ 1228 .buf_prepare = buffer_prepare,
1207 struct v4l2_queryctrl qctrl; 1229 .buf_finish = buffer_finish,
1230 .buf_queue = buffer_queue,
1231 .wait_prepare = vb2_ops_wait_prepare,
1232 .wait_finish = vb2_ops_wait_finish,
1233 .start_streaming = cx23885_start_streaming,
1234 .stop_streaming = cx23885_stop_streaming,
1235};
1208 1236
1209 qctrl.id = qmenu->id; 1237/* ------------------------------------------------------------------ */
1210 cx23885_queryctrl(dev, &qctrl);
1211 return v4l2_ctrl_query_menu(qmenu, &qctrl,
1212 cx2341x_ctrl_get_menu(&dev->mpeg_params, qmenu->id));
1213}
1214 1238
1215static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *id) 1239static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *id)
1216{ 1240{
1217 struct cx23885_fh *fh = file->private_data; 1241 struct cx23885_dev *dev = video_drvdata(file);
1218 struct cx23885_dev *dev = fh->dev;
1219 1242
1220 *id = dev->tvnorm; 1243 *id = dev->tvnorm;
1221 return 0; 1244 return 0;
@@ -1223,29 +1246,26 @@ static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *id)
1223 1246
1224static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id id) 1247static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id id)
1225{ 1248{
1226 struct cx23885_fh *fh = file->private_data; 1249 struct cx23885_dev *dev = video_drvdata(file);
1227 struct cx23885_dev *dev = fh->dev;
1228 unsigned int i; 1250 unsigned int i;
1251 int ret;
1229 1252
1230 for (i = 0; i < ARRAY_SIZE(cx23885_tvnorms); i++) 1253 for (i = 0; i < ARRAY_SIZE(cx23885_tvnorms); i++)
1231 if (id & cx23885_tvnorms[i].id) 1254 if (id & cx23885_tvnorms[i].id)
1232 break; 1255 break;
1233 if (i == ARRAY_SIZE(cx23885_tvnorms)) 1256 if (i == ARRAY_SIZE(cx23885_tvnorms))
1234 return -EINVAL; 1257 return -EINVAL;
1235 dev->encodernorm = cx23885_tvnorms[i];
1236 1258
1237 /* Have the drier core notify the subdevices */ 1259 ret = cx23885_set_tvnorm(dev, id);
1238 mutex_lock(&dev->lock); 1260 if (!ret)
1239 cx23885_set_tvnorm(dev, id); 1261 dev->encodernorm = cx23885_tvnorms[i];
1240 mutex_unlock(&dev->lock); 1262 return ret;
1241
1242 return 0;
1243} 1263}
1244 1264
1245static int vidioc_enum_input(struct file *file, void *priv, 1265static int vidioc_enum_input(struct file *file, void *priv,
1246 struct v4l2_input *i) 1266 struct v4l2_input *i)
1247{ 1267{
1248 struct cx23885_dev *dev = ((struct cx23885_fh *)priv)->dev; 1268 struct cx23885_dev *dev = video_drvdata(file);
1249 dprintk(1, "%s()\n", __func__); 1269 dprintk(1, "%s()\n", __func__);
1250 return cx23885_enum_input(dev, i); 1270 return cx23885_enum_input(dev, i);
1251} 1271}
@@ -1263,8 +1283,7 @@ static int vidioc_s_input(struct file *file, void *priv, unsigned int i)
1263static int vidioc_g_tuner(struct file *file, void *priv, 1283static int vidioc_g_tuner(struct file *file, void *priv,
1264 struct v4l2_tuner *t) 1284 struct v4l2_tuner *t)
1265{ 1285{
1266 struct cx23885_fh *fh = file->private_data; 1286 struct cx23885_dev *dev = video_drvdata(file);
1267 struct cx23885_dev *dev = fh->dev;
1268 1287
1269 if (dev->tuner_type == TUNER_ABSENT) 1288 if (dev->tuner_type == TUNER_ABSENT)
1270 return -EINVAL; 1289 return -EINVAL;
@@ -1281,8 +1300,7 @@ static int vidioc_g_tuner(struct file *file, void *priv,
1281static int vidioc_s_tuner(struct file *file, void *priv, 1300static int vidioc_s_tuner(struct file *file, void *priv,
1282 const struct v4l2_tuner *t) 1301 const struct v4l2_tuner *t)
1283{ 1302{
1284 struct cx23885_fh *fh = file->private_data; 1303 struct cx23885_dev *dev = video_drvdata(file);
1285 struct cx23885_dev *dev = fh->dev;
1286 1304
1287 if (dev->tuner_type == TUNER_ABSENT) 1305 if (dev->tuner_type == TUNER_ABSENT)
1288 return -EINVAL; 1306 return -EINVAL;
@@ -1296,8 +1314,7 @@ static int vidioc_s_tuner(struct file *file, void *priv,
1296static int vidioc_g_frequency(struct file *file, void *priv, 1314static int vidioc_g_frequency(struct file *file, void *priv,
1297 struct v4l2_frequency *f) 1315 struct v4l2_frequency *f)
1298{ 1316{
1299 struct cx23885_fh *fh = file->private_data; 1317 struct cx23885_dev *dev = video_drvdata(file);
1300 struct cx23885_dev *dev = fh->dev;
1301 1318
1302 if (dev->tuner_type == TUNER_ABSENT) 1319 if (dev->tuner_type == TUNER_ABSENT)
1303 return -EINVAL; 1320 return -EINVAL;
@@ -1315,27 +1332,10 @@ static int vidioc_s_frequency(struct file *file, void *priv,
1315 return cx23885_set_frequency(file, priv, f); 1332 return cx23885_set_frequency(file, priv, f);
1316} 1333}
1317 1334
1318static int vidioc_g_ctrl(struct file *file, void *priv,
1319 struct v4l2_control *ctl)
1320{
1321 struct cx23885_dev *dev = ((struct cx23885_fh *)priv)->dev;
1322
1323 return cx23885_get_control(dev, ctl);
1324}
1325
1326static int vidioc_s_ctrl(struct file *file, void *priv,
1327 struct v4l2_control *ctl)
1328{
1329 struct cx23885_dev *dev = ((struct cx23885_fh *)priv)->dev;
1330
1331 return cx23885_set_control(dev, ctl);
1332}
1333
1334static int vidioc_querycap(struct file *file, void *priv, 1335static int vidioc_querycap(struct file *file, void *priv,
1335 struct v4l2_capability *cap) 1336 struct v4l2_capability *cap)
1336{ 1337{
1337 struct cx23885_fh *fh = file->private_data; 1338 struct cx23885_dev *dev = video_drvdata(file);
1338 struct cx23885_dev *dev = fh->dev;
1339 struct cx23885_tsport *tsport = &dev->ts1; 1339 struct cx23885_tsport *tsport = &dev->ts1;
1340 1340
1341 strlcpy(cap->driver, dev->name, sizeof(cap->driver)); 1341 strlcpy(cap->driver, dev->name, sizeof(cap->driver));
@@ -1368,8 +1368,7 @@ static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
1368static int vidioc_g_fmt_vid_cap(struct file *file, void *priv, 1368static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
1369 struct v4l2_format *f) 1369 struct v4l2_format *f)
1370{ 1370{
1371 struct cx23885_fh *fh = file->private_data; 1371 struct cx23885_dev *dev = video_drvdata(file);
1372 struct cx23885_dev *dev = fh->dev;
1373 1372
1374 f->fmt.pix.pixelformat = V4L2_PIX_FMT_MPEG; 1373 f->fmt.pix.pixelformat = V4L2_PIX_FMT_MPEG;
1375 f->fmt.pix.bytesperline = 0; 1374 f->fmt.pix.bytesperline = 0;
@@ -1378,285 +1377,63 @@ static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
1378 f->fmt.pix.colorspace = 0; 1377 f->fmt.pix.colorspace = 0;
1379 f->fmt.pix.width = dev->ts1.width; 1378 f->fmt.pix.width = dev->ts1.width;
1380 f->fmt.pix.height = dev->ts1.height; 1379 f->fmt.pix.height = dev->ts1.height;
1381 f->fmt.pix.field = fh->mpegq.field; 1380 f->fmt.pix.field = V4L2_FIELD_INTERLACED;
1382 dprintk(1, "VIDIOC_G_FMT: w: %d, h: %d, f: %d\n", 1381 dprintk(1, "VIDIOC_G_FMT: w: %d, h: %d\n",
1383 dev->ts1.width, dev->ts1.height, fh->mpegq.field); 1382 dev->ts1.width, dev->ts1.height);
1384 return 0; 1383 return 0;
1385} 1384}
1386 1385
1387static int vidioc_try_fmt_vid_cap(struct file *file, void *priv, 1386static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
1388 struct v4l2_format *f) 1387 struct v4l2_format *f)
1389{ 1388{
1390 struct cx23885_fh *fh = file->private_data; 1389 struct cx23885_dev *dev = video_drvdata(file);
1391 struct cx23885_dev *dev = fh->dev;
1392 1390
1393 f->fmt.pix.pixelformat = V4L2_PIX_FMT_MPEG; 1391 f->fmt.pix.pixelformat = V4L2_PIX_FMT_MPEG;
1394 f->fmt.pix.bytesperline = 0; 1392 f->fmt.pix.bytesperline = 0;
1395 f->fmt.pix.sizeimage = 1393 f->fmt.pix.sizeimage =
1396 dev->ts1.ts_packet_size * dev->ts1.ts_packet_count; 1394 dev->ts1.ts_packet_size * dev->ts1.ts_packet_count;
1397 f->fmt.pix.colorspace = 0; 1395 f->fmt.pix.colorspace = 0;
1398 dprintk(1, "VIDIOC_TRY_FMT: w: %d, h: %d, f: %d\n", 1396 f->fmt.pix.field = V4L2_FIELD_INTERLACED;
1399 dev->ts1.width, dev->ts1.height, fh->mpegq.field); 1397 dprintk(1, "VIDIOC_TRY_FMT: w: %d, h: %d\n",
1398 dev->ts1.width, dev->ts1.height);
1400 return 0; 1399 return 0;
1401} 1400}
1402 1401
1403static int vidioc_s_fmt_vid_cap(struct file *file, void *priv, 1402static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
1404 struct v4l2_format *f) 1403 struct v4l2_format *f)
1405{ 1404{
1406 struct cx23885_fh *fh = file->private_data; 1405 struct cx23885_dev *dev = video_drvdata(file);
1407 struct cx23885_dev *dev = fh->dev;
1408 1406
1409 f->fmt.pix.pixelformat = V4L2_PIX_FMT_MPEG; 1407 f->fmt.pix.pixelformat = V4L2_PIX_FMT_MPEG;
1410 f->fmt.pix.bytesperline = 0; 1408 f->fmt.pix.bytesperline = 0;
1411 f->fmt.pix.sizeimage = 1409 f->fmt.pix.sizeimage =
1412 dev->ts1.ts_packet_size * dev->ts1.ts_packet_count; 1410 dev->ts1.ts_packet_size * dev->ts1.ts_packet_count;
1413 f->fmt.pix.colorspace = 0; 1411 f->fmt.pix.colorspace = 0;
1412 f->fmt.pix.field = V4L2_FIELD_INTERLACED;
1414 dprintk(1, "VIDIOC_S_FMT: w: %d, h: %d, f: %d\n", 1413 dprintk(1, "VIDIOC_S_FMT: w: %d, h: %d, f: %d\n",
1415 f->fmt.pix.width, f->fmt.pix.height, f->fmt.pix.field); 1414 f->fmt.pix.width, f->fmt.pix.height, f->fmt.pix.field);
1416 return 0; 1415 return 0;
1417} 1416}
1418 1417
1419static int vidioc_reqbufs(struct file *file, void *priv,
1420 struct v4l2_requestbuffers *p)
1421{
1422 struct cx23885_fh *fh = file->private_data;
1423
1424 return videobuf_reqbufs(&fh->mpegq, p);
1425}
1426
1427static int vidioc_querybuf(struct file *file, void *priv,
1428 struct v4l2_buffer *p)
1429{
1430 struct cx23885_fh *fh = file->private_data;
1431
1432 return videobuf_querybuf(&fh->mpegq, p);
1433}
1434
1435static int vidioc_qbuf(struct file *file, void *priv,
1436 struct v4l2_buffer *p)
1437{
1438 struct cx23885_fh *fh = file->private_data;
1439
1440 return videobuf_qbuf(&fh->mpegq, p);
1441}
1442
1443static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *b)
1444{
1445 struct cx23885_fh *fh = priv;
1446
1447 return videobuf_dqbuf(&fh->mpegq, b, file->f_flags & O_NONBLOCK);
1448}
1449
1450
1451static int vidioc_streamon(struct file *file, void *priv,
1452 enum v4l2_buf_type i)
1453{
1454 struct cx23885_fh *fh = file->private_data;
1455
1456 return videobuf_streamon(&fh->mpegq);
1457}
1458
1459static int vidioc_streamoff(struct file *file, void *priv, enum v4l2_buf_type i)
1460{
1461 struct cx23885_fh *fh = file->private_data;
1462
1463 return videobuf_streamoff(&fh->mpegq);
1464}
1465
1466static int vidioc_g_ext_ctrls(struct file *file, void *priv,
1467 struct v4l2_ext_controls *f)
1468{
1469 struct cx23885_fh *fh = priv;
1470 struct cx23885_dev *dev = fh->dev;
1471
1472 if (f->ctrl_class != V4L2_CTRL_CLASS_MPEG)
1473 return -EINVAL;
1474 return cx2341x_ext_ctrls(&dev->mpeg_params, 0, f, VIDIOC_G_EXT_CTRLS);
1475}
1476
1477static int vidioc_s_ext_ctrls(struct file *file, void *priv,
1478 struct v4l2_ext_controls *f)
1479{
1480 struct cx23885_fh *fh = priv;
1481 struct cx23885_dev *dev = fh->dev;
1482 struct cx2341x_mpeg_params p;
1483 int err;
1484
1485 if (f->ctrl_class != V4L2_CTRL_CLASS_MPEG)
1486 return -EINVAL;
1487
1488 p = dev->mpeg_params;
1489 err = cx2341x_ext_ctrls(&p, 0, f, VIDIOC_S_EXT_CTRLS);
1490
1491 if (err == 0) {
1492 err = cx2341x_update(dev, cx23885_mbox_func,
1493 &dev->mpeg_params, &p);
1494 dev->mpeg_params = p;
1495 }
1496 return err;
1497}
1498
1499static int vidioc_try_ext_ctrls(struct file *file, void *priv,
1500 struct v4l2_ext_controls *f)
1501{
1502 struct cx23885_fh *fh = priv;
1503 struct cx23885_dev *dev = fh->dev;
1504 struct cx2341x_mpeg_params p;
1505 int err;
1506
1507 if (f->ctrl_class != V4L2_CTRL_CLASS_MPEG)
1508 return -EINVAL;
1509
1510 p = dev->mpeg_params;
1511 err = cx2341x_ext_ctrls(&p, 0, f, VIDIOC_TRY_EXT_CTRLS);
1512 return err;
1513}
1514
1515static int vidioc_log_status(struct file *file, void *priv) 1418static int vidioc_log_status(struct file *file, void *priv)
1516{ 1419{
1517 struct cx23885_fh *fh = priv; 1420 struct cx23885_dev *dev = video_drvdata(file);
1518 struct cx23885_dev *dev = fh->dev;
1519 char name[32 + 2]; 1421 char name[32 + 2];
1520 1422
1521 snprintf(name, sizeof(name), "%s/2", dev->name); 1423 snprintf(name, sizeof(name), "%s/2", dev->name);
1522 printk(KERN_INFO
1523 "%s/2: ============ START LOG STATUS ============\n",
1524 dev->name);
1525 call_all(dev, core, log_status); 1424 call_all(dev, core, log_status);
1526 cx2341x_log_status(&dev->mpeg_params, name); 1425 v4l2_ctrl_handler_log_status(&dev->cxhdl.hdl, name);
1527 printk(KERN_INFO
1528 "%s/2: ============= END LOG STATUS =============\n",
1529 dev->name);
1530 return 0; 1426 return 0;
1531} 1427}
1532 1428
1533static int vidioc_querymenu(struct file *file, void *priv,
1534 struct v4l2_querymenu *a)
1535{
1536 struct cx23885_fh *fh = priv;
1537 struct cx23885_dev *dev = fh->dev;
1538
1539 return cx23885_querymenu(dev, a);
1540}
1541
1542static int vidioc_queryctrl(struct file *file, void *priv,
1543 struct v4l2_queryctrl *c)
1544{
1545 struct cx23885_fh *fh = priv;
1546 struct cx23885_dev *dev = fh->dev;
1547
1548 return cx23885_queryctrl(dev, c);
1549}
1550
1551static int mpeg_open(struct file *file)
1552{
1553 struct cx23885_dev *dev = video_drvdata(file);
1554 struct cx23885_fh *fh;
1555
1556 dprintk(2, "%s()\n", __func__);
1557
1558 /* allocate + initialize per filehandle data */
1559 fh = kzalloc(sizeof(*fh), GFP_KERNEL);
1560 if (!fh)
1561 return -ENOMEM;
1562
1563 file->private_data = fh;
1564 fh->dev = dev;
1565
1566 videobuf_queue_sg_init(&fh->mpegq, &cx23885_qops,
1567 &dev->pci->dev, &dev->ts1.slock,
1568 V4L2_BUF_TYPE_VIDEO_CAPTURE,
1569 V4L2_FIELD_INTERLACED,
1570 sizeof(struct cx23885_buffer),
1571 fh, NULL);
1572 return 0;
1573}
1574
1575static int mpeg_release(struct file *file)
1576{
1577 struct cx23885_fh *fh = file->private_data;
1578 struct cx23885_dev *dev = fh->dev;
1579
1580 dprintk(2, "%s()\n", __func__);
1581
1582 /* FIXME: Review this crap */
1583 /* Shut device down on last close */
1584 if (atomic_cmpxchg(&fh->v4l_reading, 1, 0) == 1) {
1585 if (atomic_dec_return(&dev->v4l_reader_count) == 0) {
1586 /* stop mpeg capture */
1587 cx23885_api_cmd(fh->dev, CX2341X_ENC_STOP_CAPTURE, 3, 0,
1588 CX23885_END_NOW, CX23885_MPEG_CAPTURE,
1589 CX23885_RAW_BITS_NONE);
1590
1591 msleep(500);
1592 cx23885_417_check_encoder(dev);
1593
1594 cx23885_cancel_buffers(&fh->dev->ts1);
1595 }
1596 }
1597
1598 if (fh->mpegq.streaming)
1599 videobuf_streamoff(&fh->mpegq);
1600 if (fh->mpegq.reading)
1601 videobuf_read_stop(&fh->mpegq);
1602
1603 videobuf_mmap_free(&fh->mpegq);
1604 file->private_data = NULL;
1605 kfree(fh);
1606
1607 return 0;
1608}
1609
1610static ssize_t mpeg_read(struct file *file, char __user *data,
1611 size_t count, loff_t *ppos)
1612{
1613 struct cx23885_fh *fh = file->private_data;
1614 struct cx23885_dev *dev = fh->dev;
1615
1616 dprintk(2, "%s()\n", __func__);
1617
1618 /* Deal w/ A/V decoder * and mpeg encoder sync issues. */
1619 /* Start mpeg encoder on first read. */
1620 if (atomic_cmpxchg(&fh->v4l_reading, 0, 1) == 0) {
1621 if (atomic_inc_return(&dev->v4l_reader_count) == 1) {
1622 if (cx23885_initialize_codec(dev, 1) < 0)
1623 return -EINVAL;
1624 }
1625 }
1626
1627 return videobuf_read_stream(&fh->mpegq, data, count, ppos, 0,
1628 file->f_flags & O_NONBLOCK);
1629}
1630
1631static unsigned int mpeg_poll(struct file *file,
1632 struct poll_table_struct *wait)
1633{
1634 struct cx23885_fh *fh = file->private_data;
1635 struct cx23885_dev *dev = fh->dev;
1636
1637 dprintk(2, "%s\n", __func__);
1638
1639 return videobuf_poll_stream(file, &fh->mpegq, wait);
1640}
1641
1642static int mpeg_mmap(struct file *file, struct vm_area_struct *vma)
1643{
1644 struct cx23885_fh *fh = file->private_data;
1645 struct cx23885_dev *dev = fh->dev;
1646
1647 dprintk(2, "%s()\n", __func__);
1648
1649 return videobuf_mmap_mapper(&fh->mpegq, vma);
1650}
1651
1652static struct v4l2_file_operations mpeg_fops = { 1429static struct v4l2_file_operations mpeg_fops = {
1653 .owner = THIS_MODULE, 1430 .owner = THIS_MODULE,
1654 .open = mpeg_open, 1431 .open = v4l2_fh_open,
1655 .release = mpeg_release, 1432 .release = vb2_fop_release,
1656 .read = mpeg_read, 1433 .read = vb2_fop_read,
1657 .poll = mpeg_poll, 1434 .poll = vb2_fop_poll,
1658 .mmap = mpeg_mmap, 1435 .unlocked_ioctl = video_ioctl2,
1659 .ioctl = video_ioctl2, 1436 .mmap = vb2_fop_mmap,
1660}; 1437};
1661 1438
1662static const struct v4l2_ioctl_ops mpeg_ioctl_ops = { 1439static const struct v4l2_ioctl_ops mpeg_ioctl_ops = {
@@ -1669,25 +1446,19 @@ static const struct v4l2_ioctl_ops mpeg_ioctl_ops = {
1669 .vidioc_s_tuner = vidioc_s_tuner, 1446 .vidioc_s_tuner = vidioc_s_tuner,
1670 .vidioc_g_frequency = vidioc_g_frequency, 1447 .vidioc_g_frequency = vidioc_g_frequency,
1671 .vidioc_s_frequency = vidioc_s_frequency, 1448 .vidioc_s_frequency = vidioc_s_frequency,
1672 .vidioc_s_ctrl = vidioc_s_ctrl,
1673 .vidioc_g_ctrl = vidioc_g_ctrl,
1674 .vidioc_querycap = vidioc_querycap, 1449 .vidioc_querycap = vidioc_querycap,
1675 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap, 1450 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
1676 .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap, 1451 .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
1677 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap, 1452 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
1678 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap, 1453 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
1679 .vidioc_reqbufs = vidioc_reqbufs, 1454 .vidioc_reqbufs = vb2_ioctl_reqbufs,
1680 .vidioc_querybuf = vidioc_querybuf, 1455 .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
1681 .vidioc_qbuf = vidioc_qbuf, 1456 .vidioc_querybuf = vb2_ioctl_querybuf,
1682 .vidioc_dqbuf = vidioc_dqbuf, 1457 .vidioc_qbuf = vb2_ioctl_qbuf,
1683 .vidioc_streamon = vidioc_streamon, 1458 .vidioc_dqbuf = vb2_ioctl_dqbuf,
1684 .vidioc_streamoff = vidioc_streamoff, 1459 .vidioc_streamon = vb2_ioctl_streamon,
1685 .vidioc_g_ext_ctrls = vidioc_g_ext_ctrls, 1460 .vidioc_streamoff = vb2_ioctl_streamoff,
1686 .vidioc_s_ext_ctrls = vidioc_s_ext_ctrls,
1687 .vidioc_try_ext_ctrls = vidioc_try_ext_ctrls,
1688 .vidioc_log_status = vidioc_log_status, 1461 .vidioc_log_status = vidioc_log_status,
1689 .vidioc_querymenu = vidioc_querymenu,
1690 .vidioc_queryctrl = vidioc_queryctrl,
1691#ifdef CONFIG_VIDEO_ADV_DEBUG 1462#ifdef CONFIG_VIDEO_ADV_DEBUG
1692 .vidioc_g_chip_info = cx23885_g_chip_info, 1463 .vidioc_g_chip_info = cx23885_g_chip_info,
1693 .vidioc_g_register = cx23885_g_register, 1464 .vidioc_g_register = cx23885_g_register,
@@ -1711,6 +1482,7 @@ void cx23885_417_unregister(struct cx23885_dev *dev)
1711 video_unregister_device(dev->v4l_device); 1482 video_unregister_device(dev->v4l_device);
1712 else 1483 else
1713 video_device_release(dev->v4l_device); 1484 video_device_release(dev->v4l_device);
1485 v4l2_ctrl_handler_free(&dev->cxhdl.hdl);
1714 dev->v4l_device = NULL; 1486 dev->v4l_device = NULL;
1715 } 1487 }
1716} 1488}
@@ -1742,6 +1514,7 @@ int cx23885_417_register(struct cx23885_dev *dev)
1742 /* FIXME: Port1 hardcoded here */ 1514 /* FIXME: Port1 hardcoded here */
1743 int err = -ENODEV; 1515 int err = -ENODEV;
1744 struct cx23885_tsport *tsport = &dev->ts1; 1516 struct cx23885_tsport *tsport = &dev->ts1;
1517 struct vb2_queue *q;
1745 1518
1746 dprintk(1, "%s()\n", __func__); 1519 dprintk(1, "%s()\n", __func__);
1747 1520
@@ -1757,14 +1530,36 @@ int cx23885_417_register(struct cx23885_dev *dev)
1757 tsport->height = 576; 1530 tsport->height = 576;
1758 1531
1759 tsport->width = 720; 1532 tsport->width = 720;
1760 cx2341x_fill_defaults(&dev->mpeg_params); 1533 dev->cxhdl.port = CX2341X_PORT_SERIAL;
1761 1534 err = cx2341x_handler_init(&dev->cxhdl, 50);
1762 dev->mpeg_params.port = CX2341X_PORT_SERIAL; 1535 if (err)
1536 return err;
1537 dev->cxhdl.priv = dev;
1538 dev->cxhdl.func = cx23885_api_func;
1539 cx2341x_handler_set_50hz(&dev->cxhdl, tsport->height == 576);
1540 v4l2_ctrl_add_handler(&dev->ctrl_handler, &dev->cxhdl.hdl, NULL);
1763 1541
1764 /* Allocate and initialize V4L video device */ 1542 /* Allocate and initialize V4L video device */
1765 dev->v4l_device = cx23885_video_dev_alloc(tsport, 1543 dev->v4l_device = cx23885_video_dev_alloc(tsport,
1766 dev->pci, &cx23885_mpeg_template, "mpeg"); 1544 dev->pci, &cx23885_mpeg_template, "mpeg");
1545 q = &dev->vb2_mpegq;
1546 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1547 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1548 q->gfp_flags = GFP_DMA32;
1549 q->min_buffers_needed = 2;
1550 q->drv_priv = dev;
1551 q->buf_struct_size = sizeof(struct cx23885_buffer);
1552 q->ops = &cx23885_qops;
1553 q->mem_ops = &vb2_dma_sg_memops;
1554 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1555 q->lock = &dev->lock;
1556
1557 err = vb2_queue_init(q);
1558 if (err < 0)
1559 return err;
1767 video_set_drvdata(dev->v4l_device, dev); 1560 video_set_drvdata(dev->v4l_device, dev);
1561 dev->v4l_device->lock = &dev->lock;
1562 dev->v4l_device->queue = q;
1768 err = video_register_device(dev->v4l_device, 1563 err = video_register_device(dev->v4l_device,
1769 VFL_TYPE_GRABBER, -1); 1564 VFL_TYPE_GRABBER, -1);
1770 if (err < 0) { 1565 if (err < 0) {
diff --git a/drivers/media/pci/cx23885/cx23885-alsa.c b/drivers/media/pci/cx23885/cx23885-alsa.c
index 554798dcedd0..ae7c2e89ad1c 100644
--- a/drivers/media/pci/cx23885/cx23885-alsa.c
+++ b/drivers/media/pci/cx23885/cx23885-alsa.c
@@ -15,10 +15,6 @@
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details. 17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */ 18 */
23 19
24#include <linux/module.h> 20#include <linux/module.h>
@@ -84,6 +80,82 @@ MODULE_PARM_DESC(audio_debug, "enable debug messages [analog audio]");
84#define AUD_INT_MCHG_IRQ (1 << 21) 80#define AUD_INT_MCHG_IRQ (1 << 21)
85#define GP_COUNT_CONTROL_RESET 0x3 81#define GP_COUNT_CONTROL_RESET 0x3
86 82
83static int cx23885_alsa_dma_init(struct cx23885_audio_dev *chip, int nr_pages)
84{
85 struct cx23885_audio_buffer *buf = chip->buf;
86 struct page *pg;
87 int i;
88
89 buf->vaddr = vmalloc_32(nr_pages << PAGE_SHIFT);
90 if (NULL == buf->vaddr) {
91 dprintk(1, "vmalloc_32(%d pages) failed\n", nr_pages);
92 return -ENOMEM;
93 }
94
95 dprintk(1, "vmalloc is at addr 0x%08lx, size=%d\n",
96 (unsigned long)buf->vaddr,
97 nr_pages << PAGE_SHIFT);
98
99 memset(buf->vaddr, 0, nr_pages << PAGE_SHIFT);
100 buf->nr_pages = nr_pages;
101
102 buf->sglist = vzalloc(buf->nr_pages * sizeof(*buf->sglist));
103 if (NULL == buf->sglist)
104 goto vzalloc_err;
105
106 sg_init_table(buf->sglist, buf->nr_pages);
107 for (i = 0; i < buf->nr_pages; i++) {
108 pg = vmalloc_to_page(buf->vaddr + i * PAGE_SIZE);
109 if (NULL == pg)
110 goto vmalloc_to_page_err;
111 sg_set_page(&buf->sglist[i], pg, PAGE_SIZE, 0);
112 }
113 return 0;
114
115vmalloc_to_page_err:
116 vfree(buf->sglist);
117 buf->sglist = NULL;
118vzalloc_err:
119 vfree(buf->vaddr);
120 buf->vaddr = NULL;
121 return -ENOMEM;
122}
123
124static int cx23885_alsa_dma_map(struct cx23885_audio_dev *dev)
125{
126 struct cx23885_audio_buffer *buf = dev->buf;
127
128 buf->sglen = dma_map_sg(&dev->pci->dev, buf->sglist,
129 buf->nr_pages, PCI_DMA_FROMDEVICE);
130
131 if (0 == buf->sglen) {
132 pr_warn("%s: cx23885_alsa_map_sg failed\n", __func__);
133 return -ENOMEM;
134 }
135 return 0;
136}
137
138static int cx23885_alsa_dma_unmap(struct cx23885_audio_dev *dev)
139{
140 struct cx23885_audio_buffer *buf = dev->buf;
141
142 if (!buf->sglen)
143 return 0;
144
145 dma_unmap_sg(&dev->pci->dev, buf->sglist, buf->sglen, PCI_DMA_FROMDEVICE);
146 buf->sglen = 0;
147 return 0;
148}
149
150static int cx23885_alsa_dma_free(struct cx23885_audio_buffer *buf)
151{
152 vfree(buf->sglist);
153 buf->sglist = NULL;
154 vfree(buf->vaddr);
155 buf->vaddr = NULL;
156 return 0;
157}
158
87/* 159/*
88 * BOARD Specific: Sets audio DMA 160 * BOARD Specific: Sets audio DMA
89 */ 161 */
@@ -198,15 +270,18 @@ int cx23885_audio_irq(struct cx23885_dev *dev, u32 status, u32 mask)
198 270
199static int dsp_buffer_free(struct cx23885_audio_dev *chip) 271static int dsp_buffer_free(struct cx23885_audio_dev *chip)
200{ 272{
273 struct cx23885_riscmem *risc;
274
201 BUG_ON(!chip->dma_size); 275 BUG_ON(!chip->dma_size);
202 276
203 dprintk(2, "Freeing buffer\n"); 277 dprintk(2, "Freeing buffer\n");
204 videobuf_dma_unmap(&chip->pci->dev, chip->dma_risc); 278 cx23885_alsa_dma_unmap(chip);
205 videobuf_dma_free(chip->dma_risc); 279 cx23885_alsa_dma_free(chip->buf);
206 btcx_riscmem_free(chip->pci, &chip->buf->risc); 280 risc = &chip->buf->risc;
281 pci_free_consistent(chip->pci, risc->size, risc->cpu, risc->dma);
207 kfree(chip->buf); 282 kfree(chip->buf);
208 283
209 chip->dma_risc = NULL; 284 chip->buf = NULL;
210 chip->dma_size = 0; 285 chip->dma_size = 0;
211 286
212 return 0; 287 return 0;
@@ -289,6 +364,7 @@ static int snd_cx23885_close(struct snd_pcm_substream *substream)
289 return 0; 364 return 0;
290} 365}
291 366
367
292/* 368/*
293 * hw_params callback 369 * hw_params callback
294 */ 370 */
@@ -296,8 +372,6 @@ static int snd_cx23885_hw_params(struct snd_pcm_substream *substream,
296 struct snd_pcm_hw_params *hw_params) 372 struct snd_pcm_hw_params *hw_params)
297{ 373{
298 struct cx23885_audio_dev *chip = snd_pcm_substream_chip(substream); 374 struct cx23885_audio_dev *chip = snd_pcm_substream_chip(substream);
299 struct videobuf_dmabuf *dma;
300
301 struct cx23885_audio_buffer *buf; 375 struct cx23885_audio_buffer *buf;
302 int ret; 376 int ret;
303 377
@@ -318,19 +392,18 @@ static int snd_cx23885_hw_params(struct snd_pcm_substream *substream,
318 return -ENOMEM; 392 return -ENOMEM;
319 393
320 buf->bpl = chip->period_size; 394 buf->bpl = chip->period_size;
395 chip->buf = buf;
321 396
322 dma = &buf->dma; 397 ret = cx23885_alsa_dma_init(chip,
323 videobuf_dma_init(dma);
324 ret = videobuf_dma_init_kernel(dma, PCI_DMA_FROMDEVICE,
325 (PAGE_ALIGN(chip->dma_size) >> PAGE_SHIFT)); 398 (PAGE_ALIGN(chip->dma_size) >> PAGE_SHIFT));
326 if (ret < 0) 399 if (ret < 0)
327 goto error; 400 goto error;
328 401
329 ret = videobuf_dma_map(&chip->pci->dev, dma); 402 ret = cx23885_alsa_dma_map(chip);
330 if (ret < 0) 403 if (ret < 0)
331 goto error; 404 goto error;
332 405
333 ret = cx23885_risc_databuffer(chip->pci, &buf->risc, dma->sglist, 406 ret = cx23885_risc_databuffer(chip->pci, &buf->risc, buf->sglist,
334 chip->period_size, chip->num_periods, 1); 407 chip->period_size, chip->num_periods, 1);
335 if (ret < 0) 408 if (ret < 0)
336 goto error; 409 goto error;
@@ -340,10 +413,7 @@ static int snd_cx23885_hw_params(struct snd_pcm_substream *substream,
340 buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma); 413 buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
341 buf->risc.jmp[2] = cpu_to_le32(0); /* bits 63-32 */ 414 buf->risc.jmp[2] = cpu_to_le32(0); /* bits 63-32 */
342 415
343 chip->buf = buf; 416 substream->runtime->dma_area = chip->buf->vaddr;
344 chip->dma_risc = dma;
345
346 substream->runtime->dma_area = chip->dma_risc->vaddr;
347 substream->runtime->dma_bytes = chip->dma_size; 417 substream->runtime->dma_bytes = chip->dma_size;
348 substream->runtime->dma_addr = 0; 418 substream->runtime->dma_addr = 0;
349 419
@@ -351,6 +421,7 @@ static int snd_cx23885_hw_params(struct snd_pcm_substream *substream,
351 421
352error: 422error:
353 kfree(buf); 423 kfree(buf);
424 chip->buf = NULL;
354 return ret; 425 return ret;
355} 426}
356 427
diff --git a/drivers/media/pci/cx23885/cx23885-av.c b/drivers/media/pci/cx23885/cx23885-av.c
index c443b7ac5adf..877dad89107e 100644
--- a/drivers/media/pci/cx23885/cx23885-av.c
+++ b/drivers/media/pci/cx23885/cx23885-av.c
@@ -14,11 +14,6 @@
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details. 16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
21 * 02110-1301, USA.
22 */ 17 */
23 18
24#include "cx23885.h" 19#include "cx23885.h"
diff --git a/drivers/media/pci/cx23885/cx23885-av.h b/drivers/media/pci/cx23885/cx23885-av.h
index d2915c3e53a2..97f232f8efb9 100644
--- a/drivers/media/pci/cx23885/cx23885-av.h
+++ b/drivers/media/pci/cx23885/cx23885-av.h
@@ -14,11 +14,6 @@
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details. 16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
21 * 02110-1301, USA.
22 */ 17 */
23 18
24#ifndef _CX23885_AV_H_ 19#ifndef _CX23885_AV_H_
diff --git a/drivers/media/pci/cx23885/cx23885-cards.c b/drivers/media/pci/cx23885/cx23885-cards.c
index c2b608007190..88c257d1161b 100644
--- a/drivers/media/pci/cx23885/cx23885-cards.c
+++ b/drivers/media/pci/cx23885/cx23885-cards.c
@@ -13,10 +13,6 @@
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * 14 *
15 * GNU General Public License for more details. 15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */ 16 */
21 17
22#include <linux/init.h> 18#include <linux/init.h>
@@ -679,6 +675,11 @@ struct cx23885_board cx23885_boards[] = {
679 .amux = CX25840_AUDIO7, 675 .amux = CX25840_AUDIO7,
680 } }, 676 } },
681 }, 677 },
678 [CX23885_BOARD_DVBSKY_T9580] = {
679 .name = "DVBSky T9580",
680 .portb = CX23885_MPEG_DVB,
681 .portc = CX23885_MPEG_DVB,
682 },
682}; 683};
683const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards); 684const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
684 685
@@ -934,6 +935,10 @@ struct cx23885_subid cx23885_subids[] = {
934 .subvendor = 0x18ac, 935 .subvendor = 0x18ac,
935 .subdevice = 0xdb98, 936 .subdevice = 0xdb98,
936 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2, 937 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2,
938 }, {
939 .subvendor = 0x4254,
940 .subdevice = 0x9580,
941 .card = CX23885_BOARD_DVBSKY_T9580,
937 }, 942 },
938}; 943};
939const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids); 944const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
@@ -1528,6 +1533,14 @@ void cx23885_gpio_setup(struct cx23885_dev *dev)
1528 cx_set(GP0_IO, 0x00040004); 1533 cx_set(GP0_IO, 0x00040004);
1529 mdelay(60); 1534 mdelay(60);
1530 break; 1535 break;
1536 case CX23885_BOARD_DVBSKY_T9580:
1537 /* enable GPIO3-18 pins */
1538 cx_write(MC417_CTL, 0x00000037);
1539 cx23885_gpio_enable(dev, GPIO_2 | GPIO_11, 1);
1540 cx23885_gpio_clear(dev, GPIO_2 | GPIO_11);
1541 mdelay(100);
1542 cx23885_gpio_set(dev, GPIO_2 | GPIO_11);
1543 break;
1531 } 1544 }
1532} 1545}
1533 1546
@@ -1851,6 +1864,14 @@ void cx23885_card_setup(struct cx23885_dev *dev)
1851 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 1864 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1852 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 1865 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1853 break; 1866 break;
1867 case CX23885_BOARD_DVBSKY_T9580:
1868 ts1->gen_ctrl_val = 0x5; /* Parallel */
1869 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1870 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1871 ts2->gen_ctrl_val = 0x8; /* Serial bus */
1872 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1873 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1874 break;
1854 case CX23885_BOARD_HAUPPAUGE_HVR1250: 1875 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1855 case CX23885_BOARD_HAUPPAUGE_HVR1500: 1876 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1856 case CX23885_BOARD_HAUPPAUGE_HVR1500Q: 1877 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
@@ -1913,6 +1934,7 @@ void cx23885_card_setup(struct cx23885_dev *dev)
1913 case CX23885_BOARD_AVERMEDIA_HC81R: 1934 case CX23885_BOARD_AVERMEDIA_HC81R:
1914 case CX23885_BOARD_TBS_6980: 1935 case CX23885_BOARD_TBS_6980:
1915 case CX23885_BOARD_TBS_6981: 1936 case CX23885_BOARD_TBS_6981:
1937 case CX23885_BOARD_DVBSKY_T9580:
1916 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev, 1938 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
1917 &dev->i2c_bus[2].i2c_adap, 1939 &dev->i2c_bus[2].i2c_adap,
1918 "cx25840", 0x88 >> 1, NULL); 1940 "cx25840", 0x88 >> 1, NULL);
@@ -1970,5 +1992,3 @@ void cx23885_card_setup(struct cx23885_dev *dev)
1970 } 1992 }
1971 } 1993 }
1972} 1994}
1973
1974/* ------------------------------------------------------------------ */
diff --git a/drivers/media/pci/cx23885/cx23885-core.c b/drivers/media/pci/cx23885/cx23885-core.c
index edcd79db1e4e..331eddac7222 100644
--- a/drivers/media/pci/cx23885/cx23885-core.c
+++ b/drivers/media/pci/cx23885/cx23885-core.c
@@ -13,10 +13,6 @@
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * 14 *
15 * GNU General Public License for more details. 15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */ 16 */
21 17
22#include <linux/init.h> 18#include <linux/init.h>
@@ -420,39 +416,23 @@ static int cx23885_risc_decode(u32 risc)
420 return incr[risc >> 28] ? incr[risc >> 28] : 1; 416 return incr[risc >> 28] ? incr[risc >> 28] : 1;
421} 417}
422 418
423void cx23885_wakeup(struct cx23885_tsport *port, 419static void cx23885_wakeup(struct cx23885_tsport *port,
424 struct cx23885_dmaqueue *q, u32 count) 420 struct cx23885_dmaqueue *q, u32 count)
425{ 421{
426 struct cx23885_dev *dev = port->dev; 422 struct cx23885_dev *dev = port->dev;
427 struct cx23885_buffer *buf; 423 struct cx23885_buffer *buf;
428 int bc;
429
430 for (bc = 0;; bc++) {
431 if (list_empty(&q->active))
432 break;
433 buf = list_entry(q->active.next,
434 struct cx23885_buffer, vb.queue);
435
436 /* count comes from the hw and is is 16bit wide --
437 * this trick handles wrap-arounds correctly for
438 * up to 32767 buffers in flight... */
439 if ((s16) (count - buf->count) < 0)
440 break;
441 424
442 v4l2_get_timestamp(&buf->vb.ts);
443 dprintk(2, "[%p/%d] wakeup reg=%d buf=%d\n", buf, buf->vb.i,
444 count, buf->count);
445 buf->vb.state = VIDEOBUF_DONE;
446 list_del(&buf->vb.queue);
447 wake_up(&buf->vb.done);
448 }
449 if (list_empty(&q->active)) 425 if (list_empty(&q->active))
450 del_timer(&q->timeout); 426 return;
451 else 427 buf = list_entry(q->active.next,
452 mod_timer(&q->timeout, jiffies + BUFFER_TIMEOUT); 428 struct cx23885_buffer, queue);
453 if (bc != 1) 429
454 printk(KERN_WARNING "%s: %d buffers handled (should be 1)\n", 430 v4l2_get_timestamp(&buf->vb.v4l2_buf.timestamp);
455 __func__, bc); 431 buf->vb.v4l2_buf.sequence = q->count++;
432 dprintk(1, "[%p/%d] wakeup reg=%d buf=%d\n", buf, buf->vb.v4l2_buf.index,
433 count, q->count);
434 list_del(&buf->queue);
435 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_DONE);
456} 436}
457 437
458int cx23885_sram_channel_setup(struct cx23885_dev *dev, 438int cx23885_sram_channel_setup(struct cx23885_dev *dev,
@@ -482,8 +462,8 @@ int cx23885_sram_channel_setup(struct cx23885_dev *dev,
482 lines = 6; 462 lines = 6;
483 BUG_ON(lines < 2); 463 BUG_ON(lines < 2);
484 464
485 cx_write(8 + 0, RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC); 465 cx_write(8 + 0, RISC_JUMP | RISC_CNT_RESET);
486 cx_write(8 + 4, 8); 466 cx_write(8 + 4, 12);
487 cx_write(8 + 8, 0); 467 cx_write(8 + 8, 0);
488 468
489 /* write CDT */ 469 /* write CDT */
@@ -590,7 +570,7 @@ void cx23885_sram_channel_dump(struct cx23885_dev *dev,
590} 570}
591 571
592static void cx23885_risc_disasm(struct cx23885_tsport *port, 572static void cx23885_risc_disasm(struct cx23885_tsport *port,
593 struct btcx_riscmem *risc) 573 struct cx23885_riscmem *risc)
594{ 574{
595 struct cx23885_dev *dev = port->dev; 575 struct cx23885_dev *dev = port->dev;
596 unsigned int i, j, n; 576 unsigned int i, j, n;
@@ -699,10 +679,6 @@ static int get_resources(struct cx23885_dev *dev)
699 return -EBUSY; 679 return -EBUSY;
700} 680}
701 681
702static void cx23885_timeout(unsigned long data);
703int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
704 u32 reg, u32 mask, u32 value);
705
706static int cx23885_init_tsport(struct cx23885_dev *dev, 682static int cx23885_init_tsport(struct cx23885_dev *dev,
707 struct cx23885_tsport *port, int portno) 683 struct cx23885_tsport *port, int portno)
708{ 684{
@@ -719,11 +695,6 @@ static int cx23885_init_tsport(struct cx23885_dev *dev,
719 port->nr = portno; 695 port->nr = portno;
720 696
721 INIT_LIST_HEAD(&port->mpegq.active); 697 INIT_LIST_HEAD(&port->mpegq.active);
722 INIT_LIST_HEAD(&port->mpegq.queued);
723 port->mpegq.timeout.function = cx23885_timeout;
724 port->mpegq.timeout.data = (unsigned long)port;
725 init_timer(&port->mpegq.timeout);
726
727 mutex_init(&port->frontends.lock); 698 mutex_init(&port->frontends.lock);
728 INIT_LIST_HEAD(&port->frontends.felist); 699 INIT_LIST_HEAD(&port->frontends.felist);
729 port->frontends.active_fe_id = 0; 700 port->frontends.active_fe_id = 0;
@@ -776,9 +747,6 @@ static int cx23885_init_tsport(struct cx23885_dev *dev,
776 BUG(); 747 BUG();
777 } 748 }
778 749
779 cx23885_risc_stopper(dev->pci, &port->mpegq.stopper,
780 port->reg_dma_ctl, port->dma_ctl_val, 0x00);
781
782 return 0; 750 return 0;
783} 751}
784 752
@@ -1089,11 +1057,18 @@ static void cx23885_dev_unregister(struct cx23885_dev *dev)
1089static __le32 *cx23885_risc_field(__le32 *rp, struct scatterlist *sglist, 1057static __le32 *cx23885_risc_field(__le32 *rp, struct scatterlist *sglist,
1090 unsigned int offset, u32 sync_line, 1058 unsigned int offset, u32 sync_line,
1091 unsigned int bpl, unsigned int padding, 1059 unsigned int bpl, unsigned int padding,
1092 unsigned int lines, unsigned int lpi) 1060 unsigned int lines, unsigned int lpi, bool jump)
1093{ 1061{
1094 struct scatterlist *sg; 1062 struct scatterlist *sg;
1095 unsigned int line, todo, sol; 1063 unsigned int line, todo, sol;
1096 1064
1065
1066 if (jump) {
1067 *(rp++) = cpu_to_le32(RISC_JUMP);
1068 *(rp++) = cpu_to_le32(0);
1069 *(rp++) = cpu_to_le32(0); /* bits 63-32 */
1070 }
1071
1097 /* sync instruction */ 1072 /* sync instruction */
1098 if (sync_line != NO_SYNC_LINE) 1073 if (sync_line != NO_SYNC_LINE)
1099 *(rp++) = cpu_to_le32(RISC_RESYNC | sync_line); 1074 *(rp++) = cpu_to_le32(RISC_RESYNC | sync_line);
@@ -1146,14 +1121,13 @@ static __le32 *cx23885_risc_field(__le32 *rp, struct scatterlist *sglist,
1146 return rp; 1121 return rp;
1147} 1122}
1148 1123
1149int cx23885_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc, 1124int cx23885_risc_buffer(struct pci_dev *pci, struct cx23885_riscmem *risc,
1150 struct scatterlist *sglist, unsigned int top_offset, 1125 struct scatterlist *sglist, unsigned int top_offset,
1151 unsigned int bottom_offset, unsigned int bpl, 1126 unsigned int bottom_offset, unsigned int bpl,
1152 unsigned int padding, unsigned int lines) 1127 unsigned int padding, unsigned int lines)
1153{ 1128{
1154 u32 instructions, fields; 1129 u32 instructions, fields;
1155 __le32 *rp; 1130 __le32 *rp;
1156 int rc;
1157 1131
1158 fields = 0; 1132 fields = 0;
1159 if (UNSET != top_offset) 1133 if (UNSET != top_offset)
@@ -1168,19 +1142,20 @@ int cx23885_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
1168 /* write and jump need and extra dword */ 1142 /* write and jump need and extra dword */
1169 instructions = fields * (1 + ((bpl + padding) * lines) 1143 instructions = fields * (1 + ((bpl + padding) * lines)
1170 / PAGE_SIZE + lines); 1144 / PAGE_SIZE + lines);
1171 instructions += 2; 1145 instructions += 5;
1172 rc = btcx_riscmem_alloc(pci, risc, instructions*12); 1146 risc->size = instructions * 12;
1173 if (rc < 0) 1147 risc->cpu = pci_alloc_consistent(pci, risc->size, &risc->dma);
1174 return rc; 1148 if (risc->cpu == NULL)
1149 return -ENOMEM;
1175 1150
1176 /* write risc instructions */ 1151 /* write risc instructions */
1177 rp = risc->cpu; 1152 rp = risc->cpu;
1178 if (UNSET != top_offset) 1153 if (UNSET != top_offset)
1179 rp = cx23885_risc_field(rp, sglist, top_offset, 0, 1154 rp = cx23885_risc_field(rp, sglist, top_offset, 0,
1180 bpl, padding, lines, 0); 1155 bpl, padding, lines, 0, true);
1181 if (UNSET != bottom_offset) 1156 if (UNSET != bottom_offset)
1182 rp = cx23885_risc_field(rp, sglist, bottom_offset, 0x200, 1157 rp = cx23885_risc_field(rp, sglist, bottom_offset, 0x200,
1183 bpl, padding, lines, 0); 1158 bpl, padding, lines, 0, UNSET == top_offset);
1184 1159
1185 /* save pointer to jmp instruction address */ 1160 /* save pointer to jmp instruction address */
1186 risc->jmp = rp; 1161 risc->jmp = rp;
@@ -1189,14 +1164,13 @@ int cx23885_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
1189} 1164}
1190 1165
1191int cx23885_risc_databuffer(struct pci_dev *pci, 1166int cx23885_risc_databuffer(struct pci_dev *pci,
1192 struct btcx_riscmem *risc, 1167 struct cx23885_riscmem *risc,
1193 struct scatterlist *sglist, 1168 struct scatterlist *sglist,
1194 unsigned int bpl, 1169 unsigned int bpl,
1195 unsigned int lines, unsigned int lpi) 1170 unsigned int lines, unsigned int lpi)
1196{ 1171{
1197 u32 instructions; 1172 u32 instructions;
1198 __le32 *rp; 1173 __le32 *rp;
1199 int rc;
1200 1174
1201 /* estimate risc mem: worst case is one write per page border + 1175 /* estimate risc mem: worst case is one write per page border +
1202 one write per scan line + syncs + jump (all 2 dwords). Here 1176 one write per scan line + syncs + jump (all 2 dwords). Here
@@ -1204,16 +1178,17 @@ int cx23885_risc_databuffer(struct pci_dev *pci,
1204 than PAGE_SIZE */ 1178 than PAGE_SIZE */
1205 /* Jump and write need an extra dword */ 1179 /* Jump and write need an extra dword */
1206 instructions = 1 + (bpl * lines) / PAGE_SIZE + lines; 1180 instructions = 1 + (bpl * lines) / PAGE_SIZE + lines;
1207 instructions += 1; 1181 instructions += 4;
1208 1182
1209 rc = btcx_riscmem_alloc(pci, risc, instructions*12); 1183 risc->size = instructions * 12;
1210 if (rc < 0) 1184 risc->cpu = pci_alloc_consistent(pci, risc->size, &risc->dma);
1211 return rc; 1185 if (risc->cpu == NULL)
1186 return -ENOMEM;
1212 1187
1213 /* write risc instructions */ 1188 /* write risc instructions */
1214 rp = risc->cpu; 1189 rp = risc->cpu;
1215 rp = cx23885_risc_field(rp, sglist, 0, NO_SYNC_LINE, 1190 rp = cx23885_risc_field(rp, sglist, 0, NO_SYNC_LINE,
1216 bpl, 0, lines, lpi); 1191 bpl, 0, lines, lpi, lpi == 0);
1217 1192
1218 /* save pointer to jmp instruction address */ 1193 /* save pointer to jmp instruction address */
1219 risc->jmp = rp; 1194 risc->jmp = rp;
@@ -1221,14 +1196,13 @@ int cx23885_risc_databuffer(struct pci_dev *pci,
1221 return 0; 1196 return 0;
1222} 1197}
1223 1198
1224int cx23885_risc_vbibuffer(struct pci_dev *pci, struct btcx_riscmem *risc, 1199int cx23885_risc_vbibuffer(struct pci_dev *pci, struct cx23885_riscmem *risc,
1225 struct scatterlist *sglist, unsigned int top_offset, 1200 struct scatterlist *sglist, unsigned int top_offset,
1226 unsigned int bottom_offset, unsigned int bpl, 1201 unsigned int bottom_offset, unsigned int bpl,
1227 unsigned int padding, unsigned int lines) 1202 unsigned int padding, unsigned int lines)
1228{ 1203{
1229 u32 instructions, fields; 1204 u32 instructions, fields;
1230 __le32 *rp; 1205 __le32 *rp;
1231 int rc;
1232 1206
1233 fields = 0; 1207 fields = 0;
1234 if (UNSET != top_offset) 1208 if (UNSET != top_offset)
@@ -1243,22 +1217,23 @@ int cx23885_risc_vbibuffer(struct pci_dev *pci, struct btcx_riscmem *risc,
1243 /* write and jump need and extra dword */ 1217 /* write and jump need and extra dword */
1244 instructions = fields * (1 + ((bpl + padding) * lines) 1218 instructions = fields * (1 + ((bpl + padding) * lines)
1245 / PAGE_SIZE + lines); 1219 / PAGE_SIZE + lines);
1246 instructions += 2; 1220 instructions += 5;
1247 rc = btcx_riscmem_alloc(pci, risc, instructions*12); 1221 risc->size = instructions * 12;
1248 if (rc < 0) 1222 risc->cpu = pci_alloc_consistent(pci, risc->size, &risc->dma);
1249 return rc; 1223 if (risc->cpu == NULL)
1224 return -ENOMEM;
1250 /* write risc instructions */ 1225 /* write risc instructions */
1251 rp = risc->cpu; 1226 rp = risc->cpu;
1252 1227
1253 /* Sync to line 6, so US CC line 21 will appear in line '12' 1228 /* Sync to line 6, so US CC line 21 will appear in line '12'
1254 * in the userland vbi payload */ 1229 * in the userland vbi payload */
1255 if (UNSET != top_offset) 1230 if (UNSET != top_offset)
1256 rp = cx23885_risc_field(rp, sglist, top_offset, 6, 1231 rp = cx23885_risc_field(rp, sglist, top_offset, 0,
1257 bpl, padding, lines, 0); 1232 bpl, padding, lines, 0, true);
1258 1233
1259 if (UNSET != bottom_offset) 1234 if (UNSET != bottom_offset)
1260 rp = cx23885_risc_field(rp, sglist, bottom_offset, 0x207, 1235 rp = cx23885_risc_field(rp, sglist, bottom_offset, 0x200,
1261 bpl, padding, lines, 0); 1236 bpl, padding, lines, 0, UNSET == top_offset);
1262 1237
1263 1238
1264 1239
@@ -1269,38 +1244,12 @@ int cx23885_risc_vbibuffer(struct pci_dev *pci, struct btcx_riscmem *risc,
1269} 1244}
1270 1245
1271 1246
1272int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc, 1247void cx23885_free_buffer(struct cx23885_dev *dev, struct cx23885_buffer *buf)
1273 u32 reg, u32 mask, u32 value)
1274{ 1248{
1275 __le32 *rp; 1249 struct cx23885_riscmem *risc = &buf->risc;
1276 int rc;
1277
1278 rc = btcx_riscmem_alloc(pci, risc, 4*16);
1279 if (rc < 0)
1280 return rc;
1281
1282 /* write risc instructions */
1283 rp = risc->cpu;
1284 *(rp++) = cpu_to_le32(RISC_WRITECR | RISC_IRQ2);
1285 *(rp++) = cpu_to_le32(reg);
1286 *(rp++) = cpu_to_le32(value);
1287 *(rp++) = cpu_to_le32(mask);
1288 *(rp++) = cpu_to_le32(RISC_JUMP);
1289 *(rp++) = cpu_to_le32(risc->dma);
1290 *(rp++) = cpu_to_le32(0); /* bits 63-32 */
1291 return 0;
1292}
1293
1294void cx23885_free_buffer(struct videobuf_queue *q, struct cx23885_buffer *buf)
1295{
1296 struct videobuf_dmabuf *dma = videobuf_to_dma(&buf->vb);
1297 1250
1298 BUG_ON(in_interrupt()); 1251 BUG_ON(in_interrupt());
1299 videobuf_waiton(q, &buf->vb, 0, 0); 1252 pci_free_consistent(dev->pci, risc->size, risc->cpu, risc->dma);
1300 videobuf_dma_unmap(q->dev, dma);
1301 videobuf_dma_free(dma);
1302 btcx_riscmem_free(to_pci_dev(q->dev), &buf->risc);
1303 buf->vb.state = VIDEOBUF_NEEDS_INIT;
1304} 1253}
1305 1254
1306static void cx23885_tsport_reg_dump(struct cx23885_tsport *port) 1255static void cx23885_tsport_reg_dump(struct cx23885_tsport *port)
@@ -1355,7 +1304,7 @@ static void cx23885_tsport_reg_dump(struct cx23885_tsport *port)
1355 port->reg_ts_int_msk, cx_read(port->reg_ts_int_msk)); 1304 port->reg_ts_int_msk, cx_read(port->reg_ts_int_msk));
1356} 1305}
1357 1306
1358static int cx23885_start_dma(struct cx23885_tsport *port, 1307int cx23885_start_dma(struct cx23885_tsport *port,
1359 struct cx23885_dmaqueue *q, 1308 struct cx23885_dmaqueue *q,
1360 struct cx23885_buffer *buf) 1309 struct cx23885_buffer *buf)
1361{ 1310{
@@ -1363,7 +1312,7 @@ static int cx23885_start_dma(struct cx23885_tsport *port,
1363 u32 reg; 1312 u32 reg;
1364 1313
1365 dprintk(1, "%s() w: %d, h: %d, f: %d\n", __func__, 1314 dprintk(1, "%s() w: %d, h: %d, f: %d\n", __func__,
1366 buf->vb.width, buf->vb.height, buf->vb.field); 1315 dev->width, dev->height, dev->field);
1367 1316
1368 /* Stop the fifo and risc engine for this port */ 1317 /* Stop the fifo and risc engine for this port */
1369 cx_clear(port->reg_dma_ctl, port->dma_ctl_val); 1318 cx_clear(port->reg_dma_ctl, port->dma_ctl_val);
@@ -1379,7 +1328,7 @@ static int cx23885_start_dma(struct cx23885_tsport *port,
1379 } 1328 }
1380 1329
1381 /* write TS length to chip */ 1330 /* write TS length to chip */
1382 cx_write(port->reg_lngth, buf->vb.width); 1331 cx_write(port->reg_lngth, port->ts_packet_size);
1383 1332
1384 if ((!(cx23885_boards[dev->board].portb & CX23885_MPEG_DVB)) && 1333 if ((!(cx23885_boards[dev->board].portb & CX23885_MPEG_DVB)) &&
1385 (!(cx23885_boards[dev->board].portc & CX23885_MPEG_DVB))) { 1334 (!(cx23885_boards[dev->board].portc & CX23885_MPEG_DVB))) {
@@ -1408,7 +1357,7 @@ static int cx23885_start_dma(struct cx23885_tsport *port,
1408 /* NOTE: this is 2 (reserved) for portb, does it matter? */ 1357 /* NOTE: this is 2 (reserved) for portb, does it matter? */
1409 /* reset counter to zero */ 1358 /* reset counter to zero */
1410 cx_write(port->reg_gpcnt_ctl, 3); 1359 cx_write(port->reg_gpcnt_ctl, 3);
1411 q->count = 1; 1360 q->count = 0;
1412 1361
1413 /* Set VIDB pins to input */ 1362 /* Set VIDB pins to input */
1414 if (cx23885_boards[dev->board].portb == CX23885_MPEG_DVB) { 1363 if (cx23885_boards[dev->board].portb == CX23885_MPEG_DVB) {
@@ -1497,134 +1446,83 @@ static int cx23885_stop_dma(struct cx23885_tsport *port)
1497 return 0; 1446 return 0;
1498} 1447}
1499 1448
1500int cx23885_restart_queue(struct cx23885_tsport *port,
1501 struct cx23885_dmaqueue *q)
1502{
1503 struct cx23885_dev *dev = port->dev;
1504 struct cx23885_buffer *buf;
1505
1506 dprintk(5, "%s()\n", __func__);
1507 if (list_empty(&q->active)) {
1508 struct cx23885_buffer *prev;
1509 prev = NULL;
1510
1511 dprintk(5, "%s() queue is empty\n", __func__);
1512
1513 for (;;) {
1514 if (list_empty(&q->queued))
1515 return 0;
1516 buf = list_entry(q->queued.next, struct cx23885_buffer,
1517 vb.queue);
1518 if (NULL == prev) {
1519 list_move_tail(&buf->vb.queue, &q->active);
1520 cx23885_start_dma(port, q, buf);
1521 buf->vb.state = VIDEOBUF_ACTIVE;
1522 buf->count = q->count++;
1523 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
1524 dprintk(5, "[%p/%d] restart_queue - f/active\n",
1525 buf, buf->vb.i);
1526
1527 } else if (prev->vb.width == buf->vb.width &&
1528 prev->vb.height == buf->vb.height &&
1529 prev->fmt == buf->fmt) {
1530 list_move_tail(&buf->vb.queue, &q->active);
1531 buf->vb.state = VIDEOBUF_ACTIVE;
1532 buf->count = q->count++;
1533 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
1534 /* 64 bit bits 63-32 */
1535 prev->risc.jmp[2] = cpu_to_le32(0);
1536 dprintk(5, "[%p/%d] restart_queue - m/active\n",
1537 buf, buf->vb.i);
1538 } else {
1539 return 0;
1540 }
1541 prev = buf;
1542 }
1543 return 0;
1544 }
1545
1546 buf = list_entry(q->active.next, struct cx23885_buffer, vb.queue);
1547 dprintk(2, "restart_queue [%p/%d]: restart dma\n",
1548 buf, buf->vb.i);
1549 cx23885_start_dma(port, q, buf);
1550 list_for_each_entry(buf, &q->active, vb.queue)
1551 buf->count = q->count++;
1552 mod_timer(&q->timeout, jiffies + BUFFER_TIMEOUT);
1553 return 0;
1554}
1555
1556/* ------------------------------------------------------------------ */ 1449/* ------------------------------------------------------------------ */
1557 1450
1558int cx23885_buf_prepare(struct videobuf_queue *q, struct cx23885_tsport *port, 1451int cx23885_buf_prepare(struct cx23885_buffer *buf, struct cx23885_tsport *port)
1559 struct cx23885_buffer *buf, enum v4l2_field field)
1560{ 1452{
1561 struct cx23885_dev *dev = port->dev; 1453 struct cx23885_dev *dev = port->dev;
1562 int size = port->ts_packet_size * port->ts_packet_count; 1454 int size = port->ts_packet_size * port->ts_packet_count;
1455 struct sg_table *sgt = vb2_dma_sg_plane_desc(&buf->vb, 0);
1563 int rc; 1456 int rc;
1564 1457
1565 dprintk(1, "%s: %p\n", __func__, buf); 1458 dprintk(1, "%s: %p\n", __func__, buf);
1566 if (0 != buf->vb.baddr && buf->vb.bsize < size) 1459 if (vb2_plane_size(&buf->vb, 0) < size)
1567 return -EINVAL; 1460 return -EINVAL;
1461 vb2_set_plane_payload(&buf->vb, 0, size);
1568 1462
1569 if (VIDEOBUF_NEEDS_INIT == buf->vb.state) { 1463 rc = dma_map_sg(&dev->pci->dev, sgt->sgl, sgt->nents, DMA_FROM_DEVICE);
1570 buf->vb.width = port->ts_packet_size; 1464 if (!rc)
1571 buf->vb.height = port->ts_packet_count; 1465 return -EIO;
1572 buf->vb.size = size;
1573 buf->vb.field = field /*V4L2_FIELD_TOP*/;
1574
1575 rc = videobuf_iolock(q, &buf->vb, NULL);
1576 if (0 != rc)
1577 goto fail;
1578 cx23885_risc_databuffer(dev->pci, &buf->risc,
1579 videobuf_to_dma(&buf->vb)->sglist,
1580 buf->vb.width, buf->vb.height, 0);
1581 }
1582 buf->vb.state = VIDEOBUF_PREPARED;
1583 return 0;
1584 1466
1585 fail: 1467 cx23885_risc_databuffer(dev->pci, &buf->risc,
1586 cx23885_free_buffer(q, buf); 1468 sgt->sgl,
1587 return rc; 1469 port->ts_packet_size, port->ts_packet_count, 0);
1470 return 0;
1588} 1471}
1589 1472
1473/*
1474 * The risc program for each buffer works as follows: it starts with a simple
1475 * 'JUMP to addr + 12', which is effectively a NOP. Then the code to DMA the
1476 * buffer follows and at the end we have a JUMP back to the start + 12 (skipping
1477 * the initial JUMP).
1478 *
1479 * This is the risc program of the first buffer to be queued if the active list
1480 * is empty and it just keeps DMAing this buffer without generating any
1481 * interrupts.
1482 *
1483 * If a new buffer is added then the initial JUMP in the code for that buffer
1484 * will generate an interrupt which signals that the previous buffer has been
1485 * DMAed successfully and that it can be returned to userspace.
1486 *
1487 * It also sets the final jump of the previous buffer to the start of the new
1488 * buffer, thus chaining the new buffer into the DMA chain. This is a single
1489 * atomic u32 write, so there is no race condition.
1490 *
1491 * The end-result of all this that you only get an interrupt when a buffer
1492 * is ready, so the control flow is very easy.
1493 */
1590void cx23885_buf_queue(struct cx23885_tsport *port, struct cx23885_buffer *buf) 1494void cx23885_buf_queue(struct cx23885_tsport *port, struct cx23885_buffer *buf)
1591{ 1495{
1592 struct cx23885_buffer *prev; 1496 struct cx23885_buffer *prev;
1593 struct cx23885_dev *dev = port->dev; 1497 struct cx23885_dev *dev = port->dev;
1594 struct cx23885_dmaqueue *cx88q = &port->mpegq; 1498 struct cx23885_dmaqueue *cx88q = &port->mpegq;
1499 unsigned long flags;
1595 1500
1596 /* add jump to stopper */ 1501 buf->risc.cpu[1] = cpu_to_le32(buf->risc.dma + 12);
1597 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC); 1502 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_CNT_INC);
1598 buf->risc.jmp[1] = cpu_to_le32(cx88q->stopper.dma); 1503 buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma + 12);
1599 buf->risc.jmp[2] = cpu_to_le32(0); /* bits 63-32 */ 1504 buf->risc.jmp[2] = cpu_to_le32(0); /* bits 63-32 */
1600 1505
1506 spin_lock_irqsave(&dev->slock, flags);
1601 if (list_empty(&cx88q->active)) { 1507 if (list_empty(&cx88q->active)) {
1602 dprintk(1, "queue is empty - first active\n"); 1508 list_add_tail(&buf->queue, &cx88q->active);
1603 list_add_tail(&buf->vb.queue, &cx88q->active);
1604 cx23885_start_dma(port, cx88q, buf);
1605 buf->vb.state = VIDEOBUF_ACTIVE;
1606 buf->count = cx88q->count++;
1607 mod_timer(&cx88q->timeout, jiffies + BUFFER_TIMEOUT);
1608 dprintk(1, "[%p/%d] %s - first active\n", 1509 dprintk(1, "[%p/%d] %s - first active\n",
1609 buf, buf->vb.i, __func__); 1510 buf, buf->vb.v4l2_buf.index, __func__);
1610 } else { 1511 } else {
1611 dprintk(1, "queue is not empty - append to active\n"); 1512 buf->risc.cpu[0] |= cpu_to_le32(RISC_IRQ1);
1612 prev = list_entry(cx88q->active.prev, struct cx23885_buffer, 1513 prev = list_entry(cx88q->active.prev, struct cx23885_buffer,
1613 vb.queue); 1514 queue);
1614 list_add_tail(&buf->vb.queue, &cx88q->active); 1515 list_add_tail(&buf->queue, &cx88q->active);
1615 buf->vb.state = VIDEOBUF_ACTIVE;
1616 buf->count = cx88q->count++;
1617 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma); 1516 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
1618 prev->risc.jmp[2] = cpu_to_le32(0); /* 64 bit bits 63-32 */
1619 dprintk(1, "[%p/%d] %s - append to active\n", 1517 dprintk(1, "[%p/%d] %s - append to active\n",
1620 buf, buf->vb.i, __func__); 1518 buf, buf->vb.v4l2_buf.index, __func__);
1621 } 1519 }
1520 spin_unlock_irqrestore(&dev->slock, flags);
1622} 1521}
1623 1522
1624/* ----------------------------------------------------------- */ 1523/* ----------------------------------------------------------- */
1625 1524
1626static void do_cancel_buffers(struct cx23885_tsport *port, char *reason, 1525static void do_cancel_buffers(struct cx23885_tsport *port, char *reason)
1627 int restart)
1628{ 1526{
1629 struct cx23885_dev *dev = port->dev; 1527 struct cx23885_dev *dev = port->dev;
1630 struct cx23885_dmaqueue *q = &port->mpegq; 1528 struct cx23885_dmaqueue *q = &port->mpegq;
@@ -1634,16 +1532,11 @@ static void do_cancel_buffers(struct cx23885_tsport *port, char *reason,
1634 spin_lock_irqsave(&port->slock, flags); 1532 spin_lock_irqsave(&port->slock, flags);
1635 while (!list_empty(&q->active)) { 1533 while (!list_empty(&q->active)) {
1636 buf = list_entry(q->active.next, struct cx23885_buffer, 1534 buf = list_entry(q->active.next, struct cx23885_buffer,
1637 vb.queue); 1535 queue);
1638 list_del(&buf->vb.queue); 1536 list_del(&buf->queue);
1639 buf->vb.state = VIDEOBUF_ERROR; 1537 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
1640 wake_up(&buf->vb.done);
1641 dprintk(1, "[%p/%d] %s - dma=0x%08lx\n", 1538 dprintk(1, "[%p/%d] %s - dma=0x%08lx\n",
1642 buf, buf->vb.i, reason, (unsigned long)buf->risc.dma); 1539 buf, buf->vb.v4l2_buf.index, reason, (unsigned long)buf->risc.dma);
1643 }
1644 if (restart) {
1645 dprintk(1, "restarting queue\n");
1646 cx23885_restart_queue(port, q);
1647 } 1540 }
1648 spin_unlock_irqrestore(&port->slock, flags); 1541 spin_unlock_irqrestore(&port->slock, flags);
1649} 1542}
@@ -1651,27 +1544,10 @@ static void do_cancel_buffers(struct cx23885_tsport *port, char *reason,
1651void cx23885_cancel_buffers(struct cx23885_tsport *port) 1544void cx23885_cancel_buffers(struct cx23885_tsport *port)
1652{ 1545{
1653 struct cx23885_dev *dev = port->dev; 1546 struct cx23885_dev *dev = port->dev;
1654 struct cx23885_dmaqueue *q = &port->mpegq;
1655
1656 dprintk(1, "%s()\n", __func__);
1657 del_timer_sync(&q->timeout);
1658 cx23885_stop_dma(port);
1659 do_cancel_buffers(port, "cancel", 0);
1660}
1661
1662static void cx23885_timeout(unsigned long data)
1663{
1664 struct cx23885_tsport *port = (struct cx23885_tsport *)data;
1665 struct cx23885_dev *dev = port->dev;
1666 1547
1667 dprintk(1, "%s()\n", __func__); 1548 dprintk(1, "%s()\n", __func__);
1668
1669 if (debug > 5)
1670 cx23885_sram_channel_dump(dev,
1671 &dev->sram_channels[port->sram_chno]);
1672
1673 cx23885_stop_dma(port); 1549 cx23885_stop_dma(port);
1674 do_cancel_buffers(port, "timeout", 1); 1550 do_cancel_buffers(port, "cancel");
1675} 1551}
1676 1552
1677int cx23885_irq_417(struct cx23885_dev *dev, u32 status) 1553int cx23885_irq_417(struct cx23885_dev *dev, u32 status)
@@ -1721,11 +1597,6 @@ int cx23885_irq_417(struct cx23885_dev *dev, u32 status)
1721 spin_lock(&port->slock); 1597 spin_lock(&port->slock);
1722 cx23885_wakeup(port, &port->mpegq, count); 1598 cx23885_wakeup(port, &port->mpegq, count);
1723 spin_unlock(&port->slock); 1599 spin_unlock(&port->slock);
1724 } else if (status & VID_B_MSK_RISCI2) {
1725 dprintk(7, " VID_B_MSK_RISCI2\n");
1726 spin_lock(&port->slock);
1727 cx23885_restart_queue(port, &port->mpegq);
1728 spin_unlock(&port->slock);
1729 } 1600 }
1730 if (status) { 1601 if (status) {
1731 cx_write(port->reg_ts_int_stat, status); 1602 cx_write(port->reg_ts_int_stat, status);
@@ -1777,14 +1648,6 @@ static int cx23885_irq_ts(struct cx23885_tsport *port, u32 status)
1777 cx23885_wakeup(port, &port->mpegq, count); 1648 cx23885_wakeup(port, &port->mpegq, count);
1778 spin_unlock(&port->slock); 1649 spin_unlock(&port->slock);
1779 1650
1780 } else if (status & VID_BC_MSK_RISCI2) {
1781
1782 dprintk(7, " (RISCI2 0x%08x)\n", VID_BC_MSK_RISCI2);
1783
1784 spin_lock(&port->slock);
1785 cx23885_restart_queue(port, &port->mpegq);
1786 spin_unlock(&port->slock);
1787
1788 } 1651 }
1789 if (status) { 1652 if (status) {
1790 cx_write(port->reg_ts_int_stat, status); 1653 cx_write(port->reg_ts_int_stat, status);
@@ -2087,6 +1950,7 @@ static int cx23885_initdev(struct pci_dev *pci_dev,
2087 const struct pci_device_id *pci_id) 1950 const struct pci_device_id *pci_id)
2088{ 1951{
2089 struct cx23885_dev *dev; 1952 struct cx23885_dev *dev;
1953 struct v4l2_ctrl_handler *hdl;
2090 int err; 1954 int err;
2091 1955
2092 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 1956 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
@@ -2097,6 +1961,14 @@ static int cx23885_initdev(struct pci_dev *pci_dev,
2097 if (err < 0) 1961 if (err < 0)
2098 goto fail_free; 1962 goto fail_free;
2099 1963
1964 hdl = &dev->ctrl_handler;
1965 v4l2_ctrl_handler_init(hdl, 6);
1966 if (hdl->error) {
1967 err = hdl->error;
1968 goto fail_ctrl;
1969 }
1970 dev->v4l2_dev.ctrl_handler = hdl;
1971
2100 /* Prepare to handle notifications from subdevices */ 1972 /* Prepare to handle notifications from subdevices */
2101 cx23885_v4l2_dev_notify_init(dev); 1973 cx23885_v4l2_dev_notify_init(dev);
2102 1974
@@ -2104,12 +1976,12 @@ static int cx23885_initdev(struct pci_dev *pci_dev,
2104 dev->pci = pci_dev; 1976 dev->pci = pci_dev;
2105 if (pci_enable_device(pci_dev)) { 1977 if (pci_enable_device(pci_dev)) {
2106 err = -EIO; 1978 err = -EIO;
2107 goto fail_unreg; 1979 goto fail_ctrl;
2108 } 1980 }
2109 1981
2110 if (cx23885_dev_setup(dev) < 0) { 1982 if (cx23885_dev_setup(dev) < 0) {
2111 err = -EINVAL; 1983 err = -EINVAL;
2112 goto fail_unreg; 1984 goto fail_ctrl;
2113 } 1985 }
2114 1986
2115 /* print pci info */ 1987 /* print pci info */
@@ -2157,7 +2029,8 @@ static int cx23885_initdev(struct pci_dev *pci_dev,
2157 2029
2158fail_irq: 2030fail_irq:
2159 cx23885_dev_unregister(dev); 2031 cx23885_dev_unregister(dev);
2160fail_unreg: 2032fail_ctrl:
2033 v4l2_ctrl_handler_free(hdl);
2161 v4l2_device_unregister(&dev->v4l2_dev); 2034 v4l2_device_unregister(&dev->v4l2_dev);
2162fail_free: 2035fail_free:
2163 kfree(dev); 2036 kfree(dev);
@@ -2180,6 +2053,7 @@ static void cx23885_finidev(struct pci_dev *pci_dev)
2180 free_irq(pci_dev->irq, dev); 2053 free_irq(pci_dev->irq, dev);
2181 2054
2182 cx23885_dev_unregister(dev); 2055 cx23885_dev_unregister(dev);
2056 v4l2_ctrl_handler_free(&dev->ctrl_handler);
2183 v4l2_device_unregister(v4l2_dev); 2057 v4l2_device_unregister(v4l2_dev);
2184 kfree(dev); 2058 kfree(dev);
2185} 2059}
diff --git a/drivers/media/pci/cx23885/cx23885-dvb.c b/drivers/media/pci/cx23885/cx23885-dvb.c
index 968fecc32f9c..13734b8c7917 100644
--- a/drivers/media/pci/cx23885/cx23885-dvb.c
+++ b/drivers/media/pci/cx23885/cx23885-dvb.c
@@ -13,10 +13,6 @@
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * 14 *
15 * GNU General Public License for more details. 15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */ 16 */
21 17
22#include <linux/module.h> 18#include <linux/module.h>
@@ -73,6 +69,10 @@
73#include "a8293.h" 69#include "a8293.h"
74#include "mb86a20s.h" 70#include "mb86a20s.h"
75#include "si2165.h" 71#include "si2165.h"
72#include "si2168.h"
73#include "si2157.h"
74#include "m88ds3103.h"
75#include "m88ts2022.h"
76 76
77static unsigned int debug; 77static unsigned int debug;
78 78
@@ -91,59 +91,95 @@ DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
91 91
92/* ------------------------------------------------------------------ */ 92/* ------------------------------------------------------------------ */
93 93
94static int dvb_buf_setup(struct videobuf_queue *q, 94static int queue_setup(struct vb2_queue *q, const struct v4l2_format *fmt,
95 unsigned int *count, unsigned int *size) 95 unsigned int *num_buffers, unsigned int *num_planes,
96 unsigned int sizes[], void *alloc_ctxs[])
96{ 97{
97 struct cx23885_tsport *port = q->priv_data; 98 struct cx23885_tsport *port = q->drv_priv;
98 99
99 port->ts_packet_size = 188 * 4; 100 port->ts_packet_size = 188 * 4;
100 port->ts_packet_count = 32; 101 port->ts_packet_count = 32;
101 102 *num_planes = 1;
102 *size = port->ts_packet_size * port->ts_packet_count; 103 sizes[0] = port->ts_packet_size * port->ts_packet_count;
103 *count = 32; 104 *num_buffers = 32;
104 return 0; 105 return 0;
105} 106}
106 107
107static int dvb_buf_prepare(struct videobuf_queue *q, 108
108 struct videobuf_buffer *vb, enum v4l2_field field) 109static int buffer_prepare(struct vb2_buffer *vb)
109{ 110{
110 struct cx23885_tsport *port = q->priv_data; 111 struct cx23885_tsport *port = vb->vb2_queue->drv_priv;
111 return cx23885_buf_prepare(q, port, (struct cx23885_buffer *)vb, field); 112 struct cx23885_buffer *buf =
113 container_of(vb, struct cx23885_buffer, vb);
114
115 return cx23885_buf_prepare(buf, port);
112} 116}
113 117
114static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb) 118static void buffer_finish(struct vb2_buffer *vb)
115{ 119{
116 struct cx23885_tsport *port = q->priv_data; 120 struct cx23885_tsport *port = vb->vb2_queue->drv_priv;
117 cx23885_buf_queue(port, (struct cx23885_buffer *)vb); 121 struct cx23885_dev *dev = port->dev;
122 struct cx23885_buffer *buf = container_of(vb,
123 struct cx23885_buffer, vb);
124 struct sg_table *sgt = vb2_dma_sg_plane_desc(vb, 0);
125
126 cx23885_free_buffer(dev, buf);
127
128 dma_unmap_sg(&dev->pci->dev, sgt->sgl, sgt->nents, DMA_FROM_DEVICE);
118} 129}
119 130
120static void dvb_buf_release(struct videobuf_queue *q, 131static void buffer_queue(struct vb2_buffer *vb)
121 struct videobuf_buffer *vb)
122{ 132{
123 cx23885_free_buffer(q, (struct cx23885_buffer *)vb); 133 struct cx23885_tsport *port = vb->vb2_queue->drv_priv;
134 struct cx23885_buffer *buf = container_of(vb,
135 struct cx23885_buffer, vb);
136
137 cx23885_buf_queue(port, buf);
124} 138}
125 139
126static void cx23885_dvb_gate_ctrl(struct cx23885_tsport *port, int open) 140static void cx23885_dvb_gate_ctrl(struct cx23885_tsport *port, int open)
127{ 141{
128 struct videobuf_dvb_frontends *f; 142 struct vb2_dvb_frontends *f;
129 struct videobuf_dvb_frontend *fe; 143 struct vb2_dvb_frontend *fe;
130 144
131 f = &port->frontends; 145 f = &port->frontends;
132 146
133 if (f->gate <= 1) /* undefined or fe0 */ 147 if (f->gate <= 1) /* undefined or fe0 */
134 fe = videobuf_dvb_get_frontend(f, 1); 148 fe = vb2_dvb_get_frontend(f, 1);
135 else 149 else
136 fe = videobuf_dvb_get_frontend(f, f->gate); 150 fe = vb2_dvb_get_frontend(f, f->gate);
137 151
138 if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl) 152 if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
139 fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open); 153 fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
140} 154}
141 155
142static struct videobuf_queue_ops dvb_qops = { 156static int cx23885_start_streaming(struct vb2_queue *q, unsigned int count)
143 .buf_setup = dvb_buf_setup, 157{
144 .buf_prepare = dvb_buf_prepare, 158 struct cx23885_tsport *port = q->drv_priv;
145 .buf_queue = dvb_buf_queue, 159 struct cx23885_dmaqueue *dmaq = &port->mpegq;
146 .buf_release = dvb_buf_release, 160 struct cx23885_buffer *buf = list_entry(dmaq->active.next,
161 struct cx23885_buffer, queue);
162
163 cx23885_start_dma(port, dmaq, buf);
164 return 0;
165}
166
167static void cx23885_stop_streaming(struct vb2_queue *q)
168{
169 struct cx23885_tsport *port = q->drv_priv;
170
171 cx23885_cancel_buffers(port);
172}
173
174static struct vb2_ops dvb_qops = {
175 .queue_setup = queue_setup,
176 .buf_prepare = buffer_prepare,
177 .buf_finish = buffer_finish,
178 .buf_queue = buffer_queue,
179 .wait_prepare = vb2_ops_wait_prepare,
180 .wait_finish = vb2_ops_wait_finish,
181 .start_streaming = cx23885_start_streaming,
182 .stop_streaming = cx23885_stop_streaming,
147}; 183};
148 184
149static struct s5h1409_config hauppauge_generic_config = { 185static struct s5h1409_config hauppauge_generic_config = {
@@ -551,6 +587,35 @@ static int p8000_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
551 return 0; 587 return 0;
552} 588}
553 589
590static int dvbsky_t9580_set_voltage(struct dvb_frontend *fe,
591 fe_sec_voltage_t voltage)
592{
593 struct cx23885_tsport *port = fe->dvb->priv;
594 struct cx23885_dev *dev = port->dev;
595
596 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
597
598 switch (voltage) {
599 case SEC_VOLTAGE_13:
600 cx23885_gpio_set(dev, GPIO_1);
601 cx23885_gpio_clear(dev, GPIO_0);
602 break;
603 case SEC_VOLTAGE_18:
604 cx23885_gpio_set(dev, GPIO_1);
605 cx23885_gpio_set(dev, GPIO_0);
606 break;
607 case SEC_VOLTAGE_OFF:
608 cx23885_gpio_clear(dev, GPIO_1);
609 cx23885_gpio_clear(dev, GPIO_0);
610 break;
611 }
612
613 /* call the frontend set_voltage function */
614 port->fe_set_voltage(fe, voltage);
615
616 return 0;
617}
618
554static int cx23885_dvb_set_frontend(struct dvb_frontend *fe) 619static int cx23885_dvb_set_frontend(struct dvb_frontend *fe)
555{ 620{
556 struct dtv_frontend_properties *p = &fe->dtv_property_cache; 621 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
@@ -715,6 +780,19 @@ static const struct si2165_config hauppauge_hvr4400_si2165_config = {
715 .ref_freq_Hz = 16000000, 780 .ref_freq_Hz = 16000000,
716}; 781};
717 782
783static const struct m88ds3103_config dvbsky_t9580_m88ds3103_config = {
784 .i2c_addr = 0x68,
785 .clock = 27000000,
786 .i2c_wr_max = 33,
787 .clock_out = 0,
788 .ts_mode = M88DS3103_TS_PARALLEL,
789 .ts_clk = 16000,
790 .ts_clk_pol = 1,
791 .lnb_en_pol = 1,
792 .lnb_hv_pol = 0,
793 .agc = 0x99,
794};
795
718static int netup_altera_fpga_rw(void *device, int flag, int data, int read) 796static int netup_altera_fpga_rw(void *device, int flag, int data, int read)
719{ 797{
720 struct cx23885_dev *dev = (struct cx23885_dev *)device; 798 struct cx23885_dev *dev = (struct cx23885_dev *)device;
@@ -863,16 +941,23 @@ static int dvb_register(struct cx23885_tsport *port)
863 struct dib7000p_ops dib7000p_ops; 941 struct dib7000p_ops dib7000p_ops;
864 struct cx23885_dev *dev = port->dev; 942 struct cx23885_dev *dev = port->dev;
865 struct cx23885_i2c *i2c_bus = NULL, *i2c_bus2 = NULL; 943 struct cx23885_i2c *i2c_bus = NULL, *i2c_bus2 = NULL;
866 struct videobuf_dvb_frontend *fe0, *fe1 = NULL; 944 struct vb2_dvb_frontend *fe0, *fe1 = NULL;
945 struct si2168_config si2168_config;
946 struct si2157_config si2157_config;
947 struct m88ts2022_config m88ts2022_config;
948 struct i2c_board_info info;
949 struct i2c_adapter *adapter;
950 struct i2c_client *client_demod;
951 struct i2c_client *client_tuner;
867 int mfe_shared = 0; /* bus not shared by default */ 952 int mfe_shared = 0; /* bus not shared by default */
868 int ret; 953 int ret;
869 954
870 /* Get the first frontend */ 955 /* Get the first frontend */
871 fe0 = videobuf_dvb_get_frontend(&port->frontends, 1); 956 fe0 = vb2_dvb_get_frontend(&port->frontends, 1);
872 if (!fe0) 957 if (!fe0)
873 return -EINVAL; 958 return -EINVAL;
874 959
875 /* init struct videobuf_dvb */ 960 /* init struct vb2_dvb */
876 fe0->dvb.name = dev->name; 961 fe0->dvb.name = dev->name;
877 962
878 /* multi-frontend gate control is undefined or defaults to fe0 */ 963 /* multi-frontend gate control is undefined or defaults to fe0 */
@@ -1392,7 +1477,7 @@ static int dvb_register(struct cx23885_tsport *port)
1392 fe0->dvb.frontend->ops.tuner_ops.init(fe0->dvb.frontend); 1477 fe0->dvb.frontend->ops.tuner_ops.init(fe0->dvb.frontend);
1393 } 1478 }
1394 /* MFE frontend 2 */ 1479 /* MFE frontend 2 */
1395 fe1 = videobuf_dvb_get_frontend(&port->frontends, 2); 1480 fe1 = vb2_dvb_get_frontend(&port->frontends, 2);
1396 if (fe1 == NULL) 1481 if (fe1 == NULL)
1397 goto frontend_detach; 1482 goto frontend_detach;
1398 /* DVB-C init */ 1483 /* DVB-C init */
@@ -1491,7 +1576,7 @@ static int dvb_register(struct cx23885_tsport *port)
1491 &hauppauge_hvr4400_si2165_config, 1576 &hauppauge_hvr4400_si2165_config,
1492 &i2c_bus->i2c_adap); 1577 &i2c_bus->i2c_adap);
1493 if (fe0->dvb.frontend != NULL) { 1578 if (fe0->dvb.frontend != NULL) {
1494 fe0->dvb.frontend->ops.i2c_gate_ctrl = 0; 1579 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1495 if (!dvb_attach(tda18271_attach, 1580 if (!dvb_attach(tda18271_attach,
1496 fe0->dvb.frontend, 1581 fe0->dvb.frontend,
1497 0x60, &i2c_bus2->i2c_adap, 1582 0x60, &i2c_bus2->i2c_adap,
@@ -1501,6 +1586,97 @@ static int dvb_register(struct cx23885_tsport *port)
1501 break; 1586 break;
1502 } 1587 }
1503 break; 1588 break;
1589 case CX23885_BOARD_DVBSKY_T9580:
1590 i2c_bus = &dev->i2c_bus[0];
1591 i2c_bus2 = &dev->i2c_bus[1];
1592 switch (port->nr) {
1593 /* port b - satellite */
1594 case 1:
1595 /* attach frontend */
1596 fe0->dvb.frontend = dvb_attach(m88ds3103_attach,
1597 &dvbsky_t9580_m88ds3103_config,
1598 &i2c_bus2->i2c_adap, &adapter);
1599 if (fe0->dvb.frontend == NULL)
1600 break;
1601
1602 /* attach tuner */
1603 m88ts2022_config.fe = fe0->dvb.frontend;
1604 m88ts2022_config.clock = 27000000;
1605 memset(&info, 0, sizeof(struct i2c_board_info));
1606 strlcpy(info.type, "m88ts2022", I2C_NAME_SIZE);
1607 info.addr = 0x60;
1608 info.platform_data = &m88ts2022_config;
1609 request_module(info.type);
1610 client_tuner = i2c_new_device(adapter, &info);
1611 if (client_tuner == NULL ||
1612 client_tuner->dev.driver == NULL)
1613 goto frontend_detach;
1614 if (!try_module_get(client_tuner->dev.driver->owner)) {
1615 i2c_unregister_device(client_tuner);
1616 goto frontend_detach;
1617 }
1618
1619 /* delegate signal strength measurement to tuner */
1620 fe0->dvb.frontend->ops.read_signal_strength =
1621 fe0->dvb.frontend->ops.tuner_ops.get_rf_strength;
1622
1623 /*
1624 * for setting the voltage we need to set GPIOs on
1625 * the card.
1626 */
1627 port->fe_set_voltage =
1628 fe0->dvb.frontend->ops.set_voltage;
1629 fe0->dvb.frontend->ops.set_voltage =
1630 dvbsky_t9580_set_voltage;
1631
1632 port->i2c_client_tuner = client_tuner;
1633
1634 break;
1635 /* port c - terrestrial/cable */
1636 case 2:
1637 /* attach frontend */
1638 si2168_config.i2c_adapter = &adapter;
1639 si2168_config.fe = &fe0->dvb.frontend;
1640 si2168_config.ts_mode = SI2168_TS_SERIAL;
1641 memset(&info, 0, sizeof(struct i2c_board_info));
1642 strlcpy(info.type, "si2168", I2C_NAME_SIZE);
1643 info.addr = 0x64;
1644 info.platform_data = &si2168_config;
1645 request_module(info.type);
1646 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info);
1647 if (client_demod == NULL ||
1648 client_demod->dev.driver == NULL)
1649 goto frontend_detach;
1650 if (!try_module_get(client_demod->dev.driver->owner)) {
1651 i2c_unregister_device(client_demod);
1652 goto frontend_detach;
1653 }
1654 port->i2c_client_demod = client_demod;
1655
1656 /* attach tuner */
1657 si2157_config.fe = fe0->dvb.frontend;
1658 memset(&info, 0, sizeof(struct i2c_board_info));
1659 strlcpy(info.type, "si2157", I2C_NAME_SIZE);
1660 info.addr = 0x60;
1661 info.platform_data = &si2157_config;
1662 request_module(info.type);
1663 client_tuner = i2c_new_device(adapter, &info);
1664 if (client_tuner == NULL ||
1665 client_tuner->dev.driver == NULL) {
1666 module_put(client_demod->dev.driver->owner);
1667 i2c_unregister_device(client_demod);
1668 goto frontend_detach;
1669 }
1670 if (!try_module_get(client_tuner->dev.driver->owner)) {
1671 i2c_unregister_device(client_tuner);
1672 module_put(client_demod->dev.driver->owner);
1673 i2c_unregister_device(client_demod);
1674 goto frontend_detach;
1675 }
1676 port->i2c_client_tuner = client_tuner;
1677 break;
1678 }
1679 break;
1504 default: 1680 default:
1505 printk(KERN_INFO "%s: The frontend of your DVB/ATSC card " 1681 printk(KERN_INFO "%s: The frontend of your DVB/ATSC card "
1506 " isn't supported yet\n", 1682 " isn't supported yet\n",
@@ -1532,7 +1708,7 @@ static int dvb_register(struct cx23885_tsport *port)
1532 fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend); 1708 fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend);
1533 1709
1534 /* register everything */ 1710 /* register everything */
1535 ret = videobuf_dvb_register_bus(&port->frontends, THIS_MODULE, port, 1711 ret = vb2_dvb_register_bus(&port->frontends, THIS_MODULE, port,
1536 &dev->pci->dev, adapter_nr, mfe_shared); 1712 &dev->pci->dev, adapter_nr, mfe_shared);
1537 if (ret) 1713 if (ret)
1538 goto frontend_detach; 1714 goto frontend_detach;
@@ -1575,20 +1751,36 @@ static int dvb_register(struct cx23885_tsport *port)
1575 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xa0, 6); 1751 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xa0, 6);
1576 break; 1752 break;
1577 } 1753 }
1754 case CX23885_BOARD_DVBSKY_T9580: {
1755 u8 eeprom[256]; /* 24C02 i2c eeprom */
1756
1757 if (port->nr > 2)
1758 break;
1759
1760 /* Read entire EEPROM */
1761 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1762 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom,
1763 sizeof(eeprom));
1764 printk(KERN_INFO "DVBSky T9580 port %d MAC address: %pM\n",
1765 port->nr, eeprom + 0xc0 + (port->nr-1) * 8);
1766 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xc0 +
1767 (port->nr-1) * 8, 6);
1768 break;
1769 }
1578 } 1770 }
1579 1771
1580 return ret; 1772 return ret;
1581 1773
1582frontend_detach: 1774frontend_detach:
1583 port->gate_ctrl = NULL; 1775 port->gate_ctrl = NULL;
1584 videobuf_dvb_dealloc_frontends(&port->frontends); 1776 vb2_dvb_dealloc_frontends(&port->frontends);
1585 return -EINVAL; 1777 return -EINVAL;
1586} 1778}
1587 1779
1588int cx23885_dvb_register(struct cx23885_tsport *port) 1780int cx23885_dvb_register(struct cx23885_tsport *port)
1589{ 1781{
1590 1782
1591 struct videobuf_dvb_frontend *fe0; 1783 struct vb2_dvb_frontend *fe0;
1592 struct cx23885_dev *dev = port->dev; 1784 struct cx23885_dev *dev = port->dev;
1593 int err, i; 1785 int err, i;
1594 1786
@@ -1605,13 +1797,15 @@ int cx23885_dvb_register(struct cx23885_tsport *port)
1605 port->num_frontends); 1797 port->num_frontends);
1606 1798
1607 for (i = 1; i <= port->num_frontends; i++) { 1799 for (i = 1; i <= port->num_frontends; i++) {
1608 if (videobuf_dvb_alloc_frontend( 1800 struct vb2_queue *q;
1801
1802 if (vb2_dvb_alloc_frontend(
1609 &port->frontends, i) == NULL) { 1803 &port->frontends, i) == NULL) {
1610 printk(KERN_ERR "%s() failed to alloc\n", __func__); 1804 printk(KERN_ERR "%s() failed to alloc\n", __func__);
1611 return -ENOMEM; 1805 return -ENOMEM;
1612 } 1806 }
1613 1807
1614 fe0 = videobuf_dvb_get_frontend(&port->frontends, i); 1808 fe0 = vb2_dvb_get_frontend(&port->frontends, i);
1615 if (!fe0) 1809 if (!fe0)
1616 err = -EINVAL; 1810 err = -EINVAL;
1617 1811
@@ -1627,10 +1821,21 @@ int cx23885_dvb_register(struct cx23885_tsport *port)
1627 /* dvb stuff */ 1821 /* dvb stuff */
1628 /* We have to init the queue for each frontend on a port. */ 1822 /* We have to init the queue for each frontend on a port. */
1629 printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name); 1823 printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name);
1630 videobuf_queue_sg_init(&fe0->dvb.dvbq, &dvb_qops, 1824 q = &fe0->dvb.dvbq;
1631 &dev->pci->dev, &port->slock, 1825 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1632 V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_TOP, 1826 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1633 sizeof(struct cx23885_buffer), port, NULL); 1827 q->gfp_flags = GFP_DMA32;
1828 q->min_buffers_needed = 2;
1829 q->drv_priv = port;
1830 q->buf_struct_size = sizeof(struct cx23885_buffer);
1831 q->ops = &dvb_qops;
1832 q->mem_ops = &vb2_dma_sg_memops;
1833 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1834 q->lock = &dev->lock;
1835
1836 err = vb2_queue_init(q);
1837 if (err < 0)
1838 return err;
1634 } 1839 }
1635 err = dvb_register(port); 1840 err = dvb_register(port);
1636 if (err != 0) 1841 if (err != 0)
@@ -1642,18 +1847,27 @@ int cx23885_dvb_register(struct cx23885_tsport *port)
1642 1847
1643int cx23885_dvb_unregister(struct cx23885_tsport *port) 1848int cx23885_dvb_unregister(struct cx23885_tsport *port)
1644{ 1849{
1645 struct videobuf_dvb_frontend *fe0; 1850 struct vb2_dvb_frontend *fe0;
1646 1851 struct i2c_client *client;
1647 /* FIXME: in an error condition where the we have 1852
1648 * an expected number of frontends (attach problem) 1853 /* remove I2C client for tuner */
1649 * then this might not clean up correctly, if 1 1854 client = port->i2c_client_tuner;
1650 * is invalid. 1855 if (client) {
1651 * This comment only applies to future boards IF they 1856 module_put(client->dev.driver->owner);
1652 * implement MFE support. 1857 i2c_unregister_device(client);
1653 */ 1858 }
1654 fe0 = videobuf_dvb_get_frontend(&port->frontends, 1); 1859
1860 /* remove I2C client for demodulator */
1861 client = port->i2c_client_demod;
1862 if (client) {
1863 module_put(client->dev.driver->owner);
1864 i2c_unregister_device(client);
1865 }
1866
1867 fe0 = vb2_dvb_get_frontend(&port->frontends, 1);
1868
1655 if (fe0 && fe0->dvb.frontend) 1869 if (fe0 && fe0->dvb.frontend)
1656 videobuf_dvb_unregister_bus(&port->frontends); 1870 vb2_dvb_unregister_bus(&port->frontends);
1657 1871
1658 switch (port->dev->board) { 1872 switch (port->dev->board) {
1659 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: 1873 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
@@ -1668,4 +1882,3 @@ int cx23885_dvb_unregister(struct cx23885_tsport *port)
1668 1882
1669 return 0; 1883 return 0;
1670} 1884}
1671
diff --git a/drivers/media/pci/cx23885/cx23885-f300.c b/drivers/media/pci/cx23885/cx23885-f300.c
index 5444cc526008..6f817d8732da 100644
--- a/drivers/media/pci/cx23885/cx23885-f300.c
+++ b/drivers/media/pci/cx23885/cx23885-f300.c
@@ -22,10 +22,6 @@
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * 23 *
24 * GNU General Public License for more details. 24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
29 */ 25 */
30 26
31#include "cx23885.h" 27#include "cx23885.h"
diff --git a/drivers/media/pci/cx23885/cx23885-i2c.c b/drivers/media/pci/cx23885/cx23885-i2c.c
index 4887314339cb..fd71306af6e2 100644
--- a/drivers/media/pci/cx23885/cx23885-i2c.c
+++ b/drivers/media/pci/cx23885/cx23885-i2c.c
@@ -13,10 +13,6 @@
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * 14 *
15 * GNU General Public License for more details. 15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */ 16 */
21 17
22#include <linux/module.h> 18#include <linux/module.h>
@@ -386,11 +382,3 @@ void cx23885_av_clk(struct cx23885_dev *dev, int enable)
386 382
387 i2c_xfer(&dev->i2c_bus[2].i2c_adap, &msg, 1); 383 i2c_xfer(&dev->i2c_bus[2].i2c_adap, &msg, 1);
388} 384}
389
390/* ----------------------------------------------------------------------- */
391
392/*
393 * Local variables:
394 * c-basic-offset: 8
395 * End:
396 */
diff --git a/drivers/media/pci/cx23885/cx23885-input.c b/drivers/media/pci/cx23885/cx23885-input.c
index 1940c18e186c..9d37fe661691 100644
--- a/drivers/media/pci/cx23885/cx23885-input.c
+++ b/drivers/media/pci/cx23885/cx23885-input.c
@@ -28,11 +28,6 @@
28 * but WITHOUT ANY WARRANTY; without even the implied warranty of 28 * but WITHOUT ANY WARRANTY; without even the implied warranty of
29 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 29 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
30 * GNU General Public License for more details. 30 * GNU General Public License for more details.
31 *
32 * You should have received a copy of the GNU General Public License
33 * along with this program; if not, write to the Free Software
34 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
35 * 02110-1301, USA.
36 */ 31 */
37 32
38#include <linux/slab.h> 33#include <linux/slab.h>
diff --git a/drivers/media/pci/cx23885/cx23885-input.h b/drivers/media/pci/cx23885/cx23885-input.h
index 87dc44e69977..6199c7e86e83 100644
--- a/drivers/media/pci/cx23885/cx23885-input.h
+++ b/drivers/media/pci/cx23885/cx23885-input.h
@@ -14,11 +14,6 @@
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details. 16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
21 * 02110-1301, USA.
22 */ 17 */
23 18
24#ifndef _CX23885_INPUT_H_ 19#ifndef _CX23885_INPUT_H_
diff --git a/drivers/media/pci/cx23885/cx23885-ioctl.c b/drivers/media/pci/cx23885/cx23885-ioctl.c
index 271d69d1ca8c..d2cdd40f79f5 100644
--- a/drivers/media/pci/cx23885/cx23885-ioctl.c
+++ b/drivers/media/pci/cx23885/cx23885-ioctl.c
@@ -15,10 +15,6 @@
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * 16 *
17 * GNU General Public License for more details. 17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */ 18 */
23 19
24#include "cx23885.h" 20#include "cx23885.h"
@@ -28,7 +24,7 @@
28int cx23885_g_chip_info(struct file *file, void *fh, 24int cx23885_g_chip_info(struct file *file, void *fh,
29 struct v4l2_dbg_chip_info *chip) 25 struct v4l2_dbg_chip_info *chip)
30{ 26{
31 struct cx23885_dev *dev = ((struct cx23885_fh *)fh)->dev; 27 struct cx23885_dev *dev = video_drvdata(file);
32 28
33 if (chip->match.addr > 1) 29 if (chip->match.addr > 1)
34 return -EINVAL; 30 return -EINVAL;
@@ -64,7 +60,7 @@ static int cx23417_g_register(struct cx23885_dev *dev,
64int cx23885_g_register(struct file *file, void *fh, 60int cx23885_g_register(struct file *file, void *fh,
65 struct v4l2_dbg_register *reg) 61 struct v4l2_dbg_register *reg)
66{ 62{
67 struct cx23885_dev *dev = ((struct cx23885_fh *)fh)->dev; 63 struct cx23885_dev *dev = video_drvdata(file);
68 64
69 if (reg->match.addr > 1) 65 if (reg->match.addr > 1)
70 return -EINVAL; 66 return -EINVAL;
@@ -96,7 +92,7 @@ static int cx23417_s_register(struct cx23885_dev *dev,
96int cx23885_s_register(struct file *file, void *fh, 92int cx23885_s_register(struct file *file, void *fh,
97 const struct v4l2_dbg_register *reg) 93 const struct v4l2_dbg_register *reg)
98{ 94{
99 struct cx23885_dev *dev = ((struct cx23885_fh *)fh)->dev; 95 struct cx23885_dev *dev = video_drvdata(file);
100 96
101 if (reg->match.addr > 1) 97 if (reg->match.addr > 1)
102 return -EINVAL; 98 return -EINVAL;
diff --git a/drivers/media/pci/cx23885/cx23885-ioctl.h b/drivers/media/pci/cx23885/cx23885-ioctl.h
index 92d9f0774366..cc5dbb6c1afc 100644
--- a/drivers/media/pci/cx23885/cx23885-ioctl.h
+++ b/drivers/media/pci/cx23885/cx23885-ioctl.h
@@ -15,10 +15,6 @@
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * 16 *
17 * GNU General Public License for more details. 17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */ 18 */
23 19
24#ifndef _CX23885_IOCTL_H_ 20#ifndef _CX23885_IOCTL_H_
diff --git a/drivers/media/pci/cx23885/cx23885-ir.c b/drivers/media/pci/cx23885/cx23885-ir.c
index bfef19359291..89dc4cc3e1ce 100644
--- a/drivers/media/pci/cx23885/cx23885-ir.c
+++ b/drivers/media/pci/cx23885/cx23885-ir.c
@@ -14,11 +14,6 @@
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details. 16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
21 * 02110-1301, USA.
22 */ 17 */
23 18
24#include <media/v4l2-device.h> 19#include <media/v4l2-device.h>
diff --git a/drivers/media/pci/cx23885/cx23885-ir.h b/drivers/media/pci/cx23885/cx23885-ir.h
index 0c9d8bda9e28..8e93d1f10ae0 100644
--- a/drivers/media/pci/cx23885/cx23885-ir.h
+++ b/drivers/media/pci/cx23885/cx23885-ir.h
@@ -14,11 +14,6 @@
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details. 16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
21 * 02110-1301, USA.
22 */ 17 */
23 18
24#ifndef _CX23885_IR_H_ 19#ifndef _CX23885_IR_H_
diff --git a/drivers/media/pci/cx23885/cx23885-reg.h b/drivers/media/pci/cx23885/cx23885-reg.h
index a99936e0cbc2..2d3cbafe2402 100644
--- a/drivers/media/pci/cx23885/cx23885-reg.h
+++ b/drivers/media/pci/cx23885/cx23885-reg.h
@@ -13,10 +13,6 @@
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * 14 *
15 * GNU General Public License for more details. 15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */ 16 */
21 17
22#ifndef _CX23885_REG_H_ 18#ifndef _CX23885_REG_H_
diff --git a/drivers/media/pci/cx23885/cx23885-vbi.c b/drivers/media/pci/cx23885/cx23885-vbi.c
index a1154f035bc1..a7c6ef8f3ea3 100644
--- a/drivers/media/pci/cx23885/cx23885-vbi.c
+++ b/drivers/media/pci/cx23885/cx23885-vbi.c
@@ -13,10 +13,6 @@
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * 14 *
15 * GNU General Public License for more details. 15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */ 16 */
21 17
22#include <linux/kernel.h> 18#include <linux/kernel.h>
@@ -42,33 +38,32 @@ MODULE_PARM_DESC(vbi_debug, "enable debug messages [vbi]");
42/* ------------------------------------------------------------------ */ 38/* ------------------------------------------------------------------ */
43 39
44#define VBI_LINE_LENGTH 1440 40#define VBI_LINE_LENGTH 1440
45#define NTSC_VBI_START_LINE 10 /* line 10 - 21 */ 41#define VBI_NTSC_LINE_COUNT 12
46#define NTSC_VBI_END_LINE 21 42#define VBI_PAL_LINE_COUNT 18
47#define NTSC_VBI_LINES (NTSC_VBI_END_LINE - NTSC_VBI_START_LINE + 1)
48 43
49 44
50int cx23885_vbi_fmt(struct file *file, void *priv, 45int cx23885_vbi_fmt(struct file *file, void *priv,
51 struct v4l2_format *f) 46 struct v4l2_format *f)
52{ 47{
53 struct cx23885_fh *fh = priv; 48 struct cx23885_dev *dev = video_drvdata(file);
54 struct cx23885_dev *dev = fh->dev;
55 49
50 f->fmt.vbi.sampling_rate = 27000000;
51 f->fmt.vbi.samples_per_line = VBI_LINE_LENGTH;
52 f->fmt.vbi.sample_format = V4L2_PIX_FMT_GREY;
53 f->fmt.vbi.offset = 0;
54 f->fmt.vbi.flags = 0;
56 if (dev->tvnorm & V4L2_STD_525_60) { 55 if (dev->tvnorm & V4L2_STD_525_60) {
57 /* ntsc */ 56 /* ntsc */
58 f->fmt.vbi.samples_per_line = VBI_LINE_LENGTH; 57 f->fmt.vbi.start[0] = V4L2_VBI_ITU_525_F1_START + 9;
59 f->fmt.vbi.sampling_rate = 27000000; 58 f->fmt.vbi.start[1] = V4L2_VBI_ITU_525_F2_START + 9;
60 f->fmt.vbi.sample_format = V4L2_PIX_FMT_GREY; 59 f->fmt.vbi.count[0] = VBI_NTSC_LINE_COUNT;
61 f->fmt.vbi.offset = 0; 60 f->fmt.vbi.count[1] = VBI_NTSC_LINE_COUNT;
62 f->fmt.vbi.flags = 0;
63 f->fmt.vbi.start[0] = 10;
64 f->fmt.vbi.count[0] = 17;
65 f->fmt.vbi.start[1] = 263 + 10 + 1;
66 f->fmt.vbi.count[1] = 17;
67 } else if (dev->tvnorm & V4L2_STD_625_50) { 61 } else if (dev->tvnorm & V4L2_STD_625_50) {
68 /* pal */ 62 /* pal */
69 f->fmt.vbi.sampling_rate = 35468950; 63 f->fmt.vbi.start[0] = V4L2_VBI_ITU_625_F1_START + 5;
70 f->fmt.vbi.start[0] = 7 - 1; 64 f->fmt.vbi.start[1] = V4L2_VBI_ITU_625_F2_START + 5;
71 f->fmt.vbi.start[1] = 319 - 1; 65 f->fmt.vbi.count[0] = VBI_PAL_LINE_COUNT;
66 f->fmt.vbi.count[1] = VBI_PAL_LINE_COUNT;
72 } 67 }
73 68
74 return 0; 69 return 0;
@@ -94,15 +89,6 @@ int cx23885_vbi_irq(struct cx23885_dev *dev, u32 status)
94 handled++; 89 handled++;
95 } 90 }
96 91
97 if (status & VID_BC_MSK_VBI_RISCI2) {
98 dprintk(1, "%s() VID_BC_MSK_VBI_RISCI2\n", __func__);
99 dprintk(2, "stopper vbi\n");
100 spin_lock(&dev->slock);
101 cx23885_restart_vbi_queue(dev, &dev->vbiq);
102 spin_unlock(&dev->slock);
103 handled++;
104 }
105
106 return handled; 92 return handled;
107} 93}
108 94
@@ -114,13 +100,13 @@ static int cx23885_start_vbi_dma(struct cx23885_dev *dev,
114 100
115 /* setup fifo + format */ 101 /* setup fifo + format */
116 cx23885_sram_channel_setup(dev, &dev->sram_channels[SRAM_CH02], 102 cx23885_sram_channel_setup(dev, &dev->sram_channels[SRAM_CH02],
117 buf->vb.width, buf->risc.dma); 103 VBI_LINE_LENGTH, buf->risc.dma);
118 104
119 /* reset counter */ 105 /* reset counter */
120 cx_write(VID_A_GPCNT_CTL, 3); 106 cx_write(VID_A_GPCNT_CTL, 3);
121 cx_write(VID_A_VBI_CTRL, 3); 107 cx_write(VID_A_VBI_CTRL, 3);
122 cx_write(VBI_A_GPCNT_CTL, 3); 108 cx_write(VBI_A_GPCNT_CTL, 3);
123 q->count = 1; 109 q->count = 0;
124 110
125 /* enable irq */ 111 /* enable irq */
126 cx23885_irq_add_enable(dev, 0x01); 112 cx23885_irq_add_enable(dev, 0x01);
@@ -133,163 +119,153 @@ static int cx23885_start_vbi_dma(struct cx23885_dev *dev,
133 return 0; 119 return 0;
134} 120}
135 121
122/* ------------------------------------------------------------------ */
136 123
137int cx23885_restart_vbi_queue(struct cx23885_dev *dev, 124static int queue_setup(struct vb2_queue *q, const struct v4l2_format *fmt,
138 struct cx23885_dmaqueue *q) 125 unsigned int *num_buffers, unsigned int *num_planes,
126 unsigned int sizes[], void *alloc_ctxs[])
139{ 127{
140 struct cx23885_buffer *buf; 128 struct cx23885_dev *dev = q->drv_priv;
141 struct list_head *item; 129 unsigned lines = VBI_PAL_LINE_COUNT;
142 130
143 if (list_empty(&q->active)) 131 if (dev->tvnorm & V4L2_STD_525_60)
144 return 0; 132 lines = VBI_NTSC_LINE_COUNT;
145 133 *num_planes = 1;
146 buf = list_entry(q->active.next, struct cx23885_buffer, vb.queue); 134 sizes[0] = lines * VBI_LINE_LENGTH * 2;
147 dprintk(2, "restart_queue [%p/%d]: restart dma\n",
148 buf, buf->vb.i);
149 cx23885_start_vbi_dma(dev, q, buf);
150 list_for_each(item, &q->active) {
151 buf = list_entry(item, struct cx23885_buffer, vb.queue);
152 buf->count = q->count++;
153 }
154 mod_timer(&q->timeout, jiffies + (BUFFER_TIMEOUT / 30));
155 return 0; 135 return 0;
156} 136}
157 137
158void cx23885_vbi_timeout(unsigned long data) 138static int buffer_prepare(struct vb2_buffer *vb)
159{ 139{
160 struct cx23885_dev *dev = (struct cx23885_dev *)data; 140 struct cx23885_dev *dev = vb->vb2_queue->drv_priv;
161 struct cx23885_dmaqueue *q = &dev->vbiq; 141 struct cx23885_buffer *buf = container_of(vb,
162 struct cx23885_buffer *buf; 142 struct cx23885_buffer, vb);
163 unsigned long flags; 143 struct sg_table *sgt = vb2_dma_sg_plane_desc(vb, 0);
144 unsigned lines = VBI_PAL_LINE_COUNT;
145 int ret;
164 146
165 /* Stop the VBI engine */ 147 if (dev->tvnorm & V4L2_STD_525_60)
166 cx_clear(VID_A_DMA_CTL, 0x22); 148 lines = VBI_NTSC_LINE_COUNT;
167 149
168 spin_lock_irqsave(&dev->slock, flags); 150 if (vb2_plane_size(vb, 0) < lines * VBI_LINE_LENGTH * 2)
169 while (!list_empty(&q->active)) { 151 return -EINVAL;
170 buf = list_entry(q->active.next, struct cx23885_buffer, 152 vb2_set_plane_payload(vb, 0, lines * VBI_LINE_LENGTH * 2);
171 vb.queue);
172 list_del(&buf->vb.queue);
173 buf->vb.state = VIDEOBUF_ERROR;
174 wake_up(&buf->vb.done);
175 printk("%s/0: [%p/%d] timeout - dma=0x%08lx\n", dev->name,
176 buf, buf->vb.i, (unsigned long)buf->risc.dma);
177 }
178 cx23885_restart_vbi_queue(dev, q);
179 spin_unlock_irqrestore(&dev->slock, flags);
180}
181 153
182/* ------------------------------------------------------------------ */ 154 ret = dma_map_sg(&dev->pci->dev, sgt->sgl, sgt->nents, DMA_FROM_DEVICE);
183#define VBI_LINE_LENGTH 1440 155 if (!ret)
184#define VBI_LINE_COUNT 17 156 return -EIO;
185 157
186static int 158 cx23885_risc_vbibuffer(dev->pci, &buf->risc,
187vbi_setup(struct videobuf_queue *q, unsigned int *count, unsigned int *size) 159 sgt->sgl,
188{ 160 0, VBI_LINE_LENGTH * lines,
189 *size = VBI_LINE_COUNT * VBI_LINE_LENGTH * 2; 161 VBI_LINE_LENGTH, 0,
190 if (0 == *count) 162 lines);
191 *count = vbibufs;
192 if (*count < 2)
193 *count = 2;
194 if (*count > 32)
195 *count = 32;
196 return 0; 163 return 0;
197} 164}
198 165
199static int 166static void buffer_finish(struct vb2_buffer *vb)
200vbi_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
201 enum v4l2_field field)
202{ 167{
203 struct cx23885_fh *fh = q->priv_data; 168 struct cx23885_dev *dev = vb->vb2_queue->drv_priv;
204 struct cx23885_dev *dev = fh->dev;
205 struct cx23885_buffer *buf = container_of(vb, 169 struct cx23885_buffer *buf = container_of(vb,
206 struct cx23885_buffer, vb); 170 struct cx23885_buffer, vb);
207 struct videobuf_dmabuf *dma = videobuf_to_dma(&buf->vb); 171 struct sg_table *sgt = vb2_dma_sg_plane_desc(vb, 0);
208 unsigned int size;
209 int rc;
210
211 size = VBI_LINE_COUNT * VBI_LINE_LENGTH * 2;
212 if (0 != buf->vb.baddr && buf->vb.bsize < size)
213 return -EINVAL;
214 172
215 if (VIDEOBUF_NEEDS_INIT == buf->vb.state) { 173 cx23885_free_buffer(vb->vb2_queue->drv_priv, buf);
216 buf->vb.width = VBI_LINE_LENGTH;
217 buf->vb.height = VBI_LINE_COUNT;
218 buf->vb.size = size;
219 buf->vb.field = V4L2_FIELD_SEQ_TB;
220
221 rc = videobuf_iolock(q, &buf->vb, NULL);
222 if (0 != rc)
223 goto fail;
224 cx23885_risc_vbibuffer(dev->pci, &buf->risc,
225 dma->sglist,
226 0, buf->vb.width * buf->vb.height,
227 buf->vb.width, 0,
228 buf->vb.height);
229 }
230 buf->vb.state = VIDEOBUF_PREPARED;
231 return 0;
232 174
233 fail: 175 dma_unmap_sg(&dev->pci->dev, sgt->sgl, sgt->nents, DMA_FROM_DEVICE);
234 cx23885_free_buffer(q, buf);
235 return rc;
236} 176}
237 177
238static void 178/*
239vbi_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb) 179 * The risc program for each buffer works as follows: it starts with a simple
180 * 'JUMP to addr + 12', which is effectively a NOP. Then the code to DMA the
181 * buffer follows and at the end we have a JUMP back to the start + 12 (skipping
182 * the initial JUMP).
183 *
184 * This is the risc program of the first buffer to be queued if the active list
185 * is empty and it just keeps DMAing this buffer without generating any
186 * interrupts.
187 *
188 * If a new buffer is added then the initial JUMP in the code for that buffer
189 * will generate an interrupt which signals that the previous buffer has been
190 * DMAed successfully and that it can be returned to userspace.
191 *
192 * It also sets the final jump of the previous buffer to the start of the new
193 * buffer, thus chaining the new buffer into the DMA chain. This is a single
194 * atomic u32 write, so there is no race condition.
195 *
196 * The end-result of all this that you only get an interrupt when a buffer
197 * is ready, so the control flow is very easy.
198 */
199static void buffer_queue(struct vb2_buffer *vb)
240{ 200{
241 struct cx23885_buffer *buf = 201 struct cx23885_dev *dev = vb->vb2_queue->drv_priv;
242 container_of(vb, struct cx23885_buffer, vb); 202 struct cx23885_buffer *buf = container_of(vb, struct cx23885_buffer, vb);
243 struct cx23885_buffer *prev; 203 struct cx23885_buffer *prev;
244 struct cx23885_fh *fh = vq->priv_data; 204 struct cx23885_dmaqueue *q = &dev->vbiq;
245 struct cx23885_dev *dev = fh->dev; 205 unsigned long flags;
246 struct cx23885_dmaqueue *q = &dev->vbiq; 206
247 207 buf->risc.cpu[1] = cpu_to_le32(buf->risc.dma + 12);
248 /* add jump to stopper */ 208 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_CNT_INC);
249 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC); 209 buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma + 12);
250 buf->risc.jmp[1] = cpu_to_le32(q->stopper.dma);
251 buf->risc.jmp[2] = cpu_to_le32(0); /* bits 63-32 */ 210 buf->risc.jmp[2] = cpu_to_le32(0); /* bits 63-32 */
252 211
253 if (list_empty(&q->active)) { 212 if (list_empty(&q->active)) {
254 list_add_tail(&buf->vb.queue, &q->active); 213 spin_lock_irqsave(&dev->slock, flags);
255 cx23885_start_vbi_dma(dev, q, buf); 214 list_add_tail(&buf->queue, &q->active);
256 buf->vb.state = VIDEOBUF_ACTIVE; 215 spin_unlock_irqrestore(&dev->slock, flags);
257 buf->count = q->count++;
258 mod_timer(&q->timeout, jiffies + (BUFFER_TIMEOUT / 30));
259 dprintk(2, "[%p/%d] vbi_queue - first active\n", 216 dprintk(2, "[%p/%d] vbi_queue - first active\n",
260 buf, buf->vb.i); 217 buf, buf->vb.v4l2_buf.index);
261 218
262 } else { 219 } else {
220 buf->risc.cpu[0] |= cpu_to_le32(RISC_IRQ1);
263 prev = list_entry(q->active.prev, struct cx23885_buffer, 221 prev = list_entry(q->active.prev, struct cx23885_buffer,
264 vb.queue); 222 queue);
265 list_add_tail(&buf->vb.queue, &q->active); 223 spin_lock_irqsave(&dev->slock, flags);
266 buf->vb.state = VIDEOBUF_ACTIVE; 224 list_add_tail(&buf->queue, &q->active);
267 buf->count = q->count++; 225 spin_unlock_irqrestore(&dev->slock, flags);
268 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma); 226 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
269 prev->risc.jmp[2] = cpu_to_le32(0); /* Bits 63-32 */
270 dprintk(2, "[%p/%d] buffer_queue - append to active\n", 227 dprintk(2, "[%p/%d] buffer_queue - append to active\n",
271 buf, buf->vb.i); 228 buf, buf->vb.v4l2_buf.index);
272 } 229 }
273} 230}
274 231
275static void vbi_release(struct videobuf_queue *q, struct videobuf_buffer *vb) 232static int cx23885_start_streaming(struct vb2_queue *q, unsigned int count)
276{ 233{
277 struct cx23885_buffer *buf = 234 struct cx23885_dev *dev = q->drv_priv;
278 container_of(vb, struct cx23885_buffer, vb); 235 struct cx23885_dmaqueue *dmaq = &dev->vbiq;
236 struct cx23885_buffer *buf = list_entry(dmaq->active.next,
237 struct cx23885_buffer, queue);
279 238
280 cx23885_free_buffer(q, buf); 239 cx23885_start_vbi_dma(dev, dmaq, buf);
240 return 0;
281} 241}
282 242
283struct videobuf_queue_ops cx23885_vbi_qops = { 243static void cx23885_stop_streaming(struct vb2_queue *q)
284 .buf_setup = vbi_setup, 244{
285 .buf_prepare = vbi_prepare, 245 struct cx23885_dev *dev = q->drv_priv;
286 .buf_queue = vbi_queue, 246 struct cx23885_dmaqueue *dmaq = &dev->vbiq;
287 .buf_release = vbi_release, 247 unsigned long flags;
288};
289 248
290/* ------------------------------------------------------------------ */ 249 cx_clear(VID_A_DMA_CTL, 0x22); /* FIFO and RISC enable */
291/* 250 spin_lock_irqsave(&dev->slock, flags);
292 * Local variables: 251 while (!list_empty(&dmaq->active)) {
293 * c-basic-offset: 8 252 struct cx23885_buffer *buf = list_entry(dmaq->active.next,
294 * End: 253 struct cx23885_buffer, queue);
295 */ 254
255 list_del(&buf->queue);
256 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
257 }
258 spin_unlock_irqrestore(&dev->slock, flags);
259}
260
261
262struct vb2_ops cx23885_vbi_qops = {
263 .queue_setup = queue_setup,
264 .buf_prepare = buffer_prepare,
265 .buf_finish = buffer_finish,
266 .buf_queue = buffer_queue,
267 .wait_prepare = vb2_ops_wait_prepare,
268 .wait_finish = vb2_ops_wait_finish,
269 .start_streaming = cx23885_start_streaming,
270 .stop_streaming = cx23885_stop_streaming,
271};
diff --git a/drivers/media/pci/cx23885/cx23885-video.c b/drivers/media/pci/cx23885/cx23885-video.c
index 91e4cb457296..682a4f95df6b 100644
--- a/drivers/media/pci/cx23885/cx23885-video.c
+++ b/drivers/media/pci/cx23885/cx23885-video.c
@@ -13,10 +13,6 @@
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * 14 *
15 * GNU General Public License for more details. 15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */ 16 */
21 17
22#include <linux/init.h> 18#include <linux/init.h>
@@ -35,6 +31,7 @@
35#include "cx23885-video.h" 31#include "cx23885-video.h"
36#include <media/v4l2-common.h> 32#include <media/v4l2-common.h>
37#include <media/v4l2-ioctl.h> 33#include <media/v4l2-ioctl.h>
34#include <media/v4l2-event.h>
38#include "cx23885-ioctl.h" 35#include "cx23885-ioctl.h"
39#include "tuner-xc2028.h" 36#include "tuner-xc2028.h"
40 37
@@ -48,15 +45,12 @@ MODULE_LICENSE("GPL");
48 45
49static unsigned int video_nr[] = {[0 ... (CX23885_MAXBOARDS - 1)] = UNSET }; 46static unsigned int video_nr[] = {[0 ... (CX23885_MAXBOARDS - 1)] = UNSET };
50static unsigned int vbi_nr[] = {[0 ... (CX23885_MAXBOARDS - 1)] = UNSET }; 47static unsigned int vbi_nr[] = {[0 ... (CX23885_MAXBOARDS - 1)] = UNSET };
51static unsigned int radio_nr[] = {[0 ... (CX23885_MAXBOARDS - 1)] = UNSET };
52 48
53module_param_array(video_nr, int, NULL, 0444); 49module_param_array(video_nr, int, NULL, 0444);
54module_param_array(vbi_nr, int, NULL, 0444); 50module_param_array(vbi_nr, int, NULL, 0444);
55module_param_array(radio_nr, int, NULL, 0444);
56 51
57MODULE_PARM_DESC(video_nr, "video device numbers"); 52MODULE_PARM_DESC(video_nr, "video device numbers");
58MODULE_PARM_DESC(vbi_nr, "vbi device numbers"); 53MODULE_PARM_DESC(vbi_nr, "vbi device numbers");
59MODULE_PARM_DESC(radio_nr, "radio device numbers");
60 54
61static unsigned int video_debug; 55static unsigned int video_debug;
62module_param(video_debug, int, 0644); 56module_param(video_debug, int, 0644);
@@ -79,77 +73,14 @@ MODULE_PARM_DESC(vid_limit, "capture memory limit in megabytes");
79/* static data */ 73/* static data */
80 74
81#define FORMAT_FLAGS_PACKED 0x01 75#define FORMAT_FLAGS_PACKED 0x01
82#if 0
83static struct cx23885_fmt formats[] = {
84 {
85 .name = "8 bpp, gray",
86 .fourcc = V4L2_PIX_FMT_GREY,
87 .depth = 8,
88 .flags = FORMAT_FLAGS_PACKED,
89 }, {
90 .name = "15 bpp RGB, le",
91 .fourcc = V4L2_PIX_FMT_RGB555,
92 .depth = 16,
93 .flags = FORMAT_FLAGS_PACKED,
94 }, {
95 .name = "15 bpp RGB, be",
96 .fourcc = V4L2_PIX_FMT_RGB555X,
97 .depth = 16,
98 .flags = FORMAT_FLAGS_PACKED,
99 }, {
100 .name = "16 bpp RGB, le",
101 .fourcc = V4L2_PIX_FMT_RGB565,
102 .depth = 16,
103 .flags = FORMAT_FLAGS_PACKED,
104 }, {
105 .name = "16 bpp RGB, be",
106 .fourcc = V4L2_PIX_FMT_RGB565X,
107 .depth = 16,
108 .flags = FORMAT_FLAGS_PACKED,
109 }, {
110 .name = "24 bpp RGB, le",
111 .fourcc = V4L2_PIX_FMT_BGR24,
112 .depth = 24,
113 .flags = FORMAT_FLAGS_PACKED,
114 }, {
115 .name = "32 bpp RGB, le",
116 .fourcc = V4L2_PIX_FMT_BGR32,
117 .depth = 32,
118 .flags = FORMAT_FLAGS_PACKED,
119 }, {
120 .name = "32 bpp RGB, be",
121 .fourcc = V4L2_PIX_FMT_RGB32,
122 .depth = 32,
123 .flags = FORMAT_FLAGS_PACKED,
124 }, {
125 .name = "4:2:2, packed, YUYV",
126 .fourcc = V4L2_PIX_FMT_YUYV,
127 .depth = 16,
128 .flags = FORMAT_FLAGS_PACKED,
129 }, {
130 .name = "4:2:2, packed, UYVY",
131 .fourcc = V4L2_PIX_FMT_UYVY,
132 .depth = 16,
133 .flags = FORMAT_FLAGS_PACKED,
134 },
135};
136#else
137static struct cx23885_fmt formats[] = { 76static struct cx23885_fmt formats[] = {
138 { 77 {
139#if 0
140 .name = "4:2:2, packed, UYVY",
141 .fourcc = V4L2_PIX_FMT_UYVY,
142 .depth = 16,
143 .flags = FORMAT_FLAGS_PACKED,
144 }, {
145#endif
146 .name = "4:2:2, packed, YUYV", 78 .name = "4:2:2, packed, YUYV",
147 .fourcc = V4L2_PIX_FMT_YUYV, 79 .fourcc = V4L2_PIX_FMT_YUYV,
148 .depth = 16, 80 .depth = 16,
149 .flags = FORMAT_FLAGS_PACKED, 81 .flags = FORMAT_FLAGS_PACKED,
150 } 82 }
151}; 83};
152#endif
153 84
154static struct cx23885_fmt *format_by_fourcc(unsigned int fourcc) 85static struct cx23885_fmt *format_by_fourcc(unsigned int fourcc)
155{ 86{
@@ -158,163 +89,27 @@ static struct cx23885_fmt *format_by_fourcc(unsigned int fourcc)
158 for (i = 0; i < ARRAY_SIZE(formats); i++) 89 for (i = 0; i < ARRAY_SIZE(formats); i++)
159 if (formats[i].fourcc == fourcc) 90 if (formats[i].fourcc == fourcc)
160 return formats+i; 91 return formats+i;
161
162 printk(KERN_ERR "%s(%c%c%c%c) NOT FOUND\n", __func__,
163 (fourcc & 0xff),
164 ((fourcc >> 8) & 0xff),
165 ((fourcc >> 16) & 0xff),
166 ((fourcc >> 24) & 0xff)
167 );
168 return NULL; 92 return NULL;
169} 93}
170 94
171/* ------------------------------------------------------------------- */ 95/* ------------------------------------------------------------------- */
172 96
173static const struct v4l2_queryctrl no_ctl = {
174 .name = "42",
175 .flags = V4L2_CTRL_FLAG_DISABLED,
176};
177
178static struct cx23885_ctrl cx23885_ctls[] = {
179 /* --- video --- */
180 {
181 .v = {
182 .id = V4L2_CID_BRIGHTNESS,
183 .name = "Brightness",
184 .minimum = 0x00,
185 .maximum = 0xff,
186 .step = 1,
187 .default_value = 0x7f,
188 .type = V4L2_CTRL_TYPE_INTEGER,
189 },
190 .off = 128,
191 .reg = LUMA_CTRL,
192 .mask = 0x00ff,
193 .shift = 0,
194 }, {
195 .v = {
196 .id = V4L2_CID_CONTRAST,
197 .name = "Contrast",
198 .minimum = 0,
199 .maximum = 0x7f,
200 .step = 1,
201 .default_value = 0x3f,
202 .type = V4L2_CTRL_TYPE_INTEGER,
203 },
204 .off = 0,
205 .reg = LUMA_CTRL,
206 .mask = 0xff00,
207 .shift = 8,
208 }, {
209 .v = {
210 .id = V4L2_CID_HUE,
211 .name = "Hue",
212 .minimum = -127,
213 .maximum = 128,
214 .step = 1,
215 .default_value = 0x0,
216 .type = V4L2_CTRL_TYPE_INTEGER,
217 },
218 .off = 128,
219 .reg = CHROMA_CTRL,
220 .mask = 0xff0000,
221 .shift = 16,
222 }, {
223 /* strictly, this only describes only U saturation.
224 * V saturation is handled specially through code.
225 */
226 .v = {
227 .id = V4L2_CID_SATURATION,
228 .name = "Saturation",
229 .minimum = 0,
230 .maximum = 0x7f,
231 .step = 1,
232 .default_value = 0x3f,
233 .type = V4L2_CTRL_TYPE_INTEGER,
234 },
235 .off = 0,
236 .reg = CHROMA_CTRL,
237 .mask = 0x00ff,
238 .shift = 0,
239 }, {
240 /* --- audio --- */
241 .v = {
242 .id = V4L2_CID_AUDIO_MUTE,
243 .name = "Mute",
244 .minimum = 0,
245 .maximum = 1,
246 .default_value = 1,
247 .type = V4L2_CTRL_TYPE_BOOLEAN,
248 },
249 .reg = PATH1_CTL1,
250 .mask = (0x1f << 24),
251 .shift = 24,
252 }, {
253 .v = {
254 .id = V4L2_CID_AUDIO_VOLUME,
255 .name = "Volume",
256 .minimum = 0,
257 .maximum = 65535,
258 .step = 65535 / 100,
259 .default_value = 65535,
260 .type = V4L2_CTRL_TYPE_INTEGER,
261 },
262 .reg = PATH1_VOL_CTL,
263 .mask = 0xff,
264 .shift = 0,
265 }
266};
267static const int CX23885_CTLS = ARRAY_SIZE(cx23885_ctls);
268
269/* Must be sorted from low to high control ID! */
270static const u32 cx23885_user_ctrls[] = {
271 V4L2_CID_USER_CLASS,
272 V4L2_CID_BRIGHTNESS,
273 V4L2_CID_CONTRAST,
274 V4L2_CID_SATURATION,
275 V4L2_CID_HUE,
276 V4L2_CID_AUDIO_VOLUME,
277 V4L2_CID_AUDIO_MUTE,
278 0
279};
280
281static const u32 *ctrl_classes[] = {
282 cx23885_user_ctrls,
283 NULL
284};
285
286void cx23885_video_wakeup(struct cx23885_dev *dev, 97void cx23885_video_wakeup(struct cx23885_dev *dev,
287 struct cx23885_dmaqueue *q, u32 count) 98 struct cx23885_dmaqueue *q, u32 count)
288{ 99{
289 struct cx23885_buffer *buf; 100 struct cx23885_buffer *buf;
290 int bc; 101
291
292 for (bc = 0;; bc++) {
293 if (list_empty(&q->active))
294 break;
295 buf = list_entry(q->active.next,
296 struct cx23885_buffer, vb.queue);
297
298 /* count comes from the hw and is is 16bit wide --
299 * this trick handles wrap-arounds correctly for
300 * up to 32767 buffers in flight... */
301 if ((s16) (count - buf->count) < 0)
302 break;
303
304 v4l2_get_timestamp(&buf->vb.ts);
305 dprintk(2, "[%p/%d] wakeup reg=%d buf=%d\n", buf, buf->vb.i,
306 count, buf->count);
307 buf->vb.state = VIDEOBUF_DONE;
308 list_del(&buf->vb.queue);
309 wake_up(&buf->vb.done);
310 }
311 if (list_empty(&q->active)) 102 if (list_empty(&q->active))
312 del_timer(&q->timeout); 103 return;
313 else 104 buf = list_entry(q->active.next,
314 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT); 105 struct cx23885_buffer, queue);
315 if (bc != 1) 106
316 printk(KERN_ERR "%s: %d buffers handled (should be 1)\n", 107 buf->vb.v4l2_buf.sequence = q->count++;
317 __func__, bc); 108 v4l2_get_timestamp(&buf->vb.v4l2_buf.timestamp);
109 dprintk(2, "[%p/%d] wakeup reg=%d buf=%d\n", buf, buf->vb.v4l2_buf.index,
110 count, q->count);
111 list_del(&buf->queue);
112 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_DONE);
318} 113}
319 114
320int cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm) 115int cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm)
@@ -324,6 +119,12 @@ int cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm)
324 (unsigned int)norm, 119 (unsigned int)norm,
325 v4l2_norm_to_name(norm)); 120 v4l2_norm_to_name(norm));
326 121
122 if (dev->tvnorm != norm) {
123 if (vb2_is_busy(&dev->vb2_vidq) || vb2_is_busy(&dev->vb2_vbiq) ||
124 vb2_is_busy(&dev->vb2_mpegq))
125 return -EBUSY;
126 }
127
327 dev->tvnorm = norm; 128 dev->tvnorm = norm;
328 129
329 call_all(dev, video, s_std, norm); 130 call_all(dev, video, s_std, norm);
@@ -345,79 +146,13 @@ static struct video_device *cx23885_vdev_init(struct cx23885_dev *dev,
345 *vfd = *template; 146 *vfd = *template;
346 vfd->v4l2_dev = &dev->v4l2_dev; 147 vfd->v4l2_dev = &dev->v4l2_dev;
347 vfd->release = video_device_release; 148 vfd->release = video_device_release;
149 vfd->lock = &dev->lock;
348 snprintf(vfd->name, sizeof(vfd->name), "%s (%s)", 150 snprintf(vfd->name, sizeof(vfd->name), "%s (%s)",
349 cx23885_boards[dev->board].name, type); 151 cx23885_boards[dev->board].name, type);
350 video_set_drvdata(vfd, dev); 152 video_set_drvdata(vfd, dev);
351 return vfd; 153 return vfd;
352} 154}
353 155
354static int cx23885_ctrl_query(struct v4l2_queryctrl *qctrl)
355{
356 int i;
357
358 if (qctrl->id < V4L2_CID_BASE ||
359 qctrl->id >= V4L2_CID_LASTP1)
360 return -EINVAL;
361 for (i = 0; i < CX23885_CTLS; i++)
362 if (cx23885_ctls[i].v.id == qctrl->id)
363 break;
364 if (i == CX23885_CTLS) {
365 *qctrl = no_ctl;
366 return 0;
367 }
368 *qctrl = cx23885_ctls[i].v;
369 return 0;
370}
371
372/* ------------------------------------------------------------------- */
373/* resource management */
374
375static int res_get(struct cx23885_dev *dev, struct cx23885_fh *fh,
376 unsigned int bit)
377{
378 dprintk(1, "%s()\n", __func__);
379 if (fh->resources & bit)
380 /* have it already allocated */
381 return 1;
382
383 /* is it free? */
384 mutex_lock(&dev->lock);
385 if (dev->resources & bit) {
386 /* no, someone else uses it */
387 mutex_unlock(&dev->lock);
388 return 0;
389 }
390 /* it's free, grab it */
391 fh->resources |= bit;
392 dev->resources |= bit;
393 dprintk(1, "res: get %d\n", bit);
394 mutex_unlock(&dev->lock);
395 return 1;
396}
397
398static int res_check(struct cx23885_fh *fh, unsigned int bit)
399{
400 return fh->resources & bit;
401}
402
403static int res_locked(struct cx23885_dev *dev, unsigned int bit)
404{
405 return dev->resources & bit;
406}
407
408static void res_free(struct cx23885_dev *dev, struct cx23885_fh *fh,
409 unsigned int bits)
410{
411 BUG_ON((fh->resources & bits) != bits);
412 dprintk(1, "%s()\n", __func__);
413
414 mutex_lock(&dev->lock);
415 fh->resources &= ~bits;
416 dev->resources &= ~bits;
417 dprintk(1, "res: put %d\n", bits);
418 mutex_unlock(&dev->lock);
419}
420
421int cx23885_flatiron_write(struct cx23885_dev *dev, u8 reg, u8 data) 156int cx23885_flatiron_write(struct cx23885_dev *dev, u8 reg, u8 data)
422{ 157{
423 /* 8 bit registers, 8 bit values */ 158 /* 8 bit registers, 8 bit values */
@@ -567,7 +302,7 @@ static int cx23885_start_video_dma(struct cx23885_dev *dev,
567 302
568 /* reset counter */ 303 /* reset counter */
569 cx_write(VID_A_GPCNT_CTL, 3); 304 cx_write(VID_A_GPCNT_CTL, 3);
570 q->count = 1; 305 q->count = 0;
571 306
572 /* enable irq */ 307 /* enable irq */
573 cx23885_irq_add_enable(dev, 0x01); 308 cx23885_irq_add_enable(dev, 0x01);
@@ -580,479 +315,206 @@ static int cx23885_start_video_dma(struct cx23885_dev *dev,
580 return 0; 315 return 0;
581} 316}
582 317
583 318static int queue_setup(struct vb2_queue *q, const struct v4l2_format *fmt,
584static int cx23885_restart_video_queue(struct cx23885_dev *dev, 319 unsigned int *num_buffers, unsigned int *num_planes,
585 struct cx23885_dmaqueue *q) 320 unsigned int sizes[], void *alloc_ctxs[])
586{
587 struct cx23885_buffer *buf, *prev;
588 struct list_head *item;
589 dprintk(1, "%s()\n", __func__);
590
591 if (!list_empty(&q->active)) {
592 buf = list_entry(q->active.next, struct cx23885_buffer,
593 vb.queue);
594 dprintk(2, "restart_queue [%p/%d]: restart dma\n",
595 buf, buf->vb.i);
596 cx23885_start_video_dma(dev, q, buf);
597 list_for_each(item, &q->active) {
598 buf = list_entry(item, struct cx23885_buffer,
599 vb.queue);
600 buf->count = q->count++;
601 }
602 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
603 return 0;
604 }
605
606 prev = NULL;
607 for (;;) {
608 if (list_empty(&q->queued))
609 return 0;
610 buf = list_entry(q->queued.next, struct cx23885_buffer,
611 vb.queue);
612 if (NULL == prev) {
613 list_move_tail(&buf->vb.queue, &q->active);
614 cx23885_start_video_dma(dev, q, buf);
615 buf->vb.state = VIDEOBUF_ACTIVE;
616 buf->count = q->count++;
617 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
618 dprintk(2, "[%p/%d] restart_queue - first active\n",
619 buf, buf->vb.i);
620
621 } else if (prev->vb.width == buf->vb.width &&
622 prev->vb.height == buf->vb.height &&
623 prev->fmt == buf->fmt) {
624 list_move_tail(&buf->vb.queue, &q->active);
625 buf->vb.state = VIDEOBUF_ACTIVE;
626 buf->count = q->count++;
627 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
628 prev->risc.jmp[2] = cpu_to_le32(0); /* Bits 63 - 32 */
629 dprintk(2, "[%p/%d] restart_queue - move to active\n",
630 buf, buf->vb.i);
631 } else {
632 return 0;
633 }
634 prev = buf;
635 }
636}
637
638static int buffer_setup(struct videobuf_queue *q, unsigned int *count,
639 unsigned int *size)
640{ 321{
641 struct cx23885_fh *fh = q->priv_data; 322 struct cx23885_dev *dev = q->drv_priv;
642 323
643 *size = fh->fmt->depth*fh->width*fh->height >> 3; 324 *num_planes = 1;
644 if (0 == *count) 325 sizes[0] = (dev->fmt->depth * dev->width * dev->height) >> 3;
645 *count = 32;
646 if (*size * *count > vid_limit * 1024 * 1024)
647 *count = (vid_limit * 1024 * 1024) / *size;
648 return 0; 326 return 0;
649} 327}
650 328
651static int buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb, 329static int buffer_prepare(struct vb2_buffer *vb)
652 enum v4l2_field field)
653{ 330{
654 struct cx23885_fh *fh = q->priv_data; 331 struct cx23885_dev *dev = vb->vb2_queue->drv_priv;
655 struct cx23885_dev *dev = fh->dev;
656 struct cx23885_buffer *buf = 332 struct cx23885_buffer *buf =
657 container_of(vb, struct cx23885_buffer, vb); 333 container_of(vb, struct cx23885_buffer, vb);
658 int rc, init_buffer = 0;
659 u32 line0_offset, line1_offset; 334 u32 line0_offset, line1_offset;
660 struct videobuf_dmabuf *dma = videobuf_to_dma(&buf->vb); 335 struct sg_table *sgt = vb2_dma_sg_plane_desc(vb, 0);
661 int field_tff; 336 int field_tff;
337 int ret;
662 338
663 BUG_ON(NULL == fh->fmt); 339 buf->bpl = (dev->width * dev->fmt->depth) >> 3;
664 if (fh->width < 48 || fh->width > norm_maxw(dev->tvnorm) || 340
665 fh->height < 32 || fh->height > norm_maxh(dev->tvnorm)) 341 if (vb2_plane_size(vb, 0) < dev->height * buf->bpl)
666 return -EINVAL;
667 buf->vb.size = (fh->width * fh->height * fh->fmt->depth) >> 3;
668 if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size)
669 return -EINVAL; 342 return -EINVAL;
343 vb2_set_plane_payload(vb, 0, dev->height * buf->bpl);
670 344
671 if (buf->fmt != fh->fmt || 345 ret = dma_map_sg(&dev->pci->dev, sgt->sgl, sgt->nents, DMA_FROM_DEVICE);
672 buf->vb.width != fh->width || 346 if (!ret)
673 buf->vb.height != fh->height || 347 return -EIO;
674 buf->vb.field != field) {
675 buf->fmt = fh->fmt;
676 buf->vb.width = fh->width;
677 buf->vb.height = fh->height;
678 buf->vb.field = field;
679 init_buffer = 1;
680 }
681 348
682 if (VIDEOBUF_NEEDS_INIT == buf->vb.state) { 349 switch (dev->field) {
683 init_buffer = 1; 350 case V4L2_FIELD_TOP:
684 rc = videobuf_iolock(q, &buf->vb, NULL); 351 cx23885_risc_buffer(dev->pci, &buf->risc,
685 if (0 != rc) 352 sgt->sgl, 0, UNSET,
686 goto fail; 353 buf->bpl, 0, dev->height);
687 } 354 break;
355 case V4L2_FIELD_BOTTOM:
356 cx23885_risc_buffer(dev->pci, &buf->risc,
357 sgt->sgl, UNSET, 0,
358 buf->bpl, 0, dev->height);
359 break;
360 case V4L2_FIELD_INTERLACED:
361 if (dev->tvnorm & V4L2_STD_525_60)
362 /* NTSC or */
363 field_tff = 1;
364 else
365 field_tff = 0;
366
367 if (cx23885_boards[dev->board].force_bff)
368 /* PAL / SECAM OR 888 in NTSC MODE */
369 field_tff = 0;
688 370
689 if (init_buffer) { 371 if (field_tff) {
690 buf->bpl = buf->vb.width * buf->fmt->depth >> 3; 372 /* cx25840 transmits NTSC bottom field first */
691 switch (buf->vb.field) { 373 dprintk(1, "%s() Creating TFF/NTSC risc\n",
692 case V4L2_FIELD_TOP:
693 cx23885_risc_buffer(dev->pci, &buf->risc,
694 dma->sglist, 0, UNSET,
695 buf->bpl, 0, buf->vb.height);
696 break;
697 case V4L2_FIELD_BOTTOM:
698 cx23885_risc_buffer(dev->pci, &buf->risc,
699 dma->sglist, UNSET, 0,
700 buf->bpl, 0, buf->vb.height);
701 break;
702 case V4L2_FIELD_INTERLACED:
703 if (dev->tvnorm & V4L2_STD_NTSC)
704 /* NTSC or */
705 field_tff = 1;
706 else
707 field_tff = 0;
708
709 if (cx23885_boards[dev->board].force_bff)
710 /* PAL / SECAM OR 888 in NTSC MODE */
711 field_tff = 0;
712
713 if (field_tff) {
714 /* cx25840 transmits NTSC bottom field first */
715 dprintk(1, "%s() Creating TFF/NTSC risc\n",
716 __func__); 374 __func__);
717 line0_offset = buf->bpl; 375 line0_offset = buf->bpl;
718 line1_offset = 0; 376 line1_offset = 0;
719 } else { 377 } else {
720 /* All other formats are top field first */ 378 /* All other formats are top field first */
721 dprintk(1, "%s() Creating BFF/PAL/SECAM risc\n", 379 dprintk(1, "%s() Creating BFF/PAL/SECAM risc\n",
722 __func__); 380 __func__);
723 line0_offset = 0; 381 line0_offset = 0;
724 line1_offset = buf->bpl; 382 line1_offset = buf->bpl;
725 }
726 cx23885_risc_buffer(dev->pci, &buf->risc,
727 dma->sglist, line0_offset,
728 line1_offset,
729 buf->bpl, buf->bpl,
730 buf->vb.height >> 1);
731 break;
732 case V4L2_FIELD_SEQ_TB:
733 cx23885_risc_buffer(dev->pci, &buf->risc,
734 dma->sglist,
735 0, buf->bpl * (buf->vb.height >> 1),
736 buf->bpl, 0,
737 buf->vb.height >> 1);
738 break;
739 case V4L2_FIELD_SEQ_BT:
740 cx23885_risc_buffer(dev->pci, &buf->risc,
741 dma->sglist,
742 buf->bpl * (buf->vb.height >> 1), 0,
743 buf->bpl, 0,
744 buf->vb.height >> 1);
745 break;
746 default:
747 BUG();
748 } 383 }
384 cx23885_risc_buffer(dev->pci, &buf->risc,
385 sgt->sgl, line0_offset,
386 line1_offset,
387 buf->bpl, buf->bpl,
388 dev->height >> 1);
389 break;
390 case V4L2_FIELD_SEQ_TB:
391 cx23885_risc_buffer(dev->pci, &buf->risc,
392 sgt->sgl,
393 0, buf->bpl * (dev->height >> 1),
394 buf->bpl, 0,
395 dev->height >> 1);
396 break;
397 case V4L2_FIELD_SEQ_BT:
398 cx23885_risc_buffer(dev->pci, &buf->risc,
399 sgt->sgl,
400 buf->bpl * (dev->height >> 1), 0,
401 buf->bpl, 0,
402 dev->height >> 1);
403 break;
404 default:
405 BUG();
749 } 406 }
750 dprintk(2, "[%p/%d] buffer_prep - %dx%d %dbpp \"%s\" - dma=0x%08lx\n", 407 dprintk(2, "[%p/%d] buffer_init - %dx%d %dbpp \"%s\" - dma=0x%08lx\n",
751 buf, buf->vb.i, 408 buf, buf->vb.v4l2_buf.index,
752 fh->width, fh->height, fh->fmt->depth, fh->fmt->name, 409 dev->width, dev->height, dev->fmt->depth, dev->fmt->name,
753 (unsigned long)buf->risc.dma); 410 (unsigned long)buf->risc.dma);
754
755 buf->vb.state = VIDEOBUF_PREPARED;
756 return 0; 411 return 0;
412}
413
414static void buffer_finish(struct vb2_buffer *vb)
415{
416 struct cx23885_dev *dev = vb->vb2_queue->drv_priv;
417 struct cx23885_buffer *buf = container_of(vb,
418 struct cx23885_buffer, vb);
419 struct sg_table *sgt = vb2_dma_sg_plane_desc(vb, 0);
420
421 cx23885_free_buffer(vb->vb2_queue->drv_priv, buf);
757 422
758 fail: 423 dma_unmap_sg(&dev->pci->dev, sgt->sgl, sgt->nents, DMA_FROM_DEVICE);
759 cx23885_free_buffer(q, buf);
760 return rc;
761} 424}
762 425
763static void buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb) 426/*
427 * The risc program for each buffer works as follows: it starts with a simple
428 * 'JUMP to addr + 12', which is effectively a NOP. Then the code to DMA the
429 * buffer follows and at the end we have a JUMP back to the start + 12 (skipping
430 * the initial JUMP).
431 *
432 * This is the risc program of the first buffer to be queued if the active list
433 * is empty and it just keeps DMAing this buffer without generating any
434 * interrupts.
435 *
436 * If a new buffer is added then the initial JUMP in the code for that buffer
437 * will generate an interrupt which signals that the previous buffer has been
438 * DMAed successfully and that it can be returned to userspace.
439 *
440 * It also sets the final jump of the previous buffer to the start of the new
441 * buffer, thus chaining the new buffer into the DMA chain. This is a single
442 * atomic u32 write, so there is no race condition.
443 *
444 * The end-result of all this that you only get an interrupt when a buffer
445 * is ready, so the control flow is very easy.
446 */
447static void buffer_queue(struct vb2_buffer *vb)
764{ 448{
449 struct cx23885_dev *dev = vb->vb2_queue->drv_priv;
765 struct cx23885_buffer *buf = container_of(vb, 450 struct cx23885_buffer *buf = container_of(vb,
766 struct cx23885_buffer, vb); 451 struct cx23885_buffer, vb);
767 struct cx23885_buffer *prev; 452 struct cx23885_buffer *prev;
768 struct cx23885_fh *fh = vq->priv_data;
769 struct cx23885_dev *dev = fh->dev;
770 struct cx23885_dmaqueue *q = &dev->vidq; 453 struct cx23885_dmaqueue *q = &dev->vidq;
454 unsigned long flags;
771 455
772 /* add jump to stopper */ 456 /* add jump to start */
773 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC); 457 buf->risc.cpu[1] = cpu_to_le32(buf->risc.dma + 12);
774 buf->risc.jmp[1] = cpu_to_le32(q->stopper.dma); 458 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_CNT_INC);
459 buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma + 12);
775 buf->risc.jmp[2] = cpu_to_le32(0); /* bits 63-32 */ 460 buf->risc.jmp[2] = cpu_to_le32(0); /* bits 63-32 */
776 461
777 if (!list_empty(&q->queued)) { 462 spin_lock_irqsave(&dev->slock, flags);
778 list_add_tail(&buf->vb.queue, &q->queued); 463 if (list_empty(&q->active)) {
779 buf->vb.state = VIDEOBUF_QUEUED; 464 list_add_tail(&buf->queue, &q->active);
780 dprintk(2, "[%p/%d] buffer_queue - append to queued\n",
781 buf, buf->vb.i);
782
783 } else if (list_empty(&q->active)) {
784 list_add_tail(&buf->vb.queue, &q->active);
785 cx23885_start_video_dma(dev, q, buf);
786 buf->vb.state = VIDEOBUF_ACTIVE;
787 buf->count = q->count++;
788 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
789 dprintk(2, "[%p/%d] buffer_queue - first active\n", 465 dprintk(2, "[%p/%d] buffer_queue - first active\n",
790 buf, buf->vb.i); 466 buf, buf->vb.v4l2_buf.index);
791
792 } else { 467 } else {
468 buf->risc.cpu[0] |= cpu_to_le32(RISC_IRQ1);
793 prev = list_entry(q->active.prev, struct cx23885_buffer, 469 prev = list_entry(q->active.prev, struct cx23885_buffer,
794 vb.queue); 470 queue);
795 if (prev->vb.width == buf->vb.width && 471 list_add_tail(&buf->queue, &q->active);
796 prev->vb.height == buf->vb.height && 472 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
797 prev->fmt == buf->fmt) { 473 dprintk(2, "[%p/%d] buffer_queue - append to active\n",
798 list_add_tail(&buf->vb.queue, &q->active); 474 buf, buf->vb.v4l2_buf.index);
799 buf->vb.state = VIDEOBUF_ACTIVE;
800 buf->count = q->count++;
801 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
802 /* 64 bit bits 63-32 */
803 prev->risc.jmp[2] = cpu_to_le32(0);
804 dprintk(2, "[%p/%d] buffer_queue - append to active\n",
805 buf, buf->vb.i);
806
807 } else {
808 list_add_tail(&buf->vb.queue, &q->queued);
809 buf->vb.state = VIDEOBUF_QUEUED;
810 dprintk(2, "[%p/%d] buffer_queue - first queued\n",
811 buf, buf->vb.i);
812 }
813 }
814}
815
816static void buffer_release(struct videobuf_queue *q,
817 struct videobuf_buffer *vb)
818{
819 struct cx23885_buffer *buf = container_of(vb,
820 struct cx23885_buffer, vb);
821
822 cx23885_free_buffer(q, buf);
823}
824
825static struct videobuf_queue_ops cx23885_video_qops = {
826 .buf_setup = buffer_setup,
827 .buf_prepare = buffer_prepare,
828 .buf_queue = buffer_queue,
829 .buf_release = buffer_release,
830};
831
832static struct videobuf_queue *get_queue(struct cx23885_fh *fh)
833{
834 switch (fh->type) {
835 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
836 return &fh->vidq;
837 case V4L2_BUF_TYPE_VBI_CAPTURE:
838 return &fh->vbiq;
839 default:
840 BUG();
841 return NULL;
842 }
843}
844
845static int get_resource(struct cx23885_fh *fh)
846{
847 switch (fh->type) {
848 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
849 return RESOURCE_VIDEO;
850 case V4L2_BUF_TYPE_VBI_CAPTURE:
851 return RESOURCE_VBI;
852 default:
853 BUG();
854 return 0;
855 } 475 }
476 spin_unlock_irqrestore(&dev->slock, flags);
856} 477}
857 478
858static int video_open(struct file *file) 479static int cx23885_start_streaming(struct vb2_queue *q, unsigned int count)
859{ 480{
860 struct video_device *vdev = video_devdata(file); 481 struct cx23885_dev *dev = q->drv_priv;
861 struct cx23885_dev *dev = video_drvdata(file); 482 struct cx23885_dmaqueue *dmaq = &dev->vidq;
862 struct cx23885_fh *fh; 483 struct cx23885_buffer *buf = list_entry(dmaq->active.next,
863 enum v4l2_buf_type type = 0; 484 struct cx23885_buffer, queue);
864 int radio = 0;
865
866 switch (vdev->vfl_type) {
867 case VFL_TYPE_GRABBER:
868 type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
869 break;
870 case VFL_TYPE_VBI:
871 type = V4L2_BUF_TYPE_VBI_CAPTURE;
872 break;
873 case VFL_TYPE_RADIO:
874 radio = 1;
875 break;
876 }
877
878 dprintk(1, "open dev=%s radio=%d type=%s\n",
879 video_device_node_name(vdev), radio, v4l2_type_names[type]);
880
881 /* allocate + initialize per filehandle data */
882 fh = kzalloc(sizeof(*fh), GFP_KERNEL);
883 if (NULL == fh)
884 return -ENOMEM;
885
886 file->private_data = fh;
887 fh->dev = dev;
888 fh->radio = radio;
889 fh->type = type;
890 fh->width = 320;
891 fh->height = 240;
892 fh->fmt = format_by_fourcc(V4L2_PIX_FMT_YUYV);
893
894 videobuf_queue_sg_init(&fh->vidq, &cx23885_video_qops,
895 &dev->pci->dev, &dev->slock,
896 V4L2_BUF_TYPE_VIDEO_CAPTURE,
897 V4L2_FIELD_INTERLACED,
898 sizeof(struct cx23885_buffer),
899 fh, NULL);
900
901 videobuf_queue_sg_init(&fh->vbiq, &cx23885_vbi_qops,
902 &dev->pci->dev, &dev->slock,
903 V4L2_BUF_TYPE_VBI_CAPTURE,
904 V4L2_FIELD_SEQ_TB,
905 sizeof(struct cx23885_buffer),
906 fh, NULL);
907
908
909 dprintk(1, "post videobuf_queue_init()\n");
910 485
486 cx23885_start_video_dma(dev, dmaq, buf);
911 return 0; 487 return 0;
912} 488}
913 489
914static ssize_t video_read(struct file *file, char __user *data, 490static void cx23885_stop_streaming(struct vb2_queue *q)
915 size_t count, loff_t *ppos)
916{ 491{
917 struct cx23885_fh *fh = file->private_data; 492 struct cx23885_dev *dev = q->drv_priv;
918 493 struct cx23885_dmaqueue *dmaq = &dev->vidq;
919 switch (fh->type) { 494 unsigned long flags;
920 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
921 if (res_locked(fh->dev, RESOURCE_VIDEO))
922 return -EBUSY;
923 return videobuf_read_one(&fh->vidq, data, count, ppos,
924 file->f_flags & O_NONBLOCK);
925 case V4L2_BUF_TYPE_VBI_CAPTURE:
926 if (!res_get(fh->dev, fh, RESOURCE_VBI))
927 return -EBUSY;
928 return videobuf_read_stream(&fh->vbiq, data, count, ppos, 1,
929 file->f_flags & O_NONBLOCK);
930 default:
931 BUG();
932 return 0;
933 }
934}
935
936static unsigned int video_poll(struct file *file,
937 struct poll_table_struct *wait)
938{
939 struct cx23885_fh *fh = file->private_data;
940 struct cx23885_buffer *buf;
941 unsigned int rc = POLLERR;
942
943 if (V4L2_BUF_TYPE_VBI_CAPTURE == fh->type) {
944 if (!res_get(fh->dev, fh, RESOURCE_VBI))
945 return POLLERR;
946 return videobuf_poll_stream(file, &fh->vbiq, wait);
947 }
948
949 mutex_lock(&fh->vidq.vb_lock);
950 if (res_check(fh, RESOURCE_VIDEO)) {
951 /* streaming capture */
952 if (list_empty(&fh->vidq.stream))
953 goto done;
954 buf = list_entry(fh->vidq.stream.next,
955 struct cx23885_buffer, vb.stream);
956 } else {
957 /* read() capture */
958 buf = (struct cx23885_buffer *)fh->vidq.read_buf;
959 if (NULL == buf)
960 goto done;
961 }
962 poll_wait(file, &buf->vb.done, wait);
963 if (buf->vb.state == VIDEOBUF_DONE ||
964 buf->vb.state == VIDEOBUF_ERROR)
965 rc = POLLIN|POLLRDNORM;
966 else
967 rc = 0;
968done:
969 mutex_unlock(&fh->vidq.vb_lock);
970 return rc;
971}
972
973static int video_release(struct file *file)
974{
975 struct cx23885_fh *fh = file->private_data;
976 struct cx23885_dev *dev = fh->dev;
977
978 /* turn off overlay */
979 if (res_check(fh, RESOURCE_OVERLAY)) {
980 /* FIXME */
981 res_free(dev, fh, RESOURCE_OVERLAY);
982 }
983 495
984 /* stop video capture */ 496 cx_clear(VID_A_DMA_CTL, 0x11);
985 if (res_check(fh, RESOURCE_VIDEO)) { 497 spin_lock_irqsave(&dev->slock, flags);
986 videobuf_queue_cancel(&fh->vidq); 498 while (!list_empty(&dmaq->active)) {
987 res_free(dev, fh, RESOURCE_VIDEO); 499 struct cx23885_buffer *buf = list_entry(dmaq->active.next,
988 } 500 struct cx23885_buffer, queue);
989 if (fh->vidq.read_buf) {
990 buffer_release(&fh->vidq, fh->vidq.read_buf);
991 kfree(fh->vidq.read_buf);
992 }
993 501
994 /* stop vbi capture */ 502 list_del(&buf->queue);
995 if (res_check(fh, RESOURCE_VBI)) { 503 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
996 if (fh->vbiq.streaming)
997 videobuf_streamoff(&fh->vbiq);
998 if (fh->vbiq.reading)
999 videobuf_read_stop(&fh->vbiq);
1000 res_free(dev, fh, RESOURCE_VBI);
1001 } 504 }
1002 505 spin_unlock_irqrestore(&dev->slock, flags);
1003 videobuf_mmap_free(&fh->vidq);
1004 videobuf_mmap_free(&fh->vbiq);
1005
1006 file->private_data = NULL;
1007 kfree(fh);
1008
1009 /* We are not putting the tuner to sleep here on exit, because
1010 * we want to use the mpeg encoder in another session to capture
1011 * tuner video. Closing this will result in no video to the encoder.
1012 */
1013
1014 return 0;
1015}
1016
1017static int video_mmap(struct file *file, struct vm_area_struct *vma)
1018{
1019 struct cx23885_fh *fh = file->private_data;
1020
1021 return videobuf_mmap_mapper(get_queue(fh), vma);
1022}
1023
1024/* ------------------------------------------------------------------ */
1025/* VIDEO CTRL IOCTLS */
1026
1027int cx23885_get_control(struct cx23885_dev *dev,
1028 struct v4l2_control *ctl)
1029{
1030 dprintk(1, "%s() calling cx25840(VIDIOC_G_CTRL)\n", __func__);
1031 call_all(dev, core, g_ctrl, ctl);
1032 return 0;
1033}
1034
1035int cx23885_set_control(struct cx23885_dev *dev,
1036 struct v4l2_control *ctl)
1037{
1038 dprintk(1, "%s() calling cx25840(VIDIOC_S_CTRL)\n", __func__);
1039 call_all(dev, core, s_ctrl, ctl);
1040
1041 return 0;
1042} 506}
1043 507
1044static void init_controls(struct cx23885_dev *dev) 508static struct vb2_ops cx23885_video_qops = {
1045{ 509 .queue_setup = queue_setup,
1046 struct v4l2_control ctrl; 510 .buf_prepare = buffer_prepare,
1047 int i; 511 .buf_finish = buffer_finish,
1048 512 .buf_queue = buffer_queue,
1049 for (i = 0; i < CX23885_CTLS; i++) { 513 .wait_prepare = vb2_ops_wait_prepare,
1050 ctrl.id = cx23885_ctls[i].v.id; 514 .wait_finish = vb2_ops_wait_finish,
1051 ctrl.value = cx23885_ctls[i].v.default_value; 515 .start_streaming = cx23885_start_streaming,
1052 516 .stop_streaming = cx23885_stop_streaming,
1053 cx23885_set_control(dev, &ctrl); 517};
1054 }
1055}
1056 518
1057/* ------------------------------------------------------------------ */ 519/* ------------------------------------------------------------------ */
1058/* VIDEO IOCTLS */ 520/* VIDEO IOCTLS */
@@ -1060,16 +522,17 @@ static void init_controls(struct cx23885_dev *dev)
1060static int vidioc_g_fmt_vid_cap(struct file *file, void *priv, 522static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
1061 struct v4l2_format *f) 523 struct v4l2_format *f)
1062{ 524{
1063 struct cx23885_fh *fh = priv; 525 struct cx23885_dev *dev = video_drvdata(file);
1064 526
1065 f->fmt.pix.width = fh->width; 527 f->fmt.pix.width = dev->width;
1066 f->fmt.pix.height = fh->height; 528 f->fmt.pix.height = dev->height;
1067 f->fmt.pix.field = fh->vidq.field; 529 f->fmt.pix.field = dev->field;
1068 f->fmt.pix.pixelformat = fh->fmt->fourcc; 530 f->fmt.pix.pixelformat = dev->fmt->fourcc;
1069 f->fmt.pix.bytesperline = 531 f->fmt.pix.bytesperline =
1070 (f->fmt.pix.width * fh->fmt->depth) >> 3; 532 (f->fmt.pix.width * dev->fmt->depth) >> 3;
1071 f->fmt.pix.sizeimage = 533 f->fmt.pix.sizeimage =
1072 f->fmt.pix.height * f->fmt.pix.bytesperline; 534 f->fmt.pix.height * f->fmt.pix.bytesperline;
535 f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
1073 536
1074 return 0; 537 return 0;
1075} 538}
@@ -1077,7 +540,7 @@ static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
1077static int vidioc_try_fmt_vid_cap(struct file *file, void *priv, 540static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
1078 struct v4l2_format *f) 541 struct v4l2_format *f)
1079{ 542{
1080 struct cx23885_dev *dev = ((struct cx23885_fh *)priv)->dev; 543 struct cx23885_dev *dev = video_drvdata(file);
1081 struct cx23885_fmt *fmt; 544 struct cx23885_fmt *fmt;
1082 enum v4l2_field field; 545 enum v4l2_field field;
1083 unsigned int maxw, maxh; 546 unsigned int maxw, maxh;
@@ -1102,9 +565,12 @@ static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
1102 maxh = maxh / 2; 565 maxh = maxh / 2;
1103 break; 566 break;
1104 case V4L2_FIELD_INTERLACED: 567 case V4L2_FIELD_INTERLACED:
568 case V4L2_FIELD_SEQ_TB:
569 case V4L2_FIELD_SEQ_BT:
1105 break; 570 break;
1106 default: 571 default:
1107 return -EINVAL; 572 field = V4L2_FIELD_INTERLACED;
573 break;
1108 } 574 }
1109 575
1110 f->fmt.pix.field = field; 576 f->fmt.pix.field = field;
@@ -1114,6 +580,7 @@ static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
1114 (f->fmt.pix.width * fmt->depth) >> 3; 580 (f->fmt.pix.width * fmt->depth) >> 3;
1115 f->fmt.pix.sizeimage = 581 f->fmt.pix.sizeimage =
1116 f->fmt.pix.height * f->fmt.pix.bytesperline; 582 f->fmt.pix.height * f->fmt.pix.bytesperline;
583 f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
1117 584
1118 return 0; 585 return 0;
1119} 586}
@@ -1121,8 +588,7 @@ static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
1121static int vidioc_s_fmt_vid_cap(struct file *file, void *priv, 588static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
1122 struct v4l2_format *f) 589 struct v4l2_format *f)
1123{ 590{
1124 struct cx23885_fh *fh = priv; 591 struct cx23885_dev *dev = video_drvdata(file);
1125 struct cx23885_dev *dev = ((struct cx23885_fh *)priv)->dev;
1126 struct v4l2_mbus_framefmt mbus_fmt; 592 struct v4l2_mbus_framefmt mbus_fmt;
1127 int err; 593 int err;
1128 594
@@ -1131,34 +597,44 @@ static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
1131 597
1132 if (0 != err) 598 if (0 != err)
1133 return err; 599 return err;
1134 fh->fmt = format_by_fourcc(f->fmt.pix.pixelformat); 600
1135 fh->width = f->fmt.pix.width; 601 if (vb2_is_busy(&dev->vb2_vidq) || vb2_is_busy(&dev->vb2_vbiq) ||
1136 fh->height = f->fmt.pix.height; 602 vb2_is_busy(&dev->vb2_mpegq))
1137 fh->vidq.field = f->fmt.pix.field; 603 return -EBUSY;
604
605 dev->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
606 dev->width = f->fmt.pix.width;
607 dev->height = f->fmt.pix.height;
608 dev->field = f->fmt.pix.field;
1138 dprintk(2, "%s() width=%d height=%d field=%d\n", __func__, 609 dprintk(2, "%s() width=%d height=%d field=%d\n", __func__,
1139 fh->width, fh->height, fh->vidq.field); 610 dev->width, dev->height, dev->field);
1140 v4l2_fill_mbus_format(&mbus_fmt, &f->fmt.pix, V4L2_MBUS_FMT_FIXED); 611 v4l2_fill_mbus_format(&mbus_fmt, &f->fmt.pix, V4L2_MBUS_FMT_FIXED);
1141 call_all(dev, video, s_mbus_fmt, &mbus_fmt); 612 call_all(dev, video, s_mbus_fmt, &mbus_fmt);
1142 v4l2_fill_pix_format(&f->fmt.pix, &mbus_fmt); 613 v4l2_fill_pix_format(&f->fmt.pix, &mbus_fmt);
614 /* s_mbus_fmt overwrites f->fmt.pix.field, restore it */
615 f->fmt.pix.field = dev->field;
1143 return 0; 616 return 0;
1144} 617}
1145 618
1146static int vidioc_querycap(struct file *file, void *priv, 619static int vidioc_querycap(struct file *file, void *priv,
1147 struct v4l2_capability *cap) 620 struct v4l2_capability *cap)
1148{ 621{
1149 struct cx23885_dev *dev = ((struct cx23885_fh *)priv)->dev; 622 struct cx23885_dev *dev = video_drvdata(file);
623 struct video_device *vdev = video_devdata(file);
1150 624
1151 strcpy(cap->driver, "cx23885"); 625 strcpy(cap->driver, "cx23885");
1152 strlcpy(cap->card, cx23885_boards[dev->board].name, 626 strlcpy(cap->card, cx23885_boards[dev->board].name,
1153 sizeof(cap->card)); 627 sizeof(cap->card));
1154 sprintf(cap->bus_info, "PCIe:%s", pci_name(dev->pci)); 628 sprintf(cap->bus_info, "PCIe:%s", pci_name(dev->pci));
1155 cap->capabilities = 629 cap->device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING | V4L2_CAP_AUDIO;
1156 V4L2_CAP_VIDEO_CAPTURE |
1157 V4L2_CAP_READWRITE |
1158 V4L2_CAP_STREAMING |
1159 V4L2_CAP_VBI_CAPTURE;
1160 if (dev->tuner_type != TUNER_ABSENT) 630 if (dev->tuner_type != TUNER_ABSENT)
1161 cap->capabilities |= V4L2_CAP_TUNER; 631 cap->device_caps |= V4L2_CAP_TUNER;
632 if (vdev->vfl_type == VFL_TYPE_VBI)
633 cap->device_caps |= V4L2_CAP_VBI_CAPTURE;
634 else
635 cap->device_caps |= V4L2_CAP_VIDEO_CAPTURE;
636 cap->capabilities = cap->device_caps | V4L2_CAP_VBI_CAPTURE |
637 V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_DEVICE_CAPS;
1162 return 0; 638 return 0;
1163} 639}
1164 640
@@ -1175,85 +651,9 @@ static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
1175 return 0; 651 return 0;
1176} 652}
1177 653
1178static int vidioc_reqbufs(struct file *file, void *priv,
1179 struct v4l2_requestbuffers *p)
1180{
1181 struct cx23885_fh *fh = priv;
1182 return videobuf_reqbufs(get_queue(fh), p);
1183}
1184
1185static int vidioc_querybuf(struct file *file, void *priv,
1186 struct v4l2_buffer *p)
1187{
1188 struct cx23885_fh *fh = priv;
1189 return videobuf_querybuf(get_queue(fh), p);
1190}
1191
1192static int vidioc_qbuf(struct file *file, void *priv,
1193 struct v4l2_buffer *p)
1194{
1195 struct cx23885_fh *fh = priv;
1196 return videobuf_qbuf(get_queue(fh), p);
1197}
1198
1199static int vidioc_dqbuf(struct file *file, void *priv,
1200 struct v4l2_buffer *p)
1201{
1202 struct cx23885_fh *fh = priv;
1203 return videobuf_dqbuf(get_queue(fh), p,
1204 file->f_flags & O_NONBLOCK);
1205}
1206
1207static int vidioc_streamon(struct file *file, void *priv,
1208 enum v4l2_buf_type i)
1209{
1210 struct cx23885_fh *fh = priv;
1211 struct cx23885_dev *dev = fh->dev;
1212 dprintk(1, "%s()\n", __func__);
1213
1214 if ((fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) &&
1215 (fh->type != V4L2_BUF_TYPE_VBI_CAPTURE))
1216 return -EINVAL;
1217 if (unlikely(i != fh->type))
1218 return -EINVAL;
1219
1220 if (unlikely(!res_get(dev, fh, get_resource(fh))))
1221 return -EBUSY;
1222
1223 /* Don't start VBI streaming unless vida streaming
1224 * has already started.
1225 */
1226 if ((fh->type == V4L2_BUF_TYPE_VBI_CAPTURE) &&
1227 ((cx_read(VID_A_DMA_CTL) & 0x11) == 0))
1228 return -EINVAL;
1229
1230 return videobuf_streamon(get_queue(fh));
1231}
1232
1233static int vidioc_streamoff(struct file *file, void *priv, enum v4l2_buf_type i)
1234{
1235 struct cx23885_fh *fh = priv;
1236 struct cx23885_dev *dev = fh->dev;
1237 int err, res;
1238 dprintk(1, "%s()\n", __func__);
1239
1240 if ((fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) &&
1241 (fh->type != V4L2_BUF_TYPE_VBI_CAPTURE))
1242 return -EINVAL;
1243 if (i != fh->type)
1244 return -EINVAL;
1245
1246 res = get_resource(fh);
1247 err = videobuf_streamoff(get_queue(fh));
1248 if (err < 0)
1249 return err;
1250 res_free(dev, fh, res);
1251 return 0;
1252}
1253
1254static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *id) 654static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *id)
1255{ 655{
1256 struct cx23885_dev *dev = ((struct cx23885_fh *)priv)->dev; 656 struct cx23885_dev *dev = video_drvdata(file);
1257 dprintk(1, "%s()\n", __func__); 657 dprintk(1, "%s()\n", __func__);
1258 658
1259 *id = dev->tvnorm; 659 *id = dev->tvnorm;
@@ -1262,14 +662,10 @@ static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *id)
1262 662
1263static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id tvnorms) 663static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id tvnorms)
1264{ 664{
1265 struct cx23885_dev *dev = ((struct cx23885_fh *)priv)->dev; 665 struct cx23885_dev *dev = video_drvdata(file);
1266 dprintk(1, "%s()\n", __func__); 666 dprintk(1, "%s()\n", __func__);
1267 667
1268 mutex_lock(&dev->lock); 668 return cx23885_set_tvnorm(dev, tvnorms);
1269 cx23885_set_tvnorm(dev, tvnorms);
1270 mutex_unlock(&dev->lock);
1271
1272 return 0;
1273} 669}
1274 670
1275int cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i) 671int cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i)
@@ -1299,16 +695,16 @@ int cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i)
1299 i->index = n; 695 i->index = n;
1300 i->type = V4L2_INPUT_TYPE_CAMERA; 696 i->type = V4L2_INPUT_TYPE_CAMERA;
1301 strcpy(i->name, iname[INPUT(n)->type]); 697 strcpy(i->name, iname[INPUT(n)->type]);
698 i->std = CX23885_NORMS;
1302 if ((CX23885_VMUX_TELEVISION == INPUT(n)->type) || 699 if ((CX23885_VMUX_TELEVISION == INPUT(n)->type) ||
1303 (CX23885_VMUX_CABLE == INPUT(n)->type)) { 700 (CX23885_VMUX_CABLE == INPUT(n)->type)) {
1304 i->type = V4L2_INPUT_TYPE_TUNER; 701 i->type = V4L2_INPUT_TYPE_TUNER;
1305 i->std = CX23885_NORMS; 702 i->audioset = 4;
703 } else {
704 /* Two selectable audio inputs for non-tv inputs */
705 i->audioset = 3;
1306 } 706 }
1307 707
1308 /* Two selectable audio inputs for non-tv inputs */
1309 if (INPUT(n)->type != CX23885_VMUX_TELEVISION)
1310 i->audioset = 0x3;
1311
1312 if (dev->input == n) { 708 if (dev->input == n) {
1313 /* enum'd input matches our configured input. 709 /* enum'd input matches our configured input.
1314 * Ask the video decoder to process the call 710 * Ask the video decoder to process the call
@@ -1324,14 +720,14 @@ int cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i)
1324static int vidioc_enum_input(struct file *file, void *priv, 720static int vidioc_enum_input(struct file *file, void *priv,
1325 struct v4l2_input *i) 721 struct v4l2_input *i)
1326{ 722{
1327 struct cx23885_dev *dev = ((struct cx23885_fh *)priv)->dev; 723 struct cx23885_dev *dev = video_drvdata(file);
1328 dprintk(1, "%s()\n", __func__); 724 dprintk(1, "%s()\n", __func__);
1329 return cx23885_enum_input(dev, i); 725 return cx23885_enum_input(dev, i);
1330} 726}
1331 727
1332int cx23885_get_input(struct file *file, void *priv, unsigned int *i) 728int cx23885_get_input(struct file *file, void *priv, unsigned int *i)
1333{ 729{
1334 struct cx23885_dev *dev = ((struct cx23885_fh *)priv)->dev; 730 struct cx23885_dev *dev = video_drvdata(file);
1335 731
1336 *i = dev->input; 732 *i = dev->input;
1337 dprintk(1, "%s() returns %d\n", __func__, *i); 733 dprintk(1, "%s() returns %d\n", __func__, *i);
@@ -1345,7 +741,7 @@ static int vidioc_g_input(struct file *file, void *priv, unsigned int *i)
1345 741
1346int cx23885_set_input(struct file *file, void *priv, unsigned int i) 742int cx23885_set_input(struct file *file, void *priv, unsigned int i)
1347{ 743{
1348 struct cx23885_dev *dev = ((struct cx23885_fh *)priv)->dev; 744 struct cx23885_dev *dev = video_drvdata(file);
1349 745
1350 dprintk(1, "%s(%d)\n", __func__, i); 746 dprintk(1, "%s(%d)\n", __func__, i);
1351 747
@@ -1357,13 +753,11 @@ int cx23885_set_input(struct file *file, void *priv, unsigned int i)
1357 if (INPUT(i)->type == 0) 753 if (INPUT(i)->type == 0)
1358 return -EINVAL; 754 return -EINVAL;
1359 755
1360 mutex_lock(&dev->lock);
1361 cx23885_video_mux(dev, i); 756 cx23885_video_mux(dev, i);
1362 757
1363 /* By default establish the default audio input for the card also */ 758 /* By default establish the default audio input for the card also */
1364 /* Caller is free to use VIDIOC_S_AUDIO to override afterwards */ 759 /* Caller is free to use VIDIOC_S_AUDIO to override afterwards */
1365 cx23885_audio_mux(dev, i); 760 cx23885_audio_mux(dev, i);
1366 mutex_unlock(&dev->lock);
1367 return 0; 761 return 0;
1368} 762}
1369 763
@@ -1374,39 +768,32 @@ static int vidioc_s_input(struct file *file, void *priv, unsigned int i)
1374 768
1375static int vidioc_log_status(struct file *file, void *priv) 769static int vidioc_log_status(struct file *file, void *priv)
1376{ 770{
1377 struct cx23885_fh *fh = priv; 771 struct cx23885_dev *dev = video_drvdata(file);
1378 struct cx23885_dev *dev = fh->dev;
1379 772
1380 printk(KERN_INFO
1381 "%s/0: ============ START LOG STATUS ============\n",
1382 dev->name);
1383 call_all(dev, core, log_status); 773 call_all(dev, core, log_status);
1384 printk(KERN_INFO
1385 "%s/0: ============= END LOG STATUS =============\n",
1386 dev->name);
1387 return 0; 774 return 0;
1388} 775}
1389 776
1390static int cx23885_query_audinput(struct file *file, void *priv, 777static int cx23885_query_audinput(struct file *file, void *priv,
1391 struct v4l2_audio *i) 778 struct v4l2_audio *i)
1392{ 779{
1393 struct cx23885_dev *dev = ((struct cx23885_fh *)priv)->dev; 780 struct cx23885_dev *dev = video_drvdata(file);
1394 static const char *iname[] = { 781 static const char *iname[] = {
1395 [0] = "Baseband L/R 1", 782 [0] = "Baseband L/R 1",
1396 [1] = "Baseband L/R 2", 783 [1] = "Baseband L/R 2",
784 [2] = "TV",
1397 }; 785 };
1398 unsigned int n; 786 unsigned int n;
1399 dprintk(1, "%s()\n", __func__); 787 dprintk(1, "%s()\n", __func__);
1400 788
1401 n = i->index; 789 n = i->index;
1402 if (n >= 2) 790 if (n >= 3)
1403 return -EINVAL; 791 return -EINVAL;
1404 792
1405 memset(i, 0, sizeof(*i)); 793 memset(i, 0, sizeof(*i));
1406 i->index = n; 794 i->index = n;
1407 strcpy(i->name, iname[n]); 795 strcpy(i->name, iname[n]);
1408 i->capability = V4L2_AUDCAP_STEREO; 796 i->capability = V4L2_AUDCAP_STEREO;
1409 i->mode = V4L2_AUDMODE_AVL;
1410 return 0; 797 return 0;
1411 798
1412} 799}
@@ -1420,9 +807,13 @@ static int vidioc_enum_audinput(struct file *file, void *priv,
1420static int vidioc_g_audinput(struct file *file, void *priv, 807static int vidioc_g_audinput(struct file *file, void *priv,
1421 struct v4l2_audio *i) 808 struct v4l2_audio *i)
1422{ 809{
1423 struct cx23885_dev *dev = ((struct cx23885_fh *)priv)->dev; 810 struct cx23885_dev *dev = video_drvdata(file);
1424 811
1425 i->index = dev->audinput; 812 if ((CX23885_VMUX_TELEVISION == INPUT(dev->input)->type) ||
813 (CX23885_VMUX_CABLE == INPUT(dev->input)->type))
814 i->index = 2;
815 else
816 i->index = dev->audinput;
1426 dprintk(1, "%s(input=%d)\n", __func__, i->index); 817 dprintk(1, "%s(input=%d)\n", __func__, i->index);
1427 818
1428 return cx23885_query_audinput(file, priv, i); 819 return cx23885_query_audinput(file, priv, i);
@@ -1431,8 +822,13 @@ static int vidioc_g_audinput(struct file *file, void *priv,
1431static int vidioc_s_audinput(struct file *file, void *priv, 822static int vidioc_s_audinput(struct file *file, void *priv,
1432 const struct v4l2_audio *i) 823 const struct v4l2_audio *i)
1433{ 824{
1434 struct cx23885_dev *dev = ((struct cx23885_fh *)priv)->dev; 825 struct cx23885_dev *dev = video_drvdata(file);
1435 if (i->index >= 2) 826
827 if ((CX23885_VMUX_TELEVISION == INPUT(dev->input)->type) ||
828 (CX23885_VMUX_CABLE == INPUT(dev->input)->type)) {
829 return i->index != 2 ? -EINVAL : 0;
830 }
831 if (i->index > 1)
1436 return -EINVAL; 832 return -EINVAL;
1437 833
1438 dprintk(1, "%s(%d)\n", __func__, i->index); 834 dprintk(1, "%s(%d)\n", __func__, i->index);
@@ -1445,35 +841,10 @@ static int vidioc_s_audinput(struct file *file, void *priv,
1445 return 0; 841 return 0;
1446} 842}
1447 843
1448static int vidioc_queryctrl(struct file *file, void *priv,
1449 struct v4l2_queryctrl *qctrl)
1450{
1451 qctrl->id = v4l2_ctrl_next(ctrl_classes, qctrl->id);
1452 if (unlikely(qctrl->id == 0))
1453 return -EINVAL;
1454 return cx23885_ctrl_query(qctrl);
1455}
1456
1457static int vidioc_g_ctrl(struct file *file, void *priv,
1458 struct v4l2_control *ctl)
1459{
1460 struct cx23885_dev *dev = ((struct cx23885_fh *)priv)->dev;
1461
1462 return cx23885_get_control(dev, ctl);
1463}
1464
1465static int vidioc_s_ctrl(struct file *file, void *priv,
1466 struct v4l2_control *ctl)
1467{
1468 struct cx23885_dev *dev = ((struct cx23885_fh *)priv)->dev;
1469
1470 return cx23885_set_control(dev, ctl);
1471}
1472
1473static int vidioc_g_tuner(struct file *file, void *priv, 844static int vidioc_g_tuner(struct file *file, void *priv,
1474 struct v4l2_tuner *t) 845 struct v4l2_tuner *t)
1475{ 846{
1476 struct cx23885_dev *dev = ((struct cx23885_fh *)priv)->dev; 847 struct cx23885_dev *dev = video_drvdata(file);
1477 848
1478 if (dev->tuner_type == TUNER_ABSENT) 849 if (dev->tuner_type == TUNER_ABSENT)
1479 return -EINVAL; 850 return -EINVAL;
@@ -1489,7 +860,7 @@ static int vidioc_g_tuner(struct file *file, void *priv,
1489static int vidioc_s_tuner(struct file *file, void *priv, 860static int vidioc_s_tuner(struct file *file, void *priv,
1490 const struct v4l2_tuner *t) 861 const struct v4l2_tuner *t)
1491{ 862{
1492 struct cx23885_dev *dev = ((struct cx23885_fh *)priv)->dev; 863 struct cx23885_dev *dev = video_drvdata(file);
1493 864
1494 if (dev->tuner_type == TUNER_ABSENT) 865 if (dev->tuner_type == TUNER_ABSENT)
1495 return -EINVAL; 866 return -EINVAL;
@@ -1504,14 +875,12 @@ static int vidioc_s_tuner(struct file *file, void *priv,
1504static int vidioc_g_frequency(struct file *file, void *priv, 875static int vidioc_g_frequency(struct file *file, void *priv,
1505 struct v4l2_frequency *f) 876 struct v4l2_frequency *f)
1506{ 877{
1507 struct cx23885_fh *fh = priv; 878 struct cx23885_dev *dev = video_drvdata(file);
1508 struct cx23885_dev *dev = fh->dev;
1509 879
1510 if (dev->tuner_type == TUNER_ABSENT) 880 if (dev->tuner_type == TUNER_ABSENT)
1511 return -EINVAL; 881 return -EINVAL;
1512 882
1513 /* f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; */ 883 f->type = V4L2_TUNER_ANALOG_TV;
1514 f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
1515 f->frequency = dev->freq; 884 f->frequency = dev->freq;
1516 885
1517 call_all(dev, tuner, g_frequency, f); 886 call_all(dev, tuner, g_frequency, f);
@@ -1521,20 +890,23 @@ static int vidioc_g_frequency(struct file *file, void *priv,
1521 890
1522static int cx23885_set_freq(struct cx23885_dev *dev, const struct v4l2_frequency *f) 891static int cx23885_set_freq(struct cx23885_dev *dev, const struct v4l2_frequency *f)
1523{ 892{
1524 struct v4l2_control ctrl; 893 struct v4l2_ctrl *mute;
894 int old_mute_val = 1;
1525 895
1526 if (dev->tuner_type == TUNER_ABSENT) 896 if (dev->tuner_type == TUNER_ABSENT)
1527 return -EINVAL; 897 return -EINVAL;
1528 if (unlikely(f->tuner != 0)) 898 if (unlikely(f->tuner != 0))
1529 return -EINVAL; 899 return -EINVAL;
1530 900
1531 mutex_lock(&dev->lock);
1532 dev->freq = f->frequency; 901 dev->freq = f->frequency;
1533 902
1534 /* I need to mute audio here */ 903 /* I need to mute audio here */
1535 ctrl.id = V4L2_CID_AUDIO_MUTE; 904 mute = v4l2_ctrl_find(&dev->ctrl_handler, V4L2_CID_AUDIO_MUTE);
1536 ctrl.value = 1; 905 if (mute) {
1537 cx23885_set_control(dev, &ctrl); 906 old_mute_val = v4l2_ctrl_g_ctrl(mute);
907 if (!old_mute_val)
908 v4l2_ctrl_s_ctrl(mute, 1);
909 }
1538 910
1539 call_all(dev, tuner, s_frequency, f); 911 call_all(dev, tuner, s_frequency, f);
1540 912
@@ -1542,10 +914,8 @@ static int cx23885_set_freq(struct cx23885_dev *dev, const struct v4l2_frequency
1542 msleep(100); 914 msleep(100);
1543 915
1544 /* I need to unmute audio here */ 916 /* I need to unmute audio here */
1545 ctrl.value = 0; 917 if (old_mute_val == 0)
1546 cx23885_set_control(dev, &ctrl); 918 v4l2_ctrl_s_ctrl(mute, old_mute_val);
1547
1548 mutex_unlock(&dev->lock);
1549 919
1550 return 0; 920 return 0;
1551} 921}
@@ -1553,8 +923,9 @@ static int cx23885_set_freq(struct cx23885_dev *dev, const struct v4l2_frequency
1553static int cx23885_set_freq_via_ops(struct cx23885_dev *dev, 923static int cx23885_set_freq_via_ops(struct cx23885_dev *dev,
1554 const struct v4l2_frequency *f) 924 const struct v4l2_frequency *f)
1555{ 925{
1556 struct v4l2_control ctrl; 926 struct v4l2_ctrl *mute;
1557 struct videobuf_dvb_frontend *vfe; 927 int old_mute_val = 1;
928 struct vb2_dvb_frontend *vfe;
1558 struct dvb_frontend *fe; 929 struct dvb_frontend *fe;
1559 930
1560 struct analog_parameters params = { 931 struct analog_parameters params = {
@@ -1564,21 +935,22 @@ static int cx23885_set_freq_via_ops(struct cx23885_dev *dev,
1564 .frequency = f->frequency 935 .frequency = f->frequency
1565 }; 936 };
1566 937
1567 mutex_lock(&dev->lock);
1568 dev->freq = f->frequency; 938 dev->freq = f->frequency;
1569 939
1570 /* I need to mute audio here */ 940 /* I need to mute audio here */
1571 ctrl.id = V4L2_CID_AUDIO_MUTE; 941 mute = v4l2_ctrl_find(&dev->ctrl_handler, V4L2_CID_AUDIO_MUTE);
1572 ctrl.value = 1; 942 if (mute) {
1573 cx23885_set_control(dev, &ctrl); 943 old_mute_val = v4l2_ctrl_g_ctrl(mute);
944 if (!old_mute_val)
945 v4l2_ctrl_s_ctrl(mute, 1);
946 }
1574 947
1575 /* If HVR1850 */ 948 /* If HVR1850 */
1576 dprintk(1, "%s() frequency=%d tuner=%d std=0x%llx\n", __func__, 949 dprintk(1, "%s() frequency=%d tuner=%d std=0x%llx\n", __func__,
1577 params.frequency, f->tuner, params.std); 950 params.frequency, f->tuner, params.std);
1578 951
1579 vfe = videobuf_dvb_get_frontend(&dev->ts2.frontends, 1); 952 vfe = vb2_dvb_get_frontend(&dev->ts2.frontends, 1);
1580 if (!vfe) { 953 if (!vfe) {
1581 mutex_unlock(&dev->lock);
1582 return -EINVAL; 954 return -EINVAL;
1583 } 955 }
1584 956
@@ -1600,10 +972,8 @@ static int cx23885_set_freq_via_ops(struct cx23885_dev *dev,
1600 msleep(100); 972 msleep(100);
1601 973
1602 /* I need to unmute audio here */ 974 /* I need to unmute audio here */
1603 ctrl.value = 0; 975 if (old_mute_val == 0)
1604 cx23885_set_control(dev, &ctrl); 976 v4l2_ctrl_s_ctrl(mute, old_mute_val);
1605
1606 mutex_unlock(&dev->lock);
1607 977
1608 return 0; 978 return 0;
1609} 979}
@@ -1611,8 +981,7 @@ static int cx23885_set_freq_via_ops(struct cx23885_dev *dev,
1611int cx23885_set_frequency(struct file *file, void *priv, 981int cx23885_set_frequency(struct file *file, void *priv,
1612 const struct v4l2_frequency *f) 982 const struct v4l2_frequency *f)
1613{ 983{
1614 struct cx23885_fh *fh = priv; 984 struct cx23885_dev *dev = video_drvdata(file);
1615 struct cx23885_dev *dev = fh->dev;
1616 int ret; 985 int ret;
1617 986
1618 switch (dev->board) { 987 switch (dev->board) {
@@ -1636,28 +1005,6 @@ static int vidioc_s_frequency(struct file *file, void *priv,
1636 1005
1637/* ----------------------------------------------------------- */ 1006/* ----------------------------------------------------------- */
1638 1007
1639static void cx23885_vid_timeout(unsigned long data)
1640{
1641 struct cx23885_dev *dev = (struct cx23885_dev *)data;
1642 struct cx23885_dmaqueue *q = &dev->vidq;
1643 struct cx23885_buffer *buf;
1644 unsigned long flags;
1645
1646 spin_lock_irqsave(&dev->slock, flags);
1647 while (!list_empty(&q->active)) {
1648 buf = list_entry(q->active.next,
1649 struct cx23885_buffer, vb.queue);
1650 list_del(&buf->vb.queue);
1651 buf->vb.state = VIDEOBUF_ERROR;
1652 wake_up(&buf->vb.done);
1653 printk(KERN_ERR "%s: [%p/%d] timeout - dma=0x%08lx\n",
1654 dev->name, buf, buf->vb.i,
1655 (unsigned long)buf->risc.dma);
1656 }
1657 cx23885_restart_video_queue(dev, q);
1658 spin_unlock_irqrestore(&dev->slock, flags);
1659}
1660
1661int cx23885_video_irq(struct cx23885_dev *dev, u32 status) 1008int cx23885_video_irq(struct cx23885_dev *dev, u32 status)
1662{ 1009{
1663 u32 mask, count; 1010 u32 mask, count;
@@ -1702,13 +1049,6 @@ int cx23885_video_irq(struct cx23885_dev *dev, u32 status)
1702 spin_unlock(&dev->slock); 1049 spin_unlock(&dev->slock);
1703 handled++; 1050 handled++;
1704 } 1051 }
1705 if (status & VID_BC_MSK_RISCI2) {
1706 dprintk(2, "stopper video\n");
1707 spin_lock(&dev->slock);
1708 cx23885_restart_video_queue(dev, &dev->vidq);
1709 spin_unlock(&dev->slock);
1710 handled++;
1711 }
1712 1052
1713 /* Allow the VBI framework to process it's payload */ 1053 /* Allow the VBI framework to process it's payload */
1714 handled += cx23885_vbi_irq(dev, status); 1054 handled += cx23885_vbi_irq(dev, status);
@@ -1721,12 +1061,12 @@ int cx23885_video_irq(struct cx23885_dev *dev, u32 status)
1721 1061
1722static const struct v4l2_file_operations video_fops = { 1062static const struct v4l2_file_operations video_fops = {
1723 .owner = THIS_MODULE, 1063 .owner = THIS_MODULE,
1724 .open = video_open, 1064 .open = v4l2_fh_open,
1725 .release = video_release, 1065 .release = vb2_fop_release,
1726 .read = video_read, 1066 .read = vb2_fop_read,
1727 .poll = video_poll, 1067 .poll = vb2_fop_poll,
1728 .mmap = video_mmap, 1068 .unlocked_ioctl = video_ioctl2,
1729 .ioctl = video_ioctl2, 1069 .mmap = vb2_fop_mmap,
1730}; 1070};
1731 1071
1732static const struct v4l2_ioctl_ops video_ioctl_ops = { 1072static const struct v4l2_ioctl_ops video_ioctl_ops = {
@@ -1738,21 +1078,19 @@ static const struct v4l2_ioctl_ops video_ioctl_ops = {
1738 .vidioc_g_fmt_vbi_cap = cx23885_vbi_fmt, 1078 .vidioc_g_fmt_vbi_cap = cx23885_vbi_fmt,
1739 .vidioc_try_fmt_vbi_cap = cx23885_vbi_fmt, 1079 .vidioc_try_fmt_vbi_cap = cx23885_vbi_fmt,
1740 .vidioc_s_fmt_vbi_cap = cx23885_vbi_fmt, 1080 .vidioc_s_fmt_vbi_cap = cx23885_vbi_fmt,
1741 .vidioc_reqbufs = vidioc_reqbufs, 1081 .vidioc_reqbufs = vb2_ioctl_reqbufs,
1742 .vidioc_querybuf = vidioc_querybuf, 1082 .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
1743 .vidioc_qbuf = vidioc_qbuf, 1083 .vidioc_querybuf = vb2_ioctl_querybuf,
1744 .vidioc_dqbuf = vidioc_dqbuf, 1084 .vidioc_qbuf = vb2_ioctl_qbuf,
1085 .vidioc_dqbuf = vb2_ioctl_dqbuf,
1086 .vidioc_streamon = vb2_ioctl_streamon,
1087 .vidioc_streamoff = vb2_ioctl_streamoff,
1745 .vidioc_s_std = vidioc_s_std, 1088 .vidioc_s_std = vidioc_s_std,
1746 .vidioc_g_std = vidioc_g_std, 1089 .vidioc_g_std = vidioc_g_std,
1747 .vidioc_enum_input = vidioc_enum_input, 1090 .vidioc_enum_input = vidioc_enum_input,
1748 .vidioc_g_input = vidioc_g_input, 1091 .vidioc_g_input = vidioc_g_input,
1749 .vidioc_s_input = vidioc_s_input, 1092 .vidioc_s_input = vidioc_s_input,
1750 .vidioc_log_status = vidioc_log_status, 1093 .vidioc_log_status = vidioc_log_status,
1751 .vidioc_queryctrl = vidioc_queryctrl,
1752 .vidioc_g_ctrl = vidioc_g_ctrl,
1753 .vidioc_s_ctrl = vidioc_s_ctrl,
1754 .vidioc_streamon = vidioc_streamon,
1755 .vidioc_streamoff = vidioc_streamoff,
1756 .vidioc_g_tuner = vidioc_g_tuner, 1094 .vidioc_g_tuner = vidioc_g_tuner,
1757 .vidioc_s_tuner = vidioc_s_tuner, 1095 .vidioc_s_tuner = vidioc_s_tuner,
1758 .vidioc_g_frequency = vidioc_g_frequency, 1096 .vidioc_g_frequency = vidioc_g_frequency,
@@ -1765,6 +1103,8 @@ static const struct v4l2_ioctl_ops video_ioctl_ops = {
1765 .vidioc_enumaudio = vidioc_enum_audinput, 1103 .vidioc_enumaudio = vidioc_enum_audinput,
1766 .vidioc_g_audio = vidioc_g_audinput, 1104 .vidioc_g_audio = vidioc_g_audinput,
1767 .vidioc_s_audio = vidioc_s_audinput, 1105 .vidioc_s_audio = vidioc_s_audinput,
1106 .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
1107 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
1768}; 1108};
1769 1109
1770static struct video_device cx23885_vbi_template; 1110static struct video_device cx23885_vbi_template;
@@ -1775,14 +1115,6 @@ static struct video_device cx23885_video_template = {
1775 .tvnorms = CX23885_NORMS, 1115 .tvnorms = CX23885_NORMS,
1776}; 1116};
1777 1117
1778static const struct v4l2_file_operations radio_fops = {
1779 .owner = THIS_MODULE,
1780 .open = video_open,
1781 .release = video_release,
1782 .ioctl = video_ioctl2,
1783};
1784
1785
1786void cx23885_video_unregister(struct cx23885_dev *dev) 1118void cx23885_video_unregister(struct cx23885_dev *dev)
1787{ 1119{
1788 dprintk(1, "%s()\n", __func__); 1120 dprintk(1, "%s()\n", __func__);
@@ -1794,7 +1126,6 @@ void cx23885_video_unregister(struct cx23885_dev *dev)
1794 else 1126 else
1795 video_device_release(dev->vbi_dev); 1127 video_device_release(dev->vbi_dev);
1796 dev->vbi_dev = NULL; 1128 dev->vbi_dev = NULL;
1797 btcx_riscmem_free(dev->pci, &dev->vbiq.stopper);
1798 } 1129 }
1799 if (dev->video_dev) { 1130 if (dev->video_dev) {
1800 if (video_is_registered(dev->video_dev)) 1131 if (video_is_registered(dev->video_dev))
@@ -1802,8 +1133,6 @@ void cx23885_video_unregister(struct cx23885_dev *dev)
1802 else 1133 else
1803 video_device_release(dev->video_dev); 1134 video_device_release(dev->video_dev);
1804 dev->video_dev = NULL; 1135 dev->video_dev = NULL;
1805
1806 btcx_riscmem_free(dev->pci, &dev->vidq.stopper);
1807 } 1136 }
1808 1137
1809 if (dev->audio_dev) 1138 if (dev->audio_dev)
@@ -1812,6 +1141,7 @@ void cx23885_video_unregister(struct cx23885_dev *dev)
1812 1141
1813int cx23885_video_register(struct cx23885_dev *dev) 1142int cx23885_video_register(struct cx23885_dev *dev)
1814{ 1143{
1144 struct vb2_queue *q;
1815 int err; 1145 int err;
1816 1146
1817 dprintk(1, "%s()\n", __func__); 1147 dprintk(1, "%s()\n", __func__);
@@ -1822,24 +1152,16 @@ int cx23885_video_register(struct cx23885_dev *dev)
1822 strcpy(cx23885_vbi_template.name, "cx23885-vbi"); 1152 strcpy(cx23885_vbi_template.name, "cx23885-vbi");
1823 1153
1824 dev->tvnorm = V4L2_STD_NTSC_M; 1154 dev->tvnorm = V4L2_STD_NTSC_M;
1155 dev->fmt = format_by_fourcc(V4L2_PIX_FMT_YUYV);
1156 dev->field = V4L2_FIELD_INTERLACED;
1157 dev->width = 720;
1158 dev->height = norm_maxh(dev->tvnorm);
1825 1159
1826 /* init video dma queues */ 1160 /* init video dma queues */
1827 INIT_LIST_HEAD(&dev->vidq.active); 1161 INIT_LIST_HEAD(&dev->vidq.active);
1828 INIT_LIST_HEAD(&dev->vidq.queued);
1829 dev->vidq.timeout.function = cx23885_vid_timeout;
1830 dev->vidq.timeout.data = (unsigned long)dev;
1831 init_timer(&dev->vidq.timeout);
1832 cx23885_risc_stopper(dev->pci, &dev->vidq.stopper,
1833 VID_A_DMA_CTL, 0x11, 0x00);
1834 1162
1835 /* init vbi dma queues */ 1163 /* init vbi dma queues */
1836 INIT_LIST_HEAD(&dev->vbiq.active); 1164 INIT_LIST_HEAD(&dev->vbiq.active);
1837 INIT_LIST_HEAD(&dev->vbiq.queued);
1838 dev->vbiq.timeout.function = cx23885_vbi_timeout;
1839 dev->vbiq.timeout.data = (unsigned long)dev;
1840 init_timer(&dev->vbiq.timeout);
1841 cx23885_risc_stopper(dev->pci, &dev->vbiq.stopper,
1842 VID_A_DMA_CTL, 0x22, 0x00);
1843 1165
1844 cx23885_irq_add_enable(dev, 0x01); 1166 cx23885_irq_add_enable(dev, 0x01);
1845 1167
@@ -1893,9 +1215,49 @@ int cx23885_video_register(struct cx23885_dev *dev)
1893 } 1215 }
1894 } 1216 }
1895 1217
1218 /* initial device configuration */
1219 mutex_lock(&dev->lock);
1220 cx23885_set_tvnorm(dev, dev->tvnorm);
1221 cx23885_video_mux(dev, 0);
1222 cx23885_audio_mux(dev, 0);
1223 mutex_unlock(&dev->lock);
1224
1225 q = &dev->vb2_vidq;
1226 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1227 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1228 q->gfp_flags = GFP_DMA32;
1229 q->min_buffers_needed = 2;
1230 q->drv_priv = dev;
1231 q->buf_struct_size = sizeof(struct cx23885_buffer);
1232 q->ops = &cx23885_video_qops;
1233 q->mem_ops = &vb2_dma_sg_memops;
1234 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1235 q->lock = &dev->lock;
1236
1237 err = vb2_queue_init(q);
1238 if (err < 0)
1239 goto fail_unreg;
1240
1241 q = &dev->vb2_vbiq;
1242 q->type = V4L2_BUF_TYPE_VBI_CAPTURE;
1243 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1244 q->gfp_flags = GFP_DMA32;
1245 q->min_buffers_needed = 2;
1246 q->drv_priv = dev;
1247 q->buf_struct_size = sizeof(struct cx23885_buffer);
1248 q->ops = &cx23885_vbi_qops;
1249 q->mem_ops = &vb2_dma_sg_memops;
1250 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1251 q->lock = &dev->lock;
1252
1253 err = vb2_queue_init(q);
1254 if (err < 0)
1255 goto fail_unreg;
1256
1896 /* register Video device */ 1257 /* register Video device */
1897 dev->video_dev = cx23885_vdev_init(dev, dev->pci, 1258 dev->video_dev = cx23885_vdev_init(dev, dev->pci,
1898 &cx23885_video_template, "video"); 1259 &cx23885_video_template, "video");
1260 dev->video_dev->queue = &dev->vb2_vidq;
1899 err = video_register_device(dev->video_dev, VFL_TYPE_GRABBER, 1261 err = video_register_device(dev->video_dev, VFL_TYPE_GRABBER,
1900 video_nr[dev->nr]); 1262 video_nr[dev->nr]);
1901 if (err < 0) { 1263 if (err < 0) {
@@ -1909,6 +1271,7 @@ int cx23885_video_register(struct cx23885_dev *dev)
1909 /* register VBI device */ 1271 /* register VBI device */
1910 dev->vbi_dev = cx23885_vdev_init(dev, dev->pci, 1272 dev->vbi_dev = cx23885_vdev_init(dev, dev->pci,
1911 &cx23885_vbi_template, "vbi"); 1273 &cx23885_vbi_template, "vbi");
1274 dev->vbi_dev->queue = &dev->vb2_vbiq;
1912 err = video_register_device(dev->vbi_dev, VFL_TYPE_VBI, 1275 err = video_register_device(dev->vbi_dev, VFL_TYPE_VBI,
1913 vbi_nr[dev->nr]); 1276 vbi_nr[dev->nr]);
1914 if (err < 0) { 1277 if (err < 0) {
@@ -1922,18 +1285,9 @@ int cx23885_video_register(struct cx23885_dev *dev)
1922 /* Register ALSA audio device */ 1285 /* Register ALSA audio device */
1923 dev->audio_dev = cx23885_audio_register(dev); 1286 dev->audio_dev = cx23885_audio_register(dev);
1924 1287
1925 /* initial device configuration */
1926 mutex_lock(&dev->lock);
1927 cx23885_set_tvnorm(dev, dev->tvnorm);
1928 init_controls(dev);
1929 cx23885_video_mux(dev, 0);
1930 cx23885_audio_mux(dev, 0);
1931 mutex_unlock(&dev->lock);
1932
1933 return 0; 1288 return 0;
1934 1289
1935fail_unreg: 1290fail_unreg:
1936 cx23885_video_unregister(dev); 1291 cx23885_video_unregister(dev);
1937 return err; 1292 return err;
1938} 1293}
1939
diff --git a/drivers/media/pci/cx23885/cx23885-video.h b/drivers/media/pci/cx23885/cx23885-video.h
index c961a2b0de0f..291e8f3189f0 100644
--- a/drivers/media/pci/cx23885/cx23885-video.h
+++ b/drivers/media/pci/cx23885/cx23885-video.h
@@ -12,11 +12,6 @@
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details. 14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
19 * 02110-1301, USA.
20 */ 15 */
21 16
22#ifndef _CX23885_VIDEO_H_ 17#ifndef _CX23885_VIDEO_H_
diff --git a/drivers/media/pci/cx23885/cx23885.h b/drivers/media/pci/cx23885/cx23885.h
index 0e086c03da67..6c35e6115969 100644
--- a/drivers/media/pci/cx23885/cx23885.h
+++ b/drivers/media/pci/cx23885/cx23885.h
@@ -13,10 +13,6 @@
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * 14 *
15 * GNU General Public License for more details. 15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */ 16 */
21 17
22#include <linux/pci.h> 18#include <linux/pci.h>
@@ -25,19 +21,20 @@
25#include <linux/slab.h> 21#include <linux/slab.h>
26 22
27#include <media/v4l2-device.h> 23#include <media/v4l2-device.h>
24#include <media/v4l2-fh.h>
25#include <media/v4l2-ctrls.h>
28#include <media/tuner.h> 26#include <media/tuner.h>
29#include <media/tveeprom.h> 27#include <media/tveeprom.h>
30#include <media/videobuf-dma-sg.h> 28#include <media/videobuf2-dma-sg.h>
31#include <media/videobuf-dvb.h> 29#include <media/videobuf2-dvb.h>
32#include <media/rc-core.h> 30#include <media/rc-core.h>
33 31
34#include "btcx-risc.h"
35#include "cx23885-reg.h" 32#include "cx23885-reg.h"
36#include "media/cx2341x.h" 33#include "media/cx2341x.h"
37 34
38#include <linux/mutex.h> 35#include <linux/mutex.h>
39 36
40#define CX23885_VERSION "0.0.3" 37#define CX23885_VERSION "0.0.4"
41 38
42#define UNSET (-1U) 39#define UNSET (-1U)
43 40
@@ -46,9 +43,6 @@
46/* Max number of inputs by card */ 43/* Max number of inputs by card */
47#define MAX_CX23885_INPUT 8 44#define MAX_CX23885_INPUT 8
48#define INPUT(nr) (&cx23885_boards[dev->board].input[nr]) 45#define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
49#define RESOURCE_OVERLAY 1
50#define RESOURCE_VIDEO 2
51#define RESOURCE_VBI 4
52 46
53#define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */ 47#define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */
54 48
@@ -98,6 +92,7 @@
98#define CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200 42 92#define CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200 42
99#define CX23885_BOARD_HAUPPAUGE_IMPACTVCBE 43 93#define CX23885_BOARD_HAUPPAUGE_IMPACTVCBE 43
100#define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2 44 94#define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2 44
95#define CX23885_BOARD_DVBSKY_T9580 45
101 96
102#define GPIO_0 0x00000001 97#define GPIO_0 0x00000001
103#define GPIO_1 0x00000002 98#define GPIO_1 0x00000002
@@ -131,14 +126,6 @@ struct cx23885_fmt {
131 u32 cxformat; 126 u32 cxformat;
132}; 127};
133 128
134struct cx23885_ctrl {
135 struct v4l2_queryctrl v;
136 u32 off;
137 u32 reg;
138 u32 mask;
139 u32 shift;
140};
141
142struct cx23885_tvnorm { 129struct cx23885_tvnorm {
143 char *name; 130 char *name;
144 v4l2_std_id id; 131 v4l2_std_id id;
@@ -146,30 +133,6 @@ struct cx23885_tvnorm {
146 u32 cxoformat; 133 u32 cxoformat;
147}; 134};
148 135
149struct cx23885_fh {
150 struct cx23885_dev *dev;
151 enum v4l2_buf_type type;
152 int radio;
153 u32 resources;
154
155 /* video overlay */
156 struct v4l2_window win;
157 struct v4l2_clip *clips;
158 unsigned int nclips;
159
160 /* video capture */
161 struct cx23885_fmt *fmt;
162 unsigned int width, height;
163
164 /* vbi capture */
165 struct videobuf_queue vidq;
166 struct videobuf_queue vbiq;
167
168 /* MPEG Encoder specifics ONLY */
169 struct videobuf_queue mpegq;
170 atomic_t v4l_reading;
171};
172
173enum cx23885_itype { 136enum cx23885_itype {
174 CX23885_VMUX_COMPOSITE1 = 1, 137 CX23885_VMUX_COMPOSITE1 = 1,
175 CX23885_VMUX_COMPOSITE2, 138 CX23885_VMUX_COMPOSITE2,
@@ -189,14 +152,22 @@ enum cx23885_src_sel_type {
189 CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO 152 CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
190}; 153};
191 154
155struct cx23885_riscmem {
156 unsigned int size;
157 __le32 *cpu;
158 __le32 *jmp;
159 dma_addr_t dma;
160};
161
192/* buffer for one video frame */ 162/* buffer for one video frame */
193struct cx23885_buffer { 163struct cx23885_buffer {
194 /* common v4l buffer stuff -- must be first */ 164 /* common v4l buffer stuff -- must be first */
195 struct videobuf_buffer vb; 165 struct vb2_buffer vb;
166 struct list_head queue;
196 167
197 /* cx23885 specific */ 168 /* cx23885 specific */
198 unsigned int bpl; 169 unsigned int bpl;
199 struct btcx_riscmem risc; 170 struct cx23885_riscmem risc;
200 struct cx23885_fmt *fmt; 171 struct cx23885_fmt *fmt;
201 u32 count; 172 u32 count;
202}; 173};
@@ -268,9 +239,6 @@ struct cx23885_i2c {
268 239
269struct cx23885_dmaqueue { 240struct cx23885_dmaqueue {
270 struct list_head active; 241 struct list_head active;
271 struct list_head queued;
272 struct timer_list timeout;
273 struct btcx_riscmem stopper;
274 u32 count; 242 u32 count;
275}; 243};
276 244
@@ -280,7 +248,7 @@ struct cx23885_tsport {
280 int nr; 248 int nr;
281 int sram_chno; 249 int sram_chno;
282 250
283 struct videobuf_dvb_frontends frontends; 251 struct vb2_dvb_frontends frontends;
284 252
285 /* dma queues */ 253 /* dma queues */
286 struct cx23885_dmaqueue mpegq; 254 struct cx23885_dmaqueue mpegq;
@@ -326,7 +294,12 @@ struct cx23885_tsport {
326 /* Workaround for a temp dvb_frontend that the tuner can attached to */ 294 /* Workaround for a temp dvb_frontend that the tuner can attached to */
327 struct dvb_frontend analog_fe; 295 struct dvb_frontend analog_fe;
328 296
297 struct i2c_client *i2c_client_demod;
298 struct i2c_client *i2c_client_tuner;
299
329 int (*set_frontend)(struct dvb_frontend *fe); 300 int (*set_frontend)(struct dvb_frontend *fe);
301 int (*fe_set_voltage)(struct dvb_frontend *fe,
302 fe_sec_voltage_t voltage);
330}; 303};
331 304
332struct cx23885_kernel_ir { 305struct cx23885_kernel_ir {
@@ -339,8 +312,11 @@ struct cx23885_kernel_ir {
339 312
340struct cx23885_audio_buffer { 313struct cx23885_audio_buffer {
341 unsigned int bpl; 314 unsigned int bpl;
342 struct btcx_riscmem risc; 315 struct cx23885_riscmem risc;
343 struct videobuf_dmabuf dma; 316 void *vaddr;
317 struct scatterlist *sglist;
318 int sglen;
319 int nr_pages;
344}; 320};
345 321
346struct cx23885_audio_dev { 322struct cx23885_audio_dev {
@@ -358,8 +334,6 @@ struct cx23885_audio_dev {
358 unsigned int period_size; 334 unsigned int period_size;
359 unsigned int num_periods; 335 unsigned int num_periods;
360 336
361 struct videobuf_dmabuf *dma_risc;
362
363 struct cx23885_audio_buffer *buf; 337 struct cx23885_audio_buffer *buf;
364 338
365 struct snd_pcm_substream *substream; 339 struct snd_pcm_substream *substream;
@@ -368,6 +342,7 @@ struct cx23885_audio_dev {
368struct cx23885_dev { 342struct cx23885_dev {
369 atomic_t refcount; 343 atomic_t refcount;
370 struct v4l2_device v4l2_dev; 344 struct v4l2_device v4l2_dev;
345 struct v4l2_ctrl_handler ctrl_handler;
371 346
372 /* pci stuff */ 347 /* pci stuff */
373 struct pci_dev *pci; 348 struct pci_dev *pci;
@@ -407,7 +382,6 @@ struct cx23885_dev {
407 } bridge; 382 } bridge;
408 383
409 /* Analog video */ 384 /* Analog video */
410 u32 resources;
411 unsigned int input; 385 unsigned int input;
412 unsigned int audinput; /* Selectable audio input */ 386 unsigned int audinput; /* Selectable audio input */
413 u32 tvaudio; 387 u32 tvaudio;
@@ -417,7 +391,6 @@ struct cx23885_dev {
417 unsigned int tuner_bus; 391 unsigned int tuner_bus;
418 unsigned int radio_type; 392 unsigned int radio_type;
419 unsigned char radio_addr; 393 unsigned char radio_addr;
420 unsigned int has_radio;
421 struct v4l2_subdev *sd_cx25840; 394 struct v4l2_subdev *sd_cx25840;
422 struct work_struct cx25840_work; 395 struct work_struct cx25840_work;
423 396
@@ -435,17 +408,24 @@ struct cx23885_dev {
435 u32 freq; 408 u32 freq;
436 struct video_device *video_dev; 409 struct video_device *video_dev;
437 struct video_device *vbi_dev; 410 struct video_device *vbi_dev;
438 struct video_device *radio_dev; 411
412 /* video capture */
413 struct cx23885_fmt *fmt;
414 unsigned int width, height;
415 unsigned field;
439 416
440 struct cx23885_dmaqueue vidq; 417 struct cx23885_dmaqueue vidq;
418 struct vb2_queue vb2_vidq;
441 struct cx23885_dmaqueue vbiq; 419 struct cx23885_dmaqueue vbiq;
420 struct vb2_queue vb2_vbiq;
421
442 spinlock_t slock; 422 spinlock_t slock;
443 423
444 /* MPEG Encoder ONLY settings */ 424 /* MPEG Encoder ONLY settings */
445 u32 cx23417_mailbox; 425 u32 cx23417_mailbox;
446 struct cx2341x_mpeg_params mpeg_params; 426 struct cx2341x_handler cxhdl;
447 struct video_device *v4l_device; 427 struct video_device *v4l_device;
448 atomic_t v4l_reader_count; 428 struct vb2_queue vb2_mpegq;
449 struct cx23885_tvnorm encodernorm; 429 struct cx23885_tvnorm encodernorm;
450 430
451 /* Analog raw audio */ 431 /* Analog raw audio */
@@ -521,26 +501,21 @@ extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
521extern void cx23885_sram_channel_dump(struct cx23885_dev *dev, 501extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
522 struct sram_channel *ch); 502 struct sram_channel *ch);
523 503
524extern int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc, 504extern int cx23885_risc_buffer(struct pci_dev *pci, struct cx23885_riscmem *risc,
525 u32 reg, u32 mask, u32 value);
526
527extern int cx23885_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
528 struct scatterlist *sglist, 505 struct scatterlist *sglist,
529 unsigned int top_offset, unsigned int bottom_offset, 506 unsigned int top_offset, unsigned int bottom_offset,
530 unsigned int bpl, unsigned int padding, unsigned int lines); 507 unsigned int bpl, unsigned int padding, unsigned int lines);
531 508
532extern int cx23885_risc_vbibuffer(struct pci_dev *pci, 509extern int cx23885_risc_vbibuffer(struct pci_dev *pci,
533 struct btcx_riscmem *risc, struct scatterlist *sglist, 510 struct cx23885_riscmem *risc, struct scatterlist *sglist,
534 unsigned int top_offset, unsigned int bottom_offset, 511 unsigned int top_offset, unsigned int bottom_offset,
535 unsigned int bpl, unsigned int padding, unsigned int lines); 512 unsigned int bpl, unsigned int padding, unsigned int lines);
536 513
514int cx23885_start_dma(struct cx23885_tsport *port,
515 struct cx23885_dmaqueue *q,
516 struct cx23885_buffer *buf);
537void cx23885_cancel_buffers(struct cx23885_tsport *port); 517void cx23885_cancel_buffers(struct cx23885_tsport *port);
538 518
539extern int cx23885_restart_queue(struct cx23885_tsport *port,
540 struct cx23885_dmaqueue *q);
541
542extern void cx23885_wakeup(struct cx23885_tsport *port,
543 struct cx23885_dmaqueue *q, u32 count);
544 519
545extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask); 520extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask);
546extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask); 521extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask);
@@ -574,13 +549,11 @@ extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);
574extern int cx23885_dvb_register(struct cx23885_tsport *port); 549extern int cx23885_dvb_register(struct cx23885_tsport *port);
575extern int cx23885_dvb_unregister(struct cx23885_tsport *port); 550extern int cx23885_dvb_unregister(struct cx23885_tsport *port);
576 551
577extern int cx23885_buf_prepare(struct videobuf_queue *q, 552extern int cx23885_buf_prepare(struct cx23885_buffer *buf,
578 struct cx23885_tsport *port, 553 struct cx23885_tsport *port);
579 struct cx23885_buffer *buf,
580 enum v4l2_field field);
581extern void cx23885_buf_queue(struct cx23885_tsport *port, 554extern void cx23885_buf_queue(struct cx23885_tsport *port,
582 struct cx23885_buffer *buf); 555 struct cx23885_buffer *buf);
583extern void cx23885_free_buffer(struct videobuf_queue *q, 556extern void cx23885_free_buffer(struct cx23885_dev *dev,
584 struct cx23885_buffer *buf); 557 struct cx23885_buffer *buf);
585 558
586/* ----------------------------------------------------------- */ 559/* ----------------------------------------------------------- */
@@ -595,8 +568,6 @@ int cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i);
595int cx23885_set_input(struct file *file, void *priv, unsigned int i); 568int cx23885_set_input(struct file *file, void *priv, unsigned int i);
596int cx23885_get_input(struct file *file, void *priv, unsigned int *i); 569int cx23885_get_input(struct file *file, void *priv, unsigned int *i);
597int cx23885_set_frequency(struct file *file, void *priv, const struct v4l2_frequency *f); 570int cx23885_set_frequency(struct file *file, void *priv, const struct v4l2_frequency *f);
598int cx23885_set_control(struct cx23885_dev *dev, struct v4l2_control *ctl);
599int cx23885_get_control(struct cx23885_dev *dev, struct v4l2_control *ctl);
600int cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm); 571int cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm);
601 572
602/* ----------------------------------------------------------- */ 573/* ----------------------------------------------------------- */
@@ -604,9 +575,7 @@ int cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm);
604extern int cx23885_vbi_fmt(struct file *file, void *priv, 575extern int cx23885_vbi_fmt(struct file *file, void *priv,
605 struct v4l2_format *f); 576 struct v4l2_format *f);
606extern void cx23885_vbi_timeout(unsigned long data); 577extern void cx23885_vbi_timeout(unsigned long data);
607extern struct videobuf_queue_ops cx23885_vbi_qops; 578extern struct vb2_ops cx23885_vbi_qops;
608extern int cx23885_restart_vbi_queue(struct cx23885_dev *dev,
609 struct cx23885_dmaqueue *q);
610extern int cx23885_vbi_irq(struct cx23885_dev *dev, u32 status); 579extern int cx23885_vbi_irq(struct cx23885_dev *dev, u32 status);
611 580
612/* cx23885-i2c.c */ 581/* cx23885-i2c.c */
@@ -638,7 +607,7 @@ extern struct cx23885_audio_dev *cx23885_audio_register(
638extern void cx23885_audio_unregister(struct cx23885_dev *dev); 607extern void cx23885_audio_unregister(struct cx23885_dev *dev);
639extern int cx23885_audio_irq(struct cx23885_dev *dev, u32 status, u32 mask); 608extern int cx23885_audio_irq(struct cx23885_dev *dev, u32 status, u32 mask);
640extern int cx23885_risc_databuffer(struct pci_dev *pci, 609extern int cx23885_risc_databuffer(struct pci_dev *pci,
641 struct btcx_riscmem *risc, 610 struct cx23885_riscmem *risc,
642 struct scatterlist *sglist, 611 struct scatterlist *sglist,
643 unsigned int bpl, 612 unsigned int bpl,
644 unsigned int lines, 613 unsigned int lines,
@@ -649,15 +618,10 @@ extern int cx23885_risc_databuffer(struct pci_dev *pci,
649 618
650static inline unsigned int norm_maxw(v4l2_std_id norm) 619static inline unsigned int norm_maxw(v4l2_std_id norm)
651{ 620{
652 return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768; 621 return (norm & V4L2_STD_525_60) ? 720 : 768;
653} 622}
654 623
655static inline unsigned int norm_maxh(v4l2_std_id norm) 624static inline unsigned int norm_maxh(v4l2_std_id norm)
656{ 625{
657 return (norm & V4L2_STD_625_50) ? 576 : 480; 626 return (norm & V4L2_STD_525_60) ? 480 : 576;
658}
659
660static inline unsigned int norm_swidth(v4l2_std_id norm)
661{
662 return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 754 : 922;
663} 627}
diff --git a/drivers/media/pci/cx23885/cx23888-ir.c b/drivers/media/pci/cx23885/cx23888-ir.c
index c2ff5fc01157..c1aa888af705 100644
--- a/drivers/media/pci/cx23885/cx23888-ir.c
+++ b/drivers/media/pci/cx23885/cx23888-ir.c
@@ -14,11 +14,6 @@
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details. 16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
21 * 02110-1301, USA.
22 */ 17 */
23 18
24#include <linux/kfifo.h> 19#include <linux/kfifo.h>
diff --git a/drivers/media/pci/cx23885/cx23888-ir.h b/drivers/media/pci/cx23885/cx23888-ir.h
index d2de41caaf1d..ff74a93575d6 100644
--- a/drivers/media/pci/cx23885/cx23888-ir.h
+++ b/drivers/media/pci/cx23885/cx23888-ir.h
@@ -14,11 +14,6 @@
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details. 16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
21 * 02110-1301, USA.
22 */ 17 */
23 18
24#ifndef _CX23888_IR_H_ 19#ifndef _CX23888_IR_H_
diff --git a/drivers/media/pci/cx23885/netup-eeprom.c b/drivers/media/pci/cx23885/netup-eeprom.c
index 98a48f500684..b6542ee4385b 100644
--- a/drivers/media/pci/cx23885/netup-eeprom.c
+++ b/drivers/media/pci/cx23885/netup-eeprom.c
@@ -17,10 +17,6 @@
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * 18 *
19 * GNU General Public License for more details. 19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 */ 20 */
25 21
26# 22#
diff --git a/drivers/media/pci/cx23885/netup-eeprom.h b/drivers/media/pci/cx23885/netup-eeprom.h
index 13926e18feba..90cac5b655d5 100644
--- a/drivers/media/pci/cx23885/netup-eeprom.h
+++ b/drivers/media/pci/cx23885/netup-eeprom.h
@@ -16,10 +16,6 @@
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * 17 *
18 * GNU General Public License for more details. 18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */ 19 */
24 20
25#ifndef NETUP_EEPROM_H 21#ifndef NETUP_EEPROM_H
diff --git a/drivers/media/pci/cx23885/netup-init.c b/drivers/media/pci/cx23885/netup-init.c
index 0044fef7ca24..76d9487aafc8 100644
--- a/drivers/media/pci/cx23885/netup-init.c
+++ b/drivers/media/pci/cx23885/netup-init.c
@@ -17,10 +17,6 @@
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * 18 *
19 * GNU General Public License for more details. 19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 */ 20 */
25 21
26#include "cx23885.h" 22#include "cx23885.h"
diff --git a/drivers/media/pci/cx23885/netup-init.h b/drivers/media/pci/cx23885/netup-init.h
index d26ae4b1590e..daaa212adfba 100644
--- a/drivers/media/pci/cx23885/netup-init.h
+++ b/drivers/media/pci/cx23885/netup-init.h
@@ -17,9 +17,5 @@
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * 18 *
19 * GNU General Public License for more details. 19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 */ 20 */
25extern void netup_initialize(struct cx23885_dev *dev); 21extern void netup_initialize(struct cx23885_dev *dev);
diff --git a/drivers/media/pci/cx25821/cx25821-video-upstream.c b/drivers/media/pci/cx25821/cx25821-video-upstream.c
index 1f43be0b04c8..a664997e1958 100644
--- a/drivers/media/pci/cx25821/cx25821-video-upstream.c
+++ b/drivers/media/pci/cx25821/cx25821-video-upstream.c
@@ -330,8 +330,9 @@ int cx25821_write_frame(struct cx25821_channel *chan,
330 330
331 if (frame_size - curpos < count) 331 if (frame_size - curpos < count)
332 count = frame_size - curpos; 332 count = frame_size - curpos;
333 memcpy((char *)out->_data_buf_virt_addr + frame_offset + curpos, 333 if (copy_from_user((__force char *)out->_data_buf_virt_addr + frame_offset + curpos,
334 data, count); 334 data, count))
335 return -EFAULT;
335 curpos += count; 336 curpos += count;
336 if (curpos == frame_size) { 337 if (curpos == frame_size) {
337 out->_frame_count++; 338 out->_frame_count++;
diff --git a/drivers/media/pci/cx88/cx88-cards.c b/drivers/media/pci/cx88/cx88-cards.c
index e18a7ace08b1..851754bf1291 100644
--- a/drivers/media/pci/cx88/cx88-cards.c
+++ b/drivers/media/pci/cx88/cx88-cards.c
@@ -78,19 +78,19 @@ static const struct cx88_board cx88_boards[] = {
78 .radio_type = UNSET, 78 .radio_type = UNSET,
79 .tuner_addr = ADDR_UNSET, 79 .tuner_addr = ADDR_UNSET,
80 .radio_addr = ADDR_UNSET, 80 .radio_addr = ADDR_UNSET,
81 .input = {{ 81 .input = { {
82 .type = CX88_VMUX_COMPOSITE1, 82 .type = CX88_VMUX_COMPOSITE1,
83 .vmux = 0, 83 .vmux = 0,
84 },{ 84 }, {
85 .type = CX88_VMUX_COMPOSITE2, 85 .type = CX88_VMUX_COMPOSITE2,
86 .vmux = 1, 86 .vmux = 1,
87 },{ 87 }, {
88 .type = CX88_VMUX_COMPOSITE3, 88 .type = CX88_VMUX_COMPOSITE3,
89 .vmux = 2, 89 .vmux = 2,
90 },{ 90 }, {
91 .type = CX88_VMUX_COMPOSITE4, 91 .type = CX88_VMUX_COMPOSITE4,
92 .vmux = 3, 92 .vmux = 3,
93 }}, 93 } },
94 }, 94 },
95 [CX88_BOARD_HAUPPAUGE] = { 95 [CX88_BOARD_HAUPPAUGE] = {
96 .name = "Hauppauge WinTV 34xxx models", 96 .name = "Hauppauge WinTV 34xxx models",
@@ -99,23 +99,23 @@ static const struct cx88_board cx88_boards[] = {
99 .tuner_addr = ADDR_UNSET, 99 .tuner_addr = ADDR_UNSET,
100 .radio_addr = ADDR_UNSET, 100 .radio_addr = ADDR_UNSET,
101 .tda9887_conf = TDA9887_PRESENT, 101 .tda9887_conf = TDA9887_PRESENT,
102 .input = {{ 102 .input = { {
103 .type = CX88_VMUX_TELEVISION, 103 .type = CX88_VMUX_TELEVISION,
104 .vmux = 0, 104 .vmux = 0,
105 .gpio0 = 0xff00, // internal decoder 105 .gpio0 = 0xff00, // internal decoder
106 },{ 106 }, {
107 .type = CX88_VMUX_DEBUG, 107 .type = CX88_VMUX_DEBUG,
108 .vmux = 0, 108 .vmux = 0,
109 .gpio0 = 0xff01, // mono from tuner chip 109 .gpio0 = 0xff01, // mono from tuner chip
110 },{ 110 }, {
111 .type = CX88_VMUX_COMPOSITE1, 111 .type = CX88_VMUX_COMPOSITE1,
112 .vmux = 1, 112 .vmux = 1,
113 .gpio0 = 0xff02, 113 .gpio0 = 0xff02,
114 },{ 114 }, {
115 .type = CX88_VMUX_SVIDEO, 115 .type = CX88_VMUX_SVIDEO,
116 .vmux = 2, 116 .vmux = 2,
117 .gpio0 = 0xff02, 117 .gpio0 = 0xff02,
118 }}, 118 } },
119 .radio = { 119 .radio = {
120 .type = CX88_RADIO, 120 .type = CX88_RADIO,
121 .gpio0 = 0xff01, 121 .gpio0 = 0xff01,
@@ -127,13 +127,13 @@ static const struct cx88_board cx88_boards[] = {
127 .radio_type = UNSET, 127 .radio_type = UNSET,
128 .tuner_addr = ADDR_UNSET, 128 .tuner_addr = ADDR_UNSET,
129 .radio_addr = ADDR_UNSET, 129 .radio_addr = ADDR_UNSET,
130 .input = {{ 130 .input = { {
131 .type = CX88_VMUX_TELEVISION, 131 .type = CX88_VMUX_TELEVISION,
132 .vmux = 0, 132 .vmux = 0,
133 },{ 133 }, {
134 .type = CX88_VMUX_SVIDEO, 134 .type = CX88_VMUX_SVIDEO,
135 .vmux = 2, 135 .vmux = 2,
136 }}, 136 } },
137 }, 137 },
138 [CX88_BOARD_PIXELVIEW] = { 138 [CX88_BOARD_PIXELVIEW] = {
139 .name = "PixelView", 139 .name = "PixelView",
@@ -141,17 +141,17 @@ static const struct cx88_board cx88_boards[] = {
141 .radio_type = UNSET, 141 .radio_type = UNSET,
142 .tuner_addr = ADDR_UNSET, 142 .tuner_addr = ADDR_UNSET,
143 .radio_addr = ADDR_UNSET, 143 .radio_addr = ADDR_UNSET,
144 .input = {{ 144 .input = { {
145 .type = CX88_VMUX_TELEVISION, 145 .type = CX88_VMUX_TELEVISION,
146 .vmux = 0, 146 .vmux = 0,
147 .gpio0 = 0xff00, // internal decoder 147 .gpio0 = 0xff00, // internal decoder
148 },{ 148 }, {
149 .type = CX88_VMUX_COMPOSITE1, 149 .type = CX88_VMUX_COMPOSITE1,
150 .vmux = 1, 150 .vmux = 1,
151 },{ 151 }, {
152 .type = CX88_VMUX_SVIDEO, 152 .type = CX88_VMUX_SVIDEO,
153 .vmux = 2, 153 .vmux = 2,
154 }}, 154 } },
155 .radio = { 155 .radio = {
156 .type = CX88_RADIO, 156 .type = CX88_RADIO,
157 .gpio0 = 0xff10, 157 .gpio0 = 0xff10,
@@ -164,19 +164,19 @@ static const struct cx88_board cx88_boards[] = {
164 .tuner_addr = ADDR_UNSET, 164 .tuner_addr = ADDR_UNSET,
165 .radio_addr = ADDR_UNSET, 165 .radio_addr = ADDR_UNSET,
166 .tda9887_conf = TDA9887_PRESENT | TDA9887_INTERCARRIER, 166 .tda9887_conf = TDA9887_PRESENT | TDA9887_INTERCARRIER,
167 .input = {{ 167 .input = { {
168 .type = CX88_VMUX_TELEVISION, 168 .type = CX88_VMUX_TELEVISION,
169 .vmux = 0, 169 .vmux = 0,
170 .gpio0 = 0x03ff, 170 .gpio0 = 0x03ff,
171 },{ 171 }, {
172 .type = CX88_VMUX_COMPOSITE1, 172 .type = CX88_VMUX_COMPOSITE1,
173 .vmux = 1, 173 .vmux = 1,
174 .gpio0 = 0x03fe, 174 .gpio0 = 0x03fe,
175 },{ 175 }, {
176 .type = CX88_VMUX_SVIDEO, 176 .type = CX88_VMUX_SVIDEO,
177 .vmux = 2, 177 .vmux = 2,
178 .gpio0 = 0x03fe, 178 .gpio0 = 0x03fe,
179 }}, 179 } },
180 }, 180 },
181 [CX88_BOARD_WINFAST2000XP_EXPERT] = { 181 [CX88_BOARD_WINFAST2000XP_EXPERT] = {
182 .name = "Leadtek Winfast 2000XP Expert", 182 .name = "Leadtek Winfast 2000XP Expert",
@@ -185,28 +185,28 @@ static const struct cx88_board cx88_boards[] = {
185 .tuner_addr = ADDR_UNSET, 185 .tuner_addr = ADDR_UNSET,
186 .radio_addr = ADDR_UNSET, 186 .radio_addr = ADDR_UNSET,
187 .tda9887_conf = TDA9887_PRESENT, 187 .tda9887_conf = TDA9887_PRESENT,
188 .input = {{ 188 .input = { {
189 .type = CX88_VMUX_TELEVISION, 189 .type = CX88_VMUX_TELEVISION,
190 .vmux = 0, 190 .vmux = 0,
191 .gpio0 = 0x00F5e700, 191 .gpio0 = 0x00F5e700,
192 .gpio1 = 0x00003004, 192 .gpio1 = 0x00003004,
193 .gpio2 = 0x00F5e700, 193 .gpio2 = 0x00F5e700,
194 .gpio3 = 0x02000000, 194 .gpio3 = 0x02000000,
195 },{ 195 }, {
196 .type = CX88_VMUX_COMPOSITE1, 196 .type = CX88_VMUX_COMPOSITE1,
197 .vmux = 1, 197 .vmux = 1,
198 .gpio0 = 0x00F5c700, 198 .gpio0 = 0x00F5c700,
199 .gpio1 = 0x00003004, 199 .gpio1 = 0x00003004,
200 .gpio2 = 0x00F5c700, 200 .gpio2 = 0x00F5c700,
201 .gpio3 = 0x02000000, 201 .gpio3 = 0x02000000,
202 },{ 202 }, {
203 .type = CX88_VMUX_SVIDEO, 203 .type = CX88_VMUX_SVIDEO,
204 .vmux = 2, 204 .vmux = 2,
205 .gpio0 = 0x00F5c700, 205 .gpio0 = 0x00F5c700,
206 .gpio1 = 0x00003004, 206 .gpio1 = 0x00003004,
207 .gpio2 = 0x00F5c700, 207 .gpio2 = 0x00F5c700,
208 .gpio3 = 0x02000000, 208 .gpio3 = 0x02000000,
209 }}, 209 } },
210 .radio = { 210 .radio = {
211 .type = CX88_RADIO, 211 .type = CX88_RADIO,
212 .gpio0 = 0x00F5d700, 212 .gpio0 = 0x00F5d700,
@@ -222,19 +222,19 @@ static const struct cx88_board cx88_boards[] = {
222 .tuner_addr = ADDR_UNSET, 222 .tuner_addr = ADDR_UNSET,
223 .radio_addr = ADDR_UNSET, 223 .radio_addr = ADDR_UNSET,
224 .tda9887_conf = TDA9887_PRESENT, 224 .tda9887_conf = TDA9887_PRESENT,
225 .input = {{ 225 .input = { {
226 .type = CX88_VMUX_TELEVISION, 226 .type = CX88_VMUX_TELEVISION,
227 .vmux = 0, 227 .vmux = 0,
228 .gpio1 = 0xe09f, 228 .gpio1 = 0xe09f,
229 },{ 229 }, {
230 .type = CX88_VMUX_COMPOSITE1, 230 .type = CX88_VMUX_COMPOSITE1,
231 .vmux = 1, 231 .vmux = 1,
232 .gpio1 = 0xe05f, 232 .gpio1 = 0xe05f,
233 },{ 233 }, {
234 .type = CX88_VMUX_SVIDEO, 234 .type = CX88_VMUX_SVIDEO,
235 .vmux = 2, 235 .vmux = 2,
236 .gpio1 = 0xe05f, 236 .gpio1 = 0xe05f,
237 }}, 237 } },
238 .radio = { 238 .radio = {
239 .gpio1 = 0xe0df, 239 .gpio1 = 0xe0df,
240 .type = CX88_RADIO, 240 .type = CX88_RADIO,
@@ -249,25 +249,25 @@ static const struct cx88_board cx88_boards[] = {
249 .tuner_addr = ADDR_UNSET, 249 .tuner_addr = ADDR_UNSET,
250 .radio_addr = ADDR_UNSET, 250 .radio_addr = ADDR_UNSET,
251 .tda9887_conf = TDA9887_PRESENT | TDA9887_INTERCARRIER_NTSC, 251 .tda9887_conf = TDA9887_PRESENT | TDA9887_INTERCARRIER_NTSC,
252 .input = {{ 252 .input = { {
253 .type = CX88_VMUX_TELEVISION, 253 .type = CX88_VMUX_TELEVISION,
254 .vmux = 0, 254 .vmux = 0,
255 .gpio0 = 0x000040bf, 255 .gpio0 = 0x000040bf,
256 .gpio1 = 0x000080c0, 256 .gpio1 = 0x000080c0,
257 .gpio2 = 0x0000ff40, 257 .gpio2 = 0x0000ff40,
258 },{ 258 }, {
259 .type = CX88_VMUX_COMPOSITE1, 259 .type = CX88_VMUX_COMPOSITE1,
260 .vmux = 1, 260 .vmux = 1,
261 .gpio0 = 0x000040bf, 261 .gpio0 = 0x000040bf,
262 .gpio1 = 0x000080c0, 262 .gpio1 = 0x000080c0,
263 .gpio2 = 0x0000ff40, 263 .gpio2 = 0x0000ff40,
264 },{ 264 }, {
265 .type = CX88_VMUX_SVIDEO, 265 .type = CX88_VMUX_SVIDEO,
266 .vmux = 2, 266 .vmux = 2,
267 .gpio0 = 0x000040bf, 267 .gpio0 = 0x000040bf,
268 .gpio1 = 0x000080c0, 268 .gpio1 = 0x000080c0,
269 .gpio2 = 0x0000ff40, 269 .gpio2 = 0x0000ff40,
270 }}, 270 } },
271 .radio = { 271 .radio = {
272 .type = CX88_RADIO, 272 .type = CX88_RADIO,
273 .vmux = 3, 273 .vmux = 3,
@@ -283,14 +283,14 @@ static const struct cx88_board cx88_boards[] = {
283 .tuner_addr = ADDR_UNSET, 283 .tuner_addr = ADDR_UNSET,
284 .radio_addr = ADDR_UNSET, 284 .radio_addr = ADDR_UNSET,
285 .tda9887_conf = TDA9887_PRESENT, 285 .tda9887_conf = TDA9887_PRESENT,
286 .input = {{ 286 .input = { {
287 .type = CX88_VMUX_TELEVISION, 287 .type = CX88_VMUX_TELEVISION,
288 .vmux = 0, 288 .vmux = 0,
289 .gpio0 = 0x0035e700, 289 .gpio0 = 0x0035e700,
290 .gpio1 = 0x00003004, 290 .gpio1 = 0x00003004,
291 .gpio2 = 0x0035e700, 291 .gpio2 = 0x0035e700,
292 .gpio3 = 0x02000000, 292 .gpio3 = 0x02000000,
293 },{ 293 }, {
294 294
295 .type = CX88_VMUX_COMPOSITE1, 295 .type = CX88_VMUX_COMPOSITE1,
296 .vmux = 1, 296 .vmux = 1,
@@ -298,14 +298,14 @@ static const struct cx88_board cx88_boards[] = {
298 .gpio1 = 0x00003004, 298 .gpio1 = 0x00003004,
299 .gpio2 = 0x0035c700, 299 .gpio2 = 0x0035c700,
300 .gpio3 = 0x02000000, 300 .gpio3 = 0x02000000,
301 },{ 301 }, {
302 .type = CX88_VMUX_SVIDEO, 302 .type = CX88_VMUX_SVIDEO,
303 .vmux = 2, 303 .vmux = 2,
304 .gpio0 = 0x0035c700, 304 .gpio0 = 0x0035c700,
305 .gpio1 = 0x0035c700, 305 .gpio1 = 0x0035c700,
306 .gpio2 = 0x02000000, 306 .gpio2 = 0x02000000,
307 .gpio3 = 0x02000000, 307 .gpio3 = 0x02000000,
308 }}, 308 } },
309 .radio = { 309 .radio = {
310 .type = CX88_RADIO, 310 .type = CX88_RADIO,
311 .gpio0 = 0x0035d700, 311 .gpio0 = 0x0035d700,
@@ -322,22 +322,22 @@ static const struct cx88_board cx88_boards[] = {
322 .tuner_addr = ADDR_UNSET, 322 .tuner_addr = ADDR_UNSET,
323 .radio_addr = ADDR_UNSET, 323 .radio_addr = ADDR_UNSET,
324 .tda9887_conf = TDA9887_PRESENT, 324 .tda9887_conf = TDA9887_PRESENT,
325 .input = {{ 325 .input = { {
326 .type = CX88_VMUX_TELEVISION, 326 .type = CX88_VMUX_TELEVISION,
327 .vmux = 0, 327 .vmux = 0,
328 .gpio0 = 0x0000bde2, 328 .gpio0 = 0x0000bde2,
329 .audioroute = 1, 329 .audioroute = 1,
330 },{ 330 }, {
331 .type = CX88_VMUX_COMPOSITE1, 331 .type = CX88_VMUX_COMPOSITE1,
332 .vmux = 1, 332 .vmux = 1,
333 .gpio0 = 0x0000bde6, 333 .gpio0 = 0x0000bde6,
334 .audioroute = 1, 334 .audioroute = 1,
335 },{ 335 }, {
336 .type = CX88_VMUX_SVIDEO, 336 .type = CX88_VMUX_SVIDEO,
337 .vmux = 2, 337 .vmux = 2,
338 .gpio0 = 0x0000bde6, 338 .gpio0 = 0x0000bde6,
339 .audioroute = 1, 339 .audioroute = 1,
340 }}, 340 } },
341 .radio = { 341 .radio = {
342 .type = CX88_RADIO, 342 .type = CX88_RADIO,
343 .gpio0 = 0x0000bd62, 343 .gpio0 = 0x0000bd62,
@@ -351,16 +351,16 @@ static const struct cx88_board cx88_boards[] = {
351 .radio_type = UNSET, 351 .radio_type = UNSET,
352 .tuner_addr = ADDR_UNSET, 352 .tuner_addr = ADDR_UNSET,
353 .radio_addr = ADDR_UNSET, 353 .radio_addr = ADDR_UNSET,
354 .input = {{ 354 .input = { {
355 .type = CX88_VMUX_COMPOSITE1, 355 .type = CX88_VMUX_COMPOSITE1,
356 .vmux = 0, 356 .vmux = 0,
357 },{ 357 }, {
358 .type = CX88_VMUX_COMPOSITE2, 358 .type = CX88_VMUX_COMPOSITE2,
359 .vmux = 1, 359 .vmux = 1,
360 },{ 360 }, {
361 .type = CX88_VMUX_SVIDEO, 361 .type = CX88_VMUX_SVIDEO,
362 .vmux = 2, 362 .vmux = 2,
363 }}, 363 } },
364 }, 364 },
365 [CX88_BOARD_PROLINK_PLAYTVPVR] = { 365 [CX88_BOARD_PROLINK_PLAYTVPVR] = {
366 .name = "Prolink PlayTV PVR", 366 .name = "Prolink PlayTV PVR",
@@ -369,19 +369,19 @@ static const struct cx88_board cx88_boards[] = {
369 .tuner_addr = ADDR_UNSET, 369 .tuner_addr = ADDR_UNSET,
370 .radio_addr = ADDR_UNSET, 370 .radio_addr = ADDR_UNSET,
371 .tda9887_conf = TDA9887_PRESENT, 371 .tda9887_conf = TDA9887_PRESENT,
372 .input = {{ 372 .input = { {
373 .type = CX88_VMUX_TELEVISION, 373 .type = CX88_VMUX_TELEVISION,
374 .vmux = 0, 374 .vmux = 0,
375 .gpio0 = 0xbff0, 375 .gpio0 = 0xbff0,
376 },{ 376 }, {
377 .type = CX88_VMUX_COMPOSITE1, 377 .type = CX88_VMUX_COMPOSITE1,
378 .vmux = 1, 378 .vmux = 1,
379 .gpio0 = 0xbff3, 379 .gpio0 = 0xbff3,
380 },{ 380 }, {
381 .type = CX88_VMUX_SVIDEO, 381 .type = CX88_VMUX_SVIDEO,
382 .vmux = 2, 382 .vmux = 2,
383 .gpio0 = 0xbff3, 383 .gpio0 = 0xbff3,
384 }}, 384 } },
385 .radio = { 385 .radio = {
386 .type = CX88_RADIO, 386 .type = CX88_RADIO,
387 .gpio0 = 0xbff0, 387 .gpio0 = 0xbff0,
@@ -394,16 +394,16 @@ static const struct cx88_board cx88_boards[] = {
394 .tuner_addr = ADDR_UNSET, 394 .tuner_addr = ADDR_UNSET,
395 .radio_addr = ADDR_UNSET, 395 .radio_addr = ADDR_UNSET,
396 .tda9887_conf = TDA9887_PRESENT, 396 .tda9887_conf = TDA9887_PRESENT,
397 .input = {{ 397 .input = { {
398 .type = CX88_VMUX_TELEVISION, 398 .type = CX88_VMUX_TELEVISION,
399 .vmux = 0, 399 .vmux = 0,
400 .gpio0 = 0x0000fde6, 400 .gpio0 = 0x0000fde6,
401 },{ 401 }, {
402 .type = CX88_VMUX_SVIDEO, 402 .type = CX88_VMUX_SVIDEO,
403 .vmux = 2, 403 .vmux = 2,
404 .gpio0 = 0x0000fde6, // 0x0000fda6 L,R RCA audio in? 404 .gpio0 = 0x0000fde6, // 0x0000fda6 L,R RCA audio in?
405 .audioroute = 1, 405 .audioroute = 1,
406 }}, 406 } },
407 .radio = { 407 .radio = {
408 .type = CX88_RADIO, 408 .type = CX88_RADIO,
409 .gpio0 = 0x0000fde2, 409 .gpio0 = 0x0000fde2,
@@ -417,22 +417,22 @@ static const struct cx88_board cx88_boards[] = {
417 .tuner_addr = ADDR_UNSET, 417 .tuner_addr = ADDR_UNSET,
418 .radio_addr = ADDR_UNSET, 418 .radio_addr = ADDR_UNSET,
419 .tda9887_conf = TDA9887_PRESENT, 419 .tda9887_conf = TDA9887_PRESENT,
420 .input = {{ 420 .input = { {
421 .type = CX88_VMUX_TELEVISION, 421 .type = CX88_VMUX_TELEVISION,
422 .vmux = 0, 422 .vmux = 0,
423 .gpio0 = 0x00000fbf, 423 .gpio0 = 0x00000fbf,
424 .gpio2 = 0x0000fc08, 424 .gpio2 = 0x0000fc08,
425 },{ 425 }, {
426 .type = CX88_VMUX_COMPOSITE1, 426 .type = CX88_VMUX_COMPOSITE1,
427 .vmux = 1, 427 .vmux = 1,
428 .gpio0 = 0x00000fbf, 428 .gpio0 = 0x00000fbf,
429 .gpio2 = 0x0000fc68, 429 .gpio2 = 0x0000fc68,
430 },{ 430 }, {
431 .type = CX88_VMUX_SVIDEO, 431 .type = CX88_VMUX_SVIDEO,
432 .vmux = 2, 432 .vmux = 2,
433 .gpio0 = 0x00000fbf, 433 .gpio0 = 0x00000fbf,
434 .gpio2 = 0x0000fc68, 434 .gpio2 = 0x0000fc68,
435 }}, 435 } },
436 }, 436 },
437 [CX88_BOARD_KWORLD_DVB_T] = { 437 [CX88_BOARD_KWORLD_DVB_T] = {
438 .name = "KWorld/VStream XPert DVB-T", 438 .name = "KWorld/VStream XPert DVB-T",
@@ -440,17 +440,17 @@ static const struct cx88_board cx88_boards[] = {
440 .radio_type = UNSET, 440 .radio_type = UNSET,
441 .tuner_addr = ADDR_UNSET, 441 .tuner_addr = ADDR_UNSET,
442 .radio_addr = ADDR_UNSET, 442 .radio_addr = ADDR_UNSET,
443 .input = {{ 443 .input = { {
444 .type = CX88_VMUX_COMPOSITE1, 444 .type = CX88_VMUX_COMPOSITE1,
445 .vmux = 1, 445 .vmux = 1,
446 .gpio0 = 0x0700, 446 .gpio0 = 0x0700,
447 .gpio2 = 0x0101, 447 .gpio2 = 0x0101,
448 },{ 448 }, {
449 .type = CX88_VMUX_SVIDEO, 449 .type = CX88_VMUX_SVIDEO,
450 .vmux = 2, 450 .vmux = 2,
451 .gpio0 = 0x0700, 451 .gpio0 = 0x0700,
452 .gpio2 = 0x0101, 452 .gpio2 = 0x0101,
453 }}, 453 } },
454 .mpeg = CX88_MPEG_DVB, 454 .mpeg = CX88_MPEG_DVB,
455 }, 455 },
456 [CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1] = { 456 [CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1] = {
@@ -459,15 +459,15 @@ static const struct cx88_board cx88_boards[] = {
459 .radio_type = UNSET, 459 .radio_type = UNSET,
460 .tuner_addr = ADDR_UNSET, 460 .tuner_addr = ADDR_UNSET,
461 .radio_addr = ADDR_UNSET, 461 .radio_addr = ADDR_UNSET,
462 .input = {{ 462 .input = { {
463 .type = CX88_VMUX_COMPOSITE1, 463 .type = CX88_VMUX_COMPOSITE1,
464 .vmux = 1, 464 .vmux = 1,
465 .gpio0 = 0x000027df, 465 .gpio0 = 0x000027df,
466 },{ 466 }, {
467 .type = CX88_VMUX_SVIDEO, 467 .type = CX88_VMUX_SVIDEO,
468 .vmux = 2, 468 .vmux = 2,
469 .gpio0 = 0x000027df, 469 .gpio0 = 0x000027df,
470 }}, 470 } },
471 .mpeg = CX88_MPEG_DVB, 471 .mpeg = CX88_MPEG_DVB,
472 }, 472 },
473 [CX88_BOARD_KWORLD_LTV883] = { 473 [CX88_BOARD_KWORLD_LTV883] = {
@@ -476,23 +476,23 @@ static const struct cx88_board cx88_boards[] = {
476 .radio_type = UNSET, 476 .radio_type = UNSET,
477 .tuner_addr = ADDR_UNSET, 477 .tuner_addr = ADDR_UNSET,
478 .radio_addr = ADDR_UNSET, 478 .radio_addr = ADDR_UNSET,
479 .input = {{ 479 .input = { {
480 .type = CX88_VMUX_TELEVISION, 480 .type = CX88_VMUX_TELEVISION,
481 .vmux = 0, 481 .vmux = 0,
482 .gpio0 = 0x07f8, 482 .gpio0 = 0x07f8,
483 },{ 483 }, {
484 .type = CX88_VMUX_DEBUG, 484 .type = CX88_VMUX_DEBUG,
485 .vmux = 0, 485 .vmux = 0,
486 .gpio0 = 0x07f9, // mono from tuner chip 486 .gpio0 = 0x07f9, // mono from tuner chip
487 },{ 487 }, {
488 .type = CX88_VMUX_COMPOSITE1, 488 .type = CX88_VMUX_COMPOSITE1,
489 .vmux = 1, 489 .vmux = 1,
490 .gpio0 = 0x000007fa, 490 .gpio0 = 0x000007fa,
491 },{ 491 }, {
492 .type = CX88_VMUX_SVIDEO, 492 .type = CX88_VMUX_SVIDEO,
493 .vmux = 2, 493 .vmux = 2,
494 .gpio0 = 0x000007fa, 494 .gpio0 = 0x000007fa,
495 }}, 495 } },
496 .radio = { 496 .radio = {
497 .type = CX88_RADIO, 497 .type = CX88_RADIO,
498 .gpio0 = 0x000007f8, 498 .gpio0 = 0x000007f8,
@@ -521,23 +521,23 @@ static const struct cx88_board cx88_boards[] = {
521 0 - normal RF 521 0 - normal RF
522 1 - high RF 522 1 - high RF
523 */ 523 */
524 .input = {{ 524 .input = { {
525 .type = CX88_VMUX_TELEVISION, 525 .type = CX88_VMUX_TELEVISION,
526 .vmux = 0, 526 .vmux = 0,
527 .gpio0 = 0x0f0d, 527 .gpio0 = 0x0f0d,
528 },{ 528 }, {
529 .type = CX88_VMUX_CABLE, 529 .type = CX88_VMUX_CABLE,
530 .vmux = 0, 530 .vmux = 0,
531 .gpio0 = 0x0f05, 531 .gpio0 = 0x0f05,
532 },{ 532 }, {
533 .type = CX88_VMUX_COMPOSITE1, 533 .type = CX88_VMUX_COMPOSITE1,
534 .vmux = 1, 534 .vmux = 1,
535 .gpio0 = 0x0f00, 535 .gpio0 = 0x0f00,
536 },{ 536 }, {
537 .type = CX88_VMUX_SVIDEO, 537 .type = CX88_VMUX_SVIDEO,
538 .vmux = 2, 538 .vmux = 2,
539 .gpio0 = 0x0f00, 539 .gpio0 = 0x0f00,
540 }}, 540 } },
541 .mpeg = CX88_MPEG_DVB, 541 .mpeg = CX88_MPEG_DVB,
542 }, 542 },
543 [CX88_BOARD_HAUPPAUGE_DVB_T1] = { 543 [CX88_BOARD_HAUPPAUGE_DVB_T1] = {
@@ -546,10 +546,10 @@ static const struct cx88_board cx88_boards[] = {
546 .radio_type = UNSET, 546 .radio_type = UNSET,
547 .tuner_addr = ADDR_UNSET, 547 .tuner_addr = ADDR_UNSET,
548 .radio_addr = ADDR_UNSET, 548 .radio_addr = ADDR_UNSET,
549 .input = {{ 549 .input = { {
550 .type = CX88_VMUX_DVB, 550 .type = CX88_VMUX_DVB,
551 .vmux = 0, 551 .vmux = 0,
552 }}, 552 } },
553 .mpeg = CX88_MPEG_DVB, 553 .mpeg = CX88_MPEG_DVB,
554 }, 554 },
555 [CX88_BOARD_CONEXANT_DVB_T1] = { 555 [CX88_BOARD_CONEXANT_DVB_T1] = {
@@ -558,10 +558,10 @@ static const struct cx88_board cx88_boards[] = {
558 .radio_type = UNSET, 558 .radio_type = UNSET,
559 .tuner_addr = ADDR_UNSET, 559 .tuner_addr = ADDR_UNSET,
560 .radio_addr = ADDR_UNSET, 560 .radio_addr = ADDR_UNSET,
561 .input = {{ 561 .input = { {
562 .type = CX88_VMUX_DVB, 562 .type = CX88_VMUX_DVB,
563 .vmux = 0, 563 .vmux = 0,
564 }}, 564 } },
565 .mpeg = CX88_MPEG_DVB, 565 .mpeg = CX88_MPEG_DVB,
566 }, 566 },
567 [CX88_BOARD_PROVIDEO_PV259] = { 567 [CX88_BOARD_PROVIDEO_PV259] = {
@@ -570,11 +570,11 @@ static const struct cx88_board cx88_boards[] = {
570 .radio_type = UNSET, 570 .radio_type = UNSET,
571 .tuner_addr = ADDR_UNSET, 571 .tuner_addr = ADDR_UNSET,
572 .radio_addr = ADDR_UNSET, 572 .radio_addr = ADDR_UNSET,
573 .input = {{ 573 .input = { {
574 .type = CX88_VMUX_TELEVISION, 574 .type = CX88_VMUX_TELEVISION,
575 .vmux = 0, 575 .vmux = 0,
576 .audioroute = 1, 576 .audioroute = 1,
577 }}, 577 } },
578 .mpeg = CX88_MPEG_BLACKBIRD, 578 .mpeg = CX88_MPEG_BLACKBIRD,
579 }, 579 },
580 [CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS] = { 580 [CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS] = {
@@ -583,15 +583,15 @@ static const struct cx88_board cx88_boards[] = {
583 .radio_type = UNSET, 583 .radio_type = UNSET,
584 .tuner_addr = ADDR_UNSET, 584 .tuner_addr = ADDR_UNSET,
585 .radio_addr = ADDR_UNSET, 585 .radio_addr = ADDR_UNSET,
586 .input = {{ 586 .input = { {
587 .type = CX88_VMUX_COMPOSITE1, 587 .type = CX88_VMUX_COMPOSITE1,
588 .vmux = 1, 588 .vmux = 1,
589 .gpio0 = 0x000027df, 589 .gpio0 = 0x000027df,
590 },{ 590 }, {
591 .type = CX88_VMUX_SVIDEO, 591 .type = CX88_VMUX_SVIDEO,
592 .vmux = 2, 592 .vmux = 2,
593 .gpio0 = 0x000027df, 593 .gpio0 = 0x000027df,
594 }}, 594 } },
595 .mpeg = CX88_MPEG_DVB, 595 .mpeg = CX88_MPEG_DVB,
596 }, 596 },
597 [CX88_BOARD_DNTV_LIVE_DVB_T] = { 597 [CX88_BOARD_DNTV_LIVE_DVB_T] = {
@@ -600,17 +600,17 @@ static const struct cx88_board cx88_boards[] = {
600 .radio_type = UNSET, 600 .radio_type = UNSET,
601 .tuner_addr = ADDR_UNSET, 601 .tuner_addr = ADDR_UNSET,
602 .radio_addr = ADDR_UNSET, 602 .radio_addr = ADDR_UNSET,
603 .input = {{ 603 .input = { {
604 .type = CX88_VMUX_COMPOSITE1, 604 .type = CX88_VMUX_COMPOSITE1,
605 .vmux = 1, 605 .vmux = 1,
606 .gpio0 = 0x00000700, 606 .gpio0 = 0x00000700,
607 .gpio2 = 0x00000101, 607 .gpio2 = 0x00000101,
608 },{ 608 }, {
609 .type = CX88_VMUX_SVIDEO, 609 .type = CX88_VMUX_SVIDEO,
610 .vmux = 2, 610 .vmux = 2,
611 .gpio0 = 0x00000700, 611 .gpio0 = 0x00000700,
612 .gpio2 = 0x00000101, 612 .gpio2 = 0x00000101,
613 }}, 613 } },
614 .mpeg = CX88_MPEG_DVB, 614 .mpeg = CX88_MPEG_DVB,
615 }, 615 },
616 [CX88_BOARD_PCHDTV_HD3000] = { 616 [CX88_BOARD_PCHDTV_HD3000] = {
@@ -632,19 +632,19 @@ static const struct cx88_board cx88_boards[] = {
632 * 632 *
633 * GPIO[16] = Remote control input 633 * GPIO[16] = Remote control input
634 */ 634 */
635 .input = {{ 635 .input = { {
636 .type = CX88_VMUX_TELEVISION, 636 .type = CX88_VMUX_TELEVISION,
637 .vmux = 0, 637 .vmux = 0,
638 .gpio0 = 0x00008484, 638 .gpio0 = 0x00008484,
639 },{ 639 }, {
640 .type = CX88_VMUX_COMPOSITE1, 640 .type = CX88_VMUX_COMPOSITE1,
641 .vmux = 1, 641 .vmux = 1,
642 .gpio0 = 0x00008400, 642 .gpio0 = 0x00008400,
643 },{ 643 }, {
644 .type = CX88_VMUX_SVIDEO, 644 .type = CX88_VMUX_SVIDEO,
645 .vmux = 2, 645 .vmux = 2,
646 .gpio0 = 0x00008400, 646 .gpio0 = 0x00008400,
647 }}, 647 } },
648 .radio = { 648 .radio = {
649 .type = CX88_RADIO, 649 .type = CX88_RADIO,
650 .gpio0 = 0x00008404, 650 .gpio0 = 0x00008404,
@@ -659,25 +659,25 @@ static const struct cx88_board cx88_boards[] = {
659 .radio_type = UNSET, 659 .radio_type = UNSET,
660 .tuner_addr = ADDR_UNSET, 660 .tuner_addr = ADDR_UNSET,
661 .radio_addr = ADDR_UNSET, 661 .radio_addr = ADDR_UNSET,
662 .input = {{ 662 .input = { {
663 .type = CX88_VMUX_TELEVISION, 663 .type = CX88_VMUX_TELEVISION,
664 .vmux = 0, 664 .vmux = 0,
665 .gpio0 = 0xed1a, 665 .gpio0 = 0xed1a,
666 .gpio2 = 0x00ff, 666 .gpio2 = 0x00ff,
667 },{ 667 }, {
668 .type = CX88_VMUX_DEBUG, 668 .type = CX88_VMUX_DEBUG,
669 .vmux = 0, 669 .vmux = 0,
670 .gpio0 = 0xff01, 670 .gpio0 = 0xff01,
671 },{ 671 }, {
672 .type = CX88_VMUX_COMPOSITE1, 672 .type = CX88_VMUX_COMPOSITE1,
673 .vmux = 1, 673 .vmux = 1,
674 .gpio0 = 0xff02, 674 .gpio0 = 0xff02,
675 },{ 675 }, {
676 .type = CX88_VMUX_SVIDEO, 676 .type = CX88_VMUX_SVIDEO,
677 .vmux = 2, 677 .vmux = 2,
678 .gpio0 = 0xed92, 678 .gpio0 = 0xed92,
679 .gpio2 = 0x00ff, 679 .gpio2 = 0x00ff,
680 }}, 680 } },
681 .radio = { 681 .radio = {
682 .type = CX88_RADIO, 682 .type = CX88_RADIO,
683 .gpio0 = 0xed96, 683 .gpio0 = 0xed96,
@@ -692,22 +692,22 @@ static const struct cx88_board cx88_boards[] = {
692 .tuner_addr = ADDR_UNSET, 692 .tuner_addr = ADDR_UNSET,
693 .radio_addr = ADDR_UNSET, 693 .radio_addr = ADDR_UNSET,
694 .tda9887_conf = TDA9887_PRESENT, 694 .tda9887_conf = TDA9887_PRESENT,
695 .input = {{ 695 .input = { {
696 .type = CX88_VMUX_TELEVISION, 696 .type = CX88_VMUX_TELEVISION,
697 .vmux = 0, 697 .vmux = 0,
698 .gpio0 = 0x00009d80, 698 .gpio0 = 0x00009d80,
699 .audioroute = 1, 699 .audioroute = 1,
700 },{ 700 }, {
701 .type = CX88_VMUX_COMPOSITE1, 701 .type = CX88_VMUX_COMPOSITE1,
702 .vmux = 1, 702 .vmux = 1,
703 .gpio0 = 0x00009d76, 703 .gpio0 = 0x00009d76,
704 .audioroute = 1, 704 .audioroute = 1,
705 },{ 705 }, {
706 .type = CX88_VMUX_SVIDEO, 706 .type = CX88_VMUX_SVIDEO,
707 .vmux = 2, 707 .vmux = 2,
708 .gpio0 = 0x00009d76, 708 .gpio0 = 0x00009d76,
709 .audioroute = 1, 709 .audioroute = 1,
710 }}, 710 } },
711 .radio = { 711 .radio = {
712 .type = CX88_RADIO, 712 .type = CX88_RADIO,
713 .gpio0 = 0x00009d00, 713 .gpio0 = 0x00009d00,
@@ -722,19 +722,19 @@ static const struct cx88_board cx88_boards[] = {
722 .tuner_addr = ADDR_UNSET, 722 .tuner_addr = ADDR_UNSET,
723 .radio_addr = ADDR_UNSET, 723 .radio_addr = ADDR_UNSET,
724 .tda9887_conf = TDA9887_PRESENT, 724 .tda9887_conf = TDA9887_PRESENT,
725 .input = {{ 725 .input = { {
726 .type = CX88_VMUX_TELEVISION, 726 .type = CX88_VMUX_TELEVISION,
727 .vmux = 1, 727 .vmux = 1,
728 .gpio1 = 0x0000e03f, 728 .gpio1 = 0x0000e03f,
729 },{ 729 }, {
730 .type = CX88_VMUX_COMPOSITE1, 730 .type = CX88_VMUX_COMPOSITE1,
731 .vmux = 2, 731 .vmux = 2,
732 .gpio1 = 0x0000e07f, 732 .gpio1 = 0x0000e07f,
733 },{ 733 }, {
734 .type = CX88_VMUX_SVIDEO, 734 .type = CX88_VMUX_SVIDEO,
735 .vmux = 3, 735 .vmux = 3,
736 .gpio1 = 0x0000e07f, 736 .gpio1 = 0x0000e07f,
737 }} 737 } }
738 }, 738 },
739 [CX88_BOARD_PIXELVIEW_PLAYTV_ULTRA_PRO] = { 739 [CX88_BOARD_PIXELVIEW_PLAYTV_ULTRA_PRO] = {
740 .name = "PixelView PlayTV Ultra Pro (Stereo)", 740 .name = "PixelView PlayTV Ultra Pro (Stereo)",
@@ -745,19 +745,19 @@ static const struct cx88_board cx88_boards[] = {
745 .radio_addr = ADDR_UNSET, 745 .radio_addr = ADDR_UNSET,
746 /* Some variants use a tda9874 and so need the tvaudio module. */ 746 /* Some variants use a tda9874 and so need the tvaudio module. */
747 .audio_chip = CX88_AUDIO_TVAUDIO, 747 .audio_chip = CX88_AUDIO_TVAUDIO,
748 .input = {{ 748 .input = { {
749 .type = CX88_VMUX_TELEVISION, 749 .type = CX88_VMUX_TELEVISION,
750 .vmux = 0, 750 .vmux = 0,
751 .gpio0 = 0xbf61, /* internal decoder */ 751 .gpio0 = 0xbf61, /* internal decoder */
752 },{ 752 }, {
753 .type = CX88_VMUX_COMPOSITE1, 753 .type = CX88_VMUX_COMPOSITE1,
754 .vmux = 1, 754 .vmux = 1,
755 .gpio0 = 0xbf63, 755 .gpio0 = 0xbf63,
756 },{ 756 }, {
757 .type = CX88_VMUX_SVIDEO, 757 .type = CX88_VMUX_SVIDEO,
758 .vmux = 2, 758 .vmux = 2,
759 .gpio0 = 0xbf63, 759 .gpio0 = 0xbf63,
760 }}, 760 } },
761 .radio = { 761 .radio = {
762 .type = CX88_RADIO, 762 .type = CX88_RADIO,
763 .gpio0 = 0xbf60, 763 .gpio0 = 0xbf60,
@@ -770,19 +770,19 @@ static const struct cx88_board cx88_boards[] = {
770 .tuner_addr = ADDR_UNSET, 770 .tuner_addr = ADDR_UNSET,
771 .radio_addr = ADDR_UNSET, 771 .radio_addr = ADDR_UNSET,
772 .tda9887_conf = TDA9887_PRESENT, 772 .tda9887_conf = TDA9887_PRESENT,
773 .input = {{ 773 .input = { {
774 .type = CX88_VMUX_TELEVISION, 774 .type = CX88_VMUX_TELEVISION,
775 .vmux = 0, 775 .vmux = 0,
776 .gpio0 = 0x97ed, 776 .gpio0 = 0x97ed,
777 },{ 777 }, {
778 .type = CX88_VMUX_COMPOSITE1, 778 .type = CX88_VMUX_COMPOSITE1,
779 .vmux = 1, 779 .vmux = 1,
780 .gpio0 = 0x97e9, 780 .gpio0 = 0x97e9,
781 },{ 781 }, {
782 .type = CX88_VMUX_SVIDEO, 782 .type = CX88_VMUX_SVIDEO,
783 .vmux = 2, 783 .vmux = 2,
784 .gpio0 = 0x97e9, 784 .gpio0 = 0x97e9,
785 }}, 785 } },
786 .mpeg = CX88_MPEG_DVB, 786 .mpeg = CX88_MPEG_DVB,
787 }, 787 },
788 [CX88_BOARD_ADSTECH_DVB_T_PCI] = { 788 [CX88_BOARD_ADSTECH_DVB_T_PCI] = {
@@ -791,32 +791,32 @@ static const struct cx88_board cx88_boards[] = {
791 .radio_type = UNSET, 791 .radio_type = UNSET,
792 .tuner_addr = ADDR_UNSET, 792 .tuner_addr = ADDR_UNSET,
793 .radio_addr = ADDR_UNSET, 793 .radio_addr = ADDR_UNSET,
794 .input = {{ 794 .input = { {
795 .type = CX88_VMUX_COMPOSITE1, 795 .type = CX88_VMUX_COMPOSITE1,
796 .vmux = 1, 796 .vmux = 1,
797 .gpio0 = 0x0700, 797 .gpio0 = 0x0700,
798 .gpio2 = 0x0101, 798 .gpio2 = 0x0101,
799 },{ 799 }, {
800 .type = CX88_VMUX_SVIDEO, 800 .type = CX88_VMUX_SVIDEO,
801 .vmux = 2, 801 .vmux = 2,
802 .gpio0 = 0x0700, 802 .gpio0 = 0x0700,
803 .gpio2 = 0x0101, 803 .gpio2 = 0x0101,
804 }}, 804 } },
805 .mpeg = CX88_MPEG_DVB, 805 .mpeg = CX88_MPEG_DVB,
806 }, 806 },
807 [CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1] = { 807 [CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1] = {
808 .name = "TerraTec Cinergy 1400 DVB-T", 808 .name = "TerraTec Cinergy 1400 DVB-T",
809 .tuner_type = TUNER_ABSENT, 809 .tuner_type = TUNER_ABSENT,
810 .input = {{ 810 .input = { {
811 .type = CX88_VMUX_DVB, 811 .type = CX88_VMUX_DVB,
812 .vmux = 0, 812 .vmux = 0,
813 },{ 813 }, {
814 .type = CX88_VMUX_COMPOSITE1, 814 .type = CX88_VMUX_COMPOSITE1,
815 .vmux = 2, 815 .vmux = 2,
816 },{ 816 }, {
817 .type = CX88_VMUX_SVIDEO, 817 .type = CX88_VMUX_SVIDEO,
818 .vmux = 2, 818 .vmux = 2,
819 }}, 819 } },
820 .mpeg = CX88_MPEG_DVB, 820 .mpeg = CX88_MPEG_DVB,
821 }, 821 },
822 [CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD] = { 822 [CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD] = {
@@ -826,19 +826,19 @@ static const struct cx88_board cx88_boards[] = {
826 .tuner_addr = ADDR_UNSET, 826 .tuner_addr = ADDR_UNSET,
827 .radio_addr = ADDR_UNSET, 827 .radio_addr = ADDR_UNSET,
828 .tda9887_conf = TDA9887_PRESENT, 828 .tda9887_conf = TDA9887_PRESENT,
829 .input = {{ 829 .input = { {
830 .type = CX88_VMUX_TELEVISION, 830 .type = CX88_VMUX_TELEVISION,
831 .vmux = 0, 831 .vmux = 0,
832 .gpio0 = 0x87fd, 832 .gpio0 = 0x87fd,
833 },{ 833 }, {
834 .type = CX88_VMUX_COMPOSITE1, 834 .type = CX88_VMUX_COMPOSITE1,
835 .vmux = 1, 835 .vmux = 1,
836 .gpio0 = 0x87f9, 836 .gpio0 = 0x87f9,
837 },{ 837 }, {
838 .type = CX88_VMUX_SVIDEO, 838 .type = CX88_VMUX_SVIDEO,
839 .vmux = 2, 839 .vmux = 2,
840 .gpio0 = 0x87f9, 840 .gpio0 = 0x87f9,
841 }}, 841 } },
842 .mpeg = CX88_MPEG_DVB, 842 .mpeg = CX88_MPEG_DVB,
843 }, 843 },
844 [CX88_BOARD_AVERMEDIA_ULTRATV_MC_550] = { 844 [CX88_BOARD_AVERMEDIA_ULTRATV_MC_550] = {
@@ -848,22 +848,22 @@ static const struct cx88_board cx88_boards[] = {
848 .tuner_addr = ADDR_UNSET, 848 .tuner_addr = ADDR_UNSET,
849 .radio_addr = ADDR_UNSET, 849 .radio_addr = ADDR_UNSET,
850 .tda9887_conf = TDA9887_PRESENT, 850 .tda9887_conf = TDA9887_PRESENT,
851 .input = {{ 851 .input = { {
852 .type = CX88_VMUX_COMPOSITE1, 852 .type = CX88_VMUX_COMPOSITE1,
853 .vmux = 0, 853 .vmux = 0,
854 .gpio0 = 0x0000cd73, 854 .gpio0 = 0x0000cd73,
855 .audioroute = 1, 855 .audioroute = 1,
856 },{ 856 }, {
857 .type = CX88_VMUX_SVIDEO, 857 .type = CX88_VMUX_SVIDEO,
858 .vmux = 1, 858 .vmux = 1,
859 .gpio0 = 0x0000cd73, 859 .gpio0 = 0x0000cd73,
860 .audioroute = 1, 860 .audioroute = 1,
861 },{ 861 }, {
862 .type = CX88_VMUX_TELEVISION, 862 .type = CX88_VMUX_TELEVISION,
863 .vmux = 3, 863 .vmux = 3,
864 .gpio0 = 0x0000cdb3, 864 .gpio0 = 0x0000cdb3,
865 .audioroute = 1, 865 .audioroute = 1,
866 }}, 866 } },
867 .radio = { 867 .radio = {
868 .type = CX88_RADIO, 868 .type = CX88_RADIO,
869 .vmux = 2, 869 .vmux = 2,
@@ -876,21 +876,21 @@ static const struct cx88_board cx88_boards[] = {
876 /* Alexander Wold <awold@bigfoot.com> */ 876 /* Alexander Wold <awold@bigfoot.com> */
877 .name = "Kworld V-Stream Xpert DVD", 877 .name = "Kworld V-Stream Xpert DVD",
878 .tuner_type = UNSET, 878 .tuner_type = UNSET,
879 .input = {{ 879 .input = { {
880 .type = CX88_VMUX_COMPOSITE1, 880 .type = CX88_VMUX_COMPOSITE1,
881 .vmux = 1, 881 .vmux = 1,
882 .gpio0 = 0x03000000, 882 .gpio0 = 0x03000000,
883 .gpio1 = 0x01000000, 883 .gpio1 = 0x01000000,
884 .gpio2 = 0x02000000, 884 .gpio2 = 0x02000000,
885 .gpio3 = 0x00100000, 885 .gpio3 = 0x00100000,
886 },{ 886 }, {
887 .type = CX88_VMUX_SVIDEO, 887 .type = CX88_VMUX_SVIDEO,
888 .vmux = 2, 888 .vmux = 2,
889 .gpio0 = 0x03000000, 889 .gpio0 = 0x03000000,
890 .gpio1 = 0x01000000, 890 .gpio1 = 0x01000000,
891 .gpio2 = 0x02000000, 891 .gpio2 = 0x02000000,
892 .gpio3 = 0x00100000, 892 .gpio3 = 0x00100000,
893 }}, 893 } },
894 }, 894 },
895 [CX88_BOARD_ATI_HDTVWONDER] = { 895 [CX88_BOARD_ATI_HDTVWONDER] = {
896 .name = "ATI HDTV Wonder", 896 .name = "ATI HDTV Wonder",
@@ -898,28 +898,28 @@ static const struct cx88_board cx88_boards[] = {
898 .radio_type = UNSET, 898 .radio_type = UNSET,
899 .tuner_addr = ADDR_UNSET, 899 .tuner_addr = ADDR_UNSET,
900 .radio_addr = ADDR_UNSET, 900 .radio_addr = ADDR_UNSET,
901 .input = {{ 901 .input = { {
902 .type = CX88_VMUX_TELEVISION, 902 .type = CX88_VMUX_TELEVISION,
903 .vmux = 0, 903 .vmux = 0,
904 .gpio0 = 0x00000ff7, 904 .gpio0 = 0x00000ff7,
905 .gpio1 = 0x000000ff, 905 .gpio1 = 0x000000ff,
906 .gpio2 = 0x00000001, 906 .gpio2 = 0x00000001,
907 .gpio3 = 0x00000000, 907 .gpio3 = 0x00000000,
908 },{ 908 }, {
909 .type = CX88_VMUX_COMPOSITE1, 909 .type = CX88_VMUX_COMPOSITE1,
910 .vmux = 1, 910 .vmux = 1,
911 .gpio0 = 0x00000ffe, 911 .gpio0 = 0x00000ffe,
912 .gpio1 = 0x000000ff, 912 .gpio1 = 0x000000ff,
913 .gpio2 = 0x00000001, 913 .gpio2 = 0x00000001,
914 .gpio3 = 0x00000000, 914 .gpio3 = 0x00000000,
915 },{ 915 }, {
916 .type = CX88_VMUX_SVIDEO, 916 .type = CX88_VMUX_SVIDEO,
917 .vmux = 2, 917 .vmux = 2,
918 .gpio0 = 0x00000ffe, 918 .gpio0 = 0x00000ffe,
919 .gpio1 = 0x000000ff, 919 .gpio1 = 0x000000ff,
920 .gpio2 = 0x00000001, 920 .gpio2 = 0x00000001,
921 .gpio3 = 0x00000000, 921 .gpio3 = 0x00000000,
922 }}, 922 } },
923 .mpeg = CX88_MPEG_DVB, 923 .mpeg = CX88_MPEG_DVB,
924 }, 924 },
925 [CX88_BOARD_WINFAST_DTV1000] = { 925 [CX88_BOARD_WINFAST_DTV1000] = {
@@ -928,16 +928,16 @@ static const struct cx88_board cx88_boards[] = {
928 .radio_type = UNSET, 928 .radio_type = UNSET,
929 .tuner_addr = ADDR_UNSET, 929 .tuner_addr = ADDR_UNSET,
930 .radio_addr = ADDR_UNSET, 930 .radio_addr = ADDR_UNSET,
931 .input = {{ 931 .input = { {
932 .type = CX88_VMUX_DVB, 932 .type = CX88_VMUX_DVB,
933 .vmux = 0, 933 .vmux = 0,
934 },{ 934 }, {
935 .type = CX88_VMUX_COMPOSITE1, 935 .type = CX88_VMUX_COMPOSITE1,
936 .vmux = 1, 936 .vmux = 1,
937 },{ 937 }, {
938 .type = CX88_VMUX_SVIDEO, 938 .type = CX88_VMUX_SVIDEO,
939 .vmux = 2, 939 .vmux = 2,
940 }}, 940 } },
941 .mpeg = CX88_MPEG_DVB, 941 .mpeg = CX88_MPEG_DVB,
942 }, 942 },
943 [CX88_BOARD_AVERTV_303] = { 943 [CX88_BOARD_AVERTV_303] = {
@@ -947,28 +947,28 @@ static const struct cx88_board cx88_boards[] = {
947 .tuner_addr = ADDR_UNSET, 947 .tuner_addr = ADDR_UNSET,
948 .radio_addr = ADDR_UNSET, 948 .radio_addr = ADDR_UNSET,
949 .tda9887_conf = TDA9887_PRESENT, 949 .tda9887_conf = TDA9887_PRESENT,
950 .input = {{ 950 .input = { {
951 .type = CX88_VMUX_TELEVISION, 951 .type = CX88_VMUX_TELEVISION,
952 .vmux = 0, 952 .vmux = 0,
953 .gpio0 = 0x00ff, 953 .gpio0 = 0x00ff,
954 .gpio1 = 0xe09f, 954 .gpio1 = 0xe09f,
955 .gpio2 = 0x0010, 955 .gpio2 = 0x0010,
956 .gpio3 = 0x0000, 956 .gpio3 = 0x0000,
957 },{ 957 }, {
958 .type = CX88_VMUX_COMPOSITE1, 958 .type = CX88_VMUX_COMPOSITE1,
959 .vmux = 1, 959 .vmux = 1,
960 .gpio0 = 0x00ff, 960 .gpio0 = 0x00ff,
961 .gpio1 = 0xe05f, 961 .gpio1 = 0xe05f,
962 .gpio2 = 0x0010, 962 .gpio2 = 0x0010,
963 .gpio3 = 0x0000, 963 .gpio3 = 0x0000,
964 },{ 964 }, {
965 .type = CX88_VMUX_SVIDEO, 965 .type = CX88_VMUX_SVIDEO,
966 .vmux = 2, 966 .vmux = 2,
967 .gpio0 = 0x00ff, 967 .gpio0 = 0x00ff,
968 .gpio1 = 0xe05f, 968 .gpio1 = 0xe05f,
969 .gpio2 = 0x0010, 969 .gpio2 = 0x0010,
970 .gpio3 = 0x0000, 970 .gpio3 = 0x0000,
971 }}, 971 } },
972 }, 972 },
973 [CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1] = { 973 [CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1] = {
974 .name = "Hauppauge Nova-S-Plus DVB-S", 974 .name = "Hauppauge Nova-S-Plus DVB-S",
@@ -978,22 +978,22 @@ static const struct cx88_board cx88_boards[] = {
978 .radio_addr = ADDR_UNSET, 978 .radio_addr = ADDR_UNSET,
979 .audio_chip = CX88_AUDIO_WM8775, 979 .audio_chip = CX88_AUDIO_WM8775,
980 .i2sinputcntl = 2, 980 .i2sinputcntl = 2,
981 .input = {{ 981 .input = { {
982 .type = CX88_VMUX_DVB, 982 .type = CX88_VMUX_DVB,
983 .vmux = 0, 983 .vmux = 0,
984 /* 2: Line-In */ 984 /* 2: Line-In */
985 .audioroute = 2, 985 .audioroute = 2,
986 },{ 986 }, {
987 .type = CX88_VMUX_COMPOSITE1, 987 .type = CX88_VMUX_COMPOSITE1,
988 .vmux = 1, 988 .vmux = 1,
989 /* 2: Line-In */ 989 /* 2: Line-In */
990 .audioroute = 2, 990 .audioroute = 2,
991 },{ 991 }, {
992 .type = CX88_VMUX_SVIDEO, 992 .type = CX88_VMUX_SVIDEO,
993 .vmux = 2, 993 .vmux = 2,
994 /* 2: Line-In */ 994 /* 2: Line-In */
995 .audioroute = 2, 995 .audioroute = 2,
996 }}, 996 } },
997 .mpeg = CX88_MPEG_DVB, 997 .mpeg = CX88_MPEG_DVB,
998 }, 998 },
999 [CX88_BOARD_HAUPPAUGE_NOVASE2_S1] = { 999 [CX88_BOARD_HAUPPAUGE_NOVASE2_S1] = {
@@ -1002,10 +1002,10 @@ static const struct cx88_board cx88_boards[] = {
1002 .radio_type = UNSET, 1002 .radio_type = UNSET,
1003 .tuner_addr = ADDR_UNSET, 1003 .tuner_addr = ADDR_UNSET,
1004 .radio_addr = ADDR_UNSET, 1004 .radio_addr = ADDR_UNSET,
1005 .input = {{ 1005 .input = { {
1006 .type = CX88_VMUX_DVB, 1006 .type = CX88_VMUX_DVB,
1007 .vmux = 0, 1007 .vmux = 0,
1008 }}, 1008 } },
1009 .mpeg = CX88_MPEG_DVB, 1009 .mpeg = CX88_MPEG_DVB,
1010 }, 1010 },
1011 [CX88_BOARD_KWORLD_DVBS_100] = { 1011 [CX88_BOARD_KWORLD_DVBS_100] = {
@@ -1015,22 +1015,22 @@ static const struct cx88_board cx88_boards[] = {
1015 .tuner_addr = ADDR_UNSET, 1015 .tuner_addr = ADDR_UNSET,
1016 .radio_addr = ADDR_UNSET, 1016 .radio_addr = ADDR_UNSET,
1017 .audio_chip = CX88_AUDIO_WM8775, 1017 .audio_chip = CX88_AUDIO_WM8775,
1018 .input = {{ 1018 .input = { {
1019 .type = CX88_VMUX_DVB, 1019 .type = CX88_VMUX_DVB,
1020 .vmux = 0, 1020 .vmux = 0,
1021 /* 2: Line-In */ 1021 /* 2: Line-In */
1022 .audioroute = 2, 1022 .audioroute = 2,
1023 },{ 1023 }, {
1024 .type = CX88_VMUX_COMPOSITE1, 1024 .type = CX88_VMUX_COMPOSITE1,
1025 .vmux = 1, 1025 .vmux = 1,
1026 /* 2: Line-In */ 1026 /* 2: Line-In */
1027 .audioroute = 2, 1027 .audioroute = 2,
1028 },{ 1028 }, {
1029 .type = CX88_VMUX_SVIDEO, 1029 .type = CX88_VMUX_SVIDEO,
1030 .vmux = 2, 1030 .vmux = 2,
1031 /* 2: Line-In */ 1031 /* 2: Line-In */
1032 .audioroute = 2, 1032 .audioroute = 2,
1033 }}, 1033 } },
1034 .mpeg = CX88_MPEG_DVB, 1034 .mpeg = CX88_MPEG_DVB,
1035 }, 1035 },
1036 [CX88_BOARD_HAUPPAUGE_HVR1100] = { 1036 [CX88_BOARD_HAUPPAUGE_HVR1100] = {
@@ -1040,16 +1040,16 @@ static const struct cx88_board cx88_boards[] = {
1040 .tuner_addr = ADDR_UNSET, 1040 .tuner_addr = ADDR_UNSET,
1041 .radio_addr = ADDR_UNSET, 1041 .radio_addr = ADDR_UNSET,
1042 .tda9887_conf = TDA9887_PRESENT, 1042 .tda9887_conf = TDA9887_PRESENT,
1043 .input = {{ 1043 .input = { {
1044 .type = CX88_VMUX_TELEVISION, 1044 .type = CX88_VMUX_TELEVISION,
1045 .vmux = 0, 1045 .vmux = 0,
1046 },{ 1046 }, {
1047 .type = CX88_VMUX_COMPOSITE1, 1047 .type = CX88_VMUX_COMPOSITE1,
1048 .vmux = 1, 1048 .vmux = 1,
1049 },{ 1049 }, {
1050 .type = CX88_VMUX_SVIDEO, 1050 .type = CX88_VMUX_SVIDEO,
1051 .vmux = 2, 1051 .vmux = 2,
1052 }}, 1052 } },
1053 /* fixme: Add radio support */ 1053 /* fixme: Add radio support */
1054 .mpeg = CX88_MPEG_DVB, 1054 .mpeg = CX88_MPEG_DVB,
1055 }, 1055 },
@@ -1060,13 +1060,13 @@ static const struct cx88_board cx88_boards[] = {
1060 .tuner_addr = ADDR_UNSET, 1060 .tuner_addr = ADDR_UNSET,
1061 .radio_addr = ADDR_UNSET, 1061 .radio_addr = ADDR_UNSET,
1062 .tda9887_conf = TDA9887_PRESENT, 1062 .tda9887_conf = TDA9887_PRESENT,
1063 .input = {{ 1063 .input = { {
1064 .type = CX88_VMUX_TELEVISION, 1064 .type = CX88_VMUX_TELEVISION,
1065 .vmux = 0, 1065 .vmux = 0,
1066 },{ 1066 }, {
1067 .type = CX88_VMUX_COMPOSITE1, 1067 .type = CX88_VMUX_COMPOSITE1,
1068 .vmux = 1, 1068 .vmux = 1,
1069 }}, 1069 } },
1070 /* fixme: Add radio support */ 1070 /* fixme: Add radio support */
1071 .mpeg = CX88_MPEG_DVB, 1071 .mpeg = CX88_MPEG_DVB,
1072 }, 1072 },
@@ -1078,19 +1078,19 @@ static const struct cx88_board cx88_boards[] = {
1078 .radio_addr = ADDR_UNSET, 1078 .radio_addr = ADDR_UNSET,
1079 .tda9887_conf = TDA9887_PRESENT | TDA9887_PORT1_ACTIVE | 1079 .tda9887_conf = TDA9887_PRESENT | TDA9887_PORT1_ACTIVE |
1080 TDA9887_PORT2_ACTIVE, 1080 TDA9887_PORT2_ACTIVE,
1081 .input = {{ 1081 .input = { {
1082 .type = CX88_VMUX_TELEVISION, 1082 .type = CX88_VMUX_TELEVISION,
1083 .vmux = 0, 1083 .vmux = 0,
1084 .gpio0 = 0xf80808, 1084 .gpio0 = 0xf80808,
1085 },{ 1085 }, {
1086 .type = CX88_VMUX_COMPOSITE1, 1086 .type = CX88_VMUX_COMPOSITE1,
1087 .vmux = 1, 1087 .vmux = 1,
1088 .gpio0 = 0xf80808, 1088 .gpio0 = 0xf80808,
1089 },{ 1089 }, {
1090 .type = CX88_VMUX_SVIDEO, 1090 .type = CX88_VMUX_SVIDEO,
1091 .vmux = 2, 1091 .vmux = 2,
1092 .gpio0 = 0xf80808, 1092 .gpio0 = 0xf80808,
1093 }}, 1093 } },
1094 .radio = { 1094 .radio = {
1095 .type = CX88_RADIO, 1095 .type = CX88_RADIO,
1096 .gpio0 = 0xf80808, 1096 .gpio0 = 0xf80808,
@@ -1106,17 +1106,17 @@ static const struct cx88_board cx88_boards[] = {
1106 .radio_type = UNSET, 1106 .radio_type = UNSET,
1107 .tuner_addr = ADDR_UNSET, 1107 .tuner_addr = ADDR_UNSET,
1108 .radio_addr = ADDR_UNSET, 1108 .radio_addr = ADDR_UNSET,
1109 .input = {{ 1109 .input = { {
1110 .type = CX88_VMUX_COMPOSITE1, 1110 .type = CX88_VMUX_COMPOSITE1,
1111 .vmux = 1, 1111 .vmux = 1,
1112 .gpio0 = 0x0700, 1112 .gpio0 = 0x0700,
1113 .gpio2 = 0x0101, 1113 .gpio2 = 0x0101,
1114 },{ 1114 }, {
1115 .type = CX88_VMUX_SVIDEO, 1115 .type = CX88_VMUX_SVIDEO,
1116 .vmux = 2, 1116 .vmux = 2,
1117 .gpio0 = 0x0700, 1117 .gpio0 = 0x0700,
1118 .gpio2 = 0x0101, 1118 .gpio2 = 0x0101,
1119 }}, 1119 } },
1120 .mpeg = CX88_MPEG_DVB, 1120 .mpeg = CX88_MPEG_DVB,
1121 }, 1121 },
1122 [CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL] = { 1122 [CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL] = {
@@ -1125,15 +1125,15 @@ static const struct cx88_board cx88_boards[] = {
1125 .radio_type = UNSET, 1125 .radio_type = UNSET,
1126 .tuner_addr = ADDR_UNSET, 1126 .tuner_addr = ADDR_UNSET,
1127 .radio_addr = ADDR_UNSET, 1127 .radio_addr = ADDR_UNSET,
1128 .input = {{ 1128 .input = { {
1129 .type = CX88_VMUX_COMPOSITE1, 1129 .type = CX88_VMUX_COMPOSITE1,
1130 .vmux = 1, 1130 .vmux = 1,
1131 .gpio0 = 0x000067df, 1131 .gpio0 = 0x000067df,
1132 },{ 1132 }, {
1133 .type = CX88_VMUX_SVIDEO, 1133 .type = CX88_VMUX_SVIDEO,
1134 .vmux = 2, 1134 .vmux = 2,
1135 .gpio0 = 0x000067df, 1135 .gpio0 = 0x000067df,
1136 }}, 1136 } },
1137 .mpeg = CX88_MPEG_DVB, 1137 .mpeg = CX88_MPEG_DVB,
1138 }, 1138 },
1139 [CX88_BOARD_KWORLD_HARDWARE_MPEG_TV_XPERT] = { 1139 [CX88_BOARD_KWORLD_HARDWARE_MPEG_TV_XPERT] = {
@@ -1142,22 +1142,22 @@ static const struct cx88_board cx88_boards[] = {
1142 .radio_type = UNSET, 1142 .radio_type = UNSET,
1143 .tuner_addr = ADDR_UNSET, 1143 .tuner_addr = ADDR_UNSET,
1144 .radio_addr = ADDR_UNSET, 1144 .radio_addr = ADDR_UNSET,
1145 .input = {{ 1145 .input = { {
1146 .type = CX88_VMUX_TELEVISION, 1146 .type = CX88_VMUX_TELEVISION,
1147 .vmux = 0, 1147 .vmux = 0,
1148 .gpio0 = 0x3de2, 1148 .gpio0 = 0x3de2,
1149 .gpio2 = 0x00ff, 1149 .gpio2 = 0x00ff,
1150 },{ 1150 }, {
1151 .type = CX88_VMUX_COMPOSITE1, 1151 .type = CX88_VMUX_COMPOSITE1,
1152 .vmux = 1, 1152 .vmux = 1,
1153 .gpio0 = 0x3de6, 1153 .gpio0 = 0x3de6,
1154 .audioroute = 1, 1154 .audioroute = 1,
1155 },{ 1155 }, {
1156 .type = CX88_VMUX_SVIDEO, 1156 .type = CX88_VMUX_SVIDEO,
1157 .vmux = 2, 1157 .vmux = 2,
1158 .gpio0 = 0x3de6, 1158 .gpio0 = 0x3de6,
1159 .audioroute = 1, 1159 .audioroute = 1,
1160 }}, 1160 } },
1161 .radio = { 1161 .radio = {
1162 .type = CX88_RADIO, 1162 .type = CX88_RADIO,
1163 .gpio0 = 0x3de6, 1163 .gpio0 = 0x3de6,
@@ -1171,19 +1171,19 @@ static const struct cx88_board cx88_boards[] = {
1171 .radio_type = UNSET, 1171 .radio_type = UNSET,
1172 .tuner_addr = ADDR_UNSET, 1172 .tuner_addr = ADDR_UNSET,
1173 .radio_addr = ADDR_UNSET, 1173 .radio_addr = ADDR_UNSET,
1174 .input = {{ 1174 .input = { {
1175 .type = CX88_VMUX_TELEVISION, 1175 .type = CX88_VMUX_TELEVISION,
1176 .vmux = 0, 1176 .vmux = 0,
1177 .gpio0 = 0x0000a75f, 1177 .gpio0 = 0x0000a75f,
1178 },{ 1178 }, {
1179 .type = CX88_VMUX_COMPOSITE1, 1179 .type = CX88_VMUX_COMPOSITE1,
1180 .vmux = 1, 1180 .vmux = 1,
1181 .gpio0 = 0x0000a75b, 1181 .gpio0 = 0x0000a75b,
1182 },{ 1182 }, {
1183 .type = CX88_VMUX_SVIDEO, 1183 .type = CX88_VMUX_SVIDEO,
1184 .vmux = 2, 1184 .vmux = 2,
1185 .gpio0 = 0x0000a75b, 1185 .gpio0 = 0x0000a75b,
1186 }}, 1186 } },
1187 .mpeg = CX88_MPEG_DVB, 1187 .mpeg = CX88_MPEG_DVB,
1188 }, 1188 },
1189 [CX88_BOARD_PCHDTV_HD5500] = { 1189 [CX88_BOARD_PCHDTV_HD5500] = {
@@ -1193,19 +1193,19 @@ static const struct cx88_board cx88_boards[] = {
1193 .tuner_addr = ADDR_UNSET, 1193 .tuner_addr = ADDR_UNSET,
1194 .radio_addr = ADDR_UNSET, 1194 .radio_addr = ADDR_UNSET,
1195 .tda9887_conf = TDA9887_PRESENT, 1195 .tda9887_conf = TDA9887_PRESENT,
1196 .input = {{ 1196 .input = { {
1197 .type = CX88_VMUX_TELEVISION, 1197 .type = CX88_VMUX_TELEVISION,
1198 .vmux = 0, 1198 .vmux = 0,
1199 .gpio0 = 0x87fd, 1199 .gpio0 = 0x87fd,
1200 },{ 1200 }, {
1201 .type = CX88_VMUX_COMPOSITE1, 1201 .type = CX88_VMUX_COMPOSITE1,
1202 .vmux = 1, 1202 .vmux = 1,
1203 .gpio0 = 0x87f9, 1203 .gpio0 = 0x87f9,
1204 },{ 1204 }, {
1205 .type = CX88_VMUX_SVIDEO, 1205 .type = CX88_VMUX_SVIDEO,
1206 .vmux = 2, 1206 .vmux = 2,
1207 .gpio0 = 0x87f9, 1207 .gpio0 = 0x87f9,
1208 }}, 1208 } },
1209 .mpeg = CX88_MPEG_DVB, 1209 .mpeg = CX88_MPEG_DVB,
1210 }, 1210 },
1211 [CX88_BOARD_KWORLD_MCE200_DELUXE] = { 1211 [CX88_BOARD_KWORLD_MCE200_DELUXE] = {
@@ -1217,11 +1217,11 @@ static const struct cx88_board cx88_boards[] = {
1217 .tda9887_conf = TDA9887_PRESENT, 1217 .tda9887_conf = TDA9887_PRESENT,
1218 .tuner_addr = ADDR_UNSET, 1218 .tuner_addr = ADDR_UNSET,
1219 .radio_addr = ADDR_UNSET, 1219 .radio_addr = ADDR_UNSET,
1220 .input = {{ 1220 .input = { {
1221 .type = CX88_VMUX_TELEVISION, 1221 .type = CX88_VMUX_TELEVISION,
1222 .vmux = 0, 1222 .vmux = 0,
1223 .gpio0 = 0x0000BDE6 1223 .gpio0 = 0x0000BDE6
1224 }}, 1224 } },
1225 .mpeg = CX88_MPEG_BLACKBIRD, 1225 .mpeg = CX88_MPEG_BLACKBIRD,
1226 }, 1226 },
1227 [CX88_BOARD_PIXELVIEW_PLAYTV_P7000] = { 1227 [CX88_BOARD_PIXELVIEW_PLAYTV_P7000] = {
@@ -1233,11 +1233,11 @@ static const struct cx88_board cx88_boards[] = {
1233 .radio_addr = ADDR_UNSET, 1233 .radio_addr = ADDR_UNSET,
1234 .tda9887_conf = TDA9887_PRESENT | TDA9887_PORT1_ACTIVE | 1234 .tda9887_conf = TDA9887_PRESENT | TDA9887_PORT1_ACTIVE |
1235 TDA9887_PORT2_ACTIVE, 1235 TDA9887_PORT2_ACTIVE,
1236 .input = {{ 1236 .input = { {
1237 .type = CX88_VMUX_TELEVISION, 1237 .type = CX88_VMUX_TELEVISION,
1238 .vmux = 0, 1238 .vmux = 0,
1239 .gpio0 = 0x5da6, 1239 .gpio0 = 0x5da6,
1240 }}, 1240 } },
1241 .mpeg = CX88_MPEG_BLACKBIRD, 1241 .mpeg = CX88_MPEG_BLACKBIRD,
1242 }, 1242 },
1243 [CX88_BOARD_NPGTECH_REALTV_TOP10FM] = { 1243 [CX88_BOARD_NPGTECH_REALTV_TOP10FM] = {
@@ -1246,19 +1246,19 @@ static const struct cx88_board cx88_boards[] = {
1246 .radio_type = UNSET, 1246 .radio_type = UNSET,
1247 .tuner_addr = ADDR_UNSET, 1247 .tuner_addr = ADDR_UNSET,
1248 .radio_addr = ADDR_UNSET, 1248 .radio_addr = ADDR_UNSET,
1249 .input = {{ 1249 .input = { {
1250 .type = CX88_VMUX_TELEVISION, 1250 .type = CX88_VMUX_TELEVISION,
1251 .vmux = 0, 1251 .vmux = 0,
1252 .gpio0 = 0x0788, 1252 .gpio0 = 0x0788,
1253 },{ 1253 }, {
1254 .type = CX88_VMUX_COMPOSITE1, 1254 .type = CX88_VMUX_COMPOSITE1,
1255 .vmux = 1, 1255 .vmux = 1,
1256 .gpio0 = 0x078b, 1256 .gpio0 = 0x078b,
1257 },{ 1257 }, {
1258 .type = CX88_VMUX_SVIDEO, 1258 .type = CX88_VMUX_SVIDEO,
1259 .vmux = 2, 1259 .vmux = 2,
1260 .gpio0 = 0x078b, 1260 .gpio0 = 0x078b,
1261 }}, 1261 } },
1262 .radio = { 1262 .radio = {
1263 .type = CX88_RADIO, 1263 .type = CX88_RADIO,
1264 .gpio0 = 0x074a, 1264 .gpio0 = 0x074a,
@@ -1271,7 +1271,7 @@ static const struct cx88_board cx88_boards[] = {
1271 .tuner_addr = ADDR_UNSET, 1271 .tuner_addr = ADDR_UNSET,
1272 .radio_addr = ADDR_UNSET, 1272 .radio_addr = ADDR_UNSET,
1273 .tda9887_conf = TDA9887_PRESENT, 1273 .tda9887_conf = TDA9887_PRESENT,
1274 .input = {{ 1274 .input = { {
1275 .type = CX88_VMUX_TELEVISION, 1275 .type = CX88_VMUX_TELEVISION,
1276 .vmux = 0, 1276 .vmux = 0,
1277 .gpio0 = 0x00017304, 1277 .gpio0 = 0x00017304,
@@ -1299,7 +1299,7 @@ static const struct cx88_board cx88_boards[] = {
1299 .gpio1 = 0x0000b207, 1299 .gpio1 = 0x0000b207,
1300 .gpio2 = 0x0001d701, 1300 .gpio2 = 0x0001d701,
1301 .gpio3 = 0x02000000, 1301 .gpio3 = 0x02000000,
1302 }}, 1302 } },
1303 .radio = { 1303 .radio = {
1304 .type = CX88_RADIO, 1304 .type = CX88_RADIO,
1305 .gpio0 = 0x00015702, 1305 .gpio0 = 0x00015702,
@@ -1316,35 +1316,35 @@ static const struct cx88_board cx88_boards[] = {
1316 .tuner_addr = ADDR_UNSET, 1316 .tuner_addr = ADDR_UNSET,
1317 .radio_addr = ADDR_UNSET, 1317 .radio_addr = ADDR_UNSET,
1318 .tda9887_conf = TDA9887_PRESENT, 1318 .tda9887_conf = TDA9887_PRESENT,
1319 .input = {{ 1319 .input = { {
1320 .type = CX88_VMUX_TELEVISION, 1320 .type = CX88_VMUX_TELEVISION,
1321 .vmux = 0, 1321 .vmux = 0,
1322 .gpio0 = 0x00017300, 1322 .gpio0 = 0x00017300,
1323 .gpio1 = 0x00008207, 1323 .gpio1 = 0x00008207,
1324 .gpio2 = 0x00000000, 1324 .gpio2 = 0x00000000,
1325 .gpio3 = 0x02000000, 1325 .gpio3 = 0x02000000,
1326 },{ 1326 }, {
1327 .type = CX88_VMUX_TELEVISION, 1327 .type = CX88_VMUX_TELEVISION,
1328 .vmux = 0, 1328 .vmux = 0,
1329 .gpio0 = 0x00018300, 1329 .gpio0 = 0x00018300,
1330 .gpio1 = 0x0000f207, 1330 .gpio1 = 0x0000f207,
1331 .gpio2 = 0x00017304, 1331 .gpio2 = 0x00017304,
1332 .gpio3 = 0x02000000, 1332 .gpio3 = 0x02000000,
1333 },{ 1333 }, {
1334 .type = CX88_VMUX_COMPOSITE1, 1334 .type = CX88_VMUX_COMPOSITE1,
1335 .vmux = 1, 1335 .vmux = 1,
1336 .gpio0 = 0x00018301, 1336 .gpio0 = 0x00018301,
1337 .gpio1 = 0x0000f207, 1337 .gpio1 = 0x0000f207,
1338 .gpio2 = 0x00017304, 1338 .gpio2 = 0x00017304,
1339 .gpio3 = 0x02000000, 1339 .gpio3 = 0x02000000,
1340 },{ 1340 }, {
1341 .type = CX88_VMUX_SVIDEO, 1341 .type = CX88_VMUX_SVIDEO,
1342 .vmux = 2, 1342 .vmux = 2,
1343 .gpio0 = 0x00018301, 1343 .gpio0 = 0x00018301,
1344 .gpio1 = 0x0000f207, 1344 .gpio1 = 0x0000f207,
1345 .gpio2 = 0x00017304, 1345 .gpio2 = 0x00017304,
1346 .gpio3 = 0x02000000, 1346 .gpio3 = 0x02000000,
1347 }}, 1347 } },
1348 .radio = { 1348 .radio = {
1349 .type = CX88_RADIO, 1349 .type = CX88_RADIO,
1350 .gpio0 = 0x00015702, 1350 .gpio0 = 0x00015702,
@@ -1360,13 +1360,13 @@ static const struct cx88_board cx88_boards[] = {
1360 .radio_type = UNSET, 1360 .radio_type = UNSET,
1361 .tuner_addr = ADDR_UNSET, 1361 .tuner_addr = ADDR_UNSET,
1362 .radio_addr = ADDR_UNSET, 1362 .radio_addr = ADDR_UNSET,
1363 .input = {{ 1363 .input = { {
1364 .type = CX88_VMUX_DVB, 1364 .type = CX88_VMUX_DVB,
1365 .vmux = 0, 1365 .vmux = 0,
1366 },{ 1366 }, {
1367 .type = CX88_VMUX_COMPOSITE1, 1367 .type = CX88_VMUX_COMPOSITE1,
1368 .vmux = 1, 1368 .vmux = 1,
1369 }}, 1369 } },
1370 .mpeg = CX88_MPEG_DVB, 1370 .mpeg = CX88_MPEG_DVB,
1371 }, 1371 },
1372 [CX88_BOARD_HAUPPAUGE_HVR3000] = { 1372 [CX88_BOARD_HAUPPAUGE_HVR3000] = {
@@ -1377,25 +1377,25 @@ static const struct cx88_board cx88_boards[] = {
1377 .radio_addr = ADDR_UNSET, 1377 .radio_addr = ADDR_UNSET,
1378 .tda9887_conf = TDA9887_PRESENT, 1378 .tda9887_conf = TDA9887_PRESENT,
1379 .audio_chip = CX88_AUDIO_WM8775, 1379 .audio_chip = CX88_AUDIO_WM8775,
1380 .input = {{ 1380 .input = { {
1381 .type = CX88_VMUX_TELEVISION, 1381 .type = CX88_VMUX_TELEVISION,
1382 .vmux = 0, 1382 .vmux = 0,
1383 .gpio0 = 0x84bf, 1383 .gpio0 = 0x84bf,
1384 /* 1: TV Audio / FM Mono */ 1384 /* 1: TV Audio / FM Mono */
1385 .audioroute = 1, 1385 .audioroute = 1,
1386 },{ 1386 }, {
1387 .type = CX88_VMUX_COMPOSITE1, 1387 .type = CX88_VMUX_COMPOSITE1,
1388 .vmux = 1, 1388 .vmux = 1,
1389 .gpio0 = 0x84bf, 1389 .gpio0 = 0x84bf,
1390 /* 2: Line-In */ 1390 /* 2: Line-In */
1391 .audioroute = 2, 1391 .audioroute = 2,
1392 },{ 1392 }, {
1393 .type = CX88_VMUX_SVIDEO, 1393 .type = CX88_VMUX_SVIDEO,
1394 .vmux = 2, 1394 .vmux = 2,
1395 .gpio0 = 0x84bf, 1395 .gpio0 = 0x84bf,
1396 /* 2: Line-In */ 1396 /* 2: Line-In */
1397 .audioroute = 2, 1397 .audioroute = 2,
1398 }}, 1398 } },
1399 .radio = { 1399 .radio = {
1400 .type = CX88_RADIO, 1400 .type = CX88_RADIO,
1401 .gpio0 = 0x84bf, 1401 .gpio0 = 0x84bf,
@@ -1411,19 +1411,19 @@ static const struct cx88_board cx88_boards[] = {
1411 .radio_type = UNSET, 1411 .radio_type = UNSET,
1412 .tuner_addr = ADDR_UNSET, 1412 .tuner_addr = ADDR_UNSET,
1413 .radio_addr = ADDR_UNSET, 1413 .radio_addr = ADDR_UNSET,
1414 .input = {{ 1414 .input = { {
1415 .type = CX88_VMUX_TELEVISION, 1415 .type = CX88_VMUX_TELEVISION,
1416 .vmux = 0, 1416 .vmux = 0,
1417 .gpio0 = 0x0709, 1417 .gpio0 = 0x0709,
1418 },{ 1418 }, {
1419 .type = CX88_VMUX_COMPOSITE1, 1419 .type = CX88_VMUX_COMPOSITE1,
1420 .vmux = 1, 1420 .vmux = 1,
1421 .gpio0 = 0x070b, 1421 .gpio0 = 0x070b,
1422 },{ 1422 }, {
1423 .type = CX88_VMUX_SVIDEO, 1423 .type = CX88_VMUX_SVIDEO,
1424 .vmux = 2, 1424 .vmux = 2,
1425 .gpio0 = 0x070b, 1425 .gpio0 = 0x070b,
1426 }}, 1426 } },
1427 }, 1427 },
1428 [CX88_BOARD_TE_DTV_250_OEM_SWANN] = { 1428 [CX88_BOARD_TE_DTV_250_OEM_SWANN] = {
1429 .name = "Shenzhen Tungsten Ages Tech TE-DTV-250 / Swann OEM", 1429 .name = "Shenzhen Tungsten Ages Tech TE-DTV-250 / Swann OEM",
@@ -1431,28 +1431,28 @@ static const struct cx88_board cx88_boards[] = {
1431 .radio_type = UNSET, 1431 .radio_type = UNSET,
1432 .tuner_addr = ADDR_UNSET, 1432 .tuner_addr = ADDR_UNSET,
1433 .radio_addr = ADDR_UNSET, 1433 .radio_addr = ADDR_UNSET,
1434 .input = {{ 1434 .input = { {
1435 .type = CX88_VMUX_TELEVISION, 1435 .type = CX88_VMUX_TELEVISION,
1436 .vmux = 0, 1436 .vmux = 0,
1437 .gpio0 = 0x003fffff, 1437 .gpio0 = 0x003fffff,
1438 .gpio1 = 0x00e00000, 1438 .gpio1 = 0x00e00000,
1439 .gpio2 = 0x003fffff, 1439 .gpio2 = 0x003fffff,
1440 .gpio3 = 0x02000000, 1440 .gpio3 = 0x02000000,
1441 },{ 1441 }, {
1442 .type = CX88_VMUX_COMPOSITE1, 1442 .type = CX88_VMUX_COMPOSITE1,
1443 .vmux = 1, 1443 .vmux = 1,
1444 .gpio0 = 0x003fffff, 1444 .gpio0 = 0x003fffff,
1445 .gpio1 = 0x00e00000, 1445 .gpio1 = 0x00e00000,
1446 .gpio2 = 0x003fffff, 1446 .gpio2 = 0x003fffff,
1447 .gpio3 = 0x02000000, 1447 .gpio3 = 0x02000000,
1448 },{ 1448 }, {
1449 .type = CX88_VMUX_SVIDEO, 1449 .type = CX88_VMUX_SVIDEO,
1450 .vmux = 2, 1450 .vmux = 2,
1451 .gpio0 = 0x003fffff, 1451 .gpio0 = 0x003fffff,
1452 .gpio1 = 0x00e00000, 1452 .gpio1 = 0x00e00000,
1453 .gpio2 = 0x003fffff, 1453 .gpio2 = 0x003fffff,
1454 .gpio3 = 0x02000000, 1454 .gpio3 = 0x02000000,
1455 }}, 1455 } },
1456 }, 1456 },
1457 [CX88_BOARD_HAUPPAUGE_HVR1300] = { 1457 [CX88_BOARD_HAUPPAUGE_HVR1300] = {
1458 .name = "Hauppauge WinTV-HVR1300 DVB-T/Hybrid MPEG Encoder", 1458 .name = "Hauppauge WinTV-HVR1300 DVB-T/Hybrid MPEG Encoder",
@@ -1465,25 +1465,25 @@ static const struct cx88_board cx88_boards[] = {
1465 /* 1465 /*
1466 * gpio0 as reported by Mike Crash <mike AT mikecrash.com> 1466 * gpio0 as reported by Mike Crash <mike AT mikecrash.com>
1467 */ 1467 */
1468 .input = {{ 1468 .input = { {
1469 .type = CX88_VMUX_TELEVISION, 1469 .type = CX88_VMUX_TELEVISION,
1470 .vmux = 0, 1470 .vmux = 0,
1471 .gpio0 = 0xef88, 1471 .gpio0 = 0xef88,
1472 /* 1: TV Audio / FM Mono */ 1472 /* 1: TV Audio / FM Mono */
1473 .audioroute = 1, 1473 .audioroute = 1,
1474 },{ 1474 }, {
1475 .type = CX88_VMUX_COMPOSITE1, 1475 .type = CX88_VMUX_COMPOSITE1,
1476 .vmux = 1, 1476 .vmux = 1,
1477 .gpio0 = 0xef88, 1477 .gpio0 = 0xef88,
1478 /* 2: Line-In */ 1478 /* 2: Line-In */
1479 .audioroute = 2, 1479 .audioroute = 2,
1480 },{ 1480 }, {
1481 .type = CX88_VMUX_SVIDEO, 1481 .type = CX88_VMUX_SVIDEO,
1482 .vmux = 2, 1482 .vmux = 2,
1483 .gpio0 = 0xef88, 1483 .gpio0 = 0xef88,
1484 /* 2: Line-In */ 1484 /* 2: Line-In */
1485 .audioroute = 2, 1485 .audioroute = 2,
1486 }}, 1486 } },
1487 .mpeg = CX88_MPEG_DVB | CX88_MPEG_BLACKBIRD, 1487 .mpeg = CX88_MPEG_DVB | CX88_MPEG_BLACKBIRD,
1488 .radio = { 1488 .radio = {
1489 .type = CX88_RADIO, 1489 .type = CX88_RADIO,
@@ -1510,19 +1510,19 @@ static const struct cx88_board cx88_boards[] = {
1510 .radio_type = UNSET, 1510 .radio_type = UNSET,
1511 .tuner_addr = ADDR_UNSET, 1511 .tuner_addr = ADDR_UNSET,
1512 .radio_addr = ADDR_UNSET, 1512 .radio_addr = ADDR_UNSET,
1513 .input = {{ 1513 .input = { {
1514 .type = CX88_VMUX_DEBUG, 1514 .type = CX88_VMUX_DEBUG,
1515 .vmux = 3, 1515 .vmux = 3,
1516 .gpio0 = 0x04ff, 1516 .gpio0 = 0x04ff,
1517 },{ 1517 }, {
1518 .type = CX88_VMUX_COMPOSITE1, 1518 .type = CX88_VMUX_COMPOSITE1,
1519 .vmux = 1, 1519 .vmux = 1,
1520 .gpio0 = 0x07fa, 1520 .gpio0 = 0x07fa,
1521 },{ 1521 }, {
1522 .type = CX88_VMUX_SVIDEO, 1522 .type = CX88_VMUX_SVIDEO,
1523 .vmux = 2, 1523 .vmux = 2,
1524 .gpio0 = 0x07fa, 1524 .gpio0 = 0x07fa,
1525 }}, 1525 } },
1526 }, 1526 },
1527 [CX88_BOARD_PINNACLE_PCTV_HD_800i] = { 1527 [CX88_BOARD_PINNACLE_PCTV_HD_800i] = {
1528 .name = "Pinnacle PCTV HD 800i", 1528 .name = "Pinnacle PCTV HD 800i",
@@ -1530,24 +1530,24 @@ static const struct cx88_board cx88_boards[] = {
1530 .radio_type = UNSET, 1530 .radio_type = UNSET,
1531 .tuner_addr = ADDR_UNSET, 1531 .tuner_addr = ADDR_UNSET,
1532 .radio_addr = ADDR_UNSET, 1532 .radio_addr = ADDR_UNSET,
1533 .input = {{ 1533 .input = { {
1534 .type = CX88_VMUX_TELEVISION, 1534 .type = CX88_VMUX_TELEVISION,
1535 .vmux = 0, 1535 .vmux = 0,
1536 .gpio0 = 0x04fb, 1536 .gpio0 = 0x04fb,
1537 .gpio1 = 0x10ff, 1537 .gpio1 = 0x10ff,
1538 },{ 1538 }, {
1539 .type = CX88_VMUX_COMPOSITE1, 1539 .type = CX88_VMUX_COMPOSITE1,
1540 .vmux = 1, 1540 .vmux = 1,
1541 .gpio0 = 0x04fb, 1541 .gpio0 = 0x04fb,
1542 .gpio1 = 0x10ef, 1542 .gpio1 = 0x10ef,
1543 .audioroute = 1, 1543 .audioroute = 1,
1544 },{ 1544 }, {
1545 .type = CX88_VMUX_SVIDEO, 1545 .type = CX88_VMUX_SVIDEO,
1546 .vmux = 2, 1546 .vmux = 2,
1547 .gpio0 = 0x04fb, 1547 .gpio0 = 0x04fb,
1548 .gpio1 = 0x10ef, 1548 .gpio1 = 0x10ef,
1549 .audioroute = 1, 1549 .audioroute = 1,
1550 }}, 1550 } },
1551 .mpeg = CX88_MPEG_DVB, 1551 .mpeg = CX88_MPEG_DVB,
1552 }, 1552 },
1553 [CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO] = { 1553 [CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO] = {
@@ -1557,7 +1557,7 @@ static const struct cx88_board cx88_boards[] = {
1557 .radio_type = UNSET, 1557 .radio_type = UNSET,
1558 .tuner_addr = ADDR_UNSET, 1558 .tuner_addr = ADDR_UNSET,
1559 .radio_addr = ADDR_UNSET, 1559 .radio_addr = ADDR_UNSET,
1560 .input = {{ 1560 .input = { {
1561 .type = CX88_VMUX_TELEVISION, 1561 .type = CX88_VMUX_TELEVISION,
1562 .vmux = 0, 1562 .vmux = 0,
1563 .gpio0 = 0x000027df, /* Unconfirmed */ 1563 .gpio0 = 0x000027df, /* Unconfirmed */
@@ -1815,19 +1815,19 @@ static const struct cx88_board cx88_boards[] = {
1815 .radio_type = UNSET, 1815 .radio_type = UNSET,
1816 .tuner_addr = ADDR_UNSET, 1816 .tuner_addr = ADDR_UNSET,
1817 .radio_addr = ADDR_UNSET, 1817 .radio_addr = ADDR_UNSET,
1818 .input = {{ 1818 .input = { {
1819 .type = CX88_VMUX_TELEVISION, 1819 .type = CX88_VMUX_TELEVISION,
1820 .vmux = 0, 1820 .vmux = 0,
1821 .gpio0 = 0x10df, 1821 .gpio0 = 0x10df,
1822 },{ 1822 }, {
1823 .type = CX88_VMUX_COMPOSITE1, 1823 .type = CX88_VMUX_COMPOSITE1,
1824 .vmux = 1, 1824 .vmux = 1,
1825 .gpio0 = 0x16d9, 1825 .gpio0 = 0x16d9,
1826 },{ 1826 }, {
1827 .type = CX88_VMUX_SVIDEO, 1827 .type = CX88_VMUX_SVIDEO,
1828 .vmux = 2, 1828 .vmux = 2,
1829 .gpio0 = 0x16d9, 1829 .gpio0 = 0x16d9,
1830 }}, 1830 } },
1831 .mpeg = CX88_MPEG_DVB, 1831 .mpeg = CX88_MPEG_DVB,
1832 }, 1832 },
1833 [CX88_BOARD_PROLINK_PV_8000GT] = { 1833 [CX88_BOARD_PROLINK_PV_8000GT] = {
@@ -1967,7 +1967,7 @@ static const struct cx88_board cx88_boards[] = {
1967 * 3: Line-In Expansion 1967 * 3: Line-In Expansion
1968 * 4: FM Stereo 1968 * 4: FM Stereo
1969 */ 1969 */
1970 .input = {{ 1970 .input = { {
1971 .type = CX88_VMUX_TELEVISION, 1971 .type = CX88_VMUX_TELEVISION,
1972 .vmux = 0, 1972 .vmux = 0,
1973 .gpio0 = 0xc4bf, 1973 .gpio0 = 0xc4bf,
@@ -2001,7 +2001,7 @@ static const struct cx88_board cx88_boards[] = {
2001 .radio_type = UNSET, 2001 .radio_type = UNSET,
2002 .tuner_addr = ADDR_UNSET, 2002 .tuner_addr = ADDR_UNSET,
2003 .radio_addr = ADDR_UNSET, 2003 .radio_addr = ADDR_UNSET,
2004 .input = {{ 2004 .input = { {
2005 .type = CX88_VMUX_DVB, 2005 .type = CX88_VMUX_DVB,
2006 .vmux = 0, 2006 .vmux = 0,
2007 } }, 2007 } },
@@ -2013,7 +2013,7 @@ static const struct cx88_board cx88_boards[] = {
2013 .radio_type = UNSET, 2013 .radio_type = UNSET,
2014 .tuner_addr = ADDR_UNSET, 2014 .tuner_addr = ADDR_UNSET,
2015 .radio_addr = ADDR_UNSET, 2015 .radio_addr = ADDR_UNSET,
2016 .input = {{ 2016 .input = { {
2017 .type = CX88_VMUX_DVB, 2017 .type = CX88_VMUX_DVB,
2018 .vmux = 0, 2018 .vmux = 0,
2019 } }, 2019 } },
@@ -2025,7 +2025,7 @@ static const struct cx88_board cx88_boards[] = {
2025 .radio_type = UNSET, 2025 .radio_type = UNSET,
2026 .tuner_addr = ADDR_UNSET, 2026 .tuner_addr = ADDR_UNSET,
2027 .radio_addr = ADDR_UNSET, 2027 .radio_addr = ADDR_UNSET,
2028 .input = {{ 2028 .input = { {
2029 .type = CX88_VMUX_DVB, 2029 .type = CX88_VMUX_DVB,
2030 .vmux = 0, 2030 .vmux = 0,
2031 } }, 2031 } },
@@ -2037,7 +2037,7 @@ static const struct cx88_board cx88_boards[] = {
2037 .radio_type = UNSET, 2037 .radio_type = UNSET,
2038 .tuner_addr = ADDR_UNSET, 2038 .tuner_addr = ADDR_UNSET,
2039 .radio_addr = ADDR_UNSET, 2039 .radio_addr = ADDR_UNSET,
2040 .input = {{ 2040 .input = { {
2041 .type = CX88_VMUX_DVB, 2041 .type = CX88_VMUX_DVB,
2042 .vmux = 0, 2042 .vmux = 0,
2043 } }, 2043 } },
@@ -2049,7 +2049,7 @@ static const struct cx88_board cx88_boards[] = {
2049 .radio_type = UNSET, 2049 .radio_type = UNSET,
2050 .tuner_addr = ADDR_UNSET, 2050 .tuner_addr = ADDR_UNSET,
2051 .radio_addr = ADDR_UNSET, 2051 .radio_addr = ADDR_UNSET,
2052 .input = {{ 2052 .input = { {
2053 .type = CX88_VMUX_DVB, 2053 .type = CX88_VMUX_DVB,
2054 .vmux = 0, 2054 .vmux = 0,
2055 } }, 2055 } },
@@ -2061,7 +2061,7 @@ static const struct cx88_board cx88_boards[] = {
2061 .radio_type = UNSET, 2061 .radio_type = UNSET,
2062 .tuner_addr = ADDR_UNSET, 2062 .tuner_addr = ADDR_UNSET,
2063 .radio_addr = ADDR_UNSET, 2063 .radio_addr = ADDR_UNSET,
2064 .input = {{ 2064 .input = { {
2065 .type = CX88_VMUX_DVB, 2065 .type = CX88_VMUX_DVB,
2066 .vmux = 0, 2066 .vmux = 0,
2067 } }, 2067 } },
@@ -2073,7 +2073,7 @@ static const struct cx88_board cx88_boards[] = {
2073 .radio_type = UNSET, 2073 .radio_type = UNSET,
2074 .tuner_addr = ADDR_UNSET, 2074 .tuner_addr = ADDR_UNSET,
2075 .radio_addr = ADDR_UNSET, 2075 .radio_addr = ADDR_UNSET,
2076 .input = {{ 2076 .input = { {
2077 .type = CX88_VMUX_DVB, 2077 .type = CX88_VMUX_DVB,
2078 .vmux = 0, 2078 .vmux = 0,
2079 .gpio0 = 0x8080, 2079 .gpio0 = 0x8080,
@@ -2086,7 +2086,7 @@ static const struct cx88_board cx88_boards[] = {
2086 .radio_type = UNSET, 2086 .radio_type = UNSET,
2087 .tuner_addr = ADDR_UNSET, 2087 .tuner_addr = ADDR_UNSET,
2088 .radio_addr = ADDR_UNSET, 2088 .radio_addr = ADDR_UNSET,
2089 .input = {{ 2089 .input = { {
2090 .type = CX88_VMUX_DVB, 2090 .type = CX88_VMUX_DVB,
2091 .vmux = 0, 2091 .vmux = 0,
2092 } }, 2092 } },
@@ -2098,7 +2098,7 @@ static const struct cx88_board cx88_boards[] = {
2098 .radio_type = UNSET, 2098 .radio_type = UNSET,
2099 .tuner_addr = ADDR_UNSET, 2099 .tuner_addr = ADDR_UNSET,
2100 .radio_addr = ADDR_UNSET, 2100 .radio_addr = ADDR_UNSET,
2101 .input = {{ 2101 .input = { {
2102 .type = CX88_VMUX_DVB, 2102 .type = CX88_VMUX_DVB,
2103 .vmux = 0, 2103 .vmux = 0,
2104 } }, 2104 } },
@@ -2110,7 +2110,7 @@ static const struct cx88_board cx88_boards[] = {
2110 .radio_type = UNSET, 2110 .radio_type = UNSET,
2111 .tuner_addr = ADDR_UNSET, 2111 .tuner_addr = ADDR_UNSET,
2112 .radio_addr = ADDR_UNSET, 2112 .radio_addr = ADDR_UNSET,
2113 .input = {{ 2113 .input = { {
2114 .type = CX88_VMUX_DVB, 2114 .type = CX88_VMUX_DVB,
2115 .vmux = 0, 2115 .vmux = 0,
2116 } }, 2116 } },
@@ -2170,7 +2170,7 @@ static const struct cx88_board cx88_boards[] = {
2170 * 13: audio source (0=tuner audio,1=line in) 2170 * 13: audio source (0=tuner audio,1=line in)
2171 * 14: FM (0=on,1=off ???) 2171 * 14: FM (0=on,1=off ???)
2172 */ 2172 */
2173 .input = {{ 2173 .input = { {
2174 .type = CX88_VMUX_TELEVISION, 2174 .type = CX88_VMUX_TELEVISION,
2175 .vmux = 0, 2175 .vmux = 0,
2176 .gpio0 = 0x0400, /* pin 2 = 0 */ 2176 .gpio0 = 0x0400, /* pin 2 = 0 */
@@ -2211,7 +2211,7 @@ static const struct cx88_board cx88_boards[] = {
2211 * 13: audio source (0=tuner audio,1=line in) 2211 * 13: audio source (0=tuner audio,1=line in)
2212 * 14: FM (0=on,1=off ???) 2212 * 14: FM (0=on,1=off ???)
2213 */ 2213 */
2214 .input = {{ 2214 .input = { {
2215 .type = CX88_VMUX_TELEVISION, 2215 .type = CX88_VMUX_TELEVISION,
2216 .vmux = 0, 2216 .vmux = 0,
2217 .gpio0 = 0x0400, /* pin 2 = 0 */ 2217 .gpio0 = 0x0400, /* pin 2 = 0 */
@@ -2229,7 +2229,7 @@ static const struct cx88_board cx88_boards[] = {
2229 .gpio0 = 0x0400, /* pin 2 = 0 */ 2229 .gpio0 = 0x0400, /* pin 2 = 0 */
2230 .gpio1 = 0x6060, /* pin 13 = 1, pin 14 = 1 */ 2230 .gpio1 = 0x6060, /* pin 13 = 1, pin 14 = 1 */
2231 .gpio2 = 0x0000, 2231 .gpio2 = 0x0000,
2232 }}, 2232 } },
2233 .radio = { 2233 .radio = {
2234 .type = CX88_RADIO, 2234 .type = CX88_RADIO,
2235 .gpio0 = 0x0400, /* pin 2 = 0 */ 2235 .gpio0 = 0x0400, /* pin 2 = 0 */
@@ -2252,7 +2252,7 @@ static const struct cx88_board cx88_boards[] = {
2252 * 14: 0: FM radio 2252 * 14: 0: FM radio
2253 * 16: 0: RF input is cable 2253 * 16: 0: RF input is cable
2254 */ 2254 */
2255 .input = {{ 2255 .input = { {
2256 .type = CX88_VMUX_TELEVISION, 2256 .type = CX88_VMUX_TELEVISION,
2257 .vmux = 0, 2257 .vmux = 0,
2258 .gpio0 = 0x0403, 2258 .gpio0 = 0x0403,
@@ -2280,7 +2280,7 @@ static const struct cx88_board cx88_boards[] = {
2280 .gpio1 = 0xF0F7, 2280 .gpio1 = 0xF0F7,
2281 .gpio2 = 0x0101, 2281 .gpio2 = 0x0101,
2282 .gpio3 = 0x0000, 2282 .gpio3 = 0x0000,
2283 }}, 2283 } },
2284 .radio = { 2284 .radio = {
2285 .type = CX88_RADIO, 2285 .type = CX88_RADIO,
2286 .gpio0 = 0x0403, 2286 .gpio0 = 0x0403,
@@ -2308,7 +2308,7 @@ static const struct cx88_board cx88_boards[] = {
2308 .radio_type = UNSET, 2308 .radio_type = UNSET,
2309 .tuner_addr = ADDR_UNSET, 2309 .tuner_addr = ADDR_UNSET,
2310 .radio_addr = ADDR_UNSET, 2310 .radio_addr = ADDR_UNSET,
2311 .input = {{ 2311 .input = { {
2312 .type = CX88_VMUX_DVB, 2312 .type = CX88_VMUX_DVB,
2313 .vmux = 0, 2313 .vmux = 0,
2314 } }, 2314 } },
@@ -2324,19 +2324,19 @@ static const struct cx88_subid cx88_subids[] = {
2324 .subvendor = 0x0070, 2324 .subvendor = 0x0070,
2325 .subdevice = 0x3400, 2325 .subdevice = 0x3400,
2326 .card = CX88_BOARD_HAUPPAUGE, 2326 .card = CX88_BOARD_HAUPPAUGE,
2327 },{ 2327 }, {
2328 .subvendor = 0x0070, 2328 .subvendor = 0x0070,
2329 .subdevice = 0x3401, 2329 .subdevice = 0x3401,
2330 .card = CX88_BOARD_HAUPPAUGE, 2330 .card = CX88_BOARD_HAUPPAUGE,
2331 },{ 2331 }, {
2332 .subvendor = 0x14c7, 2332 .subvendor = 0x14c7,
2333 .subdevice = 0x0106, 2333 .subdevice = 0x0106,
2334 .card = CX88_BOARD_GDI, 2334 .card = CX88_BOARD_GDI,
2335 },{ 2335 }, {
2336 .subvendor = 0x14c7, 2336 .subvendor = 0x14c7,
2337 .subdevice = 0x0107, /* with mpeg encoder */ 2337 .subdevice = 0x0107, /* with mpeg encoder */
2338 .card = CX88_BOARD_GDI, 2338 .card = CX88_BOARD_GDI,
2339 },{ 2339 }, {
2340 .subvendor = PCI_VENDOR_ID_ATI, 2340 .subvendor = PCI_VENDOR_ID_ATI,
2341 .subdevice = 0x00f8, 2341 .subdevice = 0x00f8,
2342 .card = CX88_BOARD_ATI_WONDER_PRO, 2342 .card = CX88_BOARD_ATI_WONDER_PRO,
@@ -2348,176 +2348,176 @@ static const struct cx88_subid cx88_subids[] = {
2348 .subvendor = 0x107d, 2348 .subvendor = 0x107d,
2349 .subdevice = 0x6611, 2349 .subdevice = 0x6611,
2350 .card = CX88_BOARD_WINFAST2000XP_EXPERT, 2350 .card = CX88_BOARD_WINFAST2000XP_EXPERT,
2351 },{ 2351 }, {
2352 .subvendor = 0x107d, 2352 .subvendor = 0x107d,
2353 .subdevice = 0x6613, /* NTSC */ 2353 .subdevice = 0x6613, /* NTSC */
2354 .card = CX88_BOARD_WINFAST2000XP_EXPERT, 2354 .card = CX88_BOARD_WINFAST2000XP_EXPERT,
2355 },{ 2355 }, {
2356 .subvendor = 0x107d, 2356 .subvendor = 0x107d,
2357 .subdevice = 0x6620, 2357 .subdevice = 0x6620,
2358 .card = CX88_BOARD_WINFAST_DV2000, 2358 .card = CX88_BOARD_WINFAST_DV2000,
2359 },{ 2359 }, {
2360 .subvendor = 0x107d, 2360 .subvendor = 0x107d,
2361 .subdevice = 0x663b, 2361 .subdevice = 0x663b,
2362 .card = CX88_BOARD_LEADTEK_PVR2000, 2362 .card = CX88_BOARD_LEADTEK_PVR2000,
2363 },{ 2363 }, {
2364 .subvendor = 0x107d, 2364 .subvendor = 0x107d,
2365 .subdevice = 0x663c, 2365 .subdevice = 0x663c,
2366 .card = CX88_BOARD_LEADTEK_PVR2000, 2366 .card = CX88_BOARD_LEADTEK_PVR2000,
2367 },{ 2367 }, {
2368 .subvendor = 0x1461, 2368 .subvendor = 0x1461,
2369 .subdevice = 0x000b, 2369 .subdevice = 0x000b,
2370 .card = CX88_BOARD_AVERTV_STUDIO_303, 2370 .card = CX88_BOARD_AVERTV_STUDIO_303,
2371 },{ 2371 }, {
2372 .subvendor = 0x1462, 2372 .subvendor = 0x1462,
2373 .subdevice = 0x8606, 2373 .subdevice = 0x8606,
2374 .card = CX88_BOARD_MSI_TVANYWHERE_MASTER, 2374 .card = CX88_BOARD_MSI_TVANYWHERE_MASTER,
2375 },{ 2375 }, {
2376 .subvendor = 0x10fc, 2376 .subvendor = 0x10fc,
2377 .subdevice = 0xd003, 2377 .subdevice = 0xd003,
2378 .card = CX88_BOARD_IODATA_GVVCP3PCI, 2378 .card = CX88_BOARD_IODATA_GVVCP3PCI,
2379 },{ 2379 }, {
2380 .subvendor = 0x1043, 2380 .subvendor = 0x1043,
2381 .subdevice = 0x4823, /* with mpeg encoder */ 2381 .subdevice = 0x4823, /* with mpeg encoder */
2382 .card = CX88_BOARD_ASUS_PVR_416, 2382 .card = CX88_BOARD_ASUS_PVR_416,
2383 },{ 2383 }, {
2384 .subvendor = 0x17de, 2384 .subvendor = 0x17de,
2385 .subdevice = 0x08a6, 2385 .subdevice = 0x08a6,
2386 .card = CX88_BOARD_KWORLD_DVB_T, 2386 .card = CX88_BOARD_KWORLD_DVB_T,
2387 },{ 2387 }, {
2388 .subvendor = 0x18ac, 2388 .subvendor = 0x18ac,
2389 .subdevice = 0xd810, 2389 .subdevice = 0xd810,
2390 .card = CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q, 2390 .card = CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q,
2391 },{ 2391 }, {
2392 .subvendor = 0x18ac, 2392 .subvendor = 0x18ac,
2393 .subdevice = 0xd820, 2393 .subdevice = 0xd820,
2394 .card = CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T, 2394 .card = CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T,
2395 },{ 2395 }, {
2396 .subvendor = 0x18ac, 2396 .subvendor = 0x18ac,
2397 .subdevice = 0xdb00, 2397 .subdevice = 0xdb00,
2398 .card = CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1, 2398 .card = CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1,
2399 },{ 2399 }, {
2400 .subvendor = 0x0070, 2400 .subvendor = 0x0070,
2401 .subdevice = 0x9002, 2401 .subdevice = 0x9002,
2402 .card = CX88_BOARD_HAUPPAUGE_DVB_T1, 2402 .card = CX88_BOARD_HAUPPAUGE_DVB_T1,
2403 },{ 2403 }, {
2404 .subvendor = 0x14f1, 2404 .subvendor = 0x14f1,
2405 .subdevice = 0x0187, 2405 .subdevice = 0x0187,
2406 .card = CX88_BOARD_CONEXANT_DVB_T1, 2406 .card = CX88_BOARD_CONEXANT_DVB_T1,
2407 },{ 2407 }, {
2408 .subvendor = 0x1540, 2408 .subvendor = 0x1540,
2409 .subdevice = 0x2580, 2409 .subdevice = 0x2580,
2410 .card = CX88_BOARD_PROVIDEO_PV259, 2410 .card = CX88_BOARD_PROVIDEO_PV259,
2411 },{ 2411 }, {
2412 .subvendor = 0x18ac, 2412 .subvendor = 0x18ac,
2413 .subdevice = 0xdb10, 2413 .subdevice = 0xdb10,
2414 .card = CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS, 2414 .card = CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS,
2415 },{ 2415 }, {
2416 .subvendor = 0x1554, 2416 .subvendor = 0x1554,
2417 .subdevice = 0x4811, 2417 .subdevice = 0x4811,
2418 .card = CX88_BOARD_PIXELVIEW, 2418 .card = CX88_BOARD_PIXELVIEW,
2419 },{ 2419 }, {
2420 .subvendor = 0x7063, 2420 .subvendor = 0x7063,
2421 .subdevice = 0x3000, /* HD-3000 card */ 2421 .subdevice = 0x3000, /* HD-3000 card */
2422 .card = CX88_BOARD_PCHDTV_HD3000, 2422 .card = CX88_BOARD_PCHDTV_HD3000,
2423 },{ 2423 }, {
2424 .subvendor = 0x17de, 2424 .subvendor = 0x17de,
2425 .subdevice = 0xa8a6, 2425 .subdevice = 0xa8a6,
2426 .card = CX88_BOARD_DNTV_LIVE_DVB_T, 2426 .card = CX88_BOARD_DNTV_LIVE_DVB_T,
2427 },{ 2427 }, {
2428 .subvendor = 0x0070, 2428 .subvendor = 0x0070,
2429 .subdevice = 0x2801, 2429 .subdevice = 0x2801,
2430 .card = CX88_BOARD_HAUPPAUGE_ROSLYN, 2430 .card = CX88_BOARD_HAUPPAUGE_ROSLYN,
2431 },{ 2431 }, {
2432 .subvendor = 0x14f1, 2432 .subvendor = 0x14f1,
2433 .subdevice = 0x0342, 2433 .subdevice = 0x0342,
2434 .card = CX88_BOARD_DIGITALLOGIC_MEC, 2434 .card = CX88_BOARD_DIGITALLOGIC_MEC,
2435 },{ 2435 }, {
2436 .subvendor = 0x10fc, 2436 .subvendor = 0x10fc,
2437 .subdevice = 0xd035, 2437 .subdevice = 0xd035,
2438 .card = CX88_BOARD_IODATA_GVBCTV7E, 2438 .card = CX88_BOARD_IODATA_GVBCTV7E,
2439 },{ 2439 }, {
2440 .subvendor = 0x1421, 2440 .subvendor = 0x1421,
2441 .subdevice = 0x0334, 2441 .subdevice = 0x0334,
2442 .card = CX88_BOARD_ADSTECH_DVB_T_PCI, 2442 .card = CX88_BOARD_ADSTECH_DVB_T_PCI,
2443 },{ 2443 }, {
2444 .subvendor = 0x153b, 2444 .subvendor = 0x153b,
2445 .subdevice = 0x1166, 2445 .subdevice = 0x1166,
2446 .card = CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1, 2446 .card = CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1,
2447 },{ 2447 }, {
2448 .subvendor = 0x18ac, 2448 .subvendor = 0x18ac,
2449 .subdevice = 0xd500, 2449 .subdevice = 0xd500,
2450 .card = CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD, 2450 .card = CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD,
2451 },{ 2451 }, {
2452 .subvendor = 0x1461, 2452 .subvendor = 0x1461,
2453 .subdevice = 0x8011, 2453 .subdevice = 0x8011,
2454 .card = CX88_BOARD_AVERMEDIA_ULTRATV_MC_550, 2454 .card = CX88_BOARD_AVERMEDIA_ULTRATV_MC_550,
2455 },{ 2455 }, {
2456 .subvendor = PCI_VENDOR_ID_ATI, 2456 .subvendor = PCI_VENDOR_ID_ATI,
2457 .subdevice = 0xa101, 2457 .subdevice = 0xa101,
2458 .card = CX88_BOARD_ATI_HDTVWONDER, 2458 .card = CX88_BOARD_ATI_HDTVWONDER,
2459 },{ 2459 }, {
2460 .subvendor = 0x107d, 2460 .subvendor = 0x107d,
2461 .subdevice = 0x665f, 2461 .subdevice = 0x665f,
2462 .card = CX88_BOARD_WINFAST_DTV1000, 2462 .card = CX88_BOARD_WINFAST_DTV1000,
2463 },{ 2463 }, {
2464 .subvendor = 0x1461, 2464 .subvendor = 0x1461,
2465 .subdevice = 0x000a, 2465 .subdevice = 0x000a,
2466 .card = CX88_BOARD_AVERTV_303, 2466 .card = CX88_BOARD_AVERTV_303,
2467 },{ 2467 }, {
2468 .subvendor = 0x0070, 2468 .subvendor = 0x0070,
2469 .subdevice = 0x9200, 2469 .subdevice = 0x9200,
2470 .card = CX88_BOARD_HAUPPAUGE_NOVASE2_S1, 2470 .card = CX88_BOARD_HAUPPAUGE_NOVASE2_S1,
2471 },{ 2471 }, {
2472 .subvendor = 0x0070, 2472 .subvendor = 0x0070,
2473 .subdevice = 0x9201, 2473 .subdevice = 0x9201,
2474 .card = CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1, 2474 .card = CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1,
2475 },{ 2475 }, {
2476 .subvendor = 0x0070, 2476 .subvendor = 0x0070,
2477 .subdevice = 0x9202, 2477 .subdevice = 0x9202,
2478 .card = CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1, 2478 .card = CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1,
2479 },{ 2479 }, {
2480 .subvendor = 0x17de, 2480 .subvendor = 0x17de,
2481 .subdevice = 0x08b2, 2481 .subdevice = 0x08b2,
2482 .card = CX88_BOARD_KWORLD_DVBS_100, 2482 .card = CX88_BOARD_KWORLD_DVBS_100,
2483 },{ 2483 }, {
2484 .subvendor = 0x0070, 2484 .subvendor = 0x0070,
2485 .subdevice = 0x9400, 2485 .subdevice = 0x9400,
2486 .card = CX88_BOARD_HAUPPAUGE_HVR1100, 2486 .card = CX88_BOARD_HAUPPAUGE_HVR1100,
2487 },{ 2487 }, {
2488 .subvendor = 0x0070, 2488 .subvendor = 0x0070,
2489 .subdevice = 0x9402, 2489 .subdevice = 0x9402,
2490 .card = CX88_BOARD_HAUPPAUGE_HVR1100, 2490 .card = CX88_BOARD_HAUPPAUGE_HVR1100,
2491 },{ 2491 }, {
2492 .subvendor = 0x0070, 2492 .subvendor = 0x0070,
2493 .subdevice = 0x9800, 2493 .subdevice = 0x9800,
2494 .card = CX88_BOARD_HAUPPAUGE_HVR1100LP, 2494 .card = CX88_BOARD_HAUPPAUGE_HVR1100LP,
2495 },{ 2495 }, {
2496 .subvendor = 0x0070, 2496 .subvendor = 0x0070,
2497 .subdevice = 0x9802, 2497 .subdevice = 0x9802,
2498 .card = CX88_BOARD_HAUPPAUGE_HVR1100LP, 2498 .card = CX88_BOARD_HAUPPAUGE_HVR1100LP,
2499 },{ 2499 }, {
2500 .subvendor = 0x0070, 2500 .subvendor = 0x0070,
2501 .subdevice = 0x9001, 2501 .subdevice = 0x9001,
2502 .card = CX88_BOARD_HAUPPAUGE_DVB_T1, 2502 .card = CX88_BOARD_HAUPPAUGE_DVB_T1,
2503 },{ 2503 }, {
2504 .subvendor = 0x1822, 2504 .subvendor = 0x1822,
2505 .subdevice = 0x0025, 2505 .subdevice = 0x0025,
2506 .card = CX88_BOARD_DNTV_LIVE_DVB_T_PRO, 2506 .card = CX88_BOARD_DNTV_LIVE_DVB_T_PRO,
2507 },{ 2507 }, {
2508 .subvendor = 0x17de, 2508 .subvendor = 0x17de,
2509 .subdevice = 0x08a1, 2509 .subdevice = 0x08a1,
2510 .card = CX88_BOARD_KWORLD_DVB_T_CX22702, 2510 .card = CX88_BOARD_KWORLD_DVB_T_CX22702,
2511 },{ 2511 }, {
2512 .subvendor = 0x18ac, 2512 .subvendor = 0x18ac,
2513 .subdevice = 0xdb50, 2513 .subdevice = 0xdb50,
2514 .card = CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL, 2514 .card = CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL,
2515 },{ 2515 }, {
2516 .subvendor = 0x18ac, 2516 .subvendor = 0x18ac,
2517 .subdevice = 0xdb54, 2517 .subdevice = 0xdb54,
2518 .card = CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL, 2518 .card = CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL,
2519 /* Re-branded DViCO: DigitalNow DVB-T Dual */ 2519 /* Re-branded DViCO: DigitalNow DVB-T Dual */
2520 },{ 2520 }, {
2521 .subvendor = 0x18ac, 2521 .subvendor = 0x18ac,
2522 .subdevice = 0xdb11, 2522 .subdevice = 0xdb11,
2523 .card = CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS, 2523 .card = CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS,
@@ -2530,55 +2530,55 @@ static const struct cx88_subid cx88_subids[] = {
2530 .subvendor = 0x17de, 2530 .subvendor = 0x17de,
2531 .subdevice = 0x0840, 2531 .subdevice = 0x0840,
2532 .card = CX88_BOARD_KWORLD_HARDWARE_MPEG_TV_XPERT, 2532 .card = CX88_BOARD_KWORLD_HARDWARE_MPEG_TV_XPERT,
2533 },{ 2533 }, {
2534 .subvendor = 0x1421, 2534 .subvendor = 0x1421,
2535 .subdevice = 0x0305, 2535 .subdevice = 0x0305,
2536 .card = CX88_BOARD_KWORLD_HARDWARE_MPEG_TV_XPERT, 2536 .card = CX88_BOARD_KWORLD_HARDWARE_MPEG_TV_XPERT,
2537 },{ 2537 }, {
2538 .subvendor = 0x18ac, 2538 .subvendor = 0x18ac,
2539 .subdevice = 0xdb40, 2539 .subdevice = 0xdb40,
2540 .card = CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID, 2540 .card = CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID,
2541 },{ 2541 }, {
2542 .subvendor = 0x18ac, 2542 .subvendor = 0x18ac,
2543 .subdevice = 0xdb44, 2543 .subdevice = 0xdb44,
2544 .card = CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID, 2544 .card = CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID,
2545 },{ 2545 }, {
2546 .subvendor = 0x7063, 2546 .subvendor = 0x7063,
2547 .subdevice = 0x5500, 2547 .subdevice = 0x5500,
2548 .card = CX88_BOARD_PCHDTV_HD5500, 2548 .card = CX88_BOARD_PCHDTV_HD5500,
2549 },{ 2549 }, {
2550 .subvendor = 0x17de, 2550 .subvendor = 0x17de,
2551 .subdevice = 0x0841, 2551 .subdevice = 0x0841,
2552 .card = CX88_BOARD_KWORLD_MCE200_DELUXE, 2552 .card = CX88_BOARD_KWORLD_MCE200_DELUXE,
2553 },{ 2553 }, {
2554 .subvendor = 0x1822, 2554 .subvendor = 0x1822,
2555 .subdevice = 0x0019, 2555 .subdevice = 0x0019,
2556 .card = CX88_BOARD_DNTV_LIVE_DVB_T_PRO, 2556 .card = CX88_BOARD_DNTV_LIVE_DVB_T_PRO,
2557 },{ 2557 }, {
2558 .subvendor = 0x1554, 2558 .subvendor = 0x1554,
2559 .subdevice = 0x4813, 2559 .subdevice = 0x4813,
2560 .card = CX88_BOARD_PIXELVIEW_PLAYTV_P7000, 2560 .card = CX88_BOARD_PIXELVIEW_PLAYTV_P7000,
2561 },{ 2561 }, {
2562 .subvendor = 0x14f1, 2562 .subvendor = 0x14f1,
2563 .subdevice = 0x0842, 2563 .subdevice = 0x0842,
2564 .card = CX88_BOARD_NPGTECH_REALTV_TOP10FM, 2564 .card = CX88_BOARD_NPGTECH_REALTV_TOP10FM,
2565 },{ 2565 }, {
2566 .subvendor = 0x107d, 2566 .subvendor = 0x107d,
2567 .subdevice = 0x665e, 2567 .subdevice = 0x665e,
2568 .card = CX88_BOARD_WINFAST_DTV2000H, 2568 .card = CX88_BOARD_WINFAST_DTV2000H,
2569 },{ 2569 }, {
2570 .subvendor = 0x107d, 2570 .subvendor = 0x107d,
2571 .subdevice = 0x6f2b, 2571 .subdevice = 0x6f2b,
2572 .card = CX88_BOARD_WINFAST_DTV2000H_J, 2572 .card = CX88_BOARD_WINFAST_DTV2000H_J,
2573 },{ 2573 }, {
2574 .subvendor = 0x18ac, 2574 .subvendor = 0x18ac,
2575 .subdevice = 0xd800, /* FusionHDTV 3 Gold (original revision) */ 2575 .subdevice = 0xd800, /* FusionHDTV 3 Gold (original revision) */
2576 .card = CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q, 2576 .card = CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q,
2577 },{ 2577 }, {
2578 .subvendor = 0x14f1, 2578 .subvendor = 0x14f1,
2579 .subdevice = 0x0084, 2579 .subdevice = 0x0084,
2580 .card = CX88_BOARD_GENIATECH_DVBS, 2580 .card = CX88_BOARD_GENIATECH_DVBS,
2581 },{ 2581 }, {
2582 .subvendor = 0x0070, 2582 .subvendor = 0x0070,
2583 .subdevice = 0x1404, 2583 .subdevice = 0x1404,
2584 .card = CX88_BOARD_HAUPPAUGE_HVR3000, 2584 .card = CX88_BOARD_HAUPPAUGE_HVR3000,
@@ -2590,60 +2590,60 @@ static const struct cx88_subid cx88_subids[] = {
2590 .subvendor = 0x18ac, 2590 .subvendor = 0x18ac,
2591 .subdevice = 0xdccd, 2591 .subdevice = 0xdccd,
2592 .card = CX88_BOARD_SAMSUNG_SMT_7020, 2592 .card = CX88_BOARD_SAMSUNG_SMT_7020,
2593 },{ 2593 }, {
2594 .subvendor = 0x1461, 2594 .subvendor = 0x1461,
2595 .subdevice = 0xc111, /* AverMedia M150-D */ 2595 .subdevice = 0xc111, /* AverMedia M150-D */
2596 /* This board is known to work with the ASUS PVR416 config */ 2596 /* This board is known to work with the ASUS PVR416 config */
2597 .card = CX88_BOARD_ASUS_PVR_416, 2597 .card = CX88_BOARD_ASUS_PVR_416,
2598 },{ 2598 }, {
2599 .subvendor = 0xc180, 2599 .subvendor = 0xc180,
2600 .subdevice = 0xc980, 2600 .subdevice = 0xc980,
2601 .card = CX88_BOARD_TE_DTV_250_OEM_SWANN, 2601 .card = CX88_BOARD_TE_DTV_250_OEM_SWANN,
2602 },{ 2602 }, {
2603 .subvendor = 0x0070, 2603 .subvendor = 0x0070,
2604 .subdevice = 0x9600, 2604 .subdevice = 0x9600,
2605 .card = CX88_BOARD_HAUPPAUGE_HVR1300, 2605 .card = CX88_BOARD_HAUPPAUGE_HVR1300,
2606 },{ 2606 }, {
2607 .subvendor = 0x0070, 2607 .subvendor = 0x0070,
2608 .subdevice = 0x9601, 2608 .subdevice = 0x9601,
2609 .card = CX88_BOARD_HAUPPAUGE_HVR1300, 2609 .card = CX88_BOARD_HAUPPAUGE_HVR1300,
2610 },{ 2610 }, {
2611 .subvendor = 0x0070, 2611 .subvendor = 0x0070,
2612 .subdevice = 0x9602, 2612 .subdevice = 0x9602,
2613 .card = CX88_BOARD_HAUPPAUGE_HVR1300, 2613 .card = CX88_BOARD_HAUPPAUGE_HVR1300,
2614 },{ 2614 }, {
2615 .subvendor = 0x107d, 2615 .subvendor = 0x107d,
2616 .subdevice = 0x6632, 2616 .subdevice = 0x6632,
2617 .card = CX88_BOARD_LEADTEK_PVR2000, 2617 .card = CX88_BOARD_LEADTEK_PVR2000,
2618 },{ 2618 }, {
2619 .subvendor = 0x12ab, 2619 .subvendor = 0x12ab,
2620 .subdevice = 0x2300, /* Club3D Zap TV2100 */ 2620 .subdevice = 0x2300, /* Club3D Zap TV2100 */
2621 .card = CX88_BOARD_KWORLD_DVB_T_CX22702, 2621 .card = CX88_BOARD_KWORLD_DVB_T_CX22702,
2622 },{ 2622 }, {
2623 .subvendor = 0x0070, 2623 .subvendor = 0x0070,
2624 .subdevice = 0x9000, 2624 .subdevice = 0x9000,
2625 .card = CX88_BOARD_HAUPPAUGE_DVB_T1, 2625 .card = CX88_BOARD_HAUPPAUGE_DVB_T1,
2626 },{ 2626 }, {
2627 .subvendor = 0x0070, 2627 .subvendor = 0x0070,
2628 .subdevice = 0x1400, 2628 .subdevice = 0x1400,
2629 .card = CX88_BOARD_HAUPPAUGE_HVR3000, 2629 .card = CX88_BOARD_HAUPPAUGE_HVR3000,
2630 },{ 2630 }, {
2631 .subvendor = 0x0070, 2631 .subvendor = 0x0070,
2632 .subdevice = 0x1401, 2632 .subdevice = 0x1401,
2633 .card = CX88_BOARD_HAUPPAUGE_HVR3000, 2633 .card = CX88_BOARD_HAUPPAUGE_HVR3000,
2634 },{ 2634 }, {
2635 .subvendor = 0x0070, 2635 .subvendor = 0x0070,
2636 .subdevice = 0x1402, 2636 .subdevice = 0x1402,
2637 .card = CX88_BOARD_HAUPPAUGE_HVR3000, 2637 .card = CX88_BOARD_HAUPPAUGE_HVR3000,
2638 },{ 2638 }, {
2639 .subvendor = 0x1421, 2639 .subvendor = 0x1421,
2640 .subdevice = 0x0341, /* ADS Tech InstantTV DVB-S */ 2640 .subdevice = 0x0341, /* ADS Tech InstantTV DVB-S */
2641 .card = CX88_BOARD_KWORLD_DVBS_100, 2641 .card = CX88_BOARD_KWORLD_DVBS_100,
2642 },{ 2642 }, {
2643 .subvendor = 0x1421, 2643 .subvendor = 0x1421,
2644 .subdevice = 0x0390, 2644 .subdevice = 0x0390,
2645 .card = CX88_BOARD_ADSTECH_PTV_390, 2645 .card = CX88_BOARD_ADSTECH_PTV_390,
2646 },{ 2646 }, {
2647 .subvendor = 0x11bd, 2647 .subvendor = 0x11bd,
2648 .subdevice = 0x0051, 2648 .subdevice = 0x0051,
2649 .card = CX88_BOARD_PINNACLE_PCTV_HD_800i, 2649 .card = CX88_BOARD_PINNACLE_PCTV_HD_800i,
diff --git a/drivers/media/pci/cx88/cx88-video.c b/drivers/media/pci/cx88/cx88-video.c
index ed8cb9037b6f..ce27e6d4f16e 100644
--- a/drivers/media/pci/cx88/cx88-video.c
+++ b/drivers/media/pci/cx88/cx88-video.c
@@ -696,7 +696,6 @@ static struct videobuf_queue *get_queue(struct file *file)
696 return &fh->vbiq; 696 return &fh->vbiq;
697 default: 697 default:
698 BUG(); 698 BUG();
699 return NULL;
700 } 699 }
701} 700}
702 701
@@ -711,7 +710,6 @@ static int get_resource(struct file *file)
711 return RESOURCE_VBI; 710 return RESOURCE_VBI;
712 default: 711 default:
713 BUG(); 712 BUG();
714 return 0;
715 } 713 }
716} 714}
717 715
@@ -812,7 +810,6 @@ video_read(struct file *file, char __user *data, size_t count, loff_t *ppos)
812 file->f_flags & O_NONBLOCK); 810 file->f_flags & O_NONBLOCK);
813 default: 811 default:
814 BUG(); 812 BUG();
815 return 0;
816 } 813 }
817} 814}
818 815
diff --git a/drivers/media/pci/ddbridge/ddbridge-core.c b/drivers/media/pci/ddbridge/ddbridge-core.c
index da8f848be3b8..c82e855a0814 100644
--- a/drivers/media/pci/ddbridge/ddbridge-core.c
+++ b/drivers/media/pci/ddbridge/ddbridge-core.c
@@ -149,7 +149,7 @@ static u32 ddb_i2c_functionality(struct i2c_adapter *adap)
149 return I2C_FUNC_SMBUS_EMUL; 149 return I2C_FUNC_SMBUS_EMUL;
150} 150}
151 151
152struct i2c_algorithm ddb_i2c_algo = { 152static struct i2c_algorithm ddb_i2c_algo = {
153 .master_xfer = ddb_i2c_master_xfer, 153 .master_xfer = ddb_i2c_master_xfer,
154 .functionality = ddb_i2c_functionality, 154 .functionality = ddb_i2c_functionality,
155}; 155};
@@ -266,7 +266,7 @@ static void io_free(struct pci_dev *pdev, u8 **vbuf,
266 for (i = 0; i < num; i++) { 266 for (i = 0; i < num; i++) {
267 if (vbuf[i]) { 267 if (vbuf[i]) {
268 pci_free_consistent(pdev, size, vbuf[i], pbuf[i]); 268 pci_free_consistent(pdev, size, vbuf[i], pbuf[i]);
269 vbuf[i] = 0; 269 vbuf[i] = NULL;
270 } 270 }
271 } 271 }
272} 272}
@@ -440,7 +440,7 @@ static u32 ddb_output_free(struct ddb_output *output)
440} 440}
441 441
442static ssize_t ddb_output_write(struct ddb_output *output, 442static ssize_t ddb_output_write(struct ddb_output *output,
443 const u8 *buf, size_t count) 443 const __user u8 *buf, size_t count)
444{ 444{
445 struct ddb *dev = output->port->dev; 445 struct ddb *dev = output->port->dev;
446 u32 idx, off, stat = output->stat; 446 u32 idx, off, stat = output->stat;
@@ -506,7 +506,7 @@ static u32 ddb_input_avail(struct ddb_input *input)
506 return 0; 506 return 0;
507} 507}
508 508
509static ssize_t ddb_input_read(struct ddb_input *input, u8 *buf, size_t count) 509static ssize_t ddb_input_read(struct ddb_input *input, __user u8 *buf, size_t count)
510{ 510{
511 struct ddb *dev = input->port->dev; 511 struct ddb *dev = input->port->dev;
512 u32 left = count; 512 u32 left = count;
@@ -849,7 +849,7 @@ static int dvb_input_attach(struct ddb_input *input)
849 return ret; 849 return ret;
850 input->attached = 4; 850 input->attached = 4;
851 851
852 input->fe = 0; 852 input->fe = NULL;
853 switch (port->type) { 853 switch (port->type) {
854 case DDB_TUNER_DVBS_ST: 854 case DDB_TUNER_DVBS_ST:
855 if (demod_attach_stv0900(input, 0) < 0) 855 if (demod_attach_stv0900(input, 0) < 0)
@@ -895,7 +895,7 @@ static int dvb_input_attach(struct ddb_input *input)
895/****************************************************************************/ 895/****************************************************************************/
896/****************************************************************************/ 896/****************************************************************************/
897 897
898static ssize_t ts_write(struct file *file, const char *buf, 898static ssize_t ts_write(struct file *file, const __user char *buf,
899 size_t count, loff_t *ppos) 899 size_t count, loff_t *ppos)
900{ 900{
901 struct dvb_device *dvbdev = file->private_data; 901 struct dvb_device *dvbdev = file->private_data;
@@ -920,7 +920,7 @@ static ssize_t ts_write(struct file *file, const char *buf,
920 return (left == count) ? -EAGAIN : (count - left); 920 return (left == count) ? -EAGAIN : (count - left);
921} 921}
922 922
923static ssize_t ts_read(struct file *file, char *buf, 923static ssize_t ts_read(struct file *file, __user char *buf,
924 size_t count, loff_t *ppos) 924 size_t count, loff_t *ppos)
925{ 925{
926 struct dvb_device *dvbdev = file->private_data; 926 struct dvb_device *dvbdev = file->private_data;
@@ -975,11 +975,9 @@ static const struct file_operations ci_fops = {
975 .open = dvb_generic_open, 975 .open = dvb_generic_open,
976 .release = dvb_generic_release, 976 .release = dvb_generic_release,
977 .poll = ts_poll, 977 .poll = ts_poll,
978 .mmap = 0,
979}; 978};
980 979
981static struct dvb_device dvbdev_ci = { 980static struct dvb_device dvbdev_ci = {
982 .priv = 0,
983 .readers = -1, 981 .readers = -1,
984 .writers = -1, 982 .writers = -1,
985 .users = -1, 983 .users = -1,
@@ -1038,7 +1036,7 @@ static void output_tasklet(unsigned long data)
1038} 1036}
1039 1037
1040 1038
1041struct cxd2099_cfg cxd_cfg = { 1039static struct cxd2099_cfg cxd_cfg = {
1042 .bitrate = 62000, 1040 .bitrate = 62000,
1043 .adr = 0x40, 1041 .adr = 0x40,
1044 .polarity = 1, 1042 .polarity = 1,
@@ -1127,7 +1125,7 @@ static void ddb_ports_detach(struct ddb *dev)
1127 ddb_output_stop(port->output); 1125 ddb_output_stop(port->output);
1128 dvb_ca_en50221_release(port->en); 1126 dvb_ca_en50221_release(port->en);
1129 kfree(port->en); 1127 kfree(port->en);
1130 port->en = 0; 1128 port->en = NULL;
1131 dvb_unregister_adapter(&port->output->adap); 1129 dvb_unregister_adapter(&port->output->adap);
1132 } 1130 }
1133 break; 1131 break;
@@ -1413,9 +1411,9 @@ static int flashio(struct ddb *dev, u8 *wbuf, u32 wlen, u8 *rbuf, u32 rlen)
1413#define DDB_MAGIC 'd' 1411#define DDB_MAGIC 'd'
1414 1412
1415struct ddb_flashio { 1413struct ddb_flashio {
1416 __u8 *write_buf; 1414 __user __u8 *write_buf;
1417 __u32 write_len; 1415 __u32 write_len;
1418 __u8 *read_buf; 1416 __user __u8 *read_buf;
1419 __u32 read_len; 1417 __u32 read_len;
1420}; 1418};
1421 1419
@@ -1439,7 +1437,7 @@ static int ddb_open(struct inode *inode, struct file *file)
1439static long ddb_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 1437static long ddb_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1440{ 1438{
1441 struct ddb *dev = file->private_data; 1439 struct ddb *dev = file->private_data;
1442 void *parg = (void *)arg; 1440 __user void *parg = (__user void *)arg;
1443 int res; 1441 int res;
1444 1442
1445 switch (cmd) { 1443 switch (cmd) {
@@ -1558,7 +1556,7 @@ static void ddb_remove(struct pci_dev *pdev)
1558 ddb_device_destroy(dev); 1556 ddb_device_destroy(dev);
1559 1557
1560 ddb_unmap(dev); 1558 ddb_unmap(dev);
1561 pci_set_drvdata(pdev, 0); 1559 pci_set_drvdata(pdev, NULL);
1562 pci_disable_device(pdev); 1560 pci_disable_device(pdev);
1563} 1561}
1564 1562
@@ -1637,7 +1635,7 @@ fail1:
1637fail: 1635fail:
1638 printk(KERN_ERR "fail\n"); 1636 printk(KERN_ERR "fail\n");
1639 ddb_unmap(dev); 1637 ddb_unmap(dev);
1640 pci_set_drvdata(pdev, 0); 1638 pci_set_drvdata(pdev, NULL);
1641 pci_disable_device(pdev); 1639 pci_disable_device(pdev);
1642 return -1; 1640 return -1;
1643} 1641}
diff --git a/drivers/media/pci/ddbridge/ddbridge.h b/drivers/media/pci/ddbridge/ddbridge.h
index 8b1b41d2a52d..be87fbd90456 100644
--- a/drivers/media/pci/ddbridge/ddbridge.h
+++ b/drivers/media/pci/ddbridge/ddbridge.h
@@ -156,7 +156,7 @@ struct ddb_port {
156 156
157struct ddb { 157struct ddb {
158 struct pci_dev *pdev; 158 struct pci_dev *pdev;
159 unsigned char *regs; 159 unsigned char __iomem *regs;
160 struct ddb_port port[DDB_MAX_PORT]; 160 struct ddb_port port[DDB_MAX_PORT];
161 struct ddb_i2c i2c[DDB_MAX_I2C]; 161 struct ddb_i2c i2c[DDB_MAX_I2C];
162 struct ddb_input input[DDB_MAX_INPUT]; 162 struct ddb_input input[DDB_MAX_INPUT];
@@ -173,12 +173,10 @@ struct ddb {
173/****************************************************************************/ 173/****************************************************************************/
174 174
175#define ddbwritel(_val, _adr) writel((_val), \ 175#define ddbwritel(_val, _adr) writel((_val), \
176 (char *) (dev->regs+(_adr))) 176 dev->regs+(_adr))
177#define ddbreadl(_adr) readl((char *) (dev->regs+(_adr))) 177#define ddbreadl(_adr) readl(dev->regs+(_adr))
178#define ddbcpyto(_adr, _src, _count) memcpy_toio((char *) \ 178#define ddbcpyto(_adr, _src, _count) memcpy_toio(dev->regs+(_adr), (_src), (_count))
179 (dev->regs+(_adr)), (_src), (_count)) 179#define ddbcpyfrom(_dst, _adr, _count) memcpy_fromio((_dst), dev->regs+(_adr), (_count))
180#define ddbcpyfrom(_dst, _adr, _count) memcpy_fromio((_dst), (char *) \
181 (dev->regs+(_adr)), (_count))
182 180
183/****************************************************************************/ 181/****************************************************************************/
184 182
diff --git a/drivers/media/pci/dm1105/dm1105.c b/drivers/media/pci/dm1105/dm1105.c
index e8826c535ccd..ed11716731e9 100644
--- a/drivers/media/pci/dm1105/dm1105.c
+++ b/drivers/media/pci/dm1105/dm1105.c
@@ -614,7 +614,7 @@ static int dm1105_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
614 614
615static void dm1105_set_dma_addr(struct dm1105_dev *dev) 615static void dm1105_set_dma_addr(struct dm1105_dev *dev)
616{ 616{
617 dm_writel(DM1105_STADR, cpu_to_le32(dev->dma_addr)); 617 dm_writel(DM1105_STADR, (__force u32)cpu_to_le32(dev->dma_addr));
618} 618}
619 619
620static int dm1105_dma_map(struct dm1105_dev *dev) 620static int dm1105_dma_map(struct dm1105_dev *dev)
diff --git a/drivers/media/pci/ivtv/ivtv-alsa-pcm.c b/drivers/media/pci/ivtv/ivtv-alsa-pcm.c
index 7a9b98bc208b..7bf9cbca4fa6 100644
--- a/drivers/media/pci/ivtv/ivtv-alsa-pcm.c
+++ b/drivers/media/pci/ivtv/ivtv-alsa-pcm.c
@@ -81,7 +81,7 @@ static void ivtv_alsa_announce_pcm_data(struct snd_ivtv_card *itvsc,
81 int period_elapsed = 0; 81 int period_elapsed = 0;
82 int length; 82 int length;
83 83
84 dprintk("ivtv alsa announce ptr=%p data=%p num_bytes=%zd\n", itvsc, 84 dprintk("ivtv alsa announce ptr=%p data=%p num_bytes=%zu\n", itvsc,
85 pcm_data, num_bytes); 85 pcm_data, num_bytes);
86 86
87 substream = itvsc->capture_pcm_substream; 87 substream = itvsc->capture_pcm_substream;
diff --git a/drivers/media/pci/ivtv/ivtv-firmware.c b/drivers/media/pci/ivtv/ivtv-firmware.c
index ed73edd2bcd3..4b0e758a7bce 100644
--- a/drivers/media/pci/ivtv/ivtv-firmware.c
+++ b/drivers/media/pci/ivtv/ivtv-firmware.c
@@ -65,7 +65,7 @@ retry:
65 the wrong file was sometimes loaded. So we check filesizes to 65 the wrong file was sometimes loaded. So we check filesizes to
66 see if at least the right-sized file was loaded. If not, then we 66 see if at least the right-sized file was loaded. If not, then we
67 retry. */ 67 retry. */
68 IVTV_INFO("Retry: file loaded was not %s (expected size %ld, got %zd)\n", fn, size, fw->size); 68 IVTV_INFO("Retry: file loaded was not %s (expected size %ld, got %zu)\n", fn, size, fw->size);
69 release_firmware(fw); 69 release_firmware(fw);
70 retries--; 70 retries--;
71 goto retry; 71 goto retry;
@@ -76,7 +76,7 @@ retry:
76 dst++; 76 dst++;
77 src++; 77 src++;
78 } 78 }
79 IVTV_INFO("Loaded %s firmware (%zd bytes)\n", fn, fw->size); 79 IVTV_INFO("Loaded %s firmware (%zu bytes)\n", fn, fw->size);
80 release_firmware(fw); 80 release_firmware(fw);
81 return size; 81 return size;
82 } 82 }
diff --git a/drivers/media/pci/ivtv/ivtv-irq.c b/drivers/media/pci/ivtv/ivtv-irq.c
index 19a7c9b990a3..ab6d5d25aa6f 100644
--- a/drivers/media/pci/ivtv/ivtv-irq.c
+++ b/drivers/media/pci/ivtv/ivtv-irq.c
@@ -192,11 +192,11 @@ static int stream_enc_dma_append(struct ivtv_stream *s, u32 data[CX2341X_MBOX_MA
192 if (itv->has_cx23415 && (s->type == IVTV_ENC_STREAM_TYPE_PCM || 192 if (itv->has_cx23415 && (s->type == IVTV_ENC_STREAM_TYPE_PCM ||
193 s->type == IVTV_DEC_STREAM_TYPE_VBI)) { 193 s->type == IVTV_DEC_STREAM_TYPE_VBI)) {
194 s->pending_backup = read_dec(offset - IVTV_DECODER_OFFSET); 194 s->pending_backup = read_dec(offset - IVTV_DECODER_OFFSET);
195 write_dec_sync(cpu_to_le32(DMA_MAGIC_COOKIE), offset - IVTV_DECODER_OFFSET); 195 write_dec_sync(DMA_MAGIC_COOKIE, offset - IVTV_DECODER_OFFSET);
196 } 196 }
197 else { 197 else {
198 s->pending_backup = read_enc(offset); 198 s->pending_backup = read_enc(offset);
199 write_enc_sync(cpu_to_le32(DMA_MAGIC_COOKIE), offset); 199 write_enc_sync(DMA_MAGIC_COOKIE, offset);
200 } 200 }
201 s->pending_offset = offset; 201 s->pending_offset = offset;
202 } 202 }
@@ -275,13 +275,11 @@ static void dma_post(struct ivtv_stream *s)
275 275
276 if (x == 0 && ivtv_use_dma(s)) { 276 if (x == 0 && ivtv_use_dma(s)) {
277 offset = s->dma_last_offset; 277 offset = s->dma_last_offset;
278 if (u32buf[offset / 4] != DMA_MAGIC_COOKIE) 278 if (le32_to_cpu(u32buf[offset / 4]) != DMA_MAGIC_COOKIE)
279 { 279 {
280 for (offset = 0; offset < 64; offset++) { 280 for (offset = 0; offset < 64; offset++)
281 if (u32buf[offset] == DMA_MAGIC_COOKIE) { 281 if (le32_to_cpu(u32buf[offset]) == DMA_MAGIC_COOKIE)
282 break; 282 break;
283 }
284 }
285 offset *= 4; 283 offset *= 4;
286 if (offset == 256) { 284 if (offset == 256) {
287 IVTV_DEBUG_WARN("%s: Couldn't find start of buffer within the first 256 bytes\n", s->name); 285 IVTV_DEBUG_WARN("%s: Couldn't find start of buffer within the first 256 bytes\n", s->name);
diff --git a/drivers/media/pci/mantis/hopper_vp3028.c b/drivers/media/pci/mantis/hopper_vp3028.c
index 68a29f8bdf73..1032db6bb789 100644
--- a/drivers/media/pci/mantis/hopper_vp3028.c
+++ b/drivers/media/pci/mantis/hopper_vp3028.c
@@ -34,7 +34,7 @@
34#include "mantis_dvb.h" 34#include "mantis_dvb.h"
35#include "hopper_vp3028.h" 35#include "hopper_vp3028.h"
36 36
37struct zl10353_config hopper_vp3028_config = { 37static struct zl10353_config hopper_vp3028_config = {
38 .demod_address = 0x0f, 38 .demod_address = 0x0f,
39}; 39};
40 40
diff --git a/drivers/media/pci/mantis/mantis_common.h b/drivers/media/pci/mantis/mantis_common.h
index f2410cf0a6bf..8ff448bb792d 100644
--- a/drivers/media/pci/mantis/mantis_common.h
+++ b/drivers/media/pci/mantis/mantis_common.h
@@ -127,7 +127,7 @@ struct mantis_pci {
127 u32 last_block; 127 u32 last_block;
128 u8 *buf_cpu; 128 u8 *buf_cpu;
129 dma_addr_t buf_dma; 129 dma_addr_t buf_dma;
130 u32 *risc_cpu; 130 __le32 *risc_cpu;
131 dma_addr_t risc_dma; 131 dma_addr_t risc_dma;
132 132
133 struct tasklet_struct tasklet; 133 struct tasklet_struct tasklet;
diff --git a/drivers/media/pci/mantis/mantis_vp1033.c b/drivers/media/pci/mantis/mantis_vp1033.c
index 115003e8d19d..12a6adb2bd7e 100644
--- a/drivers/media/pci/mantis/mantis_vp1033.c
+++ b/drivers/media/pci/mantis/mantis_vp1033.c
@@ -35,7 +35,7 @@
35#include "mantis_vp1033.h" 35#include "mantis_vp1033.h"
36#include "mantis_reg.h" 36#include "mantis_reg.h"
37 37
38u8 lgtdqcs001f_inittab[] = { 38static u8 lgtdqcs001f_inittab[] = {
39 0x01, 0x15, 39 0x01, 0x15,
40 0x02, 0x30, 40 0x02, 0x30,
41 0x03, 0x00, 41 0x03, 0x00,
@@ -150,7 +150,7 @@ static int lgtdqcs001f_set_symbol_rate(struct dvb_frontend *fe,
150 return 0; 150 return 0;
151} 151}
152 152
153struct stv0299_config lgtdqcs001f_config = { 153static struct stv0299_config lgtdqcs001f_config = {
154 .demod_address = 0x68, 154 .demod_address = 0x68,
155 .inittab = lgtdqcs001f_inittab, 155 .inittab = lgtdqcs001f_inittab,
156 .mclk = 88000000UL, 156 .mclk = 88000000UL,
diff --git a/drivers/media/pci/mantis/mantis_vp1034.c b/drivers/media/pci/mantis/mantis_vp1034.c
index 430ae84ce528..7c1bd167225c 100644
--- a/drivers/media/pci/mantis/mantis_vp1034.c
+++ b/drivers/media/pci/mantis/mantis_vp1034.c
@@ -36,7 +36,7 @@
36#include "mantis_vp1034.h" 36#include "mantis_vp1034.h"
37#include "mantis_reg.h" 37#include "mantis_reg.h"
38 38
39struct mb86a16_config vp1034_mb86a16_config = { 39static struct mb86a16_config vp1034_mb86a16_config = {
40 .demod_address = 0x08, 40 .demod_address = 0x08,
41 .set_voltage = vp1034_set_voltage, 41 .set_voltage = vp1034_set_voltage,
42}; 42};
diff --git a/drivers/media/pci/mantis/mantis_vp1041.c b/drivers/media/pci/mantis/mantis_vp1041.c
index 07a20748b707..7082fcbc94a1 100644
--- a/drivers/media/pci/mantis/mantis_vp1041.c
+++ b/drivers/media/pci/mantis/mantis_vp1041.c
@@ -263,7 +263,7 @@ static const struct stb0899_s1_reg vp1041_stb0899_s1_init_3[] = {
263 { 0xffff , 0xff }, 263 { 0xffff , 0xff },
264}; 264};
265 265
266struct stb0899_config vp1041_stb0899_config = { 266static struct stb0899_config vp1041_stb0899_config = {
267 .init_dev = vp1041_stb0899_s1_init_1, 267 .init_dev = vp1041_stb0899_s1_init_1,
268 .init_s2_demod = stb0899_s2_init_2, 268 .init_s2_demod = stb0899_s2_init_2,
269 .init_s1_demod = vp1041_stb0899_s1_init_3, 269 .init_s1_demod = vp1041_stb0899_s1_init_3,
@@ -300,7 +300,7 @@ struct stb0899_config vp1041_stb0899_config = {
300 .tuner_set_rfsiggain = NULL, 300 .tuner_set_rfsiggain = NULL,
301}; 301};
302 302
303struct stb6100_config vp1041_stb6100_config = { 303static struct stb6100_config vp1041_stb6100_config = {
304 .tuner_address = 0x60, 304 .tuner_address = 0x60,
305 .refclock = 27000000, 305 .refclock = 27000000,
306}; 306};
diff --git a/drivers/media/pci/mantis/mantis_vp2033.c b/drivers/media/pci/mantis/mantis_vp2033.c
index 1ca6837fbe46..8d48b5abe04a 100644
--- a/drivers/media/pci/mantis/mantis_vp2033.c
+++ b/drivers/media/pci/mantis/mantis_vp2033.c
@@ -37,12 +37,12 @@
37#define MANTIS_MODEL_NAME "VP-2033" 37#define MANTIS_MODEL_NAME "VP-2033"
38#define MANTIS_DEV_TYPE "DVB-C" 38#define MANTIS_DEV_TYPE "DVB-C"
39 39
40struct tda1002x_config vp2033_tda1002x_cu1216_config = { 40static struct tda1002x_config vp2033_tda1002x_cu1216_config = {
41 .demod_address = 0x18 >> 1, 41 .demod_address = 0x18 >> 1,
42 .invert = 1, 42 .invert = 1,
43}; 43};
44 44
45struct tda10023_config vp2033_tda10023_cu1216_config = { 45static struct tda10023_config vp2033_tda10023_cu1216_config = {
46 .demod_address = 0x18 >> 1, 46 .demod_address = 0x18 >> 1,
47 .invert = 1, 47 .invert = 1,
48}; 48};
diff --git a/drivers/media/pci/mantis/mantis_vp2040.c b/drivers/media/pci/mantis/mantis_vp2040.c
index d480741afd78..8dd17d7c0881 100644
--- a/drivers/media/pci/mantis/mantis_vp2040.c
+++ b/drivers/media/pci/mantis/mantis_vp2040.c
@@ -37,12 +37,12 @@
37#define MANTIS_MODEL_NAME "VP-2040" 37#define MANTIS_MODEL_NAME "VP-2040"
38#define MANTIS_DEV_TYPE "DVB-C" 38#define MANTIS_DEV_TYPE "DVB-C"
39 39
40struct tda1002x_config vp2040_tda1002x_cu1216_config = { 40static struct tda1002x_config vp2040_tda1002x_cu1216_config = {
41 .demod_address = 0x18 >> 1, 41 .demod_address = 0x18 >> 1,
42 .invert = 1, 42 .invert = 1,
43}; 43};
44 44
45struct tda10023_config vp2040_tda10023_cu1216_config = { 45static struct tda10023_config vp2040_tda10023_cu1216_config = {
46 .demod_address = 0x18 >> 1, 46 .demod_address = 0x18 >> 1,
47 .invert = 1, 47 .invert = 1,
48}; 48};
diff --git a/drivers/media/pci/mantis/mantis_vp3030.c b/drivers/media/pci/mantis/mantis_vp3030.c
index c09308cd3ac6..5c1dd925bdd5 100644
--- a/drivers/media/pci/mantis/mantis_vp3030.c
+++ b/drivers/media/pci/mantis/mantis_vp3030.c
@@ -35,11 +35,11 @@
35#include "mantis_dvb.h" 35#include "mantis_dvb.h"
36#include "mantis_vp3030.h" 36#include "mantis_vp3030.h"
37 37
38struct zl10353_config mantis_vp3030_config = { 38static struct zl10353_config mantis_vp3030_config = {
39 .demod_address = 0x0f, 39 .demod_address = 0x0f,
40}; 40};
41 41
42struct tda665x_config env57h12d5_config = { 42static struct tda665x_config env57h12d5_config = {
43 .name = "ENV57H12D5 (ET-50DT)", 43 .name = "ENV57H12D5 (ET-50DT)",
44 .addr = 0x60, 44 .addr = 0x60,
45 .frequency_min = 47000000, 45 .frequency_min = 47000000,
diff --git a/drivers/media/pci/ngene/ngene-cards.c b/drivers/media/pci/ngene/ngene-cards.c
index 9e82d2105d53..039bed3cc919 100644
--- a/drivers/media/pci/ngene/ngene-cards.c
+++ b/drivers/media/pci/ngene/ngene-cards.c
@@ -696,7 +696,7 @@ static struct ngene_info ngene_info_m780 = {
696 .demod_attach = { NULL, demod_attach_lg330x }, 696 .demod_attach = { NULL, demod_attach_lg330x },
697 697
698 /* Ensure these are NULL else the frame will call them (as funcs) */ 698 /* Ensure these are NULL else the frame will call them (as funcs) */
699 .tuner_attach = { 0, 0, 0, 0 }, 699 .tuner_attach = { NULL, NULL, NULL, NULL },
700 .fe_config = { NULL, &aver_m780 }, 700 .fe_config = { NULL, &aver_m780 },
701 .avf = { 0 }, 701 .avf = { 0 },
702 702
diff --git a/drivers/media/pci/ngene/ngene-core.c b/drivers/media/pci/ngene/ngene-core.c
index 4930b55fd5f4..e29bc3af4baf 100644
--- a/drivers/media/pci/ngene/ngene-core.c
+++ b/drivers/media/pci/ngene/ngene-core.c
@@ -57,15 +57,13 @@ DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
57 57
58#define dprintk if (debug) printk 58#define dprintk if (debug) printk
59 59
60#define ngwriteb(dat, adr) writeb((dat), (char *)(dev->iomem + (adr))) 60#define ngwriteb(dat, adr) writeb((dat), dev->iomem + (adr))
61#define ngwritel(dat, adr) writel((dat), (char *)(dev->iomem + (adr))) 61#define ngwritel(dat, adr) writel((dat), dev->iomem + (adr))
62#define ngwriteb(dat, adr) writeb((dat), (char *)(dev->iomem + (adr))) 62#define ngwriteb(dat, adr) writeb((dat), dev->iomem + (adr))
63#define ngreadl(adr) readl(dev->iomem + (adr)) 63#define ngreadl(adr) readl(dev->iomem + (adr))
64#define ngreadb(adr) readb(dev->iomem + (adr)) 64#define ngreadb(adr) readb(dev->iomem + (adr))
65#define ngcpyto(adr, src, count) memcpy_toio((char *) \ 65#define ngcpyto(adr, src, count) memcpy_toio(dev->iomem + (adr), (src), (count))
66 (dev->iomem + (adr)), (src), (count)) 66#define ngcpyfrom(dst, adr, count) memcpy_fromio((dst), dev->iomem + (adr), (count))
67#define ngcpyfrom(dst, adr, count) memcpy_fromio((dst), (char *) \
68 (dev->iomem + (adr)), (count))
69 67
70/****************************************************************************/ 68/****************************************************************************/
71/* nGene interrupt handler **************************************************/ 69/* nGene interrupt handler **************************************************/
@@ -1592,7 +1590,7 @@ static void cxd_detach(struct ngene *dev)
1592 1590
1593 dvb_ca_en50221_release(ci->en); 1591 dvb_ca_en50221_release(ci->en);
1594 kfree(ci->en); 1592 kfree(ci->en);
1595 ci->en = 0; 1593 ci->en = NULL;
1596} 1594}
1597 1595
1598/***********************************/ 1596/***********************************/
diff --git a/drivers/media/pci/ngene/ngene-dvb.c b/drivers/media/pci/ngene/ngene-dvb.c
index fcb16a615aab..59bb2858c8d0 100644
--- a/drivers/media/pci/ngene/ngene-dvb.c
+++ b/drivers/media/pci/ngene/ngene-dvb.c
@@ -47,7 +47,7 @@
47/* COMMAND API interface ****************************************************/ 47/* COMMAND API interface ****************************************************/
48/****************************************************************************/ 48/****************************************************************************/
49 49
50static ssize_t ts_write(struct file *file, const char *buf, 50static ssize_t ts_write(struct file *file, const char __user *buf,
51 size_t count, loff_t *ppos) 51 size_t count, loff_t *ppos)
52{ 52{
53 struct dvb_device *dvbdev = file->private_data; 53 struct dvb_device *dvbdev = file->private_data;
@@ -59,12 +59,12 @@ static ssize_t ts_write(struct file *file, const char *buf,
59 (&dev->tsout_rbuf) >= count) < 0) 59 (&dev->tsout_rbuf) >= count) < 0)
60 return 0; 60 return 0;
61 61
62 dvb_ringbuffer_write(&dev->tsout_rbuf, buf, count); 62 dvb_ringbuffer_write_user(&dev->tsout_rbuf, buf, count);
63 63
64 return count; 64 return count;
65} 65}
66 66
67static ssize_t ts_read(struct file *file, char *buf, 67static ssize_t ts_read(struct file *file, char __user *buf,
68 size_t count, loff_t *ppos) 68 size_t count, loff_t *ppos)
69{ 69{
70 struct dvb_device *dvbdev = file->private_data; 70 struct dvb_device *dvbdev = file->private_data;
@@ -97,7 +97,6 @@ static const struct file_operations ci_fops = {
97}; 97};
98 98
99struct dvb_device ngene_dvbdev_ci = { 99struct dvb_device ngene_dvbdev_ci = {
100 .priv = 0,
101 .readers = -1, 100 .readers = -1,
102 .writers = -1, 101 .writers = -1,
103 .users = -1, 102 .users = -1,
diff --git a/drivers/media/pci/ngene/ngene.h b/drivers/media/pci/ngene/ngene.h
index 22c39ff6bfa0..51e2fbd18b1b 100644
--- a/drivers/media/pci/ngene/ngene.h
+++ b/drivers/media/pci/ngene/ngene.h
@@ -737,7 +737,7 @@ typedef void (tx_cb_t)(struct ngene *, u32);
737struct ngene { 737struct ngene {
738 int nr; 738 int nr;
739 struct pci_dev *pci_dev; 739 struct pci_dev *pci_dev;
740 unsigned char *iomem; 740 unsigned char __iomem *iomem;
741 741
742 /*struct i2c_adapter i2c_adapter;*/ 742 /*struct i2c_adapter i2c_adapter;*/
743 743
diff --git a/drivers/media/pci/pt3/Kconfig b/drivers/media/pci/pt3/Kconfig
new file mode 100644
index 000000000000..16c208ae0079
--- /dev/null
+++ b/drivers/media/pci/pt3/Kconfig
@@ -0,0 +1,10 @@
1config DVB_PT3
2 tristate "Earthsoft PT3 cards"
3 depends on DVB_CORE && PCI && I2C
4 select DVB_TC90522 if MEDIA_SUBDRV_AUTOSELECT
5 select MEDIA_TUNER_QM1D1C0042 if MEDIA_SUBDRV_AUTOSELECT
6 select MEDIA_TUNER_MXL301RF if MEDIA_SUBDRV_AUTOSELECT
7 help
8 Support for Earthsoft PT3 PCIe cards.
9
10 Say Y or M if you own such a device and want to use it.
diff --git a/drivers/media/pci/pt3/Makefile b/drivers/media/pci/pt3/Makefile
new file mode 100644
index 000000000000..396f146b1c18
--- /dev/null
+++ b/drivers/media/pci/pt3/Makefile
@@ -0,0 +1,8 @@
1
2earth-pt3-objs += pt3.o pt3_i2c.o pt3_dma.o
3
4obj-$(CONFIG_DVB_PT3) += earth-pt3.o
5
6ccflags-y += -Idrivers/media/dvb-core
7ccflags-y += -Idrivers/media/dvb-frontends
8ccflags-y += -Idrivers/media/tuners
diff --git a/drivers/media/pci/pt3/pt3.c b/drivers/media/pci/pt3/pt3.c
new file mode 100644
index 000000000000..1fdeac11501a
--- /dev/null
+++ b/drivers/media/pci/pt3/pt3.c
@@ -0,0 +1,876 @@
1/*
2 * Earthsoft PT3 driver
3 *
4 * Copyright (C) 2014 Akihiro Tsukada <tskd08@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include <linux/freezer.h>
18#include <linux/kernel.h>
19#include <linux/kthread.h>
20#include <linux/mutex.h>
21#include <linux/module.h>
22#include <linux/pci.h>
23#include <linux/string.h>
24
25#include "dmxdev.h"
26#include "dvbdev.h"
27#include "dvb_demux.h"
28#include "dvb_frontend.h"
29
30#include "pt3.h"
31
32DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
33
34static bool one_adapter;
35module_param(one_adapter, bool, 0444);
36MODULE_PARM_DESC(one_adapter, "Place FE's together under one adapter.");
37
38static int num_bufs = 4;
39module_param(num_bufs, int, 0444);
40MODULE_PARM_DESC(num_bufs, "Number of DMA buffer (188KiB) per FE.");
41
42
43static const struct i2c_algorithm pt3_i2c_algo = {
44 .master_xfer = &pt3_i2c_master_xfer,
45 .functionality = &pt3_i2c_functionality,
46};
47
48static const struct pt3_adap_config adap_conf[PT3_NUM_FE] = {
49 {
50 .demod_info = {
51 I2C_BOARD_INFO(TC90522_I2C_DEV_SAT, 0x11),
52 },
53 .tuner_info = {
54 I2C_BOARD_INFO("qm1d1c0042", 0x63),
55 },
56 .tuner_cfg.qm1d1c0042 = {
57 .lpf = 1,
58 },
59 .init_freq = 1049480 - 300,
60 },
61 {
62 .demod_info = {
63 I2C_BOARD_INFO(TC90522_I2C_DEV_TER, 0x10),
64 },
65 .tuner_info = {
66 I2C_BOARD_INFO("mxl301rf", 0x62),
67 },
68 .init_freq = 515142857,
69 },
70 {
71 .demod_info = {
72 I2C_BOARD_INFO(TC90522_I2C_DEV_SAT, 0x13),
73 },
74 .tuner_info = {
75 I2C_BOARD_INFO("qm1d1c0042", 0x60),
76 },
77 .tuner_cfg.qm1d1c0042 = {
78 .lpf = 1,
79 },
80 .init_freq = 1049480 + 300,
81 },
82 {
83 .demod_info = {
84 I2C_BOARD_INFO(TC90522_I2C_DEV_TER, 0x12),
85 },
86 .tuner_info = {
87 I2C_BOARD_INFO("mxl301rf", 0x61),
88 },
89 .init_freq = 521142857,
90 },
91};
92
93
94struct reg_val {
95 u8 reg;
96 u8 val;
97};
98
99static int
100pt3_demod_write(struct pt3_adapter *adap, const struct reg_val *data, int num)
101{
102 struct i2c_msg msg;
103 int i, ret;
104
105 ret = 0;
106 msg.addr = adap->i2c_demod->addr;
107 msg.flags = 0;
108 msg.len = 2;
109 for (i = 0; i < num; i++) {
110 msg.buf = (u8 *)&data[i];
111 ret = i2c_transfer(adap->i2c_demod->adapter, &msg, 1);
112 if (ret == 0)
113 ret = -EREMOTE;
114 if (ret < 0)
115 return ret;
116 }
117 return 0;
118}
119
120static inline void pt3_lnb_ctrl(struct pt3_board *pt3, bool on)
121{
122 iowrite32((on ? 0x0f : 0x0c), pt3->regs[0] + REG_SYSTEM_W);
123}
124
125static inline struct pt3_adapter *pt3_find_adapter(struct dvb_frontend *fe)
126{
127 struct pt3_board *pt3;
128 int i;
129
130 if (one_adapter) {
131 pt3 = fe->dvb->priv;
132 for (i = 0; i < PT3_NUM_FE; i++)
133 if (pt3->adaps[i]->fe == fe)
134 return pt3->adaps[i];
135 }
136 return container_of(fe->dvb, struct pt3_adapter, dvb_adap);
137}
138
139/*
140 * all 4 tuners in PT3 are packaged in a can module (Sharp VA4M6JC2103).
141 * it seems that they share the power lines and Amp power line and
142 * adaps[3] controls those powers.
143 */
144static int
145pt3_set_tuner_power(struct pt3_board *pt3, bool tuner_on, bool amp_on)
146{
147 struct reg_val rv = { 0x1e, 0x99 };
148
149 if (tuner_on)
150 rv.val |= 0x40;
151 if (amp_on)
152 rv.val |= 0x04;
153 return pt3_demod_write(pt3->adaps[PT3_NUM_FE - 1], &rv, 1);
154}
155
156static int pt3_set_lna(struct dvb_frontend *fe)
157{
158 struct pt3_adapter *adap;
159 struct pt3_board *pt3;
160 u32 val;
161 int ret;
162
163 /* LNA is shared btw. 2 TERR-tuners */
164
165 adap = pt3_find_adapter(fe);
166 val = fe->dtv_property_cache.lna;
167 if (val == LNA_AUTO || val == adap->cur_lna)
168 return 0;
169
170 pt3 = adap->dvb_adap.priv;
171 if (mutex_lock_interruptible(&pt3->lock))
172 return -ERESTARTSYS;
173 if (val)
174 pt3->lna_on_cnt++;
175 else
176 pt3->lna_on_cnt--;
177
178 if (val && pt3->lna_on_cnt <= 1) {
179 pt3->lna_on_cnt = 1;
180 ret = pt3_set_tuner_power(pt3, true, true);
181 } else if (!val && pt3->lna_on_cnt <= 0) {
182 pt3->lna_on_cnt = 0;
183 ret = pt3_set_tuner_power(pt3, true, false);
184 } else
185 ret = 0;
186 mutex_unlock(&pt3->lock);
187 adap->cur_lna = (val != 0);
188 return ret;
189}
190
191static int pt3_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t volt)
192{
193 struct pt3_adapter *adap;
194 struct pt3_board *pt3;
195 bool on;
196
197 /* LNB power is shared btw. 2 SAT-tuners */
198
199 adap = pt3_find_adapter(fe);
200 on = (volt != SEC_VOLTAGE_OFF);
201 if (on == adap->cur_lnb)
202 return 0;
203 adap->cur_lnb = on;
204 pt3 = adap->dvb_adap.priv;
205 if (mutex_lock_interruptible(&pt3->lock))
206 return -ERESTARTSYS;
207 if (on)
208 pt3->lnb_on_cnt++;
209 else
210 pt3->lnb_on_cnt--;
211
212 if (on && pt3->lnb_on_cnt <= 1) {
213 pt3->lnb_on_cnt = 1;
214 pt3_lnb_ctrl(pt3, true);
215 } else if (!on && pt3->lnb_on_cnt <= 0) {
216 pt3->lnb_on_cnt = 0;
217 pt3_lnb_ctrl(pt3, false);
218 }
219 mutex_unlock(&pt3->lock);
220 return 0;
221}
222
223/* register values used in pt3_fe_init() */
224
225static const struct reg_val init0_sat[] = {
226 { 0x03, 0x01 },
227 { 0x1e, 0x10 },
228};
229static const struct reg_val init0_ter[] = {
230 { 0x01, 0x40 },
231 { 0x1c, 0x10 },
232};
233static const struct reg_val cfg_sat[] = {
234 { 0x1c, 0x15 },
235 { 0x1f, 0x04 },
236};
237static const struct reg_val cfg_ter[] = {
238 { 0x1d, 0x01 },
239};
240
241/*
242 * pt3_fe_init: initialize demod sub modules and ISDB-T tuners all at once.
243 *
244 * As for demod IC (TC90522) and ISDB-T tuners (MxL301RF),
245 * the i2c sequences for init'ing them are not public and hidden in a ROM,
246 * and include the board specific configurations as well.
247 * They are stored in a lump and cannot be taken out / accessed separately,
248 * thus cannot be moved to the FE/tuner driver.
249 */
250static int pt3_fe_init(struct pt3_board *pt3)
251{
252 int i, ret;
253 struct dvb_frontend *fe;
254
255 pt3_i2c_reset(pt3);
256 ret = pt3_init_all_demods(pt3);
257 if (ret < 0) {
258 dev_warn(&pt3->pdev->dev, "Failed to init demod chips.");
259 return ret;
260 }
261
262 /* additional config? */
263 for (i = 0; i < PT3_NUM_FE; i++) {
264 fe = pt3->adaps[i]->fe;
265
266 if (fe->ops.delsys[0] == SYS_ISDBS)
267 ret = pt3_demod_write(pt3->adaps[i],
268 init0_sat, ARRAY_SIZE(init0_sat));
269 else
270 ret = pt3_demod_write(pt3->adaps[i],
271 init0_ter, ARRAY_SIZE(init0_ter));
272 if (ret < 0) {
273 dev_warn(&pt3->pdev->dev,
274 "demod[%d] faild in init sequence0.", i);
275 return ret;
276 }
277 ret = fe->ops.init(fe);
278 if (ret < 0)
279 return ret;
280 }
281
282 usleep_range(2000, 4000);
283 ret = pt3_set_tuner_power(pt3, true, false);
284 if (ret < 0) {
285 dev_warn(&pt3->pdev->dev, "Failed to control tuner module.");
286 return ret;
287 }
288
289 /* output pin configuration */
290 for (i = 0; i < PT3_NUM_FE; i++) {
291 fe = pt3->adaps[i]->fe;
292 if (fe->ops.delsys[0] == SYS_ISDBS)
293 ret = pt3_demod_write(pt3->adaps[i],
294 cfg_sat, ARRAY_SIZE(cfg_sat));
295 else
296 ret = pt3_demod_write(pt3->adaps[i],
297 cfg_ter, ARRAY_SIZE(cfg_ter));
298 if (ret < 0) {
299 dev_warn(&pt3->pdev->dev,
300 "demod[%d] faild in init sequence1.", i);
301 return ret;
302 }
303 }
304 usleep_range(4000, 6000);
305
306 for (i = 0; i < PT3_NUM_FE; i++) {
307 fe = pt3->adaps[i]->fe;
308 if (fe->ops.delsys[0] != SYS_ISDBS)
309 continue;
310 /* init and wake-up ISDB-S tuners */
311 ret = fe->ops.tuner_ops.init(fe);
312 if (ret < 0) {
313 dev_warn(&pt3->pdev->dev,
314 "Failed to init SAT-tuner[%d].", i);
315 return ret;
316 }
317 }
318 ret = pt3_init_all_mxl301rf(pt3);
319 if (ret < 0) {
320 dev_warn(&pt3->pdev->dev, "Failed to init TERR-tuners.");
321 return ret;
322 }
323
324 ret = pt3_set_tuner_power(pt3, true, true);
325 if (ret < 0) {
326 dev_warn(&pt3->pdev->dev, "Failed to control tuner module.");
327 return ret;
328 }
329
330 /* Wake up all tuners and make an initial tuning,
331 * in order to avoid interference among the tuners in the module,
332 * according to the doc from the manufacturer.
333 */
334 for (i = 0; i < PT3_NUM_FE; i++) {
335 fe = pt3->adaps[i]->fe;
336 ret = 0;
337 if (fe->ops.delsys[0] == SYS_ISDBT)
338 ret = fe->ops.tuner_ops.init(fe);
339 /* set only when called from pt3_probe(), not resume() */
340 if (ret == 0 && fe->dtv_property_cache.frequency == 0) {
341 fe->dtv_property_cache.frequency =
342 adap_conf[i].init_freq;
343 ret = fe->ops.tuner_ops.set_params(fe);
344 }
345 if (ret < 0) {
346 dev_warn(&pt3->pdev->dev,
347 "Failed in initial tuning of tuner[%d].", i);
348 return ret;
349 }
350 }
351
352 /* and sleep again, waiting to be opened by users. */
353 for (i = 0; i < PT3_NUM_FE; i++) {
354 fe = pt3->adaps[i]->fe;
355 if (fe->ops.tuner_ops.sleep)
356 ret = fe->ops.tuner_ops.sleep(fe);
357 if (ret < 0)
358 break;
359 if (fe->ops.sleep)
360 ret = fe->ops.sleep(fe);
361 if (ret < 0)
362 break;
363 if (fe->ops.delsys[0] == SYS_ISDBS)
364 fe->ops.set_voltage = &pt3_set_voltage;
365 else
366 fe->ops.set_lna = &pt3_set_lna;
367 }
368 if (i < PT3_NUM_FE) {
369 dev_warn(&pt3->pdev->dev, "FE[%d] failed to standby.", i);
370 return ret;
371 }
372 return 0;
373}
374
375
376static int pt3_attach_fe(struct pt3_board *pt3, int i)
377{
378 struct i2c_board_info info;
379 struct tc90522_config cfg;
380 struct i2c_client *cl;
381 struct dvb_adapter *dvb_adap;
382 int ret;
383
384 info = adap_conf[i].demod_info;
385 cfg = adap_conf[i].demod_cfg;
386 cfg.tuner_i2c = NULL;
387 info.platform_data = &cfg;
388
389 ret = -ENODEV;
390 request_module("tc90522");
391 cl = i2c_new_device(&pt3->i2c_adap, &info);
392 if (!cl || !cl->dev.driver)
393 return -ENODEV;
394 pt3->adaps[i]->i2c_demod = cl;
395 if (!try_module_get(cl->dev.driver->owner))
396 goto err_demod_i2c_unregister_device;
397
398 if (!strncmp(cl->name, TC90522_I2C_DEV_SAT, sizeof(cl->name))) {
399 struct qm1d1c0042_config tcfg;
400
401 tcfg = adap_conf[i].tuner_cfg.qm1d1c0042;
402 tcfg.fe = cfg.fe;
403 info = adap_conf[i].tuner_info;
404 info.platform_data = &tcfg;
405 request_module("qm1d1c0042");
406 cl = i2c_new_device(cfg.tuner_i2c, &info);
407 } else {
408 struct mxl301rf_config tcfg;
409
410 tcfg = adap_conf[i].tuner_cfg.mxl301rf;
411 tcfg.fe = cfg.fe;
412 info = adap_conf[i].tuner_info;
413 info.platform_data = &tcfg;
414 request_module("mxl301rf");
415 cl = i2c_new_device(cfg.tuner_i2c, &info);
416 }
417 if (!cl || !cl->dev.driver)
418 goto err_demod_module_put;
419 pt3->adaps[i]->i2c_tuner = cl;
420 if (!try_module_get(cl->dev.driver->owner))
421 goto err_tuner_i2c_unregister_device;
422
423 dvb_adap = &pt3->adaps[one_adapter ? 0 : i]->dvb_adap;
424 ret = dvb_register_frontend(dvb_adap, cfg.fe);
425 if (ret < 0)
426 goto err_tuner_module_put;
427 pt3->adaps[i]->fe = cfg.fe;
428 return 0;
429
430err_tuner_module_put:
431 module_put(pt3->adaps[i]->i2c_tuner->dev.driver->owner);
432err_tuner_i2c_unregister_device:
433 i2c_unregister_device(pt3->adaps[i]->i2c_tuner);
434err_demod_module_put:
435 module_put(pt3->adaps[i]->i2c_demod->dev.driver->owner);
436err_demod_i2c_unregister_device:
437 i2c_unregister_device(pt3->adaps[i]->i2c_demod);
438
439 return ret;
440}
441
442
443static int pt3_fetch_thread(void *data)
444{
445 struct pt3_adapter *adap = data;
446 ktime_t delay;
447 bool was_frozen;
448
449#define PT3_INITIAL_BUF_DROPS 4
450#define PT3_FETCH_DELAY 10
451#define PT3_FETCH_DELAY_DELTA 2
452
453 pt3_init_dmabuf(adap);
454 adap->num_discard = PT3_INITIAL_BUF_DROPS;
455
456 dev_dbg(adap->dvb_adap.device,
457 "PT3: [%s] started.\n", adap->thread->comm);
458 set_freezable();
459 while (!kthread_freezable_should_stop(&was_frozen)) {
460 if (was_frozen)
461 adap->num_discard = PT3_INITIAL_BUF_DROPS;
462
463 pt3_proc_dma(adap);
464
465 delay = ktime_set(0, PT3_FETCH_DELAY * NSEC_PER_MSEC);
466 set_current_state(TASK_UNINTERRUPTIBLE);
467 freezable_schedule_hrtimeout_range(&delay,
468 PT3_FETCH_DELAY_DELTA * NSEC_PER_MSEC,
469 HRTIMER_MODE_REL);
470 }
471 dev_dbg(adap->dvb_adap.device,
472 "PT3: [%s] exited.\n", adap->thread->comm);
473 adap->thread = NULL;
474 return 0;
475}
476
477static int pt3_start_streaming(struct pt3_adapter *adap)
478{
479 struct task_struct *thread;
480
481 /* start fetching thread */
482 thread = kthread_run(pt3_fetch_thread, adap, "pt3-ad%i-dmx%i",
483 adap->dvb_adap.num, adap->dmxdev.dvbdev->id);
484 if (IS_ERR(thread)) {
485 int ret = PTR_ERR(thread);
486
487 dev_warn(adap->dvb_adap.device,
488 "PT3 (adap:%d, dmx:%d): failed to start kthread.\n",
489 adap->dvb_adap.num, adap->dmxdev.dvbdev->id);
490 return ret;
491 }
492 adap->thread = thread;
493
494 return pt3_start_dma(adap);
495}
496
497static int pt3_stop_streaming(struct pt3_adapter *adap)
498{
499 int ret;
500
501 ret = pt3_stop_dma(adap);
502 if (ret)
503 dev_warn(adap->dvb_adap.device,
504 "PT3: failed to stop streaming of adap:%d/FE:%d\n",
505 adap->dvb_adap.num, adap->fe->id);
506
507 /* kill the fetching thread */
508 ret = kthread_stop(adap->thread);
509 return ret;
510}
511
512static int pt3_start_feed(struct dvb_demux_feed *feed)
513{
514 struct pt3_adapter *adap;
515
516 if (signal_pending(current))
517 return -EINTR;
518
519 adap = container_of(feed->demux, struct pt3_adapter, demux);
520 adap->num_feeds++;
521 if (adap->thread)
522 return 0;
523 if (adap->num_feeds != 1) {
524 dev_warn(adap->dvb_adap.device,
525 "%s: unmatched start/stop_feed in adap:%i/dmx:%i.\n",
526 __func__, adap->dvb_adap.num, adap->dmxdev.dvbdev->id);
527 adap->num_feeds = 1;
528 }
529
530 return pt3_start_streaming(adap);
531
532}
533
534static int pt3_stop_feed(struct dvb_demux_feed *feed)
535{
536 struct pt3_adapter *adap;
537
538 adap = container_of(feed->demux, struct pt3_adapter, demux);
539
540 adap->num_feeds--;
541 if (adap->num_feeds > 0 || !adap->thread)
542 return 0;
543 adap->num_feeds = 0;
544
545 return pt3_stop_streaming(adap);
546}
547
548
549static int pt3_alloc_adapter(struct pt3_board *pt3, int index)
550{
551 int ret;
552 struct pt3_adapter *adap;
553 struct dvb_adapter *da;
554
555 adap = kzalloc(sizeof(*adap), GFP_KERNEL);
556 if (!adap) {
557 dev_err(&pt3->pdev->dev, "failed to alloc mem for adapter.\n");
558 return -ENOMEM;
559 }
560 pt3->adaps[index] = adap;
561 adap->adap_idx = index;
562
563 if (index == 0 || !one_adapter) {
564 ret = dvb_register_adapter(&adap->dvb_adap, "PT3 DVB",
565 THIS_MODULE, &pt3->pdev->dev, adapter_nr);
566 if (ret < 0) {
567 dev_err(&pt3->pdev->dev,
568 "failed to register adapter dev.\n");
569 goto err_mem;
570 }
571 da = &adap->dvb_adap;
572 } else
573 da = &pt3->adaps[0]->dvb_adap;
574
575 adap->dvb_adap.priv = pt3;
576 adap->demux.dmx.capabilities = DMX_TS_FILTERING | DMX_SECTION_FILTERING;
577 adap->demux.priv = adap;
578 adap->demux.feednum = 256;
579 adap->demux.filternum = 256;
580 adap->demux.start_feed = pt3_start_feed;
581 adap->demux.stop_feed = pt3_stop_feed;
582 ret = dvb_dmx_init(&adap->demux);
583 if (ret < 0) {
584 dev_err(&pt3->pdev->dev, "failed to init dmx dev.\n");
585 goto err_adap;
586 }
587
588 adap->dmxdev.filternum = 256;
589 adap->dmxdev.demux = &adap->demux.dmx;
590 ret = dvb_dmxdev_init(&adap->dmxdev, da);
591 if (ret < 0) {
592 dev_err(&pt3->pdev->dev, "failed to init dmxdev.\n");
593 goto err_demux;
594 }
595
596 ret = pt3_alloc_dmabuf(adap);
597 if (ret) {
598 dev_err(&pt3->pdev->dev, "failed to alloc DMA buffers.\n");
599 goto err_dmabuf;
600 }
601
602 return 0;
603
604err_dmabuf:
605 pt3_free_dmabuf(adap);
606 dvb_dmxdev_release(&adap->dmxdev);
607err_demux:
608 dvb_dmx_release(&adap->demux);
609err_adap:
610 if (index == 0 || !one_adapter)
611 dvb_unregister_adapter(da);
612err_mem:
613 kfree(adap);
614 pt3->adaps[index] = NULL;
615 return ret;
616}
617
618static void pt3_cleanup_adapter(struct pt3_board *pt3, int index)
619{
620 struct pt3_adapter *adap;
621 struct dmx_demux *dmx;
622
623 adap = pt3->adaps[index];
624 if (adap == NULL)
625 return;
626
627 /* stop demux kthread */
628 if (adap->thread)
629 pt3_stop_streaming(adap);
630
631 dmx = &adap->demux.dmx;
632 dmx->close(dmx);
633 if (adap->fe) {
634 adap->fe->callback = NULL;
635 if (adap->fe->frontend_priv)
636 dvb_unregister_frontend(adap->fe);
637 if (adap->i2c_tuner) {
638 module_put(adap->i2c_tuner->dev.driver->owner);
639 i2c_unregister_device(adap->i2c_tuner);
640 }
641 if (adap->i2c_demod) {
642 module_put(adap->i2c_demod->dev.driver->owner);
643 i2c_unregister_device(adap->i2c_demod);
644 }
645 }
646 pt3_free_dmabuf(adap);
647 dvb_dmxdev_release(&adap->dmxdev);
648 dvb_dmx_release(&adap->demux);
649 if (index == 0 || !one_adapter)
650 dvb_unregister_adapter(&adap->dvb_adap);
651 kfree(adap);
652 pt3->adaps[index] = NULL;
653}
654
655#ifdef CONFIG_PM_SLEEP
656
657static int pt3_suspend(struct device *dev)
658{
659 struct pci_dev *pdev = to_pci_dev(dev);
660 struct pt3_board *pt3 = pci_get_drvdata(pdev);
661 int i;
662 struct pt3_adapter *adap;
663
664 for (i = 0; i < PT3_NUM_FE; i++) {
665 adap = pt3->adaps[i];
666 if (adap->num_feeds > 0)
667 pt3_stop_dma(adap);
668 dvb_frontend_suspend(adap->fe);
669 pt3_free_dmabuf(adap);
670 }
671
672 pt3_lnb_ctrl(pt3, false);
673 pt3_set_tuner_power(pt3, false, false);
674 return 0;
675}
676
677static int pt3_resume(struct device *dev)
678{
679 struct pci_dev *pdev = to_pci_dev(dev);
680 struct pt3_board *pt3 = pci_get_drvdata(pdev);
681 int i, ret;
682 struct pt3_adapter *adap;
683
684 ret = pt3_fe_init(pt3);
685 if (ret)
686 return ret;
687
688 if (pt3->lna_on_cnt > 0)
689 pt3_set_tuner_power(pt3, true, true);
690 if (pt3->lnb_on_cnt > 0)
691 pt3_lnb_ctrl(pt3, true);
692
693 for (i = 0; i < PT3_NUM_FE; i++) {
694 adap = pt3->adaps[i];
695 dvb_frontend_resume(adap->fe);
696 ret = pt3_alloc_dmabuf(adap);
697 if (ret) {
698 dev_err(&pt3->pdev->dev, "failed to alloc DMA bufs.\n");
699 continue;
700 }
701 if (adap->num_feeds > 0)
702 pt3_start_dma(adap);
703 }
704
705 return 0;
706}
707
708#endif /* CONFIG_PM_SLEEP */
709
710
711static void pt3_remove(struct pci_dev *pdev)
712{
713 struct pt3_board *pt3;
714 int i;
715
716 pt3 = pci_get_drvdata(pdev);
717 for (i = PT3_NUM_FE - 1; i >= 0; i--)
718 pt3_cleanup_adapter(pt3, i);
719 i2c_del_adapter(&pt3->i2c_adap);
720 kfree(pt3->i2c_buf);
721 pci_iounmap(pt3->pdev, pt3->regs[0]);
722 pci_iounmap(pt3->pdev, pt3->regs[1]);
723 pci_release_regions(pdev);
724 pci_disable_device(pdev);
725 kfree(pt3);
726}
727
728static int pt3_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
729{
730 u8 rev;
731 u32 ver;
732 int i, ret;
733 struct pt3_board *pt3;
734 struct i2c_adapter *i2c;
735
736 if (pci_read_config_byte(pdev, PCI_REVISION_ID, &rev) || rev != 1)
737 return -ENODEV;
738
739 ret = pci_enable_device(pdev);
740 if (ret < 0)
741 return -ENODEV;
742 pci_set_master(pdev);
743
744 ret = pci_request_regions(pdev, DRV_NAME);
745 if (ret < 0)
746 goto err_disable_device;
747
748 ret = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
749 if (ret == 0)
750 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
751 else {
752 ret = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
753 if (ret == 0)
754 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
755 else {
756 dev_err(&pdev->dev, "Failed to set DMA mask.\n");
757 goto err_release_regions;
758 }
759 dev_info(&pdev->dev, "Use 32bit DMA.\n");
760 }
761
762 pt3 = kzalloc(sizeof(*pt3), GFP_KERNEL);
763 if (!pt3) {
764 dev_err(&pdev->dev, "Failed to alloc mem for this dev.\n");
765 ret = -ENOMEM;
766 goto err_release_regions;
767 }
768 pci_set_drvdata(pdev, pt3);
769 pt3->pdev = pdev;
770 mutex_init(&pt3->lock);
771 pt3->regs[0] = pci_ioremap_bar(pdev, 0);
772 pt3->regs[1] = pci_ioremap_bar(pdev, 2);
773 if (pt3->regs[0] == NULL || pt3->regs[1] == NULL) {
774 dev_err(&pdev->dev, "Failed to ioremap.\n");
775 ret = -ENOMEM;
776 goto err_kfree;
777 }
778
779 ver = ioread32(pt3->regs[0] + REG_VERSION);
780 if ((ver >> 16) != 0x0301) {
781 dev_warn(&pdev->dev, "PT%d, I/F-ver.:%d not supported",
782 ver >> 24, (ver & 0x00ff0000) >> 16);
783 ret = -ENODEV;
784 goto err_iounmap;
785 }
786
787 pt3->num_bufs = clamp_val(num_bufs, MIN_DATA_BUFS, MAX_DATA_BUFS);
788
789 pt3->i2c_buf = kmalloc(sizeof(*pt3->i2c_buf), GFP_KERNEL);
790 if (pt3->i2c_buf == NULL) {
791 dev_err(&pdev->dev, "Failed to alloc mem for i2c.\n");
792 ret = -ENOMEM;
793 goto err_iounmap;
794 }
795 i2c = &pt3->i2c_adap;
796 i2c->owner = THIS_MODULE;
797 i2c->algo = &pt3_i2c_algo;
798 i2c->algo_data = NULL;
799 i2c->dev.parent = &pdev->dev;
800 strlcpy(i2c->name, DRV_NAME, sizeof(i2c->name));
801 i2c_set_adapdata(i2c, pt3);
802 ret = i2c_add_adapter(i2c);
803 if (ret < 0) {
804 dev_err(&pdev->dev, "Failed to add i2c adapter.\n");
805 goto err_i2cbuf;
806 }
807
808 for (i = 0; i < PT3_NUM_FE; i++) {
809 ret = pt3_alloc_adapter(pt3, i);
810 if (ret < 0)
811 break;
812
813 ret = pt3_attach_fe(pt3, i);
814 if (ret < 0)
815 break;
816 }
817 if (i < PT3_NUM_FE) {
818 dev_err(&pdev->dev, "Failed to create FE%d.\n", i);
819 goto err_cleanup_adapters;
820 }
821
822 ret = pt3_fe_init(pt3);
823 if (ret < 0) {
824 dev_err(&pdev->dev, "Failed to init frontends.\n");
825 i = PT3_NUM_FE - 1;
826 goto err_cleanup_adapters;
827 }
828
829 dev_info(&pdev->dev,
830 "successfully init'ed PT%d (fw:0x%02x, I/F:0x%02x).\n",
831 ver >> 24, (ver >> 8) & 0xff, (ver >> 16) & 0xff);
832 return 0;
833
834err_cleanup_adapters:
835 while (i >= 0)
836 pt3_cleanup_adapter(pt3, i--);
837 i2c_del_adapter(i2c);
838err_i2cbuf:
839 kfree(pt3->i2c_buf);
840err_iounmap:
841 if (pt3->regs[0])
842 pci_iounmap(pdev, pt3->regs[0]);
843 if (pt3->regs[1])
844 pci_iounmap(pdev, pt3->regs[1]);
845err_kfree:
846 kfree(pt3);
847err_release_regions:
848 pci_release_regions(pdev);
849err_disable_device:
850 pci_disable_device(pdev);
851 return ret;
852
853}
854
855static const struct pci_device_id pt3_id_table[] = {
856 { PCI_DEVICE_SUB(0x1172, 0x4c15, 0xee8d, 0x0368) },
857 { },
858};
859MODULE_DEVICE_TABLE(pci, pt3_id_table);
860
861static SIMPLE_DEV_PM_OPS(pt3_pm_ops, pt3_suspend, pt3_resume);
862
863static struct pci_driver pt3_driver = {
864 .name = DRV_NAME,
865 .probe = pt3_probe,
866 .remove = pt3_remove,
867 .id_table = pt3_id_table,
868
869 .driver.pm = &pt3_pm_ops,
870};
871
872module_pci_driver(pt3_driver);
873
874MODULE_DESCRIPTION("Earthsoft PT3 Driver");
875MODULE_AUTHOR("Akihiro TSUKADA");
876MODULE_LICENSE("GPL");
diff --git a/drivers/media/pci/pt3/pt3.h b/drivers/media/pci/pt3/pt3.h
new file mode 100644
index 000000000000..1b3f2ad25db3
--- /dev/null
+++ b/drivers/media/pci/pt3/pt3.h
@@ -0,0 +1,186 @@
1/*
2 * Earthsoft PT3 driver
3 *
4 * Copyright (C) 2014 Akihiro Tsukada <tskd08@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#ifndef PT3_H
18#define PT3_H
19
20#include <linux/atomic.h>
21#include <linux/types.h>
22
23#include "dvb_demux.h"
24#include "dvb_frontend.h"
25#include "dmxdev.h"
26
27#include "tc90522.h"
28#include "mxl301rf.h"
29#include "qm1d1c0042.h"
30
31#define DRV_NAME KBUILD_MODNAME
32
33#define PT3_NUM_FE 4
34
35/*
36 * register index of the FPGA chip
37 */
38#define REG_VERSION 0x00
39#define REG_BUS 0x04
40#define REG_SYSTEM_W 0x08
41#define REG_SYSTEM_R 0x0c
42#define REG_I2C_W 0x10
43#define REG_I2C_R 0x14
44#define REG_RAM_W 0x18
45#define REG_RAM_R 0x1c
46#define REG_DMA_BASE 0x40 /* regs for FE[i] = REG_DMA_BASE + 0x18 * i */
47#define OFST_DMA_DESC_L 0x00
48#define OFST_DMA_DESC_H 0x04
49#define OFST_DMA_CTL 0x08
50#define OFST_TS_CTL 0x0c
51#define OFST_STATUS 0x10
52#define OFST_TS_ERR 0x14
53
54/*
55 * internal buffer for I2C
56 */
57#define PT3_I2C_MAX 4091
58struct pt3_i2cbuf {
59 u8 data[PT3_I2C_MAX];
60 u8 tmp;
61 u32 num_cmds;
62};
63
64/*
65 * DMA things
66 */
67#define TS_PACKET_SZ 188
68/* DMA transfers must not cross 4GiB, so use one page / transfer */
69#define DATA_XFER_SZ 4096
70#define DATA_BUF_XFERS 47
71/* (num_bufs * DATA_BUF_SZ) % TS_PACKET_SZ must be 0 */
72#define DATA_BUF_SZ (DATA_BUF_XFERS * DATA_XFER_SZ)
73#define MAX_DATA_BUFS 16
74#define MIN_DATA_BUFS 2
75
76#define DESCS_IN_PAGE (PAGE_SIZE / sizeof(struct xfer_desc))
77#define MAX_NUM_XFERS (MAX_DATA_BUFS * DATA_BUF_XFERS)
78#define MAX_DESC_BUFS DIV_ROUND_UP(MAX_NUM_XFERS, DESCS_IN_PAGE)
79
80/* DMA transfer description.
81 * device is passed a pointer to this struct, dma-reads it,
82 * and gets the DMA buffer ring for storing TS data.
83 */
84struct xfer_desc {
85 u32 addr_l; /* bus address of target data buffer */
86 u32 addr_h;
87 u32 size;
88 u32 next_l; /* bus adddress of the next xfer_desc */
89 u32 next_h;
90};
91
92/* A DMA mapping of a page containing xfer_desc's */
93struct xfer_desc_buffer {
94 dma_addr_t b_addr;
95 struct xfer_desc *descs; /* PAGE_SIZE (xfer_desc[DESCS_IN_PAGE]) */
96};
97
98/* A DMA mapping of a data buffer */
99struct dma_data_buffer {
100 dma_addr_t b_addr;
101 u8 *data; /* size: u8[PAGE_SIZE] */
102};
103
104/*
105 * device things
106 */
107struct pt3_adap_config {
108 struct i2c_board_info demod_info;
109 struct tc90522_config demod_cfg;
110
111 struct i2c_board_info tuner_info;
112 union tuner_config {
113 struct qm1d1c0042_config qm1d1c0042;
114 struct mxl301rf_config mxl301rf;
115 } tuner_cfg;
116 u32 init_freq;
117};
118
119struct pt3_adapter {
120 struct dvb_adapter dvb_adap; /* dvb_adap.priv => struct pt3_board */
121 int adap_idx;
122
123 struct dvb_demux demux;
124 struct dmxdev dmxdev;
125 struct dvb_frontend *fe;
126 struct i2c_client *i2c_demod;
127 struct i2c_client *i2c_tuner;
128
129 /* data fetch thread */
130 struct task_struct *thread;
131 int num_feeds;
132
133 bool cur_lna;
134 bool cur_lnb; /* current LNB power status (on/off) */
135
136 /* items below are for DMA */
137 struct dma_data_buffer buffer[MAX_DATA_BUFS];
138 int buf_idx;
139 int buf_ofs;
140 int num_bufs; /* == pt3_board->num_bufs */
141 int num_discard; /* how many access units to discard initially */
142
143 struct xfer_desc_buffer desc_buf[MAX_DESC_BUFS];
144 int num_desc_bufs; /* == num_bufs * DATA_BUF_XFERS / DESCS_IN_PAGE */
145};
146
147
148struct pt3_board {
149 struct pci_dev *pdev;
150 void __iomem *regs[2];
151 /* regs[0]: registers, regs[1]: internal memory, used for I2C */
152
153 struct mutex lock;
154
155 /* LNB power shared among sat-FEs */
156 int lnb_on_cnt; /* LNB power on count */
157
158 /* LNA shared among terr-FEs */
159 int lna_on_cnt; /* booster enabled count */
160
161 int num_bufs; /* number of DMA buffers allocated/mapped per FE */
162
163 struct i2c_adapter i2c_adap;
164 struct pt3_i2cbuf *i2c_buf;
165
166 struct pt3_adapter *adaps[PT3_NUM_FE];
167};
168
169
170/*
171 * prototypes
172 */
173extern int pt3_alloc_dmabuf(struct pt3_adapter *adap);
174extern void pt3_init_dmabuf(struct pt3_adapter *adap);
175extern void pt3_free_dmabuf(struct pt3_adapter *adap);
176extern int pt3_start_dma(struct pt3_adapter *adap);
177extern int pt3_stop_dma(struct pt3_adapter *adap);
178extern int pt3_proc_dma(struct pt3_adapter *adap);
179
180extern int pt3_i2c_master_xfer(struct i2c_adapter *adap,
181 struct i2c_msg *msgs, int num);
182extern u32 pt3_i2c_functionality(struct i2c_adapter *adap);
183extern void pt3_i2c_reset(struct pt3_board *pt3);
184extern int pt3_init_all_demods(struct pt3_board *pt3);
185extern int pt3_init_all_mxl301rf(struct pt3_board *pt3);
186#endif /* PT3_H */
diff --git a/drivers/media/pci/pt3/pt3_dma.c b/drivers/media/pci/pt3/pt3_dma.c
new file mode 100644
index 000000000000..f0ce90437fac
--- /dev/null
+++ b/drivers/media/pci/pt3/pt3_dma.c
@@ -0,0 +1,225 @@
1/*
2 * Earthsoft PT3 driver
3 *
4 * Copyright (C) 2014 Akihiro Tsukada <tskd08@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16#include <linux/dma-mapping.h>
17#include <linux/kernel.h>
18#include <linux/pci.h>
19
20#include "pt3.h"
21
22#define PT3_ACCESS_UNIT (TS_PACKET_SZ * 128)
23#define PT3_BUF_CANARY (0x74)
24
25static u32 get_dma_base(int idx)
26{
27 int i;
28
29 i = (idx == 1 || idx == 2) ? 3 - idx : idx;
30 return REG_DMA_BASE + 0x18 * i;
31}
32
33int pt3_stop_dma(struct pt3_adapter *adap)
34{
35 struct pt3_board *pt3 = adap->dvb_adap.priv;
36 u32 base;
37 u32 stat;
38 int retry;
39
40 base = get_dma_base(adap->adap_idx);
41 stat = ioread32(pt3->regs[0] + base + OFST_STATUS);
42 if (!(stat & 0x01))
43 return 0;
44
45 iowrite32(0x02, pt3->regs[0] + base + OFST_DMA_CTL);
46 for (retry = 0; retry < 5; retry++) {
47 stat = ioread32(pt3->regs[0] + base + OFST_STATUS);
48 if (!(stat & 0x01))
49 return 0;
50 msleep(50);
51 }
52 return -EIO;
53}
54
55int pt3_start_dma(struct pt3_adapter *adap)
56{
57 struct pt3_board *pt3 = adap->dvb_adap.priv;
58 u32 base = get_dma_base(adap->adap_idx);
59
60 iowrite32(0x02, pt3->regs[0] + base + OFST_DMA_CTL);
61 iowrite32(lower_32_bits(adap->desc_buf[0].b_addr),
62 pt3->regs[0] + base + OFST_DMA_DESC_L);
63 iowrite32(upper_32_bits(adap->desc_buf[0].b_addr),
64 pt3->regs[0] + base + OFST_DMA_DESC_H);
65 iowrite32(0x01, pt3->regs[0] + base + OFST_DMA_CTL);
66 return 0;
67}
68
69
70static u8 *next_unit(struct pt3_adapter *adap, int *idx, int *ofs)
71{
72 *ofs += PT3_ACCESS_UNIT;
73 if (*ofs >= DATA_BUF_SZ) {
74 *ofs -= DATA_BUF_SZ;
75 (*idx)++;
76 if (*idx == adap->num_bufs)
77 *idx = 0;
78 }
79 return &adap->buffer[*idx].data[*ofs];
80}
81
82int pt3_proc_dma(struct pt3_adapter *adap)
83{
84 int idx, ofs;
85
86 idx = adap->buf_idx;
87 ofs = adap->buf_ofs;
88
89 if (adap->buffer[idx].data[ofs] == PT3_BUF_CANARY)
90 return 0;
91
92 while (*next_unit(adap, &idx, &ofs) != PT3_BUF_CANARY) {
93 u8 *p;
94
95 p = &adap->buffer[adap->buf_idx].data[adap->buf_ofs];
96 if (adap->num_discard > 0)
97 adap->num_discard--;
98 else if (adap->buf_ofs + PT3_ACCESS_UNIT > DATA_BUF_SZ) {
99 dvb_dmx_swfilter_packets(&adap->demux, p,
100 (DATA_BUF_SZ - adap->buf_ofs) / TS_PACKET_SZ);
101 dvb_dmx_swfilter_packets(&adap->demux,
102 adap->buffer[idx].data, ofs / TS_PACKET_SZ);
103 } else
104 dvb_dmx_swfilter_packets(&adap->demux, p,
105 PT3_ACCESS_UNIT / TS_PACKET_SZ);
106
107 *p = PT3_BUF_CANARY;
108 adap->buf_idx = idx;
109 adap->buf_ofs = ofs;
110 }
111 return 0;
112}
113
114void pt3_init_dmabuf(struct pt3_adapter *adap)
115{
116 int idx, ofs;
117 u8 *p;
118
119 idx = 0;
120 ofs = 0;
121 p = adap->buffer[0].data;
122 /* mark the whole buffers as "not written yet" */
123 while (idx < adap->num_bufs) {
124 p[ofs] = PT3_BUF_CANARY;
125 ofs += PT3_ACCESS_UNIT;
126 if (ofs >= DATA_BUF_SZ) {
127 ofs -= DATA_BUF_SZ;
128 idx++;
129 p = adap->buffer[idx].data;
130 }
131 }
132 adap->buf_idx = 0;
133 adap->buf_ofs = 0;
134}
135
136void pt3_free_dmabuf(struct pt3_adapter *adap)
137{
138 struct pt3_board *pt3;
139 int i;
140
141 pt3 = adap->dvb_adap.priv;
142 for (i = 0; i < adap->num_bufs; i++)
143 dma_free_coherent(&pt3->pdev->dev, DATA_BUF_SZ,
144 adap->buffer[i].data, adap->buffer[i].b_addr);
145 adap->num_bufs = 0;
146
147 for (i = 0; i < adap->num_desc_bufs; i++)
148 dma_free_coherent(&pt3->pdev->dev, PAGE_SIZE,
149 adap->desc_buf[i].descs, adap->desc_buf[i].b_addr);
150 adap->num_desc_bufs = 0;
151}
152
153
154int pt3_alloc_dmabuf(struct pt3_adapter *adap)
155{
156 struct pt3_board *pt3;
157 void *p;
158 int i, j;
159 int idx, ofs;
160 int num_desc_bufs;
161 dma_addr_t data_addr, desc_addr;
162 struct xfer_desc *d;
163
164 pt3 = adap->dvb_adap.priv;
165 adap->num_bufs = 0;
166 adap->num_desc_bufs = 0;
167 for (i = 0; i < pt3->num_bufs; i++) {
168 p = dma_alloc_coherent(&pt3->pdev->dev, DATA_BUF_SZ,
169 &adap->buffer[i].b_addr, GFP_KERNEL);
170 if (p == NULL)
171 goto failed;
172 adap->buffer[i].data = p;
173 adap->num_bufs++;
174 }
175 pt3_init_dmabuf(adap);
176
177 /* build circular-linked pointers (xfer_desc) to the data buffers*/
178 idx = 0;
179 ofs = 0;
180 num_desc_bufs =
181 DIV_ROUND_UP(adap->num_bufs * DATA_BUF_XFERS, DESCS_IN_PAGE);
182 for (i = 0; i < num_desc_bufs; i++) {
183 p = dma_alloc_coherent(&pt3->pdev->dev, PAGE_SIZE,
184 &desc_addr, GFP_KERNEL);
185 if (p == NULL)
186 goto failed;
187 adap->num_desc_bufs++;
188 adap->desc_buf[i].descs = p;
189 adap->desc_buf[i].b_addr = desc_addr;
190
191 if (i > 0) {
192 d = &adap->desc_buf[i - 1].descs[DESCS_IN_PAGE - 1];
193 d->next_l = lower_32_bits(desc_addr);
194 d->next_h = upper_32_bits(desc_addr);
195 }
196 for (j = 0; j < DESCS_IN_PAGE; j++) {
197 data_addr = adap->buffer[idx].b_addr + ofs;
198 d = &adap->desc_buf[i].descs[j];
199 d->addr_l = lower_32_bits(data_addr);
200 d->addr_h = upper_32_bits(data_addr);
201 d->size = DATA_XFER_SZ;
202
203 desc_addr += sizeof(struct xfer_desc);
204 d->next_l = lower_32_bits(desc_addr);
205 d->next_h = upper_32_bits(desc_addr);
206
207 ofs += DATA_XFER_SZ;
208 if (ofs >= DATA_BUF_SZ) {
209 ofs -= DATA_BUF_SZ;
210 idx++;
211 if (idx >= adap->num_bufs) {
212 desc_addr = adap->desc_buf[0].b_addr;
213 d->next_l = lower_32_bits(desc_addr);
214 d->next_h = upper_32_bits(desc_addr);
215 return 0;
216 }
217 }
218 }
219 }
220 return 0;
221
222failed:
223 pt3_free_dmabuf(adap);
224 return -ENOMEM;
225}
diff --git a/drivers/media/pci/pt3/pt3_i2c.c b/drivers/media/pci/pt3/pt3_i2c.c
new file mode 100644
index 000000000000..ec6a8a2e4744
--- /dev/null
+++ b/drivers/media/pci/pt3/pt3_i2c.c
@@ -0,0 +1,240 @@
1/*
2 * Earthsoft PT3 driver
3 *
4 * Copyright (C) 2014 Akihiro Tsukada <tskd08@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16#include <linux/delay.h>
17#include <linux/device.h>
18#include <linux/i2c.h>
19#include <linux/io.h>
20#include <linux/pci.h>
21
22#include "pt3.h"
23
24#define PT3_I2C_BASE 2048
25#define PT3_CMD_ADDR_NORMAL 0
26#define PT3_CMD_ADDR_INIT_DEMOD 4096
27#define PT3_CMD_ADDR_INIT_TUNER (4096 + 2042)
28
29/* masks for I2C status register */
30#define STAT_SEQ_RUNNING 0x1
31#define STAT_SEQ_ERROR 0x6
32#define STAT_NO_SEQ 0x8
33
34#define PT3_I2C_RUN (1 << 16)
35#define PT3_I2C_RESET (1 << 17)
36
37enum ctl_cmd {
38 I_END,
39 I_ADDRESS,
40 I_CLOCK_L,
41 I_CLOCK_H,
42 I_DATA_L,
43 I_DATA_H,
44 I_RESET,
45 I_SLEEP,
46 I_DATA_L_NOP = 0x08,
47 I_DATA_H_NOP = 0x0c,
48 I_DATA_H_READ = 0x0d,
49 I_DATA_H_ACK0 = 0x0e,
50 I_DATA_H_ACK1 = 0x0f,
51};
52
53
54static void cmdbuf_add(struct pt3_i2cbuf *cbuf, enum ctl_cmd cmd)
55{
56 int buf_idx;
57
58 if ((cbuf->num_cmds % 2) == 0)
59 cbuf->tmp = cmd;
60 else {
61 cbuf->tmp |= cmd << 4;
62 buf_idx = cbuf->num_cmds / 2;
63 if (buf_idx < ARRAY_SIZE(cbuf->data))
64 cbuf->data[buf_idx] = cbuf->tmp;
65 }
66 cbuf->num_cmds++;
67}
68
69static void put_end(struct pt3_i2cbuf *cbuf)
70{
71 cmdbuf_add(cbuf, I_END);
72 if (cbuf->num_cmds % 2)
73 cmdbuf_add(cbuf, I_END);
74}
75
76static void put_start(struct pt3_i2cbuf *cbuf)
77{
78 cmdbuf_add(cbuf, I_DATA_H);
79 cmdbuf_add(cbuf, I_CLOCK_H);
80 cmdbuf_add(cbuf, I_DATA_L);
81 cmdbuf_add(cbuf, I_CLOCK_L);
82}
83
84static void put_byte_write(struct pt3_i2cbuf *cbuf, u8 val)
85{
86 u8 mask;
87
88 mask = 0x80;
89 for (mask = 0x80; mask > 0; mask >>= 1)
90 cmdbuf_add(cbuf, (val & mask) ? I_DATA_H_NOP : I_DATA_L_NOP);
91 cmdbuf_add(cbuf, I_DATA_H_ACK0);
92}
93
94static void put_byte_read(struct pt3_i2cbuf *cbuf, u32 size)
95{
96 int i, j;
97
98 for (i = 0; i < size; i++) {
99 for (j = 0; j < 8; j++)
100 cmdbuf_add(cbuf, I_DATA_H_READ);
101 cmdbuf_add(cbuf, (i == size - 1) ? I_DATA_H_NOP : I_DATA_L_NOP);
102 }
103}
104
105static void put_stop(struct pt3_i2cbuf *cbuf)
106{
107 cmdbuf_add(cbuf, I_DATA_L);
108 cmdbuf_add(cbuf, I_CLOCK_H);
109 cmdbuf_add(cbuf, I_DATA_H);
110}
111
112
113/* translates msgs to internal commands for bit-banging */
114static void translate(struct pt3_i2cbuf *cbuf, struct i2c_msg *msgs, int num)
115{
116 int i, j;
117 bool rd;
118
119 cbuf->num_cmds = 0;
120 for (i = 0; i < num; i++) {
121 rd = !!(msgs[i].flags & I2C_M_RD);
122 put_start(cbuf);
123 put_byte_write(cbuf, msgs[i].addr << 1 | rd);
124 if (rd)
125 put_byte_read(cbuf, msgs[i].len);
126 else
127 for (j = 0; j < msgs[i].len; j++)
128 put_byte_write(cbuf, msgs[i].buf[j]);
129 }
130 if (num > 0) {
131 put_stop(cbuf);
132 put_end(cbuf);
133 }
134}
135
136static int wait_i2c_result(struct pt3_board *pt3, u32 *result, int max_wait)
137{
138 int i;
139 u32 v;
140
141 for (i = 0; i < max_wait; i++) {
142 v = ioread32(pt3->regs[0] + REG_I2C_R);
143 if (!(v & STAT_SEQ_RUNNING))
144 break;
145 usleep_range(500, 750);
146 }
147 if (i >= max_wait)
148 return -EIO;
149 if (result)
150 *result = v;
151 return 0;
152}
153
154/* send [pre-]translated i2c msgs stored at addr */
155static int send_i2c_cmd(struct pt3_board *pt3, u32 addr)
156{
157 u32 ret;
158
159 /* make sure that previous transactions had finished */
160 if (wait_i2c_result(pt3, NULL, 50)) {
161 dev_warn(&pt3->pdev->dev, "(%s) prev. transaction stalled\n",
162 __func__);
163 return -EIO;
164 }
165
166 iowrite32(PT3_I2C_RUN | addr, pt3->regs[0] + REG_I2C_W);
167 usleep_range(200, 300);
168 /* wait for the current transaction to finish */
169 if (wait_i2c_result(pt3, &ret, 500) || (ret & STAT_SEQ_ERROR)) {
170 dev_warn(&pt3->pdev->dev, "(%s) failed.\n", __func__);
171 return -EIO;
172 }
173 return 0;
174}
175
176
177/* init commands for each demod are combined into one transaction
178 * and hidden in ROM with the address PT3_CMD_ADDR_INIT_DEMOD.
179 */
180int pt3_init_all_demods(struct pt3_board *pt3)
181{
182 ioread32(pt3->regs[0] + REG_I2C_R);
183 return send_i2c_cmd(pt3, PT3_CMD_ADDR_INIT_DEMOD);
184}
185
186/* init commands for two ISDB-T tuners are hidden in ROM. */
187int pt3_init_all_mxl301rf(struct pt3_board *pt3)
188{
189 usleep_range(1000, 2000);
190 return send_i2c_cmd(pt3, PT3_CMD_ADDR_INIT_TUNER);
191}
192
193void pt3_i2c_reset(struct pt3_board *pt3)
194{
195 iowrite32(PT3_I2C_RESET, pt3->regs[0] + REG_I2C_W);
196}
197
198/*
199 * I2C algorithm
200 */
201int
202pt3_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
203{
204 struct pt3_board *pt3;
205 struct pt3_i2cbuf *cbuf;
206 int i;
207 void __iomem *p;
208
209 pt3 = i2c_get_adapdata(adap);
210 cbuf = pt3->i2c_buf;
211
212 for (i = 0; i < num; i++)
213 if (msgs[i].flags & I2C_M_RECV_LEN) {
214 dev_warn(&pt3->pdev->dev,
215 "(%s) I2C_M_RECV_LEN not supported.\n",
216 __func__);
217 return -EINVAL;
218 }
219
220 translate(cbuf, msgs, num);
221 memcpy_toio(pt3->regs[1] + PT3_I2C_BASE + PT3_CMD_ADDR_NORMAL / 2,
222 cbuf->data, cbuf->num_cmds);
223
224 if (send_i2c_cmd(pt3, PT3_CMD_ADDR_NORMAL) < 0)
225 return -EIO;
226
227 p = pt3->regs[1] + PT3_I2C_BASE;
228 for (i = 0; i < num; i++)
229 if ((msgs[i].flags & I2C_M_RD) && msgs[i].len > 0) {
230 memcpy_fromio(msgs[i].buf, p, msgs[i].len);
231 p += msgs[i].len;
232 }
233
234 return num;
235}
236
237u32 pt3_i2c_functionality(struct i2c_adapter *adap)
238{
239 return I2C_FUNC_I2C;
240}
diff --git a/drivers/media/pci/saa7134/Kconfig b/drivers/media/pci/saa7134/Kconfig
index 18ae75546302..b44e0d70907e 100644
--- a/drivers/media/pci/saa7134/Kconfig
+++ b/drivers/media/pci/saa7134/Kconfig
@@ -63,3 +63,11 @@ config VIDEO_SAA7134_DVB
63 63
64 To compile this driver as a module, choose M here: the 64 To compile this driver as a module, choose M here: the
65 module will be called saa7134-dvb. 65 module will be called saa7134-dvb.
66
67config VIDEO_SAA7134_GO7007
68 tristate "go7007 support for saa7134 based TV cards"
69 depends on VIDEO_SAA7134
70 depends on VIDEO_GO7007
71 ---help---
72 Enables saa7134 driver support for boards with go7007
73 MPEG encoder (WIS Voyager or compatible).
diff --git a/drivers/media/pci/saa7134/Makefile b/drivers/media/pci/saa7134/Makefile
index 58de9b085689..09c43da67588 100644
--- a/drivers/media/pci/saa7134/Makefile
+++ b/drivers/media/pci/saa7134/Makefile
@@ -5,6 +5,7 @@ saa7134-y += saa7134-video.o
5saa7134-$(CONFIG_VIDEO_SAA7134_RC) += saa7134-input.o 5saa7134-$(CONFIG_VIDEO_SAA7134_RC) += saa7134-input.o
6 6
7obj-$(CONFIG_VIDEO_SAA7134) += saa7134.o saa7134-empress.o 7obj-$(CONFIG_VIDEO_SAA7134) += saa7134.o saa7134-empress.o
8obj-$(CONFIG_VIDEO_SAA7134_GO7007) += saa7134-go7007.o
8 9
9obj-$(CONFIG_VIDEO_SAA7134_ALSA) += saa7134-alsa.o 10obj-$(CONFIG_VIDEO_SAA7134_ALSA) += saa7134-alsa.o
10 11
@@ -14,3 +15,4 @@ ccflags-y += -I$(srctree)/drivers/media/i2c
14ccflags-y += -I$(srctree)/drivers/media/tuners 15ccflags-y += -I$(srctree)/drivers/media/tuners
15ccflags-y += -I$(srctree)/drivers/media/dvb-core 16ccflags-y += -I$(srctree)/drivers/media/dvb-core
16ccflags-y += -I$(srctree)/drivers/media/dvb-frontends 17ccflags-y += -I$(srctree)/drivers/media/dvb-frontends
18ccflags-y += -I$(srctree)/drivers/media/usb/go7007
diff --git a/drivers/media/pci/saa7134/saa7134-cards.c b/drivers/media/pci/saa7134/saa7134-cards.c
index 6e4bdb90aa92..3ca078057755 100644
--- a/drivers/media/pci/saa7134/saa7134-cards.c
+++ b/drivers/media/pci/saa7134/saa7134-cards.c
@@ -5827,6 +5827,29 @@ struct saa7134_board saa7134_boards[] = {
5827 .gpio = 0x0000800, 5827 .gpio = 0x0000800,
5828 }, 5828 },
5829 }, 5829 },
5830 [SAA7134_BOARD_WIS_VOYAGER] = {
5831 .name = "WIS Voyager or compatible",
5832 .audio_clock = 0x00200000,
5833 .tuner_type = TUNER_PHILIPS_TDA8290,
5834 .radio_type = UNSET,
5835 .tuner_addr = ADDR_UNSET,
5836 .radio_addr = ADDR_UNSET,
5837 .mpeg = SAA7134_MPEG_GO7007,
5838 .inputs = { {
5839 .name = name_comp1,
5840 .vmux = 0,
5841 .amux = LINE2,
5842 }, {
5843 .name = name_tv,
5844 .vmux = 3,
5845 .amux = TV,
5846 .tv = 1,
5847 }, {
5848 .name = name_svideo,
5849 .vmux = 6,
5850 .amux = LINE1,
5851 } },
5852 },
5830 5853
5831}; 5854};
5832 5855
@@ -7080,6 +7103,12 @@ struct pci_device_id saa7134_pci_tbl[] = {
7080 .subdevice = 0x2055, /* AverTV Satellite Hybrid+FM A706 */ 7103 .subdevice = 0x2055, /* AverTV Satellite Hybrid+FM A706 */
7081 .driver_data = SAA7134_BOARD_AVERMEDIA_A706, 7104 .driver_data = SAA7134_BOARD_AVERMEDIA_A706,
7082 }, { 7105 }, {
7106 .vendor = PCI_VENDOR_ID_PHILIPS,
7107 .device = PCI_DEVICE_ID_PHILIPS_SAA7133,
7108 .subvendor = 0x1905, /* WIS */
7109 .subdevice = 0x7007,
7110 .driver_data = SAA7134_BOARD_WIS_VOYAGER,
7111 }, {
7083 /* --- boards without eeprom + subsystem ID --- */ 7112 /* --- boards without eeprom + subsystem ID --- */
7084 .vendor = PCI_VENDOR_ID_PHILIPS, 7113 .vendor = PCI_VENDOR_ID_PHILIPS,
7085 .device = PCI_DEVICE_ID_PHILIPS_SAA7134, 7114 .device = PCI_DEVICE_ID_PHILIPS_SAA7134,
diff --git a/drivers/media/pci/saa7134/saa7134-core.c b/drivers/media/pci/saa7134/saa7134-core.c
index 9ff03a69ced4..236ed725f933 100644
--- a/drivers/media/pci/saa7134/saa7134-core.c
+++ b/drivers/media/pci/saa7134/saa7134-core.c
@@ -160,6 +160,8 @@ static void request_module_async(struct work_struct *work){
160 request_module("saa7134-empress"); 160 request_module("saa7134-empress");
161 if (card_is_dvb(dev)) 161 if (card_is_dvb(dev))
162 request_module("saa7134-dvb"); 162 request_module("saa7134-dvb");
163 if (card_is_go7007(dev))
164 request_module("saa7134-go7007");
163 if (alsa) { 165 if (alsa) {
164 if (dev->pci->device != PCI_DEVICE_ID_PHILIPS_SAA7130) 166 if (dev->pci->device != PCI_DEVICE_ID_PHILIPS_SAA7130)
165 request_module("saa7134-alsa"); 167 request_module("saa7134-alsa");
@@ -563,8 +565,12 @@ static irqreturn_t saa7134_irq(int irq, void *dev_id)
563 saa7134_irq_vbi_done(dev,status); 565 saa7134_irq_vbi_done(dev,status);
564 566
565 if ((report & SAA7134_IRQ_REPORT_DONE_RA2) && 567 if ((report & SAA7134_IRQ_REPORT_DONE_RA2) &&
566 card_has_mpeg(dev)) 568 card_has_mpeg(dev)) {
567 saa7134_irq_ts_done(dev,status); 569 if (dev->mops->irq_ts_done != NULL)
570 dev->mops->irq_ts_done(dev, status);
571 else
572 saa7134_irq_ts_done(dev, status);
573 }
568 574
569 if (report & SAA7134_IRQ_REPORT_GPIO16) { 575 if (report & SAA7134_IRQ_REPORT_GPIO16) {
570 switch (dev->has_remote) { 576 switch (dev->has_remote) {
diff --git a/drivers/media/pci/saa7134/saa7134-go7007.c b/drivers/media/pci/saa7134/saa7134-go7007.c
new file mode 100644
index 000000000000..54e650b4dff1
--- /dev/null
+++ b/drivers/media/pci/saa7134/saa7134-go7007.c
@@ -0,0 +1,531 @@
1/*
2 * Copyright (C) 2005-2006 Micronas USA Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License (Version 2) as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/spinlock.h>
18#include <linux/wait.h>
19#include <linux/list.h>
20#include <linux/slab.h>
21#include <linux/time.h>
22#include <linux/mm.h>
23#include <linux/usb.h>
24#include <linux/i2c.h>
25#include <asm/byteorder.h>
26#include <media/v4l2-common.h>
27#include <media/v4l2-device.h>
28#include <media/v4l2-subdev.h>
29
30#include "saa7134.h"
31#include "saa7134-reg.h"
32#include "go7007-priv.h"
33
34/*#define GO7007_HPI_DEBUG*/
35
36enum hpi_address {
37 HPI_ADDR_VIDEO_BUFFER = 0xe4,
38 HPI_ADDR_INIT_BUFFER = 0xea,
39 HPI_ADDR_INTR_RET_VALUE = 0xee,
40 HPI_ADDR_INTR_RET_DATA = 0xec,
41 HPI_ADDR_INTR_STATUS = 0xf4,
42 HPI_ADDR_INTR_WR_PARAM = 0xf6,
43 HPI_ADDR_INTR_WR_INDEX = 0xf8,
44};
45
46enum gpio_command {
47 GPIO_COMMAND_RESET = 0x00, /* 000b */
48 GPIO_COMMAND_REQ1 = 0x04, /* 001b */
49 GPIO_COMMAND_WRITE = 0x20, /* 010b */
50 GPIO_COMMAND_REQ2 = 0x24, /* 011b */
51 GPIO_COMMAND_READ = 0x80, /* 100b */
52 GPIO_COMMAND_VIDEO = 0x84, /* 101b */
53 GPIO_COMMAND_IDLE = 0xA0, /* 110b */
54 GPIO_COMMAND_ADDR = 0xA4, /* 111b */
55};
56
57struct saa7134_go7007 {
58 struct v4l2_subdev sd;
59 struct saa7134_dev *dev;
60 u8 *top;
61 u8 *bottom;
62 dma_addr_t top_dma;
63 dma_addr_t bottom_dma;
64};
65
66static inline struct saa7134_go7007 *to_state(struct v4l2_subdev *sd)
67{
68 return container_of(sd, struct saa7134_go7007, sd);
69}
70
71static const struct go7007_board_info board_voyager = {
72 .flags = 0,
73 .sensor_flags = GO7007_SENSOR_656 |
74 GO7007_SENSOR_VALID_ENABLE |
75 GO7007_SENSOR_TV |
76 GO7007_SENSOR_VBI,
77 .audio_flags = GO7007_AUDIO_I2S_MODE_1 |
78 GO7007_AUDIO_WORD_16,
79 .audio_rate = 48000,
80 .audio_bclk_div = 8,
81 .audio_main_div = 2,
82 .hpi_buffer_cap = 7,
83 .num_inputs = 1,
84 .inputs = {
85 {
86 .name = "SAA7134",
87 },
88 },
89};
90
91/********************* Driver for GPIO HPI interface *********************/
92
93static int gpio_write(struct saa7134_dev *dev, u8 addr, u16 data)
94{
95 saa_writeb(SAA7134_GPIO_GPMODE0, 0xff);
96
97 /* Write HPI address */
98 saa_writeb(SAA7134_GPIO_GPSTATUS0, addr);
99 saa_writeb(SAA7134_GPIO_GPSTATUS2, GPIO_COMMAND_ADDR);
100 saa_writeb(SAA7134_GPIO_GPSTATUS2, GPIO_COMMAND_IDLE);
101
102 /* Write low byte */
103 saa_writeb(SAA7134_GPIO_GPSTATUS0, data & 0xff);
104 saa_writeb(SAA7134_GPIO_GPSTATUS2, GPIO_COMMAND_WRITE);
105 saa_writeb(SAA7134_GPIO_GPSTATUS2, GPIO_COMMAND_IDLE);
106
107 /* Write high byte */
108 saa_writeb(SAA7134_GPIO_GPSTATUS0, data >> 8);
109 saa_writeb(SAA7134_GPIO_GPSTATUS2, GPIO_COMMAND_WRITE);
110 saa_writeb(SAA7134_GPIO_GPSTATUS2, GPIO_COMMAND_IDLE);
111
112 return 0;
113}
114
115static int gpio_read(struct saa7134_dev *dev, u8 addr, u16 *data)
116{
117 saa_writeb(SAA7134_GPIO_GPMODE0, 0xff);
118
119 /* Write HPI address */
120 saa_writeb(SAA7134_GPIO_GPSTATUS0, addr);
121 saa_writeb(SAA7134_GPIO_GPSTATUS2, GPIO_COMMAND_ADDR);
122 saa_writeb(SAA7134_GPIO_GPSTATUS2, GPIO_COMMAND_IDLE);
123
124 saa_writeb(SAA7134_GPIO_GPMODE0, 0x00);
125
126 /* Read low byte */
127 saa_writeb(SAA7134_GPIO_GPSTATUS2, GPIO_COMMAND_READ);
128 saa_clearb(SAA7134_GPIO_GPMODE3, SAA7134_GPIO_GPRESCAN);
129 saa_setb(SAA7134_GPIO_GPMODE3, SAA7134_GPIO_GPRESCAN);
130 *data = saa_readb(SAA7134_GPIO_GPSTATUS0);
131 saa_writeb(SAA7134_GPIO_GPSTATUS2, GPIO_COMMAND_IDLE);
132
133 /* Read high byte */
134 saa_writeb(SAA7134_GPIO_GPSTATUS2, GPIO_COMMAND_READ);
135 saa_clearb(SAA7134_GPIO_GPMODE3, SAA7134_GPIO_GPRESCAN);
136 saa_setb(SAA7134_GPIO_GPMODE3, SAA7134_GPIO_GPRESCAN);
137 *data |= saa_readb(SAA7134_GPIO_GPSTATUS0) << 8;
138 saa_writeb(SAA7134_GPIO_GPSTATUS2, GPIO_COMMAND_IDLE);
139
140 return 0;
141}
142
143static int saa7134_go7007_interface_reset(struct go7007 *go)
144{
145 struct saa7134_go7007 *saa = go->hpi_context;
146 struct saa7134_dev *dev = saa->dev;
147 u16 intr_val, intr_data;
148 int count = 20;
149
150 saa_clearb(SAA7134_TS_PARALLEL, 0x80); /* Disable TS interface */
151 saa_writeb(SAA7134_GPIO_GPMODE2, 0xa4);
152 saa_writeb(SAA7134_GPIO_GPMODE0, 0xff);
153
154 saa_writeb(SAA7134_GPIO_GPSTATUS2, GPIO_COMMAND_REQ1);
155 saa_writeb(SAA7134_GPIO_GPSTATUS2, GPIO_COMMAND_RESET);
156 msleep(1);
157 saa_writeb(SAA7134_GPIO_GPSTATUS2, GPIO_COMMAND_REQ1);
158 saa_writeb(SAA7134_GPIO_GPSTATUS2, GPIO_COMMAND_REQ2);
159 msleep(10);
160
161 saa_clearb(SAA7134_GPIO_GPMODE3, SAA7134_GPIO_GPRESCAN);
162 saa_setb(SAA7134_GPIO_GPMODE3, SAA7134_GPIO_GPRESCAN);
163
164 saa_readb(SAA7134_GPIO_GPSTATUS2);
165 /*pr_debug("status is %s\n", saa_readb(SAA7134_GPIO_GPSTATUS2) & 0x40 ? "OK" : "not OK"); */
166
167 /* enter command mode...(?) */
168 saa_writeb(SAA7134_GPIO_GPSTATUS2, GPIO_COMMAND_REQ1);
169 saa_writeb(SAA7134_GPIO_GPSTATUS2, GPIO_COMMAND_REQ2);
170
171 do {
172 saa_clearb(SAA7134_GPIO_GPMODE3, SAA7134_GPIO_GPRESCAN);
173 saa_setb(SAA7134_GPIO_GPMODE3, SAA7134_GPIO_GPRESCAN);
174 saa_readb(SAA7134_GPIO_GPSTATUS2);
175 /*pr_info("gpio is %08x\n", saa_readl(SAA7134_GPIO_GPSTATUS0 >> 2)); */
176 } while (--count > 0);
177
178 /* Wait for an interrupt to indicate successful hardware reset */
179 if (go7007_read_interrupt(go, &intr_val, &intr_data) < 0 ||
180 (intr_val & ~0x1) != 0x55aa) {
181 pr_err("saa7134-go7007: unable to reset the GO7007\n");
182 return -1;
183 }
184 return 0;
185}
186
187static int saa7134_go7007_write_interrupt(struct go7007 *go, int addr, int data)
188{
189 struct saa7134_go7007 *saa = go->hpi_context;
190 struct saa7134_dev *dev = saa->dev;
191 int i;
192 u16 status_reg;
193
194#ifdef GO7007_HPI_DEBUG
195 pr_debug("saa7134-go7007: WriteInterrupt: %04x %04x\n", addr, data);
196#endif
197
198 for (i = 0; i < 100; ++i) {
199 gpio_read(dev, HPI_ADDR_INTR_STATUS, &status_reg);
200 if (!(status_reg & 0x0010))
201 break;
202 msleep(10);
203 }
204 if (i == 100) {
205 pr_err("saa7134-go7007: device is hung, status reg = 0x%04x\n",
206 status_reg);
207 return -1;
208 }
209 gpio_write(dev, HPI_ADDR_INTR_WR_PARAM, data);
210 gpio_write(dev, HPI_ADDR_INTR_WR_INDEX, addr);
211
212 return 0;
213}
214
215static int saa7134_go7007_read_interrupt(struct go7007 *go)
216{
217 struct saa7134_go7007 *saa = go->hpi_context;
218 struct saa7134_dev *dev = saa->dev;
219
220 /* XXX we need to wait if there is no interrupt available */
221 go->interrupt_available = 1;
222 gpio_read(dev, HPI_ADDR_INTR_RET_VALUE, &go->interrupt_value);
223 gpio_read(dev, HPI_ADDR_INTR_RET_DATA, &go->interrupt_data);
224#ifdef GO7007_HPI_DEBUG
225 pr_debug("saa7134-go7007: ReadInterrupt: %04x %04x\n",
226 go->interrupt_value, go->interrupt_data);
227#endif
228 return 0;
229}
230
231static void saa7134_go7007_irq_ts_done(struct saa7134_dev *dev,
232 unsigned long status)
233{
234 struct go7007 *go = video_get_drvdata(dev->empress_dev);
235 struct saa7134_go7007 *saa = go->hpi_context;
236
237 if (!vb2_is_streaming(&go->vidq))
238 return;
239 if (0 != (status & 0x000f0000))
240 pr_debug("saa7134-go7007: irq: lost %ld\n",
241 (status >> 16) & 0x0f);
242 if (status & 0x100000) {
243 dma_sync_single_for_cpu(&dev->pci->dev,
244 saa->bottom_dma, PAGE_SIZE, DMA_FROM_DEVICE);
245 go7007_parse_video_stream(go, saa->bottom, PAGE_SIZE);
246 saa_writel(SAA7134_RS_BA2(5), saa->bottom_dma);
247 } else {
248 dma_sync_single_for_cpu(&dev->pci->dev,
249 saa->top_dma, PAGE_SIZE, DMA_FROM_DEVICE);
250 go7007_parse_video_stream(go, saa->top, PAGE_SIZE);
251 saa_writel(SAA7134_RS_BA1(5), saa->top_dma);
252 }
253}
254
255static int saa7134_go7007_stream_start(struct go7007 *go)
256{
257 struct saa7134_go7007 *saa = go->hpi_context;
258 struct saa7134_dev *dev = saa->dev;
259
260 saa->top_dma = dma_map_page(&dev->pci->dev, virt_to_page(saa->top),
261 0, PAGE_SIZE, DMA_FROM_DEVICE);
262 if (dma_mapping_error(&dev->pci->dev, saa->top_dma))
263 return -ENOMEM;
264 saa->bottom_dma = dma_map_page(&dev->pci->dev,
265 virt_to_page(saa->bottom),
266 0, PAGE_SIZE, DMA_FROM_DEVICE);
267 if (dma_mapping_error(&dev->pci->dev, saa->bottom_dma)) {
268 dma_unmap_page(&dev->pci->dev, saa->top_dma, PAGE_SIZE,
269 DMA_FROM_DEVICE);
270 return -ENOMEM;
271 }
272
273 saa_writel(SAA7134_VIDEO_PORT_CTRL0 >> 2, 0xA300B000);
274 saa_writel(SAA7134_VIDEO_PORT_CTRL4 >> 2, 0x40000200);
275
276 /* Set HPI interface for video */
277 saa_writeb(SAA7134_GPIO_GPMODE0, 0xff);
278 saa_writeb(SAA7134_GPIO_GPSTATUS0, HPI_ADDR_VIDEO_BUFFER);
279 saa_writeb(SAA7134_GPIO_GPSTATUS2, GPIO_COMMAND_ADDR);
280 saa_writeb(SAA7134_GPIO_GPMODE0, 0x00);
281
282 /* Enable TS interface */
283 saa_writeb(SAA7134_TS_PARALLEL, 0xe6);
284
285 /* Reset TS interface */
286 saa_setb(SAA7134_TS_SERIAL1, 0x01);
287 saa_clearb(SAA7134_TS_SERIAL1, 0x01);
288
289 /* Set up transfer block size */
290 saa_writeb(SAA7134_TS_PARALLEL_SERIAL, 128 - 1);
291 saa_writeb(SAA7134_TS_DMA0, (PAGE_SIZE >> 7) - 1);
292 saa_writeb(SAA7134_TS_DMA1, 0);
293 saa_writeb(SAA7134_TS_DMA2, 0);
294
295 /* Enable video streaming mode */
296 saa_writeb(SAA7134_GPIO_GPSTATUS2, GPIO_COMMAND_VIDEO);
297
298 saa_writel(SAA7134_RS_BA1(5), saa->top_dma);
299 saa_writel(SAA7134_RS_BA2(5), saa->bottom_dma);
300 saa_writel(SAA7134_RS_PITCH(5), 128);
301 saa_writel(SAA7134_RS_CONTROL(5), SAA7134_RS_CONTROL_BURST_MAX);
302
303 /* Enable TS FIFO */
304 saa_setl(SAA7134_MAIN_CTRL, SAA7134_MAIN_CTRL_TE5);
305
306 /* Enable DMA IRQ */
307 saa_setl(SAA7134_IRQ1,
308 SAA7134_IRQ1_INTE_RA2_1 | SAA7134_IRQ1_INTE_RA2_0);
309
310 return 0;
311}
312
313static int saa7134_go7007_stream_stop(struct go7007 *go)
314{
315 struct saa7134_go7007 *saa = go->hpi_context;
316 struct saa7134_dev *dev;
317
318 if (!saa)
319 return -EINVAL;
320 dev = saa->dev;
321 if (!dev)
322 return -EINVAL;
323
324 /* Shut down TS FIFO */
325 saa_clearl(SAA7134_MAIN_CTRL, SAA7134_MAIN_CTRL_TE5);
326
327 /* Disable DMA IRQ */
328 saa_clearl(SAA7134_IRQ1,
329 SAA7134_IRQ1_INTE_RA2_1 | SAA7134_IRQ1_INTE_RA2_0);
330
331 /* Disable TS interface */
332 saa_clearb(SAA7134_TS_PARALLEL, 0x80);
333
334 dma_unmap_page(&dev->pci->dev, saa->top_dma, PAGE_SIZE,
335 DMA_FROM_DEVICE);
336 dma_unmap_page(&dev->pci->dev, saa->bottom_dma, PAGE_SIZE,
337 DMA_FROM_DEVICE);
338
339 return 0;
340}
341
342static int saa7134_go7007_send_firmware(struct go7007 *go, u8 *data, int len)
343{
344 struct saa7134_go7007 *saa = go->hpi_context;
345 struct saa7134_dev *dev = saa->dev;
346 u16 status_reg;
347 int i;
348
349#ifdef GO7007_HPI_DEBUG
350 pr_debug("saa7134-go7007: DownloadBuffer sending %d bytes\n", len);
351#endif
352
353 while (len > 0) {
354 i = len > 64 ? 64 : len;
355 saa_writeb(SAA7134_GPIO_GPMODE0, 0xff);
356 saa_writeb(SAA7134_GPIO_GPSTATUS0, HPI_ADDR_INIT_BUFFER);
357 saa_writeb(SAA7134_GPIO_GPSTATUS2, GPIO_COMMAND_ADDR);
358 saa_writeb(SAA7134_GPIO_GPSTATUS2, GPIO_COMMAND_IDLE);
359 while (i-- > 0) {
360 saa_writeb(SAA7134_GPIO_GPSTATUS0, *data);
361 saa_writeb(SAA7134_GPIO_GPSTATUS2, GPIO_COMMAND_WRITE);
362 saa_writeb(SAA7134_GPIO_GPSTATUS2, GPIO_COMMAND_IDLE);
363 ++data;
364 --len;
365 }
366 for (i = 0; i < 100; ++i) {
367 gpio_read(dev, HPI_ADDR_INTR_STATUS, &status_reg);
368 if (!(status_reg & 0x0002))
369 break;
370 }
371 if (i == 100) {
372 pr_err("saa7134-go7007: device is hung, status reg = 0x%04x\n",
373 status_reg);
374 return -1;
375 }
376 }
377 return 0;
378}
379
380static struct go7007_hpi_ops saa7134_go7007_hpi_ops = {
381 .interface_reset = saa7134_go7007_interface_reset,
382 .write_interrupt = saa7134_go7007_write_interrupt,
383 .read_interrupt = saa7134_go7007_read_interrupt,
384 .stream_start = saa7134_go7007_stream_start,
385 .stream_stop = saa7134_go7007_stream_stop,
386 .send_firmware = saa7134_go7007_send_firmware,
387};
388MODULE_FIRMWARE("go7007/go7007tv.bin");
389
390/* --------------------------------------------------------------------------*/
391
392static int saa7134_go7007_s_std(struct v4l2_subdev *sd, v4l2_std_id norm)
393{
394#if 0
395 struct saa7134_go7007 *saa = to_state(sd);
396 struct saa7134_dev *dev = saa->dev;
397
398 return saa7134_s_std_internal(dev, NULL, norm);
399#else
400 return 0;
401#endif
402}
403
404static const struct v4l2_subdev_video_ops saa7134_go7007_video_ops = {
405 .s_std = saa7134_go7007_s_std,
406};
407
408static const struct v4l2_subdev_ops saa7134_go7007_sd_ops = {
409 .video = &saa7134_go7007_video_ops,
410};
411
412/* --------------------------------------------------------------------------*/
413
414
415/********************* Add/remove functions *********************/
416
417static int saa7134_go7007_init(struct saa7134_dev *dev)
418{
419 struct go7007 *go;
420 struct saa7134_go7007 *saa;
421 struct v4l2_subdev *sd;
422
423 pr_debug("saa7134-go7007: probing new SAA713X board\n");
424
425 go = go7007_alloc(&board_voyager, &dev->pci->dev);
426 if (go == NULL)
427 return -ENOMEM;
428
429 saa = kzalloc(sizeof(struct saa7134_go7007), GFP_KERNEL);
430 if (saa == NULL) {
431 kfree(go);
432 return -ENOMEM;
433 }
434
435 go->board_id = GO7007_BOARDID_PCI_VOYAGER;
436 snprintf(go->bus_info, sizeof(go->bus_info), "PCI:%s", pci_name(dev->pci));
437 strlcpy(go->name, saa7134_boards[dev->board].name, sizeof(go->name));
438 go->hpi_ops = &saa7134_go7007_hpi_ops;
439 go->hpi_context = saa;
440 saa->dev = dev;
441
442 /* Init the subdevice interface */
443 sd = &saa->sd;
444 v4l2_subdev_init(sd, &saa7134_go7007_sd_ops);
445 v4l2_set_subdevdata(sd, saa);
446 strncpy(sd->name, "saa7134-go7007", sizeof(sd->name));
447
448 /* Allocate a couple pages for receiving the compressed stream */
449 saa->top = (u8 *)get_zeroed_page(GFP_KERNEL);
450 if (!saa->top)
451 goto allocfail;
452 saa->bottom = (u8 *)get_zeroed_page(GFP_KERNEL);
453 if (!saa->bottom)
454 goto allocfail;
455
456 /* Boot the GO7007 */
457 if (go7007_boot_encoder(go, go->board_info->flags &
458 GO7007_BOARD_USE_ONBOARD_I2C) < 0)
459 goto allocfail;
460
461 /* Do any final GO7007 initialization, then register the
462 * V4L2 and ALSA interfaces */
463 if (go7007_register_encoder(go, go->board_info->num_i2c_devs) < 0)
464 goto allocfail;
465
466 /* Register the subdevice interface with the go7007 device */
467 if (v4l2_device_register_subdev(&go->v4l2_dev, sd) < 0)
468 pr_info("saa7134-go7007: register subdev failed\n");
469
470 dev->empress_dev = &go->vdev;
471
472 go->status = STATUS_ONLINE;
473 return 0;
474
475allocfail:
476 if (saa->top)
477 free_page((unsigned long)saa->top);
478 if (saa->bottom)
479 free_page((unsigned long)saa->bottom);
480 kfree(saa);
481 kfree(go);
482 return -ENOMEM;
483}
484
485static int saa7134_go7007_fini(struct saa7134_dev *dev)
486{
487 struct go7007 *go;
488 struct saa7134_go7007 *saa;
489
490 if (NULL == dev->empress_dev)
491 return 0;
492
493 go = video_get_drvdata(dev->empress_dev);
494 if (go->audio_enabled)
495 go7007_snd_remove(go);
496
497 saa = go->hpi_context;
498 go->status = STATUS_SHUTDOWN;
499 free_page((unsigned long)saa->top);
500 free_page((unsigned long)saa->bottom);
501 v4l2_device_unregister_subdev(&saa->sd);
502 kfree(saa);
503 video_unregister_device(&go->vdev);
504
505 v4l2_device_put(&go->v4l2_dev);
506 dev->empress_dev = NULL;
507
508 return 0;
509}
510
511static struct saa7134_mpeg_ops saa7134_go7007_ops = {
512 .type = SAA7134_MPEG_GO7007,
513 .init = saa7134_go7007_init,
514 .fini = saa7134_go7007_fini,
515 .irq_ts_done = saa7134_go7007_irq_ts_done,
516};
517
518static int __init saa7134_go7007_mod_init(void)
519{
520 return saa7134_ts_register(&saa7134_go7007_ops);
521}
522
523static void __exit saa7134_go7007_mod_cleanup(void)
524{
525 saa7134_ts_unregister(&saa7134_go7007_ops);
526}
527
528module_init(saa7134_go7007_mod_init);
529module_exit(saa7134_go7007_mod_cleanup);
530
531MODULE_LICENSE("GPL v2");
diff --git a/drivers/media/pci/saa7134/saa7134-vbi.c b/drivers/media/pci/saa7134/saa7134-vbi.c
index c06dbe17a87f..4f0b1012e4f3 100644
--- a/drivers/media/pci/saa7134/saa7134-vbi.c
+++ b/drivers/media/pci/saa7134/saa7134-vbi.c
@@ -43,7 +43,7 @@ MODULE_PARM_DESC(vbibufs,"number of vbi buffers, range 2-32");
43 43
44/* ------------------------------------------------------------------ */ 44/* ------------------------------------------------------------------ */
45 45
46#define VBI_LINE_COUNT 16 46#define VBI_LINE_COUNT 17
47#define VBI_LINE_LENGTH 2048 47#define VBI_LINE_LENGTH 2048
48#define VBI_SCALE 0x200 48#define VBI_SCALE 0x200
49 49
diff --git a/drivers/media/pci/saa7134/saa7134-video.c b/drivers/media/pci/saa7134/saa7134-video.c
index 0cfa2ca6a32a..fc4a427cb51f 100644
--- a/drivers/media/pci/saa7134/saa7134-video.c
+++ b/drivers/media/pci/saa7134/saa7134-video.c
@@ -201,7 +201,7 @@ static struct saa7134_format formats[] = {
201 .video_v_start = 24, \ 201 .video_v_start = 24, \
202 .video_v_stop = 311, \ 202 .video_v_stop = 311, \
203 .vbi_v_start_0 = 7, \ 203 .vbi_v_start_0 = 7, \
204 .vbi_v_stop_0 = 22, \ 204 .vbi_v_stop_0 = 23, \
205 .vbi_v_start_1 = 319, \ 205 .vbi_v_start_1 = 319, \
206 .src_timing = 4 206 .src_timing = 4
207 207
diff --git a/drivers/media/pci/saa7134/saa7134.h b/drivers/media/pci/saa7134/saa7134.h
index e47edd4b57ce..1a82dd07205b 100644
--- a/drivers/media/pci/saa7134/saa7134.h
+++ b/drivers/media/pci/saa7134/saa7134.h
@@ -338,6 +338,7 @@ struct saa7134_card_ir {
338#define SAA7134_BOARD_ASUSTeK_PS3_100 190 338#define SAA7134_BOARD_ASUSTeK_PS3_100 190
339#define SAA7134_BOARD_HAWELL_HW_9004V1 191 339#define SAA7134_BOARD_HAWELL_HW_9004V1 191
340#define SAA7134_BOARD_AVERMEDIA_A706 192 340#define SAA7134_BOARD_AVERMEDIA_A706 192
341#define SAA7134_BOARD_WIS_VOYAGER 193
341 342
342#define SAA7134_MAXBOARDS 32 343#define SAA7134_MAXBOARDS 32
343#define SAA7134_INPUT_MAX 8 344#define SAA7134_INPUT_MAX 8
@@ -368,6 +369,7 @@ enum saa7134_mpeg_type {
368 SAA7134_MPEG_UNUSED, 369 SAA7134_MPEG_UNUSED,
369 SAA7134_MPEG_EMPRESS, 370 SAA7134_MPEG_EMPRESS,
370 SAA7134_MPEG_DVB, 371 SAA7134_MPEG_DVB,
372 SAA7134_MPEG_GO7007,
371}; 373};
372 374
373enum saa7134_mpeg_ts_type { 375enum saa7134_mpeg_ts_type {
@@ -407,6 +409,7 @@ struct saa7134_board {
407#define card_has_radio(dev) (NULL != saa7134_boards[dev->board].radio.name) 409#define card_has_radio(dev) (NULL != saa7134_boards[dev->board].radio.name)
408#define card_is_empress(dev) (SAA7134_MPEG_EMPRESS == saa7134_boards[dev->board].mpeg) 410#define card_is_empress(dev) (SAA7134_MPEG_EMPRESS == saa7134_boards[dev->board].mpeg)
409#define card_is_dvb(dev) (SAA7134_MPEG_DVB == saa7134_boards[dev->board].mpeg) 411#define card_is_dvb(dev) (SAA7134_MPEG_DVB == saa7134_boards[dev->board].mpeg)
412#define card_is_go7007(dev) (SAA7134_MPEG_GO7007 == saa7134_boards[dev->board].mpeg)
410#define card_has_mpeg(dev) (SAA7134_MPEG_UNUSED != saa7134_boards[dev->board].mpeg) 413#define card_has_mpeg(dev) (SAA7134_MPEG_UNUSED != saa7134_boards[dev->board].mpeg)
411#define card(dev) (saa7134_boards[dev->board]) 414#define card(dev) (saa7134_boards[dev->board])
412#define card_in(dev,n) (saa7134_boards[dev->board].inputs[n]) 415#define card_in(dev,n) (saa7134_boards[dev->board].inputs[n])
@@ -522,6 +525,8 @@ struct saa7134_mpeg_ops {
522 int (*init)(struct saa7134_dev *dev); 525 int (*init)(struct saa7134_dev *dev);
523 int (*fini)(struct saa7134_dev *dev); 526 int (*fini)(struct saa7134_dev *dev);
524 void (*signal_change)(struct saa7134_dev *dev); 527 void (*signal_change)(struct saa7134_dev *dev);
528 void (*irq_ts_done)(struct saa7134_dev *dev,
529 unsigned long status);
525}; 530};
526 531
527/* global device status */ 532/* global device status */
diff --git a/drivers/media/pci/saa7164/saa7164-api.c b/drivers/media/pci/saa7164/saa7164-api.c
index e042963d377d..4f3b1dd18ba4 100644
--- a/drivers/media/pci/saa7164/saa7164-api.c
+++ b/drivers/media/pci/saa7164/saa7164-api.c
@@ -680,7 +680,6 @@ static int saa7164_api_set_dif(struct saa7164_port *port, u8 reg, u8 val)
680int saa7164_api_configure_dif(struct saa7164_port *port, u32 std) 680int saa7164_api_configure_dif(struct saa7164_port *port, u32 std)
681{ 681{
682 struct saa7164_dev *dev = port->dev; 682 struct saa7164_dev *dev = port->dev;
683 int ret = 0;
684 u8 agc_disable; 683 u8 agc_disable;
685 684
686 dprintk(DBGLVL_API, "%s(nr=%d, 0x%x)\n", __func__, port->nr, std); 685 dprintk(DBGLVL_API, "%s(nr=%d, 0x%x)\n", __func__, port->nr, std);
@@ -733,7 +732,7 @@ int saa7164_api_configure_dif(struct saa7164_port *port, u32 std)
733 saa7164_api_set_dif(port, 0x04, 0x00); /* Active (again) */ 732 saa7164_api_set_dif(port, 0x04, 0x00); /* Active (again) */
734 msleep(100); 733 msleep(100);
735 734
736 return ret; 735 return 0;
737} 736}
738 737
739/* Ensure the dif is in the correct state for the operating mode 738/* Ensure the dif is in the correct state for the operating mode
diff --git a/drivers/media/pci/saa7164/saa7164-core.c b/drivers/media/pci/saa7164/saa7164-core.c
index 1bf06970ca3e..cc1be8a7a451 100644
--- a/drivers/media/pci/saa7164/saa7164-core.c
+++ b/drivers/media/pci/saa7164/saa7164-core.c
@@ -52,7 +52,7 @@ unsigned int saa_debug;
52module_param_named(debug, saa_debug, int, 0644); 52module_param_named(debug, saa_debug, int, 0644);
53MODULE_PARM_DESC(debug, "enable debug messages"); 53MODULE_PARM_DESC(debug, "enable debug messages");
54 54
55unsigned int fw_debug; 55static unsigned int fw_debug;
56module_param(fw_debug, int, 0644); 56module_param(fw_debug, int, 0644);
57MODULE_PARM_DESC(fw_debug, "Firmware debug level def:2"); 57MODULE_PARM_DESC(fw_debug, "Firmware debug level def:2");
58 58
@@ -72,7 +72,7 @@ static unsigned int card[] = {[0 ... (SAA7164_MAXBOARDS - 1)] = UNSET };
72module_param_array(card, int, NULL, 0444); 72module_param_array(card, int, NULL, 0444);
73MODULE_PARM_DESC(card, "card type"); 73MODULE_PARM_DESC(card, "card type");
74 74
75unsigned int print_histogram = 64; 75static unsigned int print_histogram = 64;
76module_param(print_histogram, int, 0644); 76module_param(print_histogram, int, 0644);
77MODULE_PARM_DESC(print_histogram, "print histogram values once"); 77MODULE_PARM_DESC(print_histogram, "print histogram values once");
78 78
@@ -80,7 +80,7 @@ unsigned int crc_checking = 1;
80module_param(crc_checking, int, 0644); 80module_param(crc_checking, int, 0644);
81MODULE_PARM_DESC(crc_checking, "enable crc sanity checking on buffers"); 81MODULE_PARM_DESC(crc_checking, "enable crc sanity checking on buffers");
82 82
83unsigned int guard_checking = 1; 83static unsigned int guard_checking = 1;
84module_param(guard_checking, int, 0644); 84module_param(guard_checking, int, 0644);
85MODULE_PARM_DESC(guard_checking, 85MODULE_PARM_DESC(guard_checking,
86 "enable dma sanity checking for buffer overruns"); 86 "enable dma sanity checking for buffer overruns");
diff --git a/drivers/media/pci/solo6x10/Kconfig b/drivers/media/pci/solo6x10/Kconfig
index d9e06a6bf1eb..0fb91dc7ca73 100644
--- a/drivers/media/pci/solo6x10/Kconfig
+++ b/drivers/media/pci/solo6x10/Kconfig
@@ -1,6 +1,7 @@
1config VIDEO_SOLO6X10 1config VIDEO_SOLO6X10
2 tristate "Bluecherry / Softlogic 6x10 capture cards (MPEG-4/H.264)" 2 tristate "Bluecherry / Softlogic 6x10 capture cards (MPEG-4/H.264)"
3 depends on PCI && VIDEO_DEV && SND && I2C 3 depends on PCI && VIDEO_DEV && SND && I2C
4 depends on HAS_DMA
4 select BITREVERSE 5 select BITREVERSE
5 select FONT_SUPPORT 6 select FONT_SUPPORT
6 select FONT_8x16 7 select FONT_8x16
diff --git a/drivers/media/pci/solo6x10/solo6x10-disp.c b/drivers/media/pci/solo6x10/solo6x10-disp.c
index 5ea9cac03968..11c98f0625e4 100644
--- a/drivers/media/pci/solo6x10/solo6x10-disp.c
+++ b/drivers/media/pci/solo6x10/solo6x10-disp.c
@@ -172,7 +172,7 @@ static void solo_vout_config(struct solo_dev *solo_dev)
172static int solo_dma_vin_region(struct solo_dev *solo_dev, u32 off, 172static int solo_dma_vin_region(struct solo_dev *solo_dev, u32 off,
173 u16 val, int reg_size) 173 u16 val, int reg_size)
174{ 174{
175 u16 *buf; 175 __le16 *buf;
176 const int n = 64, size = n * sizeof(*buf); 176 const int n = 64, size = n * sizeof(*buf);
177 int i, ret = 0; 177 int i, ret = 0;
178 178
@@ -211,7 +211,7 @@ int solo_set_motion_block(struct solo_dev *solo_dev, u8 ch,
211{ 211{
212 const unsigned size = sizeof(u16) * 64; 212 const unsigned size = sizeof(u16) * 64;
213 u32 off = SOLO_MOT_FLAG_AREA + ch * SOLO_MOT_THRESH_SIZE * 2; 213 u32 off = SOLO_MOT_FLAG_AREA + ch * SOLO_MOT_THRESH_SIZE * 2;
214 u16 *buf; 214 __le16 *buf;
215 int x, y; 215 int x, y;
216 int ret = 0; 216 int ret = 0;
217 217
diff --git a/drivers/media/pci/solo6x10/solo6x10-eeprom.c b/drivers/media/pci/solo6x10/solo6x10-eeprom.c
index af40b3aba410..da25ce4a6952 100644
--- a/drivers/media/pci/solo6x10/solo6x10-eeprom.c
+++ b/drivers/media/pci/solo6x10/solo6x10-eeprom.c
@@ -100,7 +100,7 @@ unsigned int solo_eeprom_ewen(struct solo_dev *solo_dev, int w_en)
100 return retval; 100 return retval;
101} 101}
102 102
103unsigned short solo_eeprom_read(struct solo_dev *solo_dev, int loc) 103__be16 solo_eeprom_read(struct solo_dev *solo_dev, int loc)
104{ 104{
105 int read_cmd = loc | (EE_READ_CMD << ADDR_LEN); 105 int read_cmd = loc | (EE_READ_CMD << ADDR_LEN);
106 unsigned short retval = 0; 106 unsigned short retval = 0;
@@ -117,11 +117,11 @@ unsigned short solo_eeprom_read(struct solo_dev *solo_dev, int loc)
117 117
118 solo_eeprom_reg_write(solo_dev, ~EE_CS); 118 solo_eeprom_reg_write(solo_dev, ~EE_CS);
119 119
120 return retval; 120 return (__force __be16)retval;
121} 121}
122 122
123int solo_eeprom_write(struct solo_dev *solo_dev, int loc, 123int solo_eeprom_write(struct solo_dev *solo_dev, int loc,
124 unsigned short data) 124 __be16 data)
125{ 125{
126 int write_cmd = loc | (EE_WRITE_CMD << ADDR_LEN); 126 int write_cmd = loc | (EE_WRITE_CMD << ADDR_LEN);
127 unsigned int retval; 127 unsigned int retval;
@@ -130,7 +130,7 @@ int solo_eeprom_write(struct solo_dev *solo_dev, int loc,
130 solo_eeprom_cmd(solo_dev, write_cmd); 130 solo_eeprom_cmd(solo_dev, write_cmd);
131 131
132 for (i = 15; i >= 0; i--) { 132 for (i = 15; i >= 0; i--) {
133 unsigned int dataval = (data >> i) & 1; 133 unsigned int dataval = ((__force unsigned)data >> i) & 1;
134 134
135 solo_eeprom_reg_write(solo_dev, EE_ENB); 135 solo_eeprom_reg_write(solo_dev, EE_ENB);
136 solo_eeprom_reg_write(solo_dev, 136 solo_eeprom_reg_write(solo_dev,
diff --git a/drivers/media/pci/solo6x10/solo6x10.h b/drivers/media/pci/solo6x10/solo6x10.h
index c6154b00fcbd..72017b7f0a75 100644
--- a/drivers/media/pci/solo6x10/solo6x10.h
+++ b/drivers/media/pci/solo6x10/solo6x10.h
@@ -394,9 +394,9 @@ int solo_osd_print(struct solo_enc_dev *solo_enc);
394 394
395/* EEPROM commands */ 395/* EEPROM commands */
396unsigned int solo_eeprom_ewen(struct solo_dev *solo_dev, int w_en); 396unsigned int solo_eeprom_ewen(struct solo_dev *solo_dev, int w_en);
397unsigned short solo_eeprom_read(struct solo_dev *solo_dev, int loc); 397__be16 solo_eeprom_read(struct solo_dev *solo_dev, int loc);
398int solo_eeprom_write(struct solo_dev *solo_dev, int loc, 398int solo_eeprom_write(struct solo_dev *solo_dev, int loc,
399 unsigned short data); 399 __be16 data);
400 400
401/* JPEG Qp functions */ 401/* JPEG Qp functions */
402void solo_s_jpeg_qp(struct solo_dev *solo_dev, unsigned int ch, 402void solo_s_jpeg_qp(struct solo_dev *solo_dev, unsigned int ch,
diff --git a/drivers/media/pci/sta2x11/Kconfig b/drivers/media/pci/sta2x11/Kconfig
index 03130157db83..f6f30abc088b 100644
--- a/drivers/media/pci/sta2x11/Kconfig
+++ b/drivers/media/pci/sta2x11/Kconfig
@@ -1,6 +1,7 @@
1config STA2X11_VIP 1config STA2X11_VIP
2 tristate "STA2X11 VIP Video For Linux" 2 tristate "STA2X11 VIP Video For Linux"
3 depends on STA2X11 3 depends on STA2X11
4 depends on HAS_DMA
4 select VIDEO_ADV7180 if MEDIA_SUBDRV_AUTOSELECT 5 select VIDEO_ADV7180 if MEDIA_SUBDRV_AUTOSELECT
5 select VIDEOBUF2_DMA_CONTIG 6 select VIDEOBUF2_DMA_CONTIG
6 depends on PCI && VIDEO_V4L2 && VIRT_TO_BUS 7 depends on PCI && VIDEO_V4L2 && VIRT_TO_BUS
diff --git a/drivers/media/pci/sta2x11/sta2x11_vip.c b/drivers/media/pci/sta2x11/sta2x11_vip.c
index 365bd21301ba..22450f583da1 100644
--- a/drivers/media/pci/sta2x11/sta2x11_vip.c
+++ b/drivers/media/pci/sta2x11/sta2x11_vip.c
@@ -152,7 +152,7 @@ struct sta2x11_vip {
152 int tcount, bcount; 152 int tcount, bcount;
153 int overflow; 153 int overflow;
154 154
155 void *iomem; /* I/O Memory */ 155 void __iomem *iomem; /* I/O Memory */
156 struct vip_config *config; 156 struct vip_config *config;
157}; 157};
158 158
diff --git a/drivers/media/pci/ttpci/Kconfig b/drivers/media/pci/ttpci/Kconfig
index 0dcb8cd77676..7b83151ed6c4 100644
--- a/drivers/media/pci/ttpci/Kconfig
+++ b/drivers/media/pci/ttpci/Kconfig
@@ -1,8 +1,12 @@
1config DVB_AV7110_IR
2 bool
3
1config DVB_AV7110 4config DVB_AV7110
2 tristate "AV7110 cards" 5 tristate "AV7110 cards"
3 depends on DVB_CORE && PCI && I2C 6 depends on DVB_CORE && PCI && I2C
4 select TTPCI_EEPROM 7 select TTPCI_EEPROM
5 select VIDEO_SAA7146_VV 8 select VIDEO_SAA7146_VV
9 select DVB_AV7110_IR if INPUT_EVDEV=y || INPUT_EVDEV=DVB_AV7110
6 depends on VIDEO_DEV # dependencies of VIDEO_SAA7146_VV 10 depends on VIDEO_DEV # dependencies of VIDEO_SAA7146_VV
7 select DVB_VES1820 if MEDIA_SUBDRV_AUTOSELECT 11 select DVB_VES1820 if MEDIA_SUBDRV_AUTOSELECT
8 select DVB_VES1X93 if MEDIA_SUBDRV_AUTOSELECT 12 select DVB_VES1X93 if MEDIA_SUBDRV_AUTOSELECT
diff --git a/drivers/media/pci/ttpci/Makefile b/drivers/media/pci/ttpci/Makefile
index 98905963ff08..49f71b1eaf14 100644
--- a/drivers/media/pci/ttpci/Makefile
+++ b/drivers/media/pci/ttpci/Makefile
@@ -5,7 +5,7 @@
5 5
6dvb-ttpci-objs := av7110_hw.o av7110_v4l.o av7110_av.o av7110_ca.o av7110.o av7110_ipack.o 6dvb-ttpci-objs := av7110_hw.o av7110_v4l.o av7110_av.o av7110_ca.o av7110.o av7110_ipack.o
7 7
8ifdef CONFIG_INPUT_EVDEV 8ifdef CONFIG_DVB_AV7110_IR
9dvb-ttpci-objs += av7110_ir.o 9dvb-ttpci-objs += av7110_ir.o
10endif 10endif
11 11
diff --git a/drivers/media/pci/ttpci/av7110.c b/drivers/media/pci/ttpci/av7110.c
index f38329d29daa..c1f0617a6973 100644
--- a/drivers/media/pci/ttpci/av7110.c
+++ b/drivers/media/pci/ttpci/av7110.c
@@ -235,7 +235,7 @@ static void recover_arm(struct av7110 *av7110)
235 235
236 restart_feeds(av7110); 236 restart_feeds(av7110);
237 237
238#if IS_ENABLED(CONFIG_INPUT_EVDEV) 238#if IS_ENABLED(CONFIG_DVB_AV7110_IR)
239 av7110_check_ir_config(av7110, true); 239 av7110_check_ir_config(av7110, true);
240#endif 240#endif
241} 241}
@@ -268,7 +268,7 @@ static int arm_thread(void *data)
268 if (!av7110->arm_ready) 268 if (!av7110->arm_ready)
269 continue; 269 continue;
270 270
271#if IS_ENABLED(CONFIG_INPUT_EVDEV) 271#if IS_ENABLED(CONFIG_DVB_AV7110_IR)
272 av7110_check_ir_config(av7110, false); 272 av7110_check_ir_config(av7110, false);
273#endif 273#endif
274 274
@@ -2725,7 +2725,7 @@ static int av7110_attach(struct saa7146_dev* dev,
2725 2725
2726 mutex_init(&av7110->ioctl_mutex); 2726 mutex_init(&av7110->ioctl_mutex);
2727 2727
2728#if IS_ENABLED(CONFIG_INPUT_EVDEV) 2728#if IS_ENABLED(CONFIG_DVB_AV7110_IR)
2729 av7110_ir_init(av7110); 2729 av7110_ir_init(av7110);
2730#endif 2730#endif
2731 printk(KERN_INFO "dvb-ttpci: found av7110-%d.\n", av7110_num); 2731 printk(KERN_INFO "dvb-ttpci: found av7110-%d.\n", av7110_num);
@@ -2768,7 +2768,7 @@ static int av7110_detach(struct saa7146_dev* saa)
2768 struct av7110 *av7110 = saa->ext_priv; 2768 struct av7110 *av7110 = saa->ext_priv;
2769 dprintk(4, "%p\n", av7110); 2769 dprintk(4, "%p\n", av7110);
2770 2770
2771#if IS_ENABLED(CONFIG_INPUT_EVDEV) 2771#if IS_ENABLED(CONFIG_DVB_AV7110_IR)
2772 av7110_ir_exit(av7110); 2772 av7110_ir_exit(av7110);
2773#endif 2773#endif
2774 if (budgetpatch || av7110->full_ts) { 2774 if (budgetpatch || av7110->full_ts) {
diff --git a/drivers/media/pci/tw68/Kconfig b/drivers/media/pci/tw68/Kconfig
new file mode 100644
index 000000000000..5425ba1e320d
--- /dev/null
+++ b/drivers/media/pci/tw68/Kconfig
@@ -0,0 +1,10 @@
1config VIDEO_TW68
2 tristate "Techwell tw68x Video For Linux"
3 depends on VIDEO_DEV && PCI && VIDEO_V4L2
4 select I2C_ALGOBIT
5 select VIDEOBUF2_DMA_SG
6 ---help---
7 Support for Techwell tw68xx based frame grabber boards.
8
9 To compile this driver as a module, choose M here: the
10 module will be called tw68.
diff --git a/drivers/media/pci/tw68/Makefile b/drivers/media/pci/tw68/Makefile
new file mode 100644
index 000000000000..3d02f28b14fb
--- /dev/null
+++ b/drivers/media/pci/tw68/Makefile
@@ -0,0 +1,3 @@
1tw68-objs := tw68-core.o tw68-video.o tw68-risc.o
2
3obj-$(CONFIG_VIDEO_TW68) += tw68.o
diff --git a/drivers/media/pci/tw68/tw68-core.c b/drivers/media/pci/tw68/tw68-core.c
new file mode 100644
index 000000000000..a6fb48cf7aae
--- /dev/null
+++ b/drivers/media/pci/tw68/tw68-core.c
@@ -0,0 +1,434 @@
1/*
2 * tw68-core.c
3 * Core functions for the Techwell 68xx driver
4 *
5 * Much of this code is derived from the cx88 and sa7134 drivers, which
6 * were in turn derived from the bt87x driver. The original work was by
7 * Gerd Knorr; more recently the code was enhanced by Mauro Carvalho Chehab,
8 * Hans Verkuil, Andy Walls and many others. Their work is gratefully
9 * acknowledged. Full credit goes to them - any problems within this code
10 * are mine.
11 *
12 * Copyright (C) 2009 William M. Brack
13 *
14 * Refactored and updated to the latest v4l core frameworks:
15 *
16 * Copyright (C) 2014 Hans Verkuil <hverkuil@xs4all.nl>
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 */
28
29#include <linux/init.h>
30#include <linux/list.h>
31#include <linux/module.h>
32#include <linux/kernel.h>
33#include <linux/slab.h>
34#include <linux/kmod.h>
35#include <linux/sound.h>
36#include <linux/interrupt.h>
37#include <linux/delay.h>
38#include <linux/mutex.h>
39#include <linux/dma-mapping.h>
40#include <linux/pm.h>
41
42#include <media/v4l2-dev.h>
43#include "tw68.h"
44#include "tw68-reg.h"
45
46MODULE_DESCRIPTION("v4l2 driver module for tw6800 based video capture cards");
47MODULE_AUTHOR("William M. Brack");
48MODULE_AUTHOR("Hans Verkuil <hverkuil@xs4all.nl>");
49MODULE_LICENSE("GPL");
50
51static unsigned int latency = UNSET;
52module_param(latency, int, 0444);
53MODULE_PARM_DESC(latency, "pci latency timer");
54
55static unsigned int video_nr[] = {[0 ... (TW68_MAXBOARDS - 1)] = UNSET };
56module_param_array(video_nr, int, NULL, 0444);
57MODULE_PARM_DESC(video_nr, "video device number");
58
59static unsigned int card[] = {[0 ... (TW68_MAXBOARDS - 1)] = UNSET };
60module_param_array(card, int, NULL, 0444);
61MODULE_PARM_DESC(card, "card type");
62
63static atomic_t tw68_instance = ATOMIC_INIT(0);
64
65/* ------------------------------------------------------------------ */
66
67/*
68 * Please add any new PCI IDs to: http://pci-ids.ucw.cz. This keeps
69 * the PCI ID database up to date. Note that the entries must be
70 * added under vendor 0x1797 (Techwell Inc.) as subsystem IDs.
71 */
72static const struct pci_device_id tw68_pci_tbl[] = {
73 {PCI_DEVICE(PCI_VENDOR_ID_TECHWELL, PCI_DEVICE_ID_6800)},
74 {PCI_DEVICE(PCI_VENDOR_ID_TECHWELL, PCI_DEVICE_ID_6801)},
75 {PCI_DEVICE(PCI_VENDOR_ID_TECHWELL, PCI_DEVICE_ID_6804)},
76 {PCI_DEVICE(PCI_VENDOR_ID_TECHWELL, PCI_DEVICE_ID_6816_1)},
77 {PCI_DEVICE(PCI_VENDOR_ID_TECHWELL, PCI_DEVICE_ID_6816_2)},
78 {PCI_DEVICE(PCI_VENDOR_ID_TECHWELL, PCI_DEVICE_ID_6816_3)},
79 {PCI_DEVICE(PCI_VENDOR_ID_TECHWELL, PCI_DEVICE_ID_6816_4)},
80 {0,}
81};
82
83/* ------------------------------------------------------------------ */
84
85
86/*
87 * The device is given a "soft reset". According to the specifications,
88 * after this "all register content remain unchanged", so we also write
89 * to all specified registers manually as well (mostly to manufacturer's
90 * specified reset values)
91 */
92static int tw68_hw_init1(struct tw68_dev *dev)
93{
94 /* Assure all interrupts are disabled */
95 tw_writel(TW68_INTMASK, 0); /* 020 */
96 /* Clear any pending interrupts */
97 tw_writel(TW68_INTSTAT, 0xffffffff); /* 01C */
98 /* Stop risc processor, set default buffer level */
99 tw_writel(TW68_DMAC, 0x1600);
100
101 tw_writeb(TW68_ACNTL, 0x80); /* 218 soft reset */
102 msleep(100);
103
104 tw_writeb(TW68_INFORM, 0x40); /* 208 mux0, 27mhz xtal */
105 tw_writeb(TW68_OPFORM, 0x04); /* 20C analog line-lock */
106 tw_writeb(TW68_HSYNC, 0); /* 210 color-killer high sens */
107 tw_writeb(TW68_ACNTL, 0x42); /* 218 int vref #2, chroma adc off */
108
109 tw_writeb(TW68_CROP_HI, 0x02); /* 21C Hactive m.s. bits */
110 tw_writeb(TW68_VDELAY_LO, 0x12);/* 220 Mfg specified reset value */
111 tw_writeb(TW68_VACTIVE_LO, 0xf0);
112 tw_writeb(TW68_HDELAY_LO, 0x0f);
113 tw_writeb(TW68_HACTIVE_LO, 0xd0);
114
115 tw_writeb(TW68_CNTRL1, 0xcd); /* 230 Wide Chroma BPF B/W
116 * Secam reduction, Adap comb for
117 * NTSC, Op Mode 1 */
118
119 tw_writeb(TW68_VSCALE_LO, 0); /* 234 */
120 tw_writeb(TW68_SCALE_HI, 0x11); /* 238 */
121 tw_writeb(TW68_HSCALE_LO, 0); /* 23c */
122 tw_writeb(TW68_BRIGHT, 0); /* 240 */
123 tw_writeb(TW68_CONTRAST, 0x5c); /* 244 */
124 tw_writeb(TW68_SHARPNESS, 0x51);/* 248 */
125 tw_writeb(TW68_SAT_U, 0x80); /* 24C */
126 tw_writeb(TW68_SAT_V, 0x80); /* 250 */
127 tw_writeb(TW68_HUE, 0x00); /* 254 */
128
129 /* TODO - Check that none of these are set by control defaults */
130 tw_writeb(TW68_SHARP2, 0x53); /* 258 Mfg specified reset val */
131 tw_writeb(TW68_VSHARP, 0x80); /* 25C Sharpness Coring val 8 */
132 tw_writeb(TW68_CORING, 0x44); /* 260 CTI and Vert Peak coring */
133 tw_writeb(TW68_CNTRL2, 0x00); /* 268 No power saving enabled */
134 tw_writeb(TW68_SDT, 0x07); /* 270 Enable shadow reg, auto-det */
135 tw_writeb(TW68_SDTR, 0x7f); /* 274 All stds recog, don't start */
136 tw_writeb(TW68_CLMPG, 0x50); /* 280 Clamp end at 40 sys clocks */
137 tw_writeb(TW68_IAGC, 0x22); /* 284 Mfg specified reset val */
138 tw_writeb(TW68_AGCGAIN, 0xf0); /* 288 AGC gain when loop disabled */
139 tw_writeb(TW68_PEAKWT, 0xd8); /* 28C White peak threshold */
140 tw_writeb(TW68_CLMPL, 0x3c); /* 290 Y channel clamp level */
141/* tw_writeb(TW68_SYNCT, 0x38);*/ /* 294 Sync amplitude */
142 tw_writeb(TW68_SYNCT, 0x30); /* 294 Sync amplitude */
143 tw_writeb(TW68_MISSCNT, 0x44); /* 298 Horiz sync, VCR detect sens */
144 tw_writeb(TW68_PCLAMP, 0x28); /* 29C Clamp pos from PLL sync */
145 /* Bit DETV of VCNTL1 helps sync multi cams/chip board */
146 tw_writeb(TW68_VCNTL1, 0x04); /* 2A0 */
147 tw_writeb(TW68_VCNTL2, 0); /* 2A4 */
148 tw_writeb(TW68_CKILL, 0x68); /* 2A8 Mfg specified reset val */
149 tw_writeb(TW68_COMB, 0x44); /* 2AC Mfg specified reset val */
150 tw_writeb(TW68_LDLY, 0x30); /* 2B0 Max positive luma delay */
151 tw_writeb(TW68_MISC1, 0x14); /* 2B4 Mfg specified reset val */
152 tw_writeb(TW68_LOOP, 0xa5); /* 2B8 Mfg specified reset val */
153 tw_writeb(TW68_MISC2, 0xe0); /* 2BC Enable colour killer */
154 tw_writeb(TW68_MVSN, 0); /* 2C0 */
155 tw_writeb(TW68_CLMD, 0x05); /* 2CC slice level auto, clamp med. */
156 tw_writeb(TW68_IDCNTL, 0); /* 2D0 Writing zero to this register
157 * selects NTSC ID detection,
158 * but doesn't change the
159 * sensitivity (which has a reset
160 * value of 1E). Since we are
161 * not doing auto-detection, it
162 * has no real effect */
163 tw_writeb(TW68_CLCNTL1, 0); /* 2D4 */
164 tw_writel(TW68_VBIC, 0x03); /* 010 */
165 tw_writel(TW68_CAP_CTL, 0x03); /* 040 Enable both even & odd flds */
166 tw_writel(TW68_DMAC, 0x2000); /* patch set had 0x2080 */
167 tw_writel(TW68_TESTREG, 0); /* 02C */
168
169 /*
170 * Some common boards, especially inexpensive single-chip models,
171 * use the GPIO bits 0-3 to control an on-board video-output mux.
172 * For these boards, we need to set up the GPIO register into
173 * "normal" mode, set bits 0-3 as output, and then set those bits
174 * zero.
175 *
176 * Eventually, it would be nice if we could identify these boards
177 * uniquely, and only do this initialisation if the board has been
178 * identify. For the moment, however, it shouldn't hurt anything
179 * to do these steps.
180 */
181 tw_writel(TW68_GPIOC, 0); /* Set the GPIO to "normal", no ints */
182 tw_writel(TW68_GPOE, 0x0f); /* Set bits 0-3 to "output" */
183 tw_writel(TW68_GPDATA, 0); /* Set all bits to low state */
184
185 /* Initialize the device control structures */
186 mutex_init(&dev->lock);
187 spin_lock_init(&dev->slock);
188
189 /* Initialize any subsystems */
190 tw68_video_init1(dev);
191 return 0;
192}
193
194static irqreturn_t tw68_irq(int irq, void *dev_id)
195{
196 struct tw68_dev *dev = dev_id;
197 u32 status, orig;
198 int loop;
199
200 status = orig = tw_readl(TW68_INTSTAT) & dev->pci_irqmask;
201 /* Check if anything to do */
202 if (0 == status)
203 return IRQ_NONE; /* Nope - return */
204 for (loop = 0; loop < 10; loop++) {
205 if (status & dev->board_virqmask) /* video interrupt */
206 tw68_irq_video_done(dev, status);
207 status = tw_readl(TW68_INTSTAT) & dev->pci_irqmask;
208 if (0 == status)
209 return IRQ_HANDLED;
210 }
211 dev_dbg(&dev->pci->dev, "%s: **** INTERRUPT NOT HANDLED - clearing mask (orig 0x%08x, cur 0x%08x)",
212 dev->name, orig, tw_readl(TW68_INTSTAT));
213 dev_dbg(&dev->pci->dev, "%s: pci_irqmask 0x%08x; board_virqmask 0x%08x ****\n",
214 dev->name, dev->pci_irqmask, dev->board_virqmask);
215 tw_clearl(TW68_INTMASK, dev->pci_irqmask);
216 return IRQ_HANDLED;
217}
218
219static int tw68_initdev(struct pci_dev *pci_dev,
220 const struct pci_device_id *pci_id)
221{
222 struct tw68_dev *dev;
223 int vidnr = -1;
224 int err;
225
226 dev = devm_kzalloc(&pci_dev->dev, sizeof(*dev), GFP_KERNEL);
227 if (NULL == dev)
228 return -ENOMEM;
229
230 dev->instance = v4l2_device_set_name(&dev->v4l2_dev, "tw68",
231 &tw68_instance);
232
233 err = v4l2_device_register(&pci_dev->dev, &dev->v4l2_dev);
234 if (err)
235 return err;
236
237 /* pci init */
238 dev->pci = pci_dev;
239 if (pci_enable_device(pci_dev)) {
240 err = -EIO;
241 goto fail1;
242 }
243
244 dev->name = dev->v4l2_dev.name;
245
246 if (UNSET != latency) {
247 pr_info("%s: setting pci latency timer to %d\n",
248 dev->name, latency);
249 pci_write_config_byte(pci_dev, PCI_LATENCY_TIMER, latency);
250 }
251
252 /* print pci info */
253 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &dev->pci_rev);
254 pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
255 pr_info("%s: found at %s, rev: %d, irq: %d, latency: %d, mmio: 0x%llx\n",
256 dev->name, pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
257 dev->pci_lat, (u64)pci_resource_start(pci_dev, 0));
258 pci_set_master(pci_dev);
259 if (!pci_dma_supported(pci_dev, DMA_BIT_MASK(32))) {
260 pr_info("%s: Oops: no 32bit PCI DMA ???\n", dev->name);
261 err = -EIO;
262 goto fail1;
263 }
264
265 switch (pci_id->device) {
266 case PCI_DEVICE_ID_6800: /* TW6800 */
267 dev->vdecoder = TW6800;
268 dev->board_virqmask = TW68_VID_INTS;
269 break;
270 case PCI_DEVICE_ID_6801: /* Video decoder for TW6802 */
271 dev->vdecoder = TW6801;
272 dev->board_virqmask = TW68_VID_INTS | TW68_VID_INTSX;
273 break;
274 case PCI_DEVICE_ID_6804: /* Video decoder for TW6804 */
275 dev->vdecoder = TW6804;
276 dev->board_virqmask = TW68_VID_INTS | TW68_VID_INTSX;
277 break;
278 default:
279 dev->vdecoder = TWXXXX; /* To be announced */
280 dev->board_virqmask = TW68_VID_INTS | TW68_VID_INTSX;
281 break;
282 }
283
284 /* get mmio */
285 if (!request_mem_region(pci_resource_start(pci_dev, 0),
286 pci_resource_len(pci_dev, 0),
287 dev->name)) {
288 err = -EBUSY;
289 pr_err("%s: can't get MMIO memory @ 0x%llx\n",
290 dev->name,
291 (unsigned long long)pci_resource_start(pci_dev, 0));
292 goto fail1;
293 }
294 dev->lmmio = ioremap(pci_resource_start(pci_dev, 0),
295 pci_resource_len(pci_dev, 0));
296 dev->bmmio = (__u8 __iomem *)dev->lmmio;
297 if (NULL == dev->lmmio) {
298 err = -EIO;
299 pr_err("%s: can't ioremap() MMIO memory\n",
300 dev->name);
301 goto fail2;
302 }
303 /* initialize hardware #1 */
304 /* Then do any initialisation wanted before interrupts are on */
305 tw68_hw_init1(dev);
306
307 /* get irq */
308 err = devm_request_irq(&pci_dev->dev, pci_dev->irq, tw68_irq,
309 IRQF_SHARED | IRQF_DISABLED, dev->name, dev);
310 if (err < 0) {
311 pr_err("%s: can't get IRQ %d\n",
312 dev->name, pci_dev->irq);
313 goto fail3;
314 }
315
316 /*
317 * Now do remainder of initialisation, first for
318 * things unique for this card, then for general board
319 */
320 if (dev->instance < TW68_MAXBOARDS)
321 vidnr = video_nr[dev->instance];
322 /* initialise video function first */
323 err = tw68_video_init2(dev, vidnr);
324 if (err < 0) {
325 pr_err("%s: can't register video device\n",
326 dev->name);
327 goto fail4;
328 }
329 tw_setl(TW68_INTMASK, dev->pci_irqmask);
330
331 pr_info("%s: registered device %s\n",
332 dev->name, video_device_node_name(&dev->vdev));
333
334 return 0;
335
336fail4:
337 video_unregister_device(&dev->vdev);
338fail3:
339 iounmap(dev->lmmio);
340fail2:
341 release_mem_region(pci_resource_start(pci_dev, 0),
342 pci_resource_len(pci_dev, 0));
343fail1:
344 v4l2_device_unregister(&dev->v4l2_dev);
345 return err;
346}
347
348static void tw68_finidev(struct pci_dev *pci_dev)
349{
350 struct v4l2_device *v4l2_dev = pci_get_drvdata(pci_dev);
351 struct tw68_dev *dev =
352 container_of(v4l2_dev, struct tw68_dev, v4l2_dev);
353
354 /* shutdown subsystems */
355 tw_clearl(TW68_DMAC, TW68_DMAP_EN | TW68_FIFO_EN);
356 tw_writel(TW68_INTMASK, 0);
357
358 /* unregister */
359 video_unregister_device(&dev->vdev);
360 v4l2_ctrl_handler_free(&dev->hdl);
361
362 /* release resources */
363 iounmap(dev->lmmio);
364 release_mem_region(pci_resource_start(pci_dev, 0),
365 pci_resource_len(pci_dev, 0));
366
367 v4l2_device_unregister(&dev->v4l2_dev);
368}
369
370#ifdef CONFIG_PM
371
372static int tw68_suspend(struct pci_dev *pci_dev , pm_message_t state)
373{
374 struct v4l2_device *v4l2_dev = pci_get_drvdata(pci_dev);
375 struct tw68_dev *dev = container_of(v4l2_dev,
376 struct tw68_dev, v4l2_dev);
377
378 tw_clearl(TW68_DMAC, TW68_DMAP_EN | TW68_FIFO_EN);
379 dev->pci_irqmask &= ~TW68_VID_INTS;
380 tw_writel(TW68_INTMASK, 0);
381
382 synchronize_irq(pci_dev->irq);
383
384 pci_save_state(pci_dev);
385 pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state));
386 vb2_discard_done(&dev->vidq);
387
388 return 0;
389}
390
391static int tw68_resume(struct pci_dev *pci_dev)
392{
393 struct v4l2_device *v4l2_dev = pci_get_drvdata(pci_dev);
394 struct tw68_dev *dev = container_of(v4l2_dev,
395 struct tw68_dev, v4l2_dev);
396 struct tw68_buf *buf;
397 unsigned long flags;
398
399 pci_set_power_state(pci_dev, PCI_D0);
400 pci_restore_state(pci_dev);
401
402 /* Do things that are done in tw68_initdev ,
403 except of initializing memory structures.*/
404
405 msleep(100);
406
407 tw68_set_tvnorm_hw(dev);
408
409 /*resume unfinished buffer(s)*/
410 spin_lock_irqsave(&dev->slock, flags);
411 buf = container_of(dev->active.next, struct tw68_buf, list);
412
413 tw68_video_start_dma(dev, buf);
414
415 spin_unlock_irqrestore(&dev->slock, flags);
416
417 return 0;
418}
419#endif
420
421/* ----------------------------------------------------------- */
422
423static struct pci_driver tw68_pci_driver = {
424 .name = "tw68",
425 .id_table = tw68_pci_tbl,
426 .probe = tw68_initdev,
427 .remove = tw68_finidev,
428#ifdef CONFIG_PM
429 .suspend = tw68_suspend,
430 .resume = tw68_resume
431#endif
432};
433
434module_pci_driver(tw68_pci_driver);
diff --git a/drivers/media/pci/tw68/tw68-reg.h b/drivers/media/pci/tw68/tw68-reg.h
new file mode 100644
index 000000000000..f60b3a896fa7
--- /dev/null
+++ b/drivers/media/pci/tw68/tw68-reg.h
@@ -0,0 +1,195 @@
1/*
2 * tw68-reg.h - TW68xx register offsets
3 *
4 * Much of this code is derived from the cx88 and sa7134 drivers, which
5 * were in turn derived from the bt87x driver. The original work was by
6 * Gerd Knorr; more recently the code was enhanced by Mauro Carvalho Chehab,
7 * Hans Verkuil, Andy Walls and many others. Their work is gratefully
8 * acknowledged. Full credit goes to them - any problems within this code
9 * are mine.
10 *
11 * Copyright (C) William M. Brack
12 *
13 * Refactored and updated to the latest v4l core frameworks:
14 *
15 * Copyright (C) 2014 Hans Verkuil <hverkuil@xs4all.nl>
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License as published by
19 * the Free Software Foundation; either version 2 of the License, or
20 * (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26*/
27
28#ifndef _TW68_REG_H_
29#define _TW68_REG_H_
30
31/* ---------------------------------------------------------------------- */
32#define TW68_DMAC 0x000
33#define TW68_DMAP_SA 0x004
34#define TW68_DMAP_EXE 0x008
35#define TW68_DMAP_PP 0x00c
36#define TW68_VBIC 0x010
37#define TW68_SBUSC 0x014
38#define TW68_SBUSSD 0x018
39#define TW68_INTSTAT 0x01C
40#define TW68_INTMASK 0x020
41#define TW68_GPIOC 0x024
42#define TW68_GPOE 0x028
43#define TW68_TESTREG 0x02C
44#define TW68_SBUSRD 0x030
45#define TW68_SBUS_TRIG 0x034
46#define TW68_CAP_CTL 0x040
47#define TW68_SUBSYS 0x054
48#define TW68_I2C_RST 0x064
49#define TW68_VBIINST 0x06C
50/* define bits in FIFO and DMAP Control reg */
51#define TW68_DMAP_EN (1 << 0)
52#define TW68_FIFO_EN (1 << 1)
53/* define the Interrupt Status Register bits */
54#define TW68_SBDONE (1 << 0)
55#define TW68_DMAPI (1 << 1)
56#define TW68_GPINT (1 << 2)
57#define TW68_FFOF (1 << 3)
58#define TW68_FDMIS (1 << 4)
59#define TW68_DMAPERR (1 << 5)
60#define TW68_PABORT (1 << 6)
61#define TW68_SBDONE2 (1 << 12)
62#define TW68_SBERR2 (1 << 13)
63#define TW68_PPERR (1 << 14)
64#define TW68_FFERR (1 << 15)
65#define TW68_DET50 (1 << 16)
66#define TW68_FLOCK (1 << 17)
67#define TW68_CCVALID (1 << 18)
68#define TW68_VLOCK (1 << 19)
69#define TW68_FIELD (1 << 20)
70#define TW68_SLOCK (1 << 21)
71#define TW68_HLOCK (1 << 22)
72#define TW68_VDLOSS (1 << 23)
73#define TW68_SBERR (1 << 24)
74/* define the i2c control register bits */
75#define TW68_SBMODE (0)
76#define TW68_WREN (1)
77#define TW68_SSCLK (6)
78#define TW68_SSDAT (7)
79#define TW68_SBCLK (8)
80#define TW68_WDLEN (16)
81#define TW68_RDLEN (20)
82#define TW68_SBRW (24)
83#define TW68_SBDEV (25)
84
85#define TW68_SBMODE_B (1 << TW68_SBMODE)
86#define TW68_WREN_B (1 << TW68_WREN)
87#define TW68_SSCLK_B (1 << TW68_SSCLK)
88#define TW68_SSDAT_B (1 << TW68_SSDAT)
89#define TW68_SBRW_B (1 << TW68_SBRW)
90
91#define TW68_GPDATA 0x100
92#define TW68_STATUS1 0x204
93#define TW68_INFORM 0x208
94#define TW68_OPFORM 0x20C
95#define TW68_HSYNC 0x210
96#define TW68_ACNTL 0x218
97#define TW68_CROP_HI 0x21C
98#define TW68_VDELAY_LO 0x220
99#define TW68_VACTIVE_LO 0x224
100#define TW68_HDELAY_LO 0x228
101#define TW68_HACTIVE_LO 0x22C
102#define TW68_CNTRL1 0x230
103#define TW68_VSCALE_LO 0x234
104#define TW68_SCALE_HI 0x238
105#define TW68_HSCALE_LO 0x23C
106#define TW68_BRIGHT 0x240
107#define TW68_CONTRAST 0x244
108#define TW68_SHARPNESS 0x248
109#define TW68_SAT_U 0x24C
110#define TW68_SAT_V 0x250
111#define TW68_HUE 0x254
112#define TW68_SHARP2 0x258
113#define TW68_VSHARP 0x25C
114#define TW68_CORING 0x260
115#define TW68_VBICNTL 0x264
116#define TW68_CNTRL2 0x268
117#define TW68_CC_DATA 0x26C
118#define TW68_SDT 0x270
119#define TW68_SDTR 0x274
120#define TW68_RESERV2 0x278
121#define TW68_RESERV3 0x27C
122#define TW68_CLMPG 0x280
123#define TW68_IAGC 0x284
124#define TW68_AGCGAIN 0x288
125#define TW68_PEAKWT 0x28C
126#define TW68_CLMPL 0x290
127#define TW68_SYNCT 0x294
128#define TW68_MISSCNT 0x298
129#define TW68_PCLAMP 0x29C
130#define TW68_VCNTL1 0x2A0
131#define TW68_VCNTL2 0x2A4
132#define TW68_CKILL 0x2A8
133#define TW68_COMB 0x2AC
134#define TW68_LDLY 0x2B0
135#define TW68_MISC1 0x2B4
136#define TW68_LOOP 0x2B8
137#define TW68_MISC2 0x2BC
138#define TW68_MVSN 0x2C0
139#define TW68_STATUS2 0x2C4
140#define TW68_HFREF 0x2C8
141#define TW68_CLMD 0x2CC
142#define TW68_IDCNTL 0x2D0
143#define TW68_CLCNTL1 0x2D4
144
145/* Audio */
146#define TW68_ACKI1 0x300
147#define TW68_ACKI2 0x304
148#define TW68_ACKI3 0x308
149#define TW68_ACKN1 0x30C
150#define TW68_ACKN2 0x310
151#define TW68_ACKN3 0x314
152#define TW68_SDIV 0x318
153#define TW68_LRDIV 0x31C
154#define TW68_ACCNTL 0x320
155
156#define TW68_VSCTL 0x3B8
157#define TW68_CHROMAGVAL 0x3BC
158
159#define TW68_F2CROP_HI 0x3DC
160#define TW68_F2VDELAY_LO 0x3E0
161#define TW68_F2VACTIVE_LO 0x3E4
162#define TW68_F2HDELAY_LO 0x3E8
163#define TW68_F2HACTIVE_LO 0x3EC
164#define TW68_F2CNT 0x3F0
165#define TW68_F2VSCALE_LO 0x3F4
166#define TW68_F2SCALE_HI 0x3F8
167#define TW68_F2HSCALE_LO 0x3FC
168
169#define RISC_INT_BIT 0x08000000
170#define RISC_SYNCO 0xC0000000
171#define RISC_SYNCE 0xD0000000
172#define RISC_JUMP 0xB0000000
173#define RISC_LINESTART 0x90000000
174#define RISC_INLINE 0xA0000000
175
176#define VideoFormatNTSC 0
177#define VideoFormatNTSCJapan 0
178#define VideoFormatPALBDGHI 1
179#define VideoFormatSECAM 2
180#define VideoFormatNTSC443 3
181#define VideoFormatPALM 4
182#define VideoFormatPALN 5
183#define VideoFormatPALNC 5
184#define VideoFormatPAL60 6
185#define VideoFormatAuto 7
186
187#define ColorFormatRGB32 0x00
188#define ColorFormatRGB24 0x10
189#define ColorFormatRGB16 0x20
190#define ColorFormatRGB15 0x30
191#define ColorFormatYUY2 0x40
192#define ColorFormatBSWAP 0x04
193#define ColorFormatWSWAP 0x08
194#define ColorFormatGamma 0x80
195#endif
diff --git a/drivers/media/pci/tw68/tw68-risc.c b/drivers/media/pci/tw68/tw68-risc.c
new file mode 100644
index 000000000000..7439db212a69
--- /dev/null
+++ b/drivers/media/pci/tw68/tw68-risc.c
@@ -0,0 +1,230 @@
1/*
2 * tw68_risc.c
3 * Part of the device driver for Techwell 68xx based cards
4 *
5 * Much of this code is derived from the cx88 and sa7134 drivers, which
6 * were in turn derived from the bt87x driver. The original work was by
7 * Gerd Knorr; more recently the code was enhanced by Mauro Carvalho Chehab,
8 * Hans Verkuil, Andy Walls and many others. Their work is gratefully
9 * acknowledged. Full credit goes to them - any problems within this code
10 * are mine.
11 *
12 * Copyright (C) 2009 William M. Brack
13 *
14 * Refactored and updated to the latest v4l core frameworks:
15 *
16 * Copyright (C) 2014 Hans Verkuil <hverkuil@xs4all.nl>
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 */
28
29#include "tw68.h"
30
31/**
32 * @rp pointer to current risc program position
33 * @sglist pointer to "scatter-gather list" of buffer pointers
34 * @offset offset to target memory buffer
35 * @sync_line 0 -> no sync, 1 -> odd sync, 2 -> even sync
36 * @bpl number of bytes per scan line
37 * @padding number of bytes of padding to add
38 * @lines number of lines in field
39 * @jump insert a jump at the start
40 */
41static __le32 *tw68_risc_field(__le32 *rp, struct scatterlist *sglist,
42 unsigned int offset, u32 sync_line,
43 unsigned int bpl, unsigned int padding,
44 unsigned int lines, bool jump)
45{
46 struct scatterlist *sg;
47 unsigned int line, todo, done;
48
49 if (jump) {
50 *(rp++) = cpu_to_le32(RISC_JUMP);
51 *(rp++) = 0;
52 }
53
54 /* sync instruction */
55 if (sync_line == 1)
56 *(rp++) = cpu_to_le32(RISC_SYNCO);
57 else
58 *(rp++) = cpu_to_le32(RISC_SYNCE);
59 *(rp++) = 0;
60
61 /* scan lines */
62 sg = sglist;
63 for (line = 0; line < lines; line++) {
64 /* calculate next starting position */
65 while (offset && offset >= sg_dma_len(sg)) {
66 offset -= sg_dma_len(sg);
67 sg = sg_next(sg);
68 }
69 if (bpl <= sg_dma_len(sg) - offset) {
70 /* fits into current chunk */
71 *(rp++) = cpu_to_le32(RISC_LINESTART |
72 /* (offset<<12) |*/ bpl);
73 *(rp++) = cpu_to_le32(sg_dma_address(sg) + offset);
74 offset += bpl;
75 } else {
76 /*
77 * scanline needs to be split. Put the start in
78 * whatever memory remains using RISC_LINESTART,
79 * then the remainder into following addresses
80 * given by the scatter-gather list.
81 */
82 todo = bpl; /* one full line to be done */
83 /* first fragment */
84 done = (sg_dma_len(sg) - offset);
85 *(rp++) = cpu_to_le32(RISC_LINESTART |
86 (7 << 24) |
87 done);
88 *(rp++) = cpu_to_le32(sg_dma_address(sg) + offset);
89 todo -= done;
90 sg = sg_next(sg);
91 /* succeeding fragments have no offset */
92 while (todo > sg_dma_len(sg)) {
93 *(rp++) = cpu_to_le32(RISC_INLINE |
94 (done << 12) |
95 sg_dma_len(sg));
96 *(rp++) = cpu_to_le32(sg_dma_address(sg));
97 todo -= sg_dma_len(sg);
98 sg = sg_next(sg);
99 done += sg_dma_len(sg);
100 }
101 if (todo) {
102 /* final chunk - offset 0, count 'todo' */
103 *(rp++) = cpu_to_le32(RISC_INLINE |
104 (done << 12) |
105 todo);
106 *(rp++) = cpu_to_le32(sg_dma_address(sg));
107 }
108 offset = todo;
109 }
110 offset += padding;
111 }
112
113 return rp;
114}
115
116/**
117 * tw68_risc_buffer
118 *
119 * This routine is called by tw68-video. It allocates
120 * memory for the dma controller "program" and then fills in that
121 * memory with the appropriate "instructions".
122 *
123 * @pci_dev structure with info about the pci
124 * slot which our device is in.
125 * @risc structure with info about the memory
126 * used for our controller program.
127 * @sglist scatter-gather list entry
128 * @top_offset offset within the risc program area for the
129 * first odd frame line
130 * @bottom_offset offset within the risc program area for the
131 * first even frame line
132 * @bpl number of data bytes per scan line
133 * @padding number of extra bytes to add at end of line
134 * @lines number of scan lines
135 */
136int tw68_risc_buffer(struct pci_dev *pci,
137 struct tw68_buf *buf,
138 struct scatterlist *sglist,
139 unsigned int top_offset,
140 unsigned int bottom_offset,
141 unsigned int bpl,
142 unsigned int padding,
143 unsigned int lines)
144{
145 u32 instructions, fields;
146 __le32 *rp;
147
148 fields = 0;
149 if (UNSET != top_offset)
150 fields++;
151 if (UNSET != bottom_offset)
152 fields++;
153 /*
154 * estimate risc mem: worst case is one write per page border +
155 * one write per scan line + syncs + 2 jumps (all 2 dwords).
156 * Padding can cause next bpl to start close to a page border.
157 * First DMA region may be smaller than PAGE_SIZE
158 */
159 instructions = fields * (1 + (((bpl + padding) * lines) /
160 PAGE_SIZE) + lines) + 4;
161 buf->size = instructions * 8;
162 buf->cpu = pci_alloc_consistent(pci, buf->size, &buf->dma);
163 if (buf->cpu == NULL)
164 return -ENOMEM;
165
166 /* write risc instructions */
167 rp = buf->cpu;
168 if (UNSET != top_offset) /* generates SYNCO */
169 rp = tw68_risc_field(rp, sglist, top_offset, 1,
170 bpl, padding, lines, true);
171 if (UNSET != bottom_offset) /* generates SYNCE */
172 rp = tw68_risc_field(rp, sglist, bottom_offset, 2,
173 bpl, padding, lines, top_offset == UNSET);
174
175 /* save pointer to jmp instruction address */
176 buf->jmp = rp;
177 buf->cpu[1] = cpu_to_le32(buf->dma + 8);
178 /* assure risc buffer hasn't overflowed */
179 BUG_ON((buf->jmp - buf->cpu + 2) * sizeof(buf->cpu[0]) > buf->size);
180 return 0;
181}
182
183#if 0
184/* ------------------------------------------------------------------ */
185/* debug helper code */
186
187static void tw68_risc_decode(u32 risc, u32 addr)
188{
189#define RISC_OP(reg) (((reg) >> 28) & 7)
190 static struct instr_details {
191 char *name;
192 u8 has_data_type;
193 u8 has_byte_info;
194 u8 has_addr;
195 } instr[8] = {
196 [RISC_OP(RISC_SYNCO)] = {"syncOdd", 0, 0, 0},
197 [RISC_OP(RISC_SYNCE)] = {"syncEven", 0, 0, 0},
198 [RISC_OP(RISC_JUMP)] = {"jump", 0, 0, 1},
199 [RISC_OP(RISC_LINESTART)] = {"lineStart", 1, 1, 1},
200 [RISC_OP(RISC_INLINE)] = {"inline", 1, 1, 1},
201 };
202 u32 p;
203
204 p = RISC_OP(risc);
205 if (!(risc & 0x80000000) || !instr[p].name) {
206 pr_debug("0x%08x [ INVALID ]\n", risc);
207 return;
208 }
209 pr_debug("0x%08x %-9s IRQ=%d",
210 risc, instr[p].name, (risc >> 27) & 1);
211 if (instr[p].has_data_type)
212 pr_debug(" Type=%d", (risc >> 24) & 7);
213 if (instr[p].has_byte_info)
214 pr_debug(" Start=0x%03x Count=%03u",
215 (risc >> 12) & 0xfff, risc & 0xfff);
216 if (instr[p].has_addr)
217 pr_debug(" StartAddr=0x%08x", addr);
218 pr_debug("\n");
219}
220
221void tw68_risc_program_dump(struct tw68_core *core, struct tw68_buf *buf)
222{
223 const __le32 *addr;
224
225 pr_debug("%s: risc_program_dump: risc=%p, buf->cpu=0x%p, buf->jmp=0x%p\n",
226 core->name, buf, buf->cpu, buf->jmp);
227 for (addr = buf->cpu; addr <= buf->jmp; addr += 2)
228 tw68_risc_decode(*addr, *(addr+1));
229}
230#endif
diff --git a/drivers/media/pci/tw68/tw68-video.c b/drivers/media/pci/tw68/tw68-video.c
new file mode 100644
index 000000000000..5c94ac7c88d9
--- /dev/null
+++ b/drivers/media/pci/tw68/tw68-video.c
@@ -0,0 +1,1051 @@
1/*
2 * tw68 functions to handle video data
3 *
4 * Much of this code is derived from the cx88 and sa7134 drivers, which
5 * were in turn derived from the bt87x driver. The original work was by
6 * Gerd Knorr; more recently the code was enhanced by Mauro Carvalho Chehab,
7 * Hans Verkuil, Andy Walls and many others. Their work is gratefully
8 * acknowledged. Full credit goes to them - any problems within this code
9 * are mine.
10 *
11 * Copyright (C) 2009 William M. Brack
12 *
13 * Refactored and updated to the latest v4l core frameworks:
14 *
15 * Copyright (C) 2014 Hans Verkuil <hverkuil@xs4all.nl>
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License as published by
19 * the Free Software Foundation; either version 2 of the License, or
20 * (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 */
27
28#include <linux/module.h>
29#include <media/v4l2-common.h>
30#include <media/v4l2-event.h>
31#include <media/videobuf2-dma-sg.h>
32
33#include "tw68.h"
34#include "tw68-reg.h"
35
36/* ------------------------------------------------------------------ */
37/* data structs for video */
38/*
39 * FIXME -
40 * Note that the saa7134 has formats, e.g. YUV420, which are classified
41 * as "planar". These affect overlay mode, and are flagged with a field
42 * ".planar" in the format. Do we need to implement this in this driver?
43 */
44static const struct tw68_format formats[] = {
45 {
46 .name = "15 bpp RGB, le",
47 .fourcc = V4L2_PIX_FMT_RGB555,
48 .depth = 16,
49 .twformat = ColorFormatRGB15,
50 }, {
51 .name = "15 bpp RGB, be",
52 .fourcc = V4L2_PIX_FMT_RGB555X,
53 .depth = 16,
54 .twformat = ColorFormatRGB15 | ColorFormatBSWAP,
55 }, {
56 .name = "16 bpp RGB, le",
57 .fourcc = V4L2_PIX_FMT_RGB565,
58 .depth = 16,
59 .twformat = ColorFormatRGB16,
60 }, {
61 .name = "16 bpp RGB, be",
62 .fourcc = V4L2_PIX_FMT_RGB565X,
63 .depth = 16,
64 .twformat = ColorFormatRGB16 | ColorFormatBSWAP,
65 }, {
66 .name = "24 bpp RGB, le",
67 .fourcc = V4L2_PIX_FMT_BGR24,
68 .depth = 24,
69 .twformat = ColorFormatRGB24,
70 }, {
71 .name = "24 bpp RGB, be",
72 .fourcc = V4L2_PIX_FMT_RGB24,
73 .depth = 24,
74 .twformat = ColorFormatRGB24 | ColorFormatBSWAP,
75 }, {
76 .name = "32 bpp RGB, le",
77 .fourcc = V4L2_PIX_FMT_BGR32,
78 .depth = 32,
79 .twformat = ColorFormatRGB32,
80 }, {
81 .name = "32 bpp RGB, be",
82 .fourcc = V4L2_PIX_FMT_RGB32,
83 .depth = 32,
84 .twformat = ColorFormatRGB32 | ColorFormatBSWAP |
85 ColorFormatWSWAP,
86 }, {
87 .name = "4:2:2 packed, YUYV",
88 .fourcc = V4L2_PIX_FMT_YUYV,
89 .depth = 16,
90 .twformat = ColorFormatYUY2,
91 }, {
92 .name = "4:2:2 packed, UYVY",
93 .fourcc = V4L2_PIX_FMT_UYVY,
94 .depth = 16,
95 .twformat = ColorFormatYUY2 | ColorFormatBSWAP,
96 }
97};
98#define FORMATS ARRAY_SIZE(formats)
99
100#define NORM_625_50 \
101 .h_delay = 3, \
102 .h_delay0 = 133, \
103 .h_start = 0, \
104 .h_stop = 719, \
105 .v_delay = 24, \
106 .vbi_v_start_0 = 7, \
107 .vbi_v_stop_0 = 22, \
108 .video_v_start = 24, \
109 .video_v_stop = 311, \
110 .vbi_v_start_1 = 319
111
112#define NORM_525_60 \
113 .h_delay = 8, \
114 .h_delay0 = 138, \
115 .h_start = 0, \
116 .h_stop = 719, \
117 .v_delay = 22, \
118 .vbi_v_start_0 = 10, \
119 .vbi_v_stop_0 = 21, \
120 .video_v_start = 22, \
121 .video_v_stop = 262, \
122 .vbi_v_start_1 = 273
123
124/*
125 * The following table is searched by tw68_s_std, first for a specific
126 * match, then for an entry which contains the desired id. The table
127 * entries should therefore be ordered in ascending order of specificity.
128 */
129static const struct tw68_tvnorm tvnorms[] = {
130 {
131 .name = "PAL", /* autodetect */
132 .id = V4L2_STD_PAL,
133 NORM_625_50,
134
135 .sync_control = 0x18,
136 .luma_control = 0x40,
137 .chroma_ctrl1 = 0x81,
138 .chroma_gain = 0x2a,
139 .chroma_ctrl2 = 0x06,
140 .vgate_misc = 0x1c,
141 .format = VideoFormatPALBDGHI,
142 }, {
143 .name = "NTSC",
144 .id = V4L2_STD_NTSC,
145 NORM_525_60,
146
147 .sync_control = 0x59,
148 .luma_control = 0x40,
149 .chroma_ctrl1 = 0x89,
150 .chroma_gain = 0x2a,
151 .chroma_ctrl2 = 0x0e,
152 .vgate_misc = 0x18,
153 .format = VideoFormatNTSC,
154 }, {
155 .name = "SECAM",
156 .id = V4L2_STD_SECAM,
157 NORM_625_50,
158
159 .sync_control = 0x18,
160 .luma_control = 0x1b,
161 .chroma_ctrl1 = 0xd1,
162 .chroma_gain = 0x80,
163 .chroma_ctrl2 = 0x00,
164 .vgate_misc = 0x1c,
165 .format = VideoFormatSECAM,
166 }, {
167 .name = "PAL-M",
168 .id = V4L2_STD_PAL_M,
169 NORM_525_60,
170
171 .sync_control = 0x59,
172 .luma_control = 0x40,
173 .chroma_ctrl1 = 0xb9,
174 .chroma_gain = 0x2a,
175 .chroma_ctrl2 = 0x0e,
176 .vgate_misc = 0x18,
177 .format = VideoFormatPALM,
178 }, {
179 .name = "PAL-Nc",
180 .id = V4L2_STD_PAL_Nc,
181 NORM_625_50,
182
183 .sync_control = 0x18,
184 .luma_control = 0x40,
185 .chroma_ctrl1 = 0xa1,
186 .chroma_gain = 0x2a,
187 .chroma_ctrl2 = 0x06,
188 .vgate_misc = 0x1c,
189 .format = VideoFormatPALNC,
190 }, {
191 .name = "PAL-60",
192 .id = V4L2_STD_PAL_60,
193 .h_delay = 186,
194 .h_start = 0,
195 .h_stop = 719,
196 .v_delay = 26,
197 .video_v_start = 23,
198 .video_v_stop = 262,
199 .vbi_v_start_0 = 10,
200 .vbi_v_stop_0 = 21,
201 .vbi_v_start_1 = 273,
202
203 .sync_control = 0x18,
204 .luma_control = 0x40,
205 .chroma_ctrl1 = 0x81,
206 .chroma_gain = 0x2a,
207 .chroma_ctrl2 = 0x06,
208 .vgate_misc = 0x1c,
209 .format = VideoFormatPAL60,
210 }
211};
212#define TVNORMS ARRAY_SIZE(tvnorms)
213
214static const struct tw68_format *format_by_fourcc(unsigned int fourcc)
215{
216 unsigned int i;
217
218 for (i = 0; i < FORMATS; i++)
219 if (formats[i].fourcc == fourcc)
220 return formats+i;
221 return NULL;
222}
223
224
225/* ------------------------------------------------------------------ */
226/*
227 * Note that the cropping rectangles are described in terms of a single
228 * frame, i.e. line positions are only 1/2 the interlaced equivalent
229 */
230static void set_tvnorm(struct tw68_dev *dev, const struct tw68_tvnorm *norm)
231{
232 if (norm != dev->tvnorm) {
233 dev->width = 720;
234 dev->height = (norm->id & V4L2_STD_525_60) ? 480 : 576;
235 dev->tvnorm = norm;
236 tw68_set_tvnorm_hw(dev);
237 }
238}
239
240/*
241 * tw68_set_scale
242 *
243 * Scaling and Cropping for video decoding
244 *
245 * We are working with 3 values for horizontal and vertical - scale,
246 * delay and active.
247 *
248 * HACTIVE represent the actual number of pixels in the "usable" image,
249 * before scaling. HDELAY represents the number of pixels skipped
250 * between the start of the horizontal sync and the start of the image.
251 * HSCALE is calculated using the formula
252 * HSCALE = (HACTIVE / (#pixels desired)) * 256
253 *
254 * The vertical registers are similar, except based upon the total number
255 * of lines in the image, and the first line of the image (i.e. ignoring
256 * vertical sync and VBI).
257 *
258 * Note that the number of bytes reaching the FIFO (and hence needing
259 * to be processed by the DMAP program) is completely dependent upon
260 * these values, especially HSCALE.
261 *
262 * Parameters:
263 * @dev pointer to the device structure, needed for
264 * getting current norm (as well as debug print)
265 * @width actual image width (from user buffer)
266 * @height actual image height
267 * @field indicates Top, Bottom or Interlaced
268 */
269static int tw68_set_scale(struct tw68_dev *dev, unsigned int width,
270 unsigned int height, enum v4l2_field field)
271{
272 const struct tw68_tvnorm *norm = dev->tvnorm;
273 /* set individually for debugging clarity */
274 int hactive, hdelay, hscale;
275 int vactive, vdelay, vscale;
276 int comb;
277
278 if (V4L2_FIELD_HAS_BOTH(field)) /* if field is interlaced */
279 height /= 2; /* we must set for 1-frame */
280
281 pr_debug("%s: width=%d, height=%d, both=%d\n"
282 " tvnorm h_delay=%d, h_start=%d, h_stop=%d, "
283 "v_delay=%d, v_start=%d, v_stop=%d\n" , __func__,
284 width, height, V4L2_FIELD_HAS_BOTH(field),
285 norm->h_delay, norm->h_start, norm->h_stop,
286 norm->v_delay, norm->video_v_start,
287 norm->video_v_stop);
288
289 switch (dev->vdecoder) {
290 case TW6800:
291 hdelay = norm->h_delay0;
292 break;
293 default:
294 hdelay = norm->h_delay;
295 break;
296 }
297
298 hdelay += norm->h_start;
299 hactive = norm->h_stop - norm->h_start + 1;
300
301 hscale = (hactive * 256) / (width);
302
303 vdelay = norm->v_delay;
304 vactive = ((norm->id & V4L2_STD_525_60) ? 524 : 624) / 2 - norm->video_v_start;
305 vscale = (vactive * 256) / height;
306
307 pr_debug("%s: %dx%d [%s%s,%s]\n", __func__,
308 width, height,
309 V4L2_FIELD_HAS_TOP(field) ? "T" : "",
310 V4L2_FIELD_HAS_BOTTOM(field) ? "B" : "",
311 v4l2_norm_to_name(dev->tvnorm->id));
312 pr_debug("%s: hactive=%d, hdelay=%d, hscale=%d; "
313 "vactive=%d, vdelay=%d, vscale=%d\n", __func__,
314 hactive, hdelay, hscale, vactive, vdelay, vscale);
315
316 comb = ((vdelay & 0x300) >> 2) |
317 ((vactive & 0x300) >> 4) |
318 ((hdelay & 0x300) >> 6) |
319 ((hactive & 0x300) >> 8);
320 pr_debug("%s: setting CROP_HI=%02x, VDELAY_LO=%02x, "
321 "VACTIVE_LO=%02x, HDELAY_LO=%02x, HACTIVE_LO=%02x\n",
322 __func__, comb, vdelay, vactive, hdelay, hactive);
323 tw_writeb(TW68_CROP_HI, comb);
324 tw_writeb(TW68_VDELAY_LO, vdelay & 0xff);
325 tw_writeb(TW68_VACTIVE_LO, vactive & 0xff);
326 tw_writeb(TW68_HDELAY_LO, hdelay & 0xff);
327 tw_writeb(TW68_HACTIVE_LO, hactive & 0xff);
328
329 comb = ((vscale & 0xf00) >> 4) | ((hscale & 0xf00) >> 8);
330 pr_debug("%s: setting SCALE_HI=%02x, VSCALE_LO=%02x, "
331 "HSCALE_LO=%02x\n", __func__, comb, vscale, hscale);
332 tw_writeb(TW68_SCALE_HI, comb);
333 tw_writeb(TW68_VSCALE_LO, vscale);
334 tw_writeb(TW68_HSCALE_LO, hscale);
335
336 return 0;
337}
338
339/* ------------------------------------------------------------------ */
340
341int tw68_video_start_dma(struct tw68_dev *dev, struct tw68_buf *buf)
342{
343 /* Set cropping and scaling */
344 tw68_set_scale(dev, dev->width, dev->height, dev->field);
345 /*
346 * Set start address for RISC program. Note that if the DMAP
347 * processor is currently running, it must be stopped before
348 * a new address can be set.
349 */
350 tw_clearl(TW68_DMAC, TW68_DMAP_EN);
351 tw_writel(TW68_DMAP_SA, buf->dma);
352 /* Clear any pending interrupts */
353 tw_writel(TW68_INTSTAT, dev->board_virqmask);
354 /* Enable the risc engine and the fifo */
355 tw_andorl(TW68_DMAC, 0xff, dev->fmt->twformat |
356 ColorFormatGamma | TW68_DMAP_EN | TW68_FIFO_EN);
357 dev->pci_irqmask |= dev->board_virqmask;
358 tw_setl(TW68_INTMASK, dev->pci_irqmask);
359 return 0;
360}
361
362/* ------------------------------------------------------------------ */
363
364/* calc max # of buffers from size (must not exceed the 4MB virtual
365 * address space per DMA channel) */
366static int tw68_buffer_count(unsigned int size, unsigned int count)
367{
368 unsigned int maxcount;
369
370 maxcount = (4 * 1024 * 1024) / roundup(size, PAGE_SIZE);
371 if (count > maxcount)
372 count = maxcount;
373 return count;
374}
375
376/* ------------------------------------------------------------- */
377/* vb2 queue operations */
378
379static int tw68_queue_setup(struct vb2_queue *q, const struct v4l2_format *fmt,
380 unsigned int *num_buffers, unsigned int *num_planes,
381 unsigned int sizes[], void *alloc_ctxs[])
382{
383 struct tw68_dev *dev = vb2_get_drv_priv(q);
384 unsigned tot_bufs = q->num_buffers + *num_buffers;
385
386 sizes[0] = (dev->fmt->depth * dev->width * dev->height) >> 3;
387 /*
388 * We allow create_bufs, but only if the sizeimage is the same as the
389 * current sizeimage. The tw68_buffer_count calculation becomes quite
390 * difficult otherwise.
391 */
392 if (fmt && fmt->fmt.pix.sizeimage < sizes[0])
393 return -EINVAL;
394 *num_planes = 1;
395 if (tot_bufs < 2)
396 tot_bufs = 2;
397 tot_bufs = tw68_buffer_count(sizes[0], tot_bufs);
398 *num_buffers = tot_bufs - q->num_buffers;
399
400 return 0;
401}
402
403/*
404 * The risc program for each buffers works as follows: it starts with a simple
405 * 'JUMP to addr + 8', which is effectively a NOP. Then the program to DMA the
406 * buffer follows and at the end we have a JUMP back to the start + 8 (skipping
407 * the initial JUMP).
408 *
409 * This is the program of the first buffer to be queued if the active list is
410 * empty and it just keeps DMAing this buffer without generating any interrupts.
411 *
412 * If a new buffer is added then the initial JUMP in the program generates an
413 * interrupt as well which signals that the previous buffer has been DMAed
414 * successfully and that it can be returned to userspace.
415 *
416 * It also sets the final jump of the previous buffer to the start of the new
417 * buffer, thus chaining the new buffer into the DMA chain. This is a single
418 * atomic u32 write, so there is no race condition.
419 *
420 * The end-result of all this that you only get an interrupt when a buffer
421 * is ready, so the control flow is very easy.
422 */
423static void tw68_buf_queue(struct vb2_buffer *vb)
424{
425 struct vb2_queue *vq = vb->vb2_queue;
426 struct tw68_dev *dev = vb2_get_drv_priv(vq);
427 struct tw68_buf *buf = container_of(vb, struct tw68_buf, vb);
428 struct tw68_buf *prev;
429 unsigned long flags;
430
431 spin_lock_irqsave(&dev->slock, flags);
432
433 /* append a 'JUMP to start of buffer' to the buffer risc program */
434 buf->jmp[0] = cpu_to_le32(RISC_JUMP);
435 buf->jmp[1] = cpu_to_le32(buf->dma + 8);
436
437 if (!list_empty(&dev->active)) {
438 prev = list_entry(dev->active.prev, struct tw68_buf, list);
439 buf->cpu[0] |= cpu_to_le32(RISC_INT_BIT);
440 prev->jmp[1] = cpu_to_le32(buf->dma);
441 }
442 list_add_tail(&buf->list, &dev->active);
443 spin_unlock_irqrestore(&dev->slock, flags);
444}
445
446/*
447 * buffer_prepare
448 *
449 * Set the ancilliary information into the buffer structure. This
450 * includes generating the necessary risc program if it hasn't already
451 * been done for the current buffer format.
452 * The structure fh contains the details of the format requested by the
453 * user - type, width, height and #fields. This is compared with the
454 * last format set for the current buffer. If they differ, the risc
455 * code (which controls the filling of the buffer) is (re-)generated.
456 */
457static int tw68_buf_prepare(struct vb2_buffer *vb)
458{
459 struct vb2_queue *vq = vb->vb2_queue;
460 struct tw68_dev *dev = vb2_get_drv_priv(vq);
461 struct tw68_buf *buf = container_of(vb, struct tw68_buf, vb);
462 struct sg_table *dma = vb2_dma_sg_plane_desc(vb, 0);
463 unsigned size, bpl;
464 int rc;
465
466 size = (dev->width * dev->height * dev->fmt->depth) >> 3;
467 if (vb2_plane_size(vb, 0) < size)
468 return -EINVAL;
469 vb2_set_plane_payload(vb, 0, size);
470
471 rc = dma_map_sg(&dev->pci->dev, dma->sgl, dma->nents, DMA_FROM_DEVICE);
472 if (!rc)
473 return -EIO;
474
475 bpl = (dev->width * dev->fmt->depth) >> 3;
476 switch (dev->field) {
477 case V4L2_FIELD_TOP:
478 tw68_risc_buffer(dev->pci, buf, dma->sgl,
479 0, UNSET, bpl, 0, dev->height);
480 break;
481 case V4L2_FIELD_BOTTOM:
482 tw68_risc_buffer(dev->pci, buf, dma->sgl,
483 UNSET, 0, bpl, 0, dev->height);
484 break;
485 case V4L2_FIELD_SEQ_TB:
486 tw68_risc_buffer(dev->pci, buf, dma->sgl,
487 0, bpl * (dev->height >> 1),
488 bpl, 0, dev->height >> 1);
489 break;
490 case V4L2_FIELD_SEQ_BT:
491 tw68_risc_buffer(dev->pci, buf, dma->sgl,
492 bpl * (dev->height >> 1), 0,
493 bpl, 0, dev->height >> 1);
494 break;
495 case V4L2_FIELD_INTERLACED:
496 default:
497 tw68_risc_buffer(dev->pci, buf, dma->sgl,
498 0, bpl, bpl, bpl, dev->height >> 1);
499 break;
500 }
501 return 0;
502}
503
504static void tw68_buf_finish(struct vb2_buffer *vb)
505{
506 struct vb2_queue *vq = vb->vb2_queue;
507 struct tw68_dev *dev = vb2_get_drv_priv(vq);
508 struct sg_table *dma = vb2_dma_sg_plane_desc(vb, 0);
509 struct tw68_buf *buf = container_of(vb, struct tw68_buf, vb);
510
511 dma_unmap_sg(&dev->pci->dev, dma->sgl, dma->nents, DMA_FROM_DEVICE);
512
513 pci_free_consistent(dev->pci, buf->size, buf->cpu, buf->dma);
514}
515
516static int tw68_start_streaming(struct vb2_queue *q, unsigned int count)
517{
518 struct tw68_dev *dev = vb2_get_drv_priv(q);
519 struct tw68_buf *buf =
520 container_of(dev->active.next, struct tw68_buf, list);
521
522 dev->seqnr = 0;
523 tw68_video_start_dma(dev, buf);
524 return 0;
525}
526
527static void tw68_stop_streaming(struct vb2_queue *q)
528{
529 struct tw68_dev *dev = vb2_get_drv_priv(q);
530
531 /* Stop risc & fifo */
532 tw_clearl(TW68_DMAC, TW68_DMAP_EN | TW68_FIFO_EN);
533 while (!list_empty(&dev->active)) {
534 struct tw68_buf *buf =
535 container_of(dev->active.next, struct tw68_buf, list);
536
537 list_del(&buf->list);
538 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
539 }
540}
541
542static struct vb2_ops tw68_video_qops = {
543 .queue_setup = tw68_queue_setup,
544 .buf_queue = tw68_buf_queue,
545 .buf_prepare = tw68_buf_prepare,
546 .buf_finish = tw68_buf_finish,
547 .start_streaming = tw68_start_streaming,
548 .stop_streaming = tw68_stop_streaming,
549 .wait_prepare = vb2_ops_wait_prepare,
550 .wait_finish = vb2_ops_wait_finish,
551};
552
553/* ------------------------------------------------------------------ */
554
555static int tw68_s_ctrl(struct v4l2_ctrl *ctrl)
556{
557 struct tw68_dev *dev =
558 container_of(ctrl->handler, struct tw68_dev, hdl);
559
560 switch (ctrl->id) {
561 case V4L2_CID_BRIGHTNESS:
562 tw_writeb(TW68_BRIGHT, ctrl->val);
563 break;
564 case V4L2_CID_HUE:
565 tw_writeb(TW68_HUE, ctrl->val);
566 break;
567 case V4L2_CID_CONTRAST:
568 tw_writeb(TW68_CONTRAST, ctrl->val);
569 break;
570 case V4L2_CID_SATURATION:
571 tw_writeb(TW68_SAT_U, ctrl->val);
572 tw_writeb(TW68_SAT_V, ctrl->val);
573 break;
574 case V4L2_CID_COLOR_KILLER:
575 if (ctrl->val)
576 tw_andorb(TW68_MISC2, 0xe0, 0xe0);
577 else
578 tw_andorb(TW68_MISC2, 0xe0, 0x00);
579 break;
580 case V4L2_CID_CHROMA_AGC:
581 if (ctrl->val)
582 tw_andorb(TW68_LOOP, 0x30, 0x20);
583 else
584 tw_andorb(TW68_LOOP, 0x30, 0x00);
585 break;
586 }
587 return 0;
588}
589
590/* ------------------------------------------------------------------ */
591
592/*
593 * Note that this routine returns what is stored in the fh structure, and
594 * does not interrogate any of the device registers.
595 */
596static int tw68_g_fmt_vid_cap(struct file *file, void *priv,
597 struct v4l2_format *f)
598{
599 struct tw68_dev *dev = video_drvdata(file);
600
601 f->fmt.pix.width = dev->width;
602 f->fmt.pix.height = dev->height;
603 f->fmt.pix.field = dev->field;
604 f->fmt.pix.pixelformat = dev->fmt->fourcc;
605 f->fmt.pix.bytesperline =
606 (f->fmt.pix.width * (dev->fmt->depth)) >> 3;
607 f->fmt.pix.sizeimage =
608 f->fmt.pix.height * f->fmt.pix.bytesperline;
609 f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
610 f->fmt.pix.priv = 0;
611 return 0;
612}
613
614static int tw68_try_fmt_vid_cap(struct file *file, void *priv,
615 struct v4l2_format *f)
616{
617 struct tw68_dev *dev = video_drvdata(file);
618 const struct tw68_format *fmt;
619 enum v4l2_field field;
620 unsigned int maxh;
621
622 fmt = format_by_fourcc(f->fmt.pix.pixelformat);
623 if (NULL == fmt)
624 return -EINVAL;
625
626 field = f->fmt.pix.field;
627 maxh = (dev->tvnorm->id & V4L2_STD_525_60) ? 480 : 576;
628
629 switch (field) {
630 case V4L2_FIELD_TOP:
631 case V4L2_FIELD_BOTTOM:
632 break;
633 case V4L2_FIELD_INTERLACED:
634 case V4L2_FIELD_SEQ_BT:
635 case V4L2_FIELD_SEQ_TB:
636 maxh = maxh * 2;
637 break;
638 default:
639 field = (f->fmt.pix.height > maxh / 2)
640 ? V4L2_FIELD_INTERLACED
641 : V4L2_FIELD_BOTTOM;
642 break;
643 }
644
645 f->fmt.pix.field = field;
646 if (f->fmt.pix.width < 48)
647 f->fmt.pix.width = 48;
648 if (f->fmt.pix.height < 32)
649 f->fmt.pix.height = 32;
650 if (f->fmt.pix.width > 720)
651 f->fmt.pix.width = 720;
652 if (f->fmt.pix.height > maxh)
653 f->fmt.pix.height = maxh;
654 f->fmt.pix.width &= ~0x03;
655 f->fmt.pix.bytesperline =
656 (f->fmt.pix.width * (fmt->depth)) >> 3;
657 f->fmt.pix.sizeimage =
658 f->fmt.pix.height * f->fmt.pix.bytesperline;
659 f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
660 return 0;
661}
662
663/*
664 * Note that tw68_s_fmt_vid_cap sets the information into the fh structure,
665 * and it will be used for all future new buffers. However, there could be
666 * some number of buffers on the "active" chain which will be filled before
667 * the change takes place.
668 */
669static int tw68_s_fmt_vid_cap(struct file *file, void *priv,
670 struct v4l2_format *f)
671{
672 struct tw68_dev *dev = video_drvdata(file);
673 int err;
674
675 err = tw68_try_fmt_vid_cap(file, priv, f);
676 if (0 != err)
677 return err;
678
679 dev->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
680 dev->width = f->fmt.pix.width;
681 dev->height = f->fmt.pix.height;
682 dev->field = f->fmt.pix.field;
683 return 0;
684}
685
686static int tw68_enum_input(struct file *file, void *priv,
687 struct v4l2_input *i)
688{
689 struct tw68_dev *dev = video_drvdata(file);
690 unsigned int n;
691
692 n = i->index;
693 if (n >= TW68_INPUT_MAX)
694 return -EINVAL;
695 i->index = n;
696 i->type = V4L2_INPUT_TYPE_CAMERA;
697 snprintf(i->name, sizeof(i->name), "Composite %d", n);
698
699 /* If the query is for the current input, get live data */
700 if (n == dev->input) {
701 int v1 = tw_readb(TW68_STATUS1);
702 int v2 = tw_readb(TW68_MVSN);
703
704 if (0 != (v1 & (1 << 7)))
705 i->status |= V4L2_IN_ST_NO_SYNC;
706 if (0 != (v1 & (1 << 6)))
707 i->status |= V4L2_IN_ST_NO_H_LOCK;
708 if (0 != (v1 & (1 << 2)))
709 i->status |= V4L2_IN_ST_NO_SIGNAL;
710 if (0 != (v1 & 1 << 1))
711 i->status |= V4L2_IN_ST_NO_COLOR;
712 if (0 != (v2 & (1 << 2)))
713 i->status |= V4L2_IN_ST_MACROVISION;
714 }
715 i->std = video_devdata(file)->tvnorms;
716 return 0;
717}
718
719static int tw68_g_input(struct file *file, void *priv, unsigned int *i)
720{
721 struct tw68_dev *dev = video_drvdata(file);
722
723 *i = dev->input;
724 return 0;
725}
726
727static int tw68_s_input(struct file *file, void *priv, unsigned int i)
728{
729 struct tw68_dev *dev = video_drvdata(file);
730
731 if (i >= TW68_INPUT_MAX)
732 return -EINVAL;
733 dev->input = i;
734 tw_andorb(TW68_INFORM, 0x03 << 2, dev->input << 2);
735 return 0;
736}
737
738static int tw68_querycap(struct file *file, void *priv,
739 struct v4l2_capability *cap)
740{
741 struct tw68_dev *dev = video_drvdata(file);
742
743 strcpy(cap->driver, "tw68");
744 strlcpy(cap->card, "Techwell Capture Card",
745 sizeof(cap->card));
746 sprintf(cap->bus_info, "PCI:%s", pci_name(dev->pci));
747 cap->device_caps =
748 V4L2_CAP_VIDEO_CAPTURE |
749 V4L2_CAP_READWRITE |
750 V4L2_CAP_STREAMING;
751
752 cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
753 return 0;
754}
755
756static int tw68_s_std(struct file *file, void *priv, v4l2_std_id id)
757{
758 struct tw68_dev *dev = video_drvdata(file);
759 unsigned int i;
760
761 if (vb2_is_busy(&dev->vidq))
762 return -EBUSY;
763
764 /* Look for match on complete norm id (may have mult bits) */
765 for (i = 0; i < TVNORMS; i++) {
766 if (id == tvnorms[i].id)
767 break;
768 }
769
770 /* If no exact match, look for norm which contains this one */
771 if (i == TVNORMS) {
772 for (i = 0; i < TVNORMS; i++)
773 if (id & tvnorms[i].id)
774 break;
775 }
776 /* If still not matched, give up */
777 if (i == TVNORMS)
778 return -EINVAL;
779
780 set_tvnorm(dev, &tvnorms[i]); /* do the actual setting */
781 return 0;
782}
783
784static int tw68_g_std(struct file *file, void *priv, v4l2_std_id *id)
785{
786 struct tw68_dev *dev = video_drvdata(file);
787
788 *id = dev->tvnorm->id;
789 return 0;
790}
791
792static int tw68_enum_fmt_vid_cap(struct file *file, void *priv,
793 struct v4l2_fmtdesc *f)
794{
795 if (f->index >= FORMATS)
796 return -EINVAL;
797
798 strlcpy(f->description, formats[f->index].name,
799 sizeof(f->description));
800
801 f->pixelformat = formats[f->index].fourcc;
802
803 return 0;
804}
805
806/*
807 * Used strictly for internal development and debugging, this routine
808 * prints out the current register contents for the tw68xx device.
809 */
810static void tw68_dump_regs(struct tw68_dev *dev)
811{
812 unsigned char line[80];
813 int i, j, k;
814 unsigned char *cptr;
815
816 pr_info("Full dump of TW68 registers:\n");
817 /* First we do the PCI regs, 8 4-byte regs per line */
818 for (i = 0; i < 0x100; i += 32) {
819 cptr = line;
820 cptr += sprintf(cptr, "%03x ", i);
821 /* j steps through the next 4 words */
822 for (j = i; j < i + 16; j += 4)
823 cptr += sprintf(cptr, "%08x ", tw_readl(j));
824 *cptr++ = ' ';
825 for (; j < i + 32; j += 4)
826 cptr += sprintf(cptr, "%08x ", tw_readl(j));
827 *cptr++ = '\n';
828 *cptr = 0;
829 pr_info("%s", line);
830 }
831 /* Next the control regs, which are single-byte, address mod 4 */
832 while (i < 0x400) {
833 cptr = line;
834 cptr += sprintf(cptr, "%03x ", i);
835 /* Print out 4 groups of 4 bytes */
836 for (j = 0; j < 4; j++) {
837 for (k = 0; k < 4; k++) {
838 cptr += sprintf(cptr, "%02x ",
839 tw_readb(i));
840 i += 4;
841 }
842 *cptr++ = ' ';
843 }
844 *cptr++ = '\n';
845 *cptr = 0;
846 pr_info("%s", line);
847 }
848}
849
850static int vidioc_log_status(struct file *file, void *priv)
851{
852 struct tw68_dev *dev = video_drvdata(file);
853
854 tw68_dump_regs(dev);
855 return v4l2_ctrl_log_status(file, priv);
856}
857
858#ifdef CONFIG_VIDEO_ADV_DEBUG
859static int vidioc_g_register(struct file *file, void *priv,
860 struct v4l2_dbg_register *reg)
861{
862 struct tw68_dev *dev = video_drvdata(file);
863
864 if (reg->size == 1)
865 reg->val = tw_readb(reg->reg);
866 else
867 reg->val = tw_readl(reg->reg);
868 return 0;
869}
870
871static int vidioc_s_register(struct file *file, void *priv,
872 const struct v4l2_dbg_register *reg)
873{
874 struct tw68_dev *dev = video_drvdata(file);
875
876 if (reg->size == 1)
877 tw_writeb(reg->reg, reg->val);
878 else
879 tw_writel(reg->reg & 0xffff, reg->val);
880 return 0;
881}
882#endif
883
884static const struct v4l2_ctrl_ops tw68_ctrl_ops = {
885 .s_ctrl = tw68_s_ctrl,
886};
887
888static const struct v4l2_file_operations video_fops = {
889 .owner = THIS_MODULE,
890 .open = v4l2_fh_open,
891 .release = vb2_fop_release,
892 .read = vb2_fop_read,
893 .poll = vb2_fop_poll,
894 .mmap = vb2_fop_mmap,
895 .unlocked_ioctl = video_ioctl2,
896};
897
898static const struct v4l2_ioctl_ops video_ioctl_ops = {
899 .vidioc_querycap = tw68_querycap,
900 .vidioc_enum_fmt_vid_cap = tw68_enum_fmt_vid_cap,
901 .vidioc_reqbufs = vb2_ioctl_reqbufs,
902 .vidioc_create_bufs = vb2_ioctl_create_bufs,
903 .vidioc_querybuf = vb2_ioctl_querybuf,
904 .vidioc_qbuf = vb2_ioctl_qbuf,
905 .vidioc_dqbuf = vb2_ioctl_dqbuf,
906 .vidioc_s_std = tw68_s_std,
907 .vidioc_g_std = tw68_g_std,
908 .vidioc_enum_input = tw68_enum_input,
909 .vidioc_g_input = tw68_g_input,
910 .vidioc_s_input = tw68_s_input,
911 .vidioc_streamon = vb2_ioctl_streamon,
912 .vidioc_streamoff = vb2_ioctl_streamoff,
913 .vidioc_g_fmt_vid_cap = tw68_g_fmt_vid_cap,
914 .vidioc_try_fmt_vid_cap = tw68_try_fmt_vid_cap,
915 .vidioc_s_fmt_vid_cap = tw68_s_fmt_vid_cap,
916 .vidioc_log_status = vidioc_log_status,
917 .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
918 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
919#ifdef CONFIG_VIDEO_ADV_DEBUG
920 .vidioc_g_register = vidioc_g_register,
921 .vidioc_s_register = vidioc_s_register,
922#endif
923};
924
925static struct video_device tw68_video_template = {
926 .name = "tw68_video",
927 .fops = &video_fops,
928 .ioctl_ops = &video_ioctl_ops,
929 .release = video_device_release_empty,
930 .tvnorms = TW68_NORMS,
931};
932
933/* ------------------------------------------------------------------ */
934/* exported stuff */
935void tw68_set_tvnorm_hw(struct tw68_dev *dev)
936{
937 tw_andorb(TW68_SDT, 0x07, dev->tvnorm->format);
938}
939
940int tw68_video_init1(struct tw68_dev *dev)
941{
942 struct v4l2_ctrl_handler *hdl = &dev->hdl;
943
944 v4l2_ctrl_handler_init(hdl, 6);
945 v4l2_ctrl_new_std(hdl, &tw68_ctrl_ops,
946 V4L2_CID_BRIGHTNESS, -128, 127, 1, 20);
947 v4l2_ctrl_new_std(hdl, &tw68_ctrl_ops,
948 V4L2_CID_CONTRAST, 0, 255, 1, 100);
949 v4l2_ctrl_new_std(hdl, &tw68_ctrl_ops,
950 V4L2_CID_SATURATION, 0, 255, 1, 128);
951 /* NTSC only */
952 v4l2_ctrl_new_std(hdl, &tw68_ctrl_ops,
953 V4L2_CID_HUE, -128, 127, 1, 0);
954 v4l2_ctrl_new_std(hdl, &tw68_ctrl_ops,
955 V4L2_CID_COLOR_KILLER, 0, 1, 1, 0);
956 v4l2_ctrl_new_std(hdl, &tw68_ctrl_ops,
957 V4L2_CID_CHROMA_AGC, 0, 1, 1, 1);
958 if (hdl->error) {
959 v4l2_ctrl_handler_free(hdl);
960 return hdl->error;
961 }
962 dev->v4l2_dev.ctrl_handler = hdl;
963 v4l2_ctrl_handler_setup(hdl);
964 return 0;
965}
966
967int tw68_video_init2(struct tw68_dev *dev, int video_nr)
968{
969 int ret;
970
971 set_tvnorm(dev, &tvnorms[0]);
972
973 dev->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
974 dev->width = 720;
975 dev->height = 576;
976 dev->field = V4L2_FIELD_INTERLACED;
977
978 INIT_LIST_HEAD(&dev->active);
979 dev->vidq.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
980 dev->vidq.timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
981 dev->vidq.io_modes = VB2_MMAP | VB2_USERPTR | VB2_READ | VB2_DMABUF;
982 dev->vidq.ops = &tw68_video_qops;
983 dev->vidq.mem_ops = &vb2_dma_sg_memops;
984 dev->vidq.drv_priv = dev;
985 dev->vidq.gfp_flags = __GFP_DMA32;
986 dev->vidq.buf_struct_size = sizeof(struct tw68_buf);
987 dev->vidq.lock = &dev->lock;
988 dev->vidq.min_buffers_needed = 2;
989 ret = vb2_queue_init(&dev->vidq);
990 if (ret)
991 return ret;
992 dev->vdev = tw68_video_template;
993 dev->vdev.v4l2_dev = &dev->v4l2_dev;
994 dev->vdev.lock = &dev->lock;
995 dev->vdev.queue = &dev->vidq;
996 video_set_drvdata(&dev->vdev, dev);
997 return video_register_device(&dev->vdev, VFL_TYPE_GRABBER, video_nr);
998}
999
1000/*
1001 * tw68_irq_video_done
1002 */
1003void tw68_irq_video_done(struct tw68_dev *dev, unsigned long status)
1004{
1005 __u32 reg;
1006
1007 /* reset interrupts handled by this routine */
1008 tw_writel(TW68_INTSTAT, status);
1009 /*
1010 * Check most likely first
1011 *
1012 * DMAPI shows we have reached the end of the risc code
1013 * for the current buffer.
1014 */
1015 if (status & TW68_DMAPI) {
1016 struct tw68_buf *buf;
1017
1018 spin_lock(&dev->slock);
1019 buf = list_entry(dev->active.next, struct tw68_buf, list);
1020 list_del(&buf->list);
1021 spin_unlock(&dev->slock);
1022 v4l2_get_timestamp(&buf->vb.v4l2_buf.timestamp);
1023 buf->vb.v4l2_buf.field = dev->field;
1024 buf->vb.v4l2_buf.sequence = dev->seqnr++;
1025 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_DONE);
1026 status &= ~(TW68_DMAPI);
1027 if (0 == status)
1028 return;
1029 }
1030 if (status & (TW68_VLOCK | TW68_HLOCK))
1031 dev_dbg(&dev->pci->dev, "Lost sync\n");
1032 if (status & TW68_PABORT)
1033 dev_err(&dev->pci->dev, "PABORT interrupt\n");
1034 if (status & TW68_DMAPERR)
1035 dev_err(&dev->pci->dev, "DMAPERR interrupt\n");
1036 /*
1037 * On TW6800, FDMIS is apparently generated if video input is switched
1038 * during operation. Therefore, it is not enabled for that chip.
1039 */
1040 if (status & TW68_FDMIS)
1041 dev_dbg(&dev->pci->dev, "FDMIS interrupt\n");
1042 if (status & TW68_FFOF) {
1043 /* probably a logic error */
1044 reg = tw_readl(TW68_DMAC) & TW68_FIFO_EN;
1045 tw_clearl(TW68_DMAC, TW68_FIFO_EN);
1046 dev_dbg(&dev->pci->dev, "FFOF interrupt\n");
1047 tw_setl(TW68_DMAC, reg);
1048 }
1049 if (status & TW68_FFERR)
1050 dev_dbg(&dev->pci->dev, "FFERR interrupt\n");
1051}
diff --git a/drivers/media/pci/tw68/tw68.h b/drivers/media/pci/tw68/tw68.h
new file mode 100644
index 000000000000..2c8abe26b13b
--- /dev/null
+++ b/drivers/media/pci/tw68/tw68.h
@@ -0,0 +1,231 @@
1/*
2 * tw68 driver common header file
3 *
4 * Much of this code is derived from the cx88 and sa7134 drivers, which
5 * were in turn derived from the bt87x driver. The original work was by
6 * Gerd Knorr; more recently the code was enhanced by Mauro Carvalho Chehab,
7 * Hans Verkuil, Andy Walls and many others. Their work is gratefully
8 * acknowledged. Full credit goes to them - any problems within this code
9 * are mine.
10 *
11 * Copyright (C) 2009 William M. Brack
12 *
13 * Refactored and updated to the latest v4l core frameworks:
14 *
15 * Copyright (C) 2014 Hans Verkuil <hverkuil@xs4all.nl>
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License as published by
19 * the Free Software Foundation; either version 2 of the License, or
20 * (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 */
27
28#include <linux/version.h>
29#include <linux/pci.h>
30#include <linux/videodev2.h>
31#include <linux/notifier.h>
32#include <linux/delay.h>
33#include <linux/mutex.h>
34#include <linux/io.h>
35
36#include <media/v4l2-common.h>
37#include <media/v4l2-ioctl.h>
38#include <media/v4l2-ctrls.h>
39#include <media/v4l2-device.h>
40#include <media/videobuf2-dma-sg.h>
41
42#include "tw68-reg.h"
43
44#define UNSET (-1U)
45
46/* system vendor and device ID's */
47#define PCI_VENDOR_ID_TECHWELL 0x1797
48#define PCI_DEVICE_ID_6800 0x6800
49#define PCI_DEVICE_ID_6801 0x6801
50#define PCI_DEVICE_ID_AUDIO2 0x6802
51#define PCI_DEVICE_ID_TS3 0x6803
52#define PCI_DEVICE_ID_6804 0x6804
53#define PCI_DEVICE_ID_AUDIO5 0x6805
54#define PCI_DEVICE_ID_TS6 0x6806
55
56/* tw6816 based cards */
57#define PCI_DEVICE_ID_6816_1 0x6810
58#define PCI_DEVICE_ID_6816_2 0x6811
59#define PCI_DEVICE_ID_6816_3 0x6812
60#define PCI_DEVICE_ID_6816_4 0x6813
61
62#define TW68_NORMS ( \
63 V4L2_STD_NTSC | V4L2_STD_PAL | V4L2_STD_SECAM | \
64 V4L2_STD_PAL_M | V4L2_STD_PAL_Nc | V4L2_STD_PAL_60)
65
66#define TW68_VID_INTS (TW68_FFERR | TW68_PABORT | TW68_DMAPERR | \
67 TW68_FFOF | TW68_DMAPI)
68/* TW6800 chips have trouble with these, so we don't set them for that chip */
69#define TW68_VID_INTSX (TW68_FDMIS | TW68_HLOCK | TW68_VLOCK)
70
71#define TW68_I2C_INTS (TW68_SBERR | TW68_SBDONE | TW68_SBERR2 | \
72 TW68_SBDONE2)
73
74enum tw68_decoder_type {
75 TW6800,
76 TW6801,
77 TW6804,
78 TWXXXX,
79};
80
81/* ----------------------------------------------------------- */
82/* static data */
83
84struct tw68_tvnorm {
85 char *name;
86 v4l2_std_id id;
87
88 /* video decoder */
89 u32 sync_control;
90 u32 luma_control;
91 u32 chroma_ctrl1;
92 u32 chroma_gain;
93 u32 chroma_ctrl2;
94 u32 vgate_misc;
95
96 /* video scaler */
97 u32 h_delay;
98 u32 h_delay0; /* for TW6800 */
99 u32 h_start;
100 u32 h_stop;
101 u32 v_delay;
102 u32 video_v_start;
103 u32 video_v_stop;
104 u32 vbi_v_start_0;
105 u32 vbi_v_stop_0;
106 u32 vbi_v_start_1;
107
108 /* Techwell specific */
109 u32 format;
110};
111
112struct tw68_format {
113 char *name;
114 u32 fourcc;
115 u32 depth;
116 u32 twformat;
117};
118
119/* ----------------------------------------------------------- */
120/* card configuration */
121
122#define TW68_BOARD_NOAUTO UNSET
123#define TW68_BOARD_UNKNOWN 0
124#define TW68_BOARD_GENERIC_6802 1
125
126#define TW68_MAXBOARDS 16
127#define TW68_INPUT_MAX 4
128
129/* ----------------------------------------------------------- */
130/* device / file handle status */
131
132#define BUFFER_TIMEOUT msecs_to_jiffies(500) /* 0.5 seconds */
133
134struct tw68_dev; /* forward delclaration */
135
136/* buffer for one video/vbi/ts frame */
137struct tw68_buf {
138 struct vb2_buffer vb;
139 struct list_head list;
140
141 unsigned int size;
142 __le32 *cpu;
143 __le32 *jmp;
144 dma_addr_t dma;
145};
146
147struct tw68_fmt {
148 char *name;
149 u32 fourcc; /* v4l2 format id */
150 int depth;
151 int flags;
152 u32 twformat;
153};
154
155/* global device status */
156struct tw68_dev {
157 struct mutex lock;
158 spinlock_t slock;
159 u16 instance;
160 struct v4l2_device v4l2_dev;
161
162 /* various device info */
163 enum tw68_decoder_type vdecoder;
164 struct video_device vdev;
165 struct v4l2_ctrl_handler hdl;
166
167 /* pci i/o */
168 char *name;
169 struct pci_dev *pci;
170 unsigned char pci_rev, pci_lat;
171 u32 __iomem *lmmio;
172 u8 __iomem *bmmio;
173 u32 pci_irqmask;
174 /* The irq mask to be used will depend upon the chip type */
175 u32 board_virqmask;
176
177 /* video capture */
178 const struct tw68_format *fmt;
179 unsigned width, height;
180 unsigned seqnr;
181 unsigned field;
182 struct vb2_queue vidq;
183 struct list_head active;
184
185 /* various v4l controls */
186 const struct tw68_tvnorm *tvnorm; /* video */
187
188 int input;
189};
190
191/* ----------------------------------------------------------- */
192
193#define tw_readl(reg) readl(dev->lmmio + ((reg) >> 2))
194#define tw_readb(reg) readb(dev->bmmio + (reg))
195#define tw_writel(reg, value) writel((value), dev->lmmio + ((reg) >> 2))
196#define tw_writeb(reg, value) writeb((value), dev->bmmio + (reg))
197
198#define tw_andorl(reg, mask, value) \
199 writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
200 ((value) & (mask)), dev->lmmio+((reg)>>2))
201#define tw_andorb(reg, mask, value) \
202 writeb((readb(dev->bmmio + (reg)) & ~(mask)) |\
203 ((value) & (mask)), dev->bmmio+(reg))
204#define tw_setl(reg, bit) tw_andorl((reg), (bit), (bit))
205#define tw_setb(reg, bit) tw_andorb((reg), (bit), (bit))
206#define tw_clearl(reg, bit) \
207 writel((readl(dev->lmmio + ((reg) >> 2)) & ~(bit)), \
208 dev->lmmio + ((reg) >> 2))
209#define tw_clearb(reg, bit) \
210 writeb((readb(dev->bmmio+(reg)) & ~(bit)), \
211 dev->bmmio + (reg))
212
213#define tw_wait(us) { udelay(us); }
214
215/* ----------------------------------------------------------- */
216/* tw68-video.c */
217
218void tw68_set_tvnorm_hw(struct tw68_dev *dev);
219
220int tw68_video_init1(struct tw68_dev *dev);
221int tw68_video_init2(struct tw68_dev *dev, int video_nr);
222void tw68_irq_video_done(struct tw68_dev *dev, unsigned long status);
223int tw68_video_start_dma(struct tw68_dev *dev, struct tw68_buf *buf);
224
225/* ----------------------------------------------------------- */
226/* tw68-risc.c */
227
228int tw68_risc_buffer(struct pci_dev *pci, struct tw68_buf *buf,
229 struct scatterlist *sglist, unsigned int top_offset,
230 unsigned int bottom_offset, unsigned int bpl,
231 unsigned int padding, unsigned int lines);
diff --git a/drivers/media/pci/zoran/zoran_device.c b/drivers/media/pci/zoran/zoran_device.c
index bf34b93f23ee..b6801e035ea4 100644
--- a/drivers/media/pci/zoran/zoran_device.c
+++ b/drivers/media/pci/zoran/zoran_device.c
@@ -682,7 +682,7 @@ set_videobus_dir (struct zoran *zr,
682 switch (zr->card.type) { 682 switch (zr->card.type) {
683 case LML33: 683 case LML33:
684 case LML33R10: 684 case LML33R10:
685 if (lml33dpath == 0) 685 if (!lml33dpath)
686 GPIO(zr, 5, val); 686 GPIO(zr, 5, val);
687 else 687 else
688 GPIO(zr, 5, 1); 688 GPIO(zr, 5, 1);
diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig
index 6d86646d9743..bee9074ebc13 100644
--- a/drivers/media/platform/Kconfig
+++ b/drivers/media/platform/Kconfig
@@ -56,7 +56,8 @@ config VIDEO_VIU
56 56
57config VIDEO_TIMBERDALE 57config VIDEO_TIMBERDALE
58 tristate "Support for timberdale Video In/LogiWIN" 58 tristate "Support for timberdale Video In/LogiWIN"
59 depends on MFD_TIMBERDALE && VIDEO_V4L2 && I2C && DMADEVICES 59 depends on VIDEO_V4L2 && I2C && DMADEVICES
60 depends on MFD_TIMBERDALE || COMPILE_TEST
60 select DMA_ENGINE 61 select DMA_ENGINE
61 select TIMB_DMA 62 select TIMB_DMA
62 select VIDEO_ADV7180 63 select VIDEO_ADV7180
@@ -74,7 +75,8 @@ config VIDEO_VINO
74 75
75config VIDEO_M32R_AR 76config VIDEO_M32R_AR
76 tristate "AR devices" 77 tristate "AR devices"
77 depends on M32R && VIDEO_V4L2 78 depends on VIDEO_V4L2
79 depends on M32R || COMPILE_TEST
78 ---help--- 80 ---help---
79 This is a video4linux driver for the Renesas AR (Artificial Retina) 81 This is a video4linux driver for the Renesas AR (Artificial Retina)
80 camera module. 82 camera module.
@@ -94,6 +96,7 @@ config VIDEO_M32R_AR_M64278
94config VIDEO_OMAP3 96config VIDEO_OMAP3
95 tristate "OMAP 3 Camera support" 97 tristate "OMAP 3 Camera support"
96 depends on VIDEO_V4L2 && I2C && VIDEO_V4L2_SUBDEV_API && ARCH_OMAP3 98 depends on VIDEO_V4L2 && I2C && VIDEO_V4L2_SUBDEV_API && ARCH_OMAP3
99 depends on HAS_DMA
97 select ARM_DMA_USE_IOMMU 100 select ARM_DMA_USE_IOMMU
98 select OMAP_IOMMU 101 select OMAP_IOMMU
99 select VIDEOBUF2_DMA_CONTIG 102 select VIDEOBUF2_DMA_CONTIG
@@ -109,7 +112,9 @@ config VIDEO_OMAP3_DEBUG
109config VIDEO_S3C_CAMIF 112config VIDEO_S3C_CAMIF
110 tristate "Samsung S3C24XX/S3C64XX SoC Camera Interface driver" 113 tristate "Samsung S3C24XX/S3C64XX SoC Camera Interface driver"
111 depends on VIDEO_V4L2 && I2C && VIDEO_V4L2_SUBDEV_API 114 depends on VIDEO_V4L2 && I2C && VIDEO_V4L2_SUBDEV_API
112 depends on (ARCH_S3C64XX || PLAT_S3C24XX) && PM_RUNTIME 115 depends on PM_RUNTIME
116 depends on ARCH_S3C64XX || PLAT_S3C24XX || COMPILE_TEST
117 depends on HAS_DMA
113 select VIDEOBUF2_DMA_CONTIG 118 select VIDEOBUF2_DMA_CONTIG
114 ---help--- 119 ---help---
115 This is a v4l2 driver for s3c24xx and s3c64xx SoC series camera 120 This is a v4l2 driver for s3c24xx and s3c64xx SoC series camera
@@ -140,6 +145,7 @@ if V4L_MEM2MEM_DRIVERS
140config VIDEO_CODA 145config VIDEO_CODA
141 tristate "Chips&Media Coda multi-standard codec IP" 146 tristate "Chips&Media Coda multi-standard codec IP"
142 depends on VIDEO_DEV && VIDEO_V4L2 && ARCH_MXC 147 depends on VIDEO_DEV && VIDEO_V4L2 && ARCH_MXC
148 depends on HAS_DMA
143 select SRAM 149 select SRAM
144 select VIDEOBUF2_DMA_CONTIG 150 select VIDEOBUF2_DMA_CONTIG
145 select V4L2_MEM2MEM_DEV 151 select V4L2_MEM2MEM_DEV
@@ -151,6 +157,7 @@ config VIDEO_CODA
151config VIDEO_MEM2MEM_DEINTERLACE 157config VIDEO_MEM2MEM_DEINTERLACE
152 tristate "Deinterlace support" 158 tristate "Deinterlace support"
153 depends on VIDEO_DEV && VIDEO_V4L2 && DMA_ENGINE 159 depends on VIDEO_DEV && VIDEO_V4L2 && DMA_ENGINE
160 depends on HAS_DMA
154 select VIDEOBUF2_DMA_CONTIG 161 select VIDEOBUF2_DMA_CONTIG
155 select V4L2_MEM2MEM_DEV 162 select V4L2_MEM2MEM_DEV
156 help 163 help
@@ -158,7 +165,9 @@ config VIDEO_MEM2MEM_DEINTERLACE
158 165
159config VIDEO_SAMSUNG_S5P_G2D 166config VIDEO_SAMSUNG_S5P_G2D
160 tristate "Samsung S5P and EXYNOS4 G2D 2d graphics accelerator driver" 167 tristate "Samsung S5P and EXYNOS4 G2D 2d graphics accelerator driver"
161 depends on VIDEO_DEV && VIDEO_V4L2 && (PLAT_S5P || ARCH_EXYNOS) 168 depends on VIDEO_DEV && VIDEO_V4L2
169 depends on PLAT_S5P || ARCH_EXYNOS || COMPILE_TEST
170 depends on HAS_DMA
162 select VIDEOBUF2_DMA_CONTIG 171 select VIDEOBUF2_DMA_CONTIG
163 select V4L2_MEM2MEM_DEV 172 select V4L2_MEM2MEM_DEV
164 default n 173 default n
@@ -168,7 +177,9 @@ config VIDEO_SAMSUNG_S5P_G2D
168 177
169config VIDEO_SAMSUNG_S5P_JPEG 178config VIDEO_SAMSUNG_S5P_JPEG
170 tristate "Samsung S5P/Exynos3250/Exynos4 JPEG codec driver" 179 tristate "Samsung S5P/Exynos3250/Exynos4 JPEG codec driver"
171 depends on VIDEO_DEV && VIDEO_V4L2 && (PLAT_S5P || ARCH_EXYNOS) 180 depends on VIDEO_DEV && VIDEO_V4L2
181 depends on PLAT_S5P || ARCH_EXYNOS || COMPILE_TEST
182 depends on HAS_DMA
172 select VIDEOBUF2_DMA_CONTIG 183 select VIDEOBUF2_DMA_CONTIG
173 select V4L2_MEM2MEM_DEV 184 select V4L2_MEM2MEM_DEV
174 ---help--- 185 ---help---
@@ -177,7 +188,9 @@ config VIDEO_SAMSUNG_S5P_JPEG
177 188
178config VIDEO_SAMSUNG_S5P_MFC 189config VIDEO_SAMSUNG_S5P_MFC
179 tristate "Samsung S5P MFC Video Codec" 190 tristate "Samsung S5P MFC Video Codec"
180 depends on VIDEO_DEV && VIDEO_V4L2 && (PLAT_S5P || ARCH_EXYNOS) 191 depends on VIDEO_DEV && VIDEO_V4L2
192 depends on PLAT_S5P || ARCH_EXYNOS || COMPILE_TEST
193 depends on HAS_DMA
181 select VIDEOBUF2_DMA_CONTIG 194 select VIDEOBUF2_DMA_CONTIG
182 default n 195 default n
183 help 196 help
@@ -185,7 +198,9 @@ config VIDEO_SAMSUNG_S5P_MFC
185 198
186config VIDEO_MX2_EMMAPRP 199config VIDEO_MX2_EMMAPRP
187 tristate "MX2 eMMa-PrP support" 200 tristate "MX2 eMMa-PrP support"
188 depends on VIDEO_DEV && VIDEO_V4L2 && SOC_IMX27 201 depends on VIDEO_DEV && VIDEO_V4L2
202 depends on SOC_IMX27 || COMPILE_TEST
203 depends on HAS_DMA
189 select VIDEOBUF2_DMA_CONTIG 204 select VIDEOBUF2_DMA_CONTIG
190 select V4L2_MEM2MEM_DEV 205 select V4L2_MEM2MEM_DEV
191 help 206 help
@@ -195,7 +210,9 @@ config VIDEO_MX2_EMMAPRP
195 210
196config VIDEO_SAMSUNG_EXYNOS_GSC 211config VIDEO_SAMSUNG_EXYNOS_GSC
197 tristate "Samsung Exynos G-Scaler driver" 212 tristate "Samsung Exynos G-Scaler driver"
198 depends on VIDEO_DEV && VIDEO_V4L2 && ARCH_EXYNOS5 213 depends on VIDEO_DEV && VIDEO_V4L2
214 depends on ARCH_EXYNOS5 || COMPILE_TEST
215 depends on HAS_DMA
199 select VIDEOBUF2_DMA_CONTIG 216 select VIDEOBUF2_DMA_CONTIG
200 select V4L2_MEM2MEM_DEV 217 select V4L2_MEM2MEM_DEV
201 help 218 help
@@ -204,6 +221,7 @@ config VIDEO_SAMSUNG_EXYNOS_GSC
204config VIDEO_SH_VEU 221config VIDEO_SH_VEU
205 tristate "SuperH VEU mem2mem video processing driver" 222 tristate "SuperH VEU mem2mem video processing driver"
206 depends on VIDEO_DEV && VIDEO_V4L2 && HAS_DMA 223 depends on VIDEO_DEV && VIDEO_V4L2 && HAS_DMA
224 depends on HAS_DMA
207 select VIDEOBUF2_DMA_CONTIG 225 select VIDEOBUF2_DMA_CONTIG
208 select V4L2_MEM2MEM_DEV 226 select V4L2_MEM2MEM_DEV
209 help 227 help
@@ -213,6 +231,7 @@ config VIDEO_SH_VEU
213config VIDEO_RENESAS_VSP1 231config VIDEO_RENESAS_VSP1
214 tristate "Renesas VSP1 Video Processing Engine" 232 tristate "Renesas VSP1 Video Processing Engine"
215 depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API && HAS_DMA 233 depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API && HAS_DMA
234 depends on ARCH_SHMOBILE || COMPILE_TEST
216 select VIDEOBUF2_DMA_CONTIG 235 select VIDEOBUF2_DMA_CONTIG
217 ---help--- 236 ---help---
218 This is a V4L2 driver for the Renesas VSP1 video processing engine. 237 This is a V4L2 driver for the Renesas VSP1 video processing engine.
@@ -222,7 +241,9 @@ config VIDEO_RENESAS_VSP1
222 241
223config VIDEO_TI_VPE 242config VIDEO_TI_VPE
224 tristate "TI VPE (Video Processing Engine) driver" 243 tristate "TI VPE (Video Processing Engine) driver"
225 depends on VIDEO_DEV && VIDEO_V4L2 && SOC_DRA7XX 244 depends on VIDEO_DEV && VIDEO_V4L2
245 depends on SOC_DRA7XX || COMPILE_TEST
246 depends on HAS_DMA
226 select VIDEOBUF2_DMA_CONTIG 247 select VIDEOBUF2_DMA_CONTIG
227 select V4L2_MEM2MEM_DEV 248 select V4L2_MEM2MEM_DEV
228 default n 249 default n
@@ -243,19 +264,8 @@ menuconfig V4L_TEST_DRIVERS
243 depends on MEDIA_CAMERA_SUPPORT 264 depends on MEDIA_CAMERA_SUPPORT
244 265
245if V4L_TEST_DRIVERS 266if V4L_TEST_DRIVERS
246config VIDEO_VIVI 267
247 tristate "Virtual Video Driver" 268source "drivers/media/platform/vivid/Kconfig"
248 depends on VIDEO_DEV && VIDEO_V4L2 && !SPARC32 && !SPARC64
249 select FONT_SUPPORT
250 select FONT_8x16
251 select VIDEOBUF2_VMALLOC
252 default n
253 ---help---
254 Enables a virtual video driver. This device shows a color bar
255 and a timestamp, as a real device would generate by using V4L2
256 api.
257 Say Y here if you want to test video apps or debug V4L devices.
258 In doubt, say N.
259 269
260config VIDEO_MEM2MEM_TESTDEV 270config VIDEO_MEM2MEM_TESTDEV
261 tristate "Virtual test device for mem2mem framework" 271 tristate "Virtual test device for mem2mem framework"
diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile
index e5269da91906..579046bc276f 100644
--- a/drivers/media/platform/Makefile
+++ b/drivers/media/platform/Makefile
@@ -15,14 +15,14 @@ obj-$(CONFIG_VIDEO_MMP_CAMERA) += marvell-ccic/
15obj-$(CONFIG_VIDEO_OMAP3) += omap3isp/ 15obj-$(CONFIG_VIDEO_OMAP3) += omap3isp/
16 16
17obj-$(CONFIG_VIDEO_VIU) += fsl-viu.o 17obj-$(CONFIG_VIDEO_VIU) += fsl-viu.o
18obj-$(CONFIG_VIDEO_VIVI) += vivi.o
19 18
19obj-$(CONFIG_VIDEO_VIVID) += vivid/
20obj-$(CONFIG_VIDEO_MEM2MEM_TESTDEV) += mem2mem_testdev.o 20obj-$(CONFIG_VIDEO_MEM2MEM_TESTDEV) += mem2mem_testdev.o
21 21
22obj-$(CONFIG_VIDEO_TI_VPE) += ti-vpe/ 22obj-$(CONFIG_VIDEO_TI_VPE) += ti-vpe/
23 23
24obj-$(CONFIG_VIDEO_MX2_EMMAPRP) += mx2_emmaprp.o 24obj-$(CONFIG_VIDEO_MX2_EMMAPRP) += mx2_emmaprp.o
25obj-$(CONFIG_VIDEO_CODA) += coda.o 25obj-$(CONFIG_VIDEO_CODA) += coda/
26 26
27obj-$(CONFIG_VIDEO_SH_VEU) += sh_veu.o 27obj-$(CONFIG_VIDEO_SH_VEU) += sh_veu.o
28 28
@@ -47,8 +47,6 @@ obj-$(CONFIG_SOC_CAMERA) += soc_camera/
47 47
48obj-$(CONFIG_VIDEO_RENESAS_VSP1) += vsp1/ 48obj-$(CONFIG_VIDEO_RENESAS_VSP1) += vsp1/
49 49
50obj-y += davinci/ 50obj-y += omap/
51
52obj-$(CONFIG_ARCH_OMAP) += omap/
53 51
54ccflags-y += -I$(srctree)/drivers/media/i2c 52ccflags-y += -I$(srctree)/drivers/media/i2c
diff --git a/drivers/media/platform/blackfin/Kconfig b/drivers/media/platform/blackfin/Kconfig
index cc239972fa2c..68fa90151b8f 100644
--- a/drivers/media/platform/blackfin/Kconfig
+++ b/drivers/media/platform/blackfin/Kconfig
@@ -1,6 +1,7 @@
1config VIDEO_BLACKFIN_CAPTURE 1config VIDEO_BLACKFIN_CAPTURE
2 tristate "Blackfin Video Capture Driver" 2 tristate "Blackfin Video Capture Driver"
3 depends on VIDEO_V4L2 && BLACKFIN && I2C 3 depends on VIDEO_V4L2 && BLACKFIN && I2C
4 depends on HAS_DMA
4 select VIDEOBUF2_DMA_CONTIG 5 select VIDEOBUF2_DMA_CONTIG
5 help 6 help
6 V4L2 bridge driver for Blackfin video capture device. 7 V4L2 bridge driver for Blackfin video capture device.
diff --git a/drivers/media/platform/coda.c b/drivers/media/platform/coda.c
deleted file mode 100644
index 3a6d1d2b429e..000000000000
--- a/drivers/media/platform/coda.c
+++ /dev/null
@@ -1,3933 +0,0 @@
1/*
2 * Coda multi-standard codec IP
3 *
4 * Copyright (C) 2012 Vista Silicon S.L.
5 * Javier Martin, <javier.martin@vista-silicon.com>
6 * Xavier Duret
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#include <linux/clk.h>
15#include <linux/debugfs.h>
16#include <linux/delay.h>
17#include <linux/firmware.h>
18#include <linux/genalloc.h>
19#include <linux/interrupt.h>
20#include <linux/io.h>
21#include <linux/irq.h>
22#include <linux/kfifo.h>
23#include <linux/module.h>
24#include <linux/of_device.h>
25#include <linux/platform_device.h>
26#include <linux/pm_runtime.h>
27#include <linux/slab.h>
28#include <linux/videodev2.h>
29#include <linux/of.h>
30#include <linux/platform_data/coda.h>
31#include <linux/reset.h>
32
33#include <media/v4l2-ctrls.h>
34#include <media/v4l2-device.h>
35#include <media/v4l2-event.h>
36#include <media/v4l2-ioctl.h>
37#include <media/v4l2-mem2mem.h>
38#include <media/videobuf2-core.h>
39#include <media/videobuf2-dma-contig.h>
40
41#include "coda.h"
42
43#define CODA_NAME "coda"
44
45#define CODADX6_MAX_INSTANCES 4
46
47#define CODA_PARA_BUF_SIZE (10 * 1024)
48#define CODA_ISRAM_SIZE (2048 * 2)
49
50#define CODA7_PS_BUF_SIZE 0x28000
51#define CODA9_PS_SAVE_SIZE (512 * 1024)
52
53#define CODA_MAX_FRAMEBUFFERS 8
54
55#define CODA_MAX_FRAME_SIZE 0x100000
56#define FMO_SLICE_SAVE_BUF_SIZE (32)
57#define CODA_DEFAULT_GAMMA 4096
58#define CODA9_DEFAULT_GAMMA 24576 /* 0.75 * 32768 */
59
60#define MIN_W 176
61#define MIN_H 144
62
63#define S_ALIGN 1 /* multiple of 2 */
64#define W_ALIGN 1 /* multiple of 2 */
65#define H_ALIGN 1 /* multiple of 2 */
66
67#define fh_to_ctx(__fh) container_of(__fh, struct coda_ctx, fh)
68
69static int coda_debug;
70module_param(coda_debug, int, 0644);
71MODULE_PARM_DESC(coda_debug, "Debug level (0-1)");
72
73enum {
74 V4L2_M2M_SRC = 0,
75 V4L2_M2M_DST = 1,
76};
77
78enum coda_inst_type {
79 CODA_INST_ENCODER,
80 CODA_INST_DECODER,
81};
82
83enum coda_product {
84 CODA_DX6 = 0xf001,
85 CODA_7541 = 0xf012,
86 CODA_960 = 0xf020,
87};
88
89struct coda_fmt {
90 char *name;
91 u32 fourcc;
92};
93
94struct coda_codec {
95 u32 mode;
96 u32 src_fourcc;
97 u32 dst_fourcc;
98 u32 max_w;
99 u32 max_h;
100};
101
102struct coda_devtype {
103 char *firmware;
104 enum coda_product product;
105 struct coda_codec *codecs;
106 unsigned int num_codecs;
107 size_t workbuf_size;
108 size_t tempbuf_size;
109 size_t iram_size;
110};
111
112/* Per-queue, driver-specific private data */
113struct coda_q_data {
114 unsigned int width;
115 unsigned int height;
116 unsigned int bytesperline;
117 unsigned int sizeimage;
118 unsigned int fourcc;
119 struct v4l2_rect rect;
120};
121
122struct coda_aux_buf {
123 void *vaddr;
124 dma_addr_t paddr;
125 u32 size;
126 struct debugfs_blob_wrapper blob;
127 struct dentry *dentry;
128};
129
130struct coda_dev {
131 struct v4l2_device v4l2_dev;
132 struct video_device vfd;
133 struct platform_device *plat_dev;
134 const struct coda_devtype *devtype;
135
136 void __iomem *regs_base;
137 struct clk *clk_per;
138 struct clk *clk_ahb;
139 struct reset_control *rstc;
140
141 struct coda_aux_buf codebuf;
142 struct coda_aux_buf tempbuf;
143 struct coda_aux_buf workbuf;
144 struct gen_pool *iram_pool;
145 struct coda_aux_buf iram;
146
147 spinlock_t irqlock;
148 struct mutex dev_mutex;
149 struct mutex coda_mutex;
150 struct workqueue_struct *workqueue;
151 struct v4l2_m2m_dev *m2m_dev;
152 struct vb2_alloc_ctx *alloc_ctx;
153 struct list_head instances;
154 unsigned long instance_mask;
155 struct dentry *debugfs_root;
156};
157
158struct coda_params {
159 u8 rot_mode;
160 u8 h264_intra_qp;
161 u8 h264_inter_qp;
162 u8 h264_min_qp;
163 u8 h264_max_qp;
164 u8 h264_deblk_enabled;
165 u8 h264_deblk_alpha;
166 u8 h264_deblk_beta;
167 u8 mpeg4_intra_qp;
168 u8 mpeg4_inter_qp;
169 u8 gop_size;
170 int intra_refresh;
171 int codec_mode;
172 int codec_mode_aux;
173 enum v4l2_mpeg_video_multi_slice_mode slice_mode;
174 u32 framerate;
175 u16 bitrate;
176 u32 slice_max_bits;
177 u32 slice_max_mb;
178};
179
180struct coda_iram_info {
181 u32 axi_sram_use;
182 phys_addr_t buf_bit_use;
183 phys_addr_t buf_ip_ac_dc_use;
184 phys_addr_t buf_dbk_y_use;
185 phys_addr_t buf_dbk_c_use;
186 phys_addr_t buf_ovl_use;
187 phys_addr_t buf_btp_use;
188 phys_addr_t search_ram_paddr;
189 int search_ram_size;
190 int remaining;
191 phys_addr_t next_paddr;
192};
193
194struct gdi_tiled_map {
195 int xy2ca_map[16];
196 int xy2ba_map[16];
197 int xy2ra_map[16];
198 int rbc2axi_map[32];
199 int xy2rbc_config;
200 int map_type;
201#define GDI_LINEAR_FRAME_MAP 0
202};
203
204struct coda_timestamp {
205 struct list_head list;
206 u32 sequence;
207 struct v4l2_timecode timecode;
208 struct timeval timestamp;
209};
210
211struct coda_ctx {
212 struct coda_dev *dev;
213 struct mutex buffer_mutex;
214 struct list_head list;
215 struct work_struct pic_run_work;
216 struct work_struct seq_end_work;
217 struct completion completion;
218 int aborting;
219 int initialized;
220 int streamon_out;
221 int streamon_cap;
222 u32 isequence;
223 u32 qsequence;
224 u32 osequence;
225 u32 sequence_offset;
226 struct coda_q_data q_data[2];
227 enum coda_inst_type inst_type;
228 struct coda_codec *codec;
229 enum v4l2_colorspace colorspace;
230 struct coda_params params;
231 struct v4l2_ctrl_handler ctrls;
232 struct v4l2_fh fh;
233 int gopcounter;
234 int runcounter;
235 char vpu_header[3][64];
236 int vpu_header_size[3];
237 struct kfifo bitstream_fifo;
238 struct mutex bitstream_mutex;
239 struct coda_aux_buf bitstream;
240 bool hold;
241 struct coda_aux_buf parabuf;
242 struct coda_aux_buf psbuf;
243 struct coda_aux_buf slicebuf;
244 struct coda_aux_buf internal_frames[CODA_MAX_FRAMEBUFFERS];
245 u32 frame_types[CODA_MAX_FRAMEBUFFERS];
246 struct coda_timestamp frame_timestamps[CODA_MAX_FRAMEBUFFERS];
247 u32 frame_errors[CODA_MAX_FRAMEBUFFERS];
248 struct list_head timestamp_list;
249 struct coda_aux_buf workbuf;
250 int num_internal_frames;
251 int idx;
252 int reg_idx;
253 struct coda_iram_info iram_info;
254 struct gdi_tiled_map tiled_map;
255 u32 bit_stream_param;
256 u32 frm_dis_flg;
257 u32 frame_mem_ctrl;
258 int display_idx;
259 struct dentry *debugfs_entry;
260};
261
262static const u8 coda_filler_nal[14] = { 0x00, 0x00, 0x00, 0x01, 0x0c, 0xff,
263 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x80 };
264static const u8 coda_filler_size[8] = { 0, 7, 14, 13, 12, 11, 10, 9 };
265
266static inline void coda_write(struct coda_dev *dev, u32 data, u32 reg)
267{
268 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
269 "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
270 writel(data, dev->regs_base + reg);
271}
272
273static inline unsigned int coda_read(struct coda_dev *dev, u32 reg)
274{
275 u32 data;
276 data = readl(dev->regs_base + reg);
277 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
278 "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
279 return data;
280}
281
282static inline unsigned long coda_isbusy(struct coda_dev *dev)
283{
284 return coda_read(dev, CODA_REG_BIT_BUSY);
285}
286
287static inline int coda_is_initialized(struct coda_dev *dev)
288{
289 return (coda_read(dev, CODA_REG_BIT_CUR_PC) != 0);
290}
291
292static int coda_wait_timeout(struct coda_dev *dev)
293{
294 unsigned long timeout = jiffies + msecs_to_jiffies(1000);
295
296 while (coda_isbusy(dev)) {
297 if (time_after(jiffies, timeout))
298 return -ETIMEDOUT;
299 }
300 return 0;
301}
302
303static void coda_command_async(struct coda_ctx *ctx, int cmd)
304{
305 struct coda_dev *dev = ctx->dev;
306
307 if (dev->devtype->product == CODA_960 ||
308 dev->devtype->product == CODA_7541) {
309 /* Restore context related registers to CODA */
310 coda_write(dev, ctx->bit_stream_param,
311 CODA_REG_BIT_BIT_STREAM_PARAM);
312 coda_write(dev, ctx->frm_dis_flg,
313 CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
314 coda_write(dev, ctx->frame_mem_ctrl,
315 CODA_REG_BIT_FRAME_MEM_CTRL);
316 coda_write(dev, ctx->workbuf.paddr, CODA_REG_BIT_WORK_BUF_ADDR);
317 }
318
319 if (dev->devtype->product == CODA_960) {
320 coda_write(dev, 1, CODA9_GDI_WPROT_ERR_CLR);
321 coda_write(dev, 0, CODA9_GDI_WPROT_RGN_EN);
322 }
323
324 coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
325
326 coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX);
327 coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD);
328 coda_write(dev, ctx->params.codec_mode_aux, CODA7_REG_BIT_RUN_AUX_STD);
329
330 coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND);
331}
332
333static int coda_command_sync(struct coda_ctx *ctx, int cmd)
334{
335 struct coda_dev *dev = ctx->dev;
336
337 coda_command_async(ctx, cmd);
338 return coda_wait_timeout(dev);
339}
340
341static int coda_hw_reset(struct coda_ctx *ctx)
342{
343 struct coda_dev *dev = ctx->dev;
344 unsigned long timeout;
345 unsigned int idx;
346 int ret;
347
348 if (!dev->rstc)
349 return -ENOENT;
350
351 idx = coda_read(dev, CODA_REG_BIT_RUN_INDEX);
352
353 timeout = jiffies + msecs_to_jiffies(100);
354 coda_write(dev, 0x11, CODA9_GDI_BUS_CTRL);
355 while (coda_read(dev, CODA9_GDI_BUS_STATUS) != 0x77) {
356 if (time_after(jiffies, timeout))
357 return -ETIME;
358 cpu_relax();
359 }
360
361 ret = reset_control_reset(dev->rstc);
362 if (ret < 0)
363 return ret;
364
365 coda_write(dev, 0x00, CODA9_GDI_BUS_CTRL);
366 coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
367 coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
368 ret = coda_wait_timeout(dev);
369 coda_write(dev, idx, CODA_REG_BIT_RUN_INDEX);
370
371 return ret;
372}
373
374static struct coda_q_data *get_q_data(struct coda_ctx *ctx,
375 enum v4l2_buf_type type)
376{
377 switch (type) {
378 case V4L2_BUF_TYPE_VIDEO_OUTPUT:
379 return &(ctx->q_data[V4L2_M2M_SRC]);
380 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
381 return &(ctx->q_data[V4L2_M2M_DST]);
382 default:
383 return NULL;
384 }
385}
386
387/*
388 * Array of all formats supported by any version of Coda:
389 */
390static struct coda_fmt coda_formats[] = {
391 {
392 .name = "YUV 4:2:0 Planar, YCbCr",
393 .fourcc = V4L2_PIX_FMT_YUV420,
394 },
395 {
396 .name = "YUV 4:2:0 Planar, YCrCb",
397 .fourcc = V4L2_PIX_FMT_YVU420,
398 },
399 {
400 .name = "H264 Encoded Stream",
401 .fourcc = V4L2_PIX_FMT_H264,
402 },
403 {
404 .name = "MPEG4 Encoded Stream",
405 .fourcc = V4L2_PIX_FMT_MPEG4,
406 },
407};
408
409#define CODA_CODEC(mode, src_fourcc, dst_fourcc, max_w, max_h) \
410 { mode, src_fourcc, dst_fourcc, max_w, max_h }
411
412/*
413 * Arrays of codecs supported by each given version of Coda:
414 * i.MX27 -> codadx6
415 * i.MX5x -> coda7
416 * i.MX6 -> coda960
417 * Use V4L2_PIX_FMT_YUV420 as placeholder for all supported YUV 4:2:0 variants
418 */
419static struct coda_codec codadx6_codecs[] = {
420 CODA_CODEC(CODADX6_MODE_ENCODE_H264, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_H264, 720, 576),
421 CODA_CODEC(CODADX6_MODE_ENCODE_MP4, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_MPEG4, 720, 576),
422};
423
424static struct coda_codec coda7_codecs[] = {
425 CODA_CODEC(CODA7_MODE_ENCODE_H264, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_H264, 1280, 720),
426 CODA_CODEC(CODA7_MODE_ENCODE_MP4, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_MPEG4, 1280, 720),
427 CODA_CODEC(CODA7_MODE_DECODE_H264, V4L2_PIX_FMT_H264, V4L2_PIX_FMT_YUV420, 1920, 1080),
428 CODA_CODEC(CODA7_MODE_DECODE_MP4, V4L2_PIX_FMT_MPEG4, V4L2_PIX_FMT_YUV420, 1920, 1080),
429};
430
431static struct coda_codec coda9_codecs[] = {
432 CODA_CODEC(CODA9_MODE_ENCODE_H264, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_H264, 1920, 1080),
433 CODA_CODEC(CODA9_MODE_ENCODE_MP4, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_MPEG4, 1920, 1080),
434 CODA_CODEC(CODA9_MODE_DECODE_H264, V4L2_PIX_FMT_H264, V4L2_PIX_FMT_YUV420, 1920, 1080),
435 CODA_CODEC(CODA9_MODE_DECODE_MP4, V4L2_PIX_FMT_MPEG4, V4L2_PIX_FMT_YUV420, 1920, 1080),
436};
437
438static bool coda_format_is_yuv(u32 fourcc)
439{
440 switch (fourcc) {
441 case V4L2_PIX_FMT_YUV420:
442 case V4L2_PIX_FMT_YVU420:
443 return true;
444 default:
445 return false;
446 }
447}
448
449/*
450 * Normalize all supported YUV 4:2:0 formats to the value used in the codec
451 * tables.
452 */
453static u32 coda_format_normalize_yuv(u32 fourcc)
454{
455 return coda_format_is_yuv(fourcc) ? V4L2_PIX_FMT_YUV420 : fourcc;
456}
457
458static struct coda_codec *coda_find_codec(struct coda_dev *dev, int src_fourcc,
459 int dst_fourcc)
460{
461 struct coda_codec *codecs = dev->devtype->codecs;
462 int num_codecs = dev->devtype->num_codecs;
463 int k;
464
465 src_fourcc = coda_format_normalize_yuv(src_fourcc);
466 dst_fourcc = coda_format_normalize_yuv(dst_fourcc);
467 if (src_fourcc == dst_fourcc)
468 return NULL;
469
470 for (k = 0; k < num_codecs; k++) {
471 if (codecs[k].src_fourcc == src_fourcc &&
472 codecs[k].dst_fourcc == dst_fourcc)
473 break;
474 }
475
476 if (k == num_codecs)
477 return NULL;
478
479 return &codecs[k];
480}
481
482static void coda_get_max_dimensions(struct coda_dev *dev,
483 struct coda_codec *codec,
484 int *max_w, int *max_h)
485{
486 struct coda_codec *codecs = dev->devtype->codecs;
487 int num_codecs = dev->devtype->num_codecs;
488 unsigned int w, h;
489 int k;
490
491 if (codec) {
492 w = codec->max_w;
493 h = codec->max_h;
494 } else {
495 for (k = 0, w = 0, h = 0; k < num_codecs; k++) {
496 w = max(w, codecs[k].max_w);
497 h = max(h, codecs[k].max_h);
498 }
499 }
500
501 if (max_w)
502 *max_w = w;
503 if (max_h)
504 *max_h = h;
505}
506
507static char *coda_product_name(int product)
508{
509 static char buf[9];
510
511 switch (product) {
512 case CODA_DX6:
513 return "CodaDx6";
514 case CODA_7541:
515 return "CODA7541";
516 case CODA_960:
517 return "CODA960";
518 default:
519 snprintf(buf, sizeof(buf), "(0x%04x)", product);
520 return buf;
521 }
522}
523
524/*
525 * V4L2 ioctl() operations.
526 */
527static int coda_querycap(struct file *file, void *priv,
528 struct v4l2_capability *cap)
529{
530 struct coda_ctx *ctx = fh_to_ctx(priv);
531
532 strlcpy(cap->driver, CODA_NAME, sizeof(cap->driver));
533 strlcpy(cap->card, coda_product_name(ctx->dev->devtype->product),
534 sizeof(cap->card));
535 strlcpy(cap->bus_info, "platform:" CODA_NAME, sizeof(cap->bus_info));
536 /*
537 * This is only a mem-to-mem video device. The capture and output
538 * device capability flags are left only for backward compatibility
539 * and are scheduled for removal.
540 */
541 cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OUTPUT |
542 V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING;
543 cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
544
545 return 0;
546}
547
548static int enum_fmt(void *priv, struct v4l2_fmtdesc *f,
549 enum v4l2_buf_type type, int src_fourcc)
550{
551 struct coda_ctx *ctx = fh_to_ctx(priv);
552 struct coda_codec *codecs = ctx->dev->devtype->codecs;
553 struct coda_fmt *formats = coda_formats;
554 struct coda_fmt *fmt;
555 int num_codecs = ctx->dev->devtype->num_codecs;
556 int num_formats = ARRAY_SIZE(coda_formats);
557 int i, k, num = 0;
558
559 for (i = 0; i < num_formats; i++) {
560 /* Both uncompressed formats are always supported */
561 if (coda_format_is_yuv(formats[i].fourcc) &&
562 !coda_format_is_yuv(src_fourcc)) {
563 if (num == f->index)
564 break;
565 ++num;
566 continue;
567 }
568 /* Compressed formats may be supported, check the codec list */
569 for (k = 0; k < num_codecs; k++) {
570 /* if src_fourcc is set, only consider matching codecs */
571 if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE &&
572 formats[i].fourcc == codecs[k].dst_fourcc &&
573 (!src_fourcc || src_fourcc == codecs[k].src_fourcc))
574 break;
575 if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT &&
576 formats[i].fourcc == codecs[k].src_fourcc)
577 break;
578 }
579 if (k < num_codecs) {
580 if (num == f->index)
581 break;
582 ++num;
583 }
584 }
585
586 if (i < num_formats) {
587 fmt = &formats[i];
588 strlcpy(f->description, fmt->name, sizeof(f->description));
589 f->pixelformat = fmt->fourcc;
590 if (!coda_format_is_yuv(fmt->fourcc))
591 f->flags |= V4L2_FMT_FLAG_COMPRESSED;
592 return 0;
593 }
594
595 /* Format not found */
596 return -EINVAL;
597}
598
599static int coda_enum_fmt_vid_cap(struct file *file, void *priv,
600 struct v4l2_fmtdesc *f)
601{
602 struct coda_ctx *ctx = fh_to_ctx(priv);
603 struct vb2_queue *src_vq;
604 struct coda_q_data *q_data_src;
605
606 /* If the source format is already fixed, only list matching formats */
607 src_vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
608 if (vb2_is_streaming(src_vq)) {
609 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
610
611 return enum_fmt(priv, f, V4L2_BUF_TYPE_VIDEO_CAPTURE,
612 q_data_src->fourcc);
613 }
614
615 return enum_fmt(priv, f, V4L2_BUF_TYPE_VIDEO_CAPTURE, 0);
616}
617
618static int coda_enum_fmt_vid_out(struct file *file, void *priv,
619 struct v4l2_fmtdesc *f)
620{
621 return enum_fmt(priv, f, V4L2_BUF_TYPE_VIDEO_OUTPUT, 0);
622}
623
624static int coda_g_fmt(struct file *file, void *priv,
625 struct v4l2_format *f)
626{
627 struct coda_q_data *q_data;
628 struct coda_ctx *ctx = fh_to_ctx(priv);
629
630 q_data = get_q_data(ctx, f->type);
631 if (!q_data)
632 return -EINVAL;
633
634 f->fmt.pix.field = V4L2_FIELD_NONE;
635 f->fmt.pix.pixelformat = q_data->fourcc;
636 f->fmt.pix.width = q_data->width;
637 f->fmt.pix.height = q_data->height;
638 f->fmt.pix.bytesperline = q_data->bytesperline;
639
640 f->fmt.pix.sizeimage = q_data->sizeimage;
641 f->fmt.pix.colorspace = ctx->colorspace;
642
643 return 0;
644}
645
646static int coda_try_fmt(struct coda_ctx *ctx, struct coda_codec *codec,
647 struct v4l2_format *f)
648{
649 struct coda_dev *dev = ctx->dev;
650 struct coda_q_data *q_data;
651 unsigned int max_w, max_h;
652 enum v4l2_field field;
653
654 field = f->fmt.pix.field;
655 if (field == V4L2_FIELD_ANY)
656 field = V4L2_FIELD_NONE;
657 else if (V4L2_FIELD_NONE != field)
658 return -EINVAL;
659
660 /* V4L2 specification suggests the driver corrects the format struct
661 * if any of the dimensions is unsupported */
662 f->fmt.pix.field = field;
663
664 coda_get_max_dimensions(dev, codec, &max_w, &max_h);
665 v4l_bound_align_image(&f->fmt.pix.width, MIN_W, max_w, W_ALIGN,
666 &f->fmt.pix.height, MIN_H, max_h, H_ALIGN,
667 S_ALIGN);
668
669 switch (f->fmt.pix.pixelformat) {
670 case V4L2_PIX_FMT_YUV420:
671 case V4L2_PIX_FMT_YVU420:
672 case V4L2_PIX_FMT_H264:
673 case V4L2_PIX_FMT_MPEG4:
674 case V4L2_PIX_FMT_JPEG:
675 break;
676 default:
677 q_data = get_q_data(ctx, f->type);
678 if (!q_data)
679 return -EINVAL;
680 f->fmt.pix.pixelformat = q_data->fourcc;
681 }
682
683 switch (f->fmt.pix.pixelformat) {
684 case V4L2_PIX_FMT_YUV420:
685 case V4L2_PIX_FMT_YVU420:
686 /* Frame stride must be multiple of 8, but 16 for h.264 */
687 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 16);
688 f->fmt.pix.sizeimage = f->fmt.pix.bytesperline *
689 f->fmt.pix.height * 3 / 2;
690 break;
691 case V4L2_PIX_FMT_H264:
692 case V4L2_PIX_FMT_MPEG4:
693 case V4L2_PIX_FMT_JPEG:
694 f->fmt.pix.bytesperline = 0;
695 f->fmt.pix.sizeimage = CODA_MAX_FRAME_SIZE;
696 break;
697 default:
698 BUG();
699 }
700
701 return 0;
702}
703
704static int coda_try_fmt_vid_cap(struct file *file, void *priv,
705 struct v4l2_format *f)
706{
707 struct coda_ctx *ctx = fh_to_ctx(priv);
708 struct coda_codec *codec;
709 struct vb2_queue *src_vq;
710 int ret;
711
712 /*
713 * If the source format is already fixed, try to find a codec that
714 * converts to the given destination format
715 */
716 src_vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
717 if (vb2_is_streaming(src_vq)) {
718 struct coda_q_data *q_data_src;
719
720 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
721 codec = coda_find_codec(ctx->dev, q_data_src->fourcc,
722 f->fmt.pix.pixelformat);
723 if (!codec)
724 return -EINVAL;
725 } else {
726 /* Otherwise determine codec by encoded format, if possible */
727 codec = coda_find_codec(ctx->dev, V4L2_PIX_FMT_YUV420,
728 f->fmt.pix.pixelformat);
729 }
730
731 f->fmt.pix.colorspace = ctx->colorspace;
732
733 ret = coda_try_fmt(ctx, codec, f);
734 if (ret < 0)
735 return ret;
736
737 /* The h.264 decoder only returns complete 16x16 macroblocks */
738 if (codec && codec->src_fourcc == V4L2_PIX_FMT_H264) {
739 f->fmt.pix.width = f->fmt.pix.width;
740 f->fmt.pix.height = round_up(f->fmt.pix.height, 16);
741 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 16);
742 f->fmt.pix.sizeimage = f->fmt.pix.bytesperline *
743 f->fmt.pix.height * 3 / 2;
744 }
745
746 return 0;
747}
748
749static int coda_try_fmt_vid_out(struct file *file, void *priv,
750 struct v4l2_format *f)
751{
752 struct coda_ctx *ctx = fh_to_ctx(priv);
753 struct coda_codec *codec;
754
755 /* Determine codec by encoded format, returns NULL if raw or invalid */
756 codec = coda_find_codec(ctx->dev, f->fmt.pix.pixelformat,
757 V4L2_PIX_FMT_YUV420);
758
759 if (!f->fmt.pix.colorspace)
760 f->fmt.pix.colorspace = V4L2_COLORSPACE_REC709;
761
762 return coda_try_fmt(ctx, codec, f);
763}
764
765static int coda_s_fmt(struct coda_ctx *ctx, struct v4l2_format *f)
766{
767 struct coda_q_data *q_data;
768 struct vb2_queue *vq;
769
770 vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type);
771 if (!vq)
772 return -EINVAL;
773
774 q_data = get_q_data(ctx, f->type);
775 if (!q_data)
776 return -EINVAL;
777
778 if (vb2_is_busy(vq)) {
779 v4l2_err(&ctx->dev->v4l2_dev, "%s queue busy\n", __func__);
780 return -EBUSY;
781 }
782
783 q_data->fourcc = f->fmt.pix.pixelformat;
784 q_data->width = f->fmt.pix.width;
785 q_data->height = f->fmt.pix.height;
786 q_data->bytesperline = f->fmt.pix.bytesperline;
787 q_data->sizeimage = f->fmt.pix.sizeimage;
788 q_data->rect.left = 0;
789 q_data->rect.top = 0;
790 q_data->rect.width = f->fmt.pix.width;
791 q_data->rect.height = f->fmt.pix.height;
792
793 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
794 "Setting format for type %d, wxh: %dx%d, fmt: %d\n",
795 f->type, q_data->width, q_data->height, q_data->fourcc);
796
797 return 0;
798}
799
800static int coda_s_fmt_vid_cap(struct file *file, void *priv,
801 struct v4l2_format *f)
802{
803 struct coda_ctx *ctx = fh_to_ctx(priv);
804 int ret;
805
806 ret = coda_try_fmt_vid_cap(file, priv, f);
807 if (ret)
808 return ret;
809
810 return coda_s_fmt(ctx, f);
811}
812
813static int coda_s_fmt_vid_out(struct file *file, void *priv,
814 struct v4l2_format *f)
815{
816 struct coda_ctx *ctx = fh_to_ctx(priv);
817 int ret;
818
819 ret = coda_try_fmt_vid_out(file, priv, f);
820 if (ret)
821 return ret;
822
823 ret = coda_s_fmt(ctx, f);
824 if (ret)
825 ctx->colorspace = f->fmt.pix.colorspace;
826
827 return ret;
828}
829
830static int coda_qbuf(struct file *file, void *priv,
831 struct v4l2_buffer *buf)
832{
833 struct coda_ctx *ctx = fh_to_ctx(priv);
834
835 return v4l2_m2m_qbuf(file, ctx->fh.m2m_ctx, buf);
836}
837
838static bool coda_buf_is_end_of_stream(struct coda_ctx *ctx,
839 struct v4l2_buffer *buf)
840{
841 struct vb2_queue *src_vq;
842
843 src_vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
844
845 return ((ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG) &&
846 (buf->sequence == (ctx->qsequence - 1)));
847}
848
849static int coda_dqbuf(struct file *file, void *priv,
850 struct v4l2_buffer *buf)
851{
852 struct coda_ctx *ctx = fh_to_ctx(priv);
853 int ret;
854
855 ret = v4l2_m2m_dqbuf(file, ctx->fh.m2m_ctx, buf);
856
857 /* If this is the last capture buffer, emit an end-of-stream event */
858 if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE &&
859 coda_buf_is_end_of_stream(ctx, buf)) {
860 const struct v4l2_event eos_event = {
861 .type = V4L2_EVENT_EOS
862 };
863
864 v4l2_event_queue_fh(&ctx->fh, &eos_event);
865 }
866
867 return ret;
868}
869
870static int coda_g_selection(struct file *file, void *fh,
871 struct v4l2_selection *s)
872{
873 struct coda_ctx *ctx = fh_to_ctx(fh);
874 struct coda_q_data *q_data;
875 struct v4l2_rect r, *rsel;
876
877 q_data = get_q_data(ctx, s->type);
878 if (!q_data)
879 return -EINVAL;
880
881 r.left = 0;
882 r.top = 0;
883 r.width = q_data->width;
884 r.height = q_data->height;
885 rsel = &q_data->rect;
886
887 switch (s->target) {
888 case V4L2_SEL_TGT_CROP_DEFAULT:
889 case V4L2_SEL_TGT_CROP_BOUNDS:
890 rsel = &r;
891 /* fallthrough */
892 case V4L2_SEL_TGT_CROP:
893 if (s->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
894 return -EINVAL;
895 break;
896 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
897 case V4L2_SEL_TGT_COMPOSE_PADDED:
898 rsel = &r;
899 /* fallthrough */
900 case V4L2_SEL_TGT_COMPOSE:
901 case V4L2_SEL_TGT_COMPOSE_DEFAULT:
902 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
903 return -EINVAL;
904 break;
905 default:
906 return -EINVAL;
907 }
908
909 s->r = *rsel;
910
911 return 0;
912}
913
914static int coda_try_decoder_cmd(struct file *file, void *fh,
915 struct v4l2_decoder_cmd *dc)
916{
917 if (dc->cmd != V4L2_DEC_CMD_STOP)
918 return -EINVAL;
919
920 if (dc->flags & V4L2_DEC_CMD_STOP_TO_BLACK)
921 return -EINVAL;
922
923 if (!(dc->flags & V4L2_DEC_CMD_STOP_IMMEDIATELY) && (dc->stop.pts != 0))
924 return -EINVAL;
925
926 return 0;
927}
928
929static int coda_decoder_cmd(struct file *file, void *fh,
930 struct v4l2_decoder_cmd *dc)
931{
932 struct coda_ctx *ctx = fh_to_ctx(fh);
933 struct coda_dev *dev = ctx->dev;
934 int ret;
935
936 ret = coda_try_decoder_cmd(file, fh, dc);
937 if (ret < 0)
938 return ret;
939
940 /* Ignore decoder stop command silently in encoder context */
941 if (ctx->inst_type != CODA_INST_DECODER)
942 return 0;
943
944 /* Set the strem-end flag on this context */
945 ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
946
947 if ((dev->devtype->product == CODA_960) &&
948 coda_isbusy(dev) &&
949 (ctx->idx == coda_read(dev, CODA_REG_BIT_RUN_INDEX))) {
950 /* If this context is currently running, update the hardware flag */
951 coda_write(dev, ctx->bit_stream_param, CODA_REG_BIT_BIT_STREAM_PARAM);
952 }
953 ctx->hold = false;
954 v4l2_m2m_try_schedule(ctx->fh.m2m_ctx);
955
956 return 0;
957}
958
959static int coda_subscribe_event(struct v4l2_fh *fh,
960 const struct v4l2_event_subscription *sub)
961{
962 switch (sub->type) {
963 case V4L2_EVENT_EOS:
964 return v4l2_event_subscribe(fh, sub, 0, NULL);
965 default:
966 return v4l2_ctrl_subscribe_event(fh, sub);
967 }
968}
969
970static const struct v4l2_ioctl_ops coda_ioctl_ops = {
971 .vidioc_querycap = coda_querycap,
972
973 .vidioc_enum_fmt_vid_cap = coda_enum_fmt_vid_cap,
974 .vidioc_g_fmt_vid_cap = coda_g_fmt,
975 .vidioc_try_fmt_vid_cap = coda_try_fmt_vid_cap,
976 .vidioc_s_fmt_vid_cap = coda_s_fmt_vid_cap,
977
978 .vidioc_enum_fmt_vid_out = coda_enum_fmt_vid_out,
979 .vidioc_g_fmt_vid_out = coda_g_fmt,
980 .vidioc_try_fmt_vid_out = coda_try_fmt_vid_out,
981 .vidioc_s_fmt_vid_out = coda_s_fmt_vid_out,
982
983 .vidioc_reqbufs = v4l2_m2m_ioctl_reqbufs,
984 .vidioc_querybuf = v4l2_m2m_ioctl_querybuf,
985
986 .vidioc_qbuf = coda_qbuf,
987 .vidioc_expbuf = v4l2_m2m_ioctl_expbuf,
988 .vidioc_dqbuf = coda_dqbuf,
989 .vidioc_create_bufs = v4l2_m2m_ioctl_create_bufs,
990
991 .vidioc_streamon = v4l2_m2m_ioctl_streamon,
992 .vidioc_streamoff = v4l2_m2m_ioctl_streamoff,
993
994 .vidioc_g_selection = coda_g_selection,
995
996 .vidioc_try_decoder_cmd = coda_try_decoder_cmd,
997 .vidioc_decoder_cmd = coda_decoder_cmd,
998
999 .vidioc_subscribe_event = coda_subscribe_event,
1000 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
1001};
1002
1003static int coda_start_decoding(struct coda_ctx *ctx);
1004
1005static inline int coda_get_bitstream_payload(struct coda_ctx *ctx)
1006{
1007 return kfifo_len(&ctx->bitstream_fifo);
1008}
1009
1010static void coda_kfifo_sync_from_device(struct coda_ctx *ctx)
1011{
1012 struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
1013 struct coda_dev *dev = ctx->dev;
1014 u32 rd_ptr;
1015
1016 rd_ptr = coda_read(dev, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
1017 kfifo->out = (kfifo->in & ~kfifo->mask) |
1018 (rd_ptr - ctx->bitstream.paddr);
1019 if (kfifo->out > kfifo->in)
1020 kfifo->out -= kfifo->mask + 1;
1021}
1022
1023static void coda_kfifo_sync_to_device_full(struct coda_ctx *ctx)
1024{
1025 struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
1026 struct coda_dev *dev = ctx->dev;
1027 u32 rd_ptr, wr_ptr;
1028
1029 rd_ptr = ctx->bitstream.paddr + (kfifo->out & kfifo->mask);
1030 coda_write(dev, rd_ptr, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
1031 wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
1032 coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
1033}
1034
1035static void coda_kfifo_sync_to_device_write(struct coda_ctx *ctx)
1036{
1037 struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
1038 struct coda_dev *dev = ctx->dev;
1039 u32 wr_ptr;
1040
1041 wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
1042 coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
1043}
1044
1045static int coda_bitstream_queue(struct coda_ctx *ctx, struct vb2_buffer *src_buf)
1046{
1047 u32 src_size = vb2_get_plane_payload(src_buf, 0);
1048 u32 n;
1049
1050 n = kfifo_in(&ctx->bitstream_fifo, vb2_plane_vaddr(src_buf, 0), src_size);
1051 if (n < src_size)
1052 return -ENOSPC;
1053
1054 dma_sync_single_for_device(&ctx->dev->plat_dev->dev, ctx->bitstream.paddr,
1055 ctx->bitstream.size, DMA_TO_DEVICE);
1056
1057 src_buf->v4l2_buf.sequence = ctx->qsequence++;
1058
1059 return 0;
1060}
1061
1062static bool coda_bitstream_try_queue(struct coda_ctx *ctx,
1063 struct vb2_buffer *src_buf)
1064{
1065 int ret;
1066
1067 if (coda_get_bitstream_payload(ctx) +
1068 vb2_get_plane_payload(src_buf, 0) + 512 >= ctx->bitstream.size)
1069 return false;
1070
1071 if (vb2_plane_vaddr(src_buf, 0) == NULL) {
1072 v4l2_err(&ctx->dev->v4l2_dev, "trying to queue empty buffer\n");
1073 return true;
1074 }
1075
1076 ret = coda_bitstream_queue(ctx, src_buf);
1077 if (ret < 0) {
1078 v4l2_err(&ctx->dev->v4l2_dev, "bitstream buffer overflow\n");
1079 return false;
1080 }
1081 /* Sync read pointer to device */
1082 if (ctx == v4l2_m2m_get_curr_priv(ctx->dev->m2m_dev))
1083 coda_kfifo_sync_to_device_write(ctx);
1084
1085 ctx->hold = false;
1086
1087 return true;
1088}
1089
1090static void coda_fill_bitstream(struct coda_ctx *ctx)
1091{
1092 struct vb2_buffer *src_buf;
1093 struct coda_timestamp *ts;
1094
1095 while (v4l2_m2m_num_src_bufs_ready(ctx->fh.m2m_ctx) > 0) {
1096 src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
1097
1098 if (coda_bitstream_try_queue(ctx, src_buf)) {
1099 /*
1100 * Source buffer is queued in the bitstream ringbuffer;
1101 * queue the timestamp and mark source buffer as done
1102 */
1103 src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
1104
1105 ts = kmalloc(sizeof(*ts), GFP_KERNEL);
1106 if (ts) {
1107 ts->sequence = src_buf->v4l2_buf.sequence;
1108 ts->timecode = src_buf->v4l2_buf.timecode;
1109 ts->timestamp = src_buf->v4l2_buf.timestamp;
1110 list_add_tail(&ts->list, &ctx->timestamp_list);
1111 }
1112
1113 v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
1114 } else {
1115 break;
1116 }
1117 }
1118}
1119
1120static void coda_set_gdi_regs(struct coda_ctx *ctx)
1121{
1122 struct gdi_tiled_map *tiled_map = &ctx->tiled_map;
1123 struct coda_dev *dev = ctx->dev;
1124 int i;
1125
1126 for (i = 0; i < 16; i++)
1127 coda_write(dev, tiled_map->xy2ca_map[i],
1128 CODA9_GDI_XY2_CAS_0 + 4 * i);
1129 for (i = 0; i < 4; i++)
1130 coda_write(dev, tiled_map->xy2ba_map[i],
1131 CODA9_GDI_XY2_BA_0 + 4 * i);
1132 for (i = 0; i < 16; i++)
1133 coda_write(dev, tiled_map->xy2ra_map[i],
1134 CODA9_GDI_XY2_RAS_0 + 4 * i);
1135 coda_write(dev, tiled_map->xy2rbc_config, CODA9_GDI_XY2_RBC_CONFIG);
1136 for (i = 0; i < 32; i++)
1137 coda_write(dev, tiled_map->rbc2axi_map[i],
1138 CODA9_GDI_RBC2_AXI_0 + 4 * i);
1139}
1140
1141/*
1142 * Mem-to-mem operations.
1143 */
1144static int coda_prepare_decode(struct coda_ctx *ctx)
1145{
1146 struct vb2_buffer *dst_buf;
1147 struct coda_dev *dev = ctx->dev;
1148 struct coda_q_data *q_data_dst;
1149 u32 stridey, height;
1150 u32 picture_y, picture_cb, picture_cr;
1151
1152 dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1153 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1154
1155 if (ctx->params.rot_mode & CODA_ROT_90) {
1156 stridey = q_data_dst->height;
1157 height = q_data_dst->width;
1158 } else {
1159 stridey = q_data_dst->width;
1160 height = q_data_dst->height;
1161 }
1162
1163 /* Try to copy source buffer contents into the bitstream ringbuffer */
1164 mutex_lock(&ctx->bitstream_mutex);
1165 coda_fill_bitstream(ctx);
1166 mutex_unlock(&ctx->bitstream_mutex);
1167
1168 if (coda_get_bitstream_payload(ctx) < 512 &&
1169 (!(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))) {
1170 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1171 "bitstream payload: %d, skipping\n",
1172 coda_get_bitstream_payload(ctx));
1173 v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx);
1174 return -EAGAIN;
1175 }
1176
1177 /* Run coda_start_decoding (again) if not yet initialized */
1178 if (!ctx->initialized) {
1179 int ret = coda_start_decoding(ctx);
1180 if (ret < 0) {
1181 v4l2_err(&dev->v4l2_dev, "failed to start decoding\n");
1182 v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx);
1183 return -EAGAIN;
1184 } else {
1185 ctx->initialized = 1;
1186 }
1187 }
1188
1189 if (dev->devtype->product == CODA_960)
1190 coda_set_gdi_regs(ctx);
1191
1192 /* Set rotator output */
1193 picture_y = vb2_dma_contig_plane_dma_addr(dst_buf, 0);
1194 if (q_data_dst->fourcc == V4L2_PIX_FMT_YVU420) {
1195 /* Switch Cr and Cb for YVU420 format */
1196 picture_cr = picture_y + stridey * height;
1197 picture_cb = picture_cr + stridey / 2 * height / 2;
1198 } else {
1199 picture_cb = picture_y + stridey * height;
1200 picture_cr = picture_cb + stridey / 2 * height / 2;
1201 }
1202
1203 if (dev->devtype->product == CODA_960) {
1204 /*
1205 * The CODA960 seems to have an internal list of buffers with
1206 * 64 entries that includes the registered frame buffers as
1207 * well as the rotator buffer output.
1208 * ROT_INDEX needs to be < 0x40, but > ctx->num_internal_frames.
1209 */
1210 coda_write(dev, CODA_MAX_FRAMEBUFFERS + dst_buf->v4l2_buf.index,
1211 CODA9_CMD_DEC_PIC_ROT_INDEX);
1212 coda_write(dev, picture_y, CODA9_CMD_DEC_PIC_ROT_ADDR_Y);
1213 coda_write(dev, picture_cb, CODA9_CMD_DEC_PIC_ROT_ADDR_CB);
1214 coda_write(dev, picture_cr, CODA9_CMD_DEC_PIC_ROT_ADDR_CR);
1215 coda_write(dev, stridey, CODA9_CMD_DEC_PIC_ROT_STRIDE);
1216 } else {
1217 coda_write(dev, picture_y, CODA_CMD_DEC_PIC_ROT_ADDR_Y);
1218 coda_write(dev, picture_cb, CODA_CMD_DEC_PIC_ROT_ADDR_CB);
1219 coda_write(dev, picture_cr, CODA_CMD_DEC_PIC_ROT_ADDR_CR);
1220 coda_write(dev, stridey, CODA_CMD_DEC_PIC_ROT_STRIDE);
1221 }
1222 coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode,
1223 CODA_CMD_DEC_PIC_ROT_MODE);
1224
1225 switch (dev->devtype->product) {
1226 case CODA_DX6:
1227 /* TBD */
1228 case CODA_7541:
1229 coda_write(dev, CODA_PRE_SCAN_EN, CODA_CMD_DEC_PIC_OPTION);
1230 break;
1231 case CODA_960:
1232 coda_write(dev, (1 << 10), CODA_CMD_DEC_PIC_OPTION); /* 'hardcode to use interrupt disable mode'? */
1233 break;
1234 }
1235
1236 coda_write(dev, 0, CODA_CMD_DEC_PIC_SKIP_NUM);
1237
1238 coda_write(dev, 0, CODA_CMD_DEC_PIC_BB_START);
1239 coda_write(dev, 0, CODA_CMD_DEC_PIC_START_BYTE);
1240
1241 return 0;
1242}
1243
1244static void coda_prepare_encode(struct coda_ctx *ctx)
1245{
1246 struct coda_q_data *q_data_src, *q_data_dst;
1247 struct vb2_buffer *src_buf, *dst_buf;
1248 struct coda_dev *dev = ctx->dev;
1249 int force_ipicture;
1250 int quant_param = 0;
1251 u32 picture_y, picture_cb, picture_cr;
1252 u32 pic_stream_buffer_addr, pic_stream_buffer_size;
1253 u32 dst_fourcc;
1254
1255 src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
1256 dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1257 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1258 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1259 dst_fourcc = q_data_dst->fourcc;
1260
1261 src_buf->v4l2_buf.sequence = ctx->osequence;
1262 dst_buf->v4l2_buf.sequence = ctx->osequence;
1263 ctx->osequence++;
1264
1265 /*
1266 * Workaround coda firmware BUG that only marks the first
1267 * frame as IDR. This is a problem for some decoders that can't
1268 * recover when a frame is lost.
1269 */
1270 if (src_buf->v4l2_buf.sequence % ctx->params.gop_size) {
1271 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
1272 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
1273 } else {
1274 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
1275 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
1276 }
1277
1278 if (dev->devtype->product == CODA_960)
1279 coda_set_gdi_regs(ctx);
1280
1281 /*
1282 * Copy headers at the beginning of the first frame for H.264 only.
1283 * In MPEG4 they are already copied by the coda.
1284 */
1285 if (src_buf->v4l2_buf.sequence == 0) {
1286 pic_stream_buffer_addr =
1287 vb2_dma_contig_plane_dma_addr(dst_buf, 0) +
1288 ctx->vpu_header_size[0] +
1289 ctx->vpu_header_size[1] +
1290 ctx->vpu_header_size[2];
1291 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE -
1292 ctx->vpu_header_size[0] -
1293 ctx->vpu_header_size[1] -
1294 ctx->vpu_header_size[2];
1295 memcpy(vb2_plane_vaddr(dst_buf, 0),
1296 &ctx->vpu_header[0][0], ctx->vpu_header_size[0]);
1297 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0],
1298 &ctx->vpu_header[1][0], ctx->vpu_header_size[1]);
1299 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0] +
1300 ctx->vpu_header_size[1], &ctx->vpu_header[2][0],
1301 ctx->vpu_header_size[2]);
1302 } else {
1303 pic_stream_buffer_addr =
1304 vb2_dma_contig_plane_dma_addr(dst_buf, 0);
1305 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE;
1306 }
1307
1308 if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
1309 force_ipicture = 1;
1310 switch (dst_fourcc) {
1311 case V4L2_PIX_FMT_H264:
1312 quant_param = ctx->params.h264_intra_qp;
1313 break;
1314 case V4L2_PIX_FMT_MPEG4:
1315 quant_param = ctx->params.mpeg4_intra_qp;
1316 break;
1317 default:
1318 v4l2_warn(&ctx->dev->v4l2_dev,
1319 "cannot set intra qp, fmt not supported\n");
1320 break;
1321 }
1322 } else {
1323 force_ipicture = 0;
1324 switch (dst_fourcc) {
1325 case V4L2_PIX_FMT_H264:
1326 quant_param = ctx->params.h264_inter_qp;
1327 break;
1328 case V4L2_PIX_FMT_MPEG4:
1329 quant_param = ctx->params.mpeg4_inter_qp;
1330 break;
1331 default:
1332 v4l2_warn(&ctx->dev->v4l2_dev,
1333 "cannot set inter qp, fmt not supported\n");
1334 break;
1335 }
1336 }
1337
1338 /* submit */
1339 coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode, CODA_CMD_ENC_PIC_ROT_MODE);
1340 coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS);
1341
1342
1343 picture_y = vb2_dma_contig_plane_dma_addr(src_buf, 0);
1344 switch (q_data_src->fourcc) {
1345 case V4L2_PIX_FMT_YVU420:
1346 /* Switch Cb and Cr for YVU420 format */
1347 picture_cr = picture_y + q_data_src->bytesperline *
1348 q_data_src->height;
1349 picture_cb = picture_cr + q_data_src->bytesperline / 2 *
1350 q_data_src->height / 2;
1351 break;
1352 case V4L2_PIX_FMT_YUV420:
1353 default:
1354 picture_cb = picture_y + q_data_src->bytesperline *
1355 q_data_src->height;
1356 picture_cr = picture_cb + q_data_src->bytesperline / 2 *
1357 q_data_src->height / 2;
1358 break;
1359 }
1360
1361 if (dev->devtype->product == CODA_960) {
1362 coda_write(dev, 4/*FIXME: 0*/, CODA9_CMD_ENC_PIC_SRC_INDEX);
1363 coda_write(dev, q_data_src->width, CODA9_CMD_ENC_PIC_SRC_STRIDE);
1364 coda_write(dev, 0, CODA9_CMD_ENC_PIC_SUB_FRAME_SYNC);
1365
1366 coda_write(dev, picture_y, CODA9_CMD_ENC_PIC_SRC_ADDR_Y);
1367 coda_write(dev, picture_cb, CODA9_CMD_ENC_PIC_SRC_ADDR_CB);
1368 coda_write(dev, picture_cr, CODA9_CMD_ENC_PIC_SRC_ADDR_CR);
1369 } else {
1370 coda_write(dev, picture_y, CODA_CMD_ENC_PIC_SRC_ADDR_Y);
1371 coda_write(dev, picture_cb, CODA_CMD_ENC_PIC_SRC_ADDR_CB);
1372 coda_write(dev, picture_cr, CODA_CMD_ENC_PIC_SRC_ADDR_CR);
1373 }
1374 coda_write(dev, force_ipicture << 1 & 0x2,
1375 CODA_CMD_ENC_PIC_OPTION);
1376
1377 coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START);
1378 coda_write(dev, pic_stream_buffer_size / 1024,
1379 CODA_CMD_ENC_PIC_BB_SIZE);
1380
1381 if (!ctx->streamon_out) {
1382 /* After streamoff on the output side, set the stream end flag */
1383 ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
1384 coda_write(dev, ctx->bit_stream_param, CODA_REG_BIT_BIT_STREAM_PARAM);
1385 }
1386}
1387
1388static void coda_device_run(void *m2m_priv)
1389{
1390 struct coda_ctx *ctx = m2m_priv;
1391 struct coda_dev *dev = ctx->dev;
1392
1393 queue_work(dev->workqueue, &ctx->pic_run_work);
1394}
1395
1396static void coda_free_framebuffers(struct coda_ctx *ctx);
1397static void coda_free_context_buffers(struct coda_ctx *ctx);
1398
1399static void coda_seq_end_work(struct work_struct *work)
1400{
1401 struct coda_ctx *ctx = container_of(work, struct coda_ctx, seq_end_work);
1402 struct coda_dev *dev = ctx->dev;
1403
1404 mutex_lock(&ctx->buffer_mutex);
1405 mutex_lock(&dev->coda_mutex);
1406
1407 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1408 "%d: %s: sent command 'SEQ_END' to coda\n", ctx->idx, __func__);
1409 if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
1410 v4l2_err(&dev->v4l2_dev,
1411 "CODA_COMMAND_SEQ_END failed\n");
1412 }
1413
1414 kfifo_init(&ctx->bitstream_fifo,
1415 ctx->bitstream.vaddr, ctx->bitstream.size);
1416
1417 coda_free_framebuffers(ctx);
1418 coda_free_context_buffers(ctx);
1419
1420 mutex_unlock(&dev->coda_mutex);
1421 mutex_unlock(&ctx->buffer_mutex);
1422}
1423
1424static void coda_finish_decode(struct coda_ctx *ctx);
1425static void coda_finish_encode(struct coda_ctx *ctx);
1426
1427static void coda_pic_run_work(struct work_struct *work)
1428{
1429 struct coda_ctx *ctx = container_of(work, struct coda_ctx, pic_run_work);
1430 struct coda_dev *dev = ctx->dev;
1431 int ret;
1432
1433 mutex_lock(&ctx->buffer_mutex);
1434 mutex_lock(&dev->coda_mutex);
1435
1436 if (ctx->inst_type == CODA_INST_DECODER) {
1437 ret = coda_prepare_decode(ctx);
1438 if (ret < 0) {
1439 mutex_unlock(&dev->coda_mutex);
1440 mutex_unlock(&ctx->buffer_mutex);
1441 /* job_finish scheduled by prepare_decode */
1442 return;
1443 }
1444 } else {
1445 coda_prepare_encode(ctx);
1446 }
1447
1448 if (dev->devtype->product != CODA_DX6)
1449 coda_write(dev, ctx->iram_info.axi_sram_use,
1450 CODA7_REG_BIT_AXI_SRAM_USE);
1451
1452 if (ctx->inst_type == CODA_INST_DECODER)
1453 coda_kfifo_sync_to_device_full(ctx);
1454 coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
1455
1456 if (!wait_for_completion_timeout(&ctx->completion, msecs_to_jiffies(1000))) {
1457 dev_err(&dev->plat_dev->dev, "CODA PIC_RUN timeout\n");
1458
1459 ctx->hold = true;
1460
1461 coda_hw_reset(ctx);
1462 } else if (!ctx->aborting) {
1463 if (ctx->inst_type == CODA_INST_DECODER)
1464 coda_finish_decode(ctx);
1465 else
1466 coda_finish_encode(ctx);
1467 }
1468
1469 if (ctx->aborting || (!ctx->streamon_cap && !ctx->streamon_out))
1470 queue_work(dev->workqueue, &ctx->seq_end_work);
1471
1472 mutex_unlock(&dev->coda_mutex);
1473 mutex_unlock(&ctx->buffer_mutex);
1474
1475 v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx);
1476}
1477
1478static int coda_job_ready(void *m2m_priv)
1479{
1480 struct coda_ctx *ctx = m2m_priv;
1481
1482 /*
1483 * For both 'P' and 'key' frame cases 1 picture
1484 * and 1 frame are needed. In the decoder case,
1485 * the compressed frame can be in the bitstream.
1486 */
1487 if (!v4l2_m2m_num_src_bufs_ready(ctx->fh.m2m_ctx) &&
1488 ctx->inst_type != CODA_INST_DECODER) {
1489 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1490 "not ready: not enough video buffers.\n");
1491 return 0;
1492 }
1493
1494 if (!v4l2_m2m_num_dst_bufs_ready(ctx->fh.m2m_ctx)) {
1495 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1496 "not ready: not enough video capture buffers.\n");
1497 return 0;
1498 }
1499
1500 if (ctx->hold ||
1501 ((ctx->inst_type == CODA_INST_DECODER) &&
1502 (coda_get_bitstream_payload(ctx) < 512) &&
1503 !(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))) {
1504 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1505 "%d: not ready: not enough bitstream data.\n",
1506 ctx->idx);
1507 return 0;
1508 }
1509
1510 if (ctx->aborting) {
1511 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1512 "not ready: aborting\n");
1513 return 0;
1514 }
1515
1516 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1517 "job ready\n");
1518 return 1;
1519}
1520
1521static void coda_job_abort(void *priv)
1522{
1523 struct coda_ctx *ctx = priv;
1524
1525 ctx->aborting = 1;
1526
1527 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1528 "Aborting task\n");
1529}
1530
1531static void coda_lock(void *m2m_priv)
1532{
1533 struct coda_ctx *ctx = m2m_priv;
1534 struct coda_dev *pcdev = ctx->dev;
1535 mutex_lock(&pcdev->dev_mutex);
1536}
1537
1538static void coda_unlock(void *m2m_priv)
1539{
1540 struct coda_ctx *ctx = m2m_priv;
1541 struct coda_dev *pcdev = ctx->dev;
1542 mutex_unlock(&pcdev->dev_mutex);
1543}
1544
1545static struct v4l2_m2m_ops coda_m2m_ops = {
1546 .device_run = coda_device_run,
1547 .job_ready = coda_job_ready,
1548 .job_abort = coda_job_abort,
1549 .lock = coda_lock,
1550 .unlock = coda_unlock,
1551};
1552
1553static void coda_set_tiled_map_type(struct coda_ctx *ctx, int tiled_map_type)
1554{
1555 struct gdi_tiled_map *tiled_map = &ctx->tiled_map;
1556 int luma_map, chro_map, i;
1557
1558 memset(tiled_map, 0, sizeof(*tiled_map));
1559
1560 luma_map = 64;
1561 chro_map = 64;
1562 tiled_map->map_type = tiled_map_type;
1563 for (i = 0; i < 16; i++)
1564 tiled_map->xy2ca_map[i] = luma_map << 8 | chro_map;
1565 for (i = 0; i < 4; i++)
1566 tiled_map->xy2ba_map[i] = luma_map << 8 | chro_map;
1567 for (i = 0; i < 16; i++)
1568 tiled_map->xy2ra_map[i] = luma_map << 8 | chro_map;
1569
1570 if (tiled_map_type == GDI_LINEAR_FRAME_MAP) {
1571 tiled_map->xy2rbc_config = 0;
1572 } else {
1573 dev_err(&ctx->dev->plat_dev->dev, "invalid map type: %d\n",
1574 tiled_map_type);
1575 return;
1576 }
1577}
1578
1579static void set_default_params(struct coda_ctx *ctx)
1580{
1581 int max_w;
1582 int max_h;
1583
1584 ctx->codec = &ctx->dev->devtype->codecs[0];
1585 max_w = ctx->codec->max_w;
1586 max_h = ctx->codec->max_h;
1587
1588 ctx->params.codec_mode = CODA_MODE_INVALID;
1589 ctx->colorspace = V4L2_COLORSPACE_REC709;
1590 ctx->params.framerate = 30;
1591 ctx->aborting = 0;
1592
1593 /* Default formats for output and input queues */
1594 ctx->q_data[V4L2_M2M_SRC].fourcc = ctx->codec->src_fourcc;
1595 ctx->q_data[V4L2_M2M_DST].fourcc = ctx->codec->dst_fourcc;
1596 ctx->q_data[V4L2_M2M_SRC].width = max_w;
1597 ctx->q_data[V4L2_M2M_SRC].height = max_h;
1598 ctx->q_data[V4L2_M2M_SRC].bytesperline = max_w;
1599 ctx->q_data[V4L2_M2M_SRC].sizeimage = (max_w * max_h * 3) / 2;
1600 ctx->q_data[V4L2_M2M_DST].width = max_w;
1601 ctx->q_data[V4L2_M2M_DST].height = max_h;
1602 ctx->q_data[V4L2_M2M_DST].bytesperline = 0;
1603 ctx->q_data[V4L2_M2M_DST].sizeimage = CODA_MAX_FRAME_SIZE;
1604 ctx->q_data[V4L2_M2M_SRC].rect.width = max_w;
1605 ctx->q_data[V4L2_M2M_SRC].rect.height = max_h;
1606 ctx->q_data[V4L2_M2M_DST].rect.width = max_w;
1607 ctx->q_data[V4L2_M2M_DST].rect.height = max_h;
1608
1609 if (ctx->dev->devtype->product == CODA_960)
1610 coda_set_tiled_map_type(ctx, GDI_LINEAR_FRAME_MAP);
1611}
1612
1613/*
1614 * Queue operations
1615 */
1616static int coda_queue_setup(struct vb2_queue *vq,
1617 const struct v4l2_format *fmt,
1618 unsigned int *nbuffers, unsigned int *nplanes,
1619 unsigned int sizes[], void *alloc_ctxs[])
1620{
1621 struct coda_ctx *ctx = vb2_get_drv_priv(vq);
1622 struct coda_q_data *q_data;
1623 unsigned int size;
1624
1625 q_data = get_q_data(ctx, vq->type);
1626 size = q_data->sizeimage;
1627
1628 *nplanes = 1;
1629 sizes[0] = size;
1630
1631 alloc_ctxs[0] = ctx->dev->alloc_ctx;
1632
1633 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1634 "get %d buffer(s) of size %d each.\n", *nbuffers, size);
1635
1636 return 0;
1637}
1638
1639static int coda_buf_prepare(struct vb2_buffer *vb)
1640{
1641 struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
1642 struct coda_q_data *q_data;
1643
1644 q_data = get_q_data(ctx, vb->vb2_queue->type);
1645
1646 if (vb2_plane_size(vb, 0) < q_data->sizeimage) {
1647 v4l2_warn(&ctx->dev->v4l2_dev,
1648 "%s data will not fit into plane (%lu < %lu)\n",
1649 __func__, vb2_plane_size(vb, 0),
1650 (long)q_data->sizeimage);
1651 return -EINVAL;
1652 }
1653
1654 return 0;
1655}
1656
1657static void coda_buf_queue(struct vb2_buffer *vb)
1658{
1659 struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
1660 struct coda_dev *dev = ctx->dev;
1661 struct coda_q_data *q_data;
1662
1663 q_data = get_q_data(ctx, vb->vb2_queue->type);
1664
1665 /*
1666 * In the decoder case, immediately try to copy the buffer into the
1667 * bitstream ringbuffer and mark it as ready to be dequeued.
1668 */
1669 if (q_data->fourcc == V4L2_PIX_FMT_H264 &&
1670 vb->vb2_queue->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
1671 /*
1672 * For backwards compatibility, queuing an empty buffer marks
1673 * the stream end
1674 */
1675 if (vb2_get_plane_payload(vb, 0) == 0) {
1676 ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
1677 if ((dev->devtype->product == CODA_960) &&
1678 coda_isbusy(dev) &&
1679 (ctx->idx == coda_read(dev, CODA_REG_BIT_RUN_INDEX))) {
1680 /* if this decoder instance is running, set the stream end flag */
1681 coda_write(dev, ctx->bit_stream_param, CODA_REG_BIT_BIT_STREAM_PARAM);
1682 }
1683 }
1684 mutex_lock(&ctx->bitstream_mutex);
1685 v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vb);
1686 coda_fill_bitstream(ctx);
1687 mutex_unlock(&ctx->bitstream_mutex);
1688 } else {
1689 v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vb);
1690 }
1691}
1692
1693static void coda_parabuf_write(struct coda_ctx *ctx, int index, u32 value)
1694{
1695 struct coda_dev *dev = ctx->dev;
1696 u32 *p = ctx->parabuf.vaddr;
1697
1698 if (dev->devtype->product == CODA_DX6)
1699 p[index] = value;
1700 else
1701 p[index ^ 1] = value;
1702}
1703
1704static int coda_alloc_aux_buf(struct coda_dev *dev,
1705 struct coda_aux_buf *buf, size_t size,
1706 const char *name, struct dentry *parent)
1707{
1708 buf->vaddr = dma_alloc_coherent(&dev->plat_dev->dev, size, &buf->paddr,
1709 GFP_KERNEL);
1710 if (!buf->vaddr)
1711 return -ENOMEM;
1712
1713 buf->size = size;
1714
1715 if (name && parent) {
1716 buf->blob.data = buf->vaddr;
1717 buf->blob.size = size;
1718 buf->dentry = debugfs_create_blob(name, 0644, parent, &buf->blob);
1719 if (!buf->dentry)
1720 dev_warn(&dev->plat_dev->dev,
1721 "failed to create debugfs entry %s\n", name);
1722 }
1723
1724 return 0;
1725}
1726
1727static inline int coda_alloc_context_buf(struct coda_ctx *ctx,
1728 struct coda_aux_buf *buf, size_t size,
1729 const char *name)
1730{
1731 return coda_alloc_aux_buf(ctx->dev, buf, size, name, ctx->debugfs_entry);
1732}
1733
1734static void coda_free_aux_buf(struct coda_dev *dev,
1735 struct coda_aux_buf *buf)
1736{
1737 if (buf->vaddr) {
1738 dma_free_coherent(&dev->plat_dev->dev, buf->size,
1739 buf->vaddr, buf->paddr);
1740 buf->vaddr = NULL;
1741 buf->size = 0;
1742 }
1743 debugfs_remove(buf->dentry);
1744}
1745
1746static void coda_free_framebuffers(struct coda_ctx *ctx)
1747{
1748 int i;
1749
1750 for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++)
1751 coda_free_aux_buf(ctx->dev, &ctx->internal_frames[i]);
1752}
1753
1754static int coda_alloc_framebuffers(struct coda_ctx *ctx, struct coda_q_data *q_data, u32 fourcc)
1755{
1756 struct coda_dev *dev = ctx->dev;
1757 int width, height;
1758 dma_addr_t paddr;
1759 int ysize;
1760 int ret;
1761 int i;
1762
1763 if (ctx->codec && (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 ||
1764 ctx->codec->dst_fourcc == V4L2_PIX_FMT_H264)) {
1765 width = round_up(q_data->width, 16);
1766 height = round_up(q_data->height, 16);
1767 } else {
1768 width = round_up(q_data->width, 8);
1769 height = q_data->height;
1770 }
1771 ysize = width * height;
1772
1773 /* Allocate frame buffers */
1774 for (i = 0; i < ctx->num_internal_frames; i++) {
1775 size_t size;
1776 char *name;
1777
1778 size = ysize + ysize / 2;
1779 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
1780 dev->devtype->product != CODA_DX6)
1781 size += ysize / 4;
1782 name = kasprintf(GFP_KERNEL, "fb%d", i);
1783 ret = coda_alloc_context_buf(ctx, &ctx->internal_frames[i],
1784 size, name);
1785 kfree(name);
1786 if (ret < 0) {
1787 coda_free_framebuffers(ctx);
1788 return ret;
1789 }
1790 }
1791
1792 /* Register frame buffers in the parameter buffer */
1793 for (i = 0; i < ctx->num_internal_frames; i++) {
1794 paddr = ctx->internal_frames[i].paddr;
1795 coda_parabuf_write(ctx, i * 3 + 0, paddr); /* Y */
1796 coda_parabuf_write(ctx, i * 3 + 1, paddr + ysize); /* Cb */
1797 coda_parabuf_write(ctx, i * 3 + 2, paddr + ysize + ysize/4); /* Cr */
1798
1799 /* mvcol buffer for h.264 */
1800 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
1801 dev->devtype->product != CODA_DX6)
1802 coda_parabuf_write(ctx, 96 + i,
1803 ctx->internal_frames[i].paddr +
1804 ysize + ysize/4 + ysize/4);
1805 }
1806
1807 /* mvcol buffer for mpeg4 */
1808 if ((dev->devtype->product != CODA_DX6) &&
1809 (ctx->codec->src_fourcc == V4L2_PIX_FMT_MPEG4))
1810 coda_parabuf_write(ctx, 97, ctx->internal_frames[i].paddr +
1811 ysize + ysize/4 + ysize/4);
1812
1813 return 0;
1814}
1815
1816static int coda_h264_padding(int size, char *p)
1817{
1818 int nal_size;
1819 int diff;
1820
1821 diff = size - (size & ~0x7);
1822 if (diff == 0)
1823 return 0;
1824
1825 nal_size = coda_filler_size[diff];
1826 memcpy(p, coda_filler_nal, nal_size);
1827
1828 /* Add rbsp stop bit and trailing at the end */
1829 *(p + nal_size - 1) = 0x80;
1830
1831 return nal_size;
1832}
1833
1834static phys_addr_t coda_iram_alloc(struct coda_iram_info *iram, size_t size)
1835{
1836 phys_addr_t ret;
1837
1838 size = round_up(size, 1024);
1839 if (size > iram->remaining)
1840 return 0;
1841 iram->remaining -= size;
1842
1843 ret = iram->next_paddr;
1844 iram->next_paddr += size;
1845
1846 return ret;
1847}
1848
1849static void coda_setup_iram(struct coda_ctx *ctx)
1850{
1851 struct coda_iram_info *iram_info = &ctx->iram_info;
1852 struct coda_dev *dev = ctx->dev;
1853 int mb_width;
1854 int dbk_bits;
1855 int bit_bits;
1856 int ip_bits;
1857
1858 memset(iram_info, 0, sizeof(*iram_info));
1859 iram_info->next_paddr = dev->iram.paddr;
1860 iram_info->remaining = dev->iram.size;
1861
1862 switch (dev->devtype->product) {
1863 case CODA_7541:
1864 dbk_bits = CODA7_USE_HOST_DBK_ENABLE | CODA7_USE_DBK_ENABLE;
1865 bit_bits = CODA7_USE_HOST_BIT_ENABLE | CODA7_USE_BIT_ENABLE;
1866 ip_bits = CODA7_USE_HOST_IP_ENABLE | CODA7_USE_IP_ENABLE;
1867 break;
1868 case CODA_960:
1869 dbk_bits = CODA9_USE_HOST_DBK_ENABLE | CODA9_USE_DBK_ENABLE;
1870 bit_bits = CODA9_USE_HOST_BIT_ENABLE | CODA7_USE_BIT_ENABLE;
1871 ip_bits = CODA9_USE_HOST_IP_ENABLE | CODA7_USE_IP_ENABLE;
1872 break;
1873 default: /* CODA_DX6 */
1874 return;
1875 }
1876
1877 if (ctx->inst_type == CODA_INST_ENCODER) {
1878 struct coda_q_data *q_data_src;
1879
1880 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1881 mb_width = DIV_ROUND_UP(q_data_src->width, 16);
1882
1883 /* Prioritize in case IRAM is too small for everything */
1884 if (dev->devtype->product == CODA_7541) {
1885 iram_info->search_ram_size = round_up(mb_width * 16 *
1886 36 + 2048, 1024);
1887 iram_info->search_ram_paddr = coda_iram_alloc(iram_info,
1888 iram_info->search_ram_size);
1889 if (!iram_info->search_ram_paddr) {
1890 pr_err("IRAM is smaller than the search ram size\n");
1891 goto out;
1892 }
1893 iram_info->axi_sram_use |= CODA7_USE_HOST_ME_ENABLE |
1894 CODA7_USE_ME_ENABLE;
1895 }
1896
1897 /* Only H.264BP and H.263P3 are considered */
1898 iram_info->buf_dbk_y_use = coda_iram_alloc(iram_info, 64 * mb_width);
1899 iram_info->buf_dbk_c_use = coda_iram_alloc(iram_info, 64 * mb_width);
1900 if (!iram_info->buf_dbk_c_use)
1901 goto out;
1902 iram_info->axi_sram_use |= dbk_bits;
1903
1904 iram_info->buf_bit_use = coda_iram_alloc(iram_info, 128 * mb_width);
1905 if (!iram_info->buf_bit_use)
1906 goto out;
1907 iram_info->axi_sram_use |= bit_bits;
1908
1909 iram_info->buf_ip_ac_dc_use = coda_iram_alloc(iram_info, 128 * mb_width);
1910 if (!iram_info->buf_ip_ac_dc_use)
1911 goto out;
1912 iram_info->axi_sram_use |= ip_bits;
1913
1914 /* OVL and BTP disabled for encoder */
1915 } else if (ctx->inst_type == CODA_INST_DECODER) {
1916 struct coda_q_data *q_data_dst;
1917
1918 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1919 mb_width = DIV_ROUND_UP(q_data_dst->width, 16);
1920
1921 iram_info->buf_dbk_y_use = coda_iram_alloc(iram_info, 128 * mb_width);
1922 iram_info->buf_dbk_c_use = coda_iram_alloc(iram_info, 128 * mb_width);
1923 if (!iram_info->buf_dbk_c_use)
1924 goto out;
1925 iram_info->axi_sram_use |= dbk_bits;
1926
1927 iram_info->buf_bit_use = coda_iram_alloc(iram_info, 128 * mb_width);
1928 if (!iram_info->buf_bit_use)
1929 goto out;
1930 iram_info->axi_sram_use |= bit_bits;
1931
1932 iram_info->buf_ip_ac_dc_use = coda_iram_alloc(iram_info, 128 * mb_width);
1933 if (!iram_info->buf_ip_ac_dc_use)
1934 goto out;
1935 iram_info->axi_sram_use |= ip_bits;
1936
1937 /* OVL and BTP unused as there is no VC1 support yet */
1938 }
1939
1940out:
1941 if (!(iram_info->axi_sram_use & CODA7_USE_HOST_IP_ENABLE))
1942 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1943 "IRAM smaller than needed\n");
1944
1945 if (dev->devtype->product == CODA_7541) {
1946 /* TODO - Enabling these causes picture errors on CODA7541 */
1947 if (ctx->inst_type == CODA_INST_DECODER) {
1948 /* fw 1.4.50 */
1949 iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
1950 CODA7_USE_IP_ENABLE);
1951 } else {
1952 /* fw 13.4.29 */
1953 iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
1954 CODA7_USE_HOST_DBK_ENABLE |
1955 CODA7_USE_IP_ENABLE |
1956 CODA7_USE_DBK_ENABLE);
1957 }
1958 }
1959}
1960
1961static void coda_free_context_buffers(struct coda_ctx *ctx)
1962{
1963 struct coda_dev *dev = ctx->dev;
1964
1965 coda_free_aux_buf(dev, &ctx->slicebuf);
1966 coda_free_aux_buf(dev, &ctx->psbuf);
1967 if (dev->devtype->product != CODA_DX6)
1968 coda_free_aux_buf(dev, &ctx->workbuf);
1969}
1970
1971static int coda_alloc_context_buffers(struct coda_ctx *ctx,
1972 struct coda_q_data *q_data)
1973{
1974 struct coda_dev *dev = ctx->dev;
1975 size_t size;
1976 int ret;
1977
1978 if (dev->devtype->product == CODA_DX6)
1979 return 0;
1980
1981 if (ctx->psbuf.vaddr) {
1982 v4l2_err(&dev->v4l2_dev, "psmembuf still allocated\n");
1983 return -EBUSY;
1984 }
1985 if (ctx->slicebuf.vaddr) {
1986 v4l2_err(&dev->v4l2_dev, "slicebuf still allocated\n");
1987 return -EBUSY;
1988 }
1989 if (ctx->workbuf.vaddr) {
1990 v4l2_err(&dev->v4l2_dev, "context buffer still allocated\n");
1991 ret = -EBUSY;
1992 return -ENOMEM;
1993 }
1994
1995 if (q_data->fourcc == V4L2_PIX_FMT_H264) {
1996 /* worst case slice size */
1997 size = (DIV_ROUND_UP(q_data->width, 16) *
1998 DIV_ROUND_UP(q_data->height, 16)) * 3200 / 8 + 512;
1999 ret = coda_alloc_context_buf(ctx, &ctx->slicebuf, size, "slicebuf");
2000 if (ret < 0) {
2001 v4l2_err(&dev->v4l2_dev, "failed to allocate %d byte slice buffer",
2002 ctx->slicebuf.size);
2003 return ret;
2004 }
2005 }
2006
2007 if (dev->devtype->product == CODA_7541) {
2008 ret = coda_alloc_context_buf(ctx, &ctx->psbuf, CODA7_PS_BUF_SIZE, "psbuf");
2009 if (ret < 0) {
2010 v4l2_err(&dev->v4l2_dev, "failed to allocate psmem buffer");
2011 goto err;
2012 }
2013 }
2014
2015 size = dev->devtype->workbuf_size;
2016 if (dev->devtype->product == CODA_960 &&
2017 q_data->fourcc == V4L2_PIX_FMT_H264)
2018 size += CODA9_PS_SAVE_SIZE;
2019 ret = coda_alloc_context_buf(ctx, &ctx->workbuf, size, "workbuf");
2020 if (ret < 0) {
2021 v4l2_err(&dev->v4l2_dev, "failed to allocate %d byte context buffer",
2022 ctx->workbuf.size);
2023 goto err;
2024 }
2025
2026 return 0;
2027
2028err:
2029 coda_free_context_buffers(ctx);
2030 return ret;
2031}
2032
2033static int coda_start_decoding(struct coda_ctx *ctx)
2034{
2035 struct coda_q_data *q_data_src, *q_data_dst;
2036 u32 bitstream_buf, bitstream_size;
2037 struct coda_dev *dev = ctx->dev;
2038 int width, height;
2039 u32 src_fourcc;
2040 u32 val;
2041 int ret;
2042
2043 /* Start decoding */
2044 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
2045 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
2046 bitstream_buf = ctx->bitstream.paddr;
2047 bitstream_size = ctx->bitstream.size;
2048 src_fourcc = q_data_src->fourcc;
2049
2050 coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
2051
2052 /* Update coda bitstream read and write pointers from kfifo */
2053 coda_kfifo_sync_to_device_full(ctx);
2054
2055 ctx->display_idx = -1;
2056 ctx->frm_dis_flg = 0;
2057 coda_write(dev, 0, CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
2058
2059 coda_write(dev, CODA_BIT_DEC_SEQ_INIT_ESCAPE,
2060 CODA_REG_BIT_BIT_STREAM_PARAM);
2061
2062 coda_write(dev, bitstream_buf, CODA_CMD_DEC_SEQ_BB_START);
2063 coda_write(dev, bitstream_size / 1024, CODA_CMD_DEC_SEQ_BB_SIZE);
2064 val = 0;
2065 if ((dev->devtype->product == CODA_7541) ||
2066 (dev->devtype->product == CODA_960))
2067 val |= CODA_REORDER_ENABLE;
2068 coda_write(dev, val, CODA_CMD_DEC_SEQ_OPTION);
2069
2070 ctx->params.codec_mode = ctx->codec->mode;
2071 if (dev->devtype->product == CODA_960 &&
2072 src_fourcc == V4L2_PIX_FMT_MPEG4)
2073 ctx->params.codec_mode_aux = CODA_MP4_AUX_MPEG4;
2074 else
2075 ctx->params.codec_mode_aux = 0;
2076 if (src_fourcc == V4L2_PIX_FMT_H264) {
2077 if (dev->devtype->product == CODA_7541) {
2078 coda_write(dev, ctx->psbuf.paddr,
2079 CODA_CMD_DEC_SEQ_PS_BB_START);
2080 coda_write(dev, (CODA7_PS_BUF_SIZE / 1024),
2081 CODA_CMD_DEC_SEQ_PS_BB_SIZE);
2082 }
2083 if (dev->devtype->product == CODA_960) {
2084 coda_write(dev, 0, CODA_CMD_DEC_SEQ_X264_MV_EN);
2085 coda_write(dev, 512, CODA_CMD_DEC_SEQ_SPP_CHUNK_SIZE);
2086 }
2087 }
2088 if (dev->devtype->product != CODA_960) {
2089 coda_write(dev, 0, CODA_CMD_DEC_SEQ_SRC_SIZE);
2090 }
2091
2092 if (coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT)) {
2093 v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
2094 coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
2095 return -ETIMEDOUT;
2096 }
2097
2098 /* Update kfifo out pointer from coda bitstream read pointer */
2099 coda_kfifo_sync_from_device(ctx);
2100
2101 coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
2102
2103 if (coda_read(dev, CODA_RET_DEC_SEQ_SUCCESS) == 0) {
2104 v4l2_err(&dev->v4l2_dev,
2105 "CODA_COMMAND_SEQ_INIT failed, error code = %d\n",
2106 coda_read(dev, CODA_RET_DEC_SEQ_ERR_REASON));
2107 return -EAGAIN;
2108 }
2109
2110 val = coda_read(dev, CODA_RET_DEC_SEQ_SRC_SIZE);
2111 if (dev->devtype->product == CODA_DX6) {
2112 width = (val >> CODADX6_PICWIDTH_OFFSET) & CODADX6_PICWIDTH_MASK;
2113 height = val & CODADX6_PICHEIGHT_MASK;
2114 } else {
2115 width = (val >> CODA7_PICWIDTH_OFFSET) & CODA7_PICWIDTH_MASK;
2116 height = val & CODA7_PICHEIGHT_MASK;
2117 }
2118
2119 if (width > q_data_dst->width || height > q_data_dst->height) {
2120 v4l2_err(&dev->v4l2_dev, "stream is %dx%d, not %dx%d\n",
2121 width, height, q_data_dst->width, q_data_dst->height);
2122 return -EINVAL;
2123 }
2124
2125 width = round_up(width, 16);
2126 height = round_up(height, 16);
2127
2128 v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "%s instance %d now: %dx%d\n",
2129 __func__, ctx->idx, width, height);
2130
2131 ctx->num_internal_frames = coda_read(dev, CODA_RET_DEC_SEQ_FRAME_NEED);
2132 if (ctx->num_internal_frames > CODA_MAX_FRAMEBUFFERS) {
2133 v4l2_err(&dev->v4l2_dev,
2134 "not enough framebuffers to decode (%d < %d)\n",
2135 CODA_MAX_FRAMEBUFFERS, ctx->num_internal_frames);
2136 return -EINVAL;
2137 }
2138
2139 if (src_fourcc == V4L2_PIX_FMT_H264) {
2140 u32 left_right;
2141 u32 top_bottom;
2142
2143 left_right = coda_read(dev, CODA_RET_DEC_SEQ_CROP_LEFT_RIGHT);
2144 top_bottom = coda_read(dev, CODA_RET_DEC_SEQ_CROP_TOP_BOTTOM);
2145
2146 q_data_dst->rect.left = (left_right >> 10) & 0x3ff;
2147 q_data_dst->rect.top = (top_bottom >> 10) & 0x3ff;
2148 q_data_dst->rect.width = width - q_data_dst->rect.left -
2149 (left_right & 0x3ff);
2150 q_data_dst->rect.height = height - q_data_dst->rect.top -
2151 (top_bottom & 0x3ff);
2152 }
2153
2154 ret = coda_alloc_framebuffers(ctx, q_data_dst, src_fourcc);
2155 if (ret < 0)
2156 return ret;
2157
2158 /* Tell the decoder how many frame buffers we allocated. */
2159 coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
2160 coda_write(dev, width, CODA_CMD_SET_FRAME_BUF_STRIDE);
2161
2162 if (dev->devtype->product != CODA_DX6) {
2163 /* Set secondary AXI IRAM */
2164 coda_setup_iram(ctx);
2165
2166 coda_write(dev, ctx->iram_info.buf_bit_use,
2167 CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
2168 coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
2169 CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
2170 coda_write(dev, ctx->iram_info.buf_dbk_y_use,
2171 CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
2172 coda_write(dev, ctx->iram_info.buf_dbk_c_use,
2173 CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
2174 coda_write(dev, ctx->iram_info.buf_ovl_use,
2175 CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
2176 if (dev->devtype->product == CODA_960)
2177 coda_write(dev, ctx->iram_info.buf_btp_use,
2178 CODA9_CMD_SET_FRAME_AXI_BTP_ADDR);
2179 }
2180
2181 if (dev->devtype->product == CODA_960) {
2182 coda_write(dev, -1, CODA9_CMD_SET_FRAME_DELAY);
2183
2184 coda_write(dev, 0x20262024, CODA9_CMD_SET_FRAME_CACHE_SIZE);
2185 coda_write(dev, 2 << CODA9_CACHE_PAGEMERGE_OFFSET |
2186 32 << CODA9_CACHE_LUMA_BUFFER_SIZE_OFFSET |
2187 8 << CODA9_CACHE_CB_BUFFER_SIZE_OFFSET |
2188 8 << CODA9_CACHE_CR_BUFFER_SIZE_OFFSET,
2189 CODA9_CMD_SET_FRAME_CACHE_CONFIG);
2190 }
2191
2192 if (src_fourcc == V4L2_PIX_FMT_H264) {
2193 coda_write(dev, ctx->slicebuf.paddr,
2194 CODA_CMD_SET_FRAME_SLICE_BB_START);
2195 coda_write(dev, ctx->slicebuf.size / 1024,
2196 CODA_CMD_SET_FRAME_SLICE_BB_SIZE);
2197 }
2198
2199 if (dev->devtype->product == CODA_7541) {
2200 int max_mb_x = 1920 / 16;
2201 int max_mb_y = 1088 / 16;
2202 int max_mb_num = max_mb_x * max_mb_y;
2203
2204 coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y,
2205 CODA7_CMD_SET_FRAME_MAX_DEC_SIZE);
2206 } else if (dev->devtype->product == CODA_960) {
2207 int max_mb_x = 1920 / 16;
2208 int max_mb_y = 1088 / 16;
2209 int max_mb_num = max_mb_x * max_mb_y;
2210
2211 coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y,
2212 CODA9_CMD_SET_FRAME_MAX_DEC_SIZE);
2213 }
2214
2215 if (coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF)) {
2216 v4l2_err(&ctx->dev->v4l2_dev,
2217 "CODA_COMMAND_SET_FRAME_BUF timeout\n");
2218 return -ETIMEDOUT;
2219 }
2220
2221 return 0;
2222}
2223
2224static int coda_encode_header(struct coda_ctx *ctx, struct vb2_buffer *buf,
2225 int header_code, u8 *header, int *size)
2226{
2227 struct coda_dev *dev = ctx->dev;
2228 size_t bufsize;
2229 int ret;
2230 int i;
2231
2232 if (dev->devtype->product == CODA_960)
2233 memset(vb2_plane_vaddr(buf, 0), 0, 64);
2234
2235 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0),
2236 CODA_CMD_ENC_HEADER_BB_START);
2237 bufsize = vb2_plane_size(buf, 0);
2238 if (dev->devtype->product == CODA_960)
2239 bufsize /= 1024;
2240 coda_write(dev, bufsize, CODA_CMD_ENC_HEADER_BB_SIZE);
2241 coda_write(dev, header_code, CODA_CMD_ENC_HEADER_CODE);
2242 ret = coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER);
2243 if (ret < 0) {
2244 v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
2245 return ret;
2246 }
2247
2248 if (dev->devtype->product == CODA_960) {
2249 for (i = 63; i > 0; i--)
2250 if (((char *)vb2_plane_vaddr(buf, 0))[i] != 0)
2251 break;
2252 *size = i + 1;
2253 } else {
2254 *size = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx)) -
2255 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
2256 }
2257 memcpy(header, vb2_plane_vaddr(buf, 0), *size);
2258
2259 return 0;
2260}
2261
2262static int coda_start_encoding(struct coda_ctx *ctx);
2263
2264static int coda_start_streaming(struct vb2_queue *q, unsigned int count)
2265{
2266 struct coda_ctx *ctx = vb2_get_drv_priv(q);
2267 struct v4l2_device *v4l2_dev = &ctx->dev->v4l2_dev;
2268 struct coda_dev *dev = ctx->dev;
2269 struct coda_q_data *q_data_src, *q_data_dst;
2270 u32 dst_fourcc;
2271 int ret = 0;
2272
2273 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
2274 if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
2275 if (q_data_src->fourcc == V4L2_PIX_FMT_H264) {
2276 if (coda_get_bitstream_payload(ctx) < 512)
2277 return -EINVAL;
2278 } else {
2279 if (count < 1)
2280 return -EINVAL;
2281 }
2282
2283 ctx->streamon_out = 1;
2284
2285 if (coda_format_is_yuv(q_data_src->fourcc))
2286 ctx->inst_type = CODA_INST_ENCODER;
2287 else
2288 ctx->inst_type = CODA_INST_DECODER;
2289 } else {
2290 if (count < 1)
2291 return -EINVAL;
2292
2293 ctx->streamon_cap = 1;
2294 }
2295
2296 /* Don't start the coda unless both queues are on */
2297 if (!(ctx->streamon_out & ctx->streamon_cap))
2298 return 0;
2299
2300 /* Allow decoder device_run with no new buffers queued */
2301 if (ctx->inst_type == CODA_INST_DECODER)
2302 v4l2_m2m_set_src_buffered(ctx->fh.m2m_ctx, true);
2303
2304 ctx->gopcounter = ctx->params.gop_size - 1;
2305 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
2306 dst_fourcc = q_data_dst->fourcc;
2307
2308 ctx->codec = coda_find_codec(ctx->dev, q_data_src->fourcc,
2309 q_data_dst->fourcc);
2310 if (!ctx->codec) {
2311 v4l2_err(v4l2_dev, "couldn't tell instance type.\n");
2312 return -EINVAL;
2313 }
2314
2315 /* Allocate per-instance buffers */
2316 ret = coda_alloc_context_buffers(ctx, q_data_src);
2317 if (ret < 0)
2318 return ret;
2319
2320 if (ctx->inst_type == CODA_INST_DECODER) {
2321 mutex_lock(&dev->coda_mutex);
2322 ret = coda_start_decoding(ctx);
2323 mutex_unlock(&dev->coda_mutex);
2324 if (ret == -EAGAIN)
2325 return 0;
2326 else if (ret < 0)
2327 return ret;
2328 } else {
2329 ret = coda_start_encoding(ctx);
2330 }
2331
2332 ctx->initialized = 1;
2333 return ret;
2334}
2335
2336static int coda_start_encoding(struct coda_ctx *ctx)
2337{
2338 struct coda_dev *dev = ctx->dev;
2339 struct v4l2_device *v4l2_dev = &dev->v4l2_dev;
2340 struct coda_q_data *q_data_src, *q_data_dst;
2341 u32 bitstream_buf, bitstream_size;
2342 struct vb2_buffer *buf;
2343 int gamma, ret, value;
2344 u32 dst_fourcc;
2345
2346 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
2347 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
2348 dst_fourcc = q_data_dst->fourcc;
2349
2350 buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
2351 bitstream_buf = vb2_dma_contig_plane_dma_addr(buf, 0);
2352 bitstream_size = q_data_dst->sizeimage;
2353
2354 if (!coda_is_initialized(dev)) {
2355 v4l2_err(v4l2_dev, "coda is not initialized.\n");
2356 return -EFAULT;
2357 }
2358
2359 mutex_lock(&dev->coda_mutex);
2360
2361 coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
2362 coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
2363 coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
2364 switch (dev->devtype->product) {
2365 case CODA_DX6:
2366 coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN |
2367 CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
2368 break;
2369 case CODA_960:
2370 coda_write(dev, 0, CODA9_GDI_WPROT_RGN_EN);
2371 /* fallthrough */
2372 case CODA_7541:
2373 coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN |
2374 CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
2375 break;
2376 }
2377
2378 value = coda_read(dev, CODA_REG_BIT_FRAME_MEM_CTRL);
2379 value &= ~(1 << 2 | 0x7 << 9);
2380 ctx->frame_mem_ctrl = value;
2381 coda_write(dev, value, CODA_REG_BIT_FRAME_MEM_CTRL);
2382
2383 if (dev->devtype->product == CODA_DX6) {
2384 /* Configure the coda */
2385 coda_write(dev, dev->iram.paddr, CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR);
2386 }
2387
2388 /* Could set rotation here if needed */
2389 switch (dev->devtype->product) {
2390 case CODA_DX6:
2391 value = (q_data_src->width & CODADX6_PICWIDTH_MASK) << CODADX6_PICWIDTH_OFFSET;
2392 value |= (q_data_src->height & CODADX6_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
2393 break;
2394 case CODA_7541:
2395 if (dst_fourcc == V4L2_PIX_FMT_H264) {
2396 value = (round_up(q_data_src->width, 16) &
2397 CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
2398 value |= (round_up(q_data_src->height, 16) &
2399 CODA7_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
2400 break;
2401 }
2402 /* fallthrough */
2403 case CODA_960:
2404 value = (q_data_src->width & CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
2405 value |= (q_data_src->height & CODA7_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
2406 }
2407 coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE);
2408 coda_write(dev, ctx->params.framerate,
2409 CODA_CMD_ENC_SEQ_SRC_F_RATE);
2410
2411 ctx->params.codec_mode = ctx->codec->mode;
2412 switch (dst_fourcc) {
2413 case V4L2_PIX_FMT_MPEG4:
2414 if (dev->devtype->product == CODA_960)
2415 coda_write(dev, CODA9_STD_MPEG4, CODA_CMD_ENC_SEQ_COD_STD);
2416 else
2417 coda_write(dev, CODA_STD_MPEG4, CODA_CMD_ENC_SEQ_COD_STD);
2418 coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA);
2419 break;
2420 case V4L2_PIX_FMT_H264:
2421 if (dev->devtype->product == CODA_960)
2422 coda_write(dev, CODA9_STD_H264, CODA_CMD_ENC_SEQ_COD_STD);
2423 else
2424 coda_write(dev, CODA_STD_H264, CODA_CMD_ENC_SEQ_COD_STD);
2425 if (ctx->params.h264_deblk_enabled) {
2426 value = ((ctx->params.h264_deblk_alpha &
2427 CODA_264PARAM_DEBLKFILTEROFFSETALPHA_MASK) <<
2428 CODA_264PARAM_DEBLKFILTEROFFSETALPHA_OFFSET) |
2429 ((ctx->params.h264_deblk_beta &
2430 CODA_264PARAM_DEBLKFILTEROFFSETBETA_MASK) <<
2431 CODA_264PARAM_DEBLKFILTEROFFSETBETA_OFFSET);
2432 } else {
2433 value = 1 << CODA_264PARAM_DISABLEDEBLK_OFFSET;
2434 }
2435 coda_write(dev, value, CODA_CMD_ENC_SEQ_264_PARA);
2436 break;
2437 default:
2438 v4l2_err(v4l2_dev,
2439 "dst format (0x%08x) invalid.\n", dst_fourcc);
2440 ret = -EINVAL;
2441 goto out;
2442 }
2443
2444 switch (ctx->params.slice_mode) {
2445 case V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE:
2446 value = 0;
2447 break;
2448 case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB:
2449 value = (ctx->params.slice_max_mb & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
2450 value |= (1 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
2451 value |= 1 & CODA_SLICING_MODE_MASK;
2452 break;
2453 case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES:
2454 value = (ctx->params.slice_max_bits & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
2455 value |= (0 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
2456 value |= 1 & CODA_SLICING_MODE_MASK;
2457 break;
2458 }
2459 coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE);
2460 value = ctx->params.gop_size & CODA_GOP_SIZE_MASK;
2461 coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE);
2462
2463 if (ctx->params.bitrate) {
2464 /* Rate control enabled */
2465 value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK) << CODA_RATECONTROL_BITRATE_OFFSET;
2466 value |= 1 & CODA_RATECONTROL_ENABLE_MASK;
2467 if (dev->devtype->product == CODA_960)
2468 value |= BIT(31); /* disable autoskip */
2469 } else {
2470 value = 0;
2471 }
2472 coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA);
2473
2474 coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_BUF_SIZE);
2475 coda_write(dev, ctx->params.intra_refresh,
2476 CODA_CMD_ENC_SEQ_INTRA_REFRESH);
2477
2478 coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START);
2479 coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE);
2480
2481
2482 value = 0;
2483 if (dev->devtype->product == CODA_960)
2484 gamma = CODA9_DEFAULT_GAMMA;
2485 else
2486 gamma = CODA_DEFAULT_GAMMA;
2487 if (gamma > 0) {
2488 coda_write(dev, (gamma & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET,
2489 CODA_CMD_ENC_SEQ_RC_GAMMA);
2490 }
2491
2492 if (ctx->params.h264_min_qp || ctx->params.h264_max_qp) {
2493 coda_write(dev,
2494 ctx->params.h264_min_qp << CODA_QPMIN_OFFSET |
2495 ctx->params.h264_max_qp << CODA_QPMAX_OFFSET,
2496 CODA_CMD_ENC_SEQ_RC_QP_MIN_MAX);
2497 }
2498 if (dev->devtype->product == CODA_960) {
2499 if (ctx->params.h264_max_qp)
2500 value |= 1 << CODA9_OPTION_RCQPMAX_OFFSET;
2501 if (CODA_DEFAULT_GAMMA > 0)
2502 value |= 1 << CODA9_OPTION_GAMMA_OFFSET;
2503 } else {
2504 if (CODA_DEFAULT_GAMMA > 0) {
2505 if (dev->devtype->product == CODA_DX6)
2506 value |= 1 << CODADX6_OPTION_GAMMA_OFFSET;
2507 else
2508 value |= 1 << CODA7_OPTION_GAMMA_OFFSET;
2509 }
2510 if (ctx->params.h264_min_qp)
2511 value |= 1 << CODA7_OPTION_RCQPMIN_OFFSET;
2512 if (ctx->params.h264_max_qp)
2513 value |= 1 << CODA7_OPTION_RCQPMAX_OFFSET;
2514 }
2515 coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION);
2516
2517 coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_INTERVAL_MODE);
2518
2519 coda_setup_iram(ctx);
2520
2521 if (dst_fourcc == V4L2_PIX_FMT_H264) {
2522 switch (dev->devtype->product) {
2523 case CODA_DX6:
2524 value = FMO_SLICE_SAVE_BUF_SIZE << 7;
2525 coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO);
2526 break;
2527 case CODA_7541:
2528 coda_write(dev, ctx->iram_info.search_ram_paddr,
2529 CODA7_CMD_ENC_SEQ_SEARCH_BASE);
2530 coda_write(dev, ctx->iram_info.search_ram_size,
2531 CODA7_CMD_ENC_SEQ_SEARCH_SIZE);
2532 break;
2533 case CODA_960:
2534 coda_write(dev, 0, CODA9_CMD_ENC_SEQ_ME_OPTION);
2535 coda_write(dev, 0, CODA9_CMD_ENC_SEQ_INTRA_WEIGHT);
2536 }
2537 }
2538
2539 ret = coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT);
2540 if (ret < 0) {
2541 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
2542 goto out;
2543 }
2544
2545 if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0) {
2546 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT failed\n");
2547 ret = -EFAULT;
2548 goto out;
2549 }
2550
2551 if (dev->devtype->product == CODA_960)
2552 ctx->num_internal_frames = 4;
2553 else
2554 ctx->num_internal_frames = 2;
2555 ret = coda_alloc_framebuffers(ctx, q_data_src, dst_fourcc);
2556 if (ret < 0) {
2557 v4l2_err(v4l2_dev, "failed to allocate framebuffers\n");
2558 goto out;
2559 }
2560
2561 coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
2562 coda_write(dev, q_data_src->bytesperline,
2563 CODA_CMD_SET_FRAME_BUF_STRIDE);
2564 if (dev->devtype->product == CODA_7541) {
2565 coda_write(dev, q_data_src->bytesperline,
2566 CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE);
2567 }
2568 if (dev->devtype->product != CODA_DX6) {
2569 coda_write(dev, ctx->iram_info.buf_bit_use,
2570 CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
2571 coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
2572 CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
2573 coda_write(dev, ctx->iram_info.buf_dbk_y_use,
2574 CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
2575 coda_write(dev, ctx->iram_info.buf_dbk_c_use,
2576 CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
2577 coda_write(dev, ctx->iram_info.buf_ovl_use,
2578 CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
2579 if (dev->devtype->product == CODA_960) {
2580 coda_write(dev, ctx->iram_info.buf_btp_use,
2581 CODA9_CMD_SET_FRAME_AXI_BTP_ADDR);
2582
2583 /* FIXME */
2584 coda_write(dev, ctx->internal_frames[2].paddr, CODA9_CMD_SET_FRAME_SUBSAMP_A);
2585 coda_write(dev, ctx->internal_frames[3].paddr, CODA9_CMD_SET_FRAME_SUBSAMP_B);
2586 }
2587 }
2588
2589 ret = coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF);
2590 if (ret < 0) {
2591 v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n");
2592 goto out;
2593 }
2594
2595 /* Save stream headers */
2596 buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
2597 switch (dst_fourcc) {
2598 case V4L2_PIX_FMT_H264:
2599 /*
2600 * Get SPS in the first frame and copy it to an
2601 * intermediate buffer.
2602 */
2603 ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_SPS,
2604 &ctx->vpu_header[0][0],
2605 &ctx->vpu_header_size[0]);
2606 if (ret < 0)
2607 goto out;
2608
2609 /*
2610 * Get PPS in the first frame and copy it to an
2611 * intermediate buffer.
2612 */
2613 ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_PPS,
2614 &ctx->vpu_header[1][0],
2615 &ctx->vpu_header_size[1]);
2616 if (ret < 0)
2617 goto out;
2618
2619 /*
2620 * Length of H.264 headers is variable and thus it might not be
2621 * aligned for the coda to append the encoded frame. In that is
2622 * the case a filler NAL must be added to header 2.
2623 */
2624 ctx->vpu_header_size[2] = coda_h264_padding(
2625 (ctx->vpu_header_size[0] +
2626 ctx->vpu_header_size[1]),
2627 ctx->vpu_header[2]);
2628 break;
2629 case V4L2_PIX_FMT_MPEG4:
2630 /*
2631 * Get VOS in the first frame and copy it to an
2632 * intermediate buffer
2633 */
2634 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOS,
2635 &ctx->vpu_header[0][0],
2636 &ctx->vpu_header_size[0]);
2637 if (ret < 0)
2638 goto out;
2639
2640 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VIS,
2641 &ctx->vpu_header[1][0],
2642 &ctx->vpu_header_size[1]);
2643 if (ret < 0)
2644 goto out;
2645
2646 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOL,
2647 &ctx->vpu_header[2][0],
2648 &ctx->vpu_header_size[2]);
2649 if (ret < 0)
2650 goto out;
2651 break;
2652 default:
2653 /* No more formats need to save headers at the moment */
2654 break;
2655 }
2656
2657out:
2658 mutex_unlock(&dev->coda_mutex);
2659 return ret;
2660}
2661
2662static void coda_stop_streaming(struct vb2_queue *q)
2663{
2664 struct coda_ctx *ctx = vb2_get_drv_priv(q);
2665 struct coda_dev *dev = ctx->dev;
2666
2667 if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
2668 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2669 "%s: output\n", __func__);
2670 ctx->streamon_out = 0;
2671
2672 if (ctx->inst_type == CODA_INST_DECODER &&
2673 coda_isbusy(dev) && ctx->idx == coda_read(dev, CODA_REG_BIT_RUN_INDEX)) {
2674 /* if this decoder instance is running, set the stream end flag */
2675 if (dev->devtype->product == CODA_960) {
2676 u32 val = coda_read(dev, CODA_REG_BIT_BIT_STREAM_PARAM);
2677
2678 val |= CODA_BIT_STREAM_END_FLAG;
2679 coda_write(dev, val, CODA_REG_BIT_BIT_STREAM_PARAM);
2680 ctx->bit_stream_param = val;
2681 }
2682 }
2683 ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
2684
2685 ctx->isequence = 0;
2686 } else {
2687 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2688 "%s: capture\n", __func__);
2689 ctx->streamon_cap = 0;
2690
2691 ctx->osequence = 0;
2692 ctx->sequence_offset = 0;
2693 }
2694
2695 if (!ctx->streamon_out && !ctx->streamon_cap) {
2696 struct coda_timestamp *ts;
2697
2698 while (!list_empty(&ctx->timestamp_list)) {
2699 ts = list_first_entry(&ctx->timestamp_list,
2700 struct coda_timestamp, list);
2701 list_del(&ts->list);
2702 kfree(ts);
2703 }
2704 kfifo_init(&ctx->bitstream_fifo,
2705 ctx->bitstream.vaddr, ctx->bitstream.size);
2706 ctx->runcounter = 0;
2707 }
2708}
2709
2710static struct vb2_ops coda_qops = {
2711 .queue_setup = coda_queue_setup,
2712 .buf_prepare = coda_buf_prepare,
2713 .buf_queue = coda_buf_queue,
2714 .start_streaming = coda_start_streaming,
2715 .stop_streaming = coda_stop_streaming,
2716 .wait_prepare = vb2_ops_wait_prepare,
2717 .wait_finish = vb2_ops_wait_finish,
2718};
2719
2720static int coda_s_ctrl(struct v4l2_ctrl *ctrl)
2721{
2722 struct coda_ctx *ctx =
2723 container_of(ctrl->handler, struct coda_ctx, ctrls);
2724
2725 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2726 "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val);
2727
2728 switch (ctrl->id) {
2729 case V4L2_CID_HFLIP:
2730 if (ctrl->val)
2731 ctx->params.rot_mode |= CODA_MIR_HOR;
2732 else
2733 ctx->params.rot_mode &= ~CODA_MIR_HOR;
2734 break;
2735 case V4L2_CID_VFLIP:
2736 if (ctrl->val)
2737 ctx->params.rot_mode |= CODA_MIR_VER;
2738 else
2739 ctx->params.rot_mode &= ~CODA_MIR_VER;
2740 break;
2741 case V4L2_CID_MPEG_VIDEO_BITRATE:
2742 ctx->params.bitrate = ctrl->val / 1000;
2743 break;
2744 case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
2745 ctx->params.gop_size = ctrl->val;
2746 break;
2747 case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
2748 ctx->params.h264_intra_qp = ctrl->val;
2749 break;
2750 case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP:
2751 ctx->params.h264_inter_qp = ctrl->val;
2752 break;
2753 case V4L2_CID_MPEG_VIDEO_H264_MIN_QP:
2754 ctx->params.h264_min_qp = ctrl->val;
2755 break;
2756 case V4L2_CID_MPEG_VIDEO_H264_MAX_QP:
2757 ctx->params.h264_max_qp = ctrl->val;
2758 break;
2759 case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA:
2760 ctx->params.h264_deblk_alpha = ctrl->val;
2761 break;
2762 case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA:
2763 ctx->params.h264_deblk_beta = ctrl->val;
2764 break;
2765 case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE:
2766 ctx->params.h264_deblk_enabled = (ctrl->val ==
2767 V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED);
2768 break;
2769 case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP:
2770 ctx->params.mpeg4_intra_qp = ctrl->val;
2771 break;
2772 case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP:
2773 ctx->params.mpeg4_inter_qp = ctrl->val;
2774 break;
2775 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE:
2776 ctx->params.slice_mode = ctrl->val;
2777 break;
2778 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB:
2779 ctx->params.slice_max_mb = ctrl->val;
2780 break;
2781 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES:
2782 ctx->params.slice_max_bits = ctrl->val * 8;
2783 break;
2784 case V4L2_CID_MPEG_VIDEO_HEADER_MODE:
2785 break;
2786 case V4L2_CID_MPEG_VIDEO_CYCLIC_INTRA_REFRESH_MB:
2787 ctx->params.intra_refresh = ctrl->val;
2788 break;
2789 default:
2790 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2791 "Invalid control, id=%d, val=%d\n",
2792 ctrl->id, ctrl->val);
2793 return -EINVAL;
2794 }
2795
2796 return 0;
2797}
2798
2799static struct v4l2_ctrl_ops coda_ctrl_ops = {
2800 .s_ctrl = coda_s_ctrl,
2801};
2802
2803static int coda_ctrls_setup(struct coda_ctx *ctx)
2804{
2805 v4l2_ctrl_handler_init(&ctx->ctrls, 9);
2806
2807 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2808 V4L2_CID_HFLIP, 0, 1, 1, 0);
2809 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2810 V4L2_CID_VFLIP, 0, 1, 1, 0);
2811 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2812 V4L2_CID_MPEG_VIDEO_BITRATE, 0, 32767000, 1, 0);
2813 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2814 V4L2_CID_MPEG_VIDEO_GOP_SIZE, 1, 60, 1, 16);
2815 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2816 V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, 0, 51, 1, 25);
2817 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2818 V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, 0, 51, 1, 25);
2819 if (ctx->dev->devtype->product != CODA_960) {
2820 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2821 V4L2_CID_MPEG_VIDEO_H264_MIN_QP, 0, 51, 1, 12);
2822 }
2823 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2824 V4L2_CID_MPEG_VIDEO_H264_MAX_QP, 0, 51, 1, 51);
2825 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2826 V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA, 0, 15, 1, 0);
2827 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2828 V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA, 0, 15, 1, 0);
2829 v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
2830 V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE,
2831 V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED, 0x0,
2832 V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED);
2833 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2834 V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP, 1, 31, 1, 2);
2835 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2836 V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP, 1, 31, 1, 2);
2837 v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
2838 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE,
2839 V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES, 0x0,
2840 V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE);
2841 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2842 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, 1, 0x3fffffff, 1, 1);
2843 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2844 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, 1, 0x3fffffff, 1, 500);
2845 v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
2846 V4L2_CID_MPEG_VIDEO_HEADER_MODE,
2847 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
2848 (1 << V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE),
2849 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME);
2850 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2851 V4L2_CID_MPEG_VIDEO_CYCLIC_INTRA_REFRESH_MB, 0, 1920 * 1088 / 256, 1, 0);
2852
2853 if (ctx->ctrls.error) {
2854 v4l2_err(&ctx->dev->v4l2_dev, "control initialization error (%d)",
2855 ctx->ctrls.error);
2856 return -EINVAL;
2857 }
2858
2859 return v4l2_ctrl_handler_setup(&ctx->ctrls);
2860}
2861
2862static int coda_queue_init(void *priv, struct vb2_queue *src_vq,
2863 struct vb2_queue *dst_vq)
2864{
2865 struct coda_ctx *ctx = priv;
2866 int ret;
2867
2868 src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
2869 src_vq->io_modes = VB2_DMABUF | VB2_MMAP | VB2_USERPTR;
2870 src_vq->drv_priv = ctx;
2871 src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
2872 src_vq->ops = &coda_qops;
2873 src_vq->mem_ops = &vb2_dma_contig_memops;
2874 src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
2875 src_vq->lock = &ctx->dev->dev_mutex;
2876
2877 ret = vb2_queue_init(src_vq);
2878 if (ret)
2879 return ret;
2880
2881 dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2882 dst_vq->io_modes = VB2_DMABUF | VB2_MMAP | VB2_USERPTR;
2883 dst_vq->drv_priv = ctx;
2884 dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
2885 dst_vq->ops = &coda_qops;
2886 dst_vq->mem_ops = &vb2_dma_contig_memops;
2887 dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
2888 dst_vq->lock = &ctx->dev->dev_mutex;
2889
2890 return vb2_queue_init(dst_vq);
2891}
2892
2893static int coda_next_free_instance(struct coda_dev *dev)
2894{
2895 int idx = ffz(dev->instance_mask);
2896
2897 if ((idx < 0) ||
2898 (dev->devtype->product == CODA_DX6 && idx > CODADX6_MAX_INSTANCES))
2899 return -EBUSY;
2900
2901 return idx;
2902}
2903
2904static int coda_open(struct file *file)
2905{
2906 struct coda_dev *dev = video_drvdata(file);
2907 struct coda_ctx *ctx = NULL;
2908 char *name;
2909 int ret;
2910 int idx;
2911
2912 ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
2913 if (!ctx)
2914 return -ENOMEM;
2915
2916 idx = coda_next_free_instance(dev);
2917 if (idx < 0) {
2918 ret = idx;
2919 goto err_coda_max;
2920 }
2921 set_bit(idx, &dev->instance_mask);
2922
2923 name = kasprintf(GFP_KERNEL, "context%d", idx);
2924 ctx->debugfs_entry = debugfs_create_dir(name, dev->debugfs_root);
2925 kfree(name);
2926
2927 init_completion(&ctx->completion);
2928 INIT_WORK(&ctx->pic_run_work, coda_pic_run_work);
2929 INIT_WORK(&ctx->seq_end_work, coda_seq_end_work);
2930 v4l2_fh_init(&ctx->fh, video_devdata(file));
2931 file->private_data = &ctx->fh;
2932 v4l2_fh_add(&ctx->fh);
2933 ctx->dev = dev;
2934 ctx->idx = idx;
2935 switch (dev->devtype->product) {
2936 case CODA_7541:
2937 case CODA_960:
2938 ctx->reg_idx = 0;
2939 break;
2940 default:
2941 ctx->reg_idx = idx;
2942 }
2943
2944 /* Power up and upload firmware if necessary */
2945 ret = pm_runtime_get_sync(&dev->plat_dev->dev);
2946 if (ret < 0) {
2947 v4l2_err(&dev->v4l2_dev, "failed to power up: %d\n", ret);
2948 goto err_pm_get;
2949 }
2950
2951 ret = clk_prepare_enable(dev->clk_per);
2952 if (ret)
2953 goto err_clk_per;
2954
2955 ret = clk_prepare_enable(dev->clk_ahb);
2956 if (ret)
2957 goto err_clk_ahb;
2958
2959 set_default_params(ctx);
2960 ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx,
2961 &coda_queue_init);
2962 if (IS_ERR(ctx->fh.m2m_ctx)) {
2963 ret = PTR_ERR(ctx->fh.m2m_ctx);
2964
2965 v4l2_err(&dev->v4l2_dev, "%s return error (%d)\n",
2966 __func__, ret);
2967 goto err_ctx_init;
2968 }
2969
2970 ret = coda_ctrls_setup(ctx);
2971 if (ret) {
2972 v4l2_err(&dev->v4l2_dev, "failed to setup coda controls\n");
2973 goto err_ctrls_setup;
2974 }
2975
2976 ctx->fh.ctrl_handler = &ctx->ctrls;
2977
2978 ret = coda_alloc_context_buf(ctx, &ctx->parabuf, CODA_PARA_BUF_SIZE,
2979 "parabuf");
2980 if (ret < 0) {
2981 v4l2_err(&dev->v4l2_dev, "failed to allocate parabuf");
2982 goto err_dma_alloc;
2983 }
2984
2985 ctx->bitstream.size = CODA_MAX_FRAME_SIZE;
2986 ctx->bitstream.vaddr = dma_alloc_writecombine(&dev->plat_dev->dev,
2987 ctx->bitstream.size, &ctx->bitstream.paddr, GFP_KERNEL);
2988 if (!ctx->bitstream.vaddr) {
2989 v4l2_err(&dev->v4l2_dev, "failed to allocate bitstream ringbuffer");
2990 ret = -ENOMEM;
2991 goto err_dma_writecombine;
2992 }
2993 kfifo_init(&ctx->bitstream_fifo,
2994 ctx->bitstream.vaddr, ctx->bitstream.size);
2995 mutex_init(&ctx->bitstream_mutex);
2996 mutex_init(&ctx->buffer_mutex);
2997 INIT_LIST_HEAD(&ctx->timestamp_list);
2998
2999 coda_lock(ctx);
3000 list_add(&ctx->list, &dev->instances);
3001 coda_unlock(ctx);
3002
3003 v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Created instance %d (%p)\n",
3004 ctx->idx, ctx);
3005
3006 return 0;
3007
3008err_dma_writecombine:
3009 coda_free_context_buffers(ctx);
3010 if (ctx->dev->devtype->product == CODA_DX6)
3011 coda_free_aux_buf(dev, &ctx->workbuf);
3012 coda_free_aux_buf(dev, &ctx->parabuf);
3013err_dma_alloc:
3014 v4l2_ctrl_handler_free(&ctx->ctrls);
3015err_ctrls_setup:
3016 v4l2_m2m_ctx_release(ctx->fh.m2m_ctx);
3017err_ctx_init:
3018 clk_disable_unprepare(dev->clk_ahb);
3019err_clk_ahb:
3020 clk_disable_unprepare(dev->clk_per);
3021err_clk_per:
3022 pm_runtime_put_sync(&dev->plat_dev->dev);
3023err_pm_get:
3024 v4l2_fh_del(&ctx->fh);
3025 v4l2_fh_exit(&ctx->fh);
3026 clear_bit(ctx->idx, &dev->instance_mask);
3027err_coda_max:
3028 kfree(ctx);
3029 return ret;
3030}
3031
3032static int coda_release(struct file *file)
3033{
3034 struct coda_dev *dev = video_drvdata(file);
3035 struct coda_ctx *ctx = fh_to_ctx(file->private_data);
3036
3037 v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Releasing instance %p\n",
3038 ctx);
3039
3040 debugfs_remove_recursive(ctx->debugfs_entry);
3041
3042 /* If this instance is running, call .job_abort and wait for it to end */
3043 v4l2_m2m_ctx_release(ctx->fh.m2m_ctx);
3044
3045 /* In case the instance was not running, we still need to call SEQ_END */
3046 if (ctx->initialized) {
3047 queue_work(dev->workqueue, &ctx->seq_end_work);
3048 flush_work(&ctx->seq_end_work);
3049 }
3050
3051 coda_free_framebuffers(ctx);
3052
3053 coda_lock(ctx);
3054 list_del(&ctx->list);
3055 coda_unlock(ctx);
3056
3057 dma_free_writecombine(&dev->plat_dev->dev, ctx->bitstream.size,
3058 ctx->bitstream.vaddr, ctx->bitstream.paddr);
3059 coda_free_context_buffers(ctx);
3060 if (ctx->dev->devtype->product == CODA_DX6)
3061 coda_free_aux_buf(dev, &ctx->workbuf);
3062
3063 coda_free_aux_buf(dev, &ctx->parabuf);
3064 v4l2_ctrl_handler_free(&ctx->ctrls);
3065 clk_disable_unprepare(dev->clk_ahb);
3066 clk_disable_unprepare(dev->clk_per);
3067 pm_runtime_put_sync(&dev->plat_dev->dev);
3068 v4l2_fh_del(&ctx->fh);
3069 v4l2_fh_exit(&ctx->fh);
3070 clear_bit(ctx->idx, &dev->instance_mask);
3071 kfree(ctx);
3072
3073 return 0;
3074}
3075
3076static const struct v4l2_file_operations coda_fops = {
3077 .owner = THIS_MODULE,
3078 .open = coda_open,
3079 .release = coda_release,
3080 .poll = v4l2_m2m_fop_poll,
3081 .unlocked_ioctl = video_ioctl2,
3082 .mmap = v4l2_m2m_fop_mmap,
3083};
3084
3085static void coda_finish_decode(struct coda_ctx *ctx)
3086{
3087 struct coda_dev *dev = ctx->dev;
3088 struct coda_q_data *q_data_src;
3089 struct coda_q_data *q_data_dst;
3090 struct vb2_buffer *dst_buf;
3091 struct coda_timestamp *ts;
3092 int width, height;
3093 int decoded_idx;
3094 int display_idx;
3095 u32 src_fourcc;
3096 int success;
3097 u32 err_mb;
3098 u32 val;
3099
3100 dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
3101
3102 /* Update kfifo out pointer from coda bitstream read pointer */
3103 coda_kfifo_sync_from_device(ctx);
3104
3105 /*
3106 * in stream-end mode, the read pointer can overshoot the write pointer
3107 * by up to 512 bytes
3108 */
3109 if (ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG) {
3110 if (coda_get_bitstream_payload(ctx) >= 0x100000 - 512)
3111 kfifo_init(&ctx->bitstream_fifo,
3112 ctx->bitstream.vaddr, ctx->bitstream.size);
3113 }
3114
3115 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
3116 src_fourcc = q_data_src->fourcc;
3117
3118 val = coda_read(dev, CODA_RET_DEC_PIC_SUCCESS);
3119 if (val != 1)
3120 pr_err("DEC_PIC_SUCCESS = %d\n", val);
3121
3122 success = val & 0x1;
3123 if (!success)
3124 v4l2_err(&dev->v4l2_dev, "decode failed\n");
3125
3126 if (src_fourcc == V4L2_PIX_FMT_H264) {
3127 if (val & (1 << 3))
3128 v4l2_err(&dev->v4l2_dev,
3129 "insufficient PS buffer space (%d bytes)\n",
3130 ctx->psbuf.size);
3131 if (val & (1 << 2))
3132 v4l2_err(&dev->v4l2_dev,
3133 "insufficient slice buffer space (%d bytes)\n",
3134 ctx->slicebuf.size);
3135 }
3136
3137 val = coda_read(dev, CODA_RET_DEC_PIC_SIZE);
3138 width = (val >> 16) & 0xffff;
3139 height = val & 0xffff;
3140
3141 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
3142
3143 /* frame crop information */
3144 if (src_fourcc == V4L2_PIX_FMT_H264) {
3145 u32 left_right;
3146 u32 top_bottom;
3147
3148 left_right = coda_read(dev, CODA_RET_DEC_PIC_CROP_LEFT_RIGHT);
3149 top_bottom = coda_read(dev, CODA_RET_DEC_PIC_CROP_TOP_BOTTOM);
3150
3151 if (left_right == 0xffffffff && top_bottom == 0xffffffff) {
3152 /* Keep current crop information */
3153 } else {
3154 struct v4l2_rect *rect = &q_data_dst->rect;
3155
3156 rect->left = left_right >> 16 & 0xffff;
3157 rect->top = top_bottom >> 16 & 0xffff;
3158 rect->width = width - rect->left -
3159 (left_right & 0xffff);
3160 rect->height = height - rect->top -
3161 (top_bottom & 0xffff);
3162 }
3163 } else {
3164 /* no cropping */
3165 }
3166
3167 err_mb = coda_read(dev, CODA_RET_DEC_PIC_ERR_MB);
3168 if (err_mb > 0)
3169 v4l2_err(&dev->v4l2_dev,
3170 "errors in %d macroblocks\n", err_mb);
3171
3172 if (dev->devtype->product == CODA_7541) {
3173 val = coda_read(dev, CODA_RET_DEC_PIC_OPTION);
3174 if (val == 0) {
3175 /* not enough bitstream data */
3176 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
3177 "prescan failed: %d\n", val);
3178 ctx->hold = true;
3179 return;
3180 }
3181 }
3182
3183 ctx->frm_dis_flg = coda_read(dev, CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
3184
3185 /*
3186 * The previous display frame was copied out by the rotator,
3187 * now it can be overwritten again
3188 */
3189 if (ctx->display_idx >= 0 &&
3190 ctx->display_idx < ctx->num_internal_frames) {
3191 ctx->frm_dis_flg &= ~(1 << ctx->display_idx);
3192 coda_write(dev, ctx->frm_dis_flg,
3193 CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
3194 }
3195
3196 /*
3197 * The index of the last decoded frame, not necessarily in
3198 * display order, and the index of the next display frame.
3199 * The latter could have been decoded in a previous run.
3200 */
3201 decoded_idx = coda_read(dev, CODA_RET_DEC_PIC_CUR_IDX);
3202 display_idx = coda_read(dev, CODA_RET_DEC_PIC_FRAME_IDX);
3203
3204 if (decoded_idx == -1) {
3205 /* no frame was decoded, but we might have a display frame */
3206 if (display_idx >= 0 && display_idx < ctx->num_internal_frames)
3207 ctx->sequence_offset++;
3208 else if (ctx->display_idx < 0)
3209 ctx->hold = true;
3210 } else if (decoded_idx == -2) {
3211 /* no frame was decoded, we still return the remaining buffers */
3212 } else if (decoded_idx < 0 || decoded_idx >= ctx->num_internal_frames) {
3213 v4l2_err(&dev->v4l2_dev,
3214 "decoded frame index out of range: %d\n", decoded_idx);
3215 } else {
3216 ts = list_first_entry(&ctx->timestamp_list,
3217 struct coda_timestamp, list);
3218 list_del(&ts->list);
3219 val = coda_read(dev, CODA_RET_DEC_PIC_FRAME_NUM) - 1;
3220 val -= ctx->sequence_offset;
3221 if (val != (ts->sequence & 0xffff)) {
3222 v4l2_err(&dev->v4l2_dev,
3223 "sequence number mismatch (%d(%d) != %d)\n",
3224 val, ctx->sequence_offset, ts->sequence);
3225 }
3226 ctx->frame_timestamps[decoded_idx] = *ts;
3227 kfree(ts);
3228
3229 val = coda_read(dev, CODA_RET_DEC_PIC_TYPE) & 0x7;
3230 if (val == 0)
3231 ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_KEYFRAME;
3232 else if (val == 1)
3233 ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_PFRAME;
3234 else
3235 ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_BFRAME;
3236
3237 ctx->frame_errors[decoded_idx] = err_mb;
3238 }
3239
3240 if (display_idx == -1) {
3241 /*
3242 * no more frames to be decoded, but there could still
3243 * be rotator output to dequeue
3244 */
3245 ctx->hold = true;
3246 } else if (display_idx == -3) {
3247 /* possibly prescan failure */
3248 } else if (display_idx < 0 || display_idx >= ctx->num_internal_frames) {
3249 v4l2_err(&dev->v4l2_dev,
3250 "presentation frame index out of range: %d\n",
3251 display_idx);
3252 }
3253
3254 /* If a frame was copied out, return it */
3255 if (ctx->display_idx >= 0 &&
3256 ctx->display_idx < ctx->num_internal_frames) {
3257 dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
3258 dst_buf->v4l2_buf.sequence = ctx->osequence++;
3259
3260 dst_buf->v4l2_buf.flags &= ~(V4L2_BUF_FLAG_KEYFRAME |
3261 V4L2_BUF_FLAG_PFRAME |
3262 V4L2_BUF_FLAG_BFRAME);
3263 dst_buf->v4l2_buf.flags |= ctx->frame_types[ctx->display_idx];
3264 ts = &ctx->frame_timestamps[ctx->display_idx];
3265 dst_buf->v4l2_buf.timecode = ts->timecode;
3266 dst_buf->v4l2_buf.timestamp = ts->timestamp;
3267
3268 vb2_set_plane_payload(dst_buf, 0, width * height * 3 / 2);
3269
3270 v4l2_m2m_buf_done(dst_buf, ctx->frame_errors[display_idx] ?
3271 VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE);
3272
3273 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
3274 "job finished: decoding frame (%d) (%s)\n",
3275 dst_buf->v4l2_buf.sequence,
3276 (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
3277 "KEYFRAME" : "PFRAME");
3278 } else {
3279 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
3280 "job finished: no frame decoded\n");
3281 }
3282
3283 /* The rotator will copy the current display frame next time */
3284 ctx->display_idx = display_idx;
3285}
3286
3287static void coda_finish_encode(struct coda_ctx *ctx)
3288{
3289 struct vb2_buffer *src_buf, *dst_buf;
3290 struct coda_dev *dev = ctx->dev;
3291 u32 wr_ptr, start_ptr;
3292
3293 src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
3294 dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
3295
3296 /* Get results from the coda */
3297 start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START);
3298 wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
3299
3300 /* Calculate bytesused field */
3301 if (dst_buf->v4l2_buf.sequence == 0) {
3302 vb2_set_plane_payload(dst_buf, 0, wr_ptr - start_ptr +
3303 ctx->vpu_header_size[0] +
3304 ctx->vpu_header_size[1] +
3305 ctx->vpu_header_size[2]);
3306 } else {
3307 vb2_set_plane_payload(dst_buf, 0, wr_ptr - start_ptr);
3308 }
3309
3310 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, "frame size = %u\n",
3311 wr_ptr - start_ptr);
3312
3313 coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM);
3314 coda_read(dev, CODA_RET_ENC_PIC_FLAG);
3315
3316 if (coda_read(dev, CODA_RET_ENC_PIC_TYPE) == 0) {
3317 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
3318 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
3319 } else {
3320 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
3321 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
3322 }
3323
3324 dst_buf->v4l2_buf.timestamp = src_buf->v4l2_buf.timestamp;
3325 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
3326 dst_buf->v4l2_buf.flags |=
3327 src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
3328 dst_buf->v4l2_buf.timecode = src_buf->v4l2_buf.timecode;
3329
3330 v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
3331
3332 dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
3333 v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE);
3334
3335 ctx->gopcounter--;
3336 if (ctx->gopcounter < 0)
3337 ctx->gopcounter = ctx->params.gop_size - 1;
3338
3339 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
3340 "job finished: encoding frame (%d) (%s)\n",
3341 dst_buf->v4l2_buf.sequence,
3342 (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
3343 "KEYFRAME" : "PFRAME");
3344}
3345
3346static irqreturn_t coda_irq_handler(int irq, void *data)
3347{
3348 struct coda_dev *dev = data;
3349 struct coda_ctx *ctx;
3350
3351 /* read status register to attend the IRQ */
3352 coda_read(dev, CODA_REG_BIT_INT_STATUS);
3353 coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET,
3354 CODA_REG_BIT_INT_CLEAR);
3355
3356 ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
3357 if (ctx == NULL) {
3358 v4l2_err(&dev->v4l2_dev, "Instance released before the end of transaction\n");
3359 mutex_unlock(&dev->coda_mutex);
3360 return IRQ_HANDLED;
3361 }
3362
3363 if (ctx->aborting) {
3364 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
3365 "task has been aborted\n");
3366 }
3367
3368 if (coda_isbusy(ctx->dev)) {
3369 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
3370 "coda is still busy!!!!\n");
3371 return IRQ_NONE;
3372 }
3373
3374 complete(&ctx->completion);
3375
3376 return IRQ_HANDLED;
3377}
3378
3379static u32 coda_supported_firmwares[] = {
3380 CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
3381 CODA_FIRMWARE_VERNUM(CODA_7541, 1, 4, 50),
3382 CODA_FIRMWARE_VERNUM(CODA_960, 2, 1, 5),
3383};
3384
3385static bool coda_firmware_supported(u32 vernum)
3386{
3387 int i;
3388
3389 for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++)
3390 if (vernum == coda_supported_firmwares[i])
3391 return true;
3392 return false;
3393}
3394
3395static int coda_hw_init(struct coda_dev *dev)
3396{
3397 u32 data;
3398 u16 *p;
3399 int i, ret;
3400
3401 ret = clk_prepare_enable(dev->clk_per);
3402 if (ret)
3403 goto err_clk_per;
3404
3405 ret = clk_prepare_enable(dev->clk_ahb);
3406 if (ret)
3407 goto err_clk_ahb;
3408
3409 if (dev->rstc)
3410 reset_control_reset(dev->rstc);
3411
3412 /*
3413 * Copy the first CODA_ISRAM_SIZE in the internal SRAM.
3414 * The 16-bit chars in the code buffer are in memory access
3415 * order, re-sort them to CODA order for register download.
3416 * Data in this SRAM survives a reboot.
3417 */
3418 p = (u16 *)dev->codebuf.vaddr;
3419 if (dev->devtype->product == CODA_DX6) {
3420 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
3421 data = CODA_DOWN_ADDRESS_SET(i) |
3422 CODA_DOWN_DATA_SET(p[i ^ 1]);
3423 coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
3424 }
3425 } else {
3426 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
3427 data = CODA_DOWN_ADDRESS_SET(i) |
3428 CODA_DOWN_DATA_SET(p[round_down(i, 4) +
3429 3 - (i % 4)]);
3430 coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
3431 }
3432 }
3433
3434 /* Clear registers */
3435 for (i = 0; i < 64; i++)
3436 coda_write(dev, 0, CODA_REG_BIT_CODE_BUF_ADDR + i * 4);
3437
3438 /* Tell the BIT where to find everything it needs */
3439 if (dev->devtype->product == CODA_960 ||
3440 dev->devtype->product == CODA_7541) {
3441 coda_write(dev, dev->tempbuf.paddr,
3442 CODA_REG_BIT_TEMP_BUF_ADDR);
3443 coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
3444 } else {
3445 coda_write(dev, dev->workbuf.paddr,
3446 CODA_REG_BIT_WORK_BUF_ADDR);
3447 }
3448 coda_write(dev, dev->codebuf.paddr,
3449 CODA_REG_BIT_CODE_BUF_ADDR);
3450 coda_write(dev, 0, CODA_REG_BIT_CODE_RUN);
3451
3452 /* Set default values */
3453 switch (dev->devtype->product) {
3454 case CODA_DX6:
3455 coda_write(dev, CODADX6_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
3456 break;
3457 default:
3458 coda_write(dev, CODA7_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
3459 }
3460 if (dev->devtype->product == CODA_960)
3461 coda_write(dev, 1 << 12, CODA_REG_BIT_FRAME_MEM_CTRL);
3462 else
3463 coda_write(dev, 0, CODA_REG_BIT_FRAME_MEM_CTRL);
3464
3465 if (dev->devtype->product != CODA_DX6)
3466 coda_write(dev, 0, CODA7_REG_BIT_AXI_SRAM_USE);
3467
3468 coda_write(dev, CODA_INT_INTERRUPT_ENABLE,
3469 CODA_REG_BIT_INT_ENABLE);
3470
3471 /* Reset VPU and start processor */
3472 data = coda_read(dev, CODA_REG_BIT_CODE_RESET);
3473 data |= CODA_REG_RESET_ENABLE;
3474 coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
3475 udelay(10);
3476 data &= ~CODA_REG_RESET_ENABLE;
3477 coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
3478 coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
3479
3480 clk_disable_unprepare(dev->clk_ahb);
3481 clk_disable_unprepare(dev->clk_per);
3482
3483 return 0;
3484
3485err_clk_ahb:
3486 clk_disable_unprepare(dev->clk_per);
3487err_clk_per:
3488 return ret;
3489}
3490
3491static int coda_check_firmware(struct coda_dev *dev)
3492{
3493 u16 product, major, minor, release;
3494 u32 data;
3495 int ret;
3496
3497 ret = clk_prepare_enable(dev->clk_per);
3498 if (ret)
3499 goto err_clk_per;
3500
3501 ret = clk_prepare_enable(dev->clk_ahb);
3502 if (ret)
3503 goto err_clk_ahb;
3504
3505 coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM);
3506 coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
3507 coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX);
3508 coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD);
3509 coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND);
3510 if (coda_wait_timeout(dev)) {
3511 v4l2_err(&dev->v4l2_dev, "firmware get command error\n");
3512 ret = -EIO;
3513 goto err_run_cmd;
3514 }
3515
3516 if (dev->devtype->product == CODA_960) {
3517 data = coda_read(dev, CODA9_CMD_FIRMWARE_CODE_REV);
3518 v4l2_info(&dev->v4l2_dev, "Firmware code revision: %d\n",
3519 data);
3520 }
3521
3522 /* Check we are compatible with the loaded firmware */
3523 data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM);
3524 product = CODA_FIRMWARE_PRODUCT(data);
3525 major = CODA_FIRMWARE_MAJOR(data);
3526 minor = CODA_FIRMWARE_MINOR(data);
3527 release = CODA_FIRMWARE_RELEASE(data);
3528
3529 clk_disable_unprepare(dev->clk_per);
3530 clk_disable_unprepare(dev->clk_ahb);
3531
3532 if (product != dev->devtype->product) {
3533 v4l2_err(&dev->v4l2_dev, "Wrong firmware. Hw: %s, Fw: %s,"
3534 " Version: %u.%u.%u\n",
3535 coda_product_name(dev->devtype->product),
3536 coda_product_name(product), major, minor, release);
3537 return -EINVAL;
3538 }
3539
3540 v4l2_info(&dev->v4l2_dev, "Initialized %s.\n",
3541 coda_product_name(product));
3542
3543 if (coda_firmware_supported(data)) {
3544 v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n",
3545 major, minor, release);
3546 } else {
3547 v4l2_warn(&dev->v4l2_dev, "Unsupported firmware version: "
3548 "%u.%u.%u\n", major, minor, release);
3549 }
3550
3551 return 0;
3552
3553err_run_cmd:
3554 clk_disable_unprepare(dev->clk_ahb);
3555err_clk_ahb:
3556 clk_disable_unprepare(dev->clk_per);
3557err_clk_per:
3558 return ret;
3559}
3560
3561static void coda_fw_callback(const struct firmware *fw, void *context)
3562{
3563 struct coda_dev *dev = context;
3564 struct platform_device *pdev = dev->plat_dev;
3565 int ret;
3566
3567 if (!fw) {
3568 v4l2_err(&dev->v4l2_dev, "firmware request failed\n");
3569 return;
3570 }
3571
3572 /* allocate auxiliary per-device code buffer for the BIT processor */
3573 ret = coda_alloc_aux_buf(dev, &dev->codebuf, fw->size, "codebuf",
3574 dev->debugfs_root);
3575 if (ret < 0) {
3576 dev_err(&pdev->dev, "failed to allocate code buffer\n");
3577 return;
3578 }
3579
3580 /* Copy the whole firmware image to the code buffer */
3581 memcpy(dev->codebuf.vaddr, fw->data, fw->size);
3582 release_firmware(fw);
3583
3584 if (pm_runtime_enabled(&pdev->dev) && pdev->dev.pm_domain) {
3585 /*
3586 * Enabling power temporarily will cause coda_hw_init to be
3587 * called via coda_runtime_resume by the pm domain.
3588 */
3589 ret = pm_runtime_get_sync(&dev->plat_dev->dev);
3590 if (ret < 0) {
3591 v4l2_err(&dev->v4l2_dev, "failed to power on: %d\n",
3592 ret);
3593 return;
3594 }
3595
3596 ret = coda_check_firmware(dev);
3597 if (ret < 0)
3598 return;
3599
3600 pm_runtime_put_sync(&dev->plat_dev->dev);
3601 } else {
3602 /*
3603 * If runtime pm is disabled or pm_domain is not set,
3604 * initialize once manually.
3605 */
3606 ret = coda_hw_init(dev);
3607 if (ret < 0) {
3608 v4l2_err(&dev->v4l2_dev, "HW initialization failed\n");
3609 return;
3610 }
3611
3612 ret = coda_check_firmware(dev);
3613 if (ret < 0)
3614 return;
3615 }
3616
3617 dev->vfd.fops = &coda_fops,
3618 dev->vfd.ioctl_ops = &coda_ioctl_ops;
3619 dev->vfd.release = video_device_release_empty,
3620 dev->vfd.lock = &dev->dev_mutex;
3621 dev->vfd.v4l2_dev = &dev->v4l2_dev;
3622 dev->vfd.vfl_dir = VFL_DIR_M2M;
3623 snprintf(dev->vfd.name, sizeof(dev->vfd.name), "%s", CODA_NAME);
3624 video_set_drvdata(&dev->vfd, dev);
3625
3626 dev->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
3627 if (IS_ERR(dev->alloc_ctx)) {
3628 v4l2_err(&dev->v4l2_dev, "Failed to alloc vb2 context\n");
3629 return;
3630 }
3631
3632 dev->m2m_dev = v4l2_m2m_init(&coda_m2m_ops);
3633 if (IS_ERR(dev->m2m_dev)) {
3634 v4l2_err(&dev->v4l2_dev, "Failed to init mem2mem device\n");
3635 goto rel_ctx;
3636 }
3637
3638 ret = video_register_device(&dev->vfd, VFL_TYPE_GRABBER, 0);
3639 if (ret) {
3640 v4l2_err(&dev->v4l2_dev, "Failed to register video device\n");
3641 goto rel_m2m;
3642 }
3643 v4l2_info(&dev->v4l2_dev, "codec registered as /dev/video%d\n",
3644 dev->vfd.num);
3645
3646 return;
3647
3648rel_m2m:
3649 v4l2_m2m_release(dev->m2m_dev);
3650rel_ctx:
3651 vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
3652}
3653
3654static int coda_firmware_request(struct coda_dev *dev)
3655{
3656 char *fw = dev->devtype->firmware;
3657
3658 dev_dbg(&dev->plat_dev->dev, "requesting firmware '%s' for %s\n", fw,
3659 coda_product_name(dev->devtype->product));
3660
3661 return request_firmware_nowait(THIS_MODULE, true,
3662 fw, &dev->plat_dev->dev, GFP_KERNEL, dev, coda_fw_callback);
3663}
3664
3665enum coda_platform {
3666 CODA_IMX27,
3667 CODA_IMX53,
3668 CODA_IMX6Q,
3669 CODA_IMX6DL,
3670};
3671
3672static const struct coda_devtype coda_devdata[] = {
3673 [CODA_IMX27] = {
3674 .firmware = "v4l-codadx6-imx27.bin",
3675 .product = CODA_DX6,
3676 .codecs = codadx6_codecs,
3677 .num_codecs = ARRAY_SIZE(codadx6_codecs),
3678 .workbuf_size = 288 * 1024 + FMO_SLICE_SAVE_BUF_SIZE * 8 * 1024,
3679 .iram_size = 0xb000,
3680 },
3681 [CODA_IMX53] = {
3682 .firmware = "v4l-coda7541-imx53.bin",
3683 .product = CODA_7541,
3684 .codecs = coda7_codecs,
3685 .num_codecs = ARRAY_SIZE(coda7_codecs),
3686 .workbuf_size = 128 * 1024,
3687 .tempbuf_size = 304 * 1024,
3688 .iram_size = 0x14000,
3689 },
3690 [CODA_IMX6Q] = {
3691 .firmware = "v4l-coda960-imx6q.bin",
3692 .product = CODA_960,
3693 .codecs = coda9_codecs,
3694 .num_codecs = ARRAY_SIZE(coda9_codecs),
3695 .workbuf_size = 80 * 1024,
3696 .tempbuf_size = 204 * 1024,
3697 .iram_size = 0x21000,
3698 },
3699 [CODA_IMX6DL] = {
3700 .firmware = "v4l-coda960-imx6dl.bin",
3701 .product = CODA_960,
3702 .codecs = coda9_codecs,
3703 .num_codecs = ARRAY_SIZE(coda9_codecs),
3704 .workbuf_size = 80 * 1024,
3705 .tempbuf_size = 204 * 1024,
3706 .iram_size = 0x20000,
3707 },
3708};
3709
3710static struct platform_device_id coda_platform_ids[] = {
3711 { .name = "coda-imx27", .driver_data = CODA_IMX27 },
3712 { .name = "coda-imx53", .driver_data = CODA_IMX53 },
3713 { /* sentinel */ }
3714};
3715MODULE_DEVICE_TABLE(platform, coda_platform_ids);
3716
3717#ifdef CONFIG_OF
3718static const struct of_device_id coda_dt_ids[] = {
3719 { .compatible = "fsl,imx27-vpu", .data = &coda_devdata[CODA_IMX27] },
3720 { .compatible = "fsl,imx53-vpu", .data = &coda_devdata[CODA_IMX53] },
3721 { .compatible = "fsl,imx6q-vpu", .data = &coda_devdata[CODA_IMX6Q] },
3722 { .compatible = "fsl,imx6dl-vpu", .data = &coda_devdata[CODA_IMX6DL] },
3723 { /* sentinel */ }
3724};
3725MODULE_DEVICE_TABLE(of, coda_dt_ids);
3726#endif
3727
3728static int coda_probe(struct platform_device *pdev)
3729{
3730 const struct of_device_id *of_id =
3731 of_match_device(of_match_ptr(coda_dt_ids), &pdev->dev);
3732 const struct platform_device_id *pdev_id;
3733 struct coda_platform_data *pdata = pdev->dev.platform_data;
3734 struct device_node *np = pdev->dev.of_node;
3735 struct gen_pool *pool;
3736 struct coda_dev *dev;
3737 struct resource *res;
3738 int ret, irq;
3739
3740 dev = devm_kzalloc(&pdev->dev, sizeof *dev, GFP_KERNEL);
3741 if (!dev) {
3742 dev_err(&pdev->dev, "Not enough memory for %s\n",
3743 CODA_NAME);
3744 return -ENOMEM;
3745 }
3746
3747 spin_lock_init(&dev->irqlock);
3748 INIT_LIST_HEAD(&dev->instances);
3749
3750 dev->plat_dev = pdev;
3751 dev->clk_per = devm_clk_get(&pdev->dev, "per");
3752 if (IS_ERR(dev->clk_per)) {
3753 dev_err(&pdev->dev, "Could not get per clock\n");
3754 return PTR_ERR(dev->clk_per);
3755 }
3756
3757 dev->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
3758 if (IS_ERR(dev->clk_ahb)) {
3759 dev_err(&pdev->dev, "Could not get ahb clock\n");
3760 return PTR_ERR(dev->clk_ahb);
3761 }
3762
3763 /* Get memory for physical registers */
3764 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3765 dev->regs_base = devm_ioremap_resource(&pdev->dev, res);
3766 if (IS_ERR(dev->regs_base))
3767 return PTR_ERR(dev->regs_base);
3768
3769 /* IRQ */
3770 irq = platform_get_irq(pdev, 0);
3771 if (irq < 0) {
3772 dev_err(&pdev->dev, "failed to get irq resource\n");
3773 return irq;
3774 }
3775
3776 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, coda_irq_handler,
3777 IRQF_ONESHOT, dev_name(&pdev->dev), dev);
3778 if (ret < 0) {
3779 dev_err(&pdev->dev, "failed to request irq: %d\n", ret);
3780 return ret;
3781 }
3782
3783 dev->rstc = devm_reset_control_get_optional(&pdev->dev, NULL);
3784 if (IS_ERR(dev->rstc)) {
3785 ret = PTR_ERR(dev->rstc);
3786 if (ret == -ENOENT || ret == -ENOSYS) {
3787 dev->rstc = NULL;
3788 } else {
3789 dev_err(&pdev->dev, "failed get reset control: %d\n", ret);
3790 return ret;
3791 }
3792 }
3793
3794 /* Get IRAM pool from device tree or platform data */
3795 pool = of_get_named_gen_pool(np, "iram", 0);
3796 if (!pool && pdata)
3797 pool = dev_get_gen_pool(pdata->iram_dev);
3798 if (!pool) {
3799 dev_err(&pdev->dev, "iram pool not available\n");
3800 return -ENOMEM;
3801 }
3802 dev->iram_pool = pool;
3803
3804 ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
3805 if (ret)
3806 return ret;
3807
3808 mutex_init(&dev->dev_mutex);
3809 mutex_init(&dev->coda_mutex);
3810
3811 pdev_id = of_id ? of_id->data : platform_get_device_id(pdev);
3812
3813 if (of_id) {
3814 dev->devtype = of_id->data;
3815 } else if (pdev_id) {
3816 dev->devtype = &coda_devdata[pdev_id->driver_data];
3817 } else {
3818 v4l2_device_unregister(&dev->v4l2_dev);
3819 return -EINVAL;
3820 }
3821
3822 dev->debugfs_root = debugfs_create_dir("coda", NULL);
3823 if (!dev->debugfs_root)
3824 dev_warn(&pdev->dev, "failed to create debugfs root\n");
3825
3826 /* allocate auxiliary per-device buffers for the BIT processor */
3827 if (dev->devtype->product == CODA_DX6) {
3828 ret = coda_alloc_aux_buf(dev, &dev->workbuf,
3829 dev->devtype->workbuf_size, "workbuf",
3830 dev->debugfs_root);
3831 if (ret < 0) {
3832 dev_err(&pdev->dev, "failed to allocate work buffer\n");
3833 v4l2_device_unregister(&dev->v4l2_dev);
3834 return ret;
3835 }
3836 }
3837
3838 if (dev->devtype->tempbuf_size) {
3839 ret = coda_alloc_aux_buf(dev, &dev->tempbuf,
3840 dev->devtype->tempbuf_size, "tempbuf",
3841 dev->debugfs_root);
3842 if (ret < 0) {
3843 dev_err(&pdev->dev, "failed to allocate temp buffer\n");
3844 v4l2_device_unregister(&dev->v4l2_dev);
3845 return ret;
3846 }
3847 }
3848
3849 dev->iram.size = dev->devtype->iram_size;
3850 dev->iram.vaddr = gen_pool_dma_alloc(dev->iram_pool, dev->iram.size,
3851 &dev->iram.paddr);
3852 if (!dev->iram.vaddr) {
3853 dev_err(&pdev->dev, "unable to alloc iram\n");
3854 return -ENOMEM;
3855 }
3856
3857 dev->iram.blob.data = dev->iram.vaddr;
3858 dev->iram.blob.size = dev->iram.size;
3859 dev->iram.dentry = debugfs_create_blob("iram", 0644, dev->debugfs_root,
3860 &dev->iram.blob);
3861
3862 dev->workqueue = alloc_workqueue("coda", WQ_UNBOUND | WQ_MEM_RECLAIM, 1);
3863 if (!dev->workqueue) {
3864 dev_err(&pdev->dev, "unable to alloc workqueue\n");
3865 return -ENOMEM;
3866 }
3867
3868 platform_set_drvdata(pdev, dev);
3869
3870 pm_runtime_enable(&pdev->dev);
3871
3872 return coda_firmware_request(dev);
3873}
3874
3875static int coda_remove(struct platform_device *pdev)
3876{
3877 struct coda_dev *dev = platform_get_drvdata(pdev);
3878
3879 video_unregister_device(&dev->vfd);
3880 if (dev->m2m_dev)
3881 v4l2_m2m_release(dev->m2m_dev);
3882 pm_runtime_disable(&pdev->dev);
3883 if (dev->alloc_ctx)
3884 vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
3885 v4l2_device_unregister(&dev->v4l2_dev);
3886 destroy_workqueue(dev->workqueue);
3887 if (dev->iram.vaddr)
3888 gen_pool_free(dev->iram_pool, (unsigned long)dev->iram.vaddr,
3889 dev->iram.size);
3890 coda_free_aux_buf(dev, &dev->codebuf);
3891 coda_free_aux_buf(dev, &dev->tempbuf);
3892 coda_free_aux_buf(dev, &dev->workbuf);
3893 debugfs_remove_recursive(dev->debugfs_root);
3894 return 0;
3895}
3896
3897#ifdef CONFIG_PM_RUNTIME
3898static int coda_runtime_resume(struct device *dev)
3899{
3900 struct coda_dev *cdev = dev_get_drvdata(dev);
3901 int ret = 0;
3902
3903 if (dev->pm_domain) {
3904 ret = coda_hw_init(cdev);
3905 if (ret)
3906 v4l2_err(&cdev->v4l2_dev, "HW initialization failed\n");
3907 }
3908
3909 return ret;
3910}
3911#endif
3912
3913static const struct dev_pm_ops coda_pm_ops = {
3914 SET_RUNTIME_PM_OPS(NULL, coda_runtime_resume, NULL)
3915};
3916
3917static struct platform_driver coda_driver = {
3918 .probe = coda_probe,
3919 .remove = coda_remove,
3920 .driver = {
3921 .name = CODA_NAME,
3922 .owner = THIS_MODULE,
3923 .of_match_table = of_match_ptr(coda_dt_ids),
3924 .pm = &coda_pm_ops,
3925 },
3926 .id_table = coda_platform_ids,
3927};
3928
3929module_platform_driver(coda_driver);
3930
3931MODULE_LICENSE("GPL");
3932MODULE_AUTHOR("Javier Martin <javier.martin@vista-silicon.com>");
3933MODULE_DESCRIPTION("Coda multi-standard codec V4L2 driver");
diff --git a/drivers/media/platform/coda/Makefile b/drivers/media/platform/coda/Makefile
new file mode 100644
index 000000000000..3543291e6273
--- /dev/null
+++ b/drivers/media/platform/coda/Makefile
@@ -0,0 +1,3 @@
1coda-objs := coda-common.o coda-bit.o coda-h264.o
2
3obj-$(CONFIG_VIDEO_CODA) += coda.o
diff --git a/drivers/media/platform/coda/coda-bit.c b/drivers/media/platform/coda/coda-bit.c
new file mode 100644
index 000000000000..9b8ea8bbeb4e
--- /dev/null
+++ b/drivers/media/platform/coda/coda-bit.c
@@ -0,0 +1,1861 @@
1/*
2 * Coda multi-standard codec IP - BIT processor functions
3 *
4 * Copyright (C) 2012 Vista Silicon S.L.
5 * Javier Martin, <javier.martin@vista-silicon.com>
6 * Xavier Duret
7 * Copyright (C) 2012-2014 Philipp Zabel, Pengutronix
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 */
14
15#include <linux/clk.h>
16#include <linux/irqreturn.h>
17#include <linux/kernel.h>
18#include <linux/platform_device.h>
19#include <linux/reset.h>
20#include <linux/slab.h>
21#include <linux/videodev2.h>
22
23#include <media/v4l2-common.h>
24#include <media/v4l2-ctrls.h>
25#include <media/v4l2-fh.h>
26#include <media/v4l2-mem2mem.h>
27#include <media/videobuf2-core.h>
28#include <media/videobuf2-dma-contig.h>
29#include <media/videobuf2-vmalloc.h>
30
31#include "coda.h"
32
33#define CODA7_PS_BUF_SIZE 0x28000
34#define CODA9_PS_SAVE_SIZE (512 * 1024)
35
36#define CODA_DEFAULT_GAMMA 4096
37#define CODA9_DEFAULT_GAMMA 24576 /* 0.75 * 32768 */
38
39static inline int coda_is_initialized(struct coda_dev *dev)
40{
41 return coda_read(dev, CODA_REG_BIT_CUR_PC) != 0;
42}
43
44static inline unsigned long coda_isbusy(struct coda_dev *dev)
45{
46 return coda_read(dev, CODA_REG_BIT_BUSY);
47}
48
49static int coda_wait_timeout(struct coda_dev *dev)
50{
51 unsigned long timeout = jiffies + msecs_to_jiffies(1000);
52
53 while (coda_isbusy(dev)) {
54 if (time_after(jiffies, timeout))
55 return -ETIMEDOUT;
56 }
57 return 0;
58}
59
60static void coda_command_async(struct coda_ctx *ctx, int cmd)
61{
62 struct coda_dev *dev = ctx->dev;
63
64 if (dev->devtype->product == CODA_960 ||
65 dev->devtype->product == CODA_7541) {
66 /* Restore context related registers to CODA */
67 coda_write(dev, ctx->bit_stream_param,
68 CODA_REG_BIT_BIT_STREAM_PARAM);
69 coda_write(dev, ctx->frm_dis_flg,
70 CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
71 coda_write(dev, ctx->frame_mem_ctrl,
72 CODA_REG_BIT_FRAME_MEM_CTRL);
73 coda_write(dev, ctx->workbuf.paddr, CODA_REG_BIT_WORK_BUF_ADDR);
74 }
75
76 if (dev->devtype->product == CODA_960) {
77 coda_write(dev, 1, CODA9_GDI_WPROT_ERR_CLR);
78 coda_write(dev, 0, CODA9_GDI_WPROT_RGN_EN);
79 }
80
81 coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
82
83 coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX);
84 coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD);
85 coda_write(dev, ctx->params.codec_mode_aux, CODA7_REG_BIT_RUN_AUX_STD);
86
87 coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND);
88}
89
90static int coda_command_sync(struct coda_ctx *ctx, int cmd)
91{
92 struct coda_dev *dev = ctx->dev;
93
94 coda_command_async(ctx, cmd);
95 return coda_wait_timeout(dev);
96}
97
98int coda_hw_reset(struct coda_ctx *ctx)
99{
100 struct coda_dev *dev = ctx->dev;
101 unsigned long timeout;
102 unsigned int idx;
103 int ret;
104
105 if (!dev->rstc)
106 return -ENOENT;
107
108 idx = coda_read(dev, CODA_REG_BIT_RUN_INDEX);
109
110 if (dev->devtype->product == CODA_960) {
111 timeout = jiffies + msecs_to_jiffies(100);
112 coda_write(dev, 0x11, CODA9_GDI_BUS_CTRL);
113 while (coda_read(dev, CODA9_GDI_BUS_STATUS) != 0x77) {
114 if (time_after(jiffies, timeout))
115 return -ETIME;
116 cpu_relax();
117 }
118 }
119
120 ret = reset_control_reset(dev->rstc);
121 if (ret < 0)
122 return ret;
123
124 if (dev->devtype->product == CODA_960)
125 coda_write(dev, 0x00, CODA9_GDI_BUS_CTRL);
126 coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
127 coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
128 ret = coda_wait_timeout(dev);
129 coda_write(dev, idx, CODA_REG_BIT_RUN_INDEX);
130
131 return ret;
132}
133
134static void coda_kfifo_sync_from_device(struct coda_ctx *ctx)
135{
136 struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
137 struct coda_dev *dev = ctx->dev;
138 u32 rd_ptr;
139
140 rd_ptr = coda_read(dev, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
141 kfifo->out = (kfifo->in & ~kfifo->mask) |
142 (rd_ptr - ctx->bitstream.paddr);
143 if (kfifo->out > kfifo->in)
144 kfifo->out -= kfifo->mask + 1;
145}
146
147static void coda_kfifo_sync_to_device_full(struct coda_ctx *ctx)
148{
149 struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
150 struct coda_dev *dev = ctx->dev;
151 u32 rd_ptr, wr_ptr;
152
153 rd_ptr = ctx->bitstream.paddr + (kfifo->out & kfifo->mask);
154 coda_write(dev, rd_ptr, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
155 wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
156 coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
157}
158
159static void coda_kfifo_sync_to_device_write(struct coda_ctx *ctx)
160{
161 struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
162 struct coda_dev *dev = ctx->dev;
163 u32 wr_ptr;
164
165 wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
166 coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
167}
168
169static int coda_bitstream_queue(struct coda_ctx *ctx,
170 struct vb2_buffer *src_buf)
171{
172 u32 src_size = vb2_get_plane_payload(src_buf, 0);
173 u32 n;
174
175 n = kfifo_in(&ctx->bitstream_fifo, vb2_plane_vaddr(src_buf, 0),
176 src_size);
177 if (n < src_size)
178 return -ENOSPC;
179
180 dma_sync_single_for_device(&ctx->dev->plat_dev->dev,
181 ctx->bitstream.paddr, ctx->bitstream.size,
182 DMA_TO_DEVICE);
183
184 src_buf->v4l2_buf.sequence = ctx->qsequence++;
185
186 return 0;
187}
188
189static bool coda_bitstream_try_queue(struct coda_ctx *ctx,
190 struct vb2_buffer *src_buf)
191{
192 int ret;
193
194 if (coda_get_bitstream_payload(ctx) +
195 vb2_get_plane_payload(src_buf, 0) + 512 >= ctx->bitstream.size)
196 return false;
197
198 if (vb2_plane_vaddr(src_buf, 0) == NULL) {
199 v4l2_err(&ctx->dev->v4l2_dev, "trying to queue empty buffer\n");
200 return true;
201 }
202
203 ret = coda_bitstream_queue(ctx, src_buf);
204 if (ret < 0) {
205 v4l2_err(&ctx->dev->v4l2_dev, "bitstream buffer overflow\n");
206 return false;
207 }
208 /* Sync read pointer to device */
209 if (ctx == v4l2_m2m_get_curr_priv(ctx->dev->m2m_dev))
210 coda_kfifo_sync_to_device_write(ctx);
211
212 ctx->hold = false;
213
214 return true;
215}
216
217void coda_fill_bitstream(struct coda_ctx *ctx)
218{
219 struct vb2_buffer *src_buf;
220 struct coda_timestamp *ts;
221
222 while (v4l2_m2m_num_src_bufs_ready(ctx->fh.m2m_ctx) > 0) {
223 src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
224
225 if (coda_bitstream_try_queue(ctx, src_buf)) {
226 /*
227 * Source buffer is queued in the bitstream ringbuffer;
228 * queue the timestamp and mark source buffer as done
229 */
230 src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
231
232 ts = kmalloc(sizeof(*ts), GFP_KERNEL);
233 if (ts) {
234 ts->sequence = src_buf->v4l2_buf.sequence;
235 ts->timecode = src_buf->v4l2_buf.timecode;
236 ts->timestamp = src_buf->v4l2_buf.timestamp;
237 list_add_tail(&ts->list, &ctx->timestamp_list);
238 }
239
240 v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
241 } else {
242 break;
243 }
244 }
245}
246
247void coda_bit_stream_end_flag(struct coda_ctx *ctx)
248{
249 struct coda_dev *dev = ctx->dev;
250
251 ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
252
253 /* If this context is currently running, update the hardware flag */
254 if ((dev->devtype->product == CODA_960) &&
255 coda_isbusy(dev) &&
256 (ctx->idx == coda_read(dev, CODA_REG_BIT_RUN_INDEX))) {
257 coda_write(dev, ctx->bit_stream_param,
258 CODA_REG_BIT_BIT_STREAM_PARAM);
259 }
260}
261
262static void coda_parabuf_write(struct coda_ctx *ctx, int index, u32 value)
263{
264 struct coda_dev *dev = ctx->dev;
265 u32 *p = ctx->parabuf.vaddr;
266
267 if (dev->devtype->product == CODA_DX6)
268 p[index] = value;
269 else
270 p[index ^ 1] = value;
271}
272
273static void coda_free_framebuffers(struct coda_ctx *ctx)
274{
275 int i;
276
277 for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++)
278 coda_free_aux_buf(ctx->dev, &ctx->internal_frames[i]);
279}
280
281static int coda_alloc_framebuffers(struct coda_ctx *ctx,
282 struct coda_q_data *q_data, u32 fourcc)
283{
284 struct coda_dev *dev = ctx->dev;
285 int width, height;
286 dma_addr_t paddr;
287 int ysize;
288 int ret;
289 int i;
290
291 if (ctx->codec && (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 ||
292 ctx->codec->dst_fourcc == V4L2_PIX_FMT_H264)) {
293 width = round_up(q_data->width, 16);
294 height = round_up(q_data->height, 16);
295 } else {
296 width = round_up(q_data->width, 8);
297 height = q_data->height;
298 }
299 ysize = width * height;
300
301 /* Allocate frame buffers */
302 for (i = 0; i < ctx->num_internal_frames; i++) {
303 size_t size;
304 char *name;
305
306 size = ysize + ysize / 2;
307 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
308 dev->devtype->product != CODA_DX6)
309 size += ysize / 4;
310 name = kasprintf(GFP_KERNEL, "fb%d", i);
311 ret = coda_alloc_context_buf(ctx, &ctx->internal_frames[i],
312 size, name);
313 kfree(name);
314 if (ret < 0) {
315 coda_free_framebuffers(ctx);
316 return ret;
317 }
318 }
319
320 /* Register frame buffers in the parameter buffer */
321 for (i = 0; i < ctx->num_internal_frames; i++) {
322 paddr = ctx->internal_frames[i].paddr;
323 /* Start addresses of Y, Cb, Cr planes */
324 coda_parabuf_write(ctx, i * 3 + 0, paddr);
325 coda_parabuf_write(ctx, i * 3 + 1, paddr + ysize);
326 coda_parabuf_write(ctx, i * 3 + 2, paddr + ysize + ysize / 4);
327
328 /* mvcol buffer for h.264 */
329 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
330 dev->devtype->product != CODA_DX6)
331 coda_parabuf_write(ctx, 96 + i,
332 ctx->internal_frames[i].paddr +
333 ysize + ysize/4 + ysize/4);
334 }
335
336 /* mvcol buffer for mpeg4 */
337 if ((dev->devtype->product != CODA_DX6) &&
338 (ctx->codec->src_fourcc == V4L2_PIX_FMT_MPEG4))
339 coda_parabuf_write(ctx, 97, ctx->internal_frames[i].paddr +
340 ysize + ysize/4 + ysize/4);
341
342 return 0;
343}
344
345static void coda_free_context_buffers(struct coda_ctx *ctx)
346{
347 struct coda_dev *dev = ctx->dev;
348
349 coda_free_aux_buf(dev, &ctx->slicebuf);
350 coda_free_aux_buf(dev, &ctx->psbuf);
351 if (dev->devtype->product != CODA_DX6)
352 coda_free_aux_buf(dev, &ctx->workbuf);
353}
354
355static int coda_alloc_context_buffers(struct coda_ctx *ctx,
356 struct coda_q_data *q_data)
357{
358 struct coda_dev *dev = ctx->dev;
359 size_t size;
360 int ret;
361
362 if (dev->devtype->product == CODA_DX6)
363 return 0;
364
365 if (ctx->psbuf.vaddr) {
366 v4l2_err(&dev->v4l2_dev, "psmembuf still allocated\n");
367 return -EBUSY;
368 }
369 if (ctx->slicebuf.vaddr) {
370 v4l2_err(&dev->v4l2_dev, "slicebuf still allocated\n");
371 return -EBUSY;
372 }
373 if (ctx->workbuf.vaddr) {
374 v4l2_err(&dev->v4l2_dev, "context buffer still allocated\n");
375 ret = -EBUSY;
376 return -ENOMEM;
377 }
378
379 if (q_data->fourcc == V4L2_PIX_FMT_H264) {
380 /* worst case slice size */
381 size = (DIV_ROUND_UP(q_data->width, 16) *
382 DIV_ROUND_UP(q_data->height, 16)) * 3200 / 8 + 512;
383 ret = coda_alloc_context_buf(ctx, &ctx->slicebuf, size,
384 "slicebuf");
385 if (ret < 0) {
386 v4l2_err(&dev->v4l2_dev,
387 "failed to allocate %d byte slice buffer",
388 ctx->slicebuf.size);
389 return ret;
390 }
391 }
392
393 if (dev->devtype->product == CODA_7541) {
394 ret = coda_alloc_context_buf(ctx, &ctx->psbuf,
395 CODA7_PS_BUF_SIZE, "psbuf");
396 if (ret < 0) {
397 v4l2_err(&dev->v4l2_dev,
398 "failed to allocate psmem buffer");
399 goto err;
400 }
401 }
402
403 size = dev->devtype->workbuf_size;
404 if (dev->devtype->product == CODA_960 &&
405 q_data->fourcc == V4L2_PIX_FMT_H264)
406 size += CODA9_PS_SAVE_SIZE;
407 ret = coda_alloc_context_buf(ctx, &ctx->workbuf, size, "workbuf");
408 if (ret < 0) {
409 v4l2_err(&dev->v4l2_dev,
410 "failed to allocate %d byte context buffer",
411 ctx->workbuf.size);
412 goto err;
413 }
414
415 return 0;
416
417err:
418 coda_free_context_buffers(ctx);
419 return ret;
420}
421
422static int coda_encode_header(struct coda_ctx *ctx, struct vb2_buffer *buf,
423 int header_code, u8 *header, int *size)
424{
425 struct coda_dev *dev = ctx->dev;
426 size_t bufsize;
427 int ret;
428 int i;
429
430 if (dev->devtype->product == CODA_960)
431 memset(vb2_plane_vaddr(buf, 0), 0, 64);
432
433 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0),
434 CODA_CMD_ENC_HEADER_BB_START);
435 bufsize = vb2_plane_size(buf, 0);
436 if (dev->devtype->product == CODA_960)
437 bufsize /= 1024;
438 coda_write(dev, bufsize, CODA_CMD_ENC_HEADER_BB_SIZE);
439 coda_write(dev, header_code, CODA_CMD_ENC_HEADER_CODE);
440 ret = coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER);
441 if (ret < 0) {
442 v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
443 return ret;
444 }
445
446 if (dev->devtype->product == CODA_960) {
447 for (i = 63; i > 0; i--)
448 if (((char *)vb2_plane_vaddr(buf, 0))[i] != 0)
449 break;
450 *size = i + 1;
451 } else {
452 *size = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx)) -
453 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
454 }
455 memcpy(header, vb2_plane_vaddr(buf, 0), *size);
456
457 return 0;
458}
459
460static phys_addr_t coda_iram_alloc(struct coda_iram_info *iram, size_t size)
461{
462 phys_addr_t ret;
463
464 size = round_up(size, 1024);
465 if (size > iram->remaining)
466 return 0;
467 iram->remaining -= size;
468
469 ret = iram->next_paddr;
470 iram->next_paddr += size;
471
472 return ret;
473}
474
475static void coda_setup_iram(struct coda_ctx *ctx)
476{
477 struct coda_iram_info *iram_info = &ctx->iram_info;
478 struct coda_dev *dev = ctx->dev;
479 int w64, w128;
480 int mb_width;
481 int dbk_bits;
482 int bit_bits;
483 int ip_bits;
484
485 memset(iram_info, 0, sizeof(*iram_info));
486 iram_info->next_paddr = dev->iram.paddr;
487 iram_info->remaining = dev->iram.size;
488
489 if (!dev->iram.vaddr)
490 return;
491
492 switch (dev->devtype->product) {
493 case CODA_7541:
494 dbk_bits = CODA7_USE_HOST_DBK_ENABLE | CODA7_USE_DBK_ENABLE;
495 bit_bits = CODA7_USE_HOST_BIT_ENABLE | CODA7_USE_BIT_ENABLE;
496 ip_bits = CODA7_USE_HOST_IP_ENABLE | CODA7_USE_IP_ENABLE;
497 break;
498 case CODA_960:
499 dbk_bits = CODA9_USE_HOST_DBK_ENABLE | CODA9_USE_DBK_ENABLE;
500 bit_bits = CODA9_USE_HOST_BIT_ENABLE | CODA7_USE_BIT_ENABLE;
501 ip_bits = CODA9_USE_HOST_IP_ENABLE | CODA7_USE_IP_ENABLE;
502 break;
503 default: /* CODA_DX6 */
504 return;
505 }
506
507 if (ctx->inst_type == CODA_INST_ENCODER) {
508 struct coda_q_data *q_data_src;
509
510 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
511 mb_width = DIV_ROUND_UP(q_data_src->width, 16);
512 w128 = mb_width * 128;
513 w64 = mb_width * 64;
514
515 /* Prioritize in case IRAM is too small for everything */
516 if (dev->devtype->product == CODA_7541) {
517 iram_info->search_ram_size = round_up(mb_width * 16 *
518 36 + 2048, 1024);
519 iram_info->search_ram_paddr = coda_iram_alloc(iram_info,
520 iram_info->search_ram_size);
521 if (!iram_info->search_ram_paddr) {
522 pr_err("IRAM is smaller than the search ram size\n");
523 goto out;
524 }
525 iram_info->axi_sram_use |= CODA7_USE_HOST_ME_ENABLE |
526 CODA7_USE_ME_ENABLE;
527 }
528
529 /* Only H.264BP and H.263P3 are considered */
530 iram_info->buf_dbk_y_use = coda_iram_alloc(iram_info, w64);
531 iram_info->buf_dbk_c_use = coda_iram_alloc(iram_info, w64);
532 if (!iram_info->buf_dbk_c_use)
533 goto out;
534 iram_info->axi_sram_use |= dbk_bits;
535
536 iram_info->buf_bit_use = coda_iram_alloc(iram_info, w128);
537 if (!iram_info->buf_bit_use)
538 goto out;
539 iram_info->axi_sram_use |= bit_bits;
540
541 iram_info->buf_ip_ac_dc_use = coda_iram_alloc(iram_info, w128);
542 if (!iram_info->buf_ip_ac_dc_use)
543 goto out;
544 iram_info->axi_sram_use |= ip_bits;
545
546 /* OVL and BTP disabled for encoder */
547 } else if (ctx->inst_type == CODA_INST_DECODER) {
548 struct coda_q_data *q_data_dst;
549
550 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
551 mb_width = DIV_ROUND_UP(q_data_dst->width, 16);
552 w128 = mb_width * 128;
553
554 iram_info->buf_dbk_y_use = coda_iram_alloc(iram_info, w128);
555 iram_info->buf_dbk_c_use = coda_iram_alloc(iram_info, w128);
556 if (!iram_info->buf_dbk_c_use)
557 goto out;
558 iram_info->axi_sram_use |= dbk_bits;
559
560 iram_info->buf_bit_use = coda_iram_alloc(iram_info, w128);
561 if (!iram_info->buf_bit_use)
562 goto out;
563 iram_info->axi_sram_use |= bit_bits;
564
565 iram_info->buf_ip_ac_dc_use = coda_iram_alloc(iram_info, w128);
566 if (!iram_info->buf_ip_ac_dc_use)
567 goto out;
568 iram_info->axi_sram_use |= ip_bits;
569
570 /* OVL and BTP unused as there is no VC1 support yet */
571 }
572
573out:
574 if (!(iram_info->axi_sram_use & CODA7_USE_HOST_IP_ENABLE))
575 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
576 "IRAM smaller than needed\n");
577
578 if (dev->devtype->product == CODA_7541) {
579 /* TODO - Enabling these causes picture errors on CODA7541 */
580 if (ctx->inst_type == CODA_INST_DECODER) {
581 /* fw 1.4.50 */
582 iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
583 CODA7_USE_IP_ENABLE);
584 } else {
585 /* fw 13.4.29 */
586 iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
587 CODA7_USE_HOST_DBK_ENABLE |
588 CODA7_USE_IP_ENABLE |
589 CODA7_USE_DBK_ENABLE);
590 }
591 }
592}
593
594static u32 coda_supported_firmwares[] = {
595 CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
596 CODA_FIRMWARE_VERNUM(CODA_7541, 1, 4, 50),
597 CODA_FIRMWARE_VERNUM(CODA_960, 2, 1, 5),
598};
599
600static bool coda_firmware_supported(u32 vernum)
601{
602 int i;
603
604 for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++)
605 if (vernum == coda_supported_firmwares[i])
606 return true;
607 return false;
608}
609
610int coda_check_firmware(struct coda_dev *dev)
611{
612 u16 product, major, minor, release;
613 u32 data;
614 int ret;
615
616 ret = clk_prepare_enable(dev->clk_per);
617 if (ret)
618 goto err_clk_per;
619
620 ret = clk_prepare_enable(dev->clk_ahb);
621 if (ret)
622 goto err_clk_ahb;
623
624 coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM);
625 coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
626 coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX);
627 coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD);
628 coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND);
629 if (coda_wait_timeout(dev)) {
630 v4l2_err(&dev->v4l2_dev, "firmware get command error\n");
631 ret = -EIO;
632 goto err_run_cmd;
633 }
634
635 if (dev->devtype->product == CODA_960) {
636 data = coda_read(dev, CODA9_CMD_FIRMWARE_CODE_REV);
637 v4l2_info(&dev->v4l2_dev, "Firmware code revision: %d\n",
638 data);
639 }
640
641 /* Check we are compatible with the loaded firmware */
642 data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM);
643 product = CODA_FIRMWARE_PRODUCT(data);
644 major = CODA_FIRMWARE_MAJOR(data);
645 minor = CODA_FIRMWARE_MINOR(data);
646 release = CODA_FIRMWARE_RELEASE(data);
647
648 clk_disable_unprepare(dev->clk_per);
649 clk_disable_unprepare(dev->clk_ahb);
650
651 if (product != dev->devtype->product) {
652 v4l2_err(&dev->v4l2_dev,
653 "Wrong firmware. Hw: %s, Fw: %s, Version: %u.%u.%u\n",
654 coda_product_name(dev->devtype->product),
655 coda_product_name(product), major, minor, release);
656 return -EINVAL;
657 }
658
659 v4l2_info(&dev->v4l2_dev, "Initialized %s.\n",
660 coda_product_name(product));
661
662 if (coda_firmware_supported(data)) {
663 v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n",
664 major, minor, release);
665 } else {
666 v4l2_warn(&dev->v4l2_dev,
667 "Unsupported firmware version: %u.%u.%u\n",
668 major, minor, release);
669 }
670
671 return 0;
672
673err_run_cmd:
674 clk_disable_unprepare(dev->clk_ahb);
675err_clk_ahb:
676 clk_disable_unprepare(dev->clk_per);
677err_clk_per:
678 return ret;
679}
680
681/*
682 * Encoder context operations
683 */
684
685static int coda_start_encoding(struct coda_ctx *ctx)
686{
687 struct coda_dev *dev = ctx->dev;
688 struct v4l2_device *v4l2_dev = &dev->v4l2_dev;
689 struct coda_q_data *q_data_src, *q_data_dst;
690 u32 bitstream_buf, bitstream_size;
691 struct vb2_buffer *buf;
692 int gamma, ret, value;
693 u32 dst_fourcc;
694
695 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
696 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
697 dst_fourcc = q_data_dst->fourcc;
698
699 /* Allocate per-instance buffers */
700 ret = coda_alloc_context_buffers(ctx, q_data_src);
701 if (ret < 0)
702 return ret;
703
704 buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
705 bitstream_buf = vb2_dma_contig_plane_dma_addr(buf, 0);
706 bitstream_size = q_data_dst->sizeimage;
707
708 if (!coda_is_initialized(dev)) {
709 v4l2_err(v4l2_dev, "coda is not initialized.\n");
710 return -EFAULT;
711 }
712
713 mutex_lock(&dev->coda_mutex);
714
715 coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
716 coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
717 coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
718 switch (dev->devtype->product) {
719 case CODA_DX6:
720 coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN |
721 CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
722 break;
723 case CODA_960:
724 coda_write(dev, 0, CODA9_GDI_WPROT_RGN_EN);
725 /* fallthrough */
726 case CODA_7541:
727 coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN |
728 CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
729 break;
730 }
731
732 value = coda_read(dev, CODA_REG_BIT_FRAME_MEM_CTRL);
733 value &= ~(1 << 2 | 0x7 << 9);
734 ctx->frame_mem_ctrl = value;
735 coda_write(dev, value, CODA_REG_BIT_FRAME_MEM_CTRL);
736
737 if (dev->devtype->product == CODA_DX6) {
738 /* Configure the coda */
739 coda_write(dev, dev->iram.paddr,
740 CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR);
741 }
742
743 /* Could set rotation here if needed */
744 switch (dev->devtype->product) {
745 case CODA_DX6:
746 value = (q_data_src->width & CODADX6_PICWIDTH_MASK)
747 << CODADX6_PICWIDTH_OFFSET;
748 value |= (q_data_src->height & CODADX6_PICHEIGHT_MASK)
749 << CODA_PICHEIGHT_OFFSET;
750 break;
751 case CODA_7541:
752 if (dst_fourcc == V4L2_PIX_FMT_H264) {
753 value = (round_up(q_data_src->width, 16) &
754 CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
755 value |= (round_up(q_data_src->height, 16) &
756 CODA7_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
757 break;
758 }
759 /* fallthrough */
760 case CODA_960:
761 value = (q_data_src->width & CODA7_PICWIDTH_MASK)
762 << CODA7_PICWIDTH_OFFSET;
763 value |= (q_data_src->height & CODA7_PICHEIGHT_MASK)
764 << CODA_PICHEIGHT_OFFSET;
765 }
766 coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE);
767 coda_write(dev, ctx->params.framerate,
768 CODA_CMD_ENC_SEQ_SRC_F_RATE);
769
770 ctx->params.codec_mode = ctx->codec->mode;
771 switch (dst_fourcc) {
772 case V4L2_PIX_FMT_MPEG4:
773 if (dev->devtype->product == CODA_960)
774 coda_write(dev, CODA9_STD_MPEG4,
775 CODA_CMD_ENC_SEQ_COD_STD);
776 else
777 coda_write(dev, CODA_STD_MPEG4,
778 CODA_CMD_ENC_SEQ_COD_STD);
779 coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA);
780 break;
781 case V4L2_PIX_FMT_H264:
782 if (dev->devtype->product == CODA_960)
783 coda_write(dev, CODA9_STD_H264,
784 CODA_CMD_ENC_SEQ_COD_STD);
785 else
786 coda_write(dev, CODA_STD_H264,
787 CODA_CMD_ENC_SEQ_COD_STD);
788 if (ctx->params.h264_deblk_enabled) {
789 value = ((ctx->params.h264_deblk_alpha &
790 CODA_264PARAM_DEBLKFILTEROFFSETALPHA_MASK) <<
791 CODA_264PARAM_DEBLKFILTEROFFSETALPHA_OFFSET) |
792 ((ctx->params.h264_deblk_beta &
793 CODA_264PARAM_DEBLKFILTEROFFSETBETA_MASK) <<
794 CODA_264PARAM_DEBLKFILTEROFFSETBETA_OFFSET);
795 } else {
796 value = 1 << CODA_264PARAM_DISABLEDEBLK_OFFSET;
797 }
798 coda_write(dev, value, CODA_CMD_ENC_SEQ_264_PARA);
799 break;
800 default:
801 v4l2_err(v4l2_dev,
802 "dst format (0x%08x) invalid.\n", dst_fourcc);
803 ret = -EINVAL;
804 goto out;
805 }
806
807 switch (ctx->params.slice_mode) {
808 case V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE:
809 value = 0;
810 break;
811 case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB:
812 value = (ctx->params.slice_max_mb & CODA_SLICING_SIZE_MASK)
813 << CODA_SLICING_SIZE_OFFSET;
814 value |= (1 & CODA_SLICING_UNIT_MASK)
815 << CODA_SLICING_UNIT_OFFSET;
816 value |= 1 & CODA_SLICING_MODE_MASK;
817 break;
818 case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES:
819 value = (ctx->params.slice_max_bits & CODA_SLICING_SIZE_MASK)
820 << CODA_SLICING_SIZE_OFFSET;
821 value |= (0 & CODA_SLICING_UNIT_MASK)
822 << CODA_SLICING_UNIT_OFFSET;
823 value |= 1 & CODA_SLICING_MODE_MASK;
824 break;
825 }
826 coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE);
827 value = ctx->params.gop_size & CODA_GOP_SIZE_MASK;
828 coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE);
829
830 if (ctx->params.bitrate) {
831 /* Rate control enabled */
832 value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK)
833 << CODA_RATECONTROL_BITRATE_OFFSET;
834 value |= 1 & CODA_RATECONTROL_ENABLE_MASK;
835 if (dev->devtype->product == CODA_960)
836 value |= BIT(31); /* disable autoskip */
837 } else {
838 value = 0;
839 }
840 coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA);
841
842 coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_BUF_SIZE);
843 coda_write(dev, ctx->params.intra_refresh,
844 CODA_CMD_ENC_SEQ_INTRA_REFRESH);
845
846 coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START);
847 coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE);
848
849
850 value = 0;
851 if (dev->devtype->product == CODA_960)
852 gamma = CODA9_DEFAULT_GAMMA;
853 else
854 gamma = CODA_DEFAULT_GAMMA;
855 if (gamma > 0) {
856 coda_write(dev, (gamma & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET,
857 CODA_CMD_ENC_SEQ_RC_GAMMA);
858 }
859
860 if (ctx->params.h264_min_qp || ctx->params.h264_max_qp) {
861 coda_write(dev,
862 ctx->params.h264_min_qp << CODA_QPMIN_OFFSET |
863 ctx->params.h264_max_qp << CODA_QPMAX_OFFSET,
864 CODA_CMD_ENC_SEQ_RC_QP_MIN_MAX);
865 }
866 if (dev->devtype->product == CODA_960) {
867 if (ctx->params.h264_max_qp)
868 value |= 1 << CODA9_OPTION_RCQPMAX_OFFSET;
869 if (CODA_DEFAULT_GAMMA > 0)
870 value |= 1 << CODA9_OPTION_GAMMA_OFFSET;
871 } else {
872 if (CODA_DEFAULT_GAMMA > 0) {
873 if (dev->devtype->product == CODA_DX6)
874 value |= 1 << CODADX6_OPTION_GAMMA_OFFSET;
875 else
876 value |= 1 << CODA7_OPTION_GAMMA_OFFSET;
877 }
878 if (ctx->params.h264_min_qp)
879 value |= 1 << CODA7_OPTION_RCQPMIN_OFFSET;
880 if (ctx->params.h264_max_qp)
881 value |= 1 << CODA7_OPTION_RCQPMAX_OFFSET;
882 }
883 coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION);
884
885 coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_INTERVAL_MODE);
886
887 coda_setup_iram(ctx);
888
889 if (dst_fourcc == V4L2_PIX_FMT_H264) {
890 switch (dev->devtype->product) {
891 case CODA_DX6:
892 value = FMO_SLICE_SAVE_BUF_SIZE << 7;
893 coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO);
894 break;
895 case CODA_7541:
896 coda_write(dev, ctx->iram_info.search_ram_paddr,
897 CODA7_CMD_ENC_SEQ_SEARCH_BASE);
898 coda_write(dev, ctx->iram_info.search_ram_size,
899 CODA7_CMD_ENC_SEQ_SEARCH_SIZE);
900 break;
901 case CODA_960:
902 coda_write(dev, 0, CODA9_CMD_ENC_SEQ_ME_OPTION);
903 coda_write(dev, 0, CODA9_CMD_ENC_SEQ_INTRA_WEIGHT);
904 }
905 }
906
907 ret = coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT);
908 if (ret < 0) {
909 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
910 goto out;
911 }
912
913 if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0) {
914 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT failed\n");
915 ret = -EFAULT;
916 goto out;
917 }
918
919 if (dev->devtype->product == CODA_960)
920 ctx->num_internal_frames = 4;
921 else
922 ctx->num_internal_frames = 2;
923 ret = coda_alloc_framebuffers(ctx, q_data_src, dst_fourcc);
924 if (ret < 0) {
925 v4l2_err(v4l2_dev, "failed to allocate framebuffers\n");
926 goto out;
927 }
928
929 coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
930 coda_write(dev, q_data_src->bytesperline,
931 CODA_CMD_SET_FRAME_BUF_STRIDE);
932 if (dev->devtype->product == CODA_7541) {
933 coda_write(dev, q_data_src->bytesperline,
934 CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE);
935 }
936 if (dev->devtype->product != CODA_DX6) {
937 coda_write(dev, ctx->iram_info.buf_bit_use,
938 CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
939 coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
940 CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
941 coda_write(dev, ctx->iram_info.buf_dbk_y_use,
942 CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
943 coda_write(dev, ctx->iram_info.buf_dbk_c_use,
944 CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
945 coda_write(dev, ctx->iram_info.buf_ovl_use,
946 CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
947 if (dev->devtype->product == CODA_960) {
948 coda_write(dev, ctx->iram_info.buf_btp_use,
949 CODA9_CMD_SET_FRAME_AXI_BTP_ADDR);
950
951 /* FIXME */
952 coda_write(dev, ctx->internal_frames[2].paddr,
953 CODA9_CMD_SET_FRAME_SUBSAMP_A);
954 coda_write(dev, ctx->internal_frames[3].paddr,
955 CODA9_CMD_SET_FRAME_SUBSAMP_B);
956 }
957 }
958
959 ret = coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF);
960 if (ret < 0) {
961 v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n");
962 goto out;
963 }
964
965 /* Save stream headers */
966 buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
967 switch (dst_fourcc) {
968 case V4L2_PIX_FMT_H264:
969 /*
970 * Get SPS in the first frame and copy it to an
971 * intermediate buffer.
972 */
973 ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_SPS,
974 &ctx->vpu_header[0][0],
975 &ctx->vpu_header_size[0]);
976 if (ret < 0)
977 goto out;
978
979 /*
980 * Get PPS in the first frame and copy it to an
981 * intermediate buffer.
982 */
983 ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_PPS,
984 &ctx->vpu_header[1][0],
985 &ctx->vpu_header_size[1]);
986 if (ret < 0)
987 goto out;
988
989 /*
990 * Length of H.264 headers is variable and thus it might not be
991 * aligned for the coda to append the encoded frame. In that is
992 * the case a filler NAL must be added to header 2.
993 */
994 ctx->vpu_header_size[2] = coda_h264_padding(
995 (ctx->vpu_header_size[0] +
996 ctx->vpu_header_size[1]),
997 ctx->vpu_header[2]);
998 break;
999 case V4L2_PIX_FMT_MPEG4:
1000 /*
1001 * Get VOS in the first frame and copy it to an
1002 * intermediate buffer
1003 */
1004 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOS,
1005 &ctx->vpu_header[0][0],
1006 &ctx->vpu_header_size[0]);
1007 if (ret < 0)
1008 goto out;
1009
1010 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VIS,
1011 &ctx->vpu_header[1][0],
1012 &ctx->vpu_header_size[1]);
1013 if (ret < 0)
1014 goto out;
1015
1016 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOL,
1017 &ctx->vpu_header[2][0],
1018 &ctx->vpu_header_size[2]);
1019 if (ret < 0)
1020 goto out;
1021 break;
1022 default:
1023 /* No more formats need to save headers at the moment */
1024 break;
1025 }
1026
1027out:
1028 mutex_unlock(&dev->coda_mutex);
1029 return ret;
1030}
1031
1032static int coda_prepare_encode(struct coda_ctx *ctx)
1033{
1034 struct coda_q_data *q_data_src, *q_data_dst;
1035 struct vb2_buffer *src_buf, *dst_buf;
1036 struct coda_dev *dev = ctx->dev;
1037 int force_ipicture;
1038 int quant_param = 0;
1039 u32 picture_y, picture_cb, picture_cr;
1040 u32 pic_stream_buffer_addr, pic_stream_buffer_size;
1041 u32 dst_fourcc;
1042
1043 src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
1044 dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1045 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1046 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1047 dst_fourcc = q_data_dst->fourcc;
1048
1049 src_buf->v4l2_buf.sequence = ctx->osequence;
1050 dst_buf->v4l2_buf.sequence = ctx->osequence;
1051 ctx->osequence++;
1052
1053 /*
1054 * Workaround coda firmware BUG that only marks the first
1055 * frame as IDR. This is a problem for some decoders that can't
1056 * recover when a frame is lost.
1057 */
1058 if (src_buf->v4l2_buf.sequence % ctx->params.gop_size) {
1059 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
1060 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
1061 } else {
1062 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
1063 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
1064 }
1065
1066 if (dev->devtype->product == CODA_960)
1067 coda_set_gdi_regs(ctx);
1068
1069 /*
1070 * Copy headers at the beginning of the first frame for H.264 only.
1071 * In MPEG4 they are already copied by the coda.
1072 */
1073 if (src_buf->v4l2_buf.sequence == 0) {
1074 pic_stream_buffer_addr =
1075 vb2_dma_contig_plane_dma_addr(dst_buf, 0) +
1076 ctx->vpu_header_size[0] +
1077 ctx->vpu_header_size[1] +
1078 ctx->vpu_header_size[2];
1079 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE -
1080 ctx->vpu_header_size[0] -
1081 ctx->vpu_header_size[1] -
1082 ctx->vpu_header_size[2];
1083 memcpy(vb2_plane_vaddr(dst_buf, 0),
1084 &ctx->vpu_header[0][0], ctx->vpu_header_size[0]);
1085 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0],
1086 &ctx->vpu_header[1][0], ctx->vpu_header_size[1]);
1087 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0] +
1088 ctx->vpu_header_size[1], &ctx->vpu_header[2][0],
1089 ctx->vpu_header_size[2]);
1090 } else {
1091 pic_stream_buffer_addr =
1092 vb2_dma_contig_plane_dma_addr(dst_buf, 0);
1093 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE;
1094 }
1095
1096 if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
1097 force_ipicture = 1;
1098 switch (dst_fourcc) {
1099 case V4L2_PIX_FMT_H264:
1100 quant_param = ctx->params.h264_intra_qp;
1101 break;
1102 case V4L2_PIX_FMT_MPEG4:
1103 quant_param = ctx->params.mpeg4_intra_qp;
1104 break;
1105 default:
1106 v4l2_warn(&ctx->dev->v4l2_dev,
1107 "cannot set intra qp, fmt not supported\n");
1108 break;
1109 }
1110 } else {
1111 force_ipicture = 0;
1112 switch (dst_fourcc) {
1113 case V4L2_PIX_FMT_H264:
1114 quant_param = ctx->params.h264_inter_qp;
1115 break;
1116 case V4L2_PIX_FMT_MPEG4:
1117 quant_param = ctx->params.mpeg4_inter_qp;
1118 break;
1119 default:
1120 v4l2_warn(&ctx->dev->v4l2_dev,
1121 "cannot set inter qp, fmt not supported\n");
1122 break;
1123 }
1124 }
1125
1126 /* submit */
1127 coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode,
1128 CODA_CMD_ENC_PIC_ROT_MODE);
1129 coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS);
1130
1131
1132 picture_y = vb2_dma_contig_plane_dma_addr(src_buf, 0);
1133 switch (q_data_src->fourcc) {
1134 case V4L2_PIX_FMT_YVU420:
1135 /* Switch Cb and Cr for YVU420 format */
1136 picture_cr = picture_y + q_data_src->bytesperline *
1137 q_data_src->height;
1138 picture_cb = picture_cr + q_data_src->bytesperline / 2 *
1139 q_data_src->height / 2;
1140 break;
1141 case V4L2_PIX_FMT_YUV420:
1142 default:
1143 picture_cb = picture_y + q_data_src->bytesperline *
1144 q_data_src->height;
1145 picture_cr = picture_cb + q_data_src->bytesperline / 2 *
1146 q_data_src->height / 2;
1147 break;
1148 }
1149
1150 if (dev->devtype->product == CODA_960) {
1151 coda_write(dev, 4/*FIXME: 0*/, CODA9_CMD_ENC_PIC_SRC_INDEX);
1152 coda_write(dev, q_data_src->width, CODA9_CMD_ENC_PIC_SRC_STRIDE);
1153 coda_write(dev, 0, CODA9_CMD_ENC_PIC_SUB_FRAME_SYNC);
1154
1155 coda_write(dev, picture_y, CODA9_CMD_ENC_PIC_SRC_ADDR_Y);
1156 coda_write(dev, picture_cb, CODA9_CMD_ENC_PIC_SRC_ADDR_CB);
1157 coda_write(dev, picture_cr, CODA9_CMD_ENC_PIC_SRC_ADDR_CR);
1158 } else {
1159 coda_write(dev, picture_y, CODA_CMD_ENC_PIC_SRC_ADDR_Y);
1160 coda_write(dev, picture_cb, CODA_CMD_ENC_PIC_SRC_ADDR_CB);
1161 coda_write(dev, picture_cr, CODA_CMD_ENC_PIC_SRC_ADDR_CR);
1162 }
1163 coda_write(dev, force_ipicture << 1 & 0x2,
1164 CODA_CMD_ENC_PIC_OPTION);
1165
1166 coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START);
1167 coda_write(dev, pic_stream_buffer_size / 1024,
1168 CODA_CMD_ENC_PIC_BB_SIZE);
1169
1170 if (!ctx->streamon_out) {
1171 /* After streamoff on the output side, set stream end flag */
1172 ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
1173 coda_write(dev, ctx->bit_stream_param,
1174 CODA_REG_BIT_BIT_STREAM_PARAM);
1175 }
1176
1177 if (dev->devtype->product != CODA_DX6)
1178 coda_write(dev, ctx->iram_info.axi_sram_use,
1179 CODA7_REG_BIT_AXI_SRAM_USE);
1180
1181 coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
1182
1183 return 0;
1184}
1185
1186static void coda_finish_encode(struct coda_ctx *ctx)
1187{
1188 struct vb2_buffer *src_buf, *dst_buf;
1189 struct coda_dev *dev = ctx->dev;
1190 u32 wr_ptr, start_ptr;
1191
1192 src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
1193 dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1194
1195 /* Get results from the coda */
1196 start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START);
1197 wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
1198
1199 /* Calculate bytesused field */
1200 if (dst_buf->v4l2_buf.sequence == 0) {
1201 vb2_set_plane_payload(dst_buf, 0, wr_ptr - start_ptr +
1202 ctx->vpu_header_size[0] +
1203 ctx->vpu_header_size[1] +
1204 ctx->vpu_header_size[2]);
1205 } else {
1206 vb2_set_plane_payload(dst_buf, 0, wr_ptr - start_ptr);
1207 }
1208
1209 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, "frame size = %u\n",
1210 wr_ptr - start_ptr);
1211
1212 coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM);
1213 coda_read(dev, CODA_RET_ENC_PIC_FLAG);
1214
1215 if (coda_read(dev, CODA_RET_ENC_PIC_TYPE) == 0) {
1216 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
1217 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
1218 } else {
1219 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
1220 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
1221 }
1222
1223 dst_buf->v4l2_buf.timestamp = src_buf->v4l2_buf.timestamp;
1224 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
1225 dst_buf->v4l2_buf.flags |=
1226 src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
1227 dst_buf->v4l2_buf.timecode = src_buf->v4l2_buf.timecode;
1228
1229 v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
1230
1231 dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
1232 v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE);
1233
1234 ctx->gopcounter--;
1235 if (ctx->gopcounter < 0)
1236 ctx->gopcounter = ctx->params.gop_size - 1;
1237
1238 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1239 "job finished: encoding frame (%d) (%s)\n",
1240 dst_buf->v4l2_buf.sequence,
1241 (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
1242 "KEYFRAME" : "PFRAME");
1243}
1244
1245static void coda_seq_end_work(struct work_struct *work)
1246{
1247 struct coda_ctx *ctx = container_of(work, struct coda_ctx, seq_end_work);
1248 struct coda_dev *dev = ctx->dev;
1249
1250 mutex_lock(&ctx->buffer_mutex);
1251 mutex_lock(&dev->coda_mutex);
1252
1253 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1254 "%d: %s: sent command 'SEQ_END' to coda\n", ctx->idx,
1255 __func__);
1256 if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
1257 v4l2_err(&dev->v4l2_dev,
1258 "CODA_COMMAND_SEQ_END failed\n");
1259 }
1260
1261 kfifo_init(&ctx->bitstream_fifo,
1262 ctx->bitstream.vaddr, ctx->bitstream.size);
1263
1264 coda_free_framebuffers(ctx);
1265 coda_free_context_buffers(ctx);
1266
1267 mutex_unlock(&dev->coda_mutex);
1268 mutex_unlock(&ctx->buffer_mutex);
1269}
1270
1271static void coda_bit_release(struct coda_ctx *ctx)
1272{
1273 coda_free_framebuffers(ctx);
1274 coda_free_context_buffers(ctx);
1275}
1276
1277const struct coda_context_ops coda_bit_encode_ops = {
1278 .queue_init = coda_encoder_queue_init,
1279 .start_streaming = coda_start_encoding,
1280 .prepare_run = coda_prepare_encode,
1281 .finish_run = coda_finish_encode,
1282 .seq_end_work = coda_seq_end_work,
1283 .release = coda_bit_release,
1284};
1285
1286/*
1287 * Decoder context operations
1288 */
1289
1290static int __coda_start_decoding(struct coda_ctx *ctx)
1291{
1292 struct coda_q_data *q_data_src, *q_data_dst;
1293 u32 bitstream_buf, bitstream_size;
1294 struct coda_dev *dev = ctx->dev;
1295 int width, height;
1296 u32 src_fourcc;
1297 u32 val;
1298 int ret;
1299
1300 /* Start decoding */
1301 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1302 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1303 bitstream_buf = ctx->bitstream.paddr;
1304 bitstream_size = ctx->bitstream.size;
1305 src_fourcc = q_data_src->fourcc;
1306
1307 /* Allocate per-instance buffers */
1308 ret = coda_alloc_context_buffers(ctx, q_data_src);
1309 if (ret < 0)
1310 return ret;
1311
1312 coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
1313
1314 /* Update coda bitstream read and write pointers from kfifo */
1315 coda_kfifo_sync_to_device_full(ctx);
1316
1317 ctx->display_idx = -1;
1318 ctx->frm_dis_flg = 0;
1319 coda_write(dev, 0, CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
1320
1321 coda_write(dev, CODA_BIT_DEC_SEQ_INIT_ESCAPE,
1322 CODA_REG_BIT_BIT_STREAM_PARAM);
1323
1324 coda_write(dev, bitstream_buf, CODA_CMD_DEC_SEQ_BB_START);
1325 coda_write(dev, bitstream_size / 1024, CODA_CMD_DEC_SEQ_BB_SIZE);
1326 val = 0;
1327 if ((dev->devtype->product == CODA_7541) ||
1328 (dev->devtype->product == CODA_960))
1329 val |= CODA_REORDER_ENABLE;
1330 coda_write(dev, val, CODA_CMD_DEC_SEQ_OPTION);
1331
1332 ctx->params.codec_mode = ctx->codec->mode;
1333 if (dev->devtype->product == CODA_960 &&
1334 src_fourcc == V4L2_PIX_FMT_MPEG4)
1335 ctx->params.codec_mode_aux = CODA_MP4_AUX_MPEG4;
1336 else
1337 ctx->params.codec_mode_aux = 0;
1338 if (src_fourcc == V4L2_PIX_FMT_H264) {
1339 if (dev->devtype->product == CODA_7541) {
1340 coda_write(dev, ctx->psbuf.paddr,
1341 CODA_CMD_DEC_SEQ_PS_BB_START);
1342 coda_write(dev, (CODA7_PS_BUF_SIZE / 1024),
1343 CODA_CMD_DEC_SEQ_PS_BB_SIZE);
1344 }
1345 if (dev->devtype->product == CODA_960) {
1346 coda_write(dev, 0, CODA_CMD_DEC_SEQ_X264_MV_EN);
1347 coda_write(dev, 512, CODA_CMD_DEC_SEQ_SPP_CHUNK_SIZE);
1348 }
1349 }
1350 if (dev->devtype->product != CODA_960)
1351 coda_write(dev, 0, CODA_CMD_DEC_SEQ_SRC_SIZE);
1352
1353 if (coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT)) {
1354 v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
1355 coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
1356 return -ETIMEDOUT;
1357 }
1358
1359 /* Update kfifo out pointer from coda bitstream read pointer */
1360 coda_kfifo_sync_from_device(ctx);
1361
1362 coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
1363
1364 if (coda_read(dev, CODA_RET_DEC_SEQ_SUCCESS) == 0) {
1365 v4l2_err(&dev->v4l2_dev,
1366 "CODA_COMMAND_SEQ_INIT failed, error code = %d\n",
1367 coda_read(dev, CODA_RET_DEC_SEQ_ERR_REASON));
1368 return -EAGAIN;
1369 }
1370
1371 val = coda_read(dev, CODA_RET_DEC_SEQ_SRC_SIZE);
1372 if (dev->devtype->product == CODA_DX6) {
1373 width = (val >> CODADX6_PICWIDTH_OFFSET) & CODADX6_PICWIDTH_MASK;
1374 height = val & CODADX6_PICHEIGHT_MASK;
1375 } else {
1376 width = (val >> CODA7_PICWIDTH_OFFSET) & CODA7_PICWIDTH_MASK;
1377 height = val & CODA7_PICHEIGHT_MASK;
1378 }
1379
1380 if (width > q_data_dst->width || height > q_data_dst->height) {
1381 v4l2_err(&dev->v4l2_dev, "stream is %dx%d, not %dx%d\n",
1382 width, height, q_data_dst->width, q_data_dst->height);
1383 return -EINVAL;
1384 }
1385
1386 width = round_up(width, 16);
1387 height = round_up(height, 16);
1388
1389 v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "%s instance %d now: %dx%d\n",
1390 __func__, ctx->idx, width, height);
1391
1392 ctx->num_internal_frames = coda_read(dev, CODA_RET_DEC_SEQ_FRAME_NEED);
1393 if (ctx->num_internal_frames > CODA_MAX_FRAMEBUFFERS) {
1394 v4l2_err(&dev->v4l2_dev,
1395 "not enough framebuffers to decode (%d < %d)\n",
1396 CODA_MAX_FRAMEBUFFERS, ctx->num_internal_frames);
1397 return -EINVAL;
1398 }
1399
1400 if (src_fourcc == V4L2_PIX_FMT_H264) {
1401 u32 left_right;
1402 u32 top_bottom;
1403
1404 left_right = coda_read(dev, CODA_RET_DEC_SEQ_CROP_LEFT_RIGHT);
1405 top_bottom = coda_read(dev, CODA_RET_DEC_SEQ_CROP_TOP_BOTTOM);
1406
1407 q_data_dst->rect.left = (left_right >> 10) & 0x3ff;
1408 q_data_dst->rect.top = (top_bottom >> 10) & 0x3ff;
1409 q_data_dst->rect.width = width - q_data_dst->rect.left -
1410 (left_right & 0x3ff);
1411 q_data_dst->rect.height = height - q_data_dst->rect.top -
1412 (top_bottom & 0x3ff);
1413 }
1414
1415 ret = coda_alloc_framebuffers(ctx, q_data_dst, src_fourcc);
1416 if (ret < 0) {
1417 v4l2_err(&dev->v4l2_dev, "failed to allocate framebuffers\n");
1418 return ret;
1419 }
1420
1421 /* Tell the decoder how many frame buffers we allocated. */
1422 coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
1423 coda_write(dev, width, CODA_CMD_SET_FRAME_BUF_STRIDE);
1424
1425 if (dev->devtype->product != CODA_DX6) {
1426 /* Set secondary AXI IRAM */
1427 coda_setup_iram(ctx);
1428
1429 coda_write(dev, ctx->iram_info.buf_bit_use,
1430 CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
1431 coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
1432 CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
1433 coda_write(dev, ctx->iram_info.buf_dbk_y_use,
1434 CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
1435 coda_write(dev, ctx->iram_info.buf_dbk_c_use,
1436 CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
1437 coda_write(dev, ctx->iram_info.buf_ovl_use,
1438 CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
1439 if (dev->devtype->product == CODA_960)
1440 coda_write(dev, ctx->iram_info.buf_btp_use,
1441 CODA9_CMD_SET_FRAME_AXI_BTP_ADDR);
1442 }
1443
1444 if (dev->devtype->product == CODA_960) {
1445 coda_write(dev, -1, CODA9_CMD_SET_FRAME_DELAY);
1446
1447 coda_write(dev, 0x20262024, CODA9_CMD_SET_FRAME_CACHE_SIZE);
1448 coda_write(dev, 2 << CODA9_CACHE_PAGEMERGE_OFFSET |
1449 32 << CODA9_CACHE_LUMA_BUFFER_SIZE_OFFSET |
1450 8 << CODA9_CACHE_CB_BUFFER_SIZE_OFFSET |
1451 8 << CODA9_CACHE_CR_BUFFER_SIZE_OFFSET,
1452 CODA9_CMD_SET_FRAME_CACHE_CONFIG);
1453 }
1454
1455 if (src_fourcc == V4L2_PIX_FMT_H264) {
1456 coda_write(dev, ctx->slicebuf.paddr,
1457 CODA_CMD_SET_FRAME_SLICE_BB_START);
1458 coda_write(dev, ctx->slicebuf.size / 1024,
1459 CODA_CMD_SET_FRAME_SLICE_BB_SIZE);
1460 }
1461
1462 if (dev->devtype->product == CODA_7541) {
1463 int max_mb_x = 1920 / 16;
1464 int max_mb_y = 1088 / 16;
1465 int max_mb_num = max_mb_x * max_mb_y;
1466
1467 coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y,
1468 CODA7_CMD_SET_FRAME_MAX_DEC_SIZE);
1469 } else if (dev->devtype->product == CODA_960) {
1470 int max_mb_x = 1920 / 16;
1471 int max_mb_y = 1088 / 16;
1472 int max_mb_num = max_mb_x * max_mb_y;
1473
1474 coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y,
1475 CODA9_CMD_SET_FRAME_MAX_DEC_SIZE);
1476 }
1477
1478 if (coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF)) {
1479 v4l2_err(&ctx->dev->v4l2_dev,
1480 "CODA_COMMAND_SET_FRAME_BUF timeout\n");
1481 return -ETIMEDOUT;
1482 }
1483
1484 return 0;
1485}
1486
1487static int coda_start_decoding(struct coda_ctx *ctx)
1488{
1489 struct coda_dev *dev = ctx->dev;
1490 int ret;
1491
1492 mutex_lock(&dev->coda_mutex);
1493 ret = __coda_start_decoding(ctx);
1494 mutex_unlock(&dev->coda_mutex);
1495
1496 return ret;
1497}
1498
1499static int coda_prepare_decode(struct coda_ctx *ctx)
1500{
1501 struct vb2_buffer *dst_buf;
1502 struct coda_dev *dev = ctx->dev;
1503 struct coda_q_data *q_data_dst;
1504 u32 stridey, height;
1505 u32 picture_y, picture_cb, picture_cr;
1506
1507 dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1508 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1509
1510 if (ctx->params.rot_mode & CODA_ROT_90) {
1511 stridey = q_data_dst->height;
1512 height = q_data_dst->width;
1513 } else {
1514 stridey = q_data_dst->width;
1515 height = q_data_dst->height;
1516 }
1517
1518 /* Try to copy source buffer contents into the bitstream ringbuffer */
1519 mutex_lock(&ctx->bitstream_mutex);
1520 coda_fill_bitstream(ctx);
1521 mutex_unlock(&ctx->bitstream_mutex);
1522
1523 if (coda_get_bitstream_payload(ctx) < 512 &&
1524 (!(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))) {
1525 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1526 "bitstream payload: %d, skipping\n",
1527 coda_get_bitstream_payload(ctx));
1528 v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx);
1529 return -EAGAIN;
1530 }
1531
1532 /* Run coda_start_decoding (again) if not yet initialized */
1533 if (!ctx->initialized) {
1534 int ret = __coda_start_decoding(ctx);
1535
1536 if (ret < 0) {
1537 v4l2_err(&dev->v4l2_dev, "failed to start decoding\n");
1538 v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx);
1539 return -EAGAIN;
1540 } else {
1541 ctx->initialized = 1;
1542 }
1543 }
1544
1545 if (dev->devtype->product == CODA_960)
1546 coda_set_gdi_regs(ctx);
1547
1548 /* Set rotator output */
1549 picture_y = vb2_dma_contig_plane_dma_addr(dst_buf, 0);
1550 if (q_data_dst->fourcc == V4L2_PIX_FMT_YVU420) {
1551 /* Switch Cr and Cb for YVU420 format */
1552 picture_cr = picture_y + stridey * height;
1553 picture_cb = picture_cr + stridey / 2 * height / 2;
1554 } else {
1555 picture_cb = picture_y + stridey * height;
1556 picture_cr = picture_cb + stridey / 2 * height / 2;
1557 }
1558
1559 if (dev->devtype->product == CODA_960) {
1560 /*
1561 * The CODA960 seems to have an internal list of buffers with
1562 * 64 entries that includes the registered frame buffers as
1563 * well as the rotator buffer output.
1564 * ROT_INDEX needs to be < 0x40, but > ctx->num_internal_frames.
1565 */
1566 coda_write(dev, CODA_MAX_FRAMEBUFFERS + dst_buf->v4l2_buf.index,
1567 CODA9_CMD_DEC_PIC_ROT_INDEX);
1568 coda_write(dev, picture_y, CODA9_CMD_DEC_PIC_ROT_ADDR_Y);
1569 coda_write(dev, picture_cb, CODA9_CMD_DEC_PIC_ROT_ADDR_CB);
1570 coda_write(dev, picture_cr, CODA9_CMD_DEC_PIC_ROT_ADDR_CR);
1571 coda_write(dev, stridey, CODA9_CMD_DEC_PIC_ROT_STRIDE);
1572 } else {
1573 coda_write(dev, picture_y, CODA_CMD_DEC_PIC_ROT_ADDR_Y);
1574 coda_write(dev, picture_cb, CODA_CMD_DEC_PIC_ROT_ADDR_CB);
1575 coda_write(dev, picture_cr, CODA_CMD_DEC_PIC_ROT_ADDR_CR);
1576 coda_write(dev, stridey, CODA_CMD_DEC_PIC_ROT_STRIDE);
1577 }
1578 coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode,
1579 CODA_CMD_DEC_PIC_ROT_MODE);
1580
1581 switch (dev->devtype->product) {
1582 case CODA_DX6:
1583 /* TBD */
1584 case CODA_7541:
1585 coda_write(dev, CODA_PRE_SCAN_EN, CODA_CMD_DEC_PIC_OPTION);
1586 break;
1587 case CODA_960:
1588 /* 'hardcode to use interrupt disable mode'? */
1589 coda_write(dev, (1 << 10), CODA_CMD_DEC_PIC_OPTION);
1590 break;
1591 }
1592
1593 coda_write(dev, 0, CODA_CMD_DEC_PIC_SKIP_NUM);
1594
1595 coda_write(dev, 0, CODA_CMD_DEC_PIC_BB_START);
1596 coda_write(dev, 0, CODA_CMD_DEC_PIC_START_BYTE);
1597
1598 if (dev->devtype->product != CODA_DX6)
1599 coda_write(dev, ctx->iram_info.axi_sram_use,
1600 CODA7_REG_BIT_AXI_SRAM_USE);
1601
1602 coda_kfifo_sync_to_device_full(ctx);
1603
1604 coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
1605
1606 return 0;
1607}
1608
1609static void coda_finish_decode(struct coda_ctx *ctx)
1610{
1611 struct coda_dev *dev = ctx->dev;
1612 struct coda_q_data *q_data_src;
1613 struct coda_q_data *q_data_dst;
1614 struct vb2_buffer *dst_buf;
1615 struct coda_timestamp *ts;
1616 int width, height;
1617 int decoded_idx;
1618 int display_idx;
1619 u32 src_fourcc;
1620 int success;
1621 u32 err_mb;
1622 u32 val;
1623
1624 /* Update kfifo out pointer from coda bitstream read pointer */
1625 coda_kfifo_sync_from_device(ctx);
1626
1627 /*
1628 * in stream-end mode, the read pointer can overshoot the write pointer
1629 * by up to 512 bytes
1630 */
1631 if (ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG) {
1632 if (coda_get_bitstream_payload(ctx) >= CODA_MAX_FRAME_SIZE - 512)
1633 kfifo_init(&ctx->bitstream_fifo,
1634 ctx->bitstream.vaddr, ctx->bitstream.size);
1635 }
1636
1637 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1638 src_fourcc = q_data_src->fourcc;
1639
1640 val = coda_read(dev, CODA_RET_DEC_PIC_SUCCESS);
1641 if (val != 1)
1642 pr_err("DEC_PIC_SUCCESS = %d\n", val);
1643
1644 success = val & 0x1;
1645 if (!success)
1646 v4l2_err(&dev->v4l2_dev, "decode failed\n");
1647
1648 if (src_fourcc == V4L2_PIX_FMT_H264) {
1649 if (val & (1 << 3))
1650 v4l2_err(&dev->v4l2_dev,
1651 "insufficient PS buffer space (%d bytes)\n",
1652 ctx->psbuf.size);
1653 if (val & (1 << 2))
1654 v4l2_err(&dev->v4l2_dev,
1655 "insufficient slice buffer space (%d bytes)\n",
1656 ctx->slicebuf.size);
1657 }
1658
1659 val = coda_read(dev, CODA_RET_DEC_PIC_SIZE);
1660 width = (val >> 16) & 0xffff;
1661 height = val & 0xffff;
1662
1663 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1664
1665 /* frame crop information */
1666 if (src_fourcc == V4L2_PIX_FMT_H264) {
1667 u32 left_right;
1668 u32 top_bottom;
1669
1670 left_right = coda_read(dev, CODA_RET_DEC_PIC_CROP_LEFT_RIGHT);
1671 top_bottom = coda_read(dev, CODA_RET_DEC_PIC_CROP_TOP_BOTTOM);
1672
1673 if (left_right == 0xffffffff && top_bottom == 0xffffffff) {
1674 /* Keep current crop information */
1675 } else {
1676 struct v4l2_rect *rect = &q_data_dst->rect;
1677
1678 rect->left = left_right >> 16 & 0xffff;
1679 rect->top = top_bottom >> 16 & 0xffff;
1680 rect->width = width - rect->left -
1681 (left_right & 0xffff);
1682 rect->height = height - rect->top -
1683 (top_bottom & 0xffff);
1684 }
1685 } else {
1686 /* no cropping */
1687 }
1688
1689 err_mb = coda_read(dev, CODA_RET_DEC_PIC_ERR_MB);
1690 if (err_mb > 0)
1691 v4l2_err(&dev->v4l2_dev,
1692 "errors in %d macroblocks\n", err_mb);
1693
1694 if (dev->devtype->product == CODA_7541) {
1695 val = coda_read(dev, CODA_RET_DEC_PIC_OPTION);
1696 if (val == 0) {
1697 /* not enough bitstream data */
1698 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1699 "prescan failed: %d\n", val);
1700 ctx->hold = true;
1701 return;
1702 }
1703 }
1704
1705 ctx->frm_dis_flg = coda_read(dev,
1706 CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
1707
1708 /*
1709 * The previous display frame was copied out by the rotator,
1710 * now it can be overwritten again
1711 */
1712 if (ctx->display_idx >= 0 &&
1713 ctx->display_idx < ctx->num_internal_frames) {
1714 ctx->frm_dis_flg &= ~(1 << ctx->display_idx);
1715 coda_write(dev, ctx->frm_dis_flg,
1716 CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
1717 }
1718
1719 /*
1720 * The index of the last decoded frame, not necessarily in
1721 * display order, and the index of the next display frame.
1722 * The latter could have been decoded in a previous run.
1723 */
1724 decoded_idx = coda_read(dev, CODA_RET_DEC_PIC_CUR_IDX);
1725 display_idx = coda_read(dev, CODA_RET_DEC_PIC_FRAME_IDX);
1726
1727 if (decoded_idx == -1) {
1728 /* no frame was decoded, but we might have a display frame */
1729 if (display_idx >= 0 && display_idx < ctx->num_internal_frames)
1730 ctx->sequence_offset++;
1731 else if (ctx->display_idx < 0)
1732 ctx->hold = true;
1733 } else if (decoded_idx == -2) {
1734 /* no frame was decoded, we still return remaining buffers */
1735 } else if (decoded_idx < 0 || decoded_idx >= ctx->num_internal_frames) {
1736 v4l2_err(&dev->v4l2_dev,
1737 "decoded frame index out of range: %d\n", decoded_idx);
1738 } else {
1739 val = coda_read(dev, CODA_RET_DEC_PIC_FRAME_NUM) - 1;
1740 val -= ctx->sequence_offset;
1741 mutex_lock(&ctx->bitstream_mutex);
1742 if (!list_empty(&ctx->timestamp_list)) {
1743 ts = list_first_entry(&ctx->timestamp_list,
1744 struct coda_timestamp, list);
1745 list_del(&ts->list);
1746 if (val != (ts->sequence & 0xffff)) {
1747 v4l2_err(&dev->v4l2_dev,
1748 "sequence number mismatch (%d(%d) != %d)\n",
1749 val, ctx->sequence_offset,
1750 ts->sequence);
1751 }
1752 ctx->frame_timestamps[decoded_idx] = *ts;
1753 kfree(ts);
1754 } else {
1755 v4l2_err(&dev->v4l2_dev, "empty timestamp list!\n");
1756 memset(&ctx->frame_timestamps[decoded_idx], 0,
1757 sizeof(struct coda_timestamp));
1758 ctx->frame_timestamps[decoded_idx].sequence = val;
1759 }
1760 mutex_unlock(&ctx->bitstream_mutex);
1761
1762 val = coda_read(dev, CODA_RET_DEC_PIC_TYPE) & 0x7;
1763 if (val == 0)
1764 ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_KEYFRAME;
1765 else if (val == 1)
1766 ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_PFRAME;
1767 else
1768 ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_BFRAME;
1769
1770 ctx->frame_errors[decoded_idx] = err_mb;
1771 }
1772
1773 if (display_idx == -1) {
1774 /*
1775 * no more frames to be decoded, but there could still
1776 * be rotator output to dequeue
1777 */
1778 ctx->hold = true;
1779 } else if (display_idx == -3) {
1780 /* possibly prescan failure */
1781 } else if (display_idx < 0 || display_idx >= ctx->num_internal_frames) {
1782 v4l2_err(&dev->v4l2_dev,
1783 "presentation frame index out of range: %d\n",
1784 display_idx);
1785 }
1786
1787 /* If a frame was copied out, return it */
1788 if (ctx->display_idx >= 0 &&
1789 ctx->display_idx < ctx->num_internal_frames) {
1790 dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
1791 dst_buf->v4l2_buf.sequence = ctx->osequence++;
1792
1793 dst_buf->v4l2_buf.flags &= ~(V4L2_BUF_FLAG_KEYFRAME |
1794 V4L2_BUF_FLAG_PFRAME |
1795 V4L2_BUF_FLAG_BFRAME);
1796 dst_buf->v4l2_buf.flags |= ctx->frame_types[ctx->display_idx];
1797 ts = &ctx->frame_timestamps[ctx->display_idx];
1798 dst_buf->v4l2_buf.timecode = ts->timecode;
1799 dst_buf->v4l2_buf.timestamp = ts->timestamp;
1800
1801 vb2_set_plane_payload(dst_buf, 0, width * height * 3 / 2);
1802
1803 v4l2_m2m_buf_done(dst_buf, ctx->frame_errors[display_idx] ?
1804 VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE);
1805
1806 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1807 "job finished: decoding frame (%d) (%s)\n",
1808 dst_buf->v4l2_buf.sequence,
1809 (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
1810 "KEYFRAME" : "PFRAME");
1811 } else {
1812 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1813 "job finished: no frame decoded\n");
1814 }
1815
1816 /* The rotator will copy the current display frame next time */
1817 ctx->display_idx = display_idx;
1818}
1819
1820const struct coda_context_ops coda_bit_decode_ops = {
1821 .queue_init = coda_decoder_queue_init,
1822 .start_streaming = coda_start_decoding,
1823 .prepare_run = coda_prepare_decode,
1824 .finish_run = coda_finish_decode,
1825 .seq_end_work = coda_seq_end_work,
1826 .release = coda_bit_release,
1827};
1828
1829irqreturn_t coda_irq_handler(int irq, void *data)
1830{
1831 struct coda_dev *dev = data;
1832 struct coda_ctx *ctx;
1833
1834 /* read status register to attend the IRQ */
1835 coda_read(dev, CODA_REG_BIT_INT_STATUS);
1836 coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET,
1837 CODA_REG_BIT_INT_CLEAR);
1838
1839 ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
1840 if (ctx == NULL) {
1841 v4l2_err(&dev->v4l2_dev,
1842 "Instance released before the end of transaction\n");
1843 mutex_unlock(&dev->coda_mutex);
1844 return IRQ_HANDLED;
1845 }
1846
1847 if (ctx->aborting) {
1848 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1849 "task has been aborted\n");
1850 }
1851
1852 if (coda_isbusy(ctx->dev)) {
1853 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1854 "coda is still busy!!!!\n");
1855 return IRQ_NONE;
1856 }
1857
1858 complete(&ctx->completion);
1859
1860 return IRQ_HANDLED;
1861}
diff --git a/drivers/media/platform/coda/coda-common.c b/drivers/media/platform/coda/coda-common.c
new file mode 100644
index 000000000000..ced47609f5ef
--- /dev/null
+++ b/drivers/media/platform/coda/coda-common.c
@@ -0,0 +1,2052 @@
1/*
2 * Coda multi-standard codec IP
3 *
4 * Copyright (C) 2012 Vista Silicon S.L.
5 * Javier Martin, <javier.martin@vista-silicon.com>
6 * Xavier Duret
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#include <linux/clk.h>
15#include <linux/debugfs.h>
16#include <linux/delay.h>
17#include <linux/firmware.h>
18#include <linux/genalloc.h>
19#include <linux/interrupt.h>
20#include <linux/io.h>
21#include <linux/irq.h>
22#include <linux/kfifo.h>
23#include <linux/module.h>
24#include <linux/of_device.h>
25#include <linux/platform_device.h>
26#include <linux/pm_runtime.h>
27#include <linux/slab.h>
28#include <linux/videodev2.h>
29#include <linux/of.h>
30#include <linux/platform_data/coda.h>
31#include <linux/reset.h>
32
33#include <media/v4l2-ctrls.h>
34#include <media/v4l2-device.h>
35#include <media/v4l2-event.h>
36#include <media/v4l2-ioctl.h>
37#include <media/v4l2-mem2mem.h>
38#include <media/videobuf2-core.h>
39#include <media/videobuf2-dma-contig.h>
40
41#include "coda.h"
42
43#define CODA_NAME "coda"
44
45#define CODADX6_MAX_INSTANCES 4
46
47#define CODA_PARA_BUF_SIZE (10 * 1024)
48#define CODA_ISRAM_SIZE (2048 * 2)
49
50#define MIN_W 176
51#define MIN_H 144
52
53#define S_ALIGN 1 /* multiple of 2 */
54#define W_ALIGN 1 /* multiple of 2 */
55#define H_ALIGN 1 /* multiple of 2 */
56
57#define fh_to_ctx(__fh) container_of(__fh, struct coda_ctx, fh)
58
59int coda_debug;
60module_param(coda_debug, int, 0644);
61MODULE_PARM_DESC(coda_debug, "Debug level (0-2)");
62
63struct coda_fmt {
64 char *name;
65 u32 fourcc;
66};
67
68void coda_write(struct coda_dev *dev, u32 data, u32 reg)
69{
70 v4l2_dbg(2, coda_debug, &dev->v4l2_dev,
71 "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
72 writel(data, dev->regs_base + reg);
73}
74
75unsigned int coda_read(struct coda_dev *dev, u32 reg)
76{
77 u32 data;
78
79 data = readl(dev->regs_base + reg);
80 v4l2_dbg(2, coda_debug, &dev->v4l2_dev,
81 "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
82 return data;
83}
84
85/*
86 * Array of all formats supported by any version of Coda:
87 */
88static const struct coda_fmt coda_formats[] = {
89 {
90 .name = "YUV 4:2:0 Planar, YCbCr",
91 .fourcc = V4L2_PIX_FMT_YUV420,
92 },
93 {
94 .name = "YUV 4:2:0 Planar, YCrCb",
95 .fourcc = V4L2_PIX_FMT_YVU420,
96 },
97 {
98 .name = "H264 Encoded Stream",
99 .fourcc = V4L2_PIX_FMT_H264,
100 },
101 {
102 .name = "MPEG4 Encoded Stream",
103 .fourcc = V4L2_PIX_FMT_MPEG4,
104 },
105};
106
107#define CODA_CODEC(mode, src_fourcc, dst_fourcc, max_w, max_h) \
108 { mode, src_fourcc, dst_fourcc, max_w, max_h }
109
110/*
111 * Arrays of codecs supported by each given version of Coda:
112 * i.MX27 -> codadx6
113 * i.MX5x -> coda7
114 * i.MX6 -> coda960
115 * Use V4L2_PIX_FMT_YUV420 as placeholder for all supported YUV 4:2:0 variants
116 */
117static const struct coda_codec codadx6_codecs[] = {
118 CODA_CODEC(CODADX6_MODE_ENCODE_H264, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_H264, 720, 576),
119 CODA_CODEC(CODADX6_MODE_ENCODE_MP4, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_MPEG4, 720, 576),
120};
121
122static const struct coda_codec coda7_codecs[] = {
123 CODA_CODEC(CODA7_MODE_ENCODE_H264, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_H264, 1280, 720),
124 CODA_CODEC(CODA7_MODE_ENCODE_MP4, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_MPEG4, 1280, 720),
125 CODA_CODEC(CODA7_MODE_DECODE_H264, V4L2_PIX_FMT_H264, V4L2_PIX_FMT_YUV420, 1920, 1088),
126 CODA_CODEC(CODA7_MODE_DECODE_MP4, V4L2_PIX_FMT_MPEG4, V4L2_PIX_FMT_YUV420, 1920, 1088),
127};
128
129static const struct coda_codec coda9_codecs[] = {
130 CODA_CODEC(CODA9_MODE_ENCODE_H264, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_H264, 1920, 1088),
131 CODA_CODEC(CODA9_MODE_ENCODE_MP4, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_MPEG4, 1920, 1088),
132 CODA_CODEC(CODA9_MODE_DECODE_H264, V4L2_PIX_FMT_H264, V4L2_PIX_FMT_YUV420, 1920, 1088),
133 CODA_CODEC(CODA9_MODE_DECODE_MP4, V4L2_PIX_FMT_MPEG4, V4L2_PIX_FMT_YUV420, 1920, 1088),
134};
135
136static bool coda_format_is_yuv(u32 fourcc)
137{
138 switch (fourcc) {
139 case V4L2_PIX_FMT_YUV420:
140 case V4L2_PIX_FMT_YVU420:
141 return true;
142 default:
143 return false;
144 }
145}
146
147/*
148 * Normalize all supported YUV 4:2:0 formats to the value used in the codec
149 * tables.
150 */
151static u32 coda_format_normalize_yuv(u32 fourcc)
152{
153 return coda_format_is_yuv(fourcc) ? V4L2_PIX_FMT_YUV420 : fourcc;
154}
155
156static const struct coda_codec *coda_find_codec(struct coda_dev *dev,
157 int src_fourcc, int dst_fourcc)
158{
159 const struct coda_codec *codecs = dev->devtype->codecs;
160 int num_codecs = dev->devtype->num_codecs;
161 int k;
162
163 src_fourcc = coda_format_normalize_yuv(src_fourcc);
164 dst_fourcc = coda_format_normalize_yuv(dst_fourcc);
165 if (src_fourcc == dst_fourcc)
166 return NULL;
167
168 for (k = 0; k < num_codecs; k++) {
169 if (codecs[k].src_fourcc == src_fourcc &&
170 codecs[k].dst_fourcc == dst_fourcc)
171 break;
172 }
173
174 if (k == num_codecs)
175 return NULL;
176
177 return &codecs[k];
178}
179
180static void coda_get_max_dimensions(struct coda_dev *dev,
181 const struct coda_codec *codec,
182 int *max_w, int *max_h)
183{
184 const struct coda_codec *codecs = dev->devtype->codecs;
185 int num_codecs = dev->devtype->num_codecs;
186 unsigned int w, h;
187 int k;
188
189 if (codec) {
190 w = codec->max_w;
191 h = codec->max_h;
192 } else {
193 for (k = 0, w = 0, h = 0; k < num_codecs; k++) {
194 w = max(w, codecs[k].max_w);
195 h = max(h, codecs[k].max_h);
196 }
197 }
198
199 if (max_w)
200 *max_w = w;
201 if (max_h)
202 *max_h = h;
203}
204
205const char *coda_product_name(int product)
206{
207 static char buf[9];
208
209 switch (product) {
210 case CODA_DX6:
211 return "CodaDx6";
212 case CODA_7541:
213 return "CODA7541";
214 case CODA_960:
215 return "CODA960";
216 default:
217 snprintf(buf, sizeof(buf), "(0x%04x)", product);
218 return buf;
219 }
220}
221
222/*
223 * V4L2 ioctl() operations.
224 */
225static int coda_querycap(struct file *file, void *priv,
226 struct v4l2_capability *cap)
227{
228 struct coda_ctx *ctx = fh_to_ctx(priv);
229
230 strlcpy(cap->driver, CODA_NAME, sizeof(cap->driver));
231 strlcpy(cap->card, coda_product_name(ctx->dev->devtype->product),
232 sizeof(cap->card));
233 strlcpy(cap->bus_info, "platform:" CODA_NAME, sizeof(cap->bus_info));
234 cap->device_caps = V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING;
235 cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
236
237 return 0;
238}
239
240static int coda_enum_fmt(struct file *file, void *priv,
241 struct v4l2_fmtdesc *f)
242{
243 struct coda_ctx *ctx = fh_to_ctx(priv);
244 const struct coda_codec *codecs = ctx->dev->devtype->codecs;
245 const struct coda_fmt *formats = coda_formats;
246 const struct coda_fmt *fmt;
247 int num_codecs = ctx->dev->devtype->num_codecs;
248 int num_formats = ARRAY_SIZE(coda_formats);
249 int i, k, num = 0;
250 bool yuv;
251
252 if (ctx->inst_type == CODA_INST_ENCODER)
253 yuv = (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT);
254 else
255 yuv = (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE);
256
257 for (i = 0; i < num_formats; i++) {
258 /* Skip either raw or compressed formats */
259 if (yuv != coda_format_is_yuv(formats[i].fourcc))
260 continue;
261 /* All uncompressed formats are always supported */
262 if (yuv) {
263 if (num == f->index)
264 break;
265 ++num;
266 continue;
267 }
268 /* Compressed formats may be supported, check the codec list */
269 for (k = 0; k < num_codecs; k++) {
270 if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE &&
271 formats[i].fourcc == codecs[k].dst_fourcc)
272 break;
273 if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT &&
274 formats[i].fourcc == codecs[k].src_fourcc)
275 break;
276 }
277 if (k < num_codecs) {
278 if (num == f->index)
279 break;
280 ++num;
281 }
282 }
283
284 if (i < num_formats) {
285 fmt = &formats[i];
286 strlcpy(f->description, fmt->name, sizeof(f->description));
287 f->pixelformat = fmt->fourcc;
288 if (!yuv)
289 f->flags |= V4L2_FMT_FLAG_COMPRESSED;
290 return 0;
291 }
292
293 /* Format not found */
294 return -EINVAL;
295}
296
297static int coda_g_fmt(struct file *file, void *priv,
298 struct v4l2_format *f)
299{
300 struct coda_q_data *q_data;
301 struct coda_ctx *ctx = fh_to_ctx(priv);
302
303 q_data = get_q_data(ctx, f->type);
304 if (!q_data)
305 return -EINVAL;
306
307 f->fmt.pix.field = V4L2_FIELD_NONE;
308 f->fmt.pix.pixelformat = q_data->fourcc;
309 f->fmt.pix.width = q_data->width;
310 f->fmt.pix.height = q_data->height;
311 f->fmt.pix.bytesperline = q_data->bytesperline;
312
313 f->fmt.pix.sizeimage = q_data->sizeimage;
314 f->fmt.pix.colorspace = ctx->colorspace;
315
316 return 0;
317}
318
319static int coda_try_fmt(struct coda_ctx *ctx, const struct coda_codec *codec,
320 struct v4l2_format *f)
321{
322 struct coda_dev *dev = ctx->dev;
323 struct coda_q_data *q_data;
324 unsigned int max_w, max_h;
325 enum v4l2_field field;
326
327 field = f->fmt.pix.field;
328 if (field == V4L2_FIELD_ANY)
329 field = V4L2_FIELD_NONE;
330 else if (V4L2_FIELD_NONE != field)
331 return -EINVAL;
332
333 /* V4L2 specification suggests the driver corrects the format struct
334 * if any of the dimensions is unsupported */
335 f->fmt.pix.field = field;
336
337 coda_get_max_dimensions(dev, codec, &max_w, &max_h);
338 v4l_bound_align_image(&f->fmt.pix.width, MIN_W, max_w, W_ALIGN,
339 &f->fmt.pix.height, MIN_H, max_h, H_ALIGN,
340 S_ALIGN);
341
342 switch (f->fmt.pix.pixelformat) {
343 case V4L2_PIX_FMT_YUV420:
344 case V4L2_PIX_FMT_YVU420:
345 case V4L2_PIX_FMT_H264:
346 case V4L2_PIX_FMT_MPEG4:
347 case V4L2_PIX_FMT_JPEG:
348 break;
349 default:
350 q_data = get_q_data(ctx, f->type);
351 if (!q_data)
352 return -EINVAL;
353 f->fmt.pix.pixelformat = q_data->fourcc;
354 }
355
356 switch (f->fmt.pix.pixelformat) {
357 case V4L2_PIX_FMT_YUV420:
358 case V4L2_PIX_FMT_YVU420:
359 /* Frame stride must be multiple of 8, but 16 for h.264 */
360 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 16);
361 f->fmt.pix.sizeimage = f->fmt.pix.bytesperline *
362 f->fmt.pix.height * 3 / 2;
363 break;
364 case V4L2_PIX_FMT_H264:
365 case V4L2_PIX_FMT_MPEG4:
366 case V4L2_PIX_FMT_JPEG:
367 f->fmt.pix.bytesperline = 0;
368 f->fmt.pix.sizeimage = CODA_MAX_FRAME_SIZE;
369 break;
370 default:
371 BUG();
372 }
373
374 return 0;
375}
376
377static int coda_try_fmt_vid_cap(struct file *file, void *priv,
378 struct v4l2_format *f)
379{
380 struct coda_ctx *ctx = fh_to_ctx(priv);
381 const struct coda_codec *codec = NULL;
382 struct vb2_queue *src_vq;
383 int ret;
384
385 /*
386 * If the source format is already fixed, try to find a codec that
387 * converts to the given destination format
388 */
389 src_vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
390 if (vb2_is_streaming(src_vq)) {
391 struct coda_q_data *q_data_src;
392
393 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
394 codec = coda_find_codec(ctx->dev, q_data_src->fourcc,
395 f->fmt.pix.pixelformat);
396 if (!codec)
397 return -EINVAL;
398
399 f->fmt.pix.width = q_data_src->width;
400 f->fmt.pix.height = q_data_src->height;
401 } else {
402 /* Otherwise determine codec by encoded format, if possible */
403 codec = coda_find_codec(ctx->dev, V4L2_PIX_FMT_YUV420,
404 f->fmt.pix.pixelformat);
405 }
406
407 f->fmt.pix.colorspace = ctx->colorspace;
408
409 ret = coda_try_fmt(ctx, codec, f);
410 if (ret < 0)
411 return ret;
412
413 /* The h.264 decoder only returns complete 16x16 macroblocks */
414 if (codec && codec->src_fourcc == V4L2_PIX_FMT_H264) {
415 f->fmt.pix.width = f->fmt.pix.width;
416 f->fmt.pix.height = round_up(f->fmt.pix.height, 16);
417 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 16);
418 f->fmt.pix.sizeimage = f->fmt.pix.bytesperline *
419 f->fmt.pix.height * 3 / 2;
420 }
421
422 return 0;
423}
424
425static int coda_try_fmt_vid_out(struct file *file, void *priv,
426 struct v4l2_format *f)
427{
428 struct coda_ctx *ctx = fh_to_ctx(priv);
429 const struct coda_codec *codec = NULL;
430
431 /* Determine codec by encoded format, returns NULL if raw or invalid */
432 if (ctx->inst_type == CODA_INST_DECODER) {
433 codec = coda_find_codec(ctx->dev, f->fmt.pix.pixelformat,
434 V4L2_PIX_FMT_YUV420);
435 if (!codec)
436 codec = coda_find_codec(ctx->dev, V4L2_PIX_FMT_H264,
437 V4L2_PIX_FMT_YUV420);
438 if (!codec)
439 return -EINVAL;
440 }
441
442 if (!f->fmt.pix.colorspace)
443 f->fmt.pix.colorspace = V4L2_COLORSPACE_REC709;
444
445 return coda_try_fmt(ctx, codec, f);
446}
447
448static int coda_s_fmt(struct coda_ctx *ctx, struct v4l2_format *f)
449{
450 struct coda_q_data *q_data;
451 struct vb2_queue *vq;
452
453 vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type);
454 if (!vq)
455 return -EINVAL;
456
457 q_data = get_q_data(ctx, f->type);
458 if (!q_data)
459 return -EINVAL;
460
461 if (vb2_is_busy(vq)) {
462 v4l2_err(&ctx->dev->v4l2_dev, "%s queue busy\n", __func__);
463 return -EBUSY;
464 }
465
466 q_data->fourcc = f->fmt.pix.pixelformat;
467 q_data->width = f->fmt.pix.width;
468 q_data->height = f->fmt.pix.height;
469 q_data->bytesperline = f->fmt.pix.bytesperline;
470 q_data->sizeimage = f->fmt.pix.sizeimage;
471 q_data->rect.left = 0;
472 q_data->rect.top = 0;
473 q_data->rect.width = f->fmt.pix.width;
474 q_data->rect.height = f->fmt.pix.height;
475
476 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
477 "Setting format for type %d, wxh: %dx%d, fmt: %d\n",
478 f->type, q_data->width, q_data->height, q_data->fourcc);
479
480 return 0;
481}
482
483static int coda_s_fmt_vid_cap(struct file *file, void *priv,
484 struct v4l2_format *f)
485{
486 struct coda_ctx *ctx = fh_to_ctx(priv);
487 int ret;
488
489 ret = coda_try_fmt_vid_cap(file, priv, f);
490 if (ret)
491 return ret;
492
493 return coda_s_fmt(ctx, f);
494}
495
496static int coda_s_fmt_vid_out(struct file *file, void *priv,
497 struct v4l2_format *f)
498{
499 struct coda_ctx *ctx = fh_to_ctx(priv);
500 struct v4l2_format f_cap;
501 int ret;
502
503 ret = coda_try_fmt_vid_out(file, priv, f);
504 if (ret)
505 return ret;
506
507 ret = coda_s_fmt(ctx, f);
508 if (ret)
509 return ret;
510
511 ctx->colorspace = f->fmt.pix.colorspace;
512
513 f_cap.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
514 coda_g_fmt(file, priv, &f_cap);
515 f_cap.fmt.pix.width = f->fmt.pix.width;
516 f_cap.fmt.pix.height = f->fmt.pix.height;
517
518 ret = coda_try_fmt_vid_cap(file, priv, &f_cap);
519 if (ret)
520 return ret;
521
522 return coda_s_fmt(ctx, &f_cap);
523}
524
525static int coda_qbuf(struct file *file, void *priv,
526 struct v4l2_buffer *buf)
527{
528 struct coda_ctx *ctx = fh_to_ctx(priv);
529
530 return v4l2_m2m_qbuf(file, ctx->fh.m2m_ctx, buf);
531}
532
533static bool coda_buf_is_end_of_stream(struct coda_ctx *ctx,
534 struct v4l2_buffer *buf)
535{
536 struct vb2_queue *src_vq;
537
538 src_vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
539
540 return ((ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG) &&
541 (buf->sequence == (ctx->qsequence - 1)));
542}
543
544static int coda_dqbuf(struct file *file, void *priv,
545 struct v4l2_buffer *buf)
546{
547 struct coda_ctx *ctx = fh_to_ctx(priv);
548 int ret;
549
550 ret = v4l2_m2m_dqbuf(file, ctx->fh.m2m_ctx, buf);
551
552 /* If this is the last capture buffer, emit an end-of-stream event */
553 if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE &&
554 coda_buf_is_end_of_stream(ctx, buf)) {
555 const struct v4l2_event eos_event = {
556 .type = V4L2_EVENT_EOS
557 };
558
559 v4l2_event_queue_fh(&ctx->fh, &eos_event);
560 }
561
562 return ret;
563}
564
565static int coda_g_selection(struct file *file, void *fh,
566 struct v4l2_selection *s)
567{
568 struct coda_ctx *ctx = fh_to_ctx(fh);
569 struct coda_q_data *q_data;
570 struct v4l2_rect r, *rsel;
571
572 q_data = get_q_data(ctx, s->type);
573 if (!q_data)
574 return -EINVAL;
575
576 r.left = 0;
577 r.top = 0;
578 r.width = q_data->width;
579 r.height = q_data->height;
580 rsel = &q_data->rect;
581
582 switch (s->target) {
583 case V4L2_SEL_TGT_CROP_DEFAULT:
584 case V4L2_SEL_TGT_CROP_BOUNDS:
585 rsel = &r;
586 /* fallthrough */
587 case V4L2_SEL_TGT_CROP:
588 if (s->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
589 return -EINVAL;
590 break;
591 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
592 case V4L2_SEL_TGT_COMPOSE_PADDED:
593 rsel = &r;
594 /* fallthrough */
595 case V4L2_SEL_TGT_COMPOSE:
596 case V4L2_SEL_TGT_COMPOSE_DEFAULT:
597 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
598 return -EINVAL;
599 break;
600 default:
601 return -EINVAL;
602 }
603
604 s->r = *rsel;
605
606 return 0;
607}
608
609static int coda_try_decoder_cmd(struct file *file, void *fh,
610 struct v4l2_decoder_cmd *dc)
611{
612 if (dc->cmd != V4L2_DEC_CMD_STOP)
613 return -EINVAL;
614
615 if (dc->flags & V4L2_DEC_CMD_STOP_TO_BLACK)
616 return -EINVAL;
617
618 if (!(dc->flags & V4L2_DEC_CMD_STOP_IMMEDIATELY) && (dc->stop.pts != 0))
619 return -EINVAL;
620
621 return 0;
622}
623
624static int coda_decoder_cmd(struct file *file, void *fh,
625 struct v4l2_decoder_cmd *dc)
626{
627 struct coda_ctx *ctx = fh_to_ctx(fh);
628 int ret;
629
630 ret = coda_try_decoder_cmd(file, fh, dc);
631 if (ret < 0)
632 return ret;
633
634 /* Ignore decoder stop command silently in encoder context */
635 if (ctx->inst_type != CODA_INST_DECODER)
636 return 0;
637
638 /* Set the stream-end flag on this context */
639 coda_bit_stream_end_flag(ctx);
640 ctx->hold = false;
641 v4l2_m2m_try_schedule(ctx->fh.m2m_ctx);
642
643 return 0;
644}
645
646static int coda_subscribe_event(struct v4l2_fh *fh,
647 const struct v4l2_event_subscription *sub)
648{
649 switch (sub->type) {
650 case V4L2_EVENT_EOS:
651 return v4l2_event_subscribe(fh, sub, 0, NULL);
652 default:
653 return v4l2_ctrl_subscribe_event(fh, sub);
654 }
655}
656
657static const struct v4l2_ioctl_ops coda_ioctl_ops = {
658 .vidioc_querycap = coda_querycap,
659
660 .vidioc_enum_fmt_vid_cap = coda_enum_fmt,
661 .vidioc_g_fmt_vid_cap = coda_g_fmt,
662 .vidioc_try_fmt_vid_cap = coda_try_fmt_vid_cap,
663 .vidioc_s_fmt_vid_cap = coda_s_fmt_vid_cap,
664
665 .vidioc_enum_fmt_vid_out = coda_enum_fmt,
666 .vidioc_g_fmt_vid_out = coda_g_fmt,
667 .vidioc_try_fmt_vid_out = coda_try_fmt_vid_out,
668 .vidioc_s_fmt_vid_out = coda_s_fmt_vid_out,
669
670 .vidioc_reqbufs = v4l2_m2m_ioctl_reqbufs,
671 .vidioc_querybuf = v4l2_m2m_ioctl_querybuf,
672
673 .vidioc_qbuf = coda_qbuf,
674 .vidioc_expbuf = v4l2_m2m_ioctl_expbuf,
675 .vidioc_dqbuf = coda_dqbuf,
676 .vidioc_create_bufs = v4l2_m2m_ioctl_create_bufs,
677
678 .vidioc_streamon = v4l2_m2m_ioctl_streamon,
679 .vidioc_streamoff = v4l2_m2m_ioctl_streamoff,
680
681 .vidioc_g_selection = coda_g_selection,
682
683 .vidioc_try_decoder_cmd = coda_try_decoder_cmd,
684 .vidioc_decoder_cmd = coda_decoder_cmd,
685
686 .vidioc_subscribe_event = coda_subscribe_event,
687 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
688};
689
690void coda_set_gdi_regs(struct coda_ctx *ctx)
691{
692 struct gdi_tiled_map *tiled_map = &ctx->tiled_map;
693 struct coda_dev *dev = ctx->dev;
694 int i;
695
696 for (i = 0; i < 16; i++)
697 coda_write(dev, tiled_map->xy2ca_map[i],
698 CODA9_GDI_XY2_CAS_0 + 4 * i);
699 for (i = 0; i < 4; i++)
700 coda_write(dev, tiled_map->xy2ba_map[i],
701 CODA9_GDI_XY2_BA_0 + 4 * i);
702 for (i = 0; i < 16; i++)
703 coda_write(dev, tiled_map->xy2ra_map[i],
704 CODA9_GDI_XY2_RAS_0 + 4 * i);
705 coda_write(dev, tiled_map->xy2rbc_config, CODA9_GDI_XY2_RBC_CONFIG);
706 for (i = 0; i < 32; i++)
707 coda_write(dev, tiled_map->rbc2axi_map[i],
708 CODA9_GDI_RBC2_AXI_0 + 4 * i);
709}
710
711/*
712 * Mem-to-mem operations.
713 */
714
715static void coda_device_run(void *m2m_priv)
716{
717 struct coda_ctx *ctx = m2m_priv;
718 struct coda_dev *dev = ctx->dev;
719
720 queue_work(dev->workqueue, &ctx->pic_run_work);
721}
722
723static void coda_pic_run_work(struct work_struct *work)
724{
725 struct coda_ctx *ctx = container_of(work, struct coda_ctx, pic_run_work);
726 struct coda_dev *dev = ctx->dev;
727 int ret;
728
729 mutex_lock(&ctx->buffer_mutex);
730 mutex_lock(&dev->coda_mutex);
731
732 ret = ctx->ops->prepare_run(ctx);
733 if (ret < 0 && ctx->inst_type == CODA_INST_DECODER) {
734 mutex_unlock(&dev->coda_mutex);
735 mutex_unlock(&ctx->buffer_mutex);
736 /* job_finish scheduled by prepare_decode */
737 return;
738 }
739
740 if (!wait_for_completion_timeout(&ctx->completion,
741 msecs_to_jiffies(1000))) {
742 dev_err(&dev->plat_dev->dev, "CODA PIC_RUN timeout\n");
743
744 ctx->hold = true;
745
746 coda_hw_reset(ctx);
747 } else if (!ctx->aborting) {
748 ctx->ops->finish_run(ctx);
749 }
750
751 if (ctx->aborting || (!ctx->streamon_cap && !ctx->streamon_out))
752 queue_work(dev->workqueue, &ctx->seq_end_work);
753
754 mutex_unlock(&dev->coda_mutex);
755 mutex_unlock(&ctx->buffer_mutex);
756
757 v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx);
758}
759
760static int coda_job_ready(void *m2m_priv)
761{
762 struct coda_ctx *ctx = m2m_priv;
763
764 /*
765 * For both 'P' and 'key' frame cases 1 picture
766 * and 1 frame are needed. In the decoder case,
767 * the compressed frame can be in the bitstream.
768 */
769 if (!v4l2_m2m_num_src_bufs_ready(ctx->fh.m2m_ctx) &&
770 ctx->inst_type != CODA_INST_DECODER) {
771 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
772 "not ready: not enough video buffers.\n");
773 return 0;
774 }
775
776 if (!v4l2_m2m_num_dst_bufs_ready(ctx->fh.m2m_ctx)) {
777 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
778 "not ready: not enough video capture buffers.\n");
779 return 0;
780 }
781
782 if (ctx->hold ||
783 ((ctx->inst_type == CODA_INST_DECODER) &&
784 (coda_get_bitstream_payload(ctx) < 512) &&
785 !(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))) {
786 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
787 "%d: not ready: not enough bitstream data.\n",
788 ctx->idx);
789 return 0;
790 }
791
792 if (ctx->aborting) {
793 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
794 "not ready: aborting\n");
795 return 0;
796 }
797
798 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
799 "job ready\n");
800 return 1;
801}
802
803static void coda_job_abort(void *priv)
804{
805 struct coda_ctx *ctx = priv;
806
807 ctx->aborting = 1;
808
809 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
810 "Aborting task\n");
811}
812
813static void coda_lock(void *m2m_priv)
814{
815 struct coda_ctx *ctx = m2m_priv;
816 struct coda_dev *pcdev = ctx->dev;
817
818 mutex_lock(&pcdev->dev_mutex);
819}
820
821static void coda_unlock(void *m2m_priv)
822{
823 struct coda_ctx *ctx = m2m_priv;
824 struct coda_dev *pcdev = ctx->dev;
825
826 mutex_unlock(&pcdev->dev_mutex);
827}
828
829static const struct v4l2_m2m_ops coda_m2m_ops = {
830 .device_run = coda_device_run,
831 .job_ready = coda_job_ready,
832 .job_abort = coda_job_abort,
833 .lock = coda_lock,
834 .unlock = coda_unlock,
835};
836
837static void coda_set_tiled_map_type(struct coda_ctx *ctx, int tiled_map_type)
838{
839 struct gdi_tiled_map *tiled_map = &ctx->tiled_map;
840 int luma_map, chro_map, i;
841
842 memset(tiled_map, 0, sizeof(*tiled_map));
843
844 luma_map = 64;
845 chro_map = 64;
846 tiled_map->map_type = tiled_map_type;
847 for (i = 0; i < 16; i++)
848 tiled_map->xy2ca_map[i] = luma_map << 8 | chro_map;
849 for (i = 0; i < 4; i++)
850 tiled_map->xy2ba_map[i] = luma_map << 8 | chro_map;
851 for (i = 0; i < 16; i++)
852 tiled_map->xy2ra_map[i] = luma_map << 8 | chro_map;
853
854 if (tiled_map_type == GDI_LINEAR_FRAME_MAP) {
855 tiled_map->xy2rbc_config = 0;
856 } else {
857 dev_err(&ctx->dev->plat_dev->dev, "invalid map type: %d\n",
858 tiled_map_type);
859 return;
860 }
861}
862
863static void set_default_params(struct coda_ctx *ctx)
864{
865 u32 src_fourcc, dst_fourcc;
866 int max_w;
867 int max_h;
868
869 if (ctx->inst_type == CODA_INST_ENCODER) {
870 src_fourcc = V4L2_PIX_FMT_YUV420;
871 dst_fourcc = V4L2_PIX_FMT_H264;
872 } else {
873 src_fourcc = V4L2_PIX_FMT_H264;
874 dst_fourcc = V4L2_PIX_FMT_YUV420;
875 }
876 ctx->codec = coda_find_codec(ctx->dev, src_fourcc, dst_fourcc);
877 max_w = ctx->codec->max_w;
878 max_h = ctx->codec->max_h;
879
880 ctx->params.codec_mode = ctx->codec->mode;
881 ctx->colorspace = V4L2_COLORSPACE_REC709;
882 ctx->params.framerate = 30;
883 ctx->aborting = 0;
884
885 /* Default formats for output and input queues */
886 ctx->q_data[V4L2_M2M_SRC].fourcc = ctx->codec->src_fourcc;
887 ctx->q_data[V4L2_M2M_DST].fourcc = ctx->codec->dst_fourcc;
888 ctx->q_data[V4L2_M2M_SRC].width = max_w;
889 ctx->q_data[V4L2_M2M_SRC].height = max_h;
890 ctx->q_data[V4L2_M2M_DST].width = max_w;
891 ctx->q_data[V4L2_M2M_DST].height = max_h;
892 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_YUV420) {
893 ctx->q_data[V4L2_M2M_SRC].bytesperline = max_w;
894 ctx->q_data[V4L2_M2M_SRC].sizeimage = (max_w * max_h * 3) / 2;
895 ctx->q_data[V4L2_M2M_DST].bytesperline = 0;
896 ctx->q_data[V4L2_M2M_DST].sizeimage = CODA_MAX_FRAME_SIZE;
897 } else {
898 ctx->q_data[V4L2_M2M_SRC].bytesperline = 0;
899 ctx->q_data[V4L2_M2M_SRC].sizeimage = CODA_MAX_FRAME_SIZE;
900 ctx->q_data[V4L2_M2M_DST].bytesperline = max_w;
901 ctx->q_data[V4L2_M2M_DST].sizeimage = (max_w * max_h * 3) / 2;
902 }
903 ctx->q_data[V4L2_M2M_SRC].rect.width = max_w;
904 ctx->q_data[V4L2_M2M_SRC].rect.height = max_h;
905 ctx->q_data[V4L2_M2M_DST].rect.width = max_w;
906 ctx->q_data[V4L2_M2M_DST].rect.height = max_h;
907
908 if (ctx->dev->devtype->product == CODA_960)
909 coda_set_tiled_map_type(ctx, GDI_LINEAR_FRAME_MAP);
910}
911
912/*
913 * Queue operations
914 */
915static int coda_queue_setup(struct vb2_queue *vq,
916 const struct v4l2_format *fmt,
917 unsigned int *nbuffers, unsigned int *nplanes,
918 unsigned int sizes[], void *alloc_ctxs[])
919{
920 struct coda_ctx *ctx = vb2_get_drv_priv(vq);
921 struct coda_q_data *q_data;
922 unsigned int size;
923
924 q_data = get_q_data(ctx, vq->type);
925 size = q_data->sizeimage;
926
927 *nplanes = 1;
928 sizes[0] = size;
929
930 alloc_ctxs[0] = ctx->dev->alloc_ctx;
931
932 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
933 "get %d buffer(s) of size %d each.\n", *nbuffers, size);
934
935 return 0;
936}
937
938static int coda_buf_prepare(struct vb2_buffer *vb)
939{
940 struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
941 struct coda_q_data *q_data;
942
943 q_data = get_q_data(ctx, vb->vb2_queue->type);
944
945 if (vb2_plane_size(vb, 0) < q_data->sizeimage) {
946 v4l2_warn(&ctx->dev->v4l2_dev,
947 "%s data will not fit into plane (%lu < %lu)\n",
948 __func__, vb2_plane_size(vb, 0),
949 (long)q_data->sizeimage);
950 return -EINVAL;
951 }
952
953 return 0;
954}
955
956static void coda_buf_queue(struct vb2_buffer *vb)
957{
958 struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
959 struct coda_q_data *q_data;
960
961 q_data = get_q_data(ctx, vb->vb2_queue->type);
962
963 /*
964 * In the decoder case, immediately try to copy the buffer into the
965 * bitstream ringbuffer and mark it as ready to be dequeued.
966 */
967 if (q_data->fourcc == V4L2_PIX_FMT_H264 &&
968 vb->vb2_queue->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
969 /*
970 * For backwards compatibility, queuing an empty buffer marks
971 * the stream end
972 */
973 if (vb2_get_plane_payload(vb, 0) == 0)
974 coda_bit_stream_end_flag(ctx);
975 mutex_lock(&ctx->bitstream_mutex);
976 v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vb);
977 if (vb2_is_streaming(vb->vb2_queue))
978 coda_fill_bitstream(ctx);
979 mutex_unlock(&ctx->bitstream_mutex);
980 } else {
981 v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vb);
982 }
983}
984
985int coda_alloc_aux_buf(struct coda_dev *dev, struct coda_aux_buf *buf,
986 size_t size, const char *name, struct dentry *parent)
987{
988 buf->vaddr = dma_alloc_coherent(&dev->plat_dev->dev, size, &buf->paddr,
989 GFP_KERNEL);
990 if (!buf->vaddr) {
991 v4l2_err(&dev->v4l2_dev,
992 "Failed to allocate %s buffer of size %u\n",
993 name, size);
994 return -ENOMEM;
995 }
996
997 buf->size = size;
998
999 if (name && parent) {
1000 buf->blob.data = buf->vaddr;
1001 buf->blob.size = size;
1002 buf->dentry = debugfs_create_blob(name, 0644, parent,
1003 &buf->blob);
1004 if (!buf->dentry)
1005 dev_warn(&dev->plat_dev->dev,
1006 "failed to create debugfs entry %s\n", name);
1007 }
1008
1009 return 0;
1010}
1011
1012void coda_free_aux_buf(struct coda_dev *dev,
1013 struct coda_aux_buf *buf)
1014{
1015 if (buf->vaddr) {
1016 dma_free_coherent(&dev->plat_dev->dev, buf->size,
1017 buf->vaddr, buf->paddr);
1018 buf->vaddr = NULL;
1019 buf->size = 0;
1020 }
1021 debugfs_remove(buf->dentry);
1022}
1023
1024static int coda_start_streaming(struct vb2_queue *q, unsigned int count)
1025{
1026 struct coda_ctx *ctx = vb2_get_drv_priv(q);
1027 struct v4l2_device *v4l2_dev = &ctx->dev->v4l2_dev;
1028 struct coda_q_data *q_data_src, *q_data_dst;
1029 struct vb2_buffer *buf;
1030 u32 dst_fourcc;
1031 int ret = 0;
1032
1033 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1034 if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
1035 if (q_data_src->fourcc == V4L2_PIX_FMT_H264) {
1036 /* copy the buffers that where queued before streamon */
1037 mutex_lock(&ctx->bitstream_mutex);
1038 coda_fill_bitstream(ctx);
1039 mutex_unlock(&ctx->bitstream_mutex);
1040
1041 if (coda_get_bitstream_payload(ctx) < 512) {
1042 ret = -EINVAL;
1043 goto err;
1044 }
1045 } else {
1046 if (count < 1) {
1047 ret = -EINVAL;
1048 goto err;
1049 }
1050 }
1051
1052 ctx->streamon_out = 1;
1053 } else {
1054 if (count < 1) {
1055 ret = -EINVAL;
1056 goto err;
1057 }
1058
1059 ctx->streamon_cap = 1;
1060 }
1061
1062 /* Don't start the coda unless both queues are on */
1063 if (!(ctx->streamon_out & ctx->streamon_cap))
1064 return 0;
1065
1066 /* Allow decoder device_run with no new buffers queued */
1067 if (ctx->inst_type == CODA_INST_DECODER)
1068 v4l2_m2m_set_src_buffered(ctx->fh.m2m_ctx, true);
1069
1070 ctx->gopcounter = ctx->params.gop_size - 1;
1071 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1072 dst_fourcc = q_data_dst->fourcc;
1073
1074 ctx->codec = coda_find_codec(ctx->dev, q_data_src->fourcc,
1075 q_data_dst->fourcc);
1076 if (!ctx->codec) {
1077 v4l2_err(v4l2_dev, "couldn't tell instance type.\n");
1078 ret = -EINVAL;
1079 goto err;
1080 }
1081
1082 ret = ctx->ops->start_streaming(ctx);
1083 if (ctx->inst_type == CODA_INST_DECODER) {
1084 if (ret == -EAGAIN)
1085 return 0;
1086 else if (ret < 0)
1087 goto err;
1088 }
1089
1090 ctx->initialized = 1;
1091 return ret;
1092
1093err:
1094 if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
1095 while ((buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx)))
1096 v4l2_m2m_buf_done(buf, VB2_BUF_STATE_DEQUEUED);
1097 } else {
1098 while ((buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx)))
1099 v4l2_m2m_buf_done(buf, VB2_BUF_STATE_DEQUEUED);
1100 }
1101 return ret;
1102}
1103
1104static void coda_stop_streaming(struct vb2_queue *q)
1105{
1106 struct coda_ctx *ctx = vb2_get_drv_priv(q);
1107 struct coda_dev *dev = ctx->dev;
1108 struct vb2_buffer *buf;
1109
1110 if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
1111 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1112 "%s: output\n", __func__);
1113 ctx->streamon_out = 0;
1114
1115 coda_bit_stream_end_flag(ctx);
1116
1117 ctx->isequence = 0;
1118
1119 while ((buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx)))
1120 v4l2_m2m_buf_done(buf, VB2_BUF_STATE_ERROR);
1121 } else {
1122 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1123 "%s: capture\n", __func__);
1124 ctx->streamon_cap = 0;
1125
1126 ctx->osequence = 0;
1127 ctx->sequence_offset = 0;
1128
1129 while ((buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx)))
1130 v4l2_m2m_buf_done(buf, VB2_BUF_STATE_ERROR);
1131 }
1132
1133 if (!ctx->streamon_out && !ctx->streamon_cap) {
1134 struct coda_timestamp *ts;
1135
1136 mutex_lock(&ctx->bitstream_mutex);
1137 while (!list_empty(&ctx->timestamp_list)) {
1138 ts = list_first_entry(&ctx->timestamp_list,
1139 struct coda_timestamp, list);
1140 list_del(&ts->list);
1141 kfree(ts);
1142 }
1143 mutex_unlock(&ctx->bitstream_mutex);
1144 kfifo_init(&ctx->bitstream_fifo,
1145 ctx->bitstream.vaddr, ctx->bitstream.size);
1146 ctx->runcounter = 0;
1147 }
1148}
1149
1150static const struct vb2_ops coda_qops = {
1151 .queue_setup = coda_queue_setup,
1152 .buf_prepare = coda_buf_prepare,
1153 .buf_queue = coda_buf_queue,
1154 .start_streaming = coda_start_streaming,
1155 .stop_streaming = coda_stop_streaming,
1156 .wait_prepare = vb2_ops_wait_prepare,
1157 .wait_finish = vb2_ops_wait_finish,
1158};
1159
1160static int coda_s_ctrl(struct v4l2_ctrl *ctrl)
1161{
1162 struct coda_ctx *ctx =
1163 container_of(ctrl->handler, struct coda_ctx, ctrls);
1164
1165 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1166 "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val);
1167
1168 switch (ctrl->id) {
1169 case V4L2_CID_HFLIP:
1170 if (ctrl->val)
1171 ctx->params.rot_mode |= CODA_MIR_HOR;
1172 else
1173 ctx->params.rot_mode &= ~CODA_MIR_HOR;
1174 break;
1175 case V4L2_CID_VFLIP:
1176 if (ctrl->val)
1177 ctx->params.rot_mode |= CODA_MIR_VER;
1178 else
1179 ctx->params.rot_mode &= ~CODA_MIR_VER;
1180 break;
1181 case V4L2_CID_MPEG_VIDEO_BITRATE:
1182 ctx->params.bitrate = ctrl->val / 1000;
1183 break;
1184 case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
1185 ctx->params.gop_size = ctrl->val;
1186 break;
1187 case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
1188 ctx->params.h264_intra_qp = ctrl->val;
1189 break;
1190 case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP:
1191 ctx->params.h264_inter_qp = ctrl->val;
1192 break;
1193 case V4L2_CID_MPEG_VIDEO_H264_MIN_QP:
1194 ctx->params.h264_min_qp = ctrl->val;
1195 break;
1196 case V4L2_CID_MPEG_VIDEO_H264_MAX_QP:
1197 ctx->params.h264_max_qp = ctrl->val;
1198 break;
1199 case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA:
1200 ctx->params.h264_deblk_alpha = ctrl->val;
1201 break;
1202 case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA:
1203 ctx->params.h264_deblk_beta = ctrl->val;
1204 break;
1205 case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE:
1206 ctx->params.h264_deblk_enabled = (ctrl->val ==
1207 V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED);
1208 break;
1209 case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP:
1210 ctx->params.mpeg4_intra_qp = ctrl->val;
1211 break;
1212 case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP:
1213 ctx->params.mpeg4_inter_qp = ctrl->val;
1214 break;
1215 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE:
1216 ctx->params.slice_mode = ctrl->val;
1217 break;
1218 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB:
1219 ctx->params.slice_max_mb = ctrl->val;
1220 break;
1221 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES:
1222 ctx->params.slice_max_bits = ctrl->val * 8;
1223 break;
1224 case V4L2_CID_MPEG_VIDEO_HEADER_MODE:
1225 break;
1226 case V4L2_CID_MPEG_VIDEO_CYCLIC_INTRA_REFRESH_MB:
1227 ctx->params.intra_refresh = ctrl->val;
1228 break;
1229 default:
1230 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1231 "Invalid control, id=%d, val=%d\n",
1232 ctrl->id, ctrl->val);
1233 return -EINVAL;
1234 }
1235
1236 return 0;
1237}
1238
1239static const struct v4l2_ctrl_ops coda_ctrl_ops = {
1240 .s_ctrl = coda_s_ctrl,
1241};
1242
1243static int coda_ctrls_setup(struct coda_ctx *ctx)
1244{
1245 v4l2_ctrl_handler_init(&ctx->ctrls, 9);
1246
1247 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1248 V4L2_CID_HFLIP, 0, 1, 1, 0);
1249 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1250 V4L2_CID_VFLIP, 0, 1, 1, 0);
1251 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1252 V4L2_CID_MPEG_VIDEO_BITRATE, 0, 32767000, 1, 0);
1253 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1254 V4L2_CID_MPEG_VIDEO_GOP_SIZE, 1, 60, 1, 16);
1255 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1256 V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, 0, 51, 1, 25);
1257 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1258 V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, 0, 51, 1, 25);
1259 if (ctx->dev->devtype->product != CODA_960) {
1260 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1261 V4L2_CID_MPEG_VIDEO_H264_MIN_QP, 0, 51, 1, 12);
1262 }
1263 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1264 V4L2_CID_MPEG_VIDEO_H264_MAX_QP, 0, 51, 1, 51);
1265 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1266 V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA, 0, 15, 1, 0);
1267 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1268 V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA, 0, 15, 1, 0);
1269 v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
1270 V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE,
1271 V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED, 0x0,
1272 V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED);
1273 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1274 V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP, 1, 31, 1, 2);
1275 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1276 V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP, 1, 31, 1, 2);
1277 v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
1278 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE,
1279 V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES, 0x0,
1280 V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE);
1281 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1282 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, 1, 0x3fffffff, 1, 1);
1283 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1284 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, 1, 0x3fffffff, 1,
1285 500);
1286 v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
1287 V4L2_CID_MPEG_VIDEO_HEADER_MODE,
1288 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
1289 (1 << V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE),
1290 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME);
1291 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1292 V4L2_CID_MPEG_VIDEO_CYCLIC_INTRA_REFRESH_MB, 0,
1293 1920 * 1088 / 256, 1, 0);
1294
1295 if (ctx->ctrls.error) {
1296 v4l2_err(&ctx->dev->v4l2_dev,
1297 "control initialization error (%d)",
1298 ctx->ctrls.error);
1299 return -EINVAL;
1300 }
1301
1302 return v4l2_ctrl_handler_setup(&ctx->ctrls);
1303}
1304
1305static int coda_queue_init(struct coda_ctx *ctx, struct vb2_queue *vq)
1306{
1307 vq->drv_priv = ctx;
1308 vq->ops = &coda_qops;
1309 vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
1310 vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
1311 vq->lock = &ctx->dev->dev_mutex;
1312
1313 return vb2_queue_init(vq);
1314}
1315
1316int coda_encoder_queue_init(void *priv, struct vb2_queue *src_vq,
1317 struct vb2_queue *dst_vq)
1318{
1319 int ret;
1320
1321 src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
1322 src_vq->io_modes = VB2_DMABUF | VB2_MMAP;
1323 src_vq->mem_ops = &vb2_dma_contig_memops;
1324
1325 ret = coda_queue_init(priv, src_vq);
1326 if (ret)
1327 return ret;
1328
1329 dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1330 dst_vq->io_modes = VB2_DMABUF | VB2_MMAP;
1331 dst_vq->mem_ops = &vb2_dma_contig_memops;
1332
1333 return coda_queue_init(priv, dst_vq);
1334}
1335
1336int coda_decoder_queue_init(void *priv, struct vb2_queue *src_vq,
1337 struct vb2_queue *dst_vq)
1338{
1339 int ret;
1340
1341 src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
1342 src_vq->io_modes = VB2_DMABUF | VB2_MMAP;
1343 src_vq->mem_ops = &vb2_dma_contig_memops;
1344
1345 ret = coda_queue_init(priv, src_vq);
1346 if (ret)
1347 return ret;
1348
1349 dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1350 dst_vq->io_modes = VB2_DMABUF | VB2_MMAP;
1351 dst_vq->mem_ops = &vb2_dma_contig_memops;
1352
1353 return coda_queue_init(priv, dst_vq);
1354}
1355
1356static int coda_next_free_instance(struct coda_dev *dev)
1357{
1358 int idx = ffz(dev->instance_mask);
1359
1360 if ((idx < 0) ||
1361 (dev->devtype->product == CODA_DX6 && idx > CODADX6_MAX_INSTANCES))
1362 return -EBUSY;
1363
1364 return idx;
1365}
1366
1367static int coda_open(struct file *file, enum coda_inst_type inst_type,
1368 const struct coda_context_ops *ctx_ops)
1369{
1370 struct coda_dev *dev = video_drvdata(file);
1371 struct coda_ctx *ctx = NULL;
1372 char *name;
1373 int ret;
1374 int idx;
1375
1376 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
1377 if (!ctx)
1378 return -ENOMEM;
1379
1380 idx = coda_next_free_instance(dev);
1381 if (idx < 0) {
1382 ret = idx;
1383 goto err_coda_max;
1384 }
1385 set_bit(idx, &dev->instance_mask);
1386
1387 name = kasprintf(GFP_KERNEL, "context%d", idx);
1388 ctx->debugfs_entry = debugfs_create_dir(name, dev->debugfs_root);
1389 kfree(name);
1390
1391 ctx->inst_type = inst_type;
1392 ctx->ops = ctx_ops;
1393 init_completion(&ctx->completion);
1394 INIT_WORK(&ctx->pic_run_work, coda_pic_run_work);
1395 INIT_WORK(&ctx->seq_end_work, ctx->ops->seq_end_work);
1396 v4l2_fh_init(&ctx->fh, video_devdata(file));
1397 file->private_data = &ctx->fh;
1398 v4l2_fh_add(&ctx->fh);
1399 ctx->dev = dev;
1400 ctx->idx = idx;
1401 switch (dev->devtype->product) {
1402 case CODA_7541:
1403 case CODA_960:
1404 ctx->reg_idx = 0;
1405 break;
1406 default:
1407 ctx->reg_idx = idx;
1408 }
1409
1410 /* Power up and upload firmware if necessary */
1411 ret = pm_runtime_get_sync(&dev->plat_dev->dev);
1412 if (ret < 0) {
1413 v4l2_err(&dev->v4l2_dev, "failed to power up: %d\n", ret);
1414 goto err_pm_get;
1415 }
1416
1417 ret = clk_prepare_enable(dev->clk_per);
1418 if (ret)
1419 goto err_clk_per;
1420
1421 ret = clk_prepare_enable(dev->clk_ahb);
1422 if (ret)
1423 goto err_clk_ahb;
1424
1425 set_default_params(ctx);
1426 ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx,
1427 ctx->ops->queue_init);
1428 if (IS_ERR(ctx->fh.m2m_ctx)) {
1429 ret = PTR_ERR(ctx->fh.m2m_ctx);
1430
1431 v4l2_err(&dev->v4l2_dev, "%s return error (%d)\n",
1432 __func__, ret);
1433 goto err_ctx_init;
1434 }
1435
1436 ret = coda_ctrls_setup(ctx);
1437 if (ret) {
1438 v4l2_err(&dev->v4l2_dev, "failed to setup coda controls\n");
1439 goto err_ctrls_setup;
1440 }
1441
1442 ctx->fh.ctrl_handler = &ctx->ctrls;
1443
1444 ret = coda_alloc_context_buf(ctx, &ctx->parabuf, CODA_PARA_BUF_SIZE,
1445 "parabuf");
1446 if (ret < 0) {
1447 v4l2_err(&dev->v4l2_dev, "failed to allocate parabuf");
1448 goto err_dma_alloc;
1449 }
1450
1451 ctx->bitstream.size = CODA_MAX_FRAME_SIZE;
1452 ctx->bitstream.vaddr = dma_alloc_writecombine(&dev->plat_dev->dev,
1453 ctx->bitstream.size, &ctx->bitstream.paddr, GFP_KERNEL);
1454 if (!ctx->bitstream.vaddr) {
1455 v4l2_err(&dev->v4l2_dev,
1456 "failed to allocate bitstream ringbuffer");
1457 ret = -ENOMEM;
1458 goto err_dma_writecombine;
1459 }
1460 kfifo_init(&ctx->bitstream_fifo,
1461 ctx->bitstream.vaddr, ctx->bitstream.size);
1462 mutex_init(&ctx->bitstream_mutex);
1463 mutex_init(&ctx->buffer_mutex);
1464 INIT_LIST_HEAD(&ctx->timestamp_list);
1465
1466 coda_lock(ctx);
1467 list_add(&ctx->list, &dev->instances);
1468 coda_unlock(ctx);
1469
1470 v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Created instance %d (%p)\n",
1471 ctx->idx, ctx);
1472
1473 return 0;
1474
1475err_dma_writecombine:
1476 if (ctx->dev->devtype->product == CODA_DX6)
1477 coda_free_aux_buf(dev, &ctx->workbuf);
1478 coda_free_aux_buf(dev, &ctx->parabuf);
1479err_dma_alloc:
1480 v4l2_ctrl_handler_free(&ctx->ctrls);
1481err_ctrls_setup:
1482 v4l2_m2m_ctx_release(ctx->fh.m2m_ctx);
1483err_ctx_init:
1484 clk_disable_unprepare(dev->clk_ahb);
1485err_clk_ahb:
1486 clk_disable_unprepare(dev->clk_per);
1487err_clk_per:
1488 pm_runtime_put_sync(&dev->plat_dev->dev);
1489err_pm_get:
1490 v4l2_fh_del(&ctx->fh);
1491 v4l2_fh_exit(&ctx->fh);
1492 clear_bit(ctx->idx, &dev->instance_mask);
1493err_coda_max:
1494 kfree(ctx);
1495 return ret;
1496}
1497
1498static int coda_encoder_open(struct file *file)
1499{
1500 return coda_open(file, CODA_INST_ENCODER, &coda_bit_encode_ops);
1501}
1502
1503static int coda_decoder_open(struct file *file)
1504{
1505 return coda_open(file, CODA_INST_DECODER, &coda_bit_decode_ops);
1506}
1507
1508static int coda_release(struct file *file)
1509{
1510 struct coda_dev *dev = video_drvdata(file);
1511 struct coda_ctx *ctx = fh_to_ctx(file->private_data);
1512
1513 v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Releasing instance %p\n",
1514 ctx);
1515
1516 debugfs_remove_recursive(ctx->debugfs_entry);
1517
1518 /* If this instance is running, call .job_abort and wait for it to end */
1519 v4l2_m2m_ctx_release(ctx->fh.m2m_ctx);
1520
1521 /* In case the instance was not running, we still need to call SEQ_END */
1522 if (ctx->initialized) {
1523 queue_work(dev->workqueue, &ctx->seq_end_work);
1524 flush_work(&ctx->seq_end_work);
1525 }
1526
1527 coda_lock(ctx);
1528 list_del(&ctx->list);
1529 coda_unlock(ctx);
1530
1531 dma_free_writecombine(&dev->plat_dev->dev, ctx->bitstream.size,
1532 ctx->bitstream.vaddr, ctx->bitstream.paddr);
1533 if (ctx->dev->devtype->product == CODA_DX6)
1534 coda_free_aux_buf(dev, &ctx->workbuf);
1535
1536 coda_free_aux_buf(dev, &ctx->parabuf);
1537 v4l2_ctrl_handler_free(&ctx->ctrls);
1538 clk_disable_unprepare(dev->clk_ahb);
1539 clk_disable_unprepare(dev->clk_per);
1540 pm_runtime_put_sync(&dev->plat_dev->dev);
1541 v4l2_fh_del(&ctx->fh);
1542 v4l2_fh_exit(&ctx->fh);
1543 clear_bit(ctx->idx, &dev->instance_mask);
1544 if (ctx->ops->release)
1545 ctx->ops->release(ctx);
1546 kfree(ctx);
1547
1548 return 0;
1549}
1550
1551static const struct v4l2_file_operations coda_encoder_fops = {
1552 .owner = THIS_MODULE,
1553 .open = coda_encoder_open,
1554 .release = coda_release,
1555 .poll = v4l2_m2m_fop_poll,
1556 .unlocked_ioctl = video_ioctl2,
1557 .mmap = v4l2_m2m_fop_mmap,
1558};
1559
1560static const struct v4l2_file_operations coda_decoder_fops = {
1561 .owner = THIS_MODULE,
1562 .open = coda_decoder_open,
1563 .release = coda_release,
1564 .poll = v4l2_m2m_fop_poll,
1565 .unlocked_ioctl = video_ioctl2,
1566 .mmap = v4l2_m2m_fop_mmap,
1567};
1568
1569static int coda_hw_init(struct coda_dev *dev)
1570{
1571 u32 data;
1572 u16 *p;
1573 int i, ret;
1574
1575 ret = clk_prepare_enable(dev->clk_per);
1576 if (ret)
1577 goto err_clk_per;
1578
1579 ret = clk_prepare_enable(dev->clk_ahb);
1580 if (ret)
1581 goto err_clk_ahb;
1582
1583 if (dev->rstc)
1584 reset_control_reset(dev->rstc);
1585
1586 /*
1587 * Copy the first CODA_ISRAM_SIZE in the internal SRAM.
1588 * The 16-bit chars in the code buffer are in memory access
1589 * order, re-sort them to CODA order for register download.
1590 * Data in this SRAM survives a reboot.
1591 */
1592 p = (u16 *)dev->codebuf.vaddr;
1593 if (dev->devtype->product == CODA_DX6) {
1594 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
1595 data = CODA_DOWN_ADDRESS_SET(i) |
1596 CODA_DOWN_DATA_SET(p[i ^ 1]);
1597 coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
1598 }
1599 } else {
1600 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
1601 data = CODA_DOWN_ADDRESS_SET(i) |
1602 CODA_DOWN_DATA_SET(p[round_down(i, 4) +
1603 3 - (i % 4)]);
1604 coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
1605 }
1606 }
1607
1608 /* Clear registers */
1609 for (i = 0; i < 64; i++)
1610 coda_write(dev, 0, CODA_REG_BIT_CODE_BUF_ADDR + i * 4);
1611
1612 /* Tell the BIT where to find everything it needs */
1613 if (dev->devtype->product == CODA_960 ||
1614 dev->devtype->product == CODA_7541) {
1615 coda_write(dev, dev->tempbuf.paddr,
1616 CODA_REG_BIT_TEMP_BUF_ADDR);
1617 coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
1618 } else {
1619 coda_write(dev, dev->workbuf.paddr,
1620 CODA_REG_BIT_WORK_BUF_ADDR);
1621 }
1622 coda_write(dev, dev->codebuf.paddr,
1623 CODA_REG_BIT_CODE_BUF_ADDR);
1624 coda_write(dev, 0, CODA_REG_BIT_CODE_RUN);
1625
1626 /* Set default values */
1627 switch (dev->devtype->product) {
1628 case CODA_DX6:
1629 coda_write(dev, CODADX6_STREAM_BUF_PIC_FLUSH,
1630 CODA_REG_BIT_STREAM_CTRL);
1631 break;
1632 default:
1633 coda_write(dev, CODA7_STREAM_BUF_PIC_FLUSH,
1634 CODA_REG_BIT_STREAM_CTRL);
1635 }
1636 if (dev->devtype->product == CODA_960)
1637 coda_write(dev, 1 << 12, CODA_REG_BIT_FRAME_MEM_CTRL);
1638 else
1639 coda_write(dev, 0, CODA_REG_BIT_FRAME_MEM_CTRL);
1640
1641 if (dev->devtype->product != CODA_DX6)
1642 coda_write(dev, 0, CODA7_REG_BIT_AXI_SRAM_USE);
1643
1644 coda_write(dev, CODA_INT_INTERRUPT_ENABLE,
1645 CODA_REG_BIT_INT_ENABLE);
1646
1647 /* Reset VPU and start processor */
1648 data = coda_read(dev, CODA_REG_BIT_CODE_RESET);
1649 data |= CODA_REG_RESET_ENABLE;
1650 coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
1651 udelay(10);
1652 data &= ~CODA_REG_RESET_ENABLE;
1653 coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
1654 coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
1655
1656 clk_disable_unprepare(dev->clk_ahb);
1657 clk_disable_unprepare(dev->clk_per);
1658
1659 return 0;
1660
1661err_clk_ahb:
1662 clk_disable_unprepare(dev->clk_per);
1663err_clk_per:
1664 return ret;
1665}
1666
1667static int coda_register_device(struct coda_dev *dev, struct video_device *vfd)
1668{
1669 vfd->release = video_device_release_empty,
1670 vfd->lock = &dev->dev_mutex;
1671 vfd->v4l2_dev = &dev->v4l2_dev;
1672 vfd->vfl_dir = VFL_DIR_M2M;
1673 video_set_drvdata(vfd, dev);
1674
1675 /* Not applicable, use the selection API instead */
1676 v4l2_disable_ioctl(vfd, VIDIOC_CROPCAP);
1677 v4l2_disable_ioctl(vfd, VIDIOC_G_CROP);
1678 v4l2_disable_ioctl(vfd, VIDIOC_S_CROP);
1679
1680 return video_register_device(vfd, VFL_TYPE_GRABBER, 0);
1681}
1682
1683static void coda_fw_callback(const struct firmware *fw, void *context)
1684{
1685 struct coda_dev *dev = context;
1686 struct platform_device *pdev = dev->plat_dev;
1687 int ret;
1688
1689 if (!fw) {
1690 v4l2_err(&dev->v4l2_dev, "firmware request failed\n");
1691 goto put_pm;
1692 }
1693
1694 /* allocate auxiliary per-device code buffer for the BIT processor */
1695 ret = coda_alloc_aux_buf(dev, &dev->codebuf, fw->size, "codebuf",
1696 dev->debugfs_root);
1697 if (ret < 0) {
1698 dev_err(&pdev->dev, "failed to allocate code buffer\n");
1699 goto put_pm;
1700 }
1701
1702 /* Copy the whole firmware image to the code buffer */
1703 memcpy(dev->codebuf.vaddr, fw->data, fw->size);
1704 release_firmware(fw);
1705
1706 ret = coda_hw_init(dev);
1707 if (ret < 0) {
1708 v4l2_err(&dev->v4l2_dev, "HW initialization failed\n");
1709 goto put_pm;
1710 }
1711
1712 ret = coda_check_firmware(dev);
1713 if (ret < 0)
1714 goto put_pm;
1715
1716 dev->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
1717 if (IS_ERR(dev->alloc_ctx)) {
1718 v4l2_err(&dev->v4l2_dev, "Failed to alloc vb2 context\n");
1719 goto put_pm;
1720 }
1721
1722 dev->m2m_dev = v4l2_m2m_init(&coda_m2m_ops);
1723 if (IS_ERR(dev->m2m_dev)) {
1724 v4l2_err(&dev->v4l2_dev, "Failed to init mem2mem device\n");
1725 goto rel_ctx;
1726 }
1727
1728 dev->vfd[0].fops = &coda_encoder_fops,
1729 dev->vfd[0].ioctl_ops = &coda_ioctl_ops;
1730 snprintf(dev->vfd[0].name, sizeof(dev->vfd[0].name), "coda-encoder");
1731 ret = coda_register_device(dev, &dev->vfd[0]);
1732 if (ret) {
1733 v4l2_err(&dev->v4l2_dev,
1734 "Failed to register encoder video device\n");
1735 goto rel_m2m;
1736 }
1737
1738 dev->vfd[1].fops = &coda_decoder_fops,
1739 dev->vfd[1].ioctl_ops = &coda_ioctl_ops;
1740 snprintf(dev->vfd[1].name, sizeof(dev->vfd[1].name), "coda-decoder");
1741 ret = coda_register_device(dev, &dev->vfd[1]);
1742 if (ret) {
1743 v4l2_err(&dev->v4l2_dev,
1744 "Failed to register decoder video device\n");
1745 goto rel_m2m;
1746 }
1747
1748 v4l2_info(&dev->v4l2_dev, "codec registered as /dev/video[%d-%d]\n",
1749 dev->vfd[0].num, dev->vfd[1].num);
1750
1751 pm_runtime_put_sync(&pdev->dev);
1752 return;
1753
1754rel_m2m:
1755 v4l2_m2m_release(dev->m2m_dev);
1756rel_ctx:
1757 vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
1758put_pm:
1759 pm_runtime_put_sync(&pdev->dev);
1760}
1761
1762static int coda_firmware_request(struct coda_dev *dev)
1763{
1764 char *fw = dev->devtype->firmware;
1765
1766 dev_dbg(&dev->plat_dev->dev, "requesting firmware '%s' for %s\n", fw,
1767 coda_product_name(dev->devtype->product));
1768
1769 return request_firmware_nowait(THIS_MODULE, true,
1770 fw, &dev->plat_dev->dev, GFP_KERNEL, dev, coda_fw_callback);
1771}
1772
1773enum coda_platform {
1774 CODA_IMX27,
1775 CODA_IMX53,
1776 CODA_IMX6Q,
1777 CODA_IMX6DL,
1778};
1779
1780static const struct coda_devtype coda_devdata[] = {
1781 [CODA_IMX27] = {
1782 .firmware = "v4l-codadx6-imx27.bin",
1783 .product = CODA_DX6,
1784 .codecs = codadx6_codecs,
1785 .num_codecs = ARRAY_SIZE(codadx6_codecs),
1786 .workbuf_size = 288 * 1024 + FMO_SLICE_SAVE_BUF_SIZE * 8 * 1024,
1787 .iram_size = 0xb000,
1788 },
1789 [CODA_IMX53] = {
1790 .firmware = "v4l-coda7541-imx53.bin",
1791 .product = CODA_7541,
1792 .codecs = coda7_codecs,
1793 .num_codecs = ARRAY_SIZE(coda7_codecs),
1794 .workbuf_size = 128 * 1024,
1795 .tempbuf_size = 304 * 1024,
1796 .iram_size = 0x14000,
1797 },
1798 [CODA_IMX6Q] = {
1799 .firmware = "v4l-coda960-imx6q.bin",
1800 .product = CODA_960,
1801 .codecs = coda9_codecs,
1802 .num_codecs = ARRAY_SIZE(coda9_codecs),
1803 .workbuf_size = 80 * 1024,
1804 .tempbuf_size = 204 * 1024,
1805 .iram_size = 0x21000,
1806 },
1807 [CODA_IMX6DL] = {
1808 .firmware = "v4l-coda960-imx6dl.bin",
1809 .product = CODA_960,
1810 .codecs = coda9_codecs,
1811 .num_codecs = ARRAY_SIZE(coda9_codecs),
1812 .workbuf_size = 80 * 1024,
1813 .tempbuf_size = 204 * 1024,
1814 .iram_size = 0x20000,
1815 },
1816};
1817
1818static struct platform_device_id coda_platform_ids[] = {
1819 { .name = "coda-imx27", .driver_data = CODA_IMX27 },
1820 { .name = "coda-imx53", .driver_data = CODA_IMX53 },
1821 { /* sentinel */ }
1822};
1823MODULE_DEVICE_TABLE(platform, coda_platform_ids);
1824
1825#ifdef CONFIG_OF
1826static const struct of_device_id coda_dt_ids[] = {
1827 { .compatible = "fsl,imx27-vpu", .data = &coda_devdata[CODA_IMX27] },
1828 { .compatible = "fsl,imx53-vpu", .data = &coda_devdata[CODA_IMX53] },
1829 { .compatible = "fsl,imx6q-vpu", .data = &coda_devdata[CODA_IMX6Q] },
1830 { .compatible = "fsl,imx6dl-vpu", .data = &coda_devdata[CODA_IMX6DL] },
1831 { /* sentinel */ }
1832};
1833MODULE_DEVICE_TABLE(of, coda_dt_ids);
1834#endif
1835
1836static int coda_probe(struct platform_device *pdev)
1837{
1838 const struct of_device_id *of_id =
1839 of_match_device(of_match_ptr(coda_dt_ids), &pdev->dev);
1840 const struct platform_device_id *pdev_id;
1841 struct coda_platform_data *pdata = pdev->dev.platform_data;
1842 struct device_node *np = pdev->dev.of_node;
1843 struct gen_pool *pool;
1844 struct coda_dev *dev;
1845 struct resource *res;
1846 int ret, irq;
1847
1848 dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
1849 if (!dev) {
1850 dev_err(&pdev->dev, "Not enough memory for %s\n",
1851 CODA_NAME);
1852 return -ENOMEM;
1853 }
1854
1855 spin_lock_init(&dev->irqlock);
1856 INIT_LIST_HEAD(&dev->instances);
1857
1858 dev->plat_dev = pdev;
1859 dev->clk_per = devm_clk_get(&pdev->dev, "per");
1860 if (IS_ERR(dev->clk_per)) {
1861 dev_err(&pdev->dev, "Could not get per clock\n");
1862 return PTR_ERR(dev->clk_per);
1863 }
1864
1865 dev->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
1866 if (IS_ERR(dev->clk_ahb)) {
1867 dev_err(&pdev->dev, "Could not get ahb clock\n");
1868 return PTR_ERR(dev->clk_ahb);
1869 }
1870
1871 /* Get memory for physical registers */
1872 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1873 dev->regs_base = devm_ioremap_resource(&pdev->dev, res);
1874 if (IS_ERR(dev->regs_base))
1875 return PTR_ERR(dev->regs_base);
1876
1877 /* IRQ */
1878 irq = platform_get_irq_byname(pdev, "bit");
1879 if (irq < 0)
1880 irq = platform_get_irq(pdev, 0);
1881 if (irq < 0) {
1882 dev_err(&pdev->dev, "failed to get irq resource\n");
1883 return irq;
1884 }
1885
1886 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, coda_irq_handler,
1887 IRQF_ONESHOT, dev_name(&pdev->dev), dev);
1888 if (ret < 0) {
1889 dev_err(&pdev->dev, "failed to request irq: %d\n", ret);
1890 return ret;
1891 }
1892
1893 dev->rstc = devm_reset_control_get_optional(&pdev->dev, NULL);
1894 if (IS_ERR(dev->rstc)) {
1895 ret = PTR_ERR(dev->rstc);
1896 if (ret == -ENOENT || ret == -ENOSYS) {
1897 dev->rstc = NULL;
1898 } else {
1899 dev_err(&pdev->dev, "failed get reset control: %d\n",
1900 ret);
1901 return ret;
1902 }
1903 }
1904
1905 /* Get IRAM pool from device tree or platform data */
1906 pool = of_get_named_gen_pool(np, "iram", 0);
1907 if (!pool && pdata)
1908 pool = dev_get_gen_pool(pdata->iram_dev);
1909 if (!pool) {
1910 dev_err(&pdev->dev, "iram pool not available\n");
1911 return -ENOMEM;
1912 }
1913 dev->iram_pool = pool;
1914
1915 ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
1916 if (ret)
1917 return ret;
1918
1919 mutex_init(&dev->dev_mutex);
1920 mutex_init(&dev->coda_mutex);
1921
1922 pdev_id = of_id ? of_id->data : platform_get_device_id(pdev);
1923
1924 if (of_id) {
1925 dev->devtype = of_id->data;
1926 } else if (pdev_id) {
1927 dev->devtype = &coda_devdata[pdev_id->driver_data];
1928 } else {
1929 v4l2_device_unregister(&dev->v4l2_dev);
1930 return -EINVAL;
1931 }
1932
1933 dev->debugfs_root = debugfs_create_dir("coda", NULL);
1934 if (!dev->debugfs_root)
1935 dev_warn(&pdev->dev, "failed to create debugfs root\n");
1936
1937 /* allocate auxiliary per-device buffers for the BIT processor */
1938 if (dev->devtype->product == CODA_DX6) {
1939 ret = coda_alloc_aux_buf(dev, &dev->workbuf,
1940 dev->devtype->workbuf_size, "workbuf",
1941 dev->debugfs_root);
1942 if (ret < 0) {
1943 dev_err(&pdev->dev, "failed to allocate work buffer\n");
1944 v4l2_device_unregister(&dev->v4l2_dev);
1945 return ret;
1946 }
1947 }
1948
1949 if (dev->devtype->tempbuf_size) {
1950 ret = coda_alloc_aux_buf(dev, &dev->tempbuf,
1951 dev->devtype->tempbuf_size, "tempbuf",
1952 dev->debugfs_root);
1953 if (ret < 0) {
1954 dev_err(&pdev->dev, "failed to allocate temp buffer\n");
1955 v4l2_device_unregister(&dev->v4l2_dev);
1956 return ret;
1957 }
1958 }
1959
1960 dev->iram.size = dev->devtype->iram_size;
1961 dev->iram.vaddr = gen_pool_dma_alloc(dev->iram_pool, dev->iram.size,
1962 &dev->iram.paddr);
1963 if (!dev->iram.vaddr) {
1964 dev_warn(&pdev->dev, "unable to alloc iram\n");
1965 } else {
1966 dev->iram.blob.data = dev->iram.vaddr;
1967 dev->iram.blob.size = dev->iram.size;
1968 dev->iram.dentry = debugfs_create_blob("iram", 0644,
1969 dev->debugfs_root,
1970 &dev->iram.blob);
1971 }
1972
1973 dev->workqueue = alloc_workqueue("coda", WQ_UNBOUND | WQ_MEM_RECLAIM, 1);
1974 if (!dev->workqueue) {
1975 dev_err(&pdev->dev, "unable to alloc workqueue\n");
1976 return -ENOMEM;
1977 }
1978
1979 platform_set_drvdata(pdev, dev);
1980
1981 /*
1982 * Start activated so we can directly call coda_hw_init in
1983 * coda_fw_callback regardless of whether CONFIG_PM_RUNTIME is
1984 * enabled or whether the device is associated with a PM domain.
1985 */
1986 pm_runtime_get_noresume(&pdev->dev);
1987 pm_runtime_set_active(&pdev->dev);
1988 pm_runtime_enable(&pdev->dev);
1989
1990 return coda_firmware_request(dev);
1991}
1992
1993static int coda_remove(struct platform_device *pdev)
1994{
1995 struct coda_dev *dev = platform_get_drvdata(pdev);
1996
1997 video_unregister_device(&dev->vfd[0]);
1998 video_unregister_device(&dev->vfd[1]);
1999 if (dev->m2m_dev)
2000 v4l2_m2m_release(dev->m2m_dev);
2001 pm_runtime_disable(&pdev->dev);
2002 if (dev->alloc_ctx)
2003 vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
2004 v4l2_device_unregister(&dev->v4l2_dev);
2005 destroy_workqueue(dev->workqueue);
2006 if (dev->iram.vaddr)
2007 gen_pool_free(dev->iram_pool, (unsigned long)dev->iram.vaddr,
2008 dev->iram.size);
2009 coda_free_aux_buf(dev, &dev->codebuf);
2010 coda_free_aux_buf(dev, &dev->tempbuf);
2011 coda_free_aux_buf(dev, &dev->workbuf);
2012 debugfs_remove_recursive(dev->debugfs_root);
2013 return 0;
2014}
2015
2016#ifdef CONFIG_PM_RUNTIME
2017static int coda_runtime_resume(struct device *dev)
2018{
2019 struct coda_dev *cdev = dev_get_drvdata(dev);
2020 int ret = 0;
2021
2022 if (dev->pm_domain && cdev->codebuf.vaddr) {
2023 ret = coda_hw_init(cdev);
2024 if (ret)
2025 v4l2_err(&cdev->v4l2_dev, "HW initialization failed\n");
2026 }
2027
2028 return ret;
2029}
2030#endif
2031
2032static const struct dev_pm_ops coda_pm_ops = {
2033 SET_RUNTIME_PM_OPS(NULL, coda_runtime_resume, NULL)
2034};
2035
2036static struct platform_driver coda_driver = {
2037 .probe = coda_probe,
2038 .remove = coda_remove,
2039 .driver = {
2040 .name = CODA_NAME,
2041 .owner = THIS_MODULE,
2042 .of_match_table = of_match_ptr(coda_dt_ids),
2043 .pm = &coda_pm_ops,
2044 },
2045 .id_table = coda_platform_ids,
2046};
2047
2048module_platform_driver(coda_driver);
2049
2050MODULE_LICENSE("GPL");
2051MODULE_AUTHOR("Javier Martin <javier.martin@vista-silicon.com>");
2052MODULE_DESCRIPTION("Coda multi-standard codec V4L2 driver");
diff --git a/drivers/media/platform/coda/coda-h264.c b/drivers/media/platform/coda/coda-h264.c
new file mode 100644
index 000000000000..456773af1f1d
--- /dev/null
+++ b/drivers/media/platform/coda/coda-h264.c
@@ -0,0 +1,37 @@
1/*
2 * Coda multi-standard codec IP - H.264 helper functions
3 *
4 * Copyright (C) 2012 Vista Silicon S.L.
5 * Javier Martin, <javier.martin@vista-silicon.com>
6 * Xavier Duret
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#include <linux/kernel.h>
15#include <linux/string.h>
16
17static const u8 coda_filler_nal[14] = { 0x00, 0x00, 0x00, 0x01, 0x0c, 0xff,
18 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x80 };
19static const u8 coda_filler_size[8] = { 0, 7, 14, 13, 12, 11, 10, 9 };
20
21int coda_h264_padding(int size, char *p)
22{
23 int nal_size;
24 int diff;
25
26 diff = size - (size & ~0x7);
27 if (diff == 0)
28 return 0;
29
30 nal_size = coda_filler_size[diff];
31 memcpy(p, coda_filler_nal, nal_size);
32
33 /* Add rbsp stop bit and trailing at the end */
34 *(p + nal_size - 1) = 0x80;
35
36 return nal_size;
37}
diff --git a/drivers/media/platform/coda/coda.h b/drivers/media/platform/coda/coda.h
new file mode 100644
index 000000000000..bbc18c0dacd9
--- /dev/null
+++ b/drivers/media/platform/coda/coda.h
@@ -0,0 +1,287 @@
1/*
2 * Coda multi-standard codec IP
3 *
4 * Copyright (C) 2012 Vista Silicon S.L.
5 * Javier Martin, <javier.martin@vista-silicon.com>
6 * Xavier Duret
7 * Copyright (C) 2012-2014 Philipp Zabel, Pengutronix
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 */
14
15#include <linux/debugfs.h>
16#include <linux/irqreturn.h>
17#include <linux/mutex.h>
18#include <linux/kfifo.h>
19#include <linux/videodev2.h>
20
21#include <media/v4l2-ctrls.h>
22#include <media/v4l2-device.h>
23#include <media/v4l2-fh.h>
24#include <media/videobuf2-core.h>
25
26#include "coda_regs.h"
27
28#define CODA_MAX_FRAMEBUFFERS 8
29#define CODA_MAX_FRAME_SIZE 0x100000
30#define FMO_SLICE_SAVE_BUF_SIZE (32)
31
32enum {
33 V4L2_M2M_SRC = 0,
34 V4L2_M2M_DST = 1,
35};
36
37enum coda_inst_type {
38 CODA_INST_ENCODER,
39 CODA_INST_DECODER,
40};
41
42enum coda_product {
43 CODA_DX6 = 0xf001,
44 CODA_7541 = 0xf012,
45 CODA_960 = 0xf020,
46};
47
48struct coda_devtype {
49 char *firmware;
50 enum coda_product product;
51 const struct coda_codec *codecs;
52 unsigned int num_codecs;
53 size_t workbuf_size;
54 size_t tempbuf_size;
55 size_t iram_size;
56};
57
58struct coda_aux_buf {
59 void *vaddr;
60 dma_addr_t paddr;
61 u32 size;
62 struct debugfs_blob_wrapper blob;
63 struct dentry *dentry;
64};
65
66struct coda_dev {
67 struct v4l2_device v4l2_dev;
68 struct video_device vfd[2];
69 struct platform_device *plat_dev;
70 const struct coda_devtype *devtype;
71
72 void __iomem *regs_base;
73 struct clk *clk_per;
74 struct clk *clk_ahb;
75 struct reset_control *rstc;
76
77 struct coda_aux_buf codebuf;
78 struct coda_aux_buf tempbuf;
79 struct coda_aux_buf workbuf;
80 struct gen_pool *iram_pool;
81 struct coda_aux_buf iram;
82
83 spinlock_t irqlock;
84 struct mutex dev_mutex;
85 struct mutex coda_mutex;
86 struct workqueue_struct *workqueue;
87 struct v4l2_m2m_dev *m2m_dev;
88 struct vb2_alloc_ctx *alloc_ctx;
89 struct list_head instances;
90 unsigned long instance_mask;
91 struct dentry *debugfs_root;
92};
93
94struct coda_codec {
95 u32 mode;
96 u32 src_fourcc;
97 u32 dst_fourcc;
98 u32 max_w;
99 u32 max_h;
100};
101
102struct coda_huff_tab;
103
104struct coda_params {
105 u8 rot_mode;
106 u8 h264_intra_qp;
107 u8 h264_inter_qp;
108 u8 h264_min_qp;
109 u8 h264_max_qp;
110 u8 h264_deblk_enabled;
111 u8 h264_deblk_alpha;
112 u8 h264_deblk_beta;
113 u8 mpeg4_intra_qp;
114 u8 mpeg4_inter_qp;
115 u8 gop_size;
116 int intra_refresh;
117 int codec_mode;
118 int codec_mode_aux;
119 enum v4l2_mpeg_video_multi_slice_mode slice_mode;
120 u32 framerate;
121 u16 bitrate;
122 u32 slice_max_bits;
123 u32 slice_max_mb;
124};
125
126struct coda_timestamp {
127 struct list_head list;
128 u32 sequence;
129 struct v4l2_timecode timecode;
130 struct timeval timestamp;
131};
132
133/* Per-queue, driver-specific private data */
134struct coda_q_data {
135 unsigned int width;
136 unsigned int height;
137 unsigned int bytesperline;
138 unsigned int sizeimage;
139 unsigned int fourcc;
140 struct v4l2_rect rect;
141};
142
143struct coda_iram_info {
144 u32 axi_sram_use;
145 phys_addr_t buf_bit_use;
146 phys_addr_t buf_ip_ac_dc_use;
147 phys_addr_t buf_dbk_y_use;
148 phys_addr_t buf_dbk_c_use;
149 phys_addr_t buf_ovl_use;
150 phys_addr_t buf_btp_use;
151 phys_addr_t search_ram_paddr;
152 int search_ram_size;
153 int remaining;
154 phys_addr_t next_paddr;
155};
156
157struct gdi_tiled_map {
158 int xy2ca_map[16];
159 int xy2ba_map[16];
160 int xy2ra_map[16];
161 int rbc2axi_map[32];
162 int xy2rbc_config;
163 int map_type;
164#define GDI_LINEAR_FRAME_MAP 0
165};
166
167struct coda_ctx;
168
169struct coda_context_ops {
170 int (*queue_init)(void *priv, struct vb2_queue *src_vq,
171 struct vb2_queue *dst_vq);
172 int (*start_streaming)(struct coda_ctx *ctx);
173 int (*prepare_run)(struct coda_ctx *ctx);
174 void (*finish_run)(struct coda_ctx *ctx);
175 void (*seq_end_work)(struct work_struct *work);
176 void (*release)(struct coda_ctx *ctx);
177};
178
179struct coda_ctx {
180 struct coda_dev *dev;
181 struct mutex buffer_mutex;
182 struct list_head list;
183 struct work_struct pic_run_work;
184 struct work_struct seq_end_work;
185 struct completion completion;
186 const struct coda_context_ops *ops;
187 int aborting;
188 int initialized;
189 int streamon_out;
190 int streamon_cap;
191 u32 isequence;
192 u32 qsequence;
193 u32 osequence;
194 u32 sequence_offset;
195 struct coda_q_data q_data[2];
196 enum coda_inst_type inst_type;
197 const struct coda_codec *codec;
198 enum v4l2_colorspace colorspace;
199 struct coda_params params;
200 struct v4l2_ctrl_handler ctrls;
201 struct v4l2_fh fh;
202 int gopcounter;
203 int runcounter;
204 char vpu_header[3][64];
205 int vpu_header_size[3];
206 struct kfifo bitstream_fifo;
207 struct mutex bitstream_mutex;
208 struct coda_aux_buf bitstream;
209 bool hold;
210 struct coda_aux_buf parabuf;
211 struct coda_aux_buf psbuf;
212 struct coda_aux_buf slicebuf;
213 struct coda_aux_buf internal_frames[CODA_MAX_FRAMEBUFFERS];
214 u32 frame_types[CODA_MAX_FRAMEBUFFERS];
215 struct coda_timestamp frame_timestamps[CODA_MAX_FRAMEBUFFERS];
216 u32 frame_errors[CODA_MAX_FRAMEBUFFERS];
217 struct list_head timestamp_list;
218 struct coda_aux_buf workbuf;
219 int num_internal_frames;
220 int idx;
221 int reg_idx;
222 struct coda_iram_info iram_info;
223 struct gdi_tiled_map tiled_map;
224 u32 bit_stream_param;
225 u32 frm_dis_flg;
226 u32 frame_mem_ctrl;
227 int display_idx;
228 struct dentry *debugfs_entry;
229};
230
231extern int coda_debug;
232
233void coda_write(struct coda_dev *dev, u32 data, u32 reg);
234unsigned int coda_read(struct coda_dev *dev, u32 reg);
235
236int coda_alloc_aux_buf(struct coda_dev *dev, struct coda_aux_buf *buf,
237 size_t size, const char *name, struct dentry *parent);
238void coda_free_aux_buf(struct coda_dev *dev, struct coda_aux_buf *buf);
239
240static inline int coda_alloc_context_buf(struct coda_ctx *ctx,
241 struct coda_aux_buf *buf, size_t size,
242 const char *name)
243{
244 return coda_alloc_aux_buf(ctx->dev, buf, size, name, ctx->debugfs_entry);
245}
246
247int coda_encoder_queue_init(void *priv, struct vb2_queue *src_vq,
248 struct vb2_queue *dst_vq);
249int coda_decoder_queue_init(void *priv, struct vb2_queue *src_vq,
250 struct vb2_queue *dst_vq);
251
252int coda_hw_reset(struct coda_ctx *ctx);
253
254void coda_fill_bitstream(struct coda_ctx *ctx);
255
256void coda_set_gdi_regs(struct coda_ctx *ctx);
257
258static inline struct coda_q_data *get_q_data(struct coda_ctx *ctx,
259 enum v4l2_buf_type type)
260{
261 switch (type) {
262 case V4L2_BUF_TYPE_VIDEO_OUTPUT:
263 return &(ctx->q_data[V4L2_M2M_SRC]);
264 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
265 return &(ctx->q_data[V4L2_M2M_DST]);
266 default:
267 return NULL;
268 }
269}
270
271const char *coda_product_name(int product);
272
273int coda_check_firmware(struct coda_dev *dev);
274
275static inline int coda_get_bitstream_payload(struct coda_ctx *ctx)
276{
277 return kfifo_len(&ctx->bitstream_fifo);
278}
279
280void coda_bit_stream_end_flag(struct coda_ctx *ctx);
281
282int coda_h264_padding(int size, char *p);
283
284extern const struct coda_context_ops coda_bit_encode_ops;
285extern const struct coda_context_ops coda_bit_decode_ops;
286
287irqreturn_t coda_irq_handler(int irq, void *data);
diff --git a/drivers/media/platform/coda.h b/drivers/media/platform/coda/coda_regs.h
index c791275e307b..c791275e307b 100644
--- a/drivers/media/platform/coda.h
+++ b/drivers/media/platform/coda/coda_regs.h
diff --git a/drivers/media/platform/davinci/Kconfig b/drivers/media/platform/davinci/Kconfig
index afb3aec1320e..d9e1ddb586b1 100644
--- a/drivers/media/platform/davinci/Kconfig
+++ b/drivers/media/platform/davinci/Kconfig
@@ -1,6 +1,8 @@
1config VIDEO_DAVINCI_VPIF_DISPLAY 1config VIDEO_DAVINCI_VPIF_DISPLAY
2 tristate "TI DaVinci VPIF V4L2-Display driver" 2 tristate "TI DaVinci VPIF V4L2-Display driver"
3 depends on VIDEO_DEV && ARCH_DAVINCI 3 depends on VIDEO_DEV
4 depends on ARCH_DAVINCI || COMPILE_TEST
5 depends on HAS_DMA
4 select VIDEOBUF2_DMA_CONTIG 6 select VIDEOBUF2_DMA_CONTIG
5 select VIDEO_ADV7343 if MEDIA_SUBDRV_AUTOSELECT 7 select VIDEO_ADV7343 if MEDIA_SUBDRV_AUTOSELECT
6 select VIDEO_THS7303 if MEDIA_SUBDRV_AUTOSELECT 8 select VIDEO_THS7303 if MEDIA_SUBDRV_AUTOSELECT
@@ -14,7 +16,9 @@ config VIDEO_DAVINCI_VPIF_DISPLAY
14 16
15config VIDEO_DAVINCI_VPIF_CAPTURE 17config VIDEO_DAVINCI_VPIF_CAPTURE
16 tristate "TI DaVinci VPIF video capture driver" 18 tristate "TI DaVinci VPIF video capture driver"
17 depends on VIDEO_DEV && ARCH_DAVINCI 19 depends on VIDEO_DEV
20 depends on ARCH_DAVINCI || COMPILE_TEST
21 depends on HAS_DMA
18 select VIDEOBUF2_DMA_CONTIG 22 select VIDEOBUF2_DMA_CONTIG
19 help 23 help
20 Enables Davinci VPIF module used for capture devices. 24 Enables Davinci VPIF module used for capture devices.
@@ -26,7 +30,9 @@ config VIDEO_DAVINCI_VPIF_CAPTURE
26 30
27config VIDEO_DM6446_CCDC 31config VIDEO_DM6446_CCDC
28 tristate "TI DM6446 CCDC video capture driver" 32 tristate "TI DM6446 CCDC video capture driver"
29 depends on VIDEO_V4L2 && (ARCH_DAVINCI || ARCH_OMAP3) 33 depends on VIDEO_V4L2
34 depends on ARCH_DAVINCI || COMPILE_TEST
35 depends on HAS_DMA
30 select VIDEOBUF_DMA_CONTIG 36 select VIDEOBUF_DMA_CONTIG
31 help 37 help
32 Enables DaVinci CCD hw module. DaVinci CCDC hw interfaces 38 Enables DaVinci CCD hw module. DaVinci CCDC hw interfaces
@@ -40,7 +46,9 @@ config VIDEO_DM6446_CCDC
40 46
41config VIDEO_DM355_CCDC 47config VIDEO_DM355_CCDC
42 tristate "TI DM355 CCDC video capture driver" 48 tristate "TI DM355 CCDC video capture driver"
43 depends on VIDEO_V4L2 && ARCH_DAVINCI 49 depends on VIDEO_V4L2
50 depends on ARCH_DAVINCI || COMPILE_TEST
51 depends on HAS_DMA
44 select VIDEOBUF_DMA_CONTIG 52 select VIDEOBUF_DMA_CONTIG
45 help 53 help
46 Enables DM355 CCD hw module. DM355 CCDC hw interfaces 54 Enables DM355 CCD hw module. DM355 CCDC hw interfaces
@@ -55,6 +63,7 @@ config VIDEO_DM355_CCDC
55config VIDEO_DM365_ISIF 63config VIDEO_DM365_ISIF
56 tristate "TI DM365 ISIF video capture driver" 64 tristate "TI DM365 ISIF video capture driver"
57 depends on VIDEO_V4L2 && ARCH_DAVINCI 65 depends on VIDEO_V4L2 && ARCH_DAVINCI
66 depends on HAS_DMA
58 select VIDEOBUF_DMA_CONTIG 67 select VIDEOBUF_DMA_CONTIG
59 help 68 help
60 Enables ISIF hw module. This is the hardware module for 69 Enables ISIF hw module. This is the hardware module for
@@ -67,6 +76,7 @@ config VIDEO_DM365_ISIF
67config VIDEO_DAVINCI_VPBE_DISPLAY 76config VIDEO_DAVINCI_VPBE_DISPLAY
68 tristate "TI DaVinci VPBE V4L2-Display driver" 77 tristate "TI DaVinci VPBE V4L2-Display driver"
69 depends on ARCH_DAVINCI 78 depends on ARCH_DAVINCI
79 depends on HAS_DMA
70 select VIDEOBUF2_DMA_CONTIG 80 select VIDEOBUF2_DMA_CONTIG
71 help 81 help
72 Enables Davinci VPBE module used for display devices. 82 Enables Davinci VPBE module used for display devices.
diff --git a/drivers/media/platform/davinci/dm355_ccdc.c b/drivers/media/platform/davinci/dm355_ccdc.c
index 05f8fb7f7b70..3f44deb5b7a7 100644
--- a/drivers/media/platform/davinci/dm355_ccdc.c
+++ b/drivers/media/platform/davinci/dm355_ccdc.c
@@ -460,7 +460,7 @@ static void ccdc_config_black_compense(struct ccdc_black_compensation *bcomp)
460 * ccdc_write_dfc_entry() 460 * ccdc_write_dfc_entry()
461 * write an entry in the dfc table. 461 * write an entry in the dfc table.
462 */ 462 */
463int ccdc_write_dfc_entry(int index, struct ccdc_vertical_dft *dfc) 463static int ccdc_write_dfc_entry(int index, struct ccdc_vertical_dft *dfc)
464{ 464{
465/* TODO This is to be re-visited and adjusted */ 465/* TODO This is to be re-visited and adjusted */
466#define DFC_WRITE_WAIT_COUNT 1000 466#define DFC_WRITE_WAIT_COUNT 1000
diff --git a/drivers/media/platform/davinci/dm644x_ccdc.c b/drivers/media/platform/davinci/dm644x_ccdc.c
index 07e98df3d867..62a0ebb01056 100644
--- a/drivers/media/platform/davinci/dm644x_ccdc.c
+++ b/drivers/media/platform/davinci/dm644x_ccdc.c
@@ -130,9 +130,9 @@ static void ccdc_enable_vport(int flag)
130 * This function will configure the window size 130 * This function will configure the window size
131 * to be capture in CCDC reg 131 * to be capture in CCDC reg
132 */ 132 */
133void ccdc_setwin(struct v4l2_rect *image_win, 133static void ccdc_setwin(struct v4l2_rect *image_win,
134 enum ccdc_frmfmt frm_fmt, 134 enum ccdc_frmfmt frm_fmt,
135 int ppc) 135 int ppc)
136{ 136{
137 int horz_start, horz_nr_pixels; 137 int horz_start, horz_nr_pixels;
138 int vert_start, vert_nr_lines; 138 int vert_start, vert_nr_lines;
@@ -291,7 +291,7 @@ static int ccdc_update_raw_params(struct ccdc_config_params_raw *raw_params)
291 dev_dbg(ccdc_cfg.dev, "\n copy_from_user failed"); 291 dev_dbg(ccdc_cfg.dev, "\n copy_from_user failed");
292 return -EFAULT; 292 return -EFAULT;
293 } 293 }
294 config_params->fault_pxl.fpc_table_addr = (unsigned int)fpc_physaddr; 294 config_params->fault_pxl.fpc_table_addr = (unsigned long)fpc_physaddr;
295 return 0; 295 return 0;
296} 296}
297 297
@@ -370,7 +370,7 @@ static int ccdc_set_params(void __user *params)
370 * ccdc_config_ycbcr() 370 * ccdc_config_ycbcr()
371 * This function will configure CCDC for YCbCr video capture 371 * This function will configure CCDC for YCbCr video capture
372 */ 372 */
373void ccdc_config_ycbcr(void) 373static void ccdc_config_ycbcr(void)
374{ 374{
375 struct ccdc_params_ycbcr *params = &ccdc_cfg.ycbcr; 375 struct ccdc_params_ycbcr *params = &ccdc_cfg.ycbcr;
376 u32 syn_mode; 376 u32 syn_mode;
@@ -506,7 +506,7 @@ static void ccdc_config_fpc(struct ccdc_fault_pixel *fpc)
506 506
507 /* Configure Fault pixel if needed */ 507 /* Configure Fault pixel if needed */
508 regw(fpc->fpc_table_addr, CCDC_FPC_ADDR); 508 regw(fpc->fpc_table_addr, CCDC_FPC_ADDR);
509 dev_dbg(ccdc_cfg.dev, "\nWriting 0x%x to FPC_ADDR...\n", 509 dev_dbg(ccdc_cfg.dev, "\nWriting 0x%lx to FPC_ADDR...\n",
510 (fpc->fpc_table_addr)); 510 (fpc->fpc_table_addr));
511 /* Write the FPC params with FPC disable */ 511 /* Write the FPC params with FPC disable */
512 val = fpc->fp_num & CCDC_FPC_FPC_NUM_MASK; 512 val = fpc->fp_num & CCDC_FPC_FPC_NUM_MASK;
@@ -523,7 +523,7 @@ static void ccdc_config_fpc(struct ccdc_fault_pixel *fpc)
523 * ccdc_config_raw() 523 * ccdc_config_raw()
524 * This function will configure CCDC for Raw capture mode 524 * This function will configure CCDC for Raw capture mode
525 */ 525 */
526void ccdc_config_raw(void) 526static void ccdc_config_raw(void)
527{ 527{
528 struct ccdc_params_raw *params = &ccdc_cfg.bayer; 528 struct ccdc_params_raw *params = &ccdc_cfg.bayer;
529 struct ccdc_config_params_raw *config_params = 529 struct ccdc_config_params_raw *config_params =
diff --git a/drivers/media/platform/davinci/vpfe_capture.c b/drivers/media/platform/davinci/vpfe_capture.c
index ea7661a27479..de55f47a77db 100644
--- a/drivers/media/platform/davinci/vpfe_capture.c
+++ b/drivers/media/platform/davinci/vpfe_capture.c
@@ -125,7 +125,7 @@ static DEFINE_MUTEX(ccdc_lock);
125/* ccdc configuration */ 125/* ccdc configuration */
126static struct ccdc_config *ccdc_cfg; 126static struct ccdc_config *ccdc_cfg;
127 127
128const struct vpfe_standard vpfe_standards[] = { 128static const struct vpfe_standard vpfe_standards[] = {
129 {V4L2_STD_525_60, 720, 480, {11, 10}, 1}, 129 {V4L2_STD_525_60, 720, 480, {11, 10}, 1},
130 {V4L2_STD_625_50, 720, 576, {54, 59}, 1}, 130 {V4L2_STD_625_50, 720, 576, {54, 59}, 1},
131}; 131};
@@ -442,11 +442,10 @@ static int vpfe_config_image_format(struct vpfe_device *vpfe_dev,
442 return ret; 442 return ret;
443 443
444 /* Update the values of sizeimage and bytesperline */ 444 /* Update the values of sizeimage and bytesperline */
445 if (!ret) { 445 pix->bytesperline = ccdc_dev->hw_ops.get_line_length();
446 pix->bytesperline = ccdc_dev->hw_ops.get_line_length(); 446 pix->sizeimage = pix->bytesperline * pix->height;
447 pix->sizeimage = pix->bytesperline * pix->height; 447
448 } 448 return 0;
449 return ret;
450} 449}
451 450
452static int vpfe_initialize_device(struct vpfe_device *vpfe_dev) 451static int vpfe_initialize_device(struct vpfe_device *vpfe_dev)
@@ -943,12 +942,11 @@ static int vpfe_g_fmt_vid_cap(struct file *file, void *priv,
943 struct v4l2_format *fmt) 942 struct v4l2_format *fmt)
944{ 943{
945 struct vpfe_device *vpfe_dev = video_drvdata(file); 944 struct vpfe_device *vpfe_dev = video_drvdata(file);
946 int ret = 0;
947 945
948 v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_g_fmt_vid_cap\n"); 946 v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_g_fmt_vid_cap\n");
949 /* Fill in the information about format */ 947 /* Fill in the information about format */
950 *fmt = vpfe_dev->fmt; 948 *fmt = vpfe_dev->fmt;
951 return ret; 949 return 0;
952} 950}
953 951
954static int vpfe_enum_fmt_vid_cap(struct file *file, void *priv, 952static int vpfe_enum_fmt_vid_cap(struct file *file, void *priv,
@@ -1914,7 +1912,7 @@ static int vpfe_probe(struct platform_device *pdev)
1914 v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, 1912 v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev,
1915 "trying to register vpfe device.\n"); 1913 "trying to register vpfe device.\n");
1916 v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, 1914 v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev,
1917 "video_dev=%x\n", (int)&vpfe_dev->video_dev); 1915 "video_dev=%p\n", &vpfe_dev->video_dev);
1918 vpfe_dev->fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 1916 vpfe_dev->fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1919 ret = video_register_device(vpfe_dev->video_dev, 1917 ret = video_register_device(vpfe_dev->video_dev,
1920 VFL_TYPE_GRABBER, -1); 1918 VFL_TYPE_GRABBER, -1);
diff --git a/drivers/media/platform/davinci/vpif.c b/drivers/media/platform/davinci/vpif.c
index cd08e5248387..3dad5bd7fe0a 100644
--- a/drivers/media/platform/davinci/vpif.c
+++ b/drivers/media/platform/davinci/vpif.c
@@ -38,6 +38,7 @@ MODULE_LICENSE("GPL");
38#define VPIF_CH3_MAX_MODES 2 38#define VPIF_CH3_MAX_MODES 2
39 39
40spinlock_t vpif_lock; 40spinlock_t vpif_lock;
41EXPORT_SYMBOL_GPL(vpif_lock);
41 42
42void __iomem *vpif_base; 43void __iomem *vpif_base;
43EXPORT_SYMBOL_GPL(vpif_base); 44EXPORT_SYMBOL_GPL(vpif_base);
diff --git a/drivers/media/platform/davinci/vpif_capture.c b/drivers/media/platform/davinci/vpif_capture.c
index b054b7eec53d..3ccb26ff43c8 100644
--- a/drivers/media/platform/davinci/vpif_capture.c
+++ b/drivers/media/platform/davinci/vpif_capture.c
@@ -213,8 +213,6 @@ static int vpif_start_streaming(struct vb2_queue *vq, unsigned int count)
213 /* Remove buffer from the buffer queue */ 213 /* Remove buffer from the buffer queue */
214 list_del(&common->cur_frm->list); 214 list_del(&common->cur_frm->list);
215 spin_unlock_irqrestore(&common->irqlock, flags); 215 spin_unlock_irqrestore(&common->irqlock, flags);
216 /* Mark state of the current frame to active */
217 common->cur_frm->vb.state = VB2_BUF_STATE_ACTIVE;
218 216
219 addr = vb2_dma_contig_plane_dma_addr(&common->cur_frm->vb, 0); 217 addr = vb2_dma_contig_plane_dma_addr(&common->cur_frm->vb, 0);
220 218
@@ -350,7 +348,6 @@ static void vpif_schedule_next_buffer(struct common_obj *common)
350 /* Remove that buffer from the buffer queue */ 348 /* Remove that buffer from the buffer queue */
351 list_del(&common->next_frm->list); 349 list_del(&common->next_frm->list);
352 spin_unlock(&common->irqlock); 350 spin_unlock(&common->irqlock);
353 common->next_frm->vb.state = VB2_BUF_STATE_ACTIVE;
354 addr = vb2_dma_contig_plane_dma_addr(&common->next_frm->vb, 0); 351 addr = vb2_dma_contig_plane_dma_addr(&common->next_frm->vb, 0);
355 352
356 /* Set top and bottom field addresses in VPIF registers */ 353 /* Set top and bottom field addresses in VPIF registers */
@@ -373,7 +370,6 @@ static irqreturn_t vpif_channel_isr(int irq, void *dev_id)
373 struct vpif_device *dev = &vpif_obj; 370 struct vpif_device *dev = &vpif_obj;
374 struct common_obj *common; 371 struct common_obj *common;
375 struct channel_obj *ch; 372 struct channel_obj *ch;
376 enum v4l2_field field;
377 int channel_id = 0; 373 int channel_id = 0;
378 int fid = -1, i; 374 int fid = -1, i;
379 375
@@ -383,8 +379,6 @@ static irqreturn_t vpif_channel_isr(int irq, void *dev_id)
383 379
384 ch = dev->dev[channel_id]; 380 ch = dev->dev[channel_id];
385 381
386 field = ch->common[VPIF_VIDEO_INDEX].fmt.fmt.pix.field;
387
388 for (i = 0; i < VPIF_NUMBER_OF_OBJECTS; i++) { 382 for (i = 0; i < VPIF_NUMBER_OF_OBJECTS; i++) {
389 common = &ch->common[i]; 383 common = &ch->common[i];
390 /* skip If streaming is not started in this channel */ 384 /* skip If streaming is not started in this channel */
@@ -533,7 +527,7 @@ static int vpif_update_std_info(struct channel_obj *ch)
533 */ 527 */
534static void vpif_calculate_offsets(struct channel_obj *ch) 528static void vpif_calculate_offsets(struct channel_obj *ch)
535{ 529{
536 unsigned int hpitch, vpitch, sizeimage; 530 unsigned int hpitch, sizeimage;
537 struct video_obj *vid_ch = &(ch->video); 531 struct video_obj *vid_ch = &(ch->video);
538 struct vpif_params *vpifparams = &ch->vpifparams; 532 struct vpif_params *vpifparams = &ch->vpifparams;
539 struct common_obj *common = &ch->common[VPIF_VIDEO_INDEX]; 533 struct common_obj *common = &ch->common[VPIF_VIDEO_INDEX];
@@ -552,7 +546,6 @@ static void vpif_calculate_offsets(struct channel_obj *ch)
552 sizeimage = common->fmt.fmt.pix.sizeimage; 546 sizeimage = common->fmt.fmt.pix.sizeimage;
553 547
554 hpitch = common->fmt.fmt.pix.bytesperline; 548 hpitch = common->fmt.fmt.pix.bytesperline;
555 vpitch = sizeimage / (hpitch * 2);
556 549
557 if ((V4L2_FIELD_NONE == vid_ch->buf_field) || 550 if ((V4L2_FIELD_NONE == vid_ch->buf_field) ||
558 (V4L2_FIELD_INTERLACED == vid_ch->buf_field)) { 551 (V4L2_FIELD_INTERLACED == vid_ch->buf_field)) {
@@ -1603,7 +1596,7 @@ static int vpif_suspend(struct device *dev)
1603 ch = vpif_obj.dev[i]; 1596 ch = vpif_obj.dev[i];
1604 common = &ch->common[VPIF_VIDEO_INDEX]; 1597 common = &ch->common[VPIF_VIDEO_INDEX];
1605 1598
1606 if (!vb2_is_streaming(&common->buffer_queue)) 1599 if (!vb2_start_streaming_called(&common->buffer_queue))
1607 continue; 1600 continue;
1608 1601
1609 mutex_lock(&common->lock); 1602 mutex_lock(&common->lock);
@@ -1637,7 +1630,7 @@ static int vpif_resume(struct device *dev)
1637 ch = vpif_obj.dev[i]; 1630 ch = vpif_obj.dev[i];
1638 common = &ch->common[VPIF_VIDEO_INDEX]; 1631 common = &ch->common[VPIF_VIDEO_INDEX];
1639 1632
1640 if (!vb2_is_streaming(&common->buffer_queue)) 1633 if (!vb2_start_streaming_called(&common->buffer_queue))
1641 continue; 1634 continue;
1642 1635
1643 mutex_lock(&common->lock); 1636 mutex_lock(&common->lock);
diff --git a/drivers/media/platform/davinci/vpif_display.c b/drivers/media/platform/davinci/vpif_display.c
index a03ec7381cfe..8d6ced56253c 100644
--- a/drivers/media/platform/davinci/vpif_display.c
+++ b/drivers/media/platform/davinci/vpif_display.c
@@ -196,8 +196,6 @@ static int vpif_start_streaming(struct vb2_queue *vq, unsigned int count)
196 196
197 list_del(&common->cur_frm->list); 197 list_del(&common->cur_frm->list);
198 spin_unlock_irqrestore(&common->irqlock, flags); 198 spin_unlock_irqrestore(&common->irqlock, flags);
199 /* Mark state of the current frame to active */
200 common->cur_frm->vb.state = VB2_BUF_STATE_ACTIVE;
201 199
202 addr = vb2_dma_contig_plane_dma_addr(&common->cur_frm->vb, 0); 200 addr = vb2_dma_contig_plane_dma_addr(&common->cur_frm->vb, 0);
203 common->set_addr((addr + common->ytop_off), 201 common->set_addr((addr + common->ytop_off),
@@ -306,8 +304,6 @@ static void process_progressive_mode(struct common_obj *common)
306 /* Remove that buffer from the buffer queue */ 304 /* Remove that buffer from the buffer queue */
307 list_del(&common->next_frm->list); 305 list_del(&common->next_frm->list);
308 spin_unlock(&common->irqlock); 306 spin_unlock(&common->irqlock);
309 /* Mark status of the buffer as active */
310 common->next_frm->vb.state = VB2_BUF_STATE_ACTIVE;
311 307
312 /* Set top and bottom field addrs in VPIF registers */ 308 /* Set top and bottom field addrs in VPIF registers */
313 addr = vb2_dma_contig_plane_dma_addr(&common->next_frm->vb, 0); 309 addr = vb2_dma_contig_plane_dma_addr(&common->next_frm->vb, 0);
@@ -360,7 +356,6 @@ static irqreturn_t vpif_channel_isr(int irq, void *dev_id)
360 struct vpif_device *dev = &vpif_obj; 356 struct vpif_device *dev = &vpif_obj;
361 struct channel_obj *ch; 357 struct channel_obj *ch;
362 struct common_obj *common; 358 struct common_obj *common;
363 enum v4l2_field field;
364 int fid = -1, i; 359 int fid = -1, i;
365 int channel_id = 0; 360 int channel_id = 0;
366 361
@@ -369,7 +364,6 @@ static irqreturn_t vpif_channel_isr(int irq, void *dev_id)
369 return IRQ_NONE; 364 return IRQ_NONE;
370 365
371 ch = dev->dev[channel_id]; 366 ch = dev->dev[channel_id];
372 field = ch->common[VPIF_VIDEO_INDEX].fmt.fmt.pix.field;
373 for (i = 0; i < VPIF_NUMOBJECTS; i++) { 367 for (i = 0; i < VPIF_NUMOBJECTS; i++) {
374 common = &ch->common[i]; 368 common = &ch->common[i];
375 /* If streaming is started in this channel */ 369 /* If streaming is started in this channel */
@@ -502,7 +496,7 @@ static void vpif_calculate_offsets(struct channel_obj *ch)
502 struct vpif_params *vpifparams = &ch->vpifparams; 496 struct vpif_params *vpifparams = &ch->vpifparams;
503 enum v4l2_field field = common->fmt.fmt.pix.field; 497 enum v4l2_field field = common->fmt.fmt.pix.field;
504 struct video_obj *vid_ch = &ch->video; 498 struct video_obj *vid_ch = &ch->video;
505 unsigned int hpitch, vpitch, sizeimage; 499 unsigned int hpitch, sizeimage;
506 500
507 if (V4L2_FIELD_ANY == common->fmt.fmt.pix.field) { 501 if (V4L2_FIELD_ANY == common->fmt.fmt.pix.field) {
508 if (ch->vpifparams.std_info.frm_fmt) 502 if (ch->vpifparams.std_info.frm_fmt)
@@ -516,7 +510,6 @@ static void vpif_calculate_offsets(struct channel_obj *ch)
516 sizeimage = common->fmt.fmt.pix.sizeimage; 510 sizeimage = common->fmt.fmt.pix.sizeimage;
517 511
518 hpitch = common->fmt.fmt.pix.bytesperline; 512 hpitch = common->fmt.fmt.pix.bytesperline;
519 vpitch = sizeimage / (hpitch * 2);
520 if ((V4L2_FIELD_NONE == vid_ch->buf_field) || 513 if ((V4L2_FIELD_NONE == vid_ch->buf_field) ||
521 (V4L2_FIELD_INTERLACED == vid_ch->buf_field)) { 514 (V4L2_FIELD_INTERLACED == vid_ch->buf_field)) {
522 common->ytop_off = 0; 515 common->ytop_off = 0;
@@ -813,17 +806,14 @@ static int vpif_set_output(struct vpif_display_config *vpif_cfg,
813{ 806{
814 struct vpif_display_chan_config *chan_cfg = 807 struct vpif_display_chan_config *chan_cfg =
815 &vpif_cfg->chan_config[ch->channel_id]; 808 &vpif_cfg->chan_config[ch->channel_id];
816 struct vpif_subdev_info *subdev_info = NULL;
817 struct v4l2_subdev *sd = NULL; 809 struct v4l2_subdev *sd = NULL;
818 u32 input = 0, output = 0; 810 u32 input = 0, output = 0;
819 int sd_index; 811 int sd_index;
820 int ret; 812 int ret;
821 813
822 sd_index = vpif_output_to_subdev(vpif_cfg, chan_cfg, index); 814 sd_index = vpif_output_to_subdev(vpif_cfg, chan_cfg, index);
823 if (sd_index >= 0) { 815 if (sd_index >= 0)
824 sd = vpif_obj.sd[sd_index]; 816 sd = vpif_obj.sd[sd_index];
825 subdev_info = &vpif_cfg->subdevinfo[sd_index];
826 }
827 817
828 if (sd) { 818 if (sd) {
829 input = chan_cfg->outputs[index].input_route; 819 input = chan_cfg->outputs[index].input_route;
@@ -1210,8 +1200,8 @@ static int vpif_probe_complete(void)
1210 INIT_LIST_HEAD(&common->dma_queue); 1200 INIT_LIST_HEAD(&common->dma_queue);
1211 1201
1212 /* register video device */ 1202 /* register video device */
1213 vpif_dbg(1, debug, "channel=%x,channel->video_dev=%x\n", 1203 vpif_dbg(1, debug, "channel=%p,channel->video_dev=%p\n",
1214 (int)ch, (int)&ch->video_dev); 1204 ch, &ch->video_dev);
1215 1205
1216 /* Initialize the video_device structure */ 1206 /* Initialize the video_device structure */
1217 vdev = ch->video_dev; 1207 vdev = ch->video_dev;
@@ -1410,7 +1400,7 @@ static int vpif_suspend(struct device *dev)
1410 ch = vpif_obj.dev[i]; 1400 ch = vpif_obj.dev[i];
1411 common = &ch->common[VPIF_VIDEO_INDEX]; 1401 common = &ch->common[VPIF_VIDEO_INDEX];
1412 1402
1413 if (!vb2_is_streaming(&common->buffer_queue)) 1403 if (!vb2_start_streaming_called(&common->buffer_queue))
1414 continue; 1404 continue;
1415 1405
1416 mutex_lock(&common->lock); 1406 mutex_lock(&common->lock);
@@ -1442,7 +1432,7 @@ static int vpif_resume(struct device *dev)
1442 ch = vpif_obj.dev[i]; 1432 ch = vpif_obj.dev[i];
1443 common = &ch->common[VPIF_VIDEO_INDEX]; 1433 common = &ch->common[VPIF_VIDEO_INDEX];
1444 1434
1445 if (!vb2_is_streaming(&common->buffer_queue)) 1435 if (!vb2_start_streaming_called(&common->buffer_queue))
1446 continue; 1436 continue;
1447 1437
1448 mutex_lock(&common->lock); 1438 mutex_lock(&common->lock);
diff --git a/drivers/media/platform/exynos-gsc/gsc-core.c b/drivers/media/platform/exynos-gsc/gsc-core.c
index 9d0cc04d7ab7..b4c9f1d08968 100644
--- a/drivers/media/platform/exynos-gsc/gsc-core.c
+++ b/drivers/media/platform/exynos-gsc/gsc-core.c
@@ -852,8 +852,8 @@ int gsc_prepare_addr(struct gsc_ctx *ctx, struct vb2_buffer *vb,
852 (frame->fmt->pixelformat == V4L2_PIX_FMT_YVU420M)) 852 (frame->fmt->pixelformat == V4L2_PIX_FMT_YVU420M))
853 swap(addr->cb, addr->cr); 853 swap(addr->cb, addr->cr);
854 854
855 pr_debug("ADDR: y= 0x%X cb= 0x%X cr= 0x%X ret= %d", 855 pr_debug("ADDR: y= %pad cb= %pad cr= %pad ret= %d",
856 addr->y, addr->cb, addr->cr, ret); 856 &addr->y, &addr->cb, &addr->cr, ret);
857 857
858 return ret; 858 return ret;
859} 859}
@@ -1086,7 +1086,7 @@ static int gsc_probe(struct platform_device *pdev)
1086 else 1086 else
1087 gsc->id = pdev->id; 1087 gsc->id = pdev->id;
1088 1088
1089 if (gsc->id < 0 || gsc->id >= drv_data->num_entities) { 1089 if (gsc->id >= drv_data->num_entities) {
1090 dev_err(dev, "Invalid platform device id: %d\n", gsc->id); 1090 dev_err(dev, "Invalid platform device id: %d\n", gsc->id);
1091 return -EINVAL; 1091 return -EINVAL;
1092 } 1092 }
diff --git a/drivers/media/platform/exynos-gsc/gsc-m2m.c b/drivers/media/platform/exynos-gsc/gsc-m2m.c
index e434f1f03d7b..74e1de637e8f 100644
--- a/drivers/media/platform/exynos-gsc/gsc-m2m.c
+++ b/drivers/media/platform/exynos-gsc/gsc-m2m.c
@@ -362,7 +362,6 @@ static int gsc_m2m_reqbufs(struct file *file, void *fh,
362{ 362{
363 struct gsc_ctx *ctx = fh_to_ctx(fh); 363 struct gsc_ctx *ctx = fh_to_ctx(fh);
364 struct gsc_dev *gsc = ctx->gsc_dev; 364 struct gsc_dev *gsc = ctx->gsc_dev;
365 struct gsc_frame *frame;
366 u32 max_cnt; 365 u32 max_cnt;
367 366
368 max_cnt = (reqbufs->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) ? 367 max_cnt = (reqbufs->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) ?
@@ -376,8 +375,6 @@ static int gsc_m2m_reqbufs(struct file *file, void *fh,
376 gsc_ctx_state_lock_clear(GSC_DST_FMT, ctx); 375 gsc_ctx_state_lock_clear(GSC_DST_FMT, ctx);
377 } 376 }
378 377
379 frame = ctx_get_frame(ctx, reqbufs->type);
380
381 return v4l2_m2m_reqbufs(file, ctx->m2m_ctx, reqbufs); 378 return v4l2_m2m_reqbufs(file, ctx->m2m_ctx, reqbufs);
382} 379}
383 380
diff --git a/drivers/media/platform/exynos-gsc/gsc-regs.c b/drivers/media/platform/exynos-gsc/gsc-regs.c
index e22d147a6940..ce12a1100511 100644
--- a/drivers/media/platform/exynos-gsc/gsc-regs.c
+++ b/drivers/media/platform/exynos-gsc/gsc-regs.c
@@ -90,8 +90,8 @@ void gsc_hw_set_output_buf_masking(struct gsc_dev *dev, u32 shift,
90void gsc_hw_set_input_addr(struct gsc_dev *dev, struct gsc_addr *addr, 90void gsc_hw_set_input_addr(struct gsc_dev *dev, struct gsc_addr *addr,
91 int index) 91 int index)
92{ 92{
93 pr_debug("src_buf[%d]: 0x%X, cb: 0x%X, cr: 0x%X", index, 93 pr_debug("src_buf[%d]: %pad, cb: %pad, cr: %pad", index,
94 addr->y, addr->cb, addr->cr); 94 &addr->y, &addr->cb, &addr->cr);
95 writel(addr->y, dev->regs + GSC_IN_BASE_ADDR_Y(index)); 95 writel(addr->y, dev->regs + GSC_IN_BASE_ADDR_Y(index));
96 writel(addr->cb, dev->regs + GSC_IN_BASE_ADDR_CB(index)); 96 writel(addr->cb, dev->regs + GSC_IN_BASE_ADDR_CB(index));
97 writel(addr->cr, dev->regs + GSC_IN_BASE_ADDR_CR(index)); 97 writel(addr->cr, dev->regs + GSC_IN_BASE_ADDR_CR(index));
@@ -101,8 +101,8 @@ void gsc_hw_set_input_addr(struct gsc_dev *dev, struct gsc_addr *addr,
101void gsc_hw_set_output_addr(struct gsc_dev *dev, 101void gsc_hw_set_output_addr(struct gsc_dev *dev,
102 struct gsc_addr *addr, int index) 102 struct gsc_addr *addr, int index)
103{ 103{
104 pr_debug("dst_buf[%d]: 0x%X, cb: 0x%X, cr: 0x%X", 104 pr_debug("dst_buf[%d]: %pad, cb: %pad, cr: %pad",
105 index, addr->y, addr->cb, addr->cr); 105 index, &addr->y, &addr->cb, &addr->cr);
106 writel(addr->y, dev->regs + GSC_OUT_BASE_ADDR_Y(index)); 106 writel(addr->y, dev->regs + GSC_OUT_BASE_ADDR_Y(index));
107 writel(addr->cb, dev->regs + GSC_OUT_BASE_ADDR_CB(index)); 107 writel(addr->cb, dev->regs + GSC_OUT_BASE_ADDR_CB(index));
108 writel(addr->cr, dev->regs + GSC_OUT_BASE_ADDR_CR(index)); 108 writel(addr->cr, dev->regs + GSC_OUT_BASE_ADDR_CR(index));
diff --git a/drivers/media/platform/exynos4-is/Kconfig b/drivers/media/platform/exynos4-is/Kconfig
index 5dcaa0a80540..77c951237744 100644
--- a/drivers/media/platform/exynos4-is/Kconfig
+++ b/drivers/media/platform/exynos4-is/Kconfig
@@ -2,7 +2,7 @@
2config VIDEO_SAMSUNG_EXYNOS4_IS 2config VIDEO_SAMSUNG_EXYNOS4_IS
3 bool "Samsung S5P/EXYNOS4 SoC series Camera Subsystem driver" 3 bool "Samsung S5P/EXYNOS4 SoC series Camera Subsystem driver"
4 depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API 4 depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
5 depends on (PLAT_S5P || ARCH_EXYNOS) 5 depends on (PLAT_S5P || ARCH_EXYNOS || COMPILE_TEST)
6 depends on OF && COMMON_CLK 6 depends on OF && COMMON_CLK
7 help 7 help
8 Say Y here to enable camera host interface devices for 8 Say Y here to enable camera host interface devices for
@@ -16,6 +16,7 @@ config VIDEO_EXYNOS4_IS_COMMON
16config VIDEO_S5P_FIMC 16config VIDEO_S5P_FIMC
17 tristate "S5P/EXYNOS4 FIMC/CAMIF camera interface driver" 17 tristate "S5P/EXYNOS4 FIMC/CAMIF camera interface driver"
18 depends on I2C 18 depends on I2C
19 depends on HAS_DMA
19 select VIDEOBUF2_DMA_CONTIG 20 select VIDEOBUF2_DMA_CONTIG
20 select V4L2_MEM2MEM_DEV 21 select V4L2_MEM2MEM_DEV
21 select MFD_SYSCON 22 select MFD_SYSCON
@@ -43,6 +44,7 @@ if SOC_EXYNOS4212 || SOC_EXYNOS4412 || SOC_EXYNOS5250
43config VIDEO_EXYNOS_FIMC_LITE 44config VIDEO_EXYNOS_FIMC_LITE
44 tristate "EXYNOS FIMC-LITE camera interface driver" 45 tristate "EXYNOS FIMC-LITE camera interface driver"
45 depends on I2C 46 depends on I2C
47 depends on HAS_DMA
46 select VIDEOBUF2_DMA_CONTIG 48 select VIDEOBUF2_DMA_CONTIG
47 select VIDEO_EXYNOS4_IS_COMMON 49 select VIDEO_EXYNOS4_IS_COMMON
48 help 50 help
@@ -55,6 +57,7 @@ endif
55 57
56config VIDEO_EXYNOS4_FIMC_IS 58config VIDEO_EXYNOS4_FIMC_IS
57 tristate "EXYNOS4x12 FIMC-IS (Imaging Subsystem) driver" 59 tristate "EXYNOS4x12 FIMC-IS (Imaging Subsystem) driver"
60 depends on HAS_DMA
58 select VIDEOBUF2_DMA_CONTIG 61 select VIDEOBUF2_DMA_CONTIG
59 depends on OF 62 depends on OF
60 select FW_LOADER 63 select FW_LOADER
diff --git a/drivers/media/platform/exynos4-is/fimc-is-errno.c b/drivers/media/platform/exynos4-is/fimc-is-errno.c
index e8519e151c1a..e050e63fe358 100644
--- a/drivers/media/platform/exynos4-is/fimc-is-errno.c
+++ b/drivers/media/platform/exynos4-is/fimc-is-errno.c
@@ -15,7 +15,7 @@
15 15
16#include "fimc-is-errno.h" 16#include "fimc-is-errno.h"
17 17
18const char * const fimc_is_param_strerr(unsigned int error) 18const char *fimc_is_param_strerr(unsigned int error)
19{ 19{
20 switch (error) { 20 switch (error) {
21 case ERROR_COMMON_CMD: 21 case ERROR_COMMON_CMD:
@@ -146,7 +146,7 @@ const char * const fimc_is_param_strerr(unsigned int error)
146 } 146 }
147} 147}
148 148
149const char * const fimc_is_strerr(unsigned int error) 149const char *fimc_is_strerr(unsigned int error)
150{ 150{
151 error &= ~IS_ERROR_TIME_OUT_FLAG; 151 error &= ~IS_ERROR_TIME_OUT_FLAG;
152 152
diff --git a/drivers/media/platform/exynos4-is/fimc-is-errno.h b/drivers/media/platform/exynos4-is/fimc-is-errno.h
index 3de6f6da6f87..ef981e74513a 100644
--- a/drivers/media/platform/exynos4-is/fimc-is-errno.h
+++ b/drivers/media/platform/exynos4-is/fimc-is-errno.h
@@ -242,7 +242,7 @@ enum fimc_is_error {
242 ERROR_SCALER_FLIP = 521, 242 ERROR_SCALER_FLIP = 521,
243}; 243};
244 244
245const char * const fimc_is_strerr(unsigned int error); 245const char *fimc_is_strerr(unsigned int error);
246const char * const fimc_is_param_strerr(unsigned int error); 246const char *fimc_is_param_strerr(unsigned int error);
247 247
248#endif /* FIMC_IS_ERR_H_ */ 248#endif /* FIMC_IS_ERR_H_ */
diff --git a/drivers/media/platform/exynos4-is/fimc-is-param.c b/drivers/media/platform/exynos4-is/fimc-is-param.c
index bf1465d1bf6d..72b9b436c5c0 100644
--- a/drivers/media/platform/exynos4-is/fimc-is-param.c
+++ b/drivers/media/platform/exynos4-is/fimc-is-param.c
@@ -667,7 +667,6 @@ void __is_set_fd_config_orientation_val(struct fimc_is *is, u32 val)
667void fimc_is_set_initial_params(struct fimc_is *is) 667void fimc_is_set_initial_params(struct fimc_is *is)
668{ 668{
669 struct global_param *global; 669 struct global_param *global;
670 struct sensor_param *sensor;
671 struct isp_param *isp; 670 struct isp_param *isp;
672 struct drc_param *drc; 671 struct drc_param *drc;
673 struct fd_param *fd; 672 struct fd_param *fd;
@@ -676,7 +675,6 @@ void fimc_is_set_initial_params(struct fimc_is *is)
676 675
677 index = is->config_index; 676 index = is->config_index;
678 global = &is->config[index].global; 677 global = &is->config[index].global;
679 sensor = &is->config[index].sensor;
680 isp = &is->config[index].isp; 678 isp = &is->config[index].isp;
681 drc = &is->config[index].drc; 679 drc = &is->config[index].drc;
682 fd = &is->config[index].fd; 680 fd = &is->config[index].fd;
diff --git a/drivers/media/platform/exynos4-is/fimc-is.c b/drivers/media/platform/exynos4-is/fimc-is.c
index 5476dce3ad29..22162b2567da 100644
--- a/drivers/media/platform/exynos4-is/fimc-is.c
+++ b/drivers/media/platform/exynos4-is/fimc-is.c
@@ -388,7 +388,7 @@ static void fimc_is_load_firmware(const struct firmware *fw, void *context)
388 mutex_lock(&is->lock); 388 mutex_lock(&is->lock);
389 389
390 if (fw->size < FIMC_IS_FW_SIZE_MIN || fw->size > FIMC_IS_FW_SIZE_MAX) { 390 if (fw->size < FIMC_IS_FW_SIZE_MIN || fw->size > FIMC_IS_FW_SIZE_MAX) {
391 dev_err(dev, "wrong firmware size: %d\n", fw->size); 391 dev_err(dev, "wrong firmware size: %zu\n", fw->size);
392 goto done; 392 goto done;
393 } 393 }
394 394
@@ -416,7 +416,7 @@ static void fimc_is_load_firmware(const struct firmware *fw, void *context)
416 416
417 dev_info(dev, "loaded firmware: %s, rev. %s\n", 417 dev_info(dev, "loaded firmware: %s, rev. %s\n",
418 is->fw.info, is->fw.version); 418 is->fw.info, is->fw.version);
419 dev_dbg(dev, "FW size: %d, paddr: %#x\n", fw->size, is->memory.paddr); 419 dev_dbg(dev, "FW size: %zu, paddr: %pad\n", fw->size, &is->memory.paddr);
420 420
421 is->is_shared_region->chip_id = 0xe4412; 421 is->is_shared_region->chip_id = 0xe4412;
422 is->is_shared_region->chip_rev_no = 1; 422 is->is_shared_region->chip_rev_no = 1;
@@ -693,9 +693,9 @@ int fimc_is_hw_initialize(struct fimc_is *is)
693 return -EIO; 693 return -EIO;
694 } 694 }
695 695
696 pr_debug("shared region: %#x, parameter region: %#x\n", 696 pr_debug("shared region: %pad, parameter region: %pad\n",
697 is->memory.paddr + FIMC_IS_SHARED_REGION_OFFSET, 697 &is->memory.paddr + FIMC_IS_SHARED_REGION_OFFSET,
698 is->is_dma_p_region); 698 &is->is_dma_p_region);
699 699
700 is->setfile.sub_index = 0; 700 is->setfile.sub_index = 0;
701 701
diff --git a/drivers/media/platform/exynos4-is/fimc-isp-video.c b/drivers/media/platform/exynos4-is/fimc-isp-video.c
index 93f9cf2ebcd6..76b6b4d14616 100644
--- a/drivers/media/platform/exynos4-is/fimc-isp-video.c
+++ b/drivers/media/platform/exynos4-is/fimc-isp-video.c
@@ -219,9 +219,9 @@ static void isp_video_capture_buffer_queue(struct vb2_buffer *vb)
219 ivb->dma_addr[i]; 219 ivb->dma_addr[i];
220 220
221 isp_dbg(2, &video->ve.vdev, 221 isp_dbg(2, &video->ve.vdev,
222 "dma_buf %d (%d/%d/%d) addr: %#x\n", 222 "dma_buf %pad (%d/%d/%d) addr: %pad\n",
223 buf_index, ivb->index, i, vb->v4l2_buf.index, 223 &buf_index, ivb->index, i, vb->v4l2_buf.index,
224 ivb->dma_addr[i]); 224 &ivb->dma_addr[i]);
225 } 225 }
226 226
227 if (++video->buf_count < video->reqbufs_count) 227 if (++video->buf_count < video->reqbufs_count)
@@ -313,7 +313,6 @@ static int isp_video_release(struct file *file)
313 struct fimc_is_video *ivc = &isp->video_capture; 313 struct fimc_is_video *ivc = &isp->video_capture;
314 struct media_entity *entity = &ivc->ve.vdev.entity; 314 struct media_entity *entity = &ivc->ve.vdev.entity;
315 struct media_device *mdev = entity->parent; 315 struct media_device *mdev = entity->parent;
316 int ret = 0;
317 316
318 mutex_lock(&isp->video_lock); 317 mutex_lock(&isp->video_lock);
319 318
@@ -335,7 +334,7 @@ static int isp_video_release(struct file *file)
335 pm_runtime_put(&isp->pdev->dev); 334 pm_runtime_put(&isp->pdev->dev);
336 mutex_unlock(&isp->video_lock); 335 mutex_unlock(&isp->video_lock);
337 336
338 return ret; 337 return 0;
339} 338}
340 339
341static const struct v4l2_file_operations isp_video_fops = { 340static const struct v4l2_file_operations isp_video_fops = {
diff --git a/drivers/media/platform/exynos4-is/media-dev.c b/drivers/media/platform/exynos4-is/media-dev.c
index 344718df5c62..54c49d5e7690 100644
--- a/drivers/media/platform/exynos4-is/media-dev.c
+++ b/drivers/media/platform/exynos4-is/media-dev.c
@@ -1098,8 +1098,10 @@ static int fimc_md_link_notify(struct media_link *link, unsigned int flags,
1098 if (notification == MEDIA_DEV_NOTIFY_PRE_LINK_CH) { 1098 if (notification == MEDIA_DEV_NOTIFY_PRE_LINK_CH) {
1099 if (!(flags & MEDIA_LNK_FL_ENABLED)) 1099 if (!(flags & MEDIA_LNK_FL_ENABLED))
1100 ret = __fimc_md_modify_pipelines(sink, false); 1100 ret = __fimc_md_modify_pipelines(sink, false);
1101#if 0
1101 else 1102 else
1102 ; /* TODO: Link state change validation */ 1103 /* TODO: Link state change validation */
1104#endif
1103 /* After link activation */ 1105 /* After link activation */
1104 } else if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH && 1106 } else if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH &&
1105 (link->flags & MEDIA_LNK_FL_ENABLED)) { 1107 (link->flags & MEDIA_LNK_FL_ENABLED)) {
diff --git a/drivers/media/platform/exynos4-is/mipi-csis.c b/drivers/media/platform/exynos4-is/mipi-csis.c
index ae54ef5f535d..db6fd14d1936 100644
--- a/drivers/media/platform/exynos4-is/mipi-csis.c
+++ b/drivers/media/platform/exynos4-is/mipi-csis.c
@@ -25,6 +25,7 @@
25#include <linux/platform_device.h> 25#include <linux/platform_device.h>
26#include <linux/pm_runtime.h> 26#include <linux/pm_runtime.h>
27#include <linux/regulator/consumer.h> 27#include <linux/regulator/consumer.h>
28#include <linux/sizes.h>
28#include <linux/slab.h> 29#include <linux/slab.h>
29#include <linux/spinlock.h> 30#include <linux/spinlock.h>
30#include <linux/videodev2.h> 31#include <linux/videodev2.h>
@@ -752,7 +753,7 @@ static int s5pcsis_parse_dt(struct platform_device *pdev,
752 v4l2_of_parse_endpoint(node, &endpoint); 753 v4l2_of_parse_endpoint(node, &endpoint);
753 754
754 state->index = endpoint.base.port - FIMC_INPUT_MIPI_CSI2_0; 755 state->index = endpoint.base.port - FIMC_INPUT_MIPI_CSI2_0;
755 if (state->index < 0 || state->index >= CSIS_MAX_ENTITIES) 756 if (state->index >= CSIS_MAX_ENTITIES)
756 return -ENXIO; 757 return -ENXIO;
757 758
758 /* Get MIPI CSI-2 bus configration from the endpoint node. */ 759 /* Get MIPI CSI-2 bus configration from the endpoint node. */
diff --git a/drivers/media/platform/marvell-ccic/Kconfig b/drivers/media/platform/marvell-ccic/Kconfig
index bf739e3b3398..6265d36adceb 100644
--- a/drivers/media/platform/marvell-ccic/Kconfig
+++ b/drivers/media/platform/marvell-ccic/Kconfig
@@ -1,6 +1,7 @@
1config VIDEO_CAFE_CCIC 1config VIDEO_CAFE_CCIC
2 tristate "Marvell 88ALP01 (Cafe) CMOS Camera Controller support" 2 tristate "Marvell 88ALP01 (Cafe) CMOS Camera Controller support"
3 depends on PCI && I2C && VIDEO_V4L2 3 depends on PCI && I2C && VIDEO_V4L2
4 depends on HAS_DMA
4 select VIDEO_OV7670 5 select VIDEO_OV7670
5 select VIDEOBUF2_VMALLOC 6 select VIDEOBUF2_VMALLOC
6 select VIDEOBUF2_DMA_CONTIG 7 select VIDEOBUF2_DMA_CONTIG
@@ -12,6 +13,7 @@ config VIDEO_CAFE_CCIC
12config VIDEO_MMP_CAMERA 13config VIDEO_MMP_CAMERA
13 tristate "Marvell Armada 610 integrated camera controller support" 14 tristate "Marvell Armada 610 integrated camera controller support"
14 depends on ARCH_MMP && I2C && VIDEO_V4L2 15 depends on ARCH_MMP && I2C && VIDEO_V4L2
16 depends on HAS_DMA
15 select VIDEO_OV7670 17 select VIDEO_OV7670
16 select I2C_GPIO 18 select I2C_GPIO
17 select VIDEOBUF2_DMA_SG 19 select VIDEOBUF2_DMA_SG
diff --git a/drivers/media/platform/marvell-ccic/mcam-core.c b/drivers/media/platform/marvell-ccic/mcam-core.c
index be4b51212106..7a86c77bffa0 100644
--- a/drivers/media/platform/marvell-ccic/mcam-core.c
+++ b/drivers/media/platform/marvell-ccic/mcam-core.c
@@ -67,7 +67,7 @@ MODULE_PARM_DESC(dma_buf_size,
67 "parameters require larger buffers, an attempt to reallocate " 67 "parameters require larger buffers, an attempt to reallocate "
68 "will be made."); 68 "will be made.");
69#else /* MCAM_MODE_VMALLOC */ 69#else /* MCAM_MODE_VMALLOC */
70static const bool alloc_bufs_at_read = 0; 70static const bool alloc_bufs_at_read;
71static const int n_dma_bufs = 3; /* Used by S/G_PARM */ 71static const int n_dma_bufs = 3; /* Used by S/G_PARM */
72#endif /* MCAM_MODE_VMALLOC */ 72#endif /* MCAM_MODE_VMALLOC */
73 73
diff --git a/drivers/media/platform/mx2_emmaprp.c b/drivers/media/platform/mx2_emmaprp.c
index fa8f7cabe364..4971ff21f82b 100644
--- a/drivers/media/platform/mx2_emmaprp.c
+++ b/drivers/media/platform/mx2_emmaprp.c
@@ -27,7 +27,7 @@
27#include <media/v4l2-device.h> 27#include <media/v4l2-device.h>
28#include <media/v4l2-ioctl.h> 28#include <media/v4l2-ioctl.h>
29#include <media/videobuf2-dma-contig.h> 29#include <media/videobuf2-dma-contig.h>
30#include <asm/sizes.h> 30#include <linux/sizes.h>
31 31
32#define EMMAPRP_MODULE_NAME "mem2mem-emmaprp" 32#define EMMAPRP_MODULE_NAME "mem2mem-emmaprp"
33 33
diff --git a/drivers/media/platform/omap/Kconfig b/drivers/media/platform/omap/Kconfig
index 37ad446b35b3..05de442d24e4 100644
--- a/drivers/media/platform/omap/Kconfig
+++ b/drivers/media/platform/omap/Kconfig
@@ -3,7 +3,7 @@ config VIDEO_OMAP2_VOUT_VRFB
3 3
4config VIDEO_OMAP2_VOUT 4config VIDEO_OMAP2_VOUT
5 tristate "OMAP2/OMAP3 V4L2-Display driver" 5 tristate "OMAP2/OMAP3 V4L2-Display driver"
6 depends on ARCH_OMAP2 || ARCH_OMAP3 6 depends on ARCH_OMAP2 || ARCH_OMAP3 || (COMPILE_TEST && HAS_MMU)
7 select VIDEOBUF_GEN 7 select VIDEOBUF_GEN
8 select VIDEOBUF_DMA_CONTIG 8 select VIDEOBUF_DMA_CONTIG
9 select OMAP2_DSS if HAS_IOMEM && ARCH_OMAP2PLUS 9 select OMAP2_DSS if HAS_IOMEM && ARCH_OMAP2PLUS
diff --git a/drivers/media/platform/omap/omap_vout.c b/drivers/media/platform/omap/omap_vout.c
index 2d177fa58471..64ab6fb06b9c 100644
--- a/drivers/media/platform/omap/omap_vout.c
+++ b/drivers/media/platform/omap/omap_vout.c
@@ -369,7 +369,7 @@ static int omapvid_setup_overlay(struct omap_vout_device *vout,
369{ 369{
370 int ret = 0; 370 int ret = 0;
371 struct omap_overlay_info info; 371 struct omap_overlay_info info;
372 int cropheight, cropwidth, pixheight, pixwidth; 372 int cropheight, cropwidth, pixwidth;
373 373
374 if ((ovl->caps & OMAP_DSS_OVL_CAP_SCALE) == 0 && 374 if ((ovl->caps & OMAP_DSS_OVL_CAP_SCALE) == 0 &&
375 (outw != vout->pix.width || outh != vout->pix.height)) { 375 (outw != vout->pix.width || outh != vout->pix.height)) {
@@ -389,12 +389,10 @@ static int omapvid_setup_overlay(struct omap_vout_device *vout,
389 if (is_rotation_90_or_270(vout)) { 389 if (is_rotation_90_or_270(vout)) {
390 cropheight = vout->crop.width; 390 cropheight = vout->crop.width;
391 cropwidth = vout->crop.height; 391 cropwidth = vout->crop.height;
392 pixheight = vout->pix.width;
393 pixwidth = vout->pix.height; 392 pixwidth = vout->pix.height;
394 } else { 393 } else {
395 cropheight = vout->crop.height; 394 cropheight = vout->crop.height;
396 cropwidth = vout->crop.width; 395 cropwidth = vout->crop.width;
397 pixheight = vout->pix.height;
398 pixwidth = vout->pix.width; 396 pixwidth = vout->pix.width;
399 } 397 }
400 398
@@ -991,7 +989,7 @@ static int omap_vout_release(struct file *file)
991 mask = DISPC_IRQ_VSYNC | DISPC_IRQ_EVSYNC_EVEN | 989 mask = DISPC_IRQ_VSYNC | DISPC_IRQ_EVSYNC_EVEN |
992 DISPC_IRQ_EVSYNC_ODD | DISPC_IRQ_VSYNC2; 990 DISPC_IRQ_EVSYNC_ODD | DISPC_IRQ_VSYNC2;
993 omap_dispc_unregister_isr(omap_vout_isr, vout, mask); 991 omap_dispc_unregister_isr(omap_vout_isr, vout, mask);
994 vout->streaming = 0; 992 vout->streaming = false;
995 993
996 videobuf_streamoff(q); 994 videobuf_streamoff(q);
997 videobuf_queue_cancel(q); 995 videobuf_queue_cancel(q);
@@ -1451,12 +1449,10 @@ static int vidioc_s_ctrl(struct file *file, void *fh, struct v4l2_control *a)
1451 } 1449 }
1452 case V4L2_CID_VFLIP: 1450 case V4L2_CID_VFLIP:
1453 { 1451 {
1454 struct omap_overlay *ovl;
1455 struct omapvideo_info *ovid; 1452 struct omapvideo_info *ovid;
1456 unsigned int mirror = a->value; 1453 unsigned int mirror = a->value;
1457 1454
1458 ovid = &vout->vid_info; 1455 ovid = &vout->vid_info;
1459 ovl = ovid->overlays[0];
1460 1456
1461 mutex_lock(&vout->lock); 1457 mutex_lock(&vout->lock);
1462 if (mirror && ovid->rotation_type == VOUT_ROT_NONE) { 1458 if (mirror && ovid->rotation_type == VOUT_ROT_NONE) {
@@ -1489,7 +1485,7 @@ static int vidioc_reqbufs(struct file *file, void *fh,
1489 struct omap_vout_device *vout = fh; 1485 struct omap_vout_device *vout = fh;
1490 struct videobuf_queue *q = &vout->vbq; 1486 struct videobuf_queue *q = &vout->vbq;
1491 1487
1492 if ((req->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) || (req->count < 0)) 1488 if (req->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
1493 return -EINVAL; 1489 return -EINVAL;
1494 /* if memory is not mmp or userptr 1490 /* if memory is not mmp or userptr
1495 return error */ 1491 return error */
@@ -1648,7 +1644,7 @@ static int vidioc_streamon(struct file *file, void *fh, enum v4l2_buf_type i)
1648 vout->field_id = 0; 1644 vout->field_id = 0;
1649 1645
1650 /* set flag here. Next QBUF will start DMA */ 1646 /* set flag here. Next QBUF will start DMA */
1651 vout->streaming = 1; 1647 vout->streaming = true;
1652 1648
1653 vout->first_int = 1; 1649 vout->first_int = 1;
1654 1650
@@ -1708,7 +1704,7 @@ static int vidioc_streamoff(struct file *file, void *fh, enum v4l2_buf_type i)
1708 if (!vout->streaming) 1704 if (!vout->streaming)
1709 return -EINVAL; 1705 return -EINVAL;
1710 1706
1711 vout->streaming = 0; 1707 vout->streaming = false;
1712 mask = DISPC_IRQ_VSYNC | DISPC_IRQ_EVSYNC_EVEN | DISPC_IRQ_EVSYNC_ODD 1708 mask = DISPC_IRQ_VSYNC | DISPC_IRQ_EVSYNC_EVEN | DISPC_IRQ_EVSYNC_ODD
1713 | DISPC_IRQ_VSYNC2; 1709 | DISPC_IRQ_VSYNC2;
1714 1710
@@ -1916,7 +1912,7 @@ static int __init omap_vout_setup_video_data(struct omap_vout_device *vout)
1916 control[0].id = V4L2_CID_ROTATE; 1912 control[0].id = V4L2_CID_ROTATE;
1917 control[0].value = 0; 1913 control[0].value = 0;
1918 vout->rotation = 0; 1914 vout->rotation = 0;
1919 vout->mirror = 0; 1915 vout->mirror = false;
1920 vout->control[2].id = V4L2_CID_HFLIP; 1916 vout->control[2].id = V4L2_CID_HFLIP;
1921 vout->control[2].value = 0; 1917 vout->control[2].value = 0;
1922 if (vout->vid_info.rotation_type == VOUT_ROT_VRFB) 1918 if (vout->vid_info.rotation_type == VOUT_ROT_VRFB)
diff --git a/drivers/media/platform/omap/omap_vout_vrfb.c b/drivers/media/platform/omap/omap_vout_vrfb.c
index 62e7e5783ce8..aa39306afc73 100644
--- a/drivers/media/platform/omap/omap_vout_vrfb.c
+++ b/drivers/media/platform/omap/omap_vout_vrfb.c
@@ -148,7 +148,7 @@ int omap_vout_setup_vrfb_bufs(struct platform_device *pdev, int vid_num,
148 ret = -ENOMEM; 148 ret = -ENOMEM;
149 goto release_vrfb_ctx; 149 goto release_vrfb_ctx;
150 } 150 }
151 vout->vrfb_static_allocation = 1; 151 vout->vrfb_static_allocation = true;
152 } 152 }
153 return 0; 153 return 0;
154 154
@@ -336,7 +336,7 @@ void omap_vout_calculate_vrfb_offset(struct omap_vout_device *vout)
336 offset = vout->vrfb_context[0].yoffset * 336 offset = vout->vrfb_context[0].yoffset *
337 vout->vrfb_context[0].bytespp; 337 vout->vrfb_context[0].bytespp;
338 temp_ps = ps / vr_ps; 338 temp_ps = ps / vr_ps;
339 if (mirroring == 0) { 339 if (!mirroring) {
340 *cropped_offset = offset + line_length * 340 *cropped_offset = offset + line_length *
341 temp_ps * cleft + crop->top * temp_ps; 341 temp_ps * cleft + crop->top * temp_ps;
342 } else { 342 } else {
@@ -350,7 +350,7 @@ void omap_vout_calculate_vrfb_offset(struct omap_vout_device *vout)
350 vout->vrfb_context[0].bytespp) + 350 vout->vrfb_context[0].bytespp) +
351 (vout->vrfb_context[0].xoffset * 351 (vout->vrfb_context[0].xoffset *
352 vout->vrfb_context[0].bytespp)); 352 vout->vrfb_context[0].bytespp));
353 if (mirroring == 0) { 353 if (!mirroring) {
354 *cropped_offset = offset + (line_length * ps * ctop) + 354 *cropped_offset = offset + (line_length * ps * ctop) +
355 (cleft / vr_ps) * ps; 355 (cleft / vr_ps) * ps;
356 356
@@ -364,7 +364,7 @@ void omap_vout_calculate_vrfb_offset(struct omap_vout_device *vout)
364 offset = MAX_PIXELS_PER_LINE * vout->vrfb_context[0].xoffset * 364 offset = MAX_PIXELS_PER_LINE * vout->vrfb_context[0].xoffset *
365 vout->vrfb_context[0].bytespp; 365 vout->vrfb_context[0].bytespp;
366 temp_ps = ps / vr_ps; 366 temp_ps = ps / vr_ps;
367 if (mirroring == 0) { 367 if (!mirroring) {
368 *cropped_offset = offset + line_length * 368 *cropped_offset = offset + line_length *
369 temp_ps * crop->left + ctop * ps; 369 temp_ps * crop->left + ctop * ps;
370 } else { 370 } else {
@@ -375,7 +375,7 @@ void omap_vout_calculate_vrfb_offset(struct omap_vout_device *vout)
375 } 375 }
376 break; 376 break;
377 case dss_rotation_0_degree: 377 case dss_rotation_0_degree:
378 if (mirroring == 0) { 378 if (!mirroring) {
379 *cropped_offset = (line_length * ps) * 379 *cropped_offset = (line_length * ps) *
380 crop->top + (crop->left / vr_ps) * ps; 380 crop->top + (crop->left / vr_ps) * ps;
381 } else { 381 } else {
diff --git a/drivers/media/platform/omap/omap_vout_vrfb.h b/drivers/media/platform/omap/omap_vout_vrfb.h
index ffde741e0590..4c2314839b48 100644
--- a/drivers/media/platform/omap/omap_vout_vrfb.h
+++ b/drivers/media/platform/omap/omap_vout_vrfb.h
@@ -23,18 +23,18 @@ int omap_vout_prepare_vrfb(struct omap_vout_device *vout,
23 struct videobuf_buffer *vb); 23 struct videobuf_buffer *vb);
24void omap_vout_calculate_vrfb_offset(struct omap_vout_device *vout); 24void omap_vout_calculate_vrfb_offset(struct omap_vout_device *vout);
25#else 25#else
26void omap_vout_free_vrfb_buffers(struct omap_vout_device *vout) { } 26static inline void omap_vout_free_vrfb_buffers(struct omap_vout_device *vout) { };
27int omap_vout_setup_vrfb_bufs(struct platform_device *pdev, int vid_num, 27static inline int omap_vout_setup_vrfb_bufs(struct platform_device *pdev, int vid_num,
28 u32 static_vrfb_allocation) 28 u32 static_vrfb_allocation)
29 { return 0; } 29 { return 0; };
30void omap_vout_release_vrfb(struct omap_vout_device *vout) { } 30static inline void omap_vout_release_vrfb(struct omap_vout_device *vout) { };
31int omap_vout_vrfb_buffer_setup(struct omap_vout_device *vout, 31static inline int omap_vout_vrfb_buffer_setup(struct omap_vout_device *vout,
32 unsigned int *count, unsigned int startindex) 32 unsigned int *count, unsigned int startindex)
33 { return 0; } 33 { return 0; };
34int omap_vout_prepare_vrfb(struct omap_vout_device *vout, 34static inline int omap_vout_prepare_vrfb(struct omap_vout_device *vout,
35 struct videobuf_buffer *vb) 35 struct videobuf_buffer *vb)
36 { return 0; } 36 { return 0; };
37void omap_vout_calculate_vrfb_offset(struct omap_vout_device *vout) { } 37static inline void omap_vout_calculate_vrfb_offset(struct omap_vout_device *vout) { };
38#endif 38#endif
39 39
40#endif 40#endif
diff --git a/drivers/media/platform/omap3isp/cfa_coef_table.h b/drivers/media/platform/omap3isp/cfa_coef_table.h
index c84df0706f3e..e75b0eb2519b 100644
--- a/drivers/media/platform/omap3isp/cfa_coef_table.h
+++ b/drivers/media/platform/omap3isp/cfa_coef_table.h
@@ -11,16 +11,6 @@
11 * This program is free software; you can redistribute it and/or 11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License 12 * modify it under the terms of the GNU General Public License
13 * version 2 as published by the Free Software Foundation. 13 * version 2 as published by the Free Software Foundation.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
23 * 02110-1301 USA
24 */ 14 */
25 15
26{ 244, 0, 247, 0, 12, 27, 36, 247, 250, 0, 27, 0, 4, 250, 12, 244, 16{ 244, 0, 247, 0, 12, 27, 36, 247, 250, 0, 27, 0, 4, 250, 12, 244,
diff --git a/drivers/media/platform/omap3isp/gamma_table.h b/drivers/media/platform/omap3isp/gamma_table.h
index 78deebf7d965..3b507078016d 100644
--- a/drivers/media/platform/omap3isp/gamma_table.h
+++ b/drivers/media/platform/omap3isp/gamma_table.h
@@ -12,16 +12,6 @@
12 * This program is free software; you can redistribute it and/or modify 12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as 13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation. 14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 * 02110-1301 USA
25 */ 15 */
26 16
27 0, 0, 1, 2, 3, 3, 4, 5, 6, 8, 10, 12, 14, 16, 18, 20, 17 0, 0, 1, 2, 3, 3, 4, 5, 6, 8, 10, 12, 14, 16, 18, 20,
diff --git a/drivers/media/platform/omap3isp/isp.c b/drivers/media/platform/omap3isp/isp.c
index 2c7aa6720569..72265e58ca60 100644
--- a/drivers/media/platform/omap3isp/isp.c
+++ b/drivers/media/platform/omap3isp/isp.c
@@ -40,16 +40,6 @@
40 * This program is free software; you can redistribute it and/or modify 40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as 41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation. 42 * published by the Free Software Foundation.
43 *
44 * This program is distributed in the hope that it will be useful, but
45 * WITHOUT ANY WARRANTY; without even the implied warranty of
46 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
47 * General Public License for more details.
48 *
49 * You should have received a copy of the GNU General Public License
50 * along with this program; if not, write to the Free Software
51 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
52 * 02110-1301 USA
53 */ 43 */
54 44
55#include <asm/cacheflush.h> 45#include <asm/cacheflush.h>
@@ -999,16 +989,14 @@ static int isp_pipeline_disable(struct isp_pipeline *pipe)
999 video, s_stream, 0); 989 video, s_stream, 0);
1000 } 990 }
1001 991
1002 v4l2_subdev_call(subdev, video, s_stream, 0); 992 ret = v4l2_subdev_call(subdev, video, s_stream, 0);
1003 993
1004 if (subdev == &isp->isp_res.subdev) 994 if (subdev == &isp->isp_res.subdev)
1005 ret = isp_pipeline_wait(isp, isp_pipeline_wait_resizer); 995 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
1006 else if (subdev == &isp->isp_prev.subdev) 996 else if (subdev == &isp->isp_prev.subdev)
1007 ret = isp_pipeline_wait(isp, isp_pipeline_wait_preview); 997 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_preview);
1008 else if (subdev == &isp->isp_ccdc.subdev) 998 else if (subdev == &isp->isp_ccdc.subdev)
1009 ret = isp_pipeline_wait(isp, isp_pipeline_wait_ccdc); 999 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
1010 else
1011 ret = 0;
1012 1000
1013 /* Handle stop failures. An entity that fails to stop can 1001 /* Handle stop failures. An entity that fails to stop can
1014 * usually just be restarted. Flag the stop failure nonetheless 1002 * usually just be restarted. Flag the stop failure nonetheless
diff --git a/drivers/media/platform/omap3isp/isp.h b/drivers/media/platform/omap3isp/isp.h
index 2c314eea1252..cfdfc8714b6b 100644
--- a/drivers/media/platform/omap3isp/isp.h
+++ b/drivers/media/platform/omap3isp/isp.h
@@ -12,16 +12,6 @@
12 * This program is free software; you can redistribute it and/or modify 12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as 13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation. 14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 * 02110-1301 USA
25 */ 15 */
26 16
27#ifndef OMAP3_ISP_CORE_H 17#ifndef OMAP3_ISP_CORE_H
diff --git a/drivers/media/platform/omap3isp/ispccdc.c b/drivers/media/platform/omap3isp/ispccdc.c
index 9f727d20f06d..81a9dc053d58 100644
--- a/drivers/media/platform/omap3isp/ispccdc.c
+++ b/drivers/media/platform/omap3isp/ispccdc.c
@@ -12,16 +12,6 @@
12 * This program is free software; you can redistribute it and/or modify 12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as 13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation. 14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 * 02110-1301 USA
25 */ 15 */
26 16
27#include <linux/module.h> 17#include <linux/module.h>
@@ -491,14 +481,13 @@ done:
491static inline int ccdc_lsc_is_configured(struct isp_ccdc_device *ccdc) 481static inline int ccdc_lsc_is_configured(struct isp_ccdc_device *ccdc)
492{ 482{
493 unsigned long flags; 483 unsigned long flags;
484 int ret;
494 485
495 spin_lock_irqsave(&ccdc->lsc.req_lock, flags); 486 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
496 if (ccdc->lsc.active) { 487 ret = ccdc->lsc.active != NULL;
497 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
498 return 1;
499 }
500 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags); 488 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
501 return 0; 489
490 return ret;
502} 491}
503 492
504static int ccdc_lsc_enable(struct isp_ccdc_device *ccdc) 493static int ccdc_lsc_enable(struct isp_ccdc_device *ccdc)
@@ -818,29 +807,48 @@ static void ccdc_config_vp(struct isp_ccdc_device *ccdc)
818 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity); 807 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
819 struct isp_device *isp = to_isp_device(ccdc); 808 struct isp_device *isp = to_isp_device(ccdc);
820 const struct isp_format_info *info; 809 const struct isp_format_info *info;
810 struct v4l2_mbus_framefmt *format;
821 unsigned long l3_ick = pipe->l3_ick; 811 unsigned long l3_ick = pipe->l3_ick;
822 unsigned int max_div = isp->revision == ISP_REVISION_15_0 ? 64 : 8; 812 unsigned int max_div = isp->revision == ISP_REVISION_15_0 ? 64 : 8;
823 unsigned int div = 0; 813 unsigned int div = 0;
824 u32 fmtcfg_vp; 814 u32 fmtcfg = ISPCCDC_FMTCFG_VPEN;
815
816 format = &ccdc->formats[CCDC_PAD_SOURCE_VP];
817
818 if (!format->code) {
819 /* Disable the video port when the input format isn't supported.
820 * This is indicated by a pixel code set to 0.
821 */
822 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG);
823 return;
824 }
825
826 isp_reg_writel(isp, (0 << ISPCCDC_FMT_HORZ_FMTSPH_SHIFT) |
827 (format->width << ISPCCDC_FMT_HORZ_FMTLNH_SHIFT),
828 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_HORZ);
829 isp_reg_writel(isp, (0 << ISPCCDC_FMT_VERT_FMTSLV_SHIFT) |
830 ((format->height + 1) << ISPCCDC_FMT_VERT_FMTLNV_SHIFT),
831 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_VERT);
825 832
826 fmtcfg_vp = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG) 833 isp_reg_writel(isp, (format->width << ISPCCDC_VP_OUT_HORZ_NUM_SHIFT) |
827 & ~(ISPCCDC_FMTCFG_VPIN_MASK | ISPCCDC_FMTCFG_VPIF_FRQ_MASK); 834 (format->height << ISPCCDC_VP_OUT_VERT_NUM_SHIFT),
835 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VP_OUT);
828 836
829 info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code); 837 info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
830 838
831 switch (info->width) { 839 switch (info->width) {
832 case 8: 840 case 8:
833 case 10: 841 case 10:
834 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_9_0; 842 fmtcfg |= ISPCCDC_FMTCFG_VPIN_9_0;
835 break; 843 break;
836 case 11: 844 case 11:
837 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_10_1; 845 fmtcfg |= ISPCCDC_FMTCFG_VPIN_10_1;
838 break; 846 break;
839 case 12: 847 case 12:
840 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_11_2; 848 fmtcfg |= ISPCCDC_FMTCFG_VPIN_11_2;
841 break; 849 break;
842 case 13: 850 case 13:
843 fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_12_3; 851 fmtcfg |= ISPCCDC_FMTCFG_VPIN_12_3;
844 break; 852 break;
845 } 853 }
846 854
@@ -850,75 +858,59 @@ static void ccdc_config_vp(struct isp_ccdc_device *ccdc)
850 div = l3_ick / pipe->external_rate; 858 div = l3_ick / pipe->external_rate;
851 859
852 div = clamp(div, 2U, max_div); 860 div = clamp(div, 2U, max_div);
853 fmtcfg_vp |= (div - 2) << ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT; 861 fmtcfg |= (div - 2) << ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT;
854 862
855 isp_reg_writel(isp, fmtcfg_vp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG); 863 isp_reg_writel(isp, fmtcfg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG);
856}
857
858/*
859 * ccdc_enable_vp - Enable Video Port.
860 * @ccdc: Pointer to ISP CCDC device.
861 * @enable: 0 Disables VP, 1 Enables VP
862 *
863 * This is needed for outputting image to Preview, H3A and HIST ISP submodules.
864 */
865static void ccdc_enable_vp(struct isp_ccdc_device *ccdc, u8 enable)
866{
867 struct isp_device *isp = to_isp_device(ccdc);
868
869 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG,
870 ISPCCDC_FMTCFG_VPEN, enable ? ISPCCDC_FMTCFG_VPEN : 0);
871} 864}
872 865
873/* 866/*
874 * ccdc_config_outlineoffset - Configure memory saving output line offset 867 * ccdc_config_outlineoffset - Configure memory saving output line offset
875 * @ccdc: Pointer to ISP CCDC device. 868 * @ccdc: Pointer to ISP CCDC device.
876 * @offset: Address offset to start a new line. Must be twice the 869 * @bpl: Number of bytes per line when stored in memory.
877 * Output width and aligned on 32 byte boundary 870 * @field: Field order when storing interlaced formats in memory.
878 * @oddeven: Specifies the odd/even line pattern to be chosen to store the 871 *
879 * output. 872 * Configure the offsets for the line output control:
880 * @numlines: Set the value 0-3 for +1-4lines, 4-7 for -1-4lines. 873 *
874 * - The horizontal line offset is defined as the number of bytes between the
875 * start of two consecutive lines in memory. Set it to the given bytes per
876 * line value.
877 *
878 * - The field offset value is defined as the number of lines to offset the
879 * start of the field identified by FID = 1. Set it to one.
881 * 880 *
882 * - Configures the output line offset when stored in memory 881 * - The line offset values are defined as the number of lines (as defined by
883 * - Sets the odd/even line pattern to store the output 882 * the horizontal line offset) between the start of two consecutive lines for
884 * (EVENEVEN (1), ODDEVEN (2), EVENODD (3), ODDODD (4)) 883 * all combinations of odd/even lines in odd/even fields. When interleaving
885 * - Configures the number of even and odd line fields in case of rearranging 884 * fields set them all to two lines, and to one line otherwise.
886 * the lines.
887 */ 885 */
888static void ccdc_config_outlineoffset(struct isp_ccdc_device *ccdc, 886static void ccdc_config_outlineoffset(struct isp_ccdc_device *ccdc,
889 u32 offset, u8 oddeven, u8 numlines) 887 unsigned int bpl,
888 enum v4l2_field field)
890{ 889{
891 struct isp_device *isp = to_isp_device(ccdc); 890 struct isp_device *isp = to_isp_device(ccdc);
891 u32 sdofst = 0;
892 892
893 isp_reg_writel(isp, offset & 0xffff, 893 isp_reg_writel(isp, bpl & 0xffff, OMAP3_ISP_IOMEM_CCDC,
894 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HSIZE_OFF); 894 ISPCCDC_HSIZE_OFF);
895 895
896 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST, 896 switch (field) {
897 ISPCCDC_SDOFST_FINV); 897 case V4L2_FIELD_INTERLACED_TB:
898 898 case V4L2_FIELD_INTERLACED_BT:
899 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST, 899 /* When interleaving fields in memory offset field one by one
900 ISPCCDC_SDOFST_FOFST_4L); 900 * line and set the line offset to two lines.
901 901 */
902 switch (oddeven) { 902 sdofst |= (1 << ISPCCDC_SDOFST_LOFST0_SHIFT)
903 case EVENEVEN: 903 | (1 << ISPCCDC_SDOFST_LOFST1_SHIFT)
904 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST, 904 | (1 << ISPCCDC_SDOFST_LOFST2_SHIFT)
905 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST0_SHIFT); 905 | (1 << ISPCCDC_SDOFST_LOFST3_SHIFT);
906 break;
907 case ODDEVEN:
908 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
909 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST1_SHIFT);
910 break;
911 case EVENODD:
912 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
913 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST2_SHIFT);
914 break;
915 case ODDODD:
916 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
917 (numlines & 0x7) << ISPCCDC_SDOFST_LOFST3_SHIFT);
918 break; 906 break;
907
919 default: 908 default:
909 /* In all other cases set the line offsets to one line. */
920 break; 910 break;
921 } 911 }
912
913 isp_reg_writel(isp, sdofst, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST);
922} 914}
923 915
924/* 916/*
@@ -981,10 +973,16 @@ static void ccdc_config_sync_if(struct isp_ccdc_device *ccdc,
981 973
982 if (format->code == V4L2_MBUS_FMT_YUYV8_2X8 || 974 if (format->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
983 format->code == V4L2_MBUS_FMT_UYVY8_2X8) { 975 format->code == V4L2_MBUS_FMT_UYVY8_2X8) {
984 /* The bridge is enabled for YUV8 formats. Configure the input 976 /* According to the OMAP3 TRM the input mode only affects SYNC
985 * mode accordingly. 977 * mode, enabling BT.656 mode should take precedence. However,
978 * in practice setting the input mode to YCbCr data on 8 bits
979 * seems to be required in BT.656 mode. In SYNC mode set it to
980 * YCbCr on 16 bits as the bridge is enabled in that case.
986 */ 981 */
987 syn_mode |= ISPCCDC_SYN_MODE_INPMOD_YCBCR16; 982 if (ccdc->bt656)
983 syn_mode |= ISPCCDC_SYN_MODE_INPMOD_YCBCR8;
984 else
985 syn_mode |= ISPCCDC_SYN_MODE_INPMOD_YCBCR16;
988 } 986 }
989 987
990 switch (data_size) { 988 switch (data_size) {
@@ -1008,9 +1006,15 @@ static void ccdc_config_sync_if(struct isp_ccdc_device *ccdc,
1008 if (pdata && pdata->hs_pol) 1006 if (pdata && pdata->hs_pol)
1009 syn_mode |= ISPCCDC_SYN_MODE_HDPOL; 1007 syn_mode |= ISPCCDC_SYN_MODE_HDPOL;
1010 1008
1011 if (pdata && pdata->vs_pol) 1009 /* The polarity of the vertical sync signal output by the BT.656
1010 * decoder is not documented and seems to be active low.
1011 */
1012 if ((pdata && pdata->vs_pol) || ccdc->bt656)
1012 syn_mode |= ISPCCDC_SYN_MODE_VDPOL; 1013 syn_mode |= ISPCCDC_SYN_MODE_VDPOL;
1013 1014
1015 if (pdata && pdata->fld_pol)
1016 syn_mode |= ISPCCDC_SYN_MODE_FLDPOL;
1017
1014 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE); 1018 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1015 1019
1016 /* The CCDC_CFG.Y8POS bit is used in YCbCr8 input mode only. The 1020 /* The CCDC_CFG.Y8POS bit is used in YCbCr8 input mode only. The
@@ -1023,8 +1027,16 @@ static void ccdc_config_sync_if(struct isp_ccdc_device *ccdc,
1023 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, 1027 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1024 ISPCCDC_CFG_Y8POS); 1028 ISPCCDC_CFG_Y8POS);
1025 1029
1026 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF, 1030 /* Enable or disable BT.656 mode, including error correction for the
1027 ISPCCDC_REC656IF_R656ON); 1031 * synchronization codes.
1032 */
1033 if (ccdc->bt656)
1034 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
1035 ISPCCDC_REC656IF_R656ON | ISPCCDC_REC656IF_ECCFVH);
1036 else
1037 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
1038 ISPCCDC_REC656IF_R656ON | ISPCCDC_REC656IF_ECCFVH);
1039
1028} 1040}
1029 1041
1030/* CCDC formats descriptions */ 1042/* CCDC formats descriptions */
@@ -1115,17 +1127,33 @@ static void ccdc_configure(struct isp_ccdc_device *ccdc)
1115 unsigned long flags; 1127 unsigned long flags;
1116 unsigned int bridge; 1128 unsigned int bridge;
1117 unsigned int shift; 1129 unsigned int shift;
1130 unsigned int nph;
1131 unsigned int sph;
1118 u32 syn_mode; 1132 u32 syn_mode;
1119 u32 ccdc_pattern; 1133 u32 ccdc_pattern;
1120 1134
1135 ccdc->bt656 = false;
1136 ccdc->fields = 0;
1137
1121 pad = media_entity_remote_pad(&ccdc->pads[CCDC_PAD_SINK]); 1138 pad = media_entity_remote_pad(&ccdc->pads[CCDC_PAD_SINK]);
1122 sensor = media_entity_to_v4l2_subdev(pad->entity); 1139 sensor = media_entity_to_v4l2_subdev(pad->entity);
1123 if (ccdc->input == CCDC_INPUT_PARALLEL) 1140 if (ccdc->input == CCDC_INPUT_PARALLEL) {
1141 struct v4l2_mbus_config cfg;
1142 int ret;
1143
1144 ret = v4l2_subdev_call(sensor, video, g_mbus_config, &cfg);
1145 if (!ret)
1146 ccdc->bt656 = cfg.type == V4L2_MBUS_BT656;
1147
1124 pdata = &((struct isp_v4l2_subdevs_group *)sensor->host_priv) 1148 pdata = &((struct isp_v4l2_subdevs_group *)sensor->host_priv)
1125 ->bus.parallel; 1149 ->bus.parallel;
1150 }
1151
1152 /* CCDC_PAD_SINK */
1153 format = &ccdc->formats[CCDC_PAD_SINK];
1126 1154
1127 /* Compute the lane shifter shift value and enable the bridge when the 1155 /* Compute the lane shifter shift value and enable the bridge when the
1128 * input format is YUV. 1156 * input format is a non-BT.656 YUV variant.
1129 */ 1157 */
1130 fmt_src.pad = pad->index; 1158 fmt_src.pad = pad->index;
1131 fmt_src.which = V4L2_SUBDEV_FORMAT_ACTIVE; 1159 fmt_src.which = V4L2_SUBDEV_FORMAT_ACTIVE;
@@ -1134,12 +1162,13 @@ static void ccdc_configure(struct isp_ccdc_device *ccdc)
1134 depth_in = fmt_info->width; 1162 depth_in = fmt_info->width;
1135 } 1163 }
1136 1164
1137 fmt_info = omap3isp_video_format_info 1165 fmt_info = omap3isp_video_format_info(format->code);
1138 (isp->isp_ccdc.formats[CCDC_PAD_SINK].code);
1139 depth_out = fmt_info->width; 1166 depth_out = fmt_info->width;
1140 shift = depth_in - depth_out; 1167 shift = depth_in - depth_out;
1141 1168
1142 if (fmt_info->code == V4L2_MBUS_FMT_YUYV8_2X8) 1169 if (ccdc->bt656)
1170 bridge = ISPCTRL_PAR_BRIDGE_DISABLE;
1171 else if (fmt_info->code == V4L2_MBUS_FMT_YUYV8_2X8)
1143 bridge = ISPCTRL_PAR_BRIDGE_LENDIAN; 1172 bridge = ISPCTRL_PAR_BRIDGE_LENDIAN;
1144 else if (fmt_info->code == V4L2_MBUS_FMT_UYVY8_2X8) 1173 else if (fmt_info->code == V4L2_MBUS_FMT_UYVY8_2X8)
1145 bridge = ISPCTRL_PAR_BRIDGE_BENDIAN; 1174 bridge = ISPCTRL_PAR_BRIDGE_BENDIAN;
@@ -1148,6 +1177,7 @@ static void ccdc_configure(struct isp_ccdc_device *ccdc)
1148 1177
1149 omap3isp_configure_bridge(isp, ccdc->input, pdata, shift, bridge); 1178 omap3isp_configure_bridge(isp, ccdc->input, pdata, shift, bridge);
1150 1179
1180 /* Configure the sync interface. */
1151 ccdc_config_sync_if(ccdc, pdata, depth_out); 1181 ccdc_config_sync_if(ccdc, pdata, depth_out);
1152 1182
1153 syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE); 1183 syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
@@ -1167,9 +1197,6 @@ static void ccdc_configure(struct isp_ccdc_device *ccdc)
1167 else 1197 else
1168 syn_mode &= ~ISPCCDC_SYN_MODE_SDR2RSZ; 1198 syn_mode &= ~ISPCCDC_SYN_MODE_SDR2RSZ;
1169 1199
1170 /* CCDC_PAD_SINK */
1171 format = &ccdc->formats[CCDC_PAD_SINK];
1172
1173 /* Mosaic filter */ 1200 /* Mosaic filter */
1174 switch (format->code) { 1201 switch (format->code) {
1175 case V4L2_MBUS_FMT_SRGGB10_1X10: 1202 case V4L2_MBUS_FMT_SRGGB10_1X10:
@@ -1202,16 +1229,40 @@ static void ccdc_configure(struct isp_ccdc_device *ccdc)
1202 format = &ccdc->formats[CCDC_PAD_SOURCE_OF]; 1229 format = &ccdc->formats[CCDC_PAD_SOURCE_OF];
1203 crop = &ccdc->crop; 1230 crop = &ccdc->crop;
1204 1231
1205 isp_reg_writel(isp, (crop->left << ISPCCDC_HORZ_INFO_SPH_SHIFT) | 1232 /* The horizontal coordinates are expressed in pixel clock cycles. We
1206 ((crop->width - 1) << ISPCCDC_HORZ_INFO_NPH_SHIFT), 1233 * need two cycles per pixel in BT.656 mode, and one cycle per pixel in
1234 * SYNC mode regardless of the format as the bridge is enabled for YUV
1235 * formats in that case.
1236 */
1237 if (ccdc->bt656) {
1238 sph = crop->left * 2;
1239 nph = crop->width * 2 - 1;
1240 } else {
1241 sph = crop->left;
1242 nph = crop->width - 1;
1243 }
1244
1245 isp_reg_writel(isp, (sph << ISPCCDC_HORZ_INFO_SPH_SHIFT) |
1246 (nph << ISPCCDC_HORZ_INFO_NPH_SHIFT),
1207 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HORZ_INFO); 1247 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HORZ_INFO);
1208 isp_reg_writel(isp, crop->top << ISPCCDC_VERT_START_SLV0_SHIFT, 1248 isp_reg_writel(isp, (crop->top << ISPCCDC_VERT_START_SLV0_SHIFT) |
1249 (crop->top << ISPCCDC_VERT_START_SLV1_SHIFT),
1209 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_START); 1250 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_START);
1210 isp_reg_writel(isp, (crop->height - 1) 1251 isp_reg_writel(isp, (crop->height - 1)
1211 << ISPCCDC_VERT_LINES_NLV_SHIFT, 1252 << ISPCCDC_VERT_LINES_NLV_SHIFT,
1212 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_LINES); 1253 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_LINES);
1213 1254
1214 ccdc_config_outlineoffset(ccdc, ccdc->video_out.bpl_value, 0, 0); 1255 ccdc_config_outlineoffset(ccdc, ccdc->video_out.bpl_value,
1256 format->field);
1257
1258 /* When interleaving fields enable processing of the field input signal.
1259 * This will cause the line output control module to apply the field
1260 * offset to field 1.
1261 */
1262 if (ccdc->formats[CCDC_PAD_SINK].field == V4L2_FIELD_ALTERNATE &&
1263 (format->field == V4L2_FIELD_INTERLACED_TB ||
1264 format->field == V4L2_FIELD_INTERLACED_BT))
1265 syn_mode |= ISPCCDC_SYN_MODE_FLDMODE;
1215 1266
1216 /* The CCDC outputs data in UYVY order by default. Swap bytes to get 1267 /* The CCDC outputs data in UYVY order by default. Swap bytes to get
1217 * YUYV. 1268 * YUYV.
@@ -1223,8 +1274,11 @@ static void ccdc_configure(struct isp_ccdc_device *ccdc)
1223 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, 1274 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1224 ISPCCDC_CFG_BSWD); 1275 ISPCCDC_CFG_BSWD);
1225 1276
1226 /* Use PACK8 mode for 1byte per pixel formats. */ 1277 /* Use PACK8 mode for 1byte per pixel formats. Check for BT.656 mode
1227 if (omap3isp_video_format_info(format->code)->width <= 8) 1278 * explicitly as the driver reports 1X16 instead of 2X8 at the OF pad
1279 * for simplicity.
1280 */
1281 if (omap3isp_video_format_info(format->code)->width <= 8 || ccdc->bt656)
1228 syn_mode |= ISPCCDC_SYN_MODE_PACK8; 1282 syn_mode |= ISPCCDC_SYN_MODE_PACK8;
1229 else 1283 else
1230 syn_mode &= ~ISPCCDC_SYN_MODE_PACK8; 1284 syn_mode &= ~ISPCCDC_SYN_MODE_PACK8;
@@ -1232,18 +1286,7 @@ static void ccdc_configure(struct isp_ccdc_device *ccdc)
1232 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE); 1286 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1233 1287
1234 /* CCDC_PAD_SOURCE_VP */ 1288 /* CCDC_PAD_SOURCE_VP */
1235 format = &ccdc->formats[CCDC_PAD_SOURCE_VP]; 1289 ccdc_config_vp(ccdc);
1236
1237 isp_reg_writel(isp, (0 << ISPCCDC_FMT_HORZ_FMTSPH_SHIFT) |
1238 (format->width << ISPCCDC_FMT_HORZ_FMTLNH_SHIFT),
1239 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_HORZ);
1240 isp_reg_writel(isp, (0 << ISPCCDC_FMT_VERT_FMTSLV_SHIFT) |
1241 ((format->height + 1) << ISPCCDC_FMT_VERT_FMTLNV_SHIFT),
1242 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_VERT);
1243
1244 isp_reg_writel(isp, (format->width << ISPCCDC_VP_OUT_HORZ_NUM_SHIFT) |
1245 (format->height << ISPCCDC_VP_OUT_VERT_NUM_SHIFT),
1246 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VP_OUT);
1247 1290
1248 /* Lens shading correction. */ 1291 /* Lens shading correction. */
1249 spin_lock_irqsave(&ccdc->lsc.req_lock, flags); 1292 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
@@ -1277,6 +1320,8 @@ static void __ccdc_enable(struct isp_ccdc_device *ccdc, int enable)
1277 1320
1278 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR, 1321 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR,
1279 ISPCCDC_PCR_EN, enable ? ISPCCDC_PCR_EN : 0); 1322 ISPCCDC_PCR_EN, enable ? ISPCCDC_PCR_EN : 0);
1323
1324 ccdc->running = enable;
1280} 1325}
1281 1326
1282static int ccdc_disable(struct isp_ccdc_device *ccdc) 1327static int ccdc_disable(struct isp_ccdc_device *ccdc)
@@ -1287,6 +1332,8 @@ static int ccdc_disable(struct isp_ccdc_device *ccdc)
1287 spin_lock_irqsave(&ccdc->lock, flags); 1332 spin_lock_irqsave(&ccdc->lock, flags);
1288 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS) 1333 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS)
1289 ccdc->stopping = CCDC_STOP_REQUEST; 1334 ccdc->stopping = CCDC_STOP_REQUEST;
1335 if (!ccdc->running)
1336 ccdc->stopping = CCDC_STOP_FINISHED;
1290 spin_unlock_irqrestore(&ccdc->lock, flags); 1337 spin_unlock_irqrestore(&ccdc->lock, flags);
1291 1338
1292 ret = wait_event_timeout(ccdc->wait, 1339 ret = wait_event_timeout(ccdc->wait,
@@ -1369,14 +1416,14 @@ static int ccdc_sbl_wait_idle(struct isp_ccdc_device *ccdc,
1369 return -EBUSY; 1416 return -EBUSY;
1370} 1417}
1371 1418
1372/* __ccdc_handle_stopping - Handle CCDC and/or LSC stopping sequence 1419/* ccdc_handle_stopping - Handle CCDC and/or LSC stopping sequence
1373 * @ccdc: Pointer to ISP CCDC device. 1420 * @ccdc: Pointer to ISP CCDC device.
1374 * @event: Pointing which event trigger handler 1421 * @event: Pointing which event trigger handler
1375 * 1422 *
1376 * Return 1 when the event and stopping request combination is satisfied, 1423 * Return 1 when the event and stopping request combination is satisfied,
1377 * zero otherwise. 1424 * zero otherwise.
1378 */ 1425 */
1379static int __ccdc_handle_stopping(struct isp_ccdc_device *ccdc, u32 event) 1426static int ccdc_handle_stopping(struct isp_ccdc_device *ccdc, u32 event)
1380{ 1427{
1381 int rval = 0; 1428 int rval = 0;
1382 1429
@@ -1458,7 +1505,7 @@ static void ccdc_lsc_isr(struct isp_ccdc_device *ccdc, u32 events)
1458 if (ccdc->lsc.state == LSC_STATE_STOPPING) 1505 if (ccdc->lsc.state == LSC_STATE_STOPPING)
1459 ccdc->lsc.state = LSC_STATE_STOPPED; 1506 ccdc->lsc.state = LSC_STATE_STOPPED;
1460 1507
1461 if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_LSC_DONE)) 1508 if (ccdc_handle_stopping(ccdc, CCDC_EVENT_LSC_DONE))
1462 goto done; 1509 goto done;
1463 1510
1464 if (ccdc->lsc.state != LSC_STATE_RECONFIG) 1511 if (ccdc->lsc.state != LSC_STATE_RECONFIG)
@@ -1486,12 +1533,59 @@ done:
1486 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags); 1533 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1487} 1534}
1488 1535
1536/*
1537 * Check whether the CCDC has captured all fields necessary to complete the
1538 * buffer.
1539 */
1540static bool ccdc_has_all_fields(struct isp_ccdc_device *ccdc)
1541{
1542 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1543 struct isp_device *isp = to_isp_device(ccdc);
1544 enum v4l2_field of_field = ccdc->formats[CCDC_PAD_SOURCE_OF].field;
1545 enum v4l2_field field;
1546
1547 /* When the input is progressive fields don't matter. */
1548 if (of_field == V4L2_FIELD_NONE)
1549 return true;
1550
1551 /* Read the current field identifier. */
1552 field = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE)
1553 & ISPCCDC_SYN_MODE_FLDSTAT
1554 ? V4L2_FIELD_BOTTOM : V4L2_FIELD_TOP;
1555
1556 /* When capturing fields in alternate order just store the current field
1557 * identifier in the pipeline.
1558 */
1559 if (of_field == V4L2_FIELD_ALTERNATE) {
1560 pipe->field = field;
1561 return true;
1562 }
1563
1564 /* The format is interlaced. Make sure we've captured both fields. */
1565 ccdc->fields |= field == V4L2_FIELD_BOTTOM
1566 ? CCDC_FIELD_BOTTOM : CCDC_FIELD_TOP;
1567
1568 if (ccdc->fields != CCDC_FIELD_BOTH)
1569 return false;
1570
1571 /* Verify that the field just captured corresponds to the last field
1572 * needed based on the desired field order.
1573 */
1574 if ((of_field == V4L2_FIELD_INTERLACED_TB && field == V4L2_FIELD_TOP) ||
1575 (of_field == V4L2_FIELD_INTERLACED_BT && field == V4L2_FIELD_BOTTOM))
1576 return false;
1577
1578 /* The buffer can be completed, reset the fields for the next buffer. */
1579 ccdc->fields = 0;
1580
1581 return true;
1582}
1583
1489static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc) 1584static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc)
1490{ 1585{
1491 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity); 1586 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1492 struct isp_device *isp = to_isp_device(ccdc); 1587 struct isp_device *isp = to_isp_device(ccdc);
1493 struct isp_buffer *buffer; 1588 struct isp_buffer *buffer;
1494 int restart = 0;
1495 1589
1496 /* The CCDC generates VD0 interrupts even when disabled (the datasheet 1590 /* The CCDC generates VD0 interrupts even when disabled (the datasheet
1497 * doesn't explicitly state if that's supposed to happen or not, so it 1591 * doesn't explicitly state if that's supposed to happen or not, so it
@@ -1500,30 +1594,31 @@ static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc)
1500 * would thus not be enough, we need to handle the situation explicitly. 1594 * would thus not be enough, we need to handle the situation explicitly.
1501 */ 1595 */
1502 if (list_empty(&ccdc->video_out.dmaqueue)) 1596 if (list_empty(&ccdc->video_out.dmaqueue))
1503 goto done; 1597 return 0;
1504 1598
1505 /* We're in continuous mode, and memory writes were disabled due to a 1599 /* We're in continuous mode, and memory writes were disabled due to a
1506 * buffer underrun. Reenable them now that we have a buffer. The buffer 1600 * buffer underrun. Reenable them now that we have a buffer. The buffer
1507 * address has been set in ccdc_video_queue. 1601 * address has been set in ccdc_video_queue.
1508 */ 1602 */
1509 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && ccdc->underrun) { 1603 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && ccdc->underrun) {
1510 restart = 1;
1511 ccdc->underrun = 0; 1604 ccdc->underrun = 0;
1512 goto done; 1605 return 1;
1513 } 1606 }
1514 1607
1608 /* Wait for the CCDC to become idle. */
1515 if (ccdc_sbl_wait_idle(ccdc, 1000)) { 1609 if (ccdc_sbl_wait_idle(ccdc, 1000)) {
1516 dev_info(isp->dev, "CCDC won't become idle!\n"); 1610 dev_info(isp->dev, "CCDC won't become idle!\n");
1517 isp->crashed |= 1U << ccdc->subdev.entity.id; 1611 isp->crashed |= 1U << ccdc->subdev.entity.id;
1518 omap3isp_pipeline_cancel_stream(pipe); 1612 omap3isp_pipeline_cancel_stream(pipe);
1519 goto done; 1613 return 0;
1520 } 1614 }
1521 1615
1616 if (!ccdc_has_all_fields(ccdc))
1617 return 1;
1618
1522 buffer = omap3isp_video_buffer_next(&ccdc->video_out); 1619 buffer = omap3isp_video_buffer_next(&ccdc->video_out);
1523 if (buffer != NULL) { 1620 if (buffer != NULL)
1524 ccdc_set_outaddr(ccdc, buffer->dma); 1621 ccdc_set_outaddr(ccdc, buffer->dma);
1525 restart = 1;
1526 }
1527 1622
1528 pipe->state |= ISP_PIPELINE_IDLE_OUTPUT; 1623 pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;
1529 1624
@@ -1532,8 +1627,7 @@ static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc)
1532 omap3isp_pipeline_set_stream(pipe, 1627 omap3isp_pipeline_set_stream(pipe,
1533 ISP_PIPELINE_STREAM_SINGLESHOT); 1628 ISP_PIPELINE_STREAM_SINGLESHOT);
1534 1629
1535done: 1630 return buffer != NULL;
1536 return restart;
1537} 1631}
1538 1632
1539/* 1633/*
@@ -1547,11 +1641,38 @@ static void ccdc_vd0_isr(struct isp_ccdc_device *ccdc)
1547 unsigned long flags; 1641 unsigned long flags;
1548 int restart = 0; 1642 int restart = 0;
1549 1643
1644 /* In BT.656 mode the CCDC doesn't generate an HS/VS interrupt. We thus
1645 * need to increment the frame counter here.
1646 */
1647 if (ccdc->bt656) {
1648 struct isp_pipeline *pipe =
1649 to_isp_pipeline(&ccdc->subdev.entity);
1650
1651 atomic_inc(&pipe->frame_number);
1652 }
1653
1654 /* Emulate a VD1 interrupt for BT.656 mode, as we can't stop the CCDC in
1655 * the VD1 interrupt handler in that mode without risking a CCDC stall
1656 * if a short frame is received.
1657 */
1658 if (ccdc->bt656) {
1659 spin_lock_irqsave(&ccdc->lock, flags);
1660 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS &&
1661 ccdc->output & CCDC_OUTPUT_MEMORY) {
1662 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1663 __ccdc_lsc_enable(ccdc, 0);
1664 __ccdc_enable(ccdc, 0);
1665 }
1666 ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1);
1667 spin_unlock_irqrestore(&ccdc->lock, flags);
1668 }
1669
1550 if (ccdc->output & CCDC_OUTPUT_MEMORY) 1670 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1551 restart = ccdc_isr_buffer(ccdc); 1671 restart = ccdc_isr_buffer(ccdc);
1552 1672
1553 spin_lock_irqsave(&ccdc->lock, flags); 1673 spin_lock_irqsave(&ccdc->lock, flags);
1554 if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD0)) { 1674
1675 if (ccdc_handle_stopping(ccdc, CCDC_EVENT_VD0)) {
1555 spin_unlock_irqrestore(&ccdc->lock, flags); 1676 spin_unlock_irqrestore(&ccdc->lock, flags);
1556 return; 1677 return;
1557 } 1678 }
@@ -1572,6 +1693,18 @@ static void ccdc_vd1_isr(struct isp_ccdc_device *ccdc)
1572{ 1693{
1573 unsigned long flags; 1694 unsigned long flags;
1574 1695
1696 /* In BT.656 mode the synchronization signals are generated by the CCDC
1697 * from the embedded sync codes. The VD0 and VD1 interrupts are thus
1698 * only triggered when the CCDC is enabled, unlike external sync mode
1699 * where the line counter runs even when the CCDC is stopped. We can't
1700 * disable the CCDC at VD1 time, as no VD0 interrupt would be generated
1701 * for a short frame, which would result in the CCDC being stopped and
1702 * no VD interrupt generated anymore. The CCDC is stopped from the VD0
1703 * interrupt handler instead for BT.656.
1704 */
1705 if (ccdc->bt656)
1706 return;
1707
1575 spin_lock_irqsave(&ccdc->lsc.req_lock, flags); 1708 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1576 1709
1577 /* 1710 /*
@@ -1601,7 +1734,7 @@ static void ccdc_vd1_isr(struct isp_ccdc_device *ccdc)
1601 break; 1734 break;
1602 } 1735 }
1603 1736
1604 if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1)) 1737 if (ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1))
1605 goto done; 1738 goto done;
1606 1739
1607 if (ccdc->lsc.request == NULL) 1740 if (ccdc->lsc.request == NULL)
@@ -1656,6 +1789,8 @@ int omap3isp_ccdc_isr(struct isp_ccdc_device *ccdc, u32 events)
1656static int ccdc_video_queue(struct isp_video *video, struct isp_buffer *buffer) 1789static int ccdc_video_queue(struct isp_video *video, struct isp_buffer *buffer)
1657{ 1790{
1658 struct isp_ccdc_device *ccdc = &video->isp->isp_ccdc; 1791 struct isp_ccdc_device *ccdc = &video->isp->isp_ccdc;
1792 unsigned long flags;
1793 bool restart = false;
1659 1794
1660 if (!(ccdc->output & CCDC_OUTPUT_MEMORY)) 1795 if (!(ccdc->output & CCDC_OUTPUT_MEMORY))
1661 return -ENODEV; 1796 return -ENODEV;
@@ -1664,9 +1799,20 @@ static int ccdc_video_queue(struct isp_video *video, struct isp_buffer *buffer)
1664 1799
1665 /* We now have a buffer queued on the output, restart the pipeline 1800 /* We now have a buffer queued on the output, restart the pipeline
1666 * on the next CCDC interrupt if running in continuous mode (or when 1801 * on the next CCDC interrupt if running in continuous mode (or when
1667 * starting the stream). 1802 * starting the stream) in external sync mode, or immediately in BT.656
1803 * sync mode as no CCDC interrupt is generated when the CCDC is stopped
1804 * in that case.
1668 */ 1805 */
1669 ccdc->underrun = 1; 1806 spin_lock_irqsave(&ccdc->lock, flags);
1807 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && !ccdc->running &&
1808 ccdc->bt656)
1809 restart = true;
1810 else
1811 ccdc->underrun = 1;
1812 spin_unlock_irqrestore(&ccdc->lock, flags);
1813
1814 if (restart)
1815 ccdc_enable(ccdc);
1670 1816
1671 return 0; 1817 return 0;
1672} 1818}
@@ -1753,11 +1899,6 @@ static int ccdc_set_stream(struct v4l2_subdev *sd, int enable)
1753 1899
1754 ccdc_configure(ccdc); 1900 ccdc_configure(ccdc);
1755 1901
1756 /* TODO: Don't configure the video port if all of its output
1757 * links are inactive.
1758 */
1759 ccdc_config_vp(ccdc);
1760 ccdc_enable_vp(ccdc, 1);
1761 ccdc_print_status(ccdc); 1902 ccdc_print_status(ccdc);
1762 } 1903 }
1763 1904
@@ -1830,6 +1971,7 @@ ccdc_try_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
1830 unsigned int width = fmt->width; 1971 unsigned int width = fmt->width;
1831 unsigned int height = fmt->height; 1972 unsigned int height = fmt->height;
1832 struct v4l2_rect *crop; 1973 struct v4l2_rect *crop;
1974 enum v4l2_field field;
1833 unsigned int i; 1975 unsigned int i;
1834 1976
1835 switch (pad) { 1977 switch (pad) {
@@ -1846,14 +1988,24 @@ ccdc_try_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
1846 /* Clamp the input size. */ 1988 /* Clamp the input size. */
1847 fmt->width = clamp_t(u32, width, 32, 4096); 1989 fmt->width = clamp_t(u32, width, 32, 4096);
1848 fmt->height = clamp_t(u32, height, 32, 4096); 1990 fmt->height = clamp_t(u32, height, 32, 4096);
1991
1992 /* Default to progressive field order. */
1993 if (fmt->field == V4L2_FIELD_ANY)
1994 fmt->field = V4L2_FIELD_NONE;
1995
1849 break; 1996 break;
1850 1997
1851 case CCDC_PAD_SOURCE_OF: 1998 case CCDC_PAD_SOURCE_OF:
1852 pixelcode = fmt->code; 1999 pixelcode = fmt->code;
2000 field = fmt->field;
1853 *fmt = *__ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which); 2001 *fmt = *__ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
1854 2002
1855 /* YUV formats are converted from 2X8 to 1X16 by the bridge and 2003 /* In SYNC mode the bridge converts YUV formats from 2X8 to
1856 * can be byte-swapped. 2004 * 1X16. In BT.656 no such conversion occurs. As we don't know
2005 * at this point whether the source will use SYNC or BT.656 mode
2006 * let's pretend the conversion always occurs. The CCDC will be
2007 * configured to pack bytes in BT.656, hiding the inaccuracy.
2008 * In all cases bytes can be swapped.
1857 */ 2009 */
1858 if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8 || 2010 if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
1859 fmt->code == V4L2_MBUS_FMT_UYVY8_2X8) { 2011 fmt->code == V4L2_MBUS_FMT_UYVY8_2X8) {
@@ -1874,6 +2026,17 @@ ccdc_try_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
1874 crop = __ccdc_get_crop(ccdc, fh, which); 2026 crop = __ccdc_get_crop(ccdc, fh, which);
1875 fmt->width = crop->width; 2027 fmt->width = crop->width;
1876 fmt->height = crop->height; 2028 fmt->height = crop->height;
2029
2030 /* When input format is interlaced with alternating fields the
2031 * CCDC can interleave the fields.
2032 */
2033 if (fmt->field == V4L2_FIELD_ALTERNATE &&
2034 (field == V4L2_FIELD_INTERLACED_TB ||
2035 field == V4L2_FIELD_INTERLACED_BT)) {
2036 fmt->field = field;
2037 fmt->height *= 2;
2038 }
2039
1877 break; 2040 break;
1878 2041
1879 case CCDC_PAD_SOURCE_VP: 2042 case CCDC_PAD_SOURCE_VP:
@@ -1901,7 +2064,6 @@ ccdc_try_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
1901 * stored on 2 bytes. 2064 * stored on 2 bytes.
1902 */ 2065 */
1903 fmt->colorspace = V4L2_COLORSPACE_SRGB; 2066 fmt->colorspace = V4L2_COLORSPACE_SRGB;
1904 fmt->field = V4L2_FIELD_NONE;
1905} 2067}
1906 2068
1907/* 2069/*
diff --git a/drivers/media/platform/omap3isp/ispccdc.h b/drivers/media/platform/omap3isp/ispccdc.h
index f65061602c71..3440a7097940 100644
--- a/drivers/media/platform/omap3isp/ispccdc.h
+++ b/drivers/media/platform/omap3isp/ispccdc.h
@@ -12,16 +12,6 @@
12 * This program is free software; you can redistribute it and/or modify 12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as 13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation. 14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 * 02110-1301 USA
25 */ 15 */
26 16
27#ifndef OMAP3_ISP_CCDC_H 17#ifndef OMAP3_ISP_CCDC_H
@@ -103,6 +93,10 @@ struct ispccdc_lsc {
103#define CCDC_PAD_SOURCE_VP 2 93#define CCDC_PAD_SOURCE_VP 2
104#define CCDC_PADS_NUM 3 94#define CCDC_PADS_NUM 3
105 95
96#define CCDC_FIELD_TOP 1
97#define CCDC_FIELD_BOTTOM 2
98#define CCDC_FIELD_BOTH 3
99
106/* 100/*
107 * struct isp_ccdc_device - Structure for the CCDC module to store its own 101 * struct isp_ccdc_device - Structure for the CCDC module to store its own
108 * information 102 * information
@@ -123,11 +117,14 @@ struct ispccdc_lsc {
123 * @lsc: Lens shading compensation configuration 117 * @lsc: Lens shading compensation configuration
124 * @update: Bitmask of controls to update during the next interrupt 118 * @update: Bitmask of controls to update during the next interrupt
125 * @shadow_update: Controls update in progress by userspace 119 * @shadow_update: Controls update in progress by userspace
120 * @bt656: Whether the input interface uses BT.656 synchronization
121 * @fields: The fields (CCDC_FIELD_*) stored in the current buffer
126 * @underrun: A buffer underrun occurred and a new buffer has been queued 122 * @underrun: A buffer underrun occurred and a new buffer has been queued
127 * @state: Streaming state 123 * @state: Streaming state
128 * @lock: Serializes shadow_update with interrupt handler 124 * @lock: Serializes shadow_update with interrupt handler
129 * @wait: Wait queue used to stop the module 125 * @wait: Wait queue used to stop the module
130 * @stopping: Stopping state 126 * @stopping: Stopping state
127 * @running: Is the CCDC hardware running
131 * @ioctl_lock: Serializes ioctl calls and LSC requests freeing 128 * @ioctl_lock: Serializes ioctl calls and LSC requests freeing
132 */ 129 */
133struct isp_ccdc_device { 130struct isp_ccdc_device {
@@ -151,11 +148,15 @@ struct isp_ccdc_device {
151 unsigned int update; 148 unsigned int update;
152 unsigned int shadow_update; 149 unsigned int shadow_update;
153 150
151 bool bt656;
152 unsigned int fields;
153
154 unsigned int underrun:1; 154 unsigned int underrun:1;
155 enum isp_pipeline_stream_state state; 155 enum isp_pipeline_stream_state state;
156 spinlock_t lock; 156 spinlock_t lock;
157 wait_queue_head_t wait; 157 wait_queue_head_t wait;
158 unsigned int stopping; 158 unsigned int stopping;
159 bool running;
159 struct mutex ioctl_lock; 160 struct mutex ioctl_lock;
160}; 161};
161 162
diff --git a/drivers/media/platform/omap3isp/ispccp2.c b/drivers/media/platform/omap3isp/ispccp2.c
index f3801db9095c..9cb49b3c04bd 100644
--- a/drivers/media/platform/omap3isp/ispccp2.c
+++ b/drivers/media/platform/omap3isp/ispccp2.c
@@ -12,16 +12,6 @@
12 * This program is free software; you can redistribute it and/or modify 12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as 13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation. 14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 * 02110-1301 USA
25 */ 15 */
26 16
27#include <linux/delay.h> 17#include <linux/delay.h>
diff --git a/drivers/media/platform/omap3isp/ispccp2.h b/drivers/media/platform/omap3isp/ispccp2.h
index 76d65f4576ef..4662bffa79e3 100644
--- a/drivers/media/platform/omap3isp/ispccp2.h
+++ b/drivers/media/platform/omap3isp/ispccp2.h
@@ -12,16 +12,6 @@
12 * This program is free software; you can redistribute it and/or modify 12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as 13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation. 14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 * 02110-1301 USA
25 */ 15 */
26 16
27#ifndef OMAP3_ISP_CCP2_H 17#ifndef OMAP3_ISP_CCP2_H
diff --git a/drivers/media/platform/omap3isp/ispcsi2.c b/drivers/media/platform/omap3isp/ispcsi2.c
index 5a2e47e58b84..6530b255f103 100644
--- a/drivers/media/platform/omap3isp/ispcsi2.c
+++ b/drivers/media/platform/omap3isp/ispcsi2.c
@@ -12,16 +12,6 @@
12 * This program is free software; you can redistribute it and/or modify 12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as 13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation. 14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 * 02110-1301 USA
25 */ 15 */
26#include <linux/delay.h> 16#include <linux/delay.h>
27#include <media/v4l2-common.h> 17#include <media/v4l2-common.h>
diff --git a/drivers/media/platform/omap3isp/ispcsi2.h b/drivers/media/platform/omap3isp/ispcsi2.h
index c57729b7e86e..453ed62fe394 100644
--- a/drivers/media/platform/omap3isp/ispcsi2.h
+++ b/drivers/media/platform/omap3isp/ispcsi2.h
@@ -12,16 +12,6 @@
12 * This program is free software; you can redistribute it and/or modify 12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as 13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation. 14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 * 02110-1301 USA
25 */ 15 */
26 16
27#ifndef OMAP3_ISP_CSI2_H 17#ifndef OMAP3_ISP_CSI2_H
diff --git a/drivers/media/platform/omap3isp/ispcsiphy.c b/drivers/media/platform/omap3isp/ispcsiphy.c
index c09de32f986a..e033f2237a72 100644
--- a/drivers/media/platform/omap3isp/ispcsiphy.c
+++ b/drivers/media/platform/omap3isp/ispcsiphy.c
@@ -12,16 +12,6 @@
12 * This program is free software; you can redistribute it and/or modify 12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as 13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation. 14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 * 02110-1301 USA
25 */ 15 */
26 16
27#include <linux/delay.h> 17#include <linux/delay.h>
diff --git a/drivers/media/platform/omap3isp/ispcsiphy.h b/drivers/media/platform/omap3isp/ispcsiphy.h
index 14551fd77697..e17c88beab92 100644
--- a/drivers/media/platform/omap3isp/ispcsiphy.h
+++ b/drivers/media/platform/omap3isp/ispcsiphy.h
@@ -12,16 +12,6 @@
12 * This program is free software; you can redistribute it and/or modify 12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as 13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation. 14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 * 02110-1301 USA
25 */ 15 */
26 16
27#ifndef OMAP3_ISP_CSI_PHY_H 17#ifndef OMAP3_ISP_CSI_PHY_H
diff --git a/drivers/media/platform/omap3isp/isph3a.h b/drivers/media/platform/omap3isp/isph3a.h
index fb09fd4ca755..e5b28d0f3b0f 100644
--- a/drivers/media/platform/omap3isp/isph3a.h
+++ b/drivers/media/platform/omap3isp/isph3a.h
@@ -13,16 +13,6 @@
13 * This program is free software; you can redistribute it and/or modify 13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as 14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation. 15 * published by the Free Software Foundation.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
25 * 02110-1301 USA
26 */ 16 */
27 17
28#ifndef OMAP3_ISP_H3A_H 18#ifndef OMAP3_ISP_H3A_H
diff --git a/drivers/media/platform/omap3isp/isph3a_aewb.c b/drivers/media/platform/omap3isp/isph3a_aewb.c
index d6811ce263eb..b208c5417146 100644
--- a/drivers/media/platform/omap3isp/isph3a_aewb.c
+++ b/drivers/media/platform/omap3isp/isph3a_aewb.c
@@ -13,16 +13,6 @@
13 * This program is free software; you can redistribute it and/or modify 13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as 14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation. 15 * published by the Free Software Foundation.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
25 * 02110-1301 USA
26 */ 16 */
27 17
28#include <linux/slab.h> 18#include <linux/slab.h>
diff --git a/drivers/media/platform/omap3isp/isph3a_af.c b/drivers/media/platform/omap3isp/isph3a_af.c
index 6fc960cd30f5..8a83e195f3e3 100644
--- a/drivers/media/platform/omap3isp/isph3a_af.c
+++ b/drivers/media/platform/omap3isp/isph3a_af.c
@@ -13,16 +13,6 @@
13 * This program is free software; you can redistribute it and/or modify 13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as 14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation. 15 * published by the Free Software Foundation.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
25 * 02110-1301 USA
26 */ 16 */
27 17
28/* Linux specific include files */ 18/* Linux specific include files */
diff --git a/drivers/media/platform/omap3isp/isphist.c b/drivers/media/platform/omap3isp/isphist.c
index 06a5f8164eaa..ce822c34c843 100644
--- a/drivers/media/platform/omap3isp/isphist.c
+++ b/drivers/media/platform/omap3isp/isphist.c
@@ -13,16 +13,6 @@
13 * This program is free software; you can redistribute it and/or modify 13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as 14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation. 15 * published by the Free Software Foundation.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
25 * 02110-1301 USA
26 */ 16 */
27 17
28#include <linux/delay.h> 18#include <linux/delay.h>
diff --git a/drivers/media/platform/omap3isp/isphist.h b/drivers/media/platform/omap3isp/isphist.h
index 0b2a38ec94c4..3b5415517dcd 100644
--- a/drivers/media/platform/omap3isp/isphist.h
+++ b/drivers/media/platform/omap3isp/isphist.h
@@ -13,16 +13,6 @@
13 * This program is free software; you can redistribute it and/or modify 13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as 14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation. 15 * published by the Free Software Foundation.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
25 * 02110-1301 USA
26 */ 16 */
27 17
28#ifndef OMAP3_ISP_HIST_H 18#ifndef OMAP3_ISP_HIST_H
diff --git a/drivers/media/platform/omap3isp/isppreview.c b/drivers/media/platform/omap3isp/isppreview.c
index 720809b07e75..605f57ef0a49 100644
--- a/drivers/media/platform/omap3isp/isppreview.c
+++ b/drivers/media/platform/omap3isp/isppreview.c
@@ -12,16 +12,6 @@
12 * This program is free software; you can redistribute it and/or modify 12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as 13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation. 14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 * 02110-1301 USA
25 */ 15 */
26 16
27#include <linux/device.h> 17#include <linux/device.h>
diff --git a/drivers/media/platform/omap3isp/isppreview.h b/drivers/media/platform/omap3isp/isppreview.h
index f66923407f8c..16fdc03a3d43 100644
--- a/drivers/media/platform/omap3isp/isppreview.h
+++ b/drivers/media/platform/omap3isp/isppreview.h
@@ -12,16 +12,6 @@
12 * This program is free software; you can redistribute it and/or modify 12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as 13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation. 14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 * 02110-1301 USA
25 */ 15 */
26 16
27#ifndef OMAP3_ISP_PREVIEW_H 17#ifndef OMAP3_ISP_PREVIEW_H
diff --git a/drivers/media/platform/omap3isp/ispreg.h b/drivers/media/platform/omap3isp/ispreg.h
index b7d90e6fb01d..b5ea8da0b904 100644
--- a/drivers/media/platform/omap3isp/ispreg.h
+++ b/drivers/media/platform/omap3isp/ispreg.h
@@ -12,16 +12,6 @@
12 * This program is free software; you can redistribute it and/or modify 12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as 13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation. 14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 * 02110-1301 USA
25 */ 15 */
26 16
27#ifndef OMAP3_ISP_REG_H 17#ifndef OMAP3_ISP_REG_H
@@ -740,17 +730,13 @@
740 730
741#define ISPCCDC_HSIZE_OFF_SHIFT 0 731#define ISPCCDC_HSIZE_OFF_SHIFT 0
742 732
743#define ISPCCDC_SDOFST_FINV (1 << 14) 733#define ISPCCDC_SDOFST_FIINV (1 << 14)
744#define ISPCCDC_SDOFST_FOFST_1L 0 734#define ISPCCDC_SDOFST_FOFST_SHIFT 12
745#define ISPCCDC_SDOFST_FOFST_4L (3 << 12) 735#define ISPCCDC_SDOFST_FOFST_MASK (3 << 12)
746#define ISPCCDC_SDOFST_LOFST3_SHIFT 0 736#define ISPCCDC_SDOFST_LOFST3_SHIFT 0
747#define ISPCCDC_SDOFST_LOFST2_SHIFT 3 737#define ISPCCDC_SDOFST_LOFST2_SHIFT 3
748#define ISPCCDC_SDOFST_LOFST1_SHIFT 6 738#define ISPCCDC_SDOFST_LOFST1_SHIFT 6
749#define ISPCCDC_SDOFST_LOFST0_SHIFT 9 739#define ISPCCDC_SDOFST_LOFST0_SHIFT 9
750#define EVENEVEN 1
751#define ODDEVEN 2
752#define EVENODD 3
753#define ODDODD 4
754 740
755#define ISPCCDC_CLAMP_OBGAIN_SHIFT 0 741#define ISPCCDC_CLAMP_OBGAIN_SHIFT 0
756#define ISPCCDC_CLAMP_OBST_SHIFT 10 742#define ISPCCDC_CLAMP_OBST_SHIFT 10
diff --git a/drivers/media/platform/omap3isp/ispresizer.c b/drivers/media/platform/omap3isp/ispresizer.c
index 6f077c2377db..05d1ace57451 100644
--- a/drivers/media/platform/omap3isp/ispresizer.c
+++ b/drivers/media/platform/omap3isp/ispresizer.c
@@ -12,16 +12,6 @@
12 * This program is free software; you can redistribute it and/or modify 12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as 13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation. 14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 * 02110-1301 USA
25 */ 15 */
26 16
27#include <linux/device.h> 17#include <linux/device.h>
@@ -239,7 +229,7 @@ static void resizer_set_phase(struct isp_res_device *res, u32 h_phase,
239 u32 v_phase) 229 u32 v_phase)
240{ 230{
241 struct isp_device *isp = to_isp_device(res); 231 struct isp_device *isp = to_isp_device(res);
242 u32 rgval = 0; 232 u32 rgval;
243 233
244 rgval = isp_reg_readl(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT) & 234 rgval = isp_reg_readl(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT) &
245 ~(ISPRSZ_CNT_HSTPH_MASK | ISPRSZ_CNT_VSTPH_MASK); 235 ~(ISPRSZ_CNT_HSTPH_MASK | ISPRSZ_CNT_VSTPH_MASK);
@@ -275,7 +265,7 @@ static void resizer_set_luma(struct isp_res_device *res,
275 struct resizer_luma_yenh *luma) 265 struct resizer_luma_yenh *luma)
276{ 266{
277 struct isp_device *isp = to_isp_device(res); 267 struct isp_device *isp = to_isp_device(res);
278 u32 rgval = 0; 268 u32 rgval;
279 269
280 rgval = (luma->algo << ISPRSZ_YENH_ALGO_SHIFT) 270 rgval = (luma->algo << ISPRSZ_YENH_ALGO_SHIFT)
281 & ISPRSZ_YENH_ALGO_MASK; 271 & ISPRSZ_YENH_ALGO_MASK;
@@ -322,7 +312,7 @@ static void resizer_set_ratio(struct isp_res_device *res,
322{ 312{
323 struct isp_device *isp = to_isp_device(res); 313 struct isp_device *isp = to_isp_device(res);
324 const u16 *h_filter, *v_filter; 314 const u16 *h_filter, *v_filter;
325 u32 rgval = 0; 315 u32 rgval;
326 316
327 rgval = isp_reg_readl(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT) & 317 rgval = isp_reg_readl(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT) &
328 ~(ISPRSZ_CNT_HRSZ_MASK | ISPRSZ_CNT_VRSZ_MASK); 318 ~(ISPRSZ_CNT_HRSZ_MASK | ISPRSZ_CNT_VRSZ_MASK);
@@ -365,9 +355,8 @@ static void resizer_set_output_size(struct isp_res_device *res,
365 u32 width, u32 height) 355 u32 width, u32 height)
366{ 356{
367 struct isp_device *isp = to_isp_device(res); 357 struct isp_device *isp = to_isp_device(res);
368 u32 rgval = 0; 358 u32 rgval;
369 359
370 dev_dbg(isp->dev, "Output size[w/h]: %dx%d\n", width, height);
371 rgval = (width << ISPRSZ_OUT_SIZE_HORZ_SHIFT) 360 rgval = (width << ISPRSZ_OUT_SIZE_HORZ_SHIFT)
372 & ISPRSZ_OUT_SIZE_HORZ_MASK; 361 & ISPRSZ_OUT_SIZE_HORZ_MASK;
373 rgval |= (height << ISPRSZ_OUT_SIZE_VERT_SHIFT) 362 rgval |= (height << ISPRSZ_OUT_SIZE_VERT_SHIFT)
@@ -409,7 +398,7 @@ static void resizer_set_output_offset(struct isp_res_device *res, u32 offset)
409static void resizer_set_start(struct isp_res_device *res, u32 left, u32 top) 398static void resizer_set_start(struct isp_res_device *res, u32 left, u32 top)
410{ 399{
411 struct isp_device *isp = to_isp_device(res); 400 struct isp_device *isp = to_isp_device(res);
412 u32 rgval = 0; 401 u32 rgval;
413 402
414 rgval = (left << ISPRSZ_IN_START_HORZ_ST_SHIFT) 403 rgval = (left << ISPRSZ_IN_START_HORZ_ST_SHIFT)
415 & ISPRSZ_IN_START_HORZ_ST_MASK; 404 & ISPRSZ_IN_START_HORZ_ST_MASK;
@@ -429,9 +418,7 @@ static void resizer_set_input_size(struct isp_res_device *res,
429 u32 width, u32 height) 418 u32 width, u32 height)
430{ 419{
431 struct isp_device *isp = to_isp_device(res); 420 struct isp_device *isp = to_isp_device(res);
432 u32 rgval = 0; 421 u32 rgval;
433
434 dev_dbg(isp->dev, "Input size[w/h]: %dx%d\n", width, height);
435 422
436 rgval = (width << ISPRSZ_IN_SIZE_HORZ_SHIFT) 423 rgval = (width << ISPRSZ_IN_SIZE_HORZ_SHIFT)
437 & ISPRSZ_IN_SIZE_HORZ_MASK; 424 & ISPRSZ_IN_SIZE_HORZ_MASK;
@@ -1075,10 +1062,13 @@ static void resizer_isr_buffer(struct isp_res_device *res)
1075void omap3isp_resizer_isr(struct isp_res_device *res) 1062void omap3isp_resizer_isr(struct isp_res_device *res)
1076{ 1063{
1077 struct v4l2_mbus_framefmt *informat, *outformat; 1064 struct v4l2_mbus_framefmt *informat, *outformat;
1065 unsigned long flags;
1078 1066
1079 if (omap3isp_module_sync_is_stopping(&res->wait, &res->stopping)) 1067 if (omap3isp_module_sync_is_stopping(&res->wait, &res->stopping))
1080 return; 1068 return;
1081 1069
1070 spin_lock_irqsave(&res->lock, flags);
1071
1082 if (res->applycrop) { 1072 if (res->applycrop) {
1083 outformat = __resizer_get_format(res, NULL, RESZ_PAD_SOURCE, 1073 outformat = __resizer_get_format(res, NULL, RESZ_PAD_SOURCE,
1084 V4L2_SUBDEV_FORMAT_ACTIVE); 1074 V4L2_SUBDEV_FORMAT_ACTIVE);
@@ -1088,6 +1078,8 @@ void omap3isp_resizer_isr(struct isp_res_device *res)
1088 res->applycrop = 0; 1078 res->applycrop = 0;
1089 } 1079 }
1090 1080
1081 spin_unlock_irqrestore(&res->lock, flags);
1082
1091 resizer_isr_buffer(res); 1083 resizer_isr_buffer(res);
1092} 1084}
1093 1085
@@ -1290,8 +1282,10 @@ static int resizer_set_selection(struct v4l2_subdev *sd,
1290{ 1282{
1291 struct isp_res_device *res = v4l2_get_subdevdata(sd); 1283 struct isp_res_device *res = v4l2_get_subdevdata(sd);
1292 struct isp_device *isp = to_isp_device(res); 1284 struct isp_device *isp = to_isp_device(res);
1293 struct v4l2_mbus_framefmt *format_sink, *format_source; 1285 const struct v4l2_mbus_framefmt *format_sink;
1286 struct v4l2_mbus_framefmt format_source;
1294 struct resizer_ratio ratio; 1287 struct resizer_ratio ratio;
1288 unsigned long flags;
1295 1289
1296 if (sel->target != V4L2_SEL_TGT_CROP || 1290 if (sel->target != V4L2_SEL_TGT_CROP ||
1297 sel->pad != RESZ_PAD_SINK) 1291 sel->pad != RESZ_PAD_SINK)
@@ -1299,16 +1293,14 @@ static int resizer_set_selection(struct v4l2_subdev *sd,
1299 1293
1300 format_sink = __resizer_get_format(res, fh, RESZ_PAD_SINK, 1294 format_sink = __resizer_get_format(res, fh, RESZ_PAD_SINK,
1301 sel->which); 1295 sel->which);
1302 format_source = __resizer_get_format(res, fh, RESZ_PAD_SOURCE, 1296 format_source = *__resizer_get_format(res, fh, RESZ_PAD_SOURCE,
1303 sel->which); 1297 sel->which);
1304
1305 dev_dbg(isp->dev, "%s: L=%d,T=%d,W=%d,H=%d,which=%d\n", __func__,
1306 sel->r.left, sel->r.top, sel->r.width, sel->r.height,
1307 sel->which);
1308 1298
1309 dev_dbg(isp->dev, "%s: input=%dx%d, output=%dx%d\n", __func__, 1299 dev_dbg(isp->dev, "%s(%s): req %ux%u -> (%d,%d)/%ux%u -> %ux%u\n",
1300 __func__, sel->which == V4L2_SUBDEV_FORMAT_TRY ? "try" : "act",
1310 format_sink->width, format_sink->height, 1301 format_sink->width, format_sink->height,
1311 format_source->width, format_source->height); 1302 sel->r.left, sel->r.top, sel->r.width, sel->r.height,
1303 format_source.width, format_source.height);
1312 1304
1313 /* Clamp the crop rectangle to the bounds, and then mangle it further to 1305 /* Clamp the crop rectangle to the bounds, and then mangle it further to
1314 * fulfill the TRM equations. Store the clamped but otherwise unmangled 1306 * fulfill the TRM equations. Store the clamped but otherwise unmangled
@@ -1318,23 +1310,39 @@ static int resizer_set_selection(struct v4l2_subdev *sd,
1318 * smaller input crop rectangle every time the output size is set if we 1310 * smaller input crop rectangle every time the output size is set if we
1319 * stored the mangled rectangle. 1311 * stored the mangled rectangle.
1320 */ 1312 */
1321 resizer_try_crop(format_sink, format_source, &sel->r); 1313 resizer_try_crop(format_sink, &format_source, &sel->r);
1322 *__resizer_get_crop(res, fh, sel->which) = sel->r; 1314 *__resizer_get_crop(res, fh, sel->which) = sel->r;
1323 resizer_calc_ratios(res, &sel->r, format_source, &ratio); 1315 resizer_calc_ratios(res, &sel->r, &format_source, &ratio);
1324 1316
1325 if (sel->which == V4L2_SUBDEV_FORMAT_TRY) 1317 dev_dbg(isp->dev, "%s(%s): got %ux%u -> (%d,%d)/%ux%u -> %ux%u\n",
1318 __func__, sel->which == V4L2_SUBDEV_FORMAT_TRY ? "try" : "act",
1319 format_sink->width, format_sink->height,
1320 sel->r.left, sel->r.top, sel->r.width, sel->r.height,
1321 format_source.width, format_source.height);
1322
1323 if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
1324 *__resizer_get_format(res, fh, RESZ_PAD_SOURCE, sel->which) =
1325 format_source;
1326 return 0; 1326 return 0;
1327 }
1328
1329 /* Update the source format, resizing ratios and crop rectangle. If
1330 * streaming is on the IRQ handler will reprogram the resizer after the
1331 * current frame. We thus we need to protect against race conditions.
1332 */
1333 spin_lock_irqsave(&res->lock, flags);
1334
1335 *__resizer_get_format(res, fh, RESZ_PAD_SOURCE, sel->which) =
1336 format_source;
1327 1337
1328 res->ratio = ratio; 1338 res->ratio = ratio;
1329 res->crop.active = sel->r; 1339 res->crop.active = sel->r;
1330 1340
1331 /*
1332 * set_selection can be called while streaming is on. In this case the
1333 * crop values will be set in the next IRQ.
1334 */
1335 if (res->state != ISP_PIPELINE_STREAM_STOPPED) 1341 if (res->state != ISP_PIPELINE_STREAM_STOPPED)
1336 res->applycrop = 1; 1342 res->applycrop = 1;
1337 1343
1344 spin_unlock_irqrestore(&res->lock, flags);
1345
1338 return 0; 1346 return 0;
1339} 1347}
1340 1348
@@ -1781,6 +1789,8 @@ int omap3isp_resizer_init(struct isp_device *isp)
1781 1789
1782 init_waitqueue_head(&res->wait); 1790 init_waitqueue_head(&res->wait);
1783 atomic_set(&res->stopping, 0); 1791 atomic_set(&res->stopping, 0);
1792 spin_lock_init(&res->lock);
1793
1784 return resizer_init_entities(res); 1794 return resizer_init_entities(res);
1785} 1795}
1786 1796
diff --git a/drivers/media/platform/omap3isp/ispresizer.h b/drivers/media/platform/omap3isp/ispresizer.h
index 9b01e9047c15..5414542912e2 100644
--- a/drivers/media/platform/omap3isp/ispresizer.h
+++ b/drivers/media/platform/omap3isp/ispresizer.h
@@ -12,21 +12,12 @@
12 * This program is free software; you can redistribute it and/or modify 12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as 13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation. 14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 * 02110-1301 USA
25 */ 15 */
26 16
27#ifndef OMAP3_ISP_RESIZER_H 17#ifndef OMAP3_ISP_RESIZER_H
28#define OMAP3_ISP_RESIZER_H 18#define OMAP3_ISP_RESIZER_H
29 19
20#include <linux/spinlock.h>
30#include <linux/types.h> 21#include <linux/types.h>
31 22
32/* 23/*
@@ -96,6 +87,7 @@ enum resizer_input_entity {
96 87
97/* 88/*
98 * struct isp_res_device - OMAP3 ISP resizer module 89 * struct isp_res_device - OMAP3 ISP resizer module
90 * @lock: Protects formats and crop rectangles between set_selection and IRQ
99 * @crop.request: Crop rectangle requested by the user 91 * @crop.request: Crop rectangle requested by the user
100 * @crop.active: Active crop rectangle (based on hardware requirements) 92 * @crop.active: Active crop rectangle (based on hardware requirements)
101 */ 93 */
@@ -116,6 +108,7 @@ struct isp_res_device {
116 enum isp_pipeline_stream_state state; 108 enum isp_pipeline_stream_state state;
117 wait_queue_head_t wait; 109 wait_queue_head_t wait;
118 atomic_t stopping; 110 atomic_t stopping;
111 spinlock_t lock;
119 112
120 struct { 113 struct {
121 struct v4l2_rect request; 114 struct v4l2_rect request;
diff --git a/drivers/media/platform/omap3isp/ispstat.c b/drivers/media/platform/omap3isp/ispstat.c
index e6cbc1eaf4ca..a94e8340508f 100644
--- a/drivers/media/platform/omap3isp/ispstat.c
+++ b/drivers/media/platform/omap3isp/ispstat.c
@@ -13,16 +13,6 @@
13 * This program is free software; you can redistribute it and/or modify 13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as 14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation. 15 * published by the Free Software Foundation.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
25 * 02110-1301 USA
26 */ 16 */
27 17
28#include <linux/dma-mapping.h> 18#include <linux/dma-mapping.h>
diff --git a/drivers/media/platform/omap3isp/ispstat.h b/drivers/media/platform/omap3isp/ispstat.h
index 58d6ac7cb664..b32b29677e2c 100644
--- a/drivers/media/platform/omap3isp/ispstat.h
+++ b/drivers/media/platform/omap3isp/ispstat.h
@@ -13,16 +13,6 @@
13 * This program is free software; you can redistribute it and/or modify 13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as 14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation. 15 * published by the Free Software Foundation.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
25 * 02110-1301 USA
26 */ 16 */
27 17
28#ifndef OMAP3_ISP_STAT_H 18#ifndef OMAP3_ISP_STAT_H
diff --git a/drivers/media/platform/omap3isp/ispvideo.c b/drivers/media/platform/omap3isp/ispvideo.c
index e36bac26476c..bc38c88c7bd9 100644
--- a/drivers/media/platform/omap3isp/ispvideo.c
+++ b/drivers/media/platform/omap3isp/ispvideo.c
@@ -11,16 +11,6 @@
11 * This program is free software; you can redistribute it and/or modify 11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as 12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation. 13 * published by the Free Software Foundation.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
23 * 02110-1301 USA
24 */ 14 */
25 15
26#include <asm/cacheflush.h> 16#include <asm/cacheflush.h>
@@ -319,10 +309,11 @@ isp_video_check_format(struct isp_video *video, struct isp_video_fh *vfh)
319 vfh->format.fmt.pix.height != format.fmt.pix.height || 309 vfh->format.fmt.pix.height != format.fmt.pix.height ||
320 vfh->format.fmt.pix.width != format.fmt.pix.width || 310 vfh->format.fmt.pix.width != format.fmt.pix.width ||
321 vfh->format.fmt.pix.bytesperline != format.fmt.pix.bytesperline || 311 vfh->format.fmt.pix.bytesperline != format.fmt.pix.bytesperline ||
322 vfh->format.fmt.pix.sizeimage != format.fmt.pix.sizeimage) 312 vfh->format.fmt.pix.sizeimage != format.fmt.pix.sizeimage ||
313 vfh->format.fmt.pix.field != format.fmt.pix.field)
323 return -EINVAL; 314 return -EINVAL;
324 315
325 return ret; 316 return 0;
326} 317}
327 318
328/* ----------------------------------------------------------------------------- 319/* -----------------------------------------------------------------------------
@@ -491,6 +482,11 @@ struct isp_buffer *omap3isp_video_buffer_next(struct isp_video *video)
491 else 482 else
492 buf->vb.v4l2_buf.sequence = atomic_read(&pipe->frame_number); 483 buf->vb.v4l2_buf.sequence = atomic_read(&pipe->frame_number);
493 484
485 if (pipe->field != V4L2_FIELD_NONE)
486 buf->vb.v4l2_buf.sequence /= 2;
487
488 buf->vb.v4l2_buf.field = pipe->field;
489
494 /* Report pipeline errors to userspace on the capture device side. */ 490 /* Report pipeline errors to userspace on the capture device side. */
495 if (video->type == V4L2_BUF_TYPE_VIDEO_CAPTURE && pipe->error) { 491 if (video->type == V4L2_BUF_TYPE_VIDEO_CAPTURE && pipe->error) {
496 state = VB2_BUF_STATE_ERROR; 492 state = VB2_BUF_STATE_ERROR;
@@ -641,7 +637,40 @@ isp_video_set_format(struct file *file, void *fh, struct v4l2_format *format)
641 if (format->type != video->type) 637 if (format->type != video->type)
642 return -EINVAL; 638 return -EINVAL;
643 639
644 mutex_lock(&video->mutex); 640 /* Replace unsupported field orders with sane defaults. */
641 switch (format->fmt.pix.field) {
642 case V4L2_FIELD_NONE:
643 /* Progressive is supported everywhere. */
644 break;
645 case V4L2_FIELD_ALTERNATE:
646 /* ALTERNATE is not supported on output nodes. */
647 if (video->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
648 format->fmt.pix.field = V4L2_FIELD_NONE;
649 break;
650 case V4L2_FIELD_INTERLACED:
651 /* The ISP has no concept of video standard, select the
652 * top-bottom order when the unqualified interlaced order is
653 * requested.
654 */
655 format->fmt.pix.field = V4L2_FIELD_INTERLACED_TB;
656 /* Fall-through */
657 case V4L2_FIELD_INTERLACED_TB:
658 case V4L2_FIELD_INTERLACED_BT:
659 /* Interlaced orders are only supported at the CCDC output. */
660 if (video != &video->isp->isp_ccdc.video_out)
661 format->fmt.pix.field = V4L2_FIELD_NONE;
662 break;
663 case V4L2_FIELD_TOP:
664 case V4L2_FIELD_BOTTOM:
665 case V4L2_FIELD_SEQ_TB:
666 case V4L2_FIELD_SEQ_BT:
667 default:
668 /* All other field orders are currently unsupported, default to
669 * progressive.
670 */
671 format->fmt.pix.field = V4L2_FIELD_NONE;
672 break;
673 }
645 674
646 /* Fill the bytesperline and sizeimage fields by converting to media bus 675 /* Fill the bytesperline and sizeimage fields by converting to media bus
647 * format and back to pixel format. 676 * format and back to pixel format.
@@ -649,9 +678,10 @@ isp_video_set_format(struct file *file, void *fh, struct v4l2_format *format)
649 isp_video_pix_to_mbus(&format->fmt.pix, &fmt); 678 isp_video_pix_to_mbus(&format->fmt.pix, &fmt);
650 isp_video_mbus_to_pix(video, &fmt, &format->fmt.pix); 679 isp_video_mbus_to_pix(video, &fmt, &format->fmt.pix);
651 680
681 mutex_lock(&video->mutex);
652 vfh->format = *format; 682 vfh->format = *format;
653
654 mutex_unlock(&video->mutex); 683 mutex_unlock(&video->mutex);
684
655 return 0; 685 return 0;
656} 686}
657 687
@@ -1039,6 +1069,7 @@ isp_video_streamon(struct file *file, void *fh, enum v4l2_buf_type type)
1039 video->queue = &vfh->queue; 1069 video->queue = &vfh->queue;
1040 INIT_LIST_HEAD(&video->dmaqueue); 1070 INIT_LIST_HEAD(&video->dmaqueue);
1041 atomic_set(&pipe->frame_number, -1); 1071 atomic_set(&pipe->frame_number, -1);
1072 pipe->field = vfh->format.fmt.pix.field;
1042 1073
1043 mutex_lock(&video->queue_lock); 1074 mutex_lock(&video->queue_lock);
1044 ret = vb2_streamon(&vfh->queue, type); 1075 ret = vb2_streamon(&vfh->queue, type);
diff --git a/drivers/media/platform/omap3isp/ispvideo.h b/drivers/media/platform/omap3isp/ispvideo.h
index 7d2e82122ecd..0b7efedc3da9 100644
--- a/drivers/media/platform/omap3isp/ispvideo.h
+++ b/drivers/media/platform/omap3isp/ispvideo.h
@@ -11,16 +11,6 @@
11 * This program is free software; you can redistribute it and/or modify 11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as 12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation. 13 * published by the Free Software Foundation.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
23 * 02110-1301 USA
24 */ 14 */
25 15
26#ifndef OMAP3_ISP_VIDEO_H 16#ifndef OMAP3_ISP_VIDEO_H
@@ -88,6 +78,7 @@ enum isp_pipeline_state {
88 78
89/* 79/*
90 * struct isp_pipeline - An ISP hardware pipeline 80 * struct isp_pipeline - An ISP hardware pipeline
81 * @field: The field being processed by the pipeline
91 * @error: A hardware error occurred during capture 82 * @error: A hardware error occurred during capture
92 * @entities: Bitmask of entities in the pipeline (indexed by entity ID) 83 * @entities: Bitmask of entities in the pipeline (indexed by entity ID)
93 */ 84 */
@@ -101,6 +92,7 @@ struct isp_pipeline {
101 u32 entities; 92 u32 entities;
102 unsigned long l3_ick; 93 unsigned long l3_ick;
103 unsigned int max_rate; 94 unsigned int max_rate;
95 enum v4l2_field field;
104 atomic_t frame_number; 96 atomic_t frame_number;
105 bool do_propagation; /* of frame number */ 97 bool do_propagation; /* of frame number */
106 bool error; 98 bool error;
diff --git a/drivers/media/platform/omap3isp/luma_enhance_table.h b/drivers/media/platform/omap3isp/luma_enhance_table.h
index 098b45e2280f..81c5b1566469 100644
--- a/drivers/media/platform/omap3isp/luma_enhance_table.h
+++ b/drivers/media/platform/omap3isp/luma_enhance_table.h
@@ -12,16 +12,6 @@
12 * This program is free software; you can redistribute it and/or modify 12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as 13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation. 14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 * 02110-1301 USA
25 */ 15 */
26 16
271047552, 1047552, 1047552, 1047552, 1047552, 1047552, 1047552, 1047552, 171047552, 1047552, 1047552, 1047552, 1047552, 1047552, 1047552, 1047552,
diff --git a/drivers/media/platform/omap3isp/noise_filter_table.h b/drivers/media/platform/omap3isp/noise_filter_table.h
index d50451a4a242..5073f9847937 100644
--- a/drivers/media/platform/omap3isp/noise_filter_table.h
+++ b/drivers/media/platform/omap3isp/noise_filter_table.h
@@ -12,16 +12,6 @@
12 * This program is free software; you can redistribute it and/or modify 12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as 13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation. 14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 * 02110-1301 USA
25 */ 15 */
26 16
2716, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 1716, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
diff --git a/drivers/media/platform/s3c-camif/camif-capture.c b/drivers/media/platform/s3c-camif/camif-capture.c
index f33641384e15..4f81b4c9d113 100644
--- a/drivers/media/platform/s3c-camif/camif-capture.c
+++ b/drivers/media/platform/s3c-camif/camif-capture.c
@@ -280,8 +280,8 @@ static int camif_prepare_addr(struct camif_vp *vp, struct vb2_buffer *vb,
280 return -EINVAL; 280 return -EINVAL;
281 } 281 }
282 282
283 pr_debug("DMA address: y: %#x cb: %#x cr: %#x\n", 283 pr_debug("DMA address: y: %pad cb: %pad cr: %pad\n",
284 paddr->y, paddr->cb, paddr->cr); 284 &paddr->y, &paddr->cb, &paddr->cr);
285 285
286 return 0; 286 return 0;
287} 287}
diff --git a/drivers/media/platform/s3c-camif/camif-regs.c b/drivers/media/platform/s3c-camif/camif-regs.c
index ebf5b184cce4..6e0c9988a191 100644
--- a/drivers/media/platform/s3c-camif/camif-regs.c
+++ b/drivers/media/platform/s3c-camif/camif-regs.c
@@ -214,8 +214,8 @@ void camif_hw_set_output_addr(struct camif_vp *vp,
214 paddr->cr); 214 paddr->cr);
215 } 215 }
216 216
217 pr_debug("dst_buf[%d]: %#X, cb: %#X, cr: %#X\n", 217 pr_debug("dst_buf[%d]: %pad, cb: %pad, cr: %pad\n",
218 i, paddr->y, paddr->cb, paddr->cr); 218 i, &paddr->y, &paddr->cb, &paddr->cr);
219} 219}
220 220
221static void camif_hw_set_out_dma_size(struct camif_vp *vp) 221static void camif_hw_set_out_dma_size(struct camif_vp *vp)
diff --git a/drivers/media/platform/s5p-g2d/g2d.c b/drivers/media/platform/s5p-g2d/g2d.c
index 357af1ebaeda..d79e214ce8ce 100644
--- a/drivers/media/platform/s5p-g2d/g2d.c
+++ b/drivers/media/platform/s5p-g2d/g2d.c
@@ -490,14 +490,13 @@ static void job_abort(void *prv)
490{ 490{
491 struct g2d_ctx *ctx = prv; 491 struct g2d_ctx *ctx = prv;
492 struct g2d_dev *dev = ctx->dev; 492 struct g2d_dev *dev = ctx->dev;
493 int ret;
494 493
495 if (dev->curr == NULL) /* No job currently running */ 494 if (dev->curr == NULL) /* No job currently running */
496 return; 495 return;
497 496
498 ret = wait_event_timeout(dev->irq_queue, 497 wait_event_timeout(dev->irq_queue,
499 dev->curr == NULL, 498 dev->curr == NULL,
500 msecs_to_jiffies(G2D_TIMEOUT)); 499 msecs_to_jiffies(G2D_TIMEOUT));
501} 500}
502 501
503static void device_run(void *prv) 502static void device_run(void *prv)
diff --git a/drivers/media/platform/s5p-jpeg/jpeg-core.c b/drivers/media/platform/s5p-jpeg/jpeg-core.c
index e66acbc2a82d..e525a7c8d885 100644
--- a/drivers/media/platform/s5p-jpeg/jpeg-core.c
+++ b/drivers/media/platform/s5p-jpeg/jpeg-core.c
@@ -729,7 +729,7 @@ static inline void exynos4_jpeg_set_qtbl_chr(void __iomem *regs, int quality)
729 ARRAY_SIZE(qtbl_chrominance[quality])); 729 ARRAY_SIZE(qtbl_chrominance[quality]));
730} 730}
731 731
732void exynos4_jpeg_set_huff_tbl(void __iomem *base) 732static void exynos4_jpeg_set_huff_tbl(void __iomem *base)
733{ 733{
734 exynos4_jpeg_set_tbl(base, hdctbl0, EXYNOS4_HUFF_TBL_HDCLL, 734 exynos4_jpeg_set_tbl(base, hdctbl0, EXYNOS4_HUFF_TBL_HDCLL,
735 ARRAY_SIZE(hdctbl0)); 735 ARRAY_SIZE(hdctbl0));
diff --git a/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c b/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c
index d26e1f846553..e8c2cad93962 100644
--- a/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c
+++ b/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos3250.c
@@ -233,6 +233,7 @@ void exynos3250_jpeg_set_x(void __iomem *regs, unsigned int x)
233 writel(reg, regs + EXYNOS3250_JPGX); 233 writel(reg, regs + EXYNOS3250_JPGX);
234} 234}
235 235
236#if 0 /* Currently unused */
236unsigned int exynos3250_jpeg_get_y(void __iomem *regs) 237unsigned int exynos3250_jpeg_get_y(void __iomem *regs)
237{ 238{
238 return readl(regs + EXYNOS3250_JPGY); 239 return readl(regs + EXYNOS3250_JPGY);
@@ -242,6 +243,7 @@ unsigned int exynos3250_jpeg_get_x(void __iomem *regs)
242{ 243{
243 return readl(regs + EXYNOS3250_JPGX); 244 return readl(regs + EXYNOS3250_JPGX);
244} 245}
246#endif
245 247
246void exynos3250_jpeg_interrupts_enable(void __iomem *regs) 248void exynos3250_jpeg_interrupts_enable(void __iomem *regs)
247{ 249{
diff --git a/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c b/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c
index da8d6a1a984f..ab6d6f43c96f 100644
--- a/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c
+++ b/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c
@@ -23,7 +23,7 @@ void exynos4_jpeg_sw_reset(void __iomem *base)
23 reg = readl(base + EXYNOS4_JPEG_CNTL_REG); 23 reg = readl(base + EXYNOS4_JPEG_CNTL_REG);
24 writel(reg & ~EXYNOS4_SOFT_RESET_HI, base + EXYNOS4_JPEG_CNTL_REG); 24 writel(reg & ~EXYNOS4_SOFT_RESET_HI, base + EXYNOS4_JPEG_CNTL_REG);
25 25
26 ndelay(100000); 26 udelay(100);
27 27
28 writel(reg | EXYNOS4_SOFT_RESET_HI, base + EXYNOS4_JPEG_CNTL_REG); 28 writel(reg | EXYNOS4_SOFT_RESET_HI, base + EXYNOS4_JPEG_CNTL_REG);
29} 29}
@@ -151,9 +151,6 @@ void exynos4_jpeg_set_enc_out_fmt(void __iomem *base, unsigned int out_fmt)
151 151
152void exynos4_jpeg_set_interrupt(void __iomem *base) 152void exynos4_jpeg_set_interrupt(void __iomem *base)
153{ 153{
154 unsigned int reg;
155
156 reg = readl(base + EXYNOS4_INT_EN_REG) & ~EXYNOS4_INT_EN_MASK;
157 writel(EXYNOS4_INT_EN_ALL, base + EXYNOS4_INT_EN_REG); 154 writel(EXYNOS4_INT_EN_ALL, base + EXYNOS4_INT_EN_REG);
158} 155}
159 156
@@ -185,7 +182,7 @@ void exynos4_jpeg_set_huf_table_enable(void __iomem *base, int value)
185 writel(reg | EXYNOS4_HUF_TBL_EN, 182 writel(reg | EXYNOS4_HUF_TBL_EN,
186 base + EXYNOS4_JPEG_CNTL_REG); 183 base + EXYNOS4_JPEG_CNTL_REG);
187 else 184 else
188 writel(reg | ~EXYNOS4_HUF_TBL_EN, 185 writel(reg & ~EXYNOS4_HUF_TBL_EN,
189 base + EXYNOS4_JPEG_CNTL_REG); 186 base + EXYNOS4_JPEG_CNTL_REG);
190} 187}
191 188
@@ -196,9 +193,9 @@ void exynos4_jpeg_set_sys_int_enable(void __iomem *base, int value)
196 reg = readl(base + EXYNOS4_JPEG_CNTL_REG) & ~(EXYNOS4_SYS_INT_EN); 193 reg = readl(base + EXYNOS4_JPEG_CNTL_REG) & ~(EXYNOS4_SYS_INT_EN);
197 194
198 if (value == 1) 195 if (value == 1)
199 writel(EXYNOS4_SYS_INT_EN, base + EXYNOS4_JPEG_CNTL_REG); 196 writel(reg | EXYNOS4_SYS_INT_EN, base + EXYNOS4_JPEG_CNTL_REG);
200 else 197 else
201 writel(~EXYNOS4_SYS_INT_EN, base + EXYNOS4_JPEG_CNTL_REG); 198 writel(reg & ~EXYNOS4_SYS_INT_EN, base + EXYNOS4_JPEG_CNTL_REG);
202} 199}
203 200
204void exynos4_jpeg_set_stream_buf_address(void __iomem *base, 201void exynos4_jpeg_set_stream_buf_address(void __iomem *base,
diff --git a/drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c b/drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c
index 52407d790726..e3b8e67e005f 100644
--- a/drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c
+++ b/drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c
@@ -324,11 +324,9 @@ int s5p_jpeg_stream_stat_ok(void __iomem *regs)
324 324
325void s5p_jpeg_clear_int(void __iomem *regs) 325void s5p_jpeg_clear_int(void __iomem *regs)
326{ 326{
327 unsigned long reg; 327 readl(regs + S5P_JPGINTST);
328
329 reg = readl(regs + S5P_JPGINTST);
330 writel(S5P_INT_RELEASE, regs + S5P_JPGCOM); 328 writel(S5P_INT_RELEASE, regs + S5P_JPGCOM);
331 reg = readl(regs + S5P_JPGOPR); 329 readl(regs + S5P_JPGOPR);
332} 330}
333 331
334unsigned int s5p_jpeg_compressed_size(void __iomem *regs) 332unsigned int s5p_jpeg_compressed_size(void __iomem *regs)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c
index d35b0418ab37..165bc86c5962 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
@@ -37,8 +37,8 @@
37#define S5P_MFC_DEC_NAME "s5p-mfc-dec" 37#define S5P_MFC_DEC_NAME "s5p-mfc-dec"
38#define S5P_MFC_ENC_NAME "s5p-mfc-enc" 38#define S5P_MFC_ENC_NAME "s5p-mfc-enc"
39 39
40int debug; 40int mfc_debug_level;
41module_param(debug, int, S_IRUGO | S_IWUSR); 41module_param_named(debug, mfc_debug_level, int, S_IRUGO | S_IWUSR);
42MODULE_PARM_DESC(debug, "Debug level - higher value produces more verbose messages"); 42MODULE_PARM_DESC(debug, "Debug level - higher value produces more verbose messages");
43 43
44/* Helper functions for interrupt processing */ 44/* Helper functions for interrupt processing */
@@ -150,10 +150,10 @@ static void s5p_mfc_watchdog_worker(struct work_struct *work)
150 if (!ctx) 150 if (!ctx)
151 continue; 151 continue;
152 ctx->state = MFCINST_ERROR; 152 ctx->state = MFCINST_ERROR;
153 s5p_mfc_hw_call(dev->mfc_ops, cleanup_queue, &ctx->dst_queue, 153 s5p_mfc_hw_call_void(dev->mfc_ops, cleanup_queue,
154 &ctx->vq_dst); 154 &ctx->dst_queue, &ctx->vq_dst);
155 s5p_mfc_hw_call(dev->mfc_ops, cleanup_queue, &ctx->src_queue, 155 s5p_mfc_hw_call_void(dev->mfc_ops, cleanup_queue,
156 &ctx->vq_src); 156 &ctx->src_queue, &ctx->vq_src);
157 clear_work_bit(ctx); 157 clear_work_bit(ctx);
158 wake_up_ctx(ctx, S5P_MFC_R2H_CMD_ERR_RET, 0); 158 wake_up_ctx(ctx, S5P_MFC_R2H_CMD_ERR_RET, 0);
159 } 159 }
@@ -264,7 +264,12 @@ static void s5p_mfc_handle_frame_new(struct s5p_mfc_ctx *ctx, unsigned int err)
264 unsigned int frame_type; 264 unsigned int frame_type;
265 265
266 dspl_y_addr = s5p_mfc_hw_call(dev->mfc_ops, get_dspl_y_adr, dev); 266 dspl_y_addr = s5p_mfc_hw_call(dev->mfc_ops, get_dspl_y_adr, dev);
267 frame_type = s5p_mfc_hw_call(dev->mfc_ops, get_disp_frame_type, ctx); 267 if (IS_MFCV6_PLUS(dev))
268 frame_type = s5p_mfc_hw_call(dev->mfc_ops,
269 get_disp_frame_type, ctx);
270 else
271 frame_type = s5p_mfc_hw_call(dev->mfc_ops,
272 get_dec_frame_type, dev);
268 273
269 /* If frame is same as previous then skip and do not dequeue */ 274 /* If frame is same as previous then skip and do not dequeue */
270 if (frame_type == S5P_FIMV_DECODE_FRAME_SKIPPED) { 275 if (frame_type == S5P_FIMV_DECODE_FRAME_SKIPPED) {
@@ -327,12 +332,12 @@ static void s5p_mfc_handle_frame(struct s5p_mfc_ctx *ctx,
327 if (res_change == S5P_FIMV_RES_INCREASE || 332 if (res_change == S5P_FIMV_RES_INCREASE ||
328 res_change == S5P_FIMV_RES_DECREASE) { 333 res_change == S5P_FIMV_RES_DECREASE) {
329 ctx->state = MFCINST_RES_CHANGE_INIT; 334 ctx->state = MFCINST_RES_CHANGE_INIT;
330 s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev); 335 s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev);
331 wake_up_ctx(ctx, reason, err); 336 wake_up_ctx(ctx, reason, err);
332 if (test_and_clear_bit(0, &dev->hw_lock) == 0) 337 if (test_and_clear_bit(0, &dev->hw_lock) == 0)
333 BUG(); 338 BUG();
334 s5p_mfc_clock_off(); 339 s5p_mfc_clock_off();
335 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); 340 s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev);
336 return; 341 return;
337 } 342 }
338 if (ctx->dpb_flush_flag) 343 if (ctx->dpb_flush_flag)
@@ -400,7 +405,7 @@ leave_handle_frame:
400 if ((ctx->src_queue_cnt == 0 && ctx->state != MFCINST_FINISHING) 405 if ((ctx->src_queue_cnt == 0 && ctx->state != MFCINST_FINISHING)
401 || ctx->dst_queue_cnt < ctx->pb_count) 406 || ctx->dst_queue_cnt < ctx->pb_count)
402 clear_work_bit(ctx); 407 clear_work_bit(ctx);
403 s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev); 408 s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev);
404 wake_up_ctx(ctx, reason, err); 409 wake_up_ctx(ctx, reason, err);
405 if (test_and_clear_bit(0, &dev->hw_lock) == 0) 410 if (test_and_clear_bit(0, &dev->hw_lock) == 0)
406 BUG(); 411 BUG();
@@ -409,7 +414,7 @@ leave_handle_frame:
409 if (test_bit(0, &dev->enter_suspend)) 414 if (test_bit(0, &dev->enter_suspend))
410 wake_up_dev(dev, reason, err); 415 wake_up_dev(dev, reason, err);
411 else 416 else
412 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); 417 s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev);
413} 418}
414 419
415/* Error handling for interrupt */ 420/* Error handling for interrupt */
@@ -435,10 +440,10 @@ static void s5p_mfc_handle_error(struct s5p_mfc_dev *dev,
435 ctx->state = MFCINST_ERROR; 440 ctx->state = MFCINST_ERROR;
436 /* Mark all dst buffers as having an error */ 441 /* Mark all dst buffers as having an error */
437 spin_lock_irqsave(&dev->irqlock, flags); 442 spin_lock_irqsave(&dev->irqlock, flags);
438 s5p_mfc_hw_call(dev->mfc_ops, cleanup_queue, 443 s5p_mfc_hw_call_void(dev->mfc_ops, cleanup_queue,
439 &ctx->dst_queue, &ctx->vq_dst); 444 &ctx->dst_queue, &ctx->vq_dst);
440 /* Mark all src buffers as having an error */ 445 /* Mark all src buffers as having an error */
441 s5p_mfc_hw_call(dev->mfc_ops, cleanup_queue, 446 s5p_mfc_hw_call_void(dev->mfc_ops, cleanup_queue,
442 &ctx->src_queue, &ctx->vq_src); 447 &ctx->src_queue, &ctx->vq_src);
443 spin_unlock_irqrestore(&dev->irqlock, flags); 448 spin_unlock_irqrestore(&dev->irqlock, flags);
444 wake_up_ctx(ctx, reason, err); 449 wake_up_ctx(ctx, reason, err);
@@ -452,7 +457,7 @@ static void s5p_mfc_handle_error(struct s5p_mfc_dev *dev,
452 } 457 }
453 if (test_and_clear_bit(0, &dev->hw_lock) == 0) 458 if (test_and_clear_bit(0, &dev->hw_lock) == 0)
454 BUG(); 459 BUG();
455 s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev); 460 s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev);
456 s5p_mfc_clock_off(); 461 s5p_mfc_clock_off();
457 wake_up_dev(dev, reason, err); 462 wake_up_dev(dev, reason, err);
458 return; 463 return;
@@ -476,7 +481,7 @@ static void s5p_mfc_handle_seq_done(struct s5p_mfc_ctx *ctx,
476 ctx->img_height = s5p_mfc_hw_call(dev->mfc_ops, get_img_height, 481 ctx->img_height = s5p_mfc_hw_call(dev->mfc_ops, get_img_height,
477 dev); 482 dev);
478 483
479 s5p_mfc_hw_call(dev->mfc_ops, dec_calc_dpb_size, ctx); 484 s5p_mfc_hw_call_void(dev->mfc_ops, dec_calc_dpb_size, ctx);
480 485
481 ctx->pb_count = s5p_mfc_hw_call(dev->mfc_ops, get_dpb_count, 486 ctx->pb_count = s5p_mfc_hw_call(dev->mfc_ops, get_dpb_count,
482 dev); 487 dev);
@@ -503,12 +508,12 @@ static void s5p_mfc_handle_seq_done(struct s5p_mfc_ctx *ctx,
503 ctx->head_processed = 1; 508 ctx->head_processed = 1;
504 } 509 }
505 } 510 }
506 s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev); 511 s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev);
507 clear_work_bit(ctx); 512 clear_work_bit(ctx);
508 if (test_and_clear_bit(0, &dev->hw_lock) == 0) 513 if (test_and_clear_bit(0, &dev->hw_lock) == 0)
509 BUG(); 514 BUG();
510 s5p_mfc_clock_off(); 515 s5p_mfc_clock_off();
511 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); 516 s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev);
512 wake_up_ctx(ctx, reason, err); 517 wake_up_ctx(ctx, reason, err);
513} 518}
514 519
@@ -523,7 +528,7 @@ static void s5p_mfc_handle_init_buffers(struct s5p_mfc_ctx *ctx,
523 if (ctx == NULL) 528 if (ctx == NULL)
524 return; 529 return;
525 dev = ctx->dev; 530 dev = ctx->dev;
526 s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev); 531 s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev);
527 ctx->int_type = reason; 532 ctx->int_type = reason;
528 ctx->int_err = err; 533 ctx->int_err = err;
529 ctx->int_cond = 1; 534 ctx->int_cond = 1;
@@ -550,7 +555,7 @@ static void s5p_mfc_handle_init_buffers(struct s5p_mfc_ctx *ctx,
550 s5p_mfc_clock_off(); 555 s5p_mfc_clock_off();
551 556
552 wake_up(&ctx->queue); 557 wake_up(&ctx->queue);
553 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); 558 s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev);
554 } else { 559 } else {
555 if (test_and_clear_bit(0, &dev->hw_lock) == 0) 560 if (test_and_clear_bit(0, &dev->hw_lock) == 0)
556 BUG(); 561 BUG();
@@ -591,7 +596,7 @@ static void s5p_mfc_handle_stream_complete(struct s5p_mfc_ctx *ctx,
591 596
592 s5p_mfc_clock_off(); 597 s5p_mfc_clock_off();
593 wake_up(&ctx->queue); 598 wake_up(&ctx->queue);
594 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); 599 s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev);
595} 600}
596 601
597/* Interrupt processing */ 602/* Interrupt processing */
@@ -628,12 +633,12 @@ static irqreturn_t s5p_mfc_irq(int irq, void *priv)
628 if (ctx->c_ops->post_frame_start) { 633 if (ctx->c_ops->post_frame_start) {
629 if (ctx->c_ops->post_frame_start(ctx)) 634 if (ctx->c_ops->post_frame_start(ctx))
630 mfc_err("post_frame_start() failed\n"); 635 mfc_err("post_frame_start() failed\n");
631 s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev); 636 s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev);
632 wake_up_ctx(ctx, reason, err); 637 wake_up_ctx(ctx, reason, err);
633 if (test_and_clear_bit(0, &dev->hw_lock) == 0) 638 if (test_and_clear_bit(0, &dev->hw_lock) == 0)
634 BUG(); 639 BUG();
635 s5p_mfc_clock_off(); 640 s5p_mfc_clock_off();
636 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); 641 s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev);
637 } else { 642 } else {
638 s5p_mfc_handle_frame(ctx, reason, err); 643 s5p_mfc_handle_frame(ctx, reason, err);
639 } 644 }
@@ -663,7 +668,7 @@ static irqreturn_t s5p_mfc_irq(int irq, void *priv)
663 case S5P_MFC_R2H_CMD_WAKEUP_RET: 668 case S5P_MFC_R2H_CMD_WAKEUP_RET:
664 if (ctx) 669 if (ctx)
665 clear_work_bit(ctx); 670 clear_work_bit(ctx);
666 s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev); 671 s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev);
667 wake_up_dev(dev, reason, err); 672 wake_up_dev(dev, reason, err);
668 clear_bit(0, &dev->hw_lock); 673 clear_bit(0, &dev->hw_lock);
669 clear_bit(0, &dev->enter_suspend); 674 clear_bit(0, &dev->enter_suspend);
@@ -685,12 +690,12 @@ static irqreturn_t s5p_mfc_irq(int irq, void *priv)
685 690
686 default: 691 default:
687 mfc_debug(2, "Unknown int reason\n"); 692 mfc_debug(2, "Unknown int reason\n");
688 s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev); 693 s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev);
689 } 694 }
690 mfc_debug_leave(); 695 mfc_debug_leave();
691 return IRQ_HANDLED; 696 return IRQ_HANDLED;
692irq_cleanup_hw: 697irq_cleanup_hw:
693 s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev); 698 s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev);
694 ctx->int_type = reason; 699 ctx->int_type = reason;
695 ctx->int_err = err; 700 ctx->int_err = err;
696 ctx->int_cond = 1; 701 ctx->int_cond = 1;
@@ -699,7 +704,7 @@ irq_cleanup_hw:
699 704
700 s5p_mfc_clock_off(); 705 s5p_mfc_clock_off();
701 706
702 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); 707 s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev);
703 mfc_debug(2, "Exit via irq_cleanup_hw\n"); 708 mfc_debug(2, "Exit via irq_cleanup_hw\n");
704 return IRQ_HANDLED; 709 return IRQ_HANDLED;
705} 710}
@@ -1311,11 +1316,9 @@ static int s5p_mfc_runtime_resume(struct device *dev)
1311{ 1316{
1312 struct platform_device *pdev = to_platform_device(dev); 1317 struct platform_device *pdev = to_platform_device(dev);
1313 struct s5p_mfc_dev *m_dev = platform_get_drvdata(pdev); 1318 struct s5p_mfc_dev *m_dev = platform_get_drvdata(pdev);
1314 int pre_power;
1315 1319
1316 if (!m_dev->alloc_ctx) 1320 if (!m_dev->alloc_ctx)
1317 return 0; 1321 return 0;
1318 pre_power = atomic_read(&m_dev->pm.power);
1319 atomic_set(&m_dev->pm.power, 1); 1322 atomic_set(&m_dev->pm.power, 1);
1320 return 0; 1323 return 0;
1321} 1324}
@@ -1328,20 +1331,20 @@ static const struct dev_pm_ops s5p_mfc_pm_ops = {
1328 NULL) 1331 NULL)
1329}; 1332};
1330 1333
1331struct s5p_mfc_buf_size_v5 mfc_buf_size_v5 = { 1334static struct s5p_mfc_buf_size_v5 mfc_buf_size_v5 = {
1332 .h264_ctx = MFC_H264_CTX_BUF_SIZE, 1335 .h264_ctx = MFC_H264_CTX_BUF_SIZE,
1333 .non_h264_ctx = MFC_CTX_BUF_SIZE, 1336 .non_h264_ctx = MFC_CTX_BUF_SIZE,
1334 .dsc = DESC_BUF_SIZE, 1337 .dsc = DESC_BUF_SIZE,
1335 .shm = SHARED_BUF_SIZE, 1338 .shm = SHARED_BUF_SIZE,
1336}; 1339};
1337 1340
1338struct s5p_mfc_buf_size buf_size_v5 = { 1341static struct s5p_mfc_buf_size buf_size_v5 = {
1339 .fw = MAX_FW_SIZE, 1342 .fw = MAX_FW_SIZE,
1340 .cpb = MAX_CPB_SIZE, 1343 .cpb = MAX_CPB_SIZE,
1341 .priv = &mfc_buf_size_v5, 1344 .priv = &mfc_buf_size_v5,
1342}; 1345};
1343 1346
1344struct s5p_mfc_buf_align mfc_buf_align_v5 = { 1347static struct s5p_mfc_buf_align mfc_buf_align_v5 = {
1345 .base = MFC_BASE_ALIGN_ORDER, 1348 .base = MFC_BASE_ALIGN_ORDER,
1346}; 1349};
1347 1350
@@ -1354,7 +1357,7 @@ static struct s5p_mfc_variant mfc_drvdata_v5 = {
1354 .fw_name[0] = "s5p-mfc.fw", 1357 .fw_name[0] = "s5p-mfc.fw",
1355}; 1358};
1356 1359
1357struct s5p_mfc_buf_size_v6 mfc_buf_size_v6 = { 1360static struct s5p_mfc_buf_size_v6 mfc_buf_size_v6 = {
1358 .dev_ctx = MFC_CTX_BUF_SIZE_V6, 1361 .dev_ctx = MFC_CTX_BUF_SIZE_V6,
1359 .h264_dec_ctx = MFC_H264_DEC_CTX_BUF_SIZE_V6, 1362 .h264_dec_ctx = MFC_H264_DEC_CTX_BUF_SIZE_V6,
1360 .other_dec_ctx = MFC_OTHER_DEC_CTX_BUF_SIZE_V6, 1363 .other_dec_ctx = MFC_OTHER_DEC_CTX_BUF_SIZE_V6,
@@ -1362,13 +1365,13 @@ struct s5p_mfc_buf_size_v6 mfc_buf_size_v6 = {
1362 .other_enc_ctx = MFC_OTHER_ENC_CTX_BUF_SIZE_V6, 1365 .other_enc_ctx = MFC_OTHER_ENC_CTX_BUF_SIZE_V6,
1363}; 1366};
1364 1367
1365struct s5p_mfc_buf_size buf_size_v6 = { 1368static struct s5p_mfc_buf_size buf_size_v6 = {
1366 .fw = MAX_FW_SIZE_V6, 1369 .fw = MAX_FW_SIZE_V6,
1367 .cpb = MAX_CPB_SIZE_V6, 1370 .cpb = MAX_CPB_SIZE_V6,
1368 .priv = &mfc_buf_size_v6, 1371 .priv = &mfc_buf_size_v6,
1369}; 1372};
1370 1373
1371struct s5p_mfc_buf_align mfc_buf_align_v6 = { 1374static struct s5p_mfc_buf_align mfc_buf_align_v6 = {
1372 .base = 0, 1375 .base = 0,
1373}; 1376};
1374 1377
@@ -1386,7 +1389,7 @@ static struct s5p_mfc_variant mfc_drvdata_v6 = {
1386 .fw_name[1] = "s5p-mfc-v6-v2.fw", 1389 .fw_name[1] = "s5p-mfc-v6-v2.fw",
1387}; 1390};
1388 1391
1389struct s5p_mfc_buf_size_v6 mfc_buf_size_v7 = { 1392static struct s5p_mfc_buf_size_v6 mfc_buf_size_v7 = {
1390 .dev_ctx = MFC_CTX_BUF_SIZE_V7, 1393 .dev_ctx = MFC_CTX_BUF_SIZE_V7,
1391 .h264_dec_ctx = MFC_H264_DEC_CTX_BUF_SIZE_V7, 1394 .h264_dec_ctx = MFC_H264_DEC_CTX_BUF_SIZE_V7,
1392 .other_dec_ctx = MFC_OTHER_DEC_CTX_BUF_SIZE_V7, 1395 .other_dec_ctx = MFC_OTHER_DEC_CTX_BUF_SIZE_V7,
@@ -1394,13 +1397,13 @@ struct s5p_mfc_buf_size_v6 mfc_buf_size_v7 = {
1394 .other_enc_ctx = MFC_OTHER_ENC_CTX_BUF_SIZE_V7, 1397 .other_enc_ctx = MFC_OTHER_ENC_CTX_BUF_SIZE_V7,
1395}; 1398};
1396 1399
1397struct s5p_mfc_buf_size buf_size_v7 = { 1400static struct s5p_mfc_buf_size buf_size_v7 = {
1398 .fw = MAX_FW_SIZE_V7, 1401 .fw = MAX_FW_SIZE_V7,
1399 .cpb = MAX_CPB_SIZE_V7, 1402 .cpb = MAX_CPB_SIZE_V7,
1400 .priv = &mfc_buf_size_v7, 1403 .priv = &mfc_buf_size_v7,
1401}; 1404};
1402 1405
1403struct s5p_mfc_buf_align mfc_buf_align_v7 = { 1406static struct s5p_mfc_buf_align mfc_buf_align_v7 = {
1404 .base = 0, 1407 .base = 0,
1405}; 1408};
1406 1409
@@ -1413,7 +1416,7 @@ static struct s5p_mfc_variant mfc_drvdata_v7 = {
1413 .fw_name[0] = "s5p-mfc-v7.fw", 1416 .fw_name[0] = "s5p-mfc-v7.fw",
1414}; 1417};
1415 1418
1416struct s5p_mfc_buf_size_v6 mfc_buf_size_v8 = { 1419static struct s5p_mfc_buf_size_v6 mfc_buf_size_v8 = {
1417 .dev_ctx = MFC_CTX_BUF_SIZE_V8, 1420 .dev_ctx = MFC_CTX_BUF_SIZE_V8,
1418 .h264_dec_ctx = MFC_H264_DEC_CTX_BUF_SIZE_V8, 1421 .h264_dec_ctx = MFC_H264_DEC_CTX_BUF_SIZE_V8,
1419 .other_dec_ctx = MFC_OTHER_DEC_CTX_BUF_SIZE_V8, 1422 .other_dec_ctx = MFC_OTHER_DEC_CTX_BUF_SIZE_V8,
@@ -1421,13 +1424,13 @@ struct s5p_mfc_buf_size_v6 mfc_buf_size_v8 = {
1421 .other_enc_ctx = MFC_OTHER_ENC_CTX_BUF_SIZE_V8, 1424 .other_enc_ctx = MFC_OTHER_ENC_CTX_BUF_SIZE_V8,
1422}; 1425};
1423 1426
1424struct s5p_mfc_buf_size buf_size_v8 = { 1427static struct s5p_mfc_buf_size buf_size_v8 = {
1425 .fw = MAX_FW_SIZE_V8, 1428 .fw = MAX_FW_SIZE_V8,
1426 .cpb = MAX_CPB_SIZE_V8, 1429 .cpb = MAX_CPB_SIZE_V8,
1427 .priv = &mfc_buf_size_v8, 1430 .priv = &mfc_buf_size_v8,
1428}; 1431};
1429 1432
1430struct s5p_mfc_buf_align mfc_buf_align_v8 = { 1433static struct s5p_mfc_buf_align mfc_buf_align_v8 = {
1431 .base = 0, 1434 .base = 0,
1432}; 1435};
1433 1436
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v5.c b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v5.c
index 9a6efd6c1329..8c4739ca16d6 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v5.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v5.c
@@ -14,6 +14,7 @@
14#include "s5p_mfc_cmd.h" 14#include "s5p_mfc_cmd.h"
15#include "s5p_mfc_common.h" 15#include "s5p_mfc_common.h"
16#include "s5p_mfc_debug.h" 16#include "s5p_mfc_debug.h"
17#include "s5p_mfc_cmd_v5.h"
17 18
18/* This function is used to send a command to the MFC */ 19/* This function is used to send a command to the MFC */
19static int s5p_mfc_cmd_host2risc_v5(struct s5p_mfc_dev *dev, int cmd, 20static int s5p_mfc_cmd_host2risc_v5(struct s5p_mfc_dev *dev, int cmd,
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
index ec1a5947ed7d..f17609669b96 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
@@ -16,6 +16,7 @@
16#include "s5p_mfc_debug.h" 16#include "s5p_mfc_debug.h"
17#include "s5p_mfc_intr.h" 17#include "s5p_mfc_intr.h"
18#include "s5p_mfc_opr.h" 18#include "s5p_mfc_opr.h"
19#include "s5p_mfc_cmd_v6.h"
19 20
20static int s5p_mfc_cmd_host2risc_v6(struct s5p_mfc_dev *dev, int cmd, 21static int s5p_mfc_cmd_host2risc_v6(struct s5p_mfc_dev *dev, int cmd,
21 struct s5p_mfc_cmd_args *args) 22 struct s5p_mfc_cmd_args *args)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index 01816ffb384b..3e41ca1293ed 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -698,6 +698,12 @@ struct mfc_control {
698#define s5p_mfc_hw_call(f, op, args...) \ 698#define s5p_mfc_hw_call(f, op, args...) \
699 ((f && f->op) ? f->op(args) : -ENODEV) 699 ((f && f->op) ? f->op(args) : -ENODEV)
700 700
701#define s5p_mfc_hw_call_void(f, op, args...) \
702do { \
703 if (f && f->op) \
704 f->op(args); \
705} while (0)
706
701#define fh_to_ctx(__fh) container_of(__fh, struct s5p_mfc_ctx, fh) 707#define fh_to_ctx(__fh) container_of(__fh, struct s5p_mfc_ctx, fh)
702#define ctrl_to_ctx(__ctrl) \ 708#define ctrl_to_ctx(__ctrl) \
703 container_of((__ctrl)->handler, struct s5p_mfc_ctx, ctrl_handler) 709 container_of((__ctrl)->handler, struct s5p_mfc_ctx, ctrl_handler)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
index ca9f78922832..0c885a8a0e9f 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
@@ -21,6 +21,7 @@
21#include "s5p_mfc_intr.h" 21#include "s5p_mfc_intr.h"
22#include "s5p_mfc_opr.h" 22#include "s5p_mfc_opr.h"
23#include "s5p_mfc_pm.h" 23#include "s5p_mfc_pm.h"
24#include "s5p_mfc_ctrl.h"
24 25
25/* Allocate memory for firmware */ 26/* Allocate memory for firmware */
26int s5p_mfc_alloc_firmware(struct s5p_mfc_dev *dev) 27int s5p_mfc_alloc_firmware(struct s5p_mfc_dev *dev)
@@ -188,12 +189,12 @@ static inline void s5p_mfc_init_memctrl(struct s5p_mfc_dev *dev)
188{ 189{
189 if (IS_MFCV6_PLUS(dev)) { 190 if (IS_MFCV6_PLUS(dev)) {
190 mfc_write(dev, dev->bank1, S5P_FIMV_RISC_BASE_ADDRESS_V6); 191 mfc_write(dev, dev->bank1, S5P_FIMV_RISC_BASE_ADDRESS_V6);
191 mfc_debug(2, "Base Address : %08x\n", dev->bank1); 192 mfc_debug(2, "Base Address : %pad\n", &dev->bank1);
192 } else { 193 } else {
193 mfc_write(dev, dev->bank1, S5P_FIMV_MC_DRAMBASE_ADR_A); 194 mfc_write(dev, dev->bank1, S5P_FIMV_MC_DRAMBASE_ADR_A);
194 mfc_write(dev, dev->bank2, S5P_FIMV_MC_DRAMBASE_ADR_B); 195 mfc_write(dev, dev->bank2, S5P_FIMV_MC_DRAMBASE_ADR_B);
195 mfc_debug(2, "Bank1: %08x, Bank2: %08x\n", 196 mfc_debug(2, "Bank1: %pad, Bank2: %pad\n",
196 dev->bank1, dev->bank2); 197 &dev->bank1, &dev->bank2);
197 } 198 }
198} 199}
199 200
@@ -257,9 +258,9 @@ int s5p_mfc_init_hw(struct s5p_mfc_dev *dev)
257 s5p_mfc_clock_off(); 258 s5p_mfc_clock_off();
258 return ret; 259 return ret;
259 } 260 }
260 mfc_debug(2, "Ok, now will write a command to init the system\n"); 261 mfc_debug(2, "Ok, now will wait for completion of hardware init\n");
261 if (s5p_mfc_wait_for_done_dev(dev, S5P_MFC_R2H_CMD_SYS_INIT_RET)) { 262 if (s5p_mfc_wait_for_done_dev(dev, S5P_MFC_R2H_CMD_SYS_INIT_RET)) {
262 mfc_err("Failed to load firmware\n"); 263 mfc_err("Failed to init hardware\n");
263 s5p_mfc_reset(dev); 264 s5p_mfc_reset(dev);
264 s5p_mfc_clock_off(); 265 s5p_mfc_clock_off();
265 return -EIO; 266 return -EIO;
@@ -293,7 +294,7 @@ void s5p_mfc_deinit_hw(struct s5p_mfc_dev *dev)
293 s5p_mfc_clock_on(); 294 s5p_mfc_clock_on();
294 295
295 s5p_mfc_reset(dev); 296 s5p_mfc_reset(dev);
296 s5p_mfc_hw_call(dev->mfc_ops, release_dev_context_buffer, dev); 297 s5p_mfc_hw_call_void(dev->mfc_ops, release_dev_context_buffer, dev);
297 298
298 s5p_mfc_clock_off(); 299 s5p_mfc_clock_off();
299} 300}
@@ -396,7 +397,7 @@ int s5p_mfc_open_mfc_inst(struct s5p_mfc_dev *dev, struct s5p_mfc_ctx *ctx)
396 397
397 set_work_bit_irqsave(ctx); 398 set_work_bit_irqsave(ctx);
398 s5p_mfc_clean_ctx_int_flags(ctx); 399 s5p_mfc_clean_ctx_int_flags(ctx);
399 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); 400 s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev);
400 if (s5p_mfc_wait_for_done_ctx(ctx, 401 if (s5p_mfc_wait_for_done_ctx(ctx,
401 S5P_MFC_R2H_CMD_OPEN_INSTANCE_RET, 0)) { 402 S5P_MFC_R2H_CMD_OPEN_INSTANCE_RET, 0)) {
402 /* Error or timeout */ 403 /* Error or timeout */
@@ -410,9 +411,9 @@ int s5p_mfc_open_mfc_inst(struct s5p_mfc_dev *dev, struct s5p_mfc_ctx *ctx)
410 411
411err_free_desc_buf: 412err_free_desc_buf:
412 if (ctx->type == MFCINST_DECODER) 413 if (ctx->type == MFCINST_DECODER)
413 s5p_mfc_hw_call(dev->mfc_ops, release_dec_desc_buffer, ctx); 414 s5p_mfc_hw_call_void(dev->mfc_ops, release_dec_desc_buffer, ctx);
414err_free_inst_buf: 415err_free_inst_buf:
415 s5p_mfc_hw_call(dev->mfc_ops, release_instance_buffer, ctx); 416 s5p_mfc_hw_call_void(dev->mfc_ops, release_instance_buffer, ctx);
416err: 417err:
417 return ret; 418 return ret;
418} 419}
@@ -422,17 +423,17 @@ void s5p_mfc_close_mfc_inst(struct s5p_mfc_dev *dev, struct s5p_mfc_ctx *ctx)
422 ctx->state = MFCINST_RETURN_INST; 423 ctx->state = MFCINST_RETURN_INST;
423 set_work_bit_irqsave(ctx); 424 set_work_bit_irqsave(ctx);
424 s5p_mfc_clean_ctx_int_flags(ctx); 425 s5p_mfc_clean_ctx_int_flags(ctx);
425 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); 426 s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev);
426 /* Wait until instance is returned or timeout occurred */ 427 /* Wait until instance is returned or timeout occurred */
427 if (s5p_mfc_wait_for_done_ctx(ctx, 428 if (s5p_mfc_wait_for_done_ctx(ctx,
428 S5P_MFC_R2H_CMD_CLOSE_INSTANCE_RET, 0)) 429 S5P_MFC_R2H_CMD_CLOSE_INSTANCE_RET, 0))
429 mfc_err("Err returning instance\n"); 430 mfc_err("Err returning instance\n");
430 431
431 /* Free resources */ 432 /* Free resources */
432 s5p_mfc_hw_call(dev->mfc_ops, release_codec_buffers, ctx); 433 s5p_mfc_hw_call_void(dev->mfc_ops, release_codec_buffers, ctx);
433 s5p_mfc_hw_call(dev->mfc_ops, release_instance_buffer, ctx); 434 s5p_mfc_hw_call_void(dev->mfc_ops, release_instance_buffer, ctx);
434 if (ctx->type == MFCINST_DECODER) 435 if (ctx->type == MFCINST_DECODER)
435 s5p_mfc_hw_call(dev->mfc_ops, release_dec_desc_buffer, ctx); 436 s5p_mfc_hw_call_void(dev->mfc_ops, release_dec_desc_buffer, ctx);
436 437
437 ctx->inst_no = MFC_NO_INSTANCE_SET; 438 ctx->inst_no = MFC_NO_INSTANCE_SET;
438 ctx->state = MFCINST_FREE; 439 ctx->state = MFCINST_FREE;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_debug.h b/drivers/media/platform/s5p-mfc/s5p_mfc_debug.h
index 8e608f5aa0d7..5936923c631c 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_debug.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_debug.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * drivers/media/platform/samsung/mfc5/s5p_mfc_debug.h 2 * drivers/media/platform/s5p-mfc/s5p_mfc_debug.h
3 * 3 *
4 * Header file for Samsung MFC (Multi Function Codec - FIMV) driver 4 * Header file for Samsung MFC (Multi Function Codec - FIMV) driver
5 * This file contains debug macros 5 * This file contains debug macros
@@ -18,11 +18,11 @@
18#define DEBUG 18#define DEBUG
19 19
20#ifdef DEBUG 20#ifdef DEBUG
21extern int debug; 21extern int mfc_debug_level;
22 22
23#define mfc_debug(level, fmt, args...) \ 23#define mfc_debug(level, fmt, args...) \
24 do { \ 24 do { \
25 if (debug >= level) \ 25 if (mfc_debug_level >= level) \
26 printk(KERN_DEBUG "%s:%d: " fmt, \ 26 printk(KERN_DEBUG "%s:%d: " fmt, \
27 __func__, __LINE__, ##args); \ 27 __func__, __LINE__, ##args); \
28 } while (0) 28 } while (0)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
index 9103258b7df3..a98fe023deaf 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
@@ -283,17 +283,13 @@ static int vidioc_querycap(struct file *file, void *priv,
283 283
284/* Enumerate format */ 284/* Enumerate format */
285static int vidioc_enum_fmt(struct file *file, struct v4l2_fmtdesc *f, 285static int vidioc_enum_fmt(struct file *file, struct v4l2_fmtdesc *f,
286 bool mplane, bool out) 286 bool out)
287{ 287{
288 struct s5p_mfc_dev *dev = video_drvdata(file); 288 struct s5p_mfc_dev *dev = video_drvdata(file);
289 struct s5p_mfc_fmt *fmt; 289 struct s5p_mfc_fmt *fmt;
290 int i, j = 0; 290 int i, j = 0;
291 291
292 for (i = 0; i < ARRAY_SIZE(formats); ++i) { 292 for (i = 0; i < ARRAY_SIZE(formats); ++i) {
293 if (mplane && formats[i].num_planes == 1)
294 continue;
295 else if (!mplane && formats[i].num_planes > 1)
296 continue;
297 if (out && formats[i].type != MFC_FMT_DEC) 293 if (out && formats[i].type != MFC_FMT_DEC)
298 continue; 294 continue;
299 else if (!out && formats[i].type != MFC_FMT_RAW) 295 else if (!out && formats[i].type != MFC_FMT_RAW)
@@ -313,28 +309,16 @@ static int vidioc_enum_fmt(struct file *file, struct v4l2_fmtdesc *f,
313 return 0; 309 return 0;
314} 310}
315 311
316static int vidioc_enum_fmt_vid_cap(struct file *file, void *pirv,
317 struct v4l2_fmtdesc *f)
318{
319 return vidioc_enum_fmt(file, f, false, false);
320}
321
322static int vidioc_enum_fmt_vid_cap_mplane(struct file *file, void *pirv, 312static int vidioc_enum_fmt_vid_cap_mplane(struct file *file, void *pirv,
323 struct v4l2_fmtdesc *f) 313 struct v4l2_fmtdesc *f)
324{ 314{
325 return vidioc_enum_fmt(file, f, true, false); 315 return vidioc_enum_fmt(file, f, false);
326}
327
328static int vidioc_enum_fmt_vid_out(struct file *file, void *priv,
329 struct v4l2_fmtdesc *f)
330{
331 return vidioc_enum_fmt(file, f, false, true);
332} 316}
333 317
334static int vidioc_enum_fmt_vid_out_mplane(struct file *file, void *priv, 318static int vidioc_enum_fmt_vid_out_mplane(struct file *file, void *priv,
335 struct v4l2_fmtdesc *f) 319 struct v4l2_fmtdesc *f)
336{ 320{
337 return vidioc_enum_fmt(file, f, true, true); 321 return vidioc_enum_fmt(file, f, true);
338} 322}
339 323
340/* Get format */ 324/* Get format */
@@ -543,7 +527,7 @@ static int reqbufs_capture(struct s5p_mfc_dev *dev, struct s5p_mfc_ctx *ctx,
543 ret = vb2_reqbufs(&ctx->vq_dst, reqbufs); 527 ret = vb2_reqbufs(&ctx->vq_dst, reqbufs);
544 if (ret) 528 if (ret)
545 goto out; 529 goto out;
546 s5p_mfc_hw_call(dev->mfc_ops, release_codec_buffers, ctx); 530 s5p_mfc_hw_call_void(dev->mfc_ops, release_codec_buffers, ctx);
547 ctx->dst_bufs_cnt = 0; 531 ctx->dst_bufs_cnt = 0;
548 } else if (ctx->capture_state == QUEUE_FREE) { 532 } else if (ctx->capture_state == QUEUE_FREE) {
549 WARN_ON(ctx->dst_bufs_cnt != 0); 533 WARN_ON(ctx->dst_bufs_cnt != 0);
@@ -571,7 +555,7 @@ static int reqbufs_capture(struct s5p_mfc_dev *dev, struct s5p_mfc_ctx *ctx,
571 555
572 if (s5p_mfc_ctx_ready(ctx)) 556 if (s5p_mfc_ctx_ready(ctx))
573 set_work_bit_irqsave(ctx); 557 set_work_bit_irqsave(ctx);
574 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); 558 s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev);
575 s5p_mfc_wait_for_done_ctx(ctx, S5P_MFC_R2H_CMD_INIT_BUFFERS_RET, 559 s5p_mfc_wait_for_done_ctx(ctx, S5P_MFC_R2H_CMD_INIT_BUFFERS_RET,
576 0); 560 0);
577 } else { 561 } else {
@@ -823,8 +807,8 @@ static int vidioc_g_crop(struct file *file, void *priv,
823 return 0; 807 return 0;
824} 808}
825 809
826int vidioc_decoder_cmd(struct file *file, void *priv, 810static int vidioc_decoder_cmd(struct file *file, void *priv,
827 struct v4l2_decoder_cmd *cmd) 811 struct v4l2_decoder_cmd *cmd)
828{ 812{
829 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv); 813 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
830 struct s5p_mfc_dev *dev = ctx->dev; 814 struct s5p_mfc_dev *dev = ctx->dev;
@@ -846,7 +830,7 @@ int vidioc_decoder_cmd(struct file *file, void *priv,
846 if (s5p_mfc_ctx_ready(ctx)) 830 if (s5p_mfc_ctx_ready(ctx))
847 set_work_bit_irqsave(ctx); 831 set_work_bit_irqsave(ctx);
848 spin_unlock_irqrestore(&dev->irqlock, flags); 832 spin_unlock_irqrestore(&dev->irqlock, flags);
849 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); 833 s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev);
850 } else { 834 } else {
851 mfc_err("EOS: marking last buffer of stream"); 835 mfc_err("EOS: marking last buffer of stream");
852 buf = list_entry(ctx->src_queue.prev, 836 buf = list_entry(ctx->src_queue.prev,
@@ -881,9 +865,7 @@ static int vidioc_subscribe_event(struct v4l2_fh *fh,
881/* v4l2_ioctl_ops */ 865/* v4l2_ioctl_ops */
882static const struct v4l2_ioctl_ops s5p_mfc_dec_ioctl_ops = { 866static const struct v4l2_ioctl_ops s5p_mfc_dec_ioctl_ops = {
883 .vidioc_querycap = vidioc_querycap, 867 .vidioc_querycap = vidioc_querycap,
884 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
885 .vidioc_enum_fmt_vid_cap_mplane = vidioc_enum_fmt_vid_cap_mplane, 868 .vidioc_enum_fmt_vid_cap_mplane = vidioc_enum_fmt_vid_cap_mplane,
886 .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out,
887 .vidioc_enum_fmt_vid_out_mplane = vidioc_enum_fmt_vid_out_mplane, 869 .vidioc_enum_fmt_vid_out_mplane = vidioc_enum_fmt_vid_out_mplane,
888 .vidioc_g_fmt_vid_cap_mplane = vidioc_g_fmt, 870 .vidioc_g_fmt_vid_cap_mplane = vidioc_g_fmt,
889 .vidioc_g_fmt_vid_out_mplane = vidioc_g_fmt, 871 .vidioc_g_fmt_vid_out_mplane = vidioc_g_fmt,
@@ -990,7 +972,7 @@ static int s5p_mfc_buf_init(struct vb2_buffer *vb)
990 if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { 972 if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
991 if (ctx->capture_state == QUEUE_BUFS_MMAPED) 973 if (ctx->capture_state == QUEUE_BUFS_MMAPED)
992 return 0; 974 return 0;
993 for (i = 0; i <= ctx->src_fmt->num_planes ; i++) { 975 for (i = 0; i < ctx->dst_fmt->num_planes; i++) {
994 if (IS_ERR_OR_NULL(ERR_PTR( 976 if (IS_ERR_OR_NULL(ERR_PTR(
995 vb2_dma_contig_plane_dma_addr(vb, i)))) { 977 vb2_dma_contig_plane_dma_addr(vb, i)))) {
996 mfc_err("Plane mem not allocated\n"); 978 mfc_err("Plane mem not allocated\n");
@@ -1044,7 +1026,7 @@ static int s5p_mfc_start_streaming(struct vb2_queue *q, unsigned int count)
1044 /* If context is ready then dev = work->data;schedule it to run */ 1026 /* If context is ready then dev = work->data;schedule it to run */
1045 if (s5p_mfc_ctx_ready(ctx)) 1027 if (s5p_mfc_ctx_ready(ctx))
1046 set_work_bit_irqsave(ctx); 1028 set_work_bit_irqsave(ctx);
1047 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); 1029 s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev);
1048 return 0; 1030 return 0;
1049} 1031}
1050 1032
@@ -1065,8 +1047,8 @@ static void s5p_mfc_stop_streaming(struct vb2_queue *q)
1065 } 1047 }
1066 if (q->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { 1048 if (q->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1067 spin_lock_irqsave(&dev->irqlock, flags); 1049 spin_lock_irqsave(&dev->irqlock, flags);
1068 s5p_mfc_hw_call(dev->mfc_ops, cleanup_queue, &ctx->dst_queue, 1050 s5p_mfc_hw_call_void(dev->mfc_ops, cleanup_queue,
1069 &ctx->vq_dst); 1051 &ctx->dst_queue, &ctx->vq_dst);
1070 INIT_LIST_HEAD(&ctx->dst_queue); 1052 INIT_LIST_HEAD(&ctx->dst_queue);
1071 ctx->dst_queue_cnt = 0; 1053 ctx->dst_queue_cnt = 0;
1072 ctx->dpb_flush_flag = 1; 1054 ctx->dpb_flush_flag = 1;
@@ -1076,7 +1058,7 @@ static void s5p_mfc_stop_streaming(struct vb2_queue *q)
1076 ctx->state = MFCINST_FLUSH; 1058 ctx->state = MFCINST_FLUSH;
1077 set_work_bit_irqsave(ctx); 1059 set_work_bit_irqsave(ctx);
1078 s5p_mfc_clean_ctx_int_flags(ctx); 1060 s5p_mfc_clean_ctx_int_flags(ctx);
1079 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); 1061 s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev);
1080 if (s5p_mfc_wait_for_done_ctx(ctx, 1062 if (s5p_mfc_wait_for_done_ctx(ctx,
1081 S5P_MFC_R2H_CMD_DPB_FLUSH_RET, 0)) 1063 S5P_MFC_R2H_CMD_DPB_FLUSH_RET, 0))
1082 mfc_err("Err flushing buffers\n"); 1064 mfc_err("Err flushing buffers\n");
@@ -1084,8 +1066,8 @@ static void s5p_mfc_stop_streaming(struct vb2_queue *q)
1084 } 1066 }
1085 if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { 1067 if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1086 spin_lock_irqsave(&dev->irqlock, flags); 1068 spin_lock_irqsave(&dev->irqlock, flags);
1087 s5p_mfc_hw_call(dev->mfc_ops, cleanup_queue, &ctx->src_queue, 1069 s5p_mfc_hw_call_void(dev->mfc_ops, cleanup_queue,
1088 &ctx->vq_src); 1070 &ctx->src_queue, &ctx->vq_src);
1089 INIT_LIST_HEAD(&ctx->src_queue); 1071 INIT_LIST_HEAD(&ctx->src_queue);
1090 ctx->src_queue_cnt = 0; 1072 ctx->src_queue_cnt = 0;
1091 spin_unlock_irqrestore(&dev->irqlock, flags); 1073 spin_unlock_irqrestore(&dev->irqlock, flags);
@@ -1124,7 +1106,7 @@ static void s5p_mfc_buf_queue(struct vb2_buffer *vb)
1124 } 1106 }
1125 if (s5p_mfc_ctx_ready(ctx)) 1107 if (s5p_mfc_ctx_ready(ctx))
1126 set_work_bit_irqsave(ctx); 1108 set_work_bit_irqsave(ctx);
1127 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); 1109 s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev);
1128} 1110}
1129 1111
1130static struct vb2_ops s5p_mfc_dec_qops = { 1112static struct vb2_ops s5p_mfc_dec_qops = {
@@ -1220,7 +1202,7 @@ void s5p_mfc_dec_init(struct s5p_mfc_ctx *ctx)
1220 else 1202 else
1221 f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12MT; 1203 f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12MT;
1222 ctx->dst_fmt = find_format(&f, MFC_FMT_RAW); 1204 ctx->dst_fmt = find_format(&f, MFC_FMT_RAW);
1223 mfc_debug(2, "Default src_fmt is %x, dest_fmt is %x\n", 1205 mfc_debug(2, "Default src_fmt is %p, dest_fmt is %p\n",
1224 (unsigned int)ctx->src_fmt, (unsigned int)ctx->dst_fmt); 1206 ctx->src_fmt, ctx->dst_fmt);
1225} 1207}
1226 1208
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
index d26b2484ca10..a904a1c7bb21 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
@@ -739,14 +739,11 @@ static int s5p_mfc_ctx_ready(struct s5p_mfc_ctx *ctx)
739static void cleanup_ref_queue(struct s5p_mfc_ctx *ctx) 739static void cleanup_ref_queue(struct s5p_mfc_ctx *ctx)
740{ 740{
741 struct s5p_mfc_buf *mb_entry; 741 struct s5p_mfc_buf *mb_entry;
742 unsigned long mb_y_addr, mb_c_addr;
743 742
744 /* move buffers in ref queue to src queue */ 743 /* move buffers in ref queue to src queue */
745 while (!list_empty(&ctx->ref_queue)) { 744 while (!list_empty(&ctx->ref_queue)) {
746 mb_entry = list_entry((&ctx->ref_queue)->next, 745 mb_entry = list_entry((&ctx->ref_queue)->next,
747 struct s5p_mfc_buf, list); 746 struct s5p_mfc_buf, list);
748 mb_y_addr = vb2_dma_contig_plane_dma_addr(mb_entry->b, 0);
749 mb_c_addr = vb2_dma_contig_plane_dma_addr(mb_entry->b, 1);
750 list_del(&mb_entry->list); 747 list_del(&mb_entry->list);
751 ctx->ref_queue_cnt--; 748 ctx->ref_queue_cnt--;
752 list_add_tail(&mb_entry->list, &ctx->src_queue); 749 list_add_tail(&mb_entry->list, &ctx->src_queue);
@@ -770,7 +767,7 @@ static int enc_pre_seq_start(struct s5p_mfc_ctx *ctx)
770 dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list); 767 dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list);
771 dst_addr = vb2_dma_contig_plane_dma_addr(dst_mb->b, 0); 768 dst_addr = vb2_dma_contig_plane_dma_addr(dst_mb->b, 0);
772 dst_size = vb2_plane_size(dst_mb->b, 0); 769 dst_size = vb2_plane_size(dst_mb->b, 0);
773 s5p_mfc_hw_call(dev->mfc_ops, set_enc_stream_buffer, ctx, dst_addr, 770 s5p_mfc_hw_call_void(dev->mfc_ops, set_enc_stream_buffer, ctx, dst_addr,
774 dst_size); 771 dst_size);
775 spin_unlock_irqrestore(&dev->irqlock, flags); 772 spin_unlock_irqrestore(&dev->irqlock, flags);
776 return 0; 773 return 0;
@@ -803,7 +800,7 @@ static int enc_post_seq_start(struct s5p_mfc_ctx *ctx)
803 ctx->state = MFCINST_RUNNING; 800 ctx->state = MFCINST_RUNNING;
804 if (s5p_mfc_ctx_ready(ctx)) 801 if (s5p_mfc_ctx_ready(ctx))
805 set_work_bit_irqsave(ctx); 802 set_work_bit_irqsave(ctx);
806 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); 803 s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev);
807 } else { 804 } else {
808 enc_pb_count = s5p_mfc_hw_call(dev->mfc_ops, 805 enc_pb_count = s5p_mfc_hw_call(dev->mfc_ops,
809 get_enc_dpb_count, dev); 806 get_enc_dpb_count, dev);
@@ -828,15 +825,15 @@ static int enc_pre_frame_start(struct s5p_mfc_ctx *ctx)
828 src_mb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list); 825 src_mb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list);
829 src_y_addr = vb2_dma_contig_plane_dma_addr(src_mb->b, 0); 826 src_y_addr = vb2_dma_contig_plane_dma_addr(src_mb->b, 0);
830 src_c_addr = vb2_dma_contig_plane_dma_addr(src_mb->b, 1); 827 src_c_addr = vb2_dma_contig_plane_dma_addr(src_mb->b, 1);
831 s5p_mfc_hw_call(dev->mfc_ops, set_enc_frame_buffer, ctx, src_y_addr, 828 s5p_mfc_hw_call_void(dev->mfc_ops, set_enc_frame_buffer, ctx,
832 src_c_addr); 829 src_y_addr, src_c_addr);
833 spin_unlock_irqrestore(&dev->irqlock, flags); 830 spin_unlock_irqrestore(&dev->irqlock, flags);
834 831
835 spin_lock_irqsave(&dev->irqlock, flags); 832 spin_lock_irqsave(&dev->irqlock, flags);
836 dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list); 833 dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list);
837 dst_addr = vb2_dma_contig_plane_dma_addr(dst_mb->b, 0); 834 dst_addr = vb2_dma_contig_plane_dma_addr(dst_mb->b, 0);
838 dst_size = vb2_plane_size(dst_mb->b, 0); 835 dst_size = vb2_plane_size(dst_mb->b, 0);
839 s5p_mfc_hw_call(dev->mfc_ops, set_enc_stream_buffer, ctx, dst_addr, 836 s5p_mfc_hw_call_void(dev->mfc_ops, set_enc_stream_buffer, ctx, dst_addr,
840 dst_size); 837 dst_size);
841 spin_unlock_irqrestore(&dev->irqlock, flags); 838 spin_unlock_irqrestore(&dev->irqlock, flags);
842 839
@@ -861,7 +858,7 @@ static int enc_post_frame_start(struct s5p_mfc_ctx *ctx)
861 mfc_read(dev, S5P_FIMV_ENC_SI_PIC_CNT)); 858 mfc_read(dev, S5P_FIMV_ENC_SI_PIC_CNT));
862 spin_lock_irqsave(&dev->irqlock, flags); 859 spin_lock_irqsave(&dev->irqlock, flags);
863 if (slice_type >= 0) { 860 if (slice_type >= 0) {
864 s5p_mfc_hw_call(dev->mfc_ops, get_enc_frame_buffer, ctx, 861 s5p_mfc_hw_call_void(dev->mfc_ops, get_enc_frame_buffer, ctx,
865 &enc_y_addr, &enc_c_addr); 862 &enc_y_addr, &enc_c_addr);
866 list_for_each_entry(mb_entry, &ctx->src_queue, list) { 863 list_for_each_entry(mb_entry, &ctx->src_queue, list) {
867 mb_y_addr = vb2_dma_contig_plane_dma_addr(mb_entry->b, 0); 864 mb_y_addr = vb2_dma_contig_plane_dma_addr(mb_entry->b, 0);
@@ -954,17 +951,13 @@ static int vidioc_querycap(struct file *file, void *priv,
954} 951}
955 952
956static int vidioc_enum_fmt(struct file *file, struct v4l2_fmtdesc *f, 953static int vidioc_enum_fmt(struct file *file, struct v4l2_fmtdesc *f,
957 bool mplane, bool out) 954 bool out)
958{ 955{
959 struct s5p_mfc_dev *dev = video_drvdata(file); 956 struct s5p_mfc_dev *dev = video_drvdata(file);
960 struct s5p_mfc_fmt *fmt; 957 struct s5p_mfc_fmt *fmt;
961 int i, j = 0; 958 int i, j = 0;
962 959
963 for (i = 0; i < ARRAY_SIZE(formats); ++i) { 960 for (i = 0; i < ARRAY_SIZE(formats); ++i) {
964 if (mplane && formats[i].num_planes == 1)
965 continue;
966 else if (!mplane && formats[i].num_planes > 1)
967 continue;
968 if (out && formats[i].type != MFC_FMT_RAW) 961 if (out && formats[i].type != MFC_FMT_RAW)
969 continue; 962 continue;
970 else if (!out && formats[i].type != MFC_FMT_ENC) 963 else if (!out && formats[i].type != MFC_FMT_ENC)
@@ -984,28 +977,16 @@ static int vidioc_enum_fmt(struct file *file, struct v4l2_fmtdesc *f,
984 return -EINVAL; 977 return -EINVAL;
985} 978}
986 979
987static int vidioc_enum_fmt_vid_cap(struct file *file, void *pirv,
988 struct v4l2_fmtdesc *f)
989{
990 return vidioc_enum_fmt(file, f, false, false);
991}
992
993static int vidioc_enum_fmt_vid_cap_mplane(struct file *file, void *pirv, 980static int vidioc_enum_fmt_vid_cap_mplane(struct file *file, void *pirv,
994 struct v4l2_fmtdesc *f) 981 struct v4l2_fmtdesc *f)
995{ 982{
996 return vidioc_enum_fmt(file, f, true, false); 983 return vidioc_enum_fmt(file, f, false);
997}
998
999static int vidioc_enum_fmt_vid_out(struct file *file, void *prov,
1000 struct v4l2_fmtdesc *f)
1001{
1002 return vidioc_enum_fmt(file, f, false, true);
1003} 984}
1004 985
1005static int vidioc_enum_fmt_vid_out_mplane(struct file *file, void *prov, 986static int vidioc_enum_fmt_vid_out_mplane(struct file *file, void *prov,
1006 struct v4l2_fmtdesc *f) 987 struct v4l2_fmtdesc *f)
1007{ 988{
1008 return vidioc_enum_fmt(file, f, true, true); 989 return vidioc_enum_fmt(file, f, true);
1009} 990}
1010 991
1011static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f) 992static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f)
@@ -1127,7 +1108,7 @@ static int vidioc_s_fmt(struct file *file, void *priv, struct v4l2_format *f)
1127 pix_fmt_mp->width, pix_fmt_mp->height, 1108 pix_fmt_mp->width, pix_fmt_mp->height,
1128 ctx->img_width, ctx->img_height); 1109 ctx->img_width, ctx->img_height);
1129 1110
1130 s5p_mfc_hw_call(dev->mfc_ops, enc_calc_src_size, ctx); 1111 s5p_mfc_hw_call_void(dev->mfc_ops, enc_calc_src_size, ctx);
1131 pix_fmt_mp->plane_fmt[0].sizeimage = ctx->luma_size; 1112 pix_fmt_mp->plane_fmt[0].sizeimage = ctx->luma_size;
1132 pix_fmt_mp->plane_fmt[0].bytesperline = ctx->buf_width; 1113 pix_fmt_mp->plane_fmt[0].bytesperline = ctx->buf_width;
1133 pix_fmt_mp->plane_fmt[1].sizeimage = ctx->chroma_size; 1114 pix_fmt_mp->plane_fmt[1].sizeimage = ctx->chroma_size;
@@ -1681,8 +1662,8 @@ static int vidioc_g_parm(struct file *file, void *priv,
1681 return 0; 1662 return 0;
1682} 1663}
1683 1664
1684int vidioc_encoder_cmd(struct file *file, void *priv, 1665static int vidioc_encoder_cmd(struct file *file, void *priv,
1685 struct v4l2_encoder_cmd *cmd) 1666 struct v4l2_encoder_cmd *cmd)
1686{ 1667{
1687 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv); 1668 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1688 struct s5p_mfc_dev *dev = ctx->dev; 1669 struct s5p_mfc_dev *dev = ctx->dev;
@@ -1704,7 +1685,7 @@ int vidioc_encoder_cmd(struct file *file, void *priv,
1704 if (s5p_mfc_ctx_ready(ctx)) 1685 if (s5p_mfc_ctx_ready(ctx))
1705 set_work_bit_irqsave(ctx); 1686 set_work_bit_irqsave(ctx);
1706 spin_unlock_irqrestore(&dev->irqlock, flags); 1687 spin_unlock_irqrestore(&dev->irqlock, flags);
1707 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); 1688 s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev);
1708 } else { 1689 } else {
1709 mfc_debug(2, "EOS: marking last buffer of stream\n"); 1690 mfc_debug(2, "EOS: marking last buffer of stream\n");
1710 buf = list_entry(ctx->src_queue.prev, 1691 buf = list_entry(ctx->src_queue.prev,
@@ -1736,9 +1717,7 @@ static int vidioc_subscribe_event(struct v4l2_fh *fh,
1736 1717
1737static const struct v4l2_ioctl_ops s5p_mfc_enc_ioctl_ops = { 1718static const struct v4l2_ioctl_ops s5p_mfc_enc_ioctl_ops = {
1738 .vidioc_querycap = vidioc_querycap, 1719 .vidioc_querycap = vidioc_querycap,
1739 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
1740 .vidioc_enum_fmt_vid_cap_mplane = vidioc_enum_fmt_vid_cap_mplane, 1720 .vidioc_enum_fmt_vid_cap_mplane = vidioc_enum_fmt_vid_cap_mplane,
1741 .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out,
1742 .vidioc_enum_fmt_vid_out_mplane = vidioc_enum_fmt_vid_out_mplane, 1721 .vidioc_enum_fmt_vid_out_mplane = vidioc_enum_fmt_vid_out_mplane,
1743 .vidioc_g_fmt_vid_cap_mplane = vidioc_g_fmt, 1722 .vidioc_g_fmt_vid_cap_mplane = vidioc_g_fmt,
1744 .vidioc_g_fmt_vid_out_mplane = vidioc_g_fmt, 1723 .vidioc_g_fmt_vid_out_mplane = vidioc_g_fmt,
@@ -1771,13 +1750,13 @@ static int check_vb_with_fmt(struct s5p_mfc_fmt *fmt, struct vb2_buffer *vb)
1771 return -EINVAL; 1750 return -EINVAL;
1772 } 1751 }
1773 for (i = 0; i < fmt->num_planes; i++) { 1752 for (i = 0; i < fmt->num_planes; i++) {
1774 if (!vb2_dma_contig_plane_dma_addr(vb, i)) { 1753 dma_addr_t dma = vb2_dma_contig_plane_dma_addr(vb, i);
1754 if (!dma) {
1775 mfc_err("failed to get plane cookie\n"); 1755 mfc_err("failed to get plane cookie\n");
1776 return -EINVAL; 1756 return -EINVAL;
1777 } 1757 }
1778 mfc_debug(2, "index: %d, plane[%d] cookie: 0x%08zx\n", 1758 mfc_debug(2, "index: %d, plane[%d] cookie: %pad\n",
1779 vb->v4l2_buf.index, i, 1759 vb->v4l2_buf.index, i, &dma);
1780 vb2_dma_contig_plane_dma_addr(vb, i));
1781 } 1760 }
1782 return 0; 1761 return 0;
1783} 1762}
@@ -1897,7 +1876,7 @@ static int s5p_mfc_buf_prepare(struct vb2_buffer *vb)
1897 ret = check_vb_with_fmt(ctx->dst_fmt, vb); 1876 ret = check_vb_with_fmt(ctx->dst_fmt, vb);
1898 if (ret < 0) 1877 if (ret < 0)
1899 return ret; 1878 return ret;
1900 mfc_debug(2, "plane size: %ld, dst size: %d\n", 1879 mfc_debug(2, "plane size: %ld, dst size: %zu\n",
1901 vb2_plane_size(vb, 0), ctx->enc_dst_buf_size); 1880 vb2_plane_size(vb, 0), ctx->enc_dst_buf_size);
1902 if (vb2_plane_size(vb, 0) < ctx->enc_dst_buf_size) { 1881 if (vb2_plane_size(vb, 0) < ctx->enc_dst_buf_size) {
1903 mfc_err("plane size is too small for capture\n"); 1882 mfc_err("plane size is too small for capture\n");
@@ -1948,7 +1927,7 @@ static int s5p_mfc_start_streaming(struct vb2_queue *q, unsigned int count)
1948 /* If context is ready then dev = work->data;schedule it to run */ 1927 /* If context is ready then dev = work->data;schedule it to run */
1949 if (s5p_mfc_ctx_ready(ctx)) 1928 if (s5p_mfc_ctx_ready(ctx))
1950 set_work_bit_irqsave(ctx); 1929 set_work_bit_irqsave(ctx);
1951 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); 1930 s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev);
1952 1931
1953 return 0; 1932 return 0;
1954} 1933}
@@ -1969,14 +1948,14 @@ static void s5p_mfc_stop_streaming(struct vb2_queue *q)
1969 ctx->state = MFCINST_FINISHED; 1948 ctx->state = MFCINST_FINISHED;
1970 spin_lock_irqsave(&dev->irqlock, flags); 1949 spin_lock_irqsave(&dev->irqlock, flags);
1971 if (q->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { 1950 if (q->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1972 s5p_mfc_hw_call(dev->mfc_ops, cleanup_queue, &ctx->dst_queue, 1951 s5p_mfc_hw_call_void(dev->mfc_ops, cleanup_queue,
1973 &ctx->vq_dst); 1952 &ctx->dst_queue, &ctx->vq_dst);
1974 INIT_LIST_HEAD(&ctx->dst_queue); 1953 INIT_LIST_HEAD(&ctx->dst_queue);
1975 ctx->dst_queue_cnt = 0; 1954 ctx->dst_queue_cnt = 0;
1976 } 1955 }
1977 if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { 1956 if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1978 cleanup_ref_queue(ctx); 1957 cleanup_ref_queue(ctx);
1979 s5p_mfc_hw_call(dev->mfc_ops, cleanup_queue, &ctx->src_queue, 1958 s5p_mfc_hw_call_void(dev->mfc_ops, cleanup_queue, &ctx->src_queue,
1980 &ctx->vq_src); 1959 &ctx->vq_src);
1981 INIT_LIST_HEAD(&ctx->src_queue); 1960 INIT_LIST_HEAD(&ctx->src_queue);
1982 ctx->src_queue_cnt = 0; 1961 ctx->src_queue_cnt = 0;
@@ -2017,7 +1996,7 @@ static void s5p_mfc_buf_queue(struct vb2_buffer *vb)
2017 } 1996 }
2018 if (s5p_mfc_ctx_ready(ctx)) 1997 if (s5p_mfc_ctx_ready(ctx))
2019 set_work_bit_irqsave(ctx); 1998 set_work_bit_irqsave(ctx);
2020 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); 1999 s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev);
2021} 2000}
2022 2001
2023static struct vb2_ops s5p_mfc_enc_qops = { 2002static struct vb2_ops s5p_mfc_enc_qops = {
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.c
index c9a227428e6a..00a1d8b2a8c2 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.c
@@ -41,7 +41,7 @@ int s5p_mfc_alloc_priv_buf(struct device *dev,
41 struct s5p_mfc_priv_buf *b) 41 struct s5p_mfc_priv_buf *b)
42{ 42{
43 43
44 mfc_debug(3, "Allocating priv: %d\n", b->size); 44 mfc_debug(3, "Allocating priv: %zu\n", b->size);
45 45
46 b->virt = dma_alloc_coherent(dev, b->size, &b->dma, GFP_KERNEL); 46 b->virt = dma_alloc_coherent(dev, b->size, &b->dma, GFP_KERNEL);
47 47
@@ -50,7 +50,7 @@ int s5p_mfc_alloc_priv_buf(struct device *dev,
50 return -ENOMEM; 50 return -ENOMEM;
51 } 51 }
52 52
53 mfc_debug(3, "Allocated addr %p %08x\n", b->virt, b->dma); 53 mfc_debug(3, "Allocated addr %p %pad\n", b->virt, &b->dma);
54 return 0; 54 return 0;
55} 55}
56 56
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
index 7a7ad32ee608..de2b8c69daa5 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
@@ -20,254 +20,254 @@
20struct s5p_mfc_regs { 20struct s5p_mfc_regs {
21 21
22 /* codec common registers */ 22 /* codec common registers */
23 void *risc_on; 23 volatile void __iomem *risc_on;
24 void *risc2host_int; 24 volatile void __iomem *risc2host_int;
25 void *host2risc_int; 25 volatile void __iomem *host2risc_int;
26 void *risc_base_address; 26 volatile void __iomem *risc_base_address;
27 void *mfc_reset; 27 volatile void __iomem *mfc_reset;
28 void *host2risc_command; 28 volatile void __iomem *host2risc_command;
29 void *risc2host_command; 29 volatile void __iomem *risc2host_command;
30 void *mfc_bus_reset_ctrl; 30 volatile void __iomem *mfc_bus_reset_ctrl;
31 void *firmware_version; 31 volatile void __iomem *firmware_version;
32 void *instance_id; 32 volatile void __iomem *instance_id;
33 void *codec_type; 33 volatile void __iomem *codec_type;
34 void *context_mem_addr; 34 volatile void __iomem *context_mem_addr;
35 void *context_mem_size; 35 volatile void __iomem *context_mem_size;
36 void *pixel_format; 36 volatile void __iomem *pixel_format;
37 void *metadata_enable; 37 volatile void __iomem *metadata_enable;
38 void *mfc_version; 38 volatile void __iomem *mfc_version;
39 void *dbg_info_enable; 39 volatile void __iomem *dbg_info_enable;
40 void *dbg_buffer_addr; 40 volatile void __iomem *dbg_buffer_addr;
41 void *dbg_buffer_size; 41 volatile void __iomem *dbg_buffer_size;
42 void *hed_control; 42 volatile void __iomem *hed_control;
43 void *mfc_timeout_value; 43 volatile void __iomem *mfc_timeout_value;
44 void *hed_shared_mem_addr; 44 volatile void __iomem *hed_shared_mem_addr;
45 void *dis_shared_mem_addr;/* only v7 */ 45 volatile void __iomem *dis_shared_mem_addr;/* only v7 */
46 void *ret_instance_id; 46 volatile void __iomem *ret_instance_id;
47 void *error_code; 47 volatile void __iomem *error_code;
48 void *dbg_buffer_output_size; 48 volatile void __iomem *dbg_buffer_output_size;
49 void *metadata_status; 49 volatile void __iomem *metadata_status;
50 void *metadata_addr_mb_info; 50 volatile void __iomem *metadata_addr_mb_info;
51 void *metadata_size_mb_info; 51 volatile void __iomem *metadata_size_mb_info;
52 void *dbg_info_stage_counter; 52 volatile void __iomem *dbg_info_stage_counter;
53 53
54 /* decoder registers */ 54 /* decoder registers */
55 void *d_crc_ctrl; 55 volatile void __iomem *d_crc_ctrl;
56 void *d_dec_options; 56 volatile void __iomem *d_dec_options;
57 void *d_display_delay; 57 volatile void __iomem *d_display_delay;
58 void *d_set_frame_width; 58 volatile void __iomem *d_set_frame_width;
59 void *d_set_frame_height; 59 volatile void __iomem *d_set_frame_height;
60 void *d_sei_enable; 60 volatile void __iomem *d_sei_enable;
61 void *d_min_num_dpb; 61 volatile void __iomem *d_min_num_dpb;
62 void *d_min_first_plane_dpb_size; 62 volatile void __iomem *d_min_first_plane_dpb_size;
63 void *d_min_second_plane_dpb_size; 63 volatile void __iomem *d_min_second_plane_dpb_size;
64 void *d_min_third_plane_dpb_size;/* only v8 */ 64 volatile void __iomem *d_min_third_plane_dpb_size;/* only v8 */
65 void *d_min_num_mv; 65 volatile void __iomem *d_min_num_mv;
66 void *d_mvc_num_views; 66 volatile void __iomem *d_mvc_num_views;
67 void *d_min_num_dis;/* only v7 */ 67 volatile void __iomem *d_min_num_dis;/* only v7 */
68 void *d_min_first_dis_size;/* only v7 */ 68 volatile void __iomem *d_min_first_dis_size;/* only v7 */
69 void *d_min_second_dis_size;/* only v7 */ 69 volatile void __iomem *d_min_second_dis_size;/* only v7 */
70 void *d_min_third_dis_size;/* only v7 */ 70 volatile void __iomem *d_min_third_dis_size;/* only v7 */
71 void *d_post_filter_luma_dpb0;/* v7 and v8 */ 71 volatile void __iomem *d_post_filter_luma_dpb0;/* v7 and v8 */
72 void *d_post_filter_luma_dpb1;/* v7 and v8 */ 72 volatile void __iomem *d_post_filter_luma_dpb1;/* v7 and v8 */
73 void *d_post_filter_luma_dpb2;/* only v7 */ 73 volatile void __iomem *d_post_filter_luma_dpb2;/* only v7 */
74 void *d_post_filter_chroma_dpb0;/* v7 and v8 */ 74 volatile void __iomem *d_post_filter_chroma_dpb0;/* v7 and v8 */
75 void *d_post_filter_chroma_dpb1;/* v7 and v8 */ 75 volatile void __iomem *d_post_filter_chroma_dpb1;/* v7 and v8 */
76 void *d_post_filter_chroma_dpb2;/* only v7 */ 76 volatile void __iomem *d_post_filter_chroma_dpb2;/* only v7 */
77 void *d_num_dpb; 77 volatile void __iomem *d_num_dpb;
78 void *d_num_mv; 78 volatile void __iomem *d_num_mv;
79 void *d_init_buffer_options; 79 volatile void __iomem *d_init_buffer_options;
80 void *d_first_plane_dpb_stride_size;/* only v8 */ 80 volatile void __iomem *d_first_plane_dpb_stride_size;/* only v8 */
81 void *d_second_plane_dpb_stride_size;/* only v8 */ 81 volatile void __iomem *d_second_plane_dpb_stride_size;/* only v8 */
82 void *d_third_plane_dpb_stride_size;/* only v8 */ 82 volatile void __iomem *d_third_plane_dpb_stride_size;/* only v8 */
83 void *d_first_plane_dpb_size; 83 volatile void __iomem *d_first_plane_dpb_size;
84 void *d_second_plane_dpb_size; 84 volatile void __iomem *d_second_plane_dpb_size;
85 void *d_third_plane_dpb_size;/* only v8 */ 85 volatile void __iomem *d_third_plane_dpb_size;/* only v8 */
86 void *d_mv_buffer_size; 86 volatile void __iomem *d_mv_buffer_size;
87 void *d_first_plane_dpb; 87 volatile void __iomem *d_first_plane_dpb;
88 void *d_second_plane_dpb; 88 volatile void __iomem *d_second_plane_dpb;
89 void *d_third_plane_dpb; 89 volatile void __iomem *d_third_plane_dpb;
90 void *d_mv_buffer; 90 volatile void __iomem *d_mv_buffer;
91 void *d_scratch_buffer_addr; 91 volatile void __iomem *d_scratch_buffer_addr;
92 void *d_scratch_buffer_size; 92 volatile void __iomem *d_scratch_buffer_size;
93 void *d_metadata_buffer_addr; 93 volatile void __iomem *d_metadata_buffer_addr;
94 void *d_metadata_buffer_size; 94 volatile void __iomem *d_metadata_buffer_size;
95 void *d_nal_start_options;/* v7 and v8 */ 95 volatile void __iomem *d_nal_start_options;/* v7 and v8 */
96 void *d_cpb_buffer_addr; 96 volatile void __iomem *d_cpb_buffer_addr;
97 void *d_cpb_buffer_size; 97 volatile void __iomem *d_cpb_buffer_size;
98 void *d_available_dpb_flag_upper; 98 volatile void __iomem *d_available_dpb_flag_upper;
99 void *d_available_dpb_flag_lower; 99 volatile void __iomem *d_available_dpb_flag_lower;
100 void *d_cpb_buffer_offset; 100 volatile void __iomem *d_cpb_buffer_offset;
101 void *d_slice_if_enable; 101 volatile void __iomem *d_slice_if_enable;
102 void *d_picture_tag; 102 volatile void __iomem *d_picture_tag;
103 void *d_stream_data_size; 103 volatile void __iomem *d_stream_data_size;
104 void *d_dynamic_dpb_flag_upper;/* v7 and v8 */ 104 volatile void __iomem *d_dynamic_dpb_flag_upper;/* v7 and v8 */
105 void *d_dynamic_dpb_flag_lower;/* v7 and v8 */ 105 volatile void __iomem *d_dynamic_dpb_flag_lower;/* v7 and v8 */
106 void *d_display_frame_width; 106 volatile void __iomem *d_display_frame_width;
107 void *d_display_frame_height; 107 volatile void __iomem *d_display_frame_height;
108 void *d_display_status; 108 volatile void __iomem *d_display_status;
109 void *d_display_first_plane_addr; 109 volatile void __iomem *d_display_first_plane_addr;
110 void *d_display_second_plane_addr; 110 volatile void __iomem *d_display_second_plane_addr;
111 void *d_display_third_plane_addr;/* only v8 */ 111 volatile void __iomem *d_display_third_plane_addr;/* only v8 */
112 void *d_display_frame_type; 112 volatile void __iomem *d_display_frame_type;
113 void *d_display_crop_info1; 113 volatile void __iomem *d_display_crop_info1;
114 void *d_display_crop_info2; 114 volatile void __iomem *d_display_crop_info2;
115 void *d_display_picture_profile; 115 volatile void __iomem *d_display_picture_profile;
116 void *d_display_luma_crc;/* v7 and v8 */ 116 volatile void __iomem *d_display_luma_crc;/* v7 and v8 */
117 void *d_display_chroma0_crc;/* v7 and v8 */ 117 volatile void __iomem *d_display_chroma0_crc;/* v7 and v8 */
118 void *d_display_chroma1_crc;/* only v8 */ 118 volatile void __iomem *d_display_chroma1_crc;/* only v8 */
119 void *d_display_luma_crc_top;/* only v6 */ 119 volatile void __iomem *d_display_luma_crc_top;/* only v6 */
120 void *d_display_chroma_crc_top;/* only v6 */ 120 volatile void __iomem *d_display_chroma_crc_top;/* only v6 */
121 void *d_display_luma_crc_bot;/* only v6 */ 121 volatile void __iomem *d_display_luma_crc_bot;/* only v6 */
122 void *d_display_chroma_crc_bot;/* only v6 */ 122 volatile void __iomem *d_display_chroma_crc_bot;/* only v6 */
123 void *d_display_aspect_ratio; 123 volatile void __iomem *d_display_aspect_ratio;
124 void *d_display_extended_ar; 124 volatile void __iomem *d_display_extended_ar;
125 void *d_decoded_frame_width; 125 volatile void __iomem *d_decoded_frame_width;
126 void *d_decoded_frame_height; 126 volatile void __iomem *d_decoded_frame_height;
127 void *d_decoded_status; 127 volatile void __iomem *d_decoded_status;
128 void *d_decoded_first_plane_addr; 128 volatile void __iomem *d_decoded_first_plane_addr;
129 void *d_decoded_second_plane_addr; 129 volatile void __iomem *d_decoded_second_plane_addr;
130 void *d_decoded_third_plane_addr;/* only v8 */ 130 volatile void __iomem *d_decoded_third_plane_addr;/* only v8 */
131 void *d_decoded_frame_type; 131 volatile void __iomem *d_decoded_frame_type;
132 void *d_decoded_crop_info1; 132 volatile void __iomem *d_decoded_crop_info1;
133 void *d_decoded_crop_info2; 133 volatile void __iomem *d_decoded_crop_info2;
134 void *d_decoded_picture_profile; 134 volatile void __iomem *d_decoded_picture_profile;
135 void *d_decoded_nal_size; 135 volatile void __iomem *d_decoded_nal_size;
136 void *d_decoded_luma_crc; 136 volatile void __iomem *d_decoded_luma_crc;
137 void *d_decoded_chroma0_crc; 137 volatile void __iomem *d_decoded_chroma0_crc;
138 void *d_decoded_chroma1_crc;/* only v8 */ 138 volatile void __iomem *d_decoded_chroma1_crc;/* only v8 */
139 void *d_ret_picture_tag_top; 139 volatile void __iomem *d_ret_picture_tag_top;
140 void *d_ret_picture_tag_bot; 140 volatile void __iomem *d_ret_picture_tag_bot;
141 void *d_ret_picture_time_top; 141 volatile void __iomem *d_ret_picture_time_top;
142 void *d_ret_picture_time_bot; 142 volatile void __iomem *d_ret_picture_time_bot;
143 void *d_chroma_format; 143 volatile void __iomem *d_chroma_format;
144 void *d_vc1_info;/* v7 and v8 */ 144 volatile void __iomem *d_vc1_info;/* v7 and v8 */
145 void *d_mpeg4_info; 145 volatile void __iomem *d_mpeg4_info;
146 void *d_h264_info; 146 volatile void __iomem *d_h264_info;
147 void *d_metadata_addr_concealed_mb; 147 volatile void __iomem *d_metadata_addr_concealed_mb;
148 void *d_metadata_size_concealed_mb; 148 volatile void __iomem *d_metadata_size_concealed_mb;
149 void *d_metadata_addr_vc1_param; 149 volatile void __iomem *d_metadata_addr_vc1_param;
150 void *d_metadata_size_vc1_param; 150 volatile void __iomem *d_metadata_size_vc1_param;
151 void *d_metadata_addr_sei_nal; 151 volatile void __iomem *d_metadata_addr_sei_nal;
152 void *d_metadata_size_sei_nal; 152 volatile void __iomem *d_metadata_size_sei_nal;
153 void *d_metadata_addr_vui; 153 volatile void __iomem *d_metadata_addr_vui;
154 void *d_metadata_size_vui; 154 volatile void __iomem *d_metadata_size_vui;
155 void *d_metadata_addr_mvcvui;/* v7 and v8 */ 155 volatile void __iomem *d_metadata_addr_mvcvui;/* v7 and v8 */
156 void *d_metadata_size_mvcvui;/* v7 and v8 */ 156 volatile void __iomem *d_metadata_size_mvcvui;/* v7 and v8 */
157 void *d_mvc_view_id; 157 volatile void __iomem *d_mvc_view_id;
158 void *d_frame_pack_sei_avail; 158 volatile void __iomem *d_frame_pack_sei_avail;
159 void *d_frame_pack_arrgment_id; 159 volatile void __iomem *d_frame_pack_arrgment_id;
160 void *d_frame_pack_sei_info; 160 volatile void __iomem *d_frame_pack_sei_info;
161 void *d_frame_pack_grid_pos; 161 volatile void __iomem *d_frame_pack_grid_pos;
162 void *d_display_recovery_sei_info;/* v7 and v8 */ 162 volatile void __iomem *d_display_recovery_sei_info;/* v7 and v8 */
163 void *d_decoded_recovery_sei_info;/* v7 and v8 */ 163 volatile void __iomem *d_decoded_recovery_sei_info;/* v7 and v8 */
164 void *d_display_first_addr;/* only v7 */ 164 volatile void __iomem *d_display_first_addr;/* only v7 */
165 void *d_display_second_addr;/* only v7 */ 165 volatile void __iomem *d_display_second_addr;/* only v7 */
166 void *d_display_third_addr;/* only v7 */ 166 volatile void __iomem *d_display_third_addr;/* only v7 */
167 void *d_decoded_first_addr;/* only v7 */ 167 volatile void __iomem *d_decoded_first_addr;/* only v7 */
168 void *d_decoded_second_addr;/* only v7 */ 168 volatile void __iomem *d_decoded_second_addr;/* only v7 */
169 void *d_decoded_third_addr;/* only v7 */ 169 volatile void __iomem *d_decoded_third_addr;/* only v7 */
170 void *d_used_dpb_flag_upper;/* v7 and v8 */ 170 volatile void __iomem *d_used_dpb_flag_upper;/* v7 and v8 */
171 void *d_used_dpb_flag_lower;/* v7 and v8 */ 171 volatile void __iomem *d_used_dpb_flag_lower;/* v7 and v8 */
172 172
173 /* encoder registers */ 173 /* encoder registers */
174 void *e_frame_width; 174 volatile void __iomem *e_frame_width;
175 void *e_frame_height; 175 volatile void __iomem *e_frame_height;
176 void *e_cropped_frame_width; 176 volatile void __iomem *e_cropped_frame_width;
177 void *e_cropped_frame_height; 177 volatile void __iomem *e_cropped_frame_height;
178 void *e_frame_crop_offset; 178 volatile void __iomem *e_frame_crop_offset;
179 void *e_enc_options; 179 volatile void __iomem *e_enc_options;
180 void *e_picture_profile; 180 volatile void __iomem *e_picture_profile;
181 void *e_vbv_buffer_size; 181 volatile void __iomem *e_vbv_buffer_size;
182 void *e_vbv_init_delay; 182 volatile void __iomem *e_vbv_init_delay;
183 void *e_fixed_picture_qp; 183 volatile void __iomem *e_fixed_picture_qp;
184 void *e_rc_config; 184 volatile void __iomem *e_rc_config;
185 void *e_rc_qp_bound; 185 volatile void __iomem *e_rc_qp_bound;
186 void *e_rc_qp_bound_pb;/* v7 and v8 */ 186 volatile void __iomem *e_rc_qp_bound_pb;/* v7 and v8 */
187 void *e_rc_mode; 187 volatile void __iomem *e_rc_mode;
188 void *e_mb_rc_config; 188 volatile void __iomem *e_mb_rc_config;
189 void *e_padding_ctrl; 189 volatile void __iomem *e_padding_ctrl;
190 void *e_air_threshold; 190 volatile void __iomem *e_air_threshold;
191 void *e_mv_hor_range; 191 volatile void __iomem *e_mv_hor_range;
192 void *e_mv_ver_range; 192 volatile void __iomem *e_mv_ver_range;
193 void *e_num_dpb; 193 volatile void __iomem *e_num_dpb;
194 void *e_luma_dpb; 194 volatile void __iomem *e_luma_dpb;
195 void *e_chroma_dpb; 195 volatile void __iomem *e_chroma_dpb;
196 void *e_me_buffer; 196 volatile void __iomem *e_me_buffer;
197 void *e_scratch_buffer_addr; 197 volatile void __iomem *e_scratch_buffer_addr;
198 void *e_scratch_buffer_size; 198 volatile void __iomem *e_scratch_buffer_size;
199 void *e_tmv_buffer0; 199 volatile void __iomem *e_tmv_buffer0;
200 void *e_tmv_buffer1; 200 volatile void __iomem *e_tmv_buffer1;
201 void *e_ir_buffer_addr;/* v7 and v8 */ 201 volatile void __iomem *e_ir_buffer_addr;/* v7 and v8 */
202 void *e_source_first_plane_addr; 202 volatile void __iomem *e_source_first_plane_addr;
203 void *e_source_second_plane_addr; 203 volatile void __iomem *e_source_second_plane_addr;
204 void *e_source_third_plane_addr;/* v7 and v8 */ 204 volatile void __iomem *e_source_third_plane_addr;/* v7 and v8 */
205 void *e_source_first_plane_stride;/* v7 and v8 */ 205 volatile void __iomem *e_source_first_plane_stride;/* v7 and v8 */
206 void *e_source_second_plane_stride;/* v7 and v8 */ 206 volatile void __iomem *e_source_second_plane_stride;/* v7 and v8 */
207 void *e_source_third_plane_stride;/* v7 and v8 */ 207 volatile void __iomem *e_source_third_plane_stride;/* v7 and v8 */
208 void *e_stream_buffer_addr; 208 volatile void __iomem *e_stream_buffer_addr;
209 void *e_stream_buffer_size; 209 volatile void __iomem *e_stream_buffer_size;
210 void *e_roi_buffer_addr; 210 volatile void __iomem *e_roi_buffer_addr;
211 void *e_param_change; 211 volatile void __iomem *e_param_change;
212 void *e_ir_size; 212 volatile void __iomem *e_ir_size;
213 void *e_gop_config; 213 volatile void __iomem *e_gop_config;
214 void *e_mslice_mode; 214 volatile void __iomem *e_mslice_mode;
215 void *e_mslice_size_mb; 215 volatile void __iomem *e_mslice_size_mb;
216 void *e_mslice_size_bits; 216 volatile void __iomem *e_mslice_size_bits;
217 void *e_frame_insertion; 217 volatile void __iomem *e_frame_insertion;
218 void *e_rc_frame_rate; 218 volatile void __iomem *e_rc_frame_rate;
219 void *e_rc_bit_rate; 219 volatile void __iomem *e_rc_bit_rate;
220 void *e_rc_roi_ctrl; 220 volatile void __iomem *e_rc_roi_ctrl;
221 void *e_picture_tag; 221 volatile void __iomem *e_picture_tag;
222 void *e_bit_count_enable; 222 volatile void __iomem *e_bit_count_enable;
223 void *e_max_bit_count; 223 volatile void __iomem *e_max_bit_count;
224 void *e_min_bit_count; 224 volatile void __iomem *e_min_bit_count;
225 void *e_metadata_buffer_addr; 225 volatile void __iomem *e_metadata_buffer_addr;
226 void *e_metadata_buffer_size; 226 volatile void __iomem *e_metadata_buffer_size;
227 void *e_encoded_source_first_plane_addr; 227 volatile void __iomem *e_encoded_source_first_plane_addr;
228 void *e_encoded_source_second_plane_addr; 228 volatile void __iomem *e_encoded_source_second_plane_addr;
229 void *e_encoded_source_third_plane_addr;/* v7 and v8 */ 229 volatile void __iomem *e_encoded_source_third_plane_addr;/* v7 and v8 */
230 void *e_stream_size; 230 volatile void __iomem *e_stream_size;
231 void *e_slice_type; 231 volatile void __iomem *e_slice_type;
232 void *e_picture_count; 232 volatile void __iomem *e_picture_count;
233 void *e_ret_picture_tag; 233 volatile void __iomem *e_ret_picture_tag;
234 void *e_stream_buffer_write_pointer; /* only v6 */ 234 volatile void __iomem *e_stream_buffer_write_pointer; /* only v6 */
235 void *e_recon_luma_dpb_addr; 235 volatile void __iomem *e_recon_luma_dpb_addr;
236 void *e_recon_chroma_dpb_addr; 236 volatile void __iomem *e_recon_chroma_dpb_addr;
237 void *e_metadata_addr_enc_slice; 237 volatile void __iomem *e_metadata_addr_enc_slice;
238 void *e_metadata_size_enc_slice; 238 volatile void __iomem *e_metadata_size_enc_slice;
239 void *e_mpeg4_options; 239 volatile void __iomem *e_mpeg4_options;
240 void *e_mpeg4_hec_period; 240 volatile void __iomem *e_mpeg4_hec_period;
241 void *e_aspect_ratio; 241 volatile void __iomem *e_aspect_ratio;
242 void *e_extended_sar; 242 volatile void __iomem *e_extended_sar;
243 void *e_h264_options; 243 volatile void __iomem *e_h264_options;
244 void *e_h264_options_2;/* v7 and v8 */ 244 volatile void __iomem *e_h264_options_2;/* v7 and v8 */
245 void *e_h264_lf_alpha_offset; 245 volatile void __iomem *e_h264_lf_alpha_offset;
246 void *e_h264_lf_beta_offset; 246 volatile void __iomem *e_h264_lf_beta_offset;
247 void *e_h264_i_period; 247 volatile void __iomem *e_h264_i_period;
248 void *e_h264_fmo_slice_grp_map_type; 248 volatile void __iomem *e_h264_fmo_slice_grp_map_type;
249 void *e_h264_fmo_num_slice_grp_minus1; 249 volatile void __iomem *e_h264_fmo_num_slice_grp_minus1;
250 void *e_h264_fmo_slice_grp_change_dir; 250 volatile void __iomem *e_h264_fmo_slice_grp_change_dir;
251 void *e_h264_fmo_slice_grp_change_rate_minus1; 251 volatile void __iomem *e_h264_fmo_slice_grp_change_rate_minus1;
252 void *e_h264_fmo_run_length_minus1_0; 252 volatile void __iomem *e_h264_fmo_run_length_minus1_0;
253 void *e_h264_aso_slice_order_0; 253 volatile void __iomem *e_h264_aso_slice_order_0;
254 void *e_h264_chroma_qp_offset; 254 volatile void __iomem *e_h264_chroma_qp_offset;
255 void *e_h264_num_t_layer; 255 volatile void __iomem *e_h264_num_t_layer;
256 void *e_h264_hierarchical_qp_layer0; 256 volatile void __iomem *e_h264_hierarchical_qp_layer0;
257 void *e_h264_frame_packing_sei_info; 257 volatile void __iomem *e_h264_frame_packing_sei_info;
258 void *e_h264_nal_control;/* v7 and v8 */ 258 volatile void __iomem *e_h264_nal_control;/* v7 and v8 */
259 void *e_mvc_frame_qp_view1; 259 volatile void __iomem *e_mvc_frame_qp_view1;
260 void *e_mvc_rc_bit_rate_view1; 260 volatile void __iomem *e_mvc_rc_bit_rate_view1;
261 void *e_mvc_rc_qbound_view1; 261 volatile void __iomem *e_mvc_rc_qbound_view1;
262 void *e_mvc_rc_mode_view1; 262 volatile void __iomem *e_mvc_rc_mode_view1;
263 void *e_mvc_inter_view_prediction_on; 263 volatile void __iomem *e_mvc_inter_view_prediction_on;
264 void *e_vp8_options;/* v7 and v8 */ 264 volatile void __iomem *e_vp8_options;/* v7 and v8 */
265 void *e_vp8_filter_options;/* v7 and v8 */ 265 volatile void __iomem *e_vp8_filter_options;/* v7 and v8 */
266 void *e_vp8_golden_frame_option;/* v7 and v8 */ 266 volatile void __iomem *e_vp8_golden_frame_option;/* v7 and v8 */
267 void *e_vp8_num_t_layer;/* v7 and v8 */ 267 volatile void __iomem *e_vp8_num_t_layer;/* v7 and v8 */
268 void *e_vp8_hierarchical_qp_layer0;/* v7 and v8 */ 268 volatile void __iomem *e_vp8_hierarchical_qp_layer0;/* v7 and v8 */
269 void *e_vp8_hierarchical_qp_layer1;/* v7 and v8 */ 269 volatile void __iomem *e_vp8_hierarchical_qp_layer1;/* v7 and v8 */
270 void *e_vp8_hierarchical_qp_layer2;/* v7 and v8 */ 270 volatile void __iomem *e_vp8_hierarchical_qp_layer2;/* v7 and v8 */
271}; 271};
272 272
273struct s5p_mfc_hw_ops { 273struct s5p_mfc_hw_ops {
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c
index 58ec7bb26ebc..7cf07963187d 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c
@@ -228,6 +228,7 @@ static int s5p_mfc_alloc_instance_buffer_v5(struct s5p_mfc_ctx *ctx)
228 ret = s5p_mfc_alloc_priv_buf(dev->mem_dev_l, &ctx->shm); 228 ret = s5p_mfc_alloc_priv_buf(dev->mem_dev_l, &ctx->shm);
229 if (ret) { 229 if (ret) {
230 mfc_err("Failed to allocate shared memory buffer\n"); 230 mfc_err("Failed to allocate shared memory buffer\n");
231 s5p_mfc_release_priv_buf(dev->mem_dev_l, &ctx->ctx);
231 return ret; 232 return ret;
232 } 233 }
233 234
@@ -262,7 +263,7 @@ static void s5p_mfc_release_dev_context_buffer_v5(struct s5p_mfc_dev *dev)
262static void s5p_mfc_write_info_v5(struct s5p_mfc_ctx *ctx, unsigned int data, 263static void s5p_mfc_write_info_v5(struct s5p_mfc_ctx *ctx, unsigned int data,
263 unsigned int ofs) 264 unsigned int ofs)
264{ 265{
265 writel(data, (ctx->shm.virt + ofs)); 266 writel(data, (volatile void __iomem *)(ctx->shm.virt + ofs));
266 wmb(); 267 wmb();
267} 268}
268 269
@@ -270,7 +271,7 @@ static unsigned int s5p_mfc_read_info_v5(struct s5p_mfc_ctx *ctx,
270 unsigned int ofs) 271 unsigned int ofs)
271{ 272{
272 rmb(); 273 rmb();
273 return readl(ctx->shm.virt + ofs); 274 return readl((volatile void __iomem *)(ctx->shm.virt + ofs));
274} 275}
275 276
276static void s5p_mfc_dec_calc_dpb_size_v5(struct s5p_mfc_ctx *ctx) 277static void s5p_mfc_dec_calc_dpb_size_v5(struct s5p_mfc_ctx *ctx)
@@ -377,7 +378,7 @@ static int s5p_mfc_set_dec_stream_buffer_v5(struct s5p_mfc_ctx *ctx,
377/* Set decoding frame buffer */ 378/* Set decoding frame buffer */
378static int s5p_mfc_set_dec_frame_buffer_v5(struct s5p_mfc_ctx *ctx) 379static int s5p_mfc_set_dec_frame_buffer_v5(struct s5p_mfc_ctx *ctx)
379{ 380{
380 unsigned int frame_size, i; 381 unsigned int frame_size_lu, i;
381 unsigned int frame_size_ch, frame_size_mv; 382 unsigned int frame_size_ch, frame_size_mv;
382 struct s5p_mfc_dev *dev = ctx->dev; 383 struct s5p_mfc_dev *dev = ctx->dev;
383 unsigned int dpb; 384 unsigned int dpb;
@@ -465,23 +466,23 @@ static int s5p_mfc_set_dec_frame_buffer_v5(struct s5p_mfc_ctx *ctx)
465 ctx->codec_mode); 466 ctx->codec_mode);
466 return -EINVAL; 467 return -EINVAL;
467 } 468 }
468 frame_size = ctx->luma_size; 469 frame_size_lu = ctx->luma_size;
469 frame_size_ch = ctx->chroma_size; 470 frame_size_ch = ctx->chroma_size;
470 frame_size_mv = ctx->mv_size; 471 frame_size_mv = ctx->mv_size;
471 mfc_debug(2, "Frm size: %d ch: %d mv: %d\n", frame_size, frame_size_ch, 472 mfc_debug(2, "Frm size: %d ch: %d mv: %d\n", frame_size_lu, frame_size_ch,
472 frame_size_mv); 473 frame_size_mv);
473 for (i = 0; i < ctx->total_dpb_count; i++) { 474 for (i = 0; i < ctx->total_dpb_count; i++) {
474 /* Bank2 */ 475 /* Bank2 */
475 mfc_debug(2, "Luma %d: %x\n", i, 476 mfc_debug(2, "Luma %d: %zx\n", i,
476 ctx->dst_bufs[i].cookie.raw.luma); 477 ctx->dst_bufs[i].cookie.raw.luma);
477 mfc_write(dev, OFFSETB(ctx->dst_bufs[i].cookie.raw.luma), 478 mfc_write(dev, OFFSETB(ctx->dst_bufs[i].cookie.raw.luma),
478 S5P_FIMV_DEC_LUMA_ADR + i * 4); 479 S5P_FIMV_DEC_LUMA_ADR + i * 4);
479 mfc_debug(2, "\tChroma %d: %x\n", i, 480 mfc_debug(2, "\tChroma %d: %zx\n", i,
480 ctx->dst_bufs[i].cookie.raw.chroma); 481 ctx->dst_bufs[i].cookie.raw.chroma);
481 mfc_write(dev, OFFSETA(ctx->dst_bufs[i].cookie.raw.chroma), 482 mfc_write(dev, OFFSETA(ctx->dst_bufs[i].cookie.raw.chroma),
482 S5P_FIMV_DEC_CHROMA_ADR + i * 4); 483 S5P_FIMV_DEC_CHROMA_ADR + i * 4);
483 if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC) { 484 if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC) {
484 mfc_debug(2, "\tBuf2: %x, size: %d\n", 485 mfc_debug(2, "\tBuf2: %zx, size: %d\n",
485 buf_addr2, buf_size2); 486 buf_addr2, buf_size2);
486 mfc_write(dev, OFFSETB(buf_addr2), 487 mfc_write(dev, OFFSETB(buf_addr2),
487 S5P_FIMV_H264_MV_ADR + i * 4); 488 S5P_FIMV_H264_MV_ADR + i * 4);
@@ -489,14 +490,14 @@ static int s5p_mfc_set_dec_frame_buffer_v5(struct s5p_mfc_ctx *ctx)
489 buf_size2 -= frame_size_mv; 490 buf_size2 -= frame_size_mv;
490 } 491 }
491 } 492 }
492 mfc_debug(2, "Buf1: %u, buf_size1: %d\n", buf_addr1, buf_size1); 493 mfc_debug(2, "Buf1: %zu, buf_size1: %d\n", buf_addr1, buf_size1);
493 mfc_debug(2, "Buf 1/2 size after: %d/%d (frames %d)\n", 494 mfc_debug(2, "Buf 1/2 size after: %d/%d (frames %d)\n",
494 buf_size1, buf_size2, ctx->total_dpb_count); 495 buf_size1, buf_size2, ctx->total_dpb_count);
495 if (buf_size1 < 0 || buf_size2 < 0) { 496 if (buf_size1 < 0 || buf_size2 < 0) {
496 mfc_debug(2, "Not enough memory has been allocated\n"); 497 mfc_debug(2, "Not enough memory has been allocated\n");
497 return -ENOMEM; 498 return -ENOMEM;
498 } 499 }
499 s5p_mfc_write_info_v5(ctx, frame_size, ALLOC_LUMA_DPB_SIZE); 500 s5p_mfc_write_info_v5(ctx, frame_size_lu, ALLOC_LUMA_DPB_SIZE);
500 s5p_mfc_write_info_v5(ctx, frame_size_ch, ALLOC_CHROMA_DPB_SIZE); 501 s5p_mfc_write_info_v5(ctx, frame_size_ch, ALLOC_CHROMA_DPB_SIZE);
501 if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC) 502 if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC)
502 s5p_mfc_write_info_v5(ctx, frame_size_mv, ALLOC_MV_SIZE); 503 s5p_mfc_write_info_v5(ctx, frame_size_mv, ALLOC_MV_SIZE);
@@ -566,7 +567,7 @@ static int s5p_mfc_set_enc_ref_buffer_v5(struct s5p_mfc_ctx *ctx)
566 enc_ref_c_size = ALIGN(guard_width * guard_height, 567 enc_ref_c_size = ALIGN(guard_width * guard_height,
567 S5P_FIMV_NV12MT_SALIGN); 568 S5P_FIMV_NV12MT_SALIGN);
568 } 569 }
569 mfc_debug(2, "buf_size1: %d, buf_size2: %d\n", buf_size1, buf_size2); 570 mfc_debug(2, "buf_size1: %zu, buf_size2: %zu\n", buf_size1, buf_size2);
570 switch (ctx->codec_mode) { 571 switch (ctx->codec_mode) {
571 case S5P_MFC_CODEC_H264_ENC: 572 case S5P_MFC_CODEC_H264_ENC:
572 for (i = 0; i < 2; i++) { 573 for (i = 0; i < 2; i++) {
@@ -605,7 +606,7 @@ static int s5p_mfc_set_enc_ref_buffer_v5(struct s5p_mfc_ctx *ctx)
605 S5P_FIMV_H264_NBOR_INFO_ADR); 606 S5P_FIMV_H264_NBOR_INFO_ADR);
606 buf_addr1 += S5P_FIMV_ENC_NBORINFO_SIZE; 607 buf_addr1 += S5P_FIMV_ENC_NBORINFO_SIZE;
607 buf_size1 -= S5P_FIMV_ENC_NBORINFO_SIZE; 608 buf_size1 -= S5P_FIMV_ENC_NBORINFO_SIZE;
608 mfc_debug(2, "buf_size1: %d, buf_size2: %d\n", 609 mfc_debug(2, "buf_size1: %zu, buf_size2: %zu\n",
609 buf_size1, buf_size2); 610 buf_size1, buf_size2);
610 break; 611 break;
611 case S5P_MFC_CODEC_MPEG4_ENC: 612 case S5P_MFC_CODEC_MPEG4_ENC:
@@ -636,7 +637,7 @@ static int s5p_mfc_set_enc_ref_buffer_v5(struct s5p_mfc_ctx *ctx)
636 S5P_FIMV_MPEG4_ACDC_COEF_ADR); 637 S5P_FIMV_MPEG4_ACDC_COEF_ADR);
637 buf_addr1 += S5P_FIMV_ENC_ACDCCOEF_SIZE; 638 buf_addr1 += S5P_FIMV_ENC_ACDCCOEF_SIZE;
638 buf_size1 -= S5P_FIMV_ENC_ACDCCOEF_SIZE; 639 buf_size1 -= S5P_FIMV_ENC_ACDCCOEF_SIZE;
639 mfc_debug(2, "buf_size1: %d, buf_size2: %d\n", 640 mfc_debug(2, "buf_size1: %zu, buf_size2: %zu\n",
640 buf_size1, buf_size2); 641 buf_size1, buf_size2);
641 break; 642 break;
642 case S5P_MFC_CODEC_H263_ENC: 643 case S5P_MFC_CODEC_H263_ENC:
@@ -662,7 +663,7 @@ static int s5p_mfc_set_enc_ref_buffer_v5(struct s5p_mfc_ctx *ctx)
662 mfc_write(dev, OFFSETA(buf_addr1), S5P_FIMV_H263_ACDC_COEF_ADR); 663 mfc_write(dev, OFFSETA(buf_addr1), S5P_FIMV_H263_ACDC_COEF_ADR);
663 buf_addr1 += S5P_FIMV_ENC_ACDCCOEF_SIZE; 664 buf_addr1 += S5P_FIMV_ENC_ACDCCOEF_SIZE;
664 buf_size1 -= S5P_FIMV_ENC_ACDCCOEF_SIZE; 665 buf_size1 -= S5P_FIMV_ENC_ACDCCOEF_SIZE;
665 mfc_debug(2, "buf_size1: %d, buf_size2: %d\n", 666 mfc_debug(2, "buf_size1: %zu, buf_size2: %zu\n",
666 buf_size1, buf_size2); 667 buf_size1, buf_size2);
667 break; 668 break;
668 default: 669 default:
@@ -1186,7 +1187,6 @@ static int s5p_mfc_run_dec_frame(struct s5p_mfc_ctx *ctx, int last_frame)
1186 struct s5p_mfc_dev *dev = ctx->dev; 1187 struct s5p_mfc_dev *dev = ctx->dev;
1187 struct s5p_mfc_buf *temp_vb; 1188 struct s5p_mfc_buf *temp_vb;
1188 unsigned long flags; 1189 unsigned long flags;
1189 unsigned int index;
1190 1190
1191 if (ctx->state == MFCINST_FINISHING) { 1191 if (ctx->state == MFCINST_FINISHING) {
1192 last_frame = MFC_DEC_LAST_FRAME; 1192 last_frame = MFC_DEC_LAST_FRAME;
@@ -1211,7 +1211,6 @@ static int s5p_mfc_run_dec_frame(struct s5p_mfc_ctx *ctx, int last_frame)
1211 vb2_dma_contig_plane_dma_addr(temp_vb->b, 0), 1211 vb2_dma_contig_plane_dma_addr(temp_vb->b, 0),
1212 ctx->consumed_stream, temp_vb->b->v4l2_planes[0].bytesused); 1212 ctx->consumed_stream, temp_vb->b->v4l2_planes[0].bytesused);
1213 spin_unlock_irqrestore(&dev->irqlock, flags); 1213 spin_unlock_irqrestore(&dev->irqlock, flags);
1214 index = temp_vb->b->v4l2_buf.index;
1215 dev->curr_ctx = ctx->num; 1214 dev->curr_ctx = ctx->num;
1216 s5p_mfc_clean_ctx_int_flags(ctx); 1215 s5p_mfc_clean_ctx_int_flags(ctx);
1217 if (temp_vb->b->v4l2_planes[0].bytesused == 0) { 1216 if (temp_vb->b->v4l2_planes[0].bytesused == 0) {
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index c1c12f8d8f68..8798b14bacce 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -43,11 +43,6 @@
43 } while (0) 43 } while (0)
44#endif /* S5P_MFC_DEBUG_REGWRITE */ 44#endif /* S5P_MFC_DEBUG_REGWRITE */
45 45
46#define READL(reg) \
47 (WARN_ON_ONCE(!(reg)) ? 0 : readl(reg))
48#define WRITEL(data, reg) \
49 (WARN_ON_ONCE(!(reg)) ? 0 : writel((data), (reg)))
50
51#define IS_MFCV6_V2(dev) (!IS_MFCV7_PLUS(dev) && dev->fw_ver == MFC_FW_V2) 46#define IS_MFCV6_V2(dev) (!IS_MFCV7_PLUS(dev) && dev->fw_ver == MFC_FW_V2)
52 47
53/* Allocate temporary buffers for decoding */ 48/* Allocate temporary buffers for decoding */
@@ -105,7 +100,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
105 mb_width, mb_height), 100 mb_width, mb_height),
106 S5P_FIMV_ME_BUFFER_ALIGN_V6); 101 S5P_FIMV_ME_BUFFER_ALIGN_V6);
107 102
108 mfc_debug(2, "recon luma size: %d chroma size: %d\n", 103 mfc_debug(2, "recon luma size: %zu chroma size: %zu\n",
109 ctx->luma_dpb_size, ctx->chroma_dpb_size); 104 ctx->luma_dpb_size, ctx->chroma_dpb_size);
110 } else { 105 } else {
111 return -EINVAL; 106 return -EINVAL;
@@ -416,10 +411,10 @@ static int s5p_mfc_set_dec_stream_buffer_v6(struct s5p_mfc_ctx *ctx,
416 mfc_debug(2, "inst_no: %d, buf_addr: 0x%08x,\n" 411 mfc_debug(2, "inst_no: %d, buf_addr: 0x%08x,\n"
417 "buf_size: 0x%08x (%d)\n", 412 "buf_size: 0x%08x (%d)\n",
418 ctx->inst_no, buf_addr, strm_size, strm_size); 413 ctx->inst_no, buf_addr, strm_size, strm_size);
419 WRITEL(strm_size, mfc_regs->d_stream_data_size); 414 writel(strm_size, mfc_regs->d_stream_data_size);
420 WRITEL(buf_addr, mfc_regs->d_cpb_buffer_addr); 415 writel(buf_addr, mfc_regs->d_cpb_buffer_addr);
421 WRITEL(buf_size->cpb, mfc_regs->d_cpb_buffer_size); 416 writel(buf_size->cpb, mfc_regs->d_cpb_buffer_size);
422 WRITEL(start_num_byte, mfc_regs->d_cpb_buffer_offset); 417 writel(start_num_byte, mfc_regs->d_cpb_buffer_offset);
423 418
424 mfc_debug_leave(); 419 mfc_debug_leave();
425 return 0; 420 return 0;
@@ -443,17 +438,17 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx)
443 mfc_debug(2, "Total DPB COUNT: %d\n", ctx->total_dpb_count); 438 mfc_debug(2, "Total DPB COUNT: %d\n", ctx->total_dpb_count);
444 mfc_debug(2, "Setting display delay to %d\n", ctx->display_delay); 439 mfc_debug(2, "Setting display delay to %d\n", ctx->display_delay);
445 440
446 WRITEL(ctx->total_dpb_count, mfc_regs->d_num_dpb); 441 writel(ctx->total_dpb_count, mfc_regs->d_num_dpb);
447 WRITEL(ctx->luma_size, mfc_regs->d_first_plane_dpb_size); 442 writel(ctx->luma_size, mfc_regs->d_first_plane_dpb_size);
448 WRITEL(ctx->chroma_size, mfc_regs->d_second_plane_dpb_size); 443 writel(ctx->chroma_size, mfc_regs->d_second_plane_dpb_size);
449 444
450 WRITEL(buf_addr1, mfc_regs->d_scratch_buffer_addr); 445 writel(buf_addr1, mfc_regs->d_scratch_buffer_addr);
451 WRITEL(ctx->scratch_buf_size, mfc_regs->d_scratch_buffer_size); 446 writel(ctx->scratch_buf_size, mfc_regs->d_scratch_buffer_size);
452 447
453 if (IS_MFCV8(dev)) { 448 if (IS_MFCV8(dev)) {
454 WRITEL(ctx->img_width, 449 writel(ctx->img_width,
455 mfc_regs->d_first_plane_dpb_stride_size); 450 mfc_regs->d_first_plane_dpb_stride_size);
456 WRITEL(ctx->img_width, 451 writel(ctx->img_width,
457 mfc_regs->d_second_plane_dpb_stride_size); 452 mfc_regs->d_second_plane_dpb_stride_size);
458 } 453 }
459 454
@@ -462,8 +457,8 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx)
462 457
463 if (ctx->codec_mode == S5P_FIMV_CODEC_H264_DEC || 458 if (ctx->codec_mode == S5P_FIMV_CODEC_H264_DEC ||
464 ctx->codec_mode == S5P_FIMV_CODEC_H264_MVC_DEC){ 459 ctx->codec_mode == S5P_FIMV_CODEC_H264_MVC_DEC){
465 WRITEL(ctx->mv_size, mfc_regs->d_mv_buffer_size); 460 writel(ctx->mv_size, mfc_regs->d_mv_buffer_size);
466 WRITEL(ctx->mv_count, mfc_regs->d_num_mv); 461 writel(ctx->mv_count, mfc_regs->d_num_mv);
467 } 462 }
468 463
469 frame_size = ctx->luma_size; 464 frame_size = ctx->luma_size;
@@ -474,13 +469,13 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx)
474 469
475 for (i = 0; i < ctx->total_dpb_count; i++) { 470 for (i = 0; i < ctx->total_dpb_count; i++) {
476 /* Bank2 */ 471 /* Bank2 */
477 mfc_debug(2, "Luma %d: %x\n", i, 472 mfc_debug(2, "Luma %d: %zx\n", i,
478 ctx->dst_bufs[i].cookie.raw.luma); 473 ctx->dst_bufs[i].cookie.raw.luma);
479 WRITEL(ctx->dst_bufs[i].cookie.raw.luma, 474 writel(ctx->dst_bufs[i].cookie.raw.luma,
480 mfc_regs->d_first_plane_dpb + i * 4); 475 mfc_regs->d_first_plane_dpb + i * 4);
481 mfc_debug(2, "\tChroma %d: %x\n", i, 476 mfc_debug(2, "\tChroma %d: %zx\n", i,
482 ctx->dst_bufs[i].cookie.raw.chroma); 477 ctx->dst_bufs[i].cookie.raw.chroma);
483 WRITEL(ctx->dst_bufs[i].cookie.raw.chroma, 478 writel(ctx->dst_bufs[i].cookie.raw.chroma,
484 mfc_regs->d_second_plane_dpb + i * 4); 479 mfc_regs->d_second_plane_dpb + i * 4);
485 } 480 }
486 if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC || 481 if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC ||
@@ -492,23 +487,23 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx)
492 align_gap = buf_addr1 - align_gap; 487 align_gap = buf_addr1 - align_gap;
493 buf_size1 -= align_gap; 488 buf_size1 -= align_gap;
494 489
495 mfc_debug(2, "\tBuf1: %x, size: %d\n", 490 mfc_debug(2, "\tBuf1: %zx, size: %d\n",
496 buf_addr1, buf_size1); 491 buf_addr1, buf_size1);
497 WRITEL(buf_addr1, mfc_regs->d_mv_buffer + i * 4); 492 writel(buf_addr1, mfc_regs->d_mv_buffer + i * 4);
498 buf_addr1 += frame_size_mv; 493 buf_addr1 += frame_size_mv;
499 buf_size1 -= frame_size_mv; 494 buf_size1 -= frame_size_mv;
500 } 495 }
501 } 496 }
502 497
503 mfc_debug(2, "Buf1: %u, buf_size1: %d (frames %d)\n", 498 mfc_debug(2, "Buf1: %zu, buf_size1: %d (frames %d)\n",
504 buf_addr1, buf_size1, ctx->total_dpb_count); 499 buf_addr1, buf_size1, ctx->total_dpb_count);
505 if (buf_size1 < 0) { 500 if (buf_size1 < 0) {
506 mfc_debug(2, "Not enough memory has been allocated.\n"); 501 mfc_debug(2, "Not enough memory has been allocated.\n");
507 return -ENOMEM; 502 return -ENOMEM;
508 } 503 }
509 504
510 WRITEL(ctx->inst_no, mfc_regs->instance_id); 505 writel(ctx->inst_no, mfc_regs->instance_id);
511 s5p_mfc_hw_call(dev->mfc_cmds, cmd_host2risc, dev, 506 s5p_mfc_hw_call_void(dev->mfc_cmds, cmd_host2risc, dev,
512 S5P_FIMV_CH_INIT_BUFS_V6, NULL); 507 S5P_FIMV_CH_INIT_BUFS_V6, NULL);
513 508
514 mfc_debug(2, "After setting buffers.\n"); 509 mfc_debug(2, "After setting buffers.\n");
@@ -522,8 +517,8 @@ static int s5p_mfc_set_enc_stream_buffer_v6(struct s5p_mfc_ctx *ctx,
522 struct s5p_mfc_dev *dev = ctx->dev; 517 struct s5p_mfc_dev *dev = ctx->dev;
523 const struct s5p_mfc_regs *mfc_regs = dev->mfc_regs; 518 const struct s5p_mfc_regs *mfc_regs = dev->mfc_regs;
524 519
525 WRITEL(addr, mfc_regs->e_stream_buffer_addr); /* 16B align */ 520 writel(addr, mfc_regs->e_stream_buffer_addr); /* 16B align */
526 WRITEL(size, mfc_regs->e_stream_buffer_size); 521 writel(size, mfc_regs->e_stream_buffer_size);
527 522
528 mfc_debug(2, "stream buf addr: 0x%08lx, size: 0x%d\n", 523 mfc_debug(2, "stream buf addr: 0x%08lx, size: 0x%d\n",
529 addr, size); 524 addr, size);
@@ -537,8 +532,8 @@ static void s5p_mfc_set_enc_frame_buffer_v6(struct s5p_mfc_ctx *ctx,
537 struct s5p_mfc_dev *dev = ctx->dev; 532 struct s5p_mfc_dev *dev = ctx->dev;
538 const struct s5p_mfc_regs *mfc_regs = dev->mfc_regs; 533 const struct s5p_mfc_regs *mfc_regs = dev->mfc_regs;
539 534
540 WRITEL(y_addr, mfc_regs->e_source_first_plane_addr); 535 writel(y_addr, mfc_regs->e_source_first_plane_addr);
541 WRITEL(c_addr, mfc_regs->e_source_second_plane_addr); 536 writel(c_addr, mfc_regs->e_source_second_plane_addr);
542 537
543 mfc_debug(2, "enc src y buf addr: 0x%08lx\n", y_addr); 538 mfc_debug(2, "enc src y buf addr: 0x%08lx\n", y_addr);
544 mfc_debug(2, "enc src c buf addr: 0x%08lx\n", c_addr); 539 mfc_debug(2, "enc src c buf addr: 0x%08lx\n", c_addr);
@@ -551,11 +546,11 @@ static void s5p_mfc_get_enc_frame_buffer_v6(struct s5p_mfc_ctx *ctx,
551 const struct s5p_mfc_regs *mfc_regs = dev->mfc_regs; 546 const struct s5p_mfc_regs *mfc_regs = dev->mfc_regs;
552 unsigned long enc_recon_y_addr, enc_recon_c_addr; 547 unsigned long enc_recon_y_addr, enc_recon_c_addr;
553 548
554 *y_addr = READL(mfc_regs->e_encoded_source_first_plane_addr); 549 *y_addr = readl(mfc_regs->e_encoded_source_first_plane_addr);
555 *c_addr = READL(mfc_regs->e_encoded_source_second_plane_addr); 550 *c_addr = readl(mfc_regs->e_encoded_source_second_plane_addr);
556 551
557 enc_recon_y_addr = READL(mfc_regs->e_recon_luma_dpb_addr); 552 enc_recon_y_addr = readl(mfc_regs->e_recon_luma_dpb_addr);
558 enc_recon_c_addr = READL(mfc_regs->e_recon_chroma_dpb_addr); 553 enc_recon_c_addr = readl(mfc_regs->e_recon_chroma_dpb_addr);
559 554
560 mfc_debug(2, "recon y addr: 0x%08lx\n", enc_recon_y_addr); 555 mfc_debug(2, "recon y addr: 0x%08lx\n", enc_recon_y_addr);
561 mfc_debug(2, "recon c addr: 0x%08lx\n", enc_recon_c_addr); 556 mfc_debug(2, "recon c addr: 0x%08lx\n", enc_recon_c_addr);
@@ -577,36 +572,36 @@ static int s5p_mfc_set_enc_ref_buffer_v6(struct s5p_mfc_ctx *ctx)
577 mfc_debug(2, "Buf1: %p (%d)\n", (void *)buf_addr1, buf_size1); 572 mfc_debug(2, "Buf1: %p (%d)\n", (void *)buf_addr1, buf_size1);
578 573
579 for (i = 0; i < ctx->pb_count; i++) { 574 for (i = 0; i < ctx->pb_count; i++) {
580 WRITEL(buf_addr1, mfc_regs->e_luma_dpb + (4 * i)); 575 writel(buf_addr1, mfc_regs->e_luma_dpb + (4 * i));
581 buf_addr1 += ctx->luma_dpb_size; 576 buf_addr1 += ctx->luma_dpb_size;
582 WRITEL(buf_addr1, mfc_regs->e_chroma_dpb + (4 * i)); 577 writel(buf_addr1, mfc_regs->e_chroma_dpb + (4 * i));
583 buf_addr1 += ctx->chroma_dpb_size; 578 buf_addr1 += ctx->chroma_dpb_size;
584 WRITEL(buf_addr1, mfc_regs->e_me_buffer + (4 * i)); 579 writel(buf_addr1, mfc_regs->e_me_buffer + (4 * i));
585 buf_addr1 += ctx->me_buffer_size; 580 buf_addr1 += ctx->me_buffer_size;
586 buf_size1 -= (ctx->luma_dpb_size + ctx->chroma_dpb_size + 581 buf_size1 -= (ctx->luma_dpb_size + ctx->chroma_dpb_size +
587 ctx->me_buffer_size); 582 ctx->me_buffer_size);
588 } 583 }
589 584
590 WRITEL(buf_addr1, mfc_regs->e_scratch_buffer_addr); 585 writel(buf_addr1, mfc_regs->e_scratch_buffer_addr);
591 WRITEL(ctx->scratch_buf_size, mfc_regs->e_scratch_buffer_size); 586 writel(ctx->scratch_buf_size, mfc_regs->e_scratch_buffer_size);
592 buf_addr1 += ctx->scratch_buf_size; 587 buf_addr1 += ctx->scratch_buf_size;
593 buf_size1 -= ctx->scratch_buf_size; 588 buf_size1 -= ctx->scratch_buf_size;
594 589
595 WRITEL(buf_addr1, mfc_regs->e_tmv_buffer0); 590 writel(buf_addr1, mfc_regs->e_tmv_buffer0);
596 buf_addr1 += ctx->tmv_buffer_size >> 1; 591 buf_addr1 += ctx->tmv_buffer_size >> 1;
597 WRITEL(buf_addr1, mfc_regs->e_tmv_buffer1); 592 writel(buf_addr1, mfc_regs->e_tmv_buffer1);
598 buf_addr1 += ctx->tmv_buffer_size >> 1; 593 buf_addr1 += ctx->tmv_buffer_size >> 1;
599 buf_size1 -= ctx->tmv_buffer_size; 594 buf_size1 -= ctx->tmv_buffer_size;
600 595
601 mfc_debug(2, "Buf1: %u, buf_size1: %d (ref frames %d)\n", 596 mfc_debug(2, "Buf1: %zu, buf_size1: %d (ref frames %d)\n",
602 buf_addr1, buf_size1, ctx->pb_count); 597 buf_addr1, buf_size1, ctx->pb_count);
603 if (buf_size1 < 0) { 598 if (buf_size1 < 0) {
604 mfc_debug(2, "Not enough memory has been allocated.\n"); 599 mfc_debug(2, "Not enough memory has been allocated.\n");
605 return -ENOMEM; 600 return -ENOMEM;
606 } 601 }
607 602
608 WRITEL(ctx->inst_no, mfc_regs->instance_id); 603 writel(ctx->inst_no, mfc_regs->instance_id);
609 s5p_mfc_hw_call(dev->mfc_cmds, cmd_host2risc, dev, 604 s5p_mfc_hw_call_void(dev->mfc_cmds, cmd_host2risc, dev,
610 S5P_FIMV_CH_INIT_BUFS_V6, NULL); 605 S5P_FIMV_CH_INIT_BUFS_V6, NULL);
611 606
612 mfc_debug_leave(); 607 mfc_debug_leave();
@@ -621,15 +616,15 @@ static int s5p_mfc_set_slice_mode(struct s5p_mfc_ctx *ctx)
621 616
622 /* multi-slice control */ 617 /* multi-slice control */
623 /* multi-slice MB number or bit size */ 618 /* multi-slice MB number or bit size */
624 WRITEL(ctx->slice_mode, mfc_regs->e_mslice_mode); 619 writel(ctx->slice_mode, mfc_regs->e_mslice_mode);
625 if (ctx->slice_mode == V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB) { 620 if (ctx->slice_mode == V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB) {
626 WRITEL(ctx->slice_size.mb, mfc_regs->e_mslice_size_mb); 621 writel(ctx->slice_size.mb, mfc_regs->e_mslice_size_mb);
627 } else if (ctx->slice_mode == 622 } else if (ctx->slice_mode ==
628 V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES) { 623 V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES) {
629 WRITEL(ctx->slice_size.bits, mfc_regs->e_mslice_size_bits); 624 writel(ctx->slice_size.bits, mfc_regs->e_mslice_size_bits);
630 } else { 625 } else {
631 WRITEL(0x0, mfc_regs->e_mslice_size_mb); 626 writel(0x0, mfc_regs->e_mslice_size_mb);
632 WRITEL(0x0, mfc_regs->e_mslice_size_bits); 627 writel(0x0, mfc_regs->e_mslice_size_bits);
633 } 628 }
634 629
635 return 0; 630 return 0;
@@ -645,21 +640,21 @@ static int s5p_mfc_set_enc_params(struct s5p_mfc_ctx *ctx)
645 mfc_debug_enter(); 640 mfc_debug_enter();
646 641
647 /* width */ 642 /* width */
648 WRITEL(ctx->img_width, mfc_regs->e_frame_width); /* 16 align */ 643 writel(ctx->img_width, mfc_regs->e_frame_width); /* 16 align */
649 /* height */ 644 /* height */
650 WRITEL(ctx->img_height, mfc_regs->e_frame_height); /* 16 align */ 645 writel(ctx->img_height, mfc_regs->e_frame_height); /* 16 align */
651 646
652 /* cropped width */ 647 /* cropped width */
653 WRITEL(ctx->img_width, mfc_regs->e_cropped_frame_width); 648 writel(ctx->img_width, mfc_regs->e_cropped_frame_width);
654 /* cropped height */ 649 /* cropped height */
655 WRITEL(ctx->img_height, mfc_regs->e_cropped_frame_height); 650 writel(ctx->img_height, mfc_regs->e_cropped_frame_height);
656 /* cropped offset */ 651 /* cropped offset */
657 WRITEL(0x0, mfc_regs->e_frame_crop_offset); 652 writel(0x0, mfc_regs->e_frame_crop_offset);
658 653
659 /* pictype : IDR period */ 654 /* pictype : IDR period */
660 reg = 0; 655 reg = 0;
661 reg |= p->gop_size & 0xFFFF; 656 reg |= p->gop_size & 0xFFFF;
662 WRITEL(reg, mfc_regs->e_gop_config); 657 writel(reg, mfc_regs->e_gop_config);
663 658
664 /* multi-slice control */ 659 /* multi-slice control */
665 /* multi-slice MB number or bit size */ 660 /* multi-slice MB number or bit size */
@@ -667,65 +662,65 @@ static int s5p_mfc_set_enc_params(struct s5p_mfc_ctx *ctx)
667 reg = 0; 662 reg = 0;
668 if (p->slice_mode == V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB) { 663 if (p->slice_mode == V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB) {
669 reg |= (0x1 << 3); 664 reg |= (0x1 << 3);
670 WRITEL(reg, mfc_regs->e_enc_options); 665 writel(reg, mfc_regs->e_enc_options);
671 ctx->slice_size.mb = p->slice_mb; 666 ctx->slice_size.mb = p->slice_mb;
672 } else if (p->slice_mode == V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES) { 667 } else if (p->slice_mode == V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES) {
673 reg |= (0x1 << 3); 668 reg |= (0x1 << 3);
674 WRITEL(reg, mfc_regs->e_enc_options); 669 writel(reg, mfc_regs->e_enc_options);
675 ctx->slice_size.bits = p->slice_bit; 670 ctx->slice_size.bits = p->slice_bit;
676 } else { 671 } else {
677 reg &= ~(0x1 << 3); 672 reg &= ~(0x1 << 3);
678 WRITEL(reg, mfc_regs->e_enc_options); 673 writel(reg, mfc_regs->e_enc_options);
679 } 674 }
680 675
681 s5p_mfc_set_slice_mode(ctx); 676 s5p_mfc_set_slice_mode(ctx);
682 677
683 /* cyclic intra refresh */ 678 /* cyclic intra refresh */
684 WRITEL(p->intra_refresh_mb, mfc_regs->e_ir_size); 679 writel(p->intra_refresh_mb, mfc_regs->e_ir_size);
685 reg = READL(mfc_regs->e_enc_options); 680 reg = readl(mfc_regs->e_enc_options);
686 if (p->intra_refresh_mb == 0) 681 if (p->intra_refresh_mb == 0)
687 reg &= ~(0x1 << 4); 682 reg &= ~(0x1 << 4);
688 else 683 else
689 reg |= (0x1 << 4); 684 reg |= (0x1 << 4);
690 WRITEL(reg, mfc_regs->e_enc_options); 685 writel(reg, mfc_regs->e_enc_options);
691 686
692 /* 'NON_REFERENCE_STORE_ENABLE' for debugging */ 687 /* 'NON_REFERENCE_STORE_ENABLE' for debugging */
693 reg = READL(mfc_regs->e_enc_options); 688 reg = readl(mfc_regs->e_enc_options);
694 reg &= ~(0x1 << 9); 689 reg &= ~(0x1 << 9);
695 WRITEL(reg, mfc_regs->e_enc_options); 690 writel(reg, mfc_regs->e_enc_options);
696 691
697 /* memory structure cur. frame */ 692 /* memory structure cur. frame */
698 if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_NV12M) { 693 if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_NV12M) {
699 /* 0: Linear, 1: 2D tiled*/ 694 /* 0: Linear, 1: 2D tiled*/
700 reg = READL(mfc_regs->e_enc_options); 695 reg = readl(mfc_regs->e_enc_options);
701 reg &= ~(0x1 << 7); 696 reg &= ~(0x1 << 7);
702 WRITEL(reg, mfc_regs->e_enc_options); 697 writel(reg, mfc_regs->e_enc_options);
703 /* 0: NV12(CbCr), 1: NV21(CrCb) */ 698 /* 0: NV12(CbCr), 1: NV21(CrCb) */
704 WRITEL(0x0, mfc_regs->pixel_format); 699 writel(0x0, mfc_regs->pixel_format);
705 } else if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_NV21M) { 700 } else if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_NV21M) {
706 /* 0: Linear, 1: 2D tiled*/ 701 /* 0: Linear, 1: 2D tiled*/
707 reg = READL(mfc_regs->e_enc_options); 702 reg = readl(mfc_regs->e_enc_options);
708 reg &= ~(0x1 << 7); 703 reg &= ~(0x1 << 7);
709 WRITEL(reg, mfc_regs->e_enc_options); 704 writel(reg, mfc_regs->e_enc_options);
710 /* 0: NV12(CbCr), 1: NV21(CrCb) */ 705 /* 0: NV12(CbCr), 1: NV21(CrCb) */
711 WRITEL(0x1, mfc_regs->pixel_format); 706 writel(0x1, mfc_regs->pixel_format);
712 } else if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_NV12MT_16X16) { 707 } else if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_NV12MT_16X16) {
713 /* 0: Linear, 1: 2D tiled*/ 708 /* 0: Linear, 1: 2D tiled*/
714 reg = READL(mfc_regs->e_enc_options); 709 reg = readl(mfc_regs->e_enc_options);
715 reg |= (0x1 << 7); 710 reg |= (0x1 << 7);
716 WRITEL(reg, mfc_regs->e_enc_options); 711 writel(reg, mfc_regs->e_enc_options);
717 /* 0: NV12(CbCr), 1: NV21(CrCb) */ 712 /* 0: NV12(CbCr), 1: NV21(CrCb) */
718 WRITEL(0x0, mfc_regs->pixel_format); 713 writel(0x0, mfc_regs->pixel_format);
719 } 714 }
720 715
721 /* memory structure recon. frame */ 716 /* memory structure recon. frame */
722 /* 0: Linear, 1: 2D tiled */ 717 /* 0: Linear, 1: 2D tiled */
723 reg = READL(mfc_regs->e_enc_options); 718 reg = readl(mfc_regs->e_enc_options);
724 reg |= (0x1 << 8); 719 reg |= (0x1 << 8);
725 WRITEL(reg, mfc_regs->e_enc_options); 720 writel(reg, mfc_regs->e_enc_options);
726 721
727 /* padding control & value */ 722 /* padding control & value */
728 WRITEL(0x0, mfc_regs->e_padding_ctrl); 723 writel(0x0, mfc_regs->e_padding_ctrl);
729 if (p->pad) { 724 if (p->pad) {
730 reg = 0; 725 reg = 0;
731 /** enable */ 726 /** enable */
@@ -736,64 +731,64 @@ static int s5p_mfc_set_enc_params(struct s5p_mfc_ctx *ctx)
736 reg |= ((p->pad_cb & 0xFF) << 8); 731 reg |= ((p->pad_cb & 0xFF) << 8);
737 /** y value */ 732 /** y value */
738 reg |= p->pad_luma & 0xFF; 733 reg |= p->pad_luma & 0xFF;
739 WRITEL(reg, mfc_regs->e_padding_ctrl); 734 writel(reg, mfc_regs->e_padding_ctrl);
740 } 735 }
741 736
742 /* rate control config. */ 737 /* rate control config. */
743 reg = 0; 738 reg = 0;
744 /* frame-level rate control */ 739 /* frame-level rate control */
745 reg |= ((p->rc_frame & 0x1) << 9); 740 reg |= ((p->rc_frame & 0x1) << 9);
746 WRITEL(reg, mfc_regs->e_rc_config); 741 writel(reg, mfc_regs->e_rc_config);
747 742
748 /* bit rate */ 743 /* bit rate */
749 if (p->rc_frame) 744 if (p->rc_frame)
750 WRITEL(p->rc_bitrate, 745 writel(p->rc_bitrate,
751 mfc_regs->e_rc_bit_rate); 746 mfc_regs->e_rc_bit_rate);
752 else 747 else
753 WRITEL(1, mfc_regs->e_rc_bit_rate); 748 writel(1, mfc_regs->e_rc_bit_rate);
754 749
755 /* reaction coefficient */ 750 /* reaction coefficient */
756 if (p->rc_frame) { 751 if (p->rc_frame) {
757 if (p->rc_reaction_coeff < TIGHT_CBR_MAX) /* tight CBR */ 752 if (p->rc_reaction_coeff < TIGHT_CBR_MAX) /* tight CBR */
758 WRITEL(1, mfc_regs->e_rc_mode); 753 writel(1, mfc_regs->e_rc_mode);
759 else /* loose CBR */ 754 else /* loose CBR */
760 WRITEL(2, mfc_regs->e_rc_mode); 755 writel(2, mfc_regs->e_rc_mode);
761 } 756 }
762 757
763 /* seq header ctrl */ 758 /* seq header ctrl */
764 reg = READL(mfc_regs->e_enc_options); 759 reg = readl(mfc_regs->e_enc_options);
765 reg &= ~(0x1 << 2); 760 reg &= ~(0x1 << 2);
766 reg |= ((p->seq_hdr_mode & 0x1) << 2); 761 reg |= ((p->seq_hdr_mode & 0x1) << 2);
767 762
768 /* frame skip mode */ 763 /* frame skip mode */
769 reg &= ~(0x3); 764 reg &= ~(0x3);
770 reg |= (p->frame_skip_mode & 0x3); 765 reg |= (p->frame_skip_mode & 0x3);
771 WRITEL(reg, mfc_regs->e_enc_options); 766 writel(reg, mfc_regs->e_enc_options);
772 767
773 /* 'DROP_CONTROL_ENABLE', disable */ 768 /* 'DROP_CONTROL_ENABLE', disable */
774 reg = READL(mfc_regs->e_rc_config); 769 reg = readl(mfc_regs->e_rc_config);
775 reg &= ~(0x1 << 10); 770 reg &= ~(0x1 << 10);
776 WRITEL(reg, mfc_regs->e_rc_config); 771 writel(reg, mfc_regs->e_rc_config);
777 772
778 /* setting for MV range [16, 256] */ 773 /* setting for MV range [16, 256] */
779 reg = (p->mv_h_range & S5P_FIMV_E_MV_RANGE_V6_MASK); 774 reg = (p->mv_h_range & S5P_FIMV_E_MV_RANGE_V6_MASK);
780 WRITEL(reg, mfc_regs->e_mv_hor_range); 775 writel(reg, mfc_regs->e_mv_hor_range);
781 776
782 reg = (p->mv_v_range & S5P_FIMV_E_MV_RANGE_V6_MASK); 777 reg = (p->mv_v_range & S5P_FIMV_E_MV_RANGE_V6_MASK);
783 WRITEL(reg, mfc_regs->e_mv_ver_range); 778 writel(reg, mfc_regs->e_mv_ver_range);
784 779
785 WRITEL(0x0, mfc_regs->e_frame_insertion); 780 writel(0x0, mfc_regs->e_frame_insertion);
786 WRITEL(0x0, mfc_regs->e_roi_buffer_addr); 781 writel(0x0, mfc_regs->e_roi_buffer_addr);
787 WRITEL(0x0, mfc_regs->e_param_change); 782 writel(0x0, mfc_regs->e_param_change);
788 WRITEL(0x0, mfc_regs->e_rc_roi_ctrl); 783 writel(0x0, mfc_regs->e_rc_roi_ctrl);
789 WRITEL(0x0, mfc_regs->e_picture_tag); 784 writel(0x0, mfc_regs->e_picture_tag);
790 785
791 WRITEL(0x0, mfc_regs->e_bit_count_enable); 786 writel(0x0, mfc_regs->e_bit_count_enable);
792 WRITEL(0x0, mfc_regs->e_max_bit_count); 787 writel(0x0, mfc_regs->e_max_bit_count);
793 WRITEL(0x0, mfc_regs->e_min_bit_count); 788 writel(0x0, mfc_regs->e_min_bit_count);
794 789
795 WRITEL(0x0, mfc_regs->e_metadata_buffer_addr); 790 writel(0x0, mfc_regs->e_metadata_buffer_addr);
796 WRITEL(0x0, mfc_regs->e_metadata_buffer_size); 791 writel(0x0, mfc_regs->e_metadata_buffer_size);
797 792
798 mfc_debug_leave(); 793 mfc_debug_leave();
799 794
@@ -814,10 +809,10 @@ static int s5p_mfc_set_enc_params_h264(struct s5p_mfc_ctx *ctx)
814 s5p_mfc_set_enc_params(ctx); 809 s5p_mfc_set_enc_params(ctx);
815 810
816 /* pictype : number of B */ 811 /* pictype : number of B */
817 reg = READL(mfc_regs->e_gop_config); 812 reg = readl(mfc_regs->e_gop_config);
818 reg &= ~(0x3 << 16); 813 reg &= ~(0x3 << 16);
819 reg |= ((p->num_b_frame & 0x3) << 16); 814 reg |= ((p->num_b_frame & 0x3) << 16);
820 WRITEL(reg, mfc_regs->e_gop_config); 815 writel(reg, mfc_regs->e_gop_config);
821 816
822 /* profile & level */ 817 /* profile & level */
823 reg = 0; 818 reg = 0;
@@ -825,19 +820,19 @@ static int s5p_mfc_set_enc_params_h264(struct s5p_mfc_ctx *ctx)
825 reg |= ((p_h264->level & 0xFF) << 8); 820 reg |= ((p_h264->level & 0xFF) << 8);
826 /** profile - 0 ~ 3 */ 821 /** profile - 0 ~ 3 */
827 reg |= p_h264->profile & 0x3F; 822 reg |= p_h264->profile & 0x3F;
828 WRITEL(reg, mfc_regs->e_picture_profile); 823 writel(reg, mfc_regs->e_picture_profile);
829 824
830 /* rate control config. */ 825 /* rate control config. */
831 reg = READL(mfc_regs->e_rc_config); 826 reg = readl(mfc_regs->e_rc_config);
832 /** macroblock level rate control */ 827 /** macroblock level rate control */
833 reg &= ~(0x1 << 8); 828 reg &= ~(0x1 << 8);
834 reg |= ((p->rc_mb & 0x1) << 8); 829 reg |= ((p->rc_mb & 0x1) << 8);
835 WRITEL(reg, mfc_regs->e_rc_config); 830 writel(reg, mfc_regs->e_rc_config);
836 831
837 /** frame QP */ 832 /** frame QP */
838 reg &= ~(0x3F); 833 reg &= ~(0x3F);
839 reg |= p_h264->rc_frame_qp & 0x3F; 834 reg |= p_h264->rc_frame_qp & 0x3F;
840 WRITEL(reg, mfc_regs->e_rc_config); 835 writel(reg, mfc_regs->e_rc_config);
841 836
842 /* max & min value of QP */ 837 /* max & min value of QP */
843 reg = 0; 838 reg = 0;
@@ -845,16 +840,16 @@ static int s5p_mfc_set_enc_params_h264(struct s5p_mfc_ctx *ctx)
845 reg |= ((p_h264->rc_max_qp & 0x3F) << 8); 840 reg |= ((p_h264->rc_max_qp & 0x3F) << 8);
846 /** min QP */ 841 /** min QP */
847 reg |= p_h264->rc_min_qp & 0x3F; 842 reg |= p_h264->rc_min_qp & 0x3F;
848 WRITEL(reg, mfc_regs->e_rc_qp_bound); 843 writel(reg, mfc_regs->e_rc_qp_bound);
849 844
850 /* other QPs */ 845 /* other QPs */
851 WRITEL(0x0, mfc_regs->e_fixed_picture_qp); 846 writel(0x0, mfc_regs->e_fixed_picture_qp);
852 if (!p->rc_frame && !p->rc_mb) { 847 if (!p->rc_frame && !p->rc_mb) {
853 reg = 0; 848 reg = 0;
854 reg |= ((p_h264->rc_b_frame_qp & 0x3F) << 16); 849 reg |= ((p_h264->rc_b_frame_qp & 0x3F) << 16);
855 reg |= ((p_h264->rc_p_frame_qp & 0x3F) << 8); 850 reg |= ((p_h264->rc_p_frame_qp & 0x3F) << 8);
856 reg |= p_h264->rc_frame_qp & 0x3F; 851 reg |= p_h264->rc_frame_qp & 0x3F;
857 WRITEL(reg, mfc_regs->e_fixed_picture_qp); 852 writel(reg, mfc_regs->e_fixed_picture_qp);
858 } 853 }
859 854
860 /* frame rate */ 855 /* frame rate */
@@ -862,38 +857,38 @@ static int s5p_mfc_set_enc_params_h264(struct s5p_mfc_ctx *ctx)
862 reg = 0; 857 reg = 0;
863 reg |= ((p->rc_framerate_num & 0xFFFF) << 16); 858 reg |= ((p->rc_framerate_num & 0xFFFF) << 16);
864 reg |= p->rc_framerate_denom & 0xFFFF; 859 reg |= p->rc_framerate_denom & 0xFFFF;
865 WRITEL(reg, mfc_regs->e_rc_frame_rate); 860 writel(reg, mfc_regs->e_rc_frame_rate);
866 } 861 }
867 862
868 /* vbv buffer size */ 863 /* vbv buffer size */
869 if (p->frame_skip_mode == 864 if (p->frame_skip_mode ==
870 V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT) { 865 V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT) {
871 WRITEL(p_h264->cpb_size & 0xFFFF, 866 writel(p_h264->cpb_size & 0xFFFF,
872 mfc_regs->e_vbv_buffer_size); 867 mfc_regs->e_vbv_buffer_size);
873 868
874 if (p->rc_frame) 869 if (p->rc_frame)
875 WRITEL(p->vbv_delay, mfc_regs->e_vbv_init_delay); 870 writel(p->vbv_delay, mfc_regs->e_vbv_init_delay);
876 } 871 }
877 872
878 /* interlace */ 873 /* interlace */
879 reg = 0; 874 reg = 0;
880 reg |= ((p_h264->interlace & 0x1) << 3); 875 reg |= ((p_h264->interlace & 0x1) << 3);
881 WRITEL(reg, mfc_regs->e_h264_options); 876 writel(reg, mfc_regs->e_h264_options);
882 877
883 /* height */ 878 /* height */
884 if (p_h264->interlace) { 879 if (p_h264->interlace) {
885 WRITEL(ctx->img_height >> 1, 880 writel(ctx->img_height >> 1,
886 mfc_regs->e_frame_height); /* 32 align */ 881 mfc_regs->e_frame_height); /* 32 align */
887 /* cropped height */ 882 /* cropped height */
888 WRITEL(ctx->img_height >> 1, 883 writel(ctx->img_height >> 1,
889 mfc_regs->e_cropped_frame_height); 884 mfc_regs->e_cropped_frame_height);
890 } 885 }
891 886
892 /* loop filter ctrl */ 887 /* loop filter ctrl */
893 reg = READL(mfc_regs->e_h264_options); 888 reg = readl(mfc_regs->e_h264_options);
894 reg &= ~(0x3 << 1); 889 reg &= ~(0x3 << 1);
895 reg |= ((p_h264->loop_filter_mode & 0x3) << 1); 890 reg |= ((p_h264->loop_filter_mode & 0x3) << 1);
896 WRITEL(reg, mfc_regs->e_h264_options); 891 writel(reg, mfc_regs->e_h264_options);
897 892
898 /* loopfilter alpha offset */ 893 /* loopfilter alpha offset */
899 if (p_h264->loop_filter_alpha < 0) { 894 if (p_h264->loop_filter_alpha < 0) {
@@ -903,7 +898,7 @@ static int s5p_mfc_set_enc_params_h264(struct s5p_mfc_ctx *ctx)
903 reg = 0x00; 898 reg = 0x00;
904 reg |= (p_h264->loop_filter_alpha & 0xF); 899 reg |= (p_h264->loop_filter_alpha & 0xF);
905 } 900 }
906 WRITEL(reg, mfc_regs->e_h264_lf_alpha_offset); 901 writel(reg, mfc_regs->e_h264_lf_alpha_offset);
907 902
908 /* loopfilter beta offset */ 903 /* loopfilter beta offset */
909 if (p_h264->loop_filter_beta < 0) { 904 if (p_h264->loop_filter_beta < 0) {
@@ -913,28 +908,28 @@ static int s5p_mfc_set_enc_params_h264(struct s5p_mfc_ctx *ctx)
913 reg = 0x00; 908 reg = 0x00;
914 reg |= (p_h264->loop_filter_beta & 0xF); 909 reg |= (p_h264->loop_filter_beta & 0xF);
915 } 910 }
916 WRITEL(reg, mfc_regs->e_h264_lf_beta_offset); 911 writel(reg, mfc_regs->e_h264_lf_beta_offset);
917 912
918 /* entropy coding mode */ 913 /* entropy coding mode */
919 reg = READL(mfc_regs->e_h264_options); 914 reg = readl(mfc_regs->e_h264_options);
920 reg &= ~(0x1); 915 reg &= ~(0x1);
921 reg |= p_h264->entropy_mode & 0x1; 916 reg |= p_h264->entropy_mode & 0x1;
922 WRITEL(reg, mfc_regs->e_h264_options); 917 writel(reg, mfc_regs->e_h264_options);
923 918
924 /* number of ref. picture */ 919 /* number of ref. picture */
925 reg = READL(mfc_regs->e_h264_options); 920 reg = readl(mfc_regs->e_h264_options);
926 reg &= ~(0x1 << 7); 921 reg &= ~(0x1 << 7);
927 reg |= (((p_h264->num_ref_pic_4p - 1) & 0x1) << 7); 922 reg |= (((p_h264->num_ref_pic_4p - 1) & 0x1) << 7);
928 WRITEL(reg, mfc_regs->e_h264_options); 923 writel(reg, mfc_regs->e_h264_options);
929 924
930 /* 8x8 transform enable */ 925 /* 8x8 transform enable */
931 reg = READL(mfc_regs->e_h264_options); 926 reg = readl(mfc_regs->e_h264_options);
932 reg &= ~(0x3 << 12); 927 reg &= ~(0x3 << 12);
933 reg |= ((p_h264->_8x8_transform & 0x3) << 12); 928 reg |= ((p_h264->_8x8_transform & 0x3) << 12);
934 WRITEL(reg, mfc_regs->e_h264_options); 929 writel(reg, mfc_regs->e_h264_options);
935 930
936 /* macroblock adaptive scaling features */ 931 /* macroblock adaptive scaling features */
937 WRITEL(0x0, mfc_regs->e_mb_rc_config); 932 writel(0x0, mfc_regs->e_mb_rc_config);
938 if (p->rc_mb) { 933 if (p->rc_mb) {
939 reg = 0; 934 reg = 0;
940 /** dark region */ 935 /** dark region */
@@ -945,95 +940,95 @@ static int s5p_mfc_set_enc_params_h264(struct s5p_mfc_ctx *ctx)
945 reg |= ((p_h264->rc_mb_static & 0x1) << 1); 940 reg |= ((p_h264->rc_mb_static & 0x1) << 1);
946 /** high activity region */ 941 /** high activity region */
947 reg |= p_h264->rc_mb_activity & 0x1; 942 reg |= p_h264->rc_mb_activity & 0x1;
948 WRITEL(reg, mfc_regs->e_mb_rc_config); 943 writel(reg, mfc_regs->e_mb_rc_config);
949 } 944 }
950 945
951 /* aspect ratio VUI */ 946 /* aspect ratio VUI */
952 READL(mfc_regs->e_h264_options); 947 readl(mfc_regs->e_h264_options);
953 reg &= ~(0x1 << 5); 948 reg &= ~(0x1 << 5);
954 reg |= ((p_h264->vui_sar & 0x1) << 5); 949 reg |= ((p_h264->vui_sar & 0x1) << 5);
955 WRITEL(reg, mfc_regs->e_h264_options); 950 writel(reg, mfc_regs->e_h264_options);
956 951
957 WRITEL(0x0, mfc_regs->e_aspect_ratio); 952 writel(0x0, mfc_regs->e_aspect_ratio);
958 WRITEL(0x0, mfc_regs->e_extended_sar); 953 writel(0x0, mfc_regs->e_extended_sar);
959 if (p_h264->vui_sar) { 954 if (p_h264->vui_sar) {
960 /* aspect ration IDC */ 955 /* aspect ration IDC */
961 reg = 0; 956 reg = 0;
962 reg |= p_h264->vui_sar_idc & 0xFF; 957 reg |= p_h264->vui_sar_idc & 0xFF;
963 WRITEL(reg, mfc_regs->e_aspect_ratio); 958 writel(reg, mfc_regs->e_aspect_ratio);
964 if (p_h264->vui_sar_idc == 0xFF) { 959 if (p_h264->vui_sar_idc == 0xFF) {
965 /* extended SAR */ 960 /* extended SAR */
966 reg = 0; 961 reg = 0;
967 reg |= (p_h264->vui_ext_sar_width & 0xFFFF) << 16; 962 reg |= (p_h264->vui_ext_sar_width & 0xFFFF) << 16;
968 reg |= p_h264->vui_ext_sar_height & 0xFFFF; 963 reg |= p_h264->vui_ext_sar_height & 0xFFFF;
969 WRITEL(reg, mfc_regs->e_extended_sar); 964 writel(reg, mfc_regs->e_extended_sar);
970 } 965 }
971 } 966 }
972 967
973 /* intra picture period for H.264 open GOP */ 968 /* intra picture period for H.264 open GOP */
974 /* control */ 969 /* control */
975 READL(mfc_regs->e_h264_options); 970 readl(mfc_regs->e_h264_options);
976 reg &= ~(0x1 << 4); 971 reg &= ~(0x1 << 4);
977 reg |= ((p_h264->open_gop & 0x1) << 4); 972 reg |= ((p_h264->open_gop & 0x1) << 4);
978 WRITEL(reg, mfc_regs->e_h264_options); 973 writel(reg, mfc_regs->e_h264_options);
979 974
980 /* value */ 975 /* value */
981 WRITEL(0x0, mfc_regs->e_h264_i_period); 976 writel(0x0, mfc_regs->e_h264_i_period);
982 if (p_h264->open_gop) { 977 if (p_h264->open_gop) {
983 reg = 0; 978 reg = 0;
984 reg |= p_h264->open_gop_size & 0xFFFF; 979 reg |= p_h264->open_gop_size & 0xFFFF;
985 WRITEL(reg, mfc_regs->e_h264_i_period); 980 writel(reg, mfc_regs->e_h264_i_period);
986 } 981 }
987 982
988 /* 'WEIGHTED_BI_PREDICTION' for B is disable */ 983 /* 'WEIGHTED_BI_PREDICTION' for B is disable */
989 READL(mfc_regs->e_h264_options); 984 readl(mfc_regs->e_h264_options);
990 reg &= ~(0x3 << 9); 985 reg &= ~(0x3 << 9);
991 WRITEL(reg, mfc_regs->e_h264_options); 986 writel(reg, mfc_regs->e_h264_options);
992 987
993 /* 'CONSTRAINED_INTRA_PRED_ENABLE' is disable */ 988 /* 'CONSTRAINED_INTRA_PRED_ENABLE' is disable */
994 READL(mfc_regs->e_h264_options); 989 readl(mfc_regs->e_h264_options);
995 reg &= ~(0x1 << 14); 990 reg &= ~(0x1 << 14);
996 WRITEL(reg, mfc_regs->e_h264_options); 991 writel(reg, mfc_regs->e_h264_options);
997 992
998 /* ASO */ 993 /* ASO */
999 READL(mfc_regs->e_h264_options); 994 readl(mfc_regs->e_h264_options);
1000 reg &= ~(0x1 << 6); 995 reg &= ~(0x1 << 6);
1001 reg |= ((p_h264->aso & 0x1) << 6); 996 reg |= ((p_h264->aso & 0x1) << 6);
1002 WRITEL(reg, mfc_regs->e_h264_options); 997 writel(reg, mfc_regs->e_h264_options);
1003 998
1004 /* hier qp enable */ 999 /* hier qp enable */
1005 READL(mfc_regs->e_h264_options); 1000 readl(mfc_regs->e_h264_options);
1006 reg &= ~(0x1 << 8); 1001 reg &= ~(0x1 << 8);
1007 reg |= ((p_h264->open_gop & 0x1) << 8); 1002 reg |= ((p_h264->open_gop & 0x1) << 8);
1008 WRITEL(reg, mfc_regs->e_h264_options); 1003 writel(reg, mfc_regs->e_h264_options);
1009 reg = 0; 1004 reg = 0;
1010 if (p_h264->hier_qp && p_h264->hier_qp_layer) { 1005 if (p_h264->hier_qp && p_h264->hier_qp_layer) {
1011 reg |= (p_h264->hier_qp_type & 0x1) << 0x3; 1006 reg |= (p_h264->hier_qp_type & 0x1) << 0x3;
1012 reg |= p_h264->hier_qp_layer & 0x7; 1007 reg |= p_h264->hier_qp_layer & 0x7;
1013 WRITEL(reg, mfc_regs->e_h264_num_t_layer); 1008 writel(reg, mfc_regs->e_h264_num_t_layer);
1014 /* QP value for each layer */ 1009 /* QP value for each layer */
1015 for (i = 0; i < p_h264->hier_qp_layer && 1010 for (i = 0; i < p_h264->hier_qp_layer &&
1016 i < ARRAY_SIZE(p_h264->hier_qp_layer_qp); i++) { 1011 i < ARRAY_SIZE(p_h264->hier_qp_layer_qp); i++) {
1017 WRITEL(p_h264->hier_qp_layer_qp[i], 1012 writel(p_h264->hier_qp_layer_qp[i],
1018 mfc_regs->e_h264_hierarchical_qp_layer0 1013 mfc_regs->e_h264_hierarchical_qp_layer0
1019 + i * 4); 1014 + i * 4);
1020 } 1015 }
1021 } 1016 }
1022 /* number of coding layer should be zero when hierarchical is disable */ 1017 /* number of coding layer should be zero when hierarchical is disable */
1023 WRITEL(reg, mfc_regs->e_h264_num_t_layer); 1018 writel(reg, mfc_regs->e_h264_num_t_layer);
1024 1019
1025 /* frame packing SEI generation */ 1020 /* frame packing SEI generation */
1026 READL(mfc_regs->e_h264_options); 1021 readl(mfc_regs->e_h264_options);
1027 reg &= ~(0x1 << 25); 1022 reg &= ~(0x1 << 25);
1028 reg |= ((p_h264->sei_frame_packing & 0x1) << 25); 1023 reg |= ((p_h264->sei_frame_packing & 0x1) << 25);
1029 WRITEL(reg, mfc_regs->e_h264_options); 1024 writel(reg, mfc_regs->e_h264_options);
1030 if (p_h264->sei_frame_packing) { 1025 if (p_h264->sei_frame_packing) {
1031 reg = 0; 1026 reg = 0;
1032 /** current frame0 flag */ 1027 /** current frame0 flag */
1033 reg |= ((p_h264->sei_fp_curr_frame_0 & 0x1) << 2); 1028 reg |= ((p_h264->sei_fp_curr_frame_0 & 0x1) << 2);
1034 /** arrangement type */ 1029 /** arrangement type */
1035 reg |= p_h264->sei_fp_arrangement_type & 0x3; 1030 reg |= p_h264->sei_fp_arrangement_type & 0x3;
1036 WRITEL(reg, mfc_regs->e_h264_frame_packing_sei_info); 1031 writel(reg, mfc_regs->e_h264_frame_packing_sei_info);
1037 } 1032 }
1038 1033
1039 if (p_h264->fmo) { 1034 if (p_h264->fmo) {
@@ -1042,7 +1037,7 @@ static int s5p_mfc_set_enc_params_h264(struct s5p_mfc_ctx *ctx)
1042 if (p_h264->fmo_slice_grp > 4) 1037 if (p_h264->fmo_slice_grp > 4)
1043 p_h264->fmo_slice_grp = 4; 1038 p_h264->fmo_slice_grp = 4;
1044 for (i = 0; i < (p_h264->fmo_slice_grp & 0xF); i++) 1039 for (i = 0; i < (p_h264->fmo_slice_grp & 0xF); i++)
1045 WRITEL(p_h264->fmo_run_len[i] - 1, 1040 writel(p_h264->fmo_run_len[i] - 1,
1046 mfc_regs->e_h264_fmo_run_length_minus1_0 1041 mfc_regs->e_h264_fmo_run_length_minus1_0
1047 + i * 4); 1042 + i * 4);
1048 break; 1043 break;
@@ -1054,10 +1049,10 @@ static int s5p_mfc_set_enc_params_h264(struct s5p_mfc_ctx *ctx)
1054 case V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_WIPE_SCAN: 1049 case V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_WIPE_SCAN:
1055 if (p_h264->fmo_slice_grp > 2) 1050 if (p_h264->fmo_slice_grp > 2)
1056 p_h264->fmo_slice_grp = 2; 1051 p_h264->fmo_slice_grp = 2;
1057 WRITEL(p_h264->fmo_chg_dir & 0x1, 1052 writel(p_h264->fmo_chg_dir & 0x1,
1058 mfc_regs->e_h264_fmo_slice_grp_change_dir); 1053 mfc_regs->e_h264_fmo_slice_grp_change_dir);
1059 /* the valid range is 0 ~ number of macroblocks -1 */ 1054 /* the valid range is 0 ~ number of macroblocks -1 */
1060 WRITEL(p_h264->fmo_chg_rate, 1055 writel(p_h264->fmo_chg_rate,
1061 mfc_regs->e_h264_fmo_slice_grp_change_rate_minus1); 1056 mfc_regs->e_h264_fmo_slice_grp_change_rate_minus1);
1062 break; 1057 break;
1063 default: 1058 default:
@@ -1068,12 +1063,12 @@ static int s5p_mfc_set_enc_params_h264(struct s5p_mfc_ctx *ctx)
1068 break; 1063 break;
1069 } 1064 }
1070 1065
1071 WRITEL(p_h264->fmo_map_type, 1066 writel(p_h264->fmo_map_type,
1072 mfc_regs->e_h264_fmo_slice_grp_map_type); 1067 mfc_regs->e_h264_fmo_slice_grp_map_type);
1073 WRITEL(p_h264->fmo_slice_grp - 1, 1068 writel(p_h264->fmo_slice_grp - 1,
1074 mfc_regs->e_h264_fmo_num_slice_grp_minus1); 1069 mfc_regs->e_h264_fmo_num_slice_grp_minus1);
1075 } else { 1070 } else {
1076 WRITEL(0, mfc_regs->e_h264_fmo_num_slice_grp_minus1); 1071 writel(0, mfc_regs->e_h264_fmo_num_slice_grp_minus1);
1077 } 1072 }
1078 1073
1079 mfc_debug_leave(); 1074 mfc_debug_leave();
@@ -1094,10 +1089,10 @@ static int s5p_mfc_set_enc_params_mpeg4(struct s5p_mfc_ctx *ctx)
1094 s5p_mfc_set_enc_params(ctx); 1089 s5p_mfc_set_enc_params(ctx);
1095 1090
1096 /* pictype : number of B */ 1091 /* pictype : number of B */
1097 reg = READL(mfc_regs->e_gop_config); 1092 reg = readl(mfc_regs->e_gop_config);
1098 reg &= ~(0x3 << 16); 1093 reg &= ~(0x3 << 16);
1099 reg |= ((p->num_b_frame & 0x3) << 16); 1094 reg |= ((p->num_b_frame & 0x3) << 16);
1100 WRITEL(reg, mfc_regs->e_gop_config); 1095 writel(reg, mfc_regs->e_gop_config);
1101 1096
1102 /* profile & level */ 1097 /* profile & level */
1103 reg = 0; 1098 reg = 0;
@@ -1105,19 +1100,19 @@ static int s5p_mfc_set_enc_params_mpeg4(struct s5p_mfc_ctx *ctx)
1105 reg |= ((p_mpeg4->level & 0xFF) << 8); 1100 reg |= ((p_mpeg4->level & 0xFF) << 8);
1106 /** profile - 0 ~ 1 */ 1101 /** profile - 0 ~ 1 */
1107 reg |= p_mpeg4->profile & 0x3F; 1102 reg |= p_mpeg4->profile & 0x3F;
1108 WRITEL(reg, mfc_regs->e_picture_profile); 1103 writel(reg, mfc_regs->e_picture_profile);
1109 1104
1110 /* rate control config. */ 1105 /* rate control config. */
1111 reg = READL(mfc_regs->e_rc_config); 1106 reg = readl(mfc_regs->e_rc_config);
1112 /** macroblock level rate control */ 1107 /** macroblock level rate control */
1113 reg &= ~(0x1 << 8); 1108 reg &= ~(0x1 << 8);
1114 reg |= ((p->rc_mb & 0x1) << 8); 1109 reg |= ((p->rc_mb & 0x1) << 8);
1115 WRITEL(reg, mfc_regs->e_rc_config); 1110 writel(reg, mfc_regs->e_rc_config);
1116 1111
1117 /** frame QP */ 1112 /** frame QP */
1118 reg &= ~(0x3F); 1113 reg &= ~(0x3F);
1119 reg |= p_mpeg4->rc_frame_qp & 0x3F; 1114 reg |= p_mpeg4->rc_frame_qp & 0x3F;
1120 WRITEL(reg, mfc_regs->e_rc_config); 1115 writel(reg, mfc_regs->e_rc_config);
1121 1116
1122 /* max & min value of QP */ 1117 /* max & min value of QP */
1123 reg = 0; 1118 reg = 0;
@@ -1125,16 +1120,16 @@ static int s5p_mfc_set_enc_params_mpeg4(struct s5p_mfc_ctx *ctx)
1125 reg |= ((p_mpeg4->rc_max_qp & 0x3F) << 8); 1120 reg |= ((p_mpeg4->rc_max_qp & 0x3F) << 8);
1126 /** min QP */ 1121 /** min QP */
1127 reg |= p_mpeg4->rc_min_qp & 0x3F; 1122 reg |= p_mpeg4->rc_min_qp & 0x3F;
1128 WRITEL(reg, mfc_regs->e_rc_qp_bound); 1123 writel(reg, mfc_regs->e_rc_qp_bound);
1129 1124
1130 /* other QPs */ 1125 /* other QPs */
1131 WRITEL(0x0, mfc_regs->e_fixed_picture_qp); 1126 writel(0x0, mfc_regs->e_fixed_picture_qp);
1132 if (!p->rc_frame && !p->rc_mb) { 1127 if (!p->rc_frame && !p->rc_mb) {
1133 reg = 0; 1128 reg = 0;
1134 reg |= ((p_mpeg4->rc_b_frame_qp & 0x3F) << 16); 1129 reg |= ((p_mpeg4->rc_b_frame_qp & 0x3F) << 16);
1135 reg |= ((p_mpeg4->rc_p_frame_qp & 0x3F) << 8); 1130 reg |= ((p_mpeg4->rc_p_frame_qp & 0x3F) << 8);
1136 reg |= p_mpeg4->rc_frame_qp & 0x3F; 1131 reg |= p_mpeg4->rc_frame_qp & 0x3F;
1137 WRITEL(reg, mfc_regs->e_fixed_picture_qp); 1132 writel(reg, mfc_regs->e_fixed_picture_qp);
1138 } 1133 }
1139 1134
1140 /* frame rate */ 1135 /* frame rate */
@@ -1142,21 +1137,21 @@ static int s5p_mfc_set_enc_params_mpeg4(struct s5p_mfc_ctx *ctx)
1142 reg = 0; 1137 reg = 0;
1143 reg |= ((p->rc_framerate_num & 0xFFFF) << 16); 1138 reg |= ((p->rc_framerate_num & 0xFFFF) << 16);
1144 reg |= p->rc_framerate_denom & 0xFFFF; 1139 reg |= p->rc_framerate_denom & 0xFFFF;
1145 WRITEL(reg, mfc_regs->e_rc_frame_rate); 1140 writel(reg, mfc_regs->e_rc_frame_rate);
1146 } 1141 }
1147 1142
1148 /* vbv buffer size */ 1143 /* vbv buffer size */
1149 if (p->frame_skip_mode == 1144 if (p->frame_skip_mode ==
1150 V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT) { 1145 V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT) {
1151 WRITEL(p->vbv_size & 0xFFFF, mfc_regs->e_vbv_buffer_size); 1146 writel(p->vbv_size & 0xFFFF, mfc_regs->e_vbv_buffer_size);
1152 1147
1153 if (p->rc_frame) 1148 if (p->rc_frame)
1154 WRITEL(p->vbv_delay, mfc_regs->e_vbv_init_delay); 1149 writel(p->vbv_delay, mfc_regs->e_vbv_init_delay);
1155 } 1150 }
1156 1151
1157 /* Disable HEC */ 1152 /* Disable HEC */
1158 WRITEL(0x0, mfc_regs->e_mpeg4_options); 1153 writel(0x0, mfc_regs->e_mpeg4_options);
1159 WRITEL(0x0, mfc_regs->e_mpeg4_hec_period); 1154 writel(0x0, mfc_regs->e_mpeg4_hec_period);
1160 1155
1161 mfc_debug_leave(); 1156 mfc_debug_leave();
1162 1157
@@ -1179,19 +1174,19 @@ static int s5p_mfc_set_enc_params_h263(struct s5p_mfc_ctx *ctx)
1179 reg = 0; 1174 reg = 0;
1180 /** profile */ 1175 /** profile */
1181 reg |= (0x1 << 4); 1176 reg |= (0x1 << 4);
1182 WRITEL(reg, mfc_regs->e_picture_profile); 1177 writel(reg, mfc_regs->e_picture_profile);
1183 1178
1184 /* rate control config. */ 1179 /* rate control config. */
1185 reg = READL(mfc_regs->e_rc_config); 1180 reg = readl(mfc_regs->e_rc_config);
1186 /** macroblock level rate control */ 1181 /** macroblock level rate control */
1187 reg &= ~(0x1 << 8); 1182 reg &= ~(0x1 << 8);
1188 reg |= ((p->rc_mb & 0x1) << 8); 1183 reg |= ((p->rc_mb & 0x1) << 8);
1189 WRITEL(reg, mfc_regs->e_rc_config); 1184 writel(reg, mfc_regs->e_rc_config);
1190 1185
1191 /** frame QP */ 1186 /** frame QP */
1192 reg &= ~(0x3F); 1187 reg &= ~(0x3F);
1193 reg |= p_h263->rc_frame_qp & 0x3F; 1188 reg |= p_h263->rc_frame_qp & 0x3F;
1194 WRITEL(reg, mfc_regs->e_rc_config); 1189 writel(reg, mfc_regs->e_rc_config);
1195 1190
1196 /* max & min value of QP */ 1191 /* max & min value of QP */
1197 reg = 0; 1192 reg = 0;
@@ -1199,16 +1194,16 @@ static int s5p_mfc_set_enc_params_h263(struct s5p_mfc_ctx *ctx)
1199 reg |= ((p_h263->rc_max_qp & 0x3F) << 8); 1194 reg |= ((p_h263->rc_max_qp & 0x3F) << 8);
1200 /** min QP */ 1195 /** min QP */
1201 reg |= p_h263->rc_min_qp & 0x3F; 1196 reg |= p_h263->rc_min_qp & 0x3F;
1202 WRITEL(reg, mfc_regs->e_rc_qp_bound); 1197 writel(reg, mfc_regs->e_rc_qp_bound);
1203 1198
1204 /* other QPs */ 1199 /* other QPs */
1205 WRITEL(0x0, mfc_regs->e_fixed_picture_qp); 1200 writel(0x0, mfc_regs->e_fixed_picture_qp);
1206 if (!p->rc_frame && !p->rc_mb) { 1201 if (!p->rc_frame && !p->rc_mb) {
1207 reg = 0; 1202 reg = 0;
1208 reg |= ((p_h263->rc_b_frame_qp & 0x3F) << 16); 1203 reg |= ((p_h263->rc_b_frame_qp & 0x3F) << 16);
1209 reg |= ((p_h263->rc_p_frame_qp & 0x3F) << 8); 1204 reg |= ((p_h263->rc_p_frame_qp & 0x3F) << 8);
1210 reg |= p_h263->rc_frame_qp & 0x3F; 1205 reg |= p_h263->rc_frame_qp & 0x3F;
1211 WRITEL(reg, mfc_regs->e_fixed_picture_qp); 1206 writel(reg, mfc_regs->e_fixed_picture_qp);
1212 } 1207 }
1213 1208
1214 /* frame rate */ 1209 /* frame rate */
@@ -1216,16 +1211,16 @@ static int s5p_mfc_set_enc_params_h263(struct s5p_mfc_ctx *ctx)
1216 reg = 0; 1211 reg = 0;
1217 reg |= ((p->rc_framerate_num & 0xFFFF) << 16); 1212 reg |= ((p->rc_framerate_num & 0xFFFF) << 16);
1218 reg |= p->rc_framerate_denom & 0xFFFF; 1213 reg |= p->rc_framerate_denom & 0xFFFF;
1219 WRITEL(reg, mfc_regs->e_rc_frame_rate); 1214 writel(reg, mfc_regs->e_rc_frame_rate);
1220 } 1215 }
1221 1216
1222 /* vbv buffer size */ 1217 /* vbv buffer size */
1223 if (p->frame_skip_mode == 1218 if (p->frame_skip_mode ==
1224 V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT) { 1219 V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT) {
1225 WRITEL(p->vbv_size & 0xFFFF, mfc_regs->e_vbv_buffer_size); 1220 writel(p->vbv_size & 0xFFFF, mfc_regs->e_vbv_buffer_size);
1226 1221
1227 if (p->rc_frame) 1222 if (p->rc_frame)
1228 WRITEL(p->vbv_delay, mfc_regs->e_vbv_init_delay); 1223 writel(p->vbv_delay, mfc_regs->e_vbv_init_delay);
1229 } 1224 }
1230 1225
1231 mfc_debug_leave(); 1226 mfc_debug_leave();
@@ -1247,57 +1242,57 @@ static int s5p_mfc_set_enc_params_vp8(struct s5p_mfc_ctx *ctx)
1247 s5p_mfc_set_enc_params(ctx); 1242 s5p_mfc_set_enc_params(ctx);
1248 1243
1249 /* pictype : number of B */ 1244 /* pictype : number of B */
1250 reg = READL(mfc_regs->e_gop_config); 1245 reg = readl(mfc_regs->e_gop_config);
1251 reg &= ~(0x3 << 16); 1246 reg &= ~(0x3 << 16);
1252 reg |= ((p->num_b_frame & 0x3) << 16); 1247 reg |= ((p->num_b_frame & 0x3) << 16);
1253 WRITEL(reg, mfc_regs->e_gop_config); 1248 writel(reg, mfc_regs->e_gop_config);
1254 1249
1255 /* profile - 0 ~ 3 */ 1250 /* profile - 0 ~ 3 */
1256 reg = p_vp8->profile & 0x3; 1251 reg = p_vp8->profile & 0x3;
1257 WRITEL(reg, mfc_regs->e_picture_profile); 1252 writel(reg, mfc_regs->e_picture_profile);
1258 1253
1259 /* rate control config. */ 1254 /* rate control config. */
1260 reg = READL(mfc_regs->e_rc_config); 1255 reg = readl(mfc_regs->e_rc_config);
1261 /** macroblock level rate control */ 1256 /** macroblock level rate control */
1262 reg &= ~(0x1 << 8); 1257 reg &= ~(0x1 << 8);
1263 reg |= ((p->rc_mb & 0x1) << 8); 1258 reg |= ((p->rc_mb & 0x1) << 8);
1264 WRITEL(reg, mfc_regs->e_rc_config); 1259 writel(reg, mfc_regs->e_rc_config);
1265 1260
1266 /* frame rate */ 1261 /* frame rate */
1267 if (p->rc_frame && p->rc_framerate_num && p->rc_framerate_denom) { 1262 if (p->rc_frame && p->rc_framerate_num && p->rc_framerate_denom) {
1268 reg = 0; 1263 reg = 0;
1269 reg |= ((p->rc_framerate_num & 0xFFFF) << 16); 1264 reg |= ((p->rc_framerate_num & 0xFFFF) << 16);
1270 reg |= p->rc_framerate_denom & 0xFFFF; 1265 reg |= p->rc_framerate_denom & 0xFFFF;
1271 WRITEL(reg, mfc_regs->e_rc_frame_rate); 1266 writel(reg, mfc_regs->e_rc_frame_rate);
1272 } 1267 }
1273 1268
1274 /* frame QP */ 1269 /* frame QP */
1275 reg &= ~(0x7F); 1270 reg &= ~(0x7F);
1276 reg |= p_vp8->rc_frame_qp & 0x7F; 1271 reg |= p_vp8->rc_frame_qp & 0x7F;
1277 WRITEL(reg, mfc_regs->e_rc_config); 1272 writel(reg, mfc_regs->e_rc_config);
1278 1273
1279 /* other QPs */ 1274 /* other QPs */
1280 WRITEL(0x0, mfc_regs->e_fixed_picture_qp); 1275 writel(0x0, mfc_regs->e_fixed_picture_qp);
1281 if (!p->rc_frame && !p->rc_mb) { 1276 if (!p->rc_frame && !p->rc_mb) {
1282 reg = 0; 1277 reg = 0;
1283 reg |= ((p_vp8->rc_p_frame_qp & 0x7F) << 8); 1278 reg |= ((p_vp8->rc_p_frame_qp & 0x7F) << 8);
1284 reg |= p_vp8->rc_frame_qp & 0x7F; 1279 reg |= p_vp8->rc_frame_qp & 0x7F;
1285 WRITEL(reg, mfc_regs->e_fixed_picture_qp); 1280 writel(reg, mfc_regs->e_fixed_picture_qp);
1286 } 1281 }
1287 1282
1288 /* max QP */ 1283 /* max QP */
1289 reg = ((p_vp8->rc_max_qp & 0x7F) << 8); 1284 reg = ((p_vp8->rc_max_qp & 0x7F) << 8);
1290 /* min QP */ 1285 /* min QP */
1291 reg |= p_vp8->rc_min_qp & 0x7F; 1286 reg |= p_vp8->rc_min_qp & 0x7F;
1292 WRITEL(reg, mfc_regs->e_rc_qp_bound); 1287 writel(reg, mfc_regs->e_rc_qp_bound);
1293 1288
1294 /* vbv buffer size */ 1289 /* vbv buffer size */
1295 if (p->frame_skip_mode == 1290 if (p->frame_skip_mode ==
1296 V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT) { 1291 V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT) {
1297 WRITEL(p->vbv_size & 0xFFFF, mfc_regs->e_vbv_buffer_size); 1292 writel(p->vbv_size & 0xFFFF, mfc_regs->e_vbv_buffer_size);
1298 1293
1299 if (p->rc_frame) 1294 if (p->rc_frame)
1300 WRITEL(p->vbv_delay, mfc_regs->e_vbv_init_delay); 1295 writel(p->vbv_delay, mfc_regs->e_vbv_init_delay);
1301 } 1296 }
1302 1297
1303 /* VP8 specific params */ 1298 /* VP8 specific params */
@@ -1319,7 +1314,7 @@ static int s5p_mfc_set_enc_params_vp8(struct s5p_mfc_ctx *ctx)
1319 } 1314 }
1320 reg |= (val & 0xF) << 3; 1315 reg |= (val & 0xF) << 3;
1321 reg |= (p_vp8->num_ref & 0x2); 1316 reg |= (p_vp8->num_ref & 0x2);
1322 WRITEL(reg, mfc_regs->e_vp8_options); 1317 writel(reg, mfc_regs->e_vp8_options);
1323 1318
1324 mfc_debug_leave(); 1319 mfc_debug_leave();
1325 1320
@@ -1338,9 +1333,9 @@ static int s5p_mfc_init_decode_v6(struct s5p_mfc_ctx *ctx)
1338 mfc_debug(2, "InstNo: %d/%d\n", ctx->inst_no, 1333 mfc_debug(2, "InstNo: %d/%d\n", ctx->inst_no,
1339 S5P_FIMV_CH_SEQ_HEADER_V6); 1334 S5P_FIMV_CH_SEQ_HEADER_V6);
1340 mfc_debug(2, "BUFs: %08x %08x %08x\n", 1335 mfc_debug(2, "BUFs: %08x %08x %08x\n",
1341 READL(mfc_regs->d_cpb_buffer_addr), 1336 readl(mfc_regs->d_cpb_buffer_addr),
1342 READL(mfc_regs->d_cpb_buffer_addr), 1337 readl(mfc_regs->d_cpb_buffer_addr),
1343 READL(mfc_regs->d_cpb_buffer_addr)); 1338 readl(mfc_regs->d_cpb_buffer_addr));
1344 1339
1345 /* FMO_ASO_CTRL - 0: Enable, 1: Disable */ 1340 /* FMO_ASO_CTRL - 0: Enable, 1: Disable */
1346 reg |= (fmo_aso_ctrl << S5P_FIMV_D_OPT_FMO_ASO_CTRL_MASK_V6); 1341 reg |= (fmo_aso_ctrl << S5P_FIMV_D_OPT_FMO_ASO_CTRL_MASK_V6);
@@ -1351,11 +1346,11 @@ static int s5p_mfc_init_decode_v6(struct s5p_mfc_ctx *ctx)
1351 * set to negative value. */ 1346 * set to negative value. */
1352 if (ctx->display_delay >= 0) { 1347 if (ctx->display_delay >= 0) {
1353 reg |= (0x1 << S5P_FIMV_D_OPT_DDELAY_EN_SHIFT_V6); 1348 reg |= (0x1 << S5P_FIMV_D_OPT_DDELAY_EN_SHIFT_V6);
1354 WRITEL(ctx->display_delay, mfc_regs->d_display_delay); 1349 writel(ctx->display_delay, mfc_regs->d_display_delay);
1355 } 1350 }
1356 1351
1357 if (IS_MFCV7_PLUS(dev) || IS_MFCV6_V2(dev)) { 1352 if (IS_MFCV7_PLUS(dev) || IS_MFCV6_V2(dev)) {
1358 WRITEL(reg, mfc_regs->d_dec_options); 1353 writel(reg, mfc_regs->d_dec_options);
1359 reg = 0; 1354 reg = 0;
1360 } 1355 }
1361 1356
@@ -1370,22 +1365,22 @@ static int s5p_mfc_init_decode_v6(struct s5p_mfc_ctx *ctx)
1370 reg |= (0x1 << S5P_FIMV_D_OPT_TILE_MODE_SHIFT_V6); 1365 reg |= (0x1 << S5P_FIMV_D_OPT_TILE_MODE_SHIFT_V6);
1371 1366
1372 if (IS_MFCV7_PLUS(dev) || IS_MFCV6_V2(dev)) 1367 if (IS_MFCV7_PLUS(dev) || IS_MFCV6_V2(dev))
1373 WRITEL(reg, mfc_regs->d_init_buffer_options); 1368 writel(reg, mfc_regs->d_init_buffer_options);
1374 else 1369 else
1375 WRITEL(reg, mfc_regs->d_dec_options); 1370 writel(reg, mfc_regs->d_dec_options);
1376 1371
1377 /* 0: NV12(CbCr), 1: NV21(CrCb) */ 1372 /* 0: NV12(CbCr), 1: NV21(CrCb) */
1378 if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_NV21M) 1373 if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_NV21M)
1379 WRITEL(0x1, mfc_regs->pixel_format); 1374 writel(0x1, mfc_regs->pixel_format);
1380 else 1375 else
1381 WRITEL(0x0, mfc_regs->pixel_format); 1376 writel(0x0, mfc_regs->pixel_format);
1382 1377
1383 1378
1384 /* sei parse */ 1379 /* sei parse */
1385 WRITEL(ctx->sei_fp_parse & 0x1, mfc_regs->d_sei_enable); 1380 writel(ctx->sei_fp_parse & 0x1, mfc_regs->d_sei_enable);
1386 1381
1387 WRITEL(ctx->inst_no, mfc_regs->instance_id); 1382 writel(ctx->inst_no, mfc_regs->instance_id);
1388 s5p_mfc_hw_call(dev->mfc_cmds, cmd_host2risc, dev, 1383 s5p_mfc_hw_call_void(dev->mfc_cmds, cmd_host2risc, dev,
1389 S5P_FIMV_CH_SEQ_HEADER_V6, NULL); 1384 S5P_FIMV_CH_SEQ_HEADER_V6, NULL);
1390 1385
1391 mfc_debug_leave(); 1386 mfc_debug_leave();
@@ -1400,8 +1395,8 @@ static inline void s5p_mfc_set_flush(struct s5p_mfc_ctx *ctx, int flush)
1400 if (flush) { 1395 if (flush) {
1401 dev->curr_ctx = ctx->num; 1396 dev->curr_ctx = ctx->num;
1402 s5p_mfc_clean_ctx_int_flags(ctx); 1397 s5p_mfc_clean_ctx_int_flags(ctx);
1403 WRITEL(ctx->inst_no, mfc_regs->instance_id); 1398 writel(ctx->inst_no, mfc_regs->instance_id);
1404 s5p_mfc_hw_call(dev->mfc_cmds, cmd_host2risc, dev, 1399 s5p_mfc_hw_call_void(dev->mfc_cmds, cmd_host2risc, dev,
1405 S5P_FIMV_H2R_CMD_FLUSH_V6, NULL); 1400 S5P_FIMV_H2R_CMD_FLUSH_V6, NULL);
1406 } 1401 }
1407} 1402}
@@ -1413,19 +1408,19 @@ static int s5p_mfc_decode_one_frame_v6(struct s5p_mfc_ctx *ctx,
1413 struct s5p_mfc_dev *dev = ctx->dev; 1408 struct s5p_mfc_dev *dev = ctx->dev;
1414 const struct s5p_mfc_regs *mfc_regs = dev->mfc_regs; 1409 const struct s5p_mfc_regs *mfc_regs = dev->mfc_regs;
1415 1410
1416 WRITEL(ctx->dec_dst_flag, mfc_regs->d_available_dpb_flag_lower); 1411 writel(ctx->dec_dst_flag, mfc_regs->d_available_dpb_flag_lower);
1417 WRITEL(ctx->slice_interface & 0x1, mfc_regs->d_slice_if_enable); 1412 writel(ctx->slice_interface & 0x1, mfc_regs->d_slice_if_enable);
1418 1413
1419 WRITEL(ctx->inst_no, mfc_regs->instance_id); 1414 writel(ctx->inst_no, mfc_regs->instance_id);
1420 /* Issue different commands to instance basing on whether it 1415 /* Issue different commands to instance basing on whether it
1421 * is the last frame or not. */ 1416 * is the last frame or not. */
1422 switch (last_frame) { 1417 switch (last_frame) {
1423 case 0: 1418 case 0:
1424 s5p_mfc_hw_call(dev->mfc_cmds, cmd_host2risc, dev, 1419 s5p_mfc_hw_call_void(dev->mfc_cmds, cmd_host2risc, dev,
1425 S5P_FIMV_CH_FRAME_START_V6, NULL); 1420 S5P_FIMV_CH_FRAME_START_V6, NULL);
1426 break; 1421 break;
1427 case 1: 1422 case 1:
1428 s5p_mfc_hw_call(dev->mfc_cmds, cmd_host2risc, dev, 1423 s5p_mfc_hw_call_void(dev->mfc_cmds, cmd_host2risc, dev,
1429 S5P_FIMV_CH_LAST_FRAME_V6, NULL); 1424 S5P_FIMV_CH_LAST_FRAME_V6, NULL);
1430 break; 1425 break;
1431 default: 1426 default:
@@ -1458,12 +1453,12 @@ static int s5p_mfc_init_encode_v6(struct s5p_mfc_ctx *ctx)
1458 1453
1459 /* Set stride lengths for v7 & above */ 1454 /* Set stride lengths for v7 & above */
1460 if (IS_MFCV7_PLUS(dev)) { 1455 if (IS_MFCV7_PLUS(dev)) {
1461 WRITEL(ctx->img_width, mfc_regs->e_source_first_plane_stride); 1456 writel(ctx->img_width, mfc_regs->e_source_first_plane_stride);
1462 WRITEL(ctx->img_width, mfc_regs->e_source_second_plane_stride); 1457 writel(ctx->img_width, mfc_regs->e_source_second_plane_stride);
1463 } 1458 }
1464 1459
1465 WRITEL(ctx->inst_no, mfc_regs->instance_id); 1460 writel(ctx->inst_no, mfc_regs->instance_id);
1466 s5p_mfc_hw_call(dev->mfc_cmds, cmd_host2risc, dev, 1461 s5p_mfc_hw_call_void(dev->mfc_cmds, cmd_host2risc, dev,
1467 S5P_FIMV_CH_SEQ_HEADER_V6, NULL); 1462 S5P_FIMV_CH_SEQ_HEADER_V6, NULL);
1468 1463
1469 return 0; 1464 return 0;
@@ -1479,7 +1474,7 @@ static int s5p_mfc_h264_set_aso_slice_order_v6(struct s5p_mfc_ctx *ctx)
1479 1474
1480 if (p_h264->aso) { 1475 if (p_h264->aso) {
1481 for (i = 0; i < ARRAY_SIZE(p_h264->aso_slice_order); i++) { 1476 for (i = 0; i < ARRAY_SIZE(p_h264->aso_slice_order); i++) {
1482 WRITEL(p_h264->aso_slice_order[i], 1477 writel(p_h264->aso_slice_order[i],
1483 mfc_regs->e_h264_aso_slice_order_0 + i * 4); 1478 mfc_regs->e_h264_aso_slice_order_0 + i * 4);
1484 } 1479 }
1485 } 1480 }
@@ -1501,8 +1496,8 @@ static int s5p_mfc_encode_one_frame_v6(struct s5p_mfc_ctx *ctx)
1501 1496
1502 s5p_mfc_set_slice_mode(ctx); 1497 s5p_mfc_set_slice_mode(ctx);
1503 1498
1504 WRITEL(ctx->inst_no, mfc_regs->instance_id); 1499 writel(ctx->inst_no, mfc_regs->instance_id);
1505 s5p_mfc_hw_call(dev->mfc_cmds, cmd_host2risc, dev, 1500 s5p_mfc_hw_call_void(dev->mfc_cmds, cmd_host2risc, dev,
1506 S5P_FIMV_CH_FRAME_START_V6, NULL); 1501 S5P_FIMV_CH_FRAME_START_V6, NULL);
1507 1502
1508 mfc_debug(2, "--\n"); 1503 mfc_debug(2, "--\n");
@@ -1877,15 +1872,15 @@ static void s5p_mfc_cleanup_queue_v6(struct list_head *lh, struct vb2_queue *vq)
1877static void s5p_mfc_clear_int_flags_v6(struct s5p_mfc_dev *dev) 1872static void s5p_mfc_clear_int_flags_v6(struct s5p_mfc_dev *dev)
1878{ 1873{
1879 const struct s5p_mfc_regs *mfc_regs = dev->mfc_regs; 1874 const struct s5p_mfc_regs *mfc_regs = dev->mfc_regs;
1880 WRITEL(0, mfc_regs->risc2host_command); 1875 writel(0, mfc_regs->risc2host_command);
1881 WRITEL(0, mfc_regs->risc2host_int); 1876 writel(0, mfc_regs->risc2host_int);
1882} 1877}
1883 1878
1884static void s5p_mfc_write_info_v6(struct s5p_mfc_ctx *ctx, unsigned int data, 1879static void s5p_mfc_write_info_v6(struct s5p_mfc_ctx *ctx, unsigned int data,
1885 unsigned int ofs) 1880 unsigned int ofs)
1886{ 1881{
1887 s5p_mfc_clock_on(); 1882 s5p_mfc_clock_on();
1888 WRITEL(data, (void *)ofs); 1883 writel(data, (volatile void __iomem *)((unsigned long)ofs));
1889 s5p_mfc_clock_off(); 1884 s5p_mfc_clock_off();
1890} 1885}
1891 1886
@@ -1895,7 +1890,7 @@ s5p_mfc_read_info_v6(struct s5p_mfc_ctx *ctx, unsigned int ofs)
1895 int ret; 1890 int ret;
1896 1891
1897 s5p_mfc_clock_on(); 1892 s5p_mfc_clock_on();
1898 ret = READL((void *)ofs); 1893 ret = readl((volatile void __iomem *)((unsigned long)ofs));
1899 s5p_mfc_clock_off(); 1894 s5p_mfc_clock_off();
1900 1895
1901 return ret; 1896 return ret;
@@ -1903,51 +1898,51 @@ s5p_mfc_read_info_v6(struct s5p_mfc_ctx *ctx, unsigned int ofs)
1903 1898
1904static int s5p_mfc_get_dspl_y_adr_v6(struct s5p_mfc_dev *dev) 1899static int s5p_mfc_get_dspl_y_adr_v6(struct s5p_mfc_dev *dev)
1905{ 1900{
1906 return READL(dev->mfc_regs->d_display_first_plane_addr); 1901 return readl(dev->mfc_regs->d_display_first_plane_addr);
1907} 1902}
1908 1903
1909static int s5p_mfc_get_dec_y_adr_v6(struct s5p_mfc_dev *dev) 1904static int s5p_mfc_get_dec_y_adr_v6(struct s5p_mfc_dev *dev)
1910{ 1905{
1911 return READL(dev->mfc_regs->d_decoded_first_plane_addr); 1906 return readl(dev->mfc_regs->d_decoded_first_plane_addr);
1912} 1907}
1913 1908
1914static int s5p_mfc_get_dspl_status_v6(struct s5p_mfc_dev *dev) 1909static int s5p_mfc_get_dspl_status_v6(struct s5p_mfc_dev *dev)
1915{ 1910{
1916 return READL(dev->mfc_regs->d_display_status); 1911 return readl(dev->mfc_regs->d_display_status);
1917} 1912}
1918 1913
1919static int s5p_mfc_get_dec_status_v6(struct s5p_mfc_dev *dev) 1914static int s5p_mfc_get_dec_status_v6(struct s5p_mfc_dev *dev)
1920{ 1915{
1921 return READL(dev->mfc_regs->d_decoded_status); 1916 return readl(dev->mfc_regs->d_decoded_status);
1922} 1917}
1923 1918
1924static int s5p_mfc_get_dec_frame_type_v6(struct s5p_mfc_dev *dev) 1919static int s5p_mfc_get_dec_frame_type_v6(struct s5p_mfc_dev *dev)
1925{ 1920{
1926 return READL(dev->mfc_regs->d_decoded_frame_type) & 1921 return readl(dev->mfc_regs->d_decoded_frame_type) &
1927 S5P_FIMV_DECODE_FRAME_MASK_V6; 1922 S5P_FIMV_DECODE_FRAME_MASK_V6;
1928} 1923}
1929 1924
1930static int s5p_mfc_get_disp_frame_type_v6(struct s5p_mfc_ctx *ctx) 1925static int s5p_mfc_get_disp_frame_type_v6(struct s5p_mfc_ctx *ctx)
1931{ 1926{
1932 struct s5p_mfc_dev *dev = ctx->dev; 1927 struct s5p_mfc_dev *dev = ctx->dev;
1933 return READL(dev->mfc_regs->d_display_frame_type) & 1928 return readl(dev->mfc_regs->d_display_frame_type) &
1934 S5P_FIMV_DECODE_FRAME_MASK_V6; 1929 S5P_FIMV_DECODE_FRAME_MASK_V6;
1935} 1930}
1936 1931
1937static int s5p_mfc_get_consumed_stream_v6(struct s5p_mfc_dev *dev) 1932static int s5p_mfc_get_consumed_stream_v6(struct s5p_mfc_dev *dev)
1938{ 1933{
1939 return READL(dev->mfc_regs->d_decoded_nal_size); 1934 return readl(dev->mfc_regs->d_decoded_nal_size);
1940} 1935}
1941 1936
1942static int s5p_mfc_get_int_reason_v6(struct s5p_mfc_dev *dev) 1937static int s5p_mfc_get_int_reason_v6(struct s5p_mfc_dev *dev)
1943{ 1938{
1944 return READL(dev->mfc_regs->risc2host_command) & 1939 return readl(dev->mfc_regs->risc2host_command) &
1945 S5P_FIMV_RISC2HOST_CMD_MASK; 1940 S5P_FIMV_RISC2HOST_CMD_MASK;
1946} 1941}
1947 1942
1948static int s5p_mfc_get_int_err_v6(struct s5p_mfc_dev *dev) 1943static int s5p_mfc_get_int_err_v6(struct s5p_mfc_dev *dev)
1949{ 1944{
1950 return READL(dev->mfc_regs->error_code); 1945 return readl(dev->mfc_regs->error_code);
1951} 1946}
1952 1947
1953static int s5p_mfc_err_dec_v6(unsigned int err) 1948static int s5p_mfc_err_dec_v6(unsigned int err)
@@ -1962,87 +1957,87 @@ static int s5p_mfc_err_dspl_v6(unsigned int err)
1962 1957
1963static int s5p_mfc_get_img_width_v6(struct s5p_mfc_dev *dev) 1958static int s5p_mfc_get_img_width_v6(struct s5p_mfc_dev *dev)
1964{ 1959{
1965 return READL(dev->mfc_regs->d_display_frame_width); 1960 return readl(dev->mfc_regs->d_display_frame_width);
1966} 1961}
1967 1962
1968static int s5p_mfc_get_img_height_v6(struct s5p_mfc_dev *dev) 1963static int s5p_mfc_get_img_height_v6(struct s5p_mfc_dev *dev)
1969{ 1964{
1970 return READL(dev->mfc_regs->d_display_frame_height); 1965 return readl(dev->mfc_regs->d_display_frame_height);
1971} 1966}
1972 1967
1973static int s5p_mfc_get_dpb_count_v6(struct s5p_mfc_dev *dev) 1968static int s5p_mfc_get_dpb_count_v6(struct s5p_mfc_dev *dev)
1974{ 1969{
1975 return READL(dev->mfc_regs->d_min_num_dpb); 1970 return readl(dev->mfc_regs->d_min_num_dpb);
1976} 1971}
1977 1972
1978static int s5p_mfc_get_mv_count_v6(struct s5p_mfc_dev *dev) 1973static int s5p_mfc_get_mv_count_v6(struct s5p_mfc_dev *dev)
1979{ 1974{
1980 return READL(dev->mfc_regs->d_min_num_mv); 1975 return readl(dev->mfc_regs->d_min_num_mv);
1981} 1976}
1982 1977
1983static int s5p_mfc_get_inst_no_v6(struct s5p_mfc_dev *dev) 1978static int s5p_mfc_get_inst_no_v6(struct s5p_mfc_dev *dev)
1984{ 1979{
1985 return READL(dev->mfc_regs->ret_instance_id); 1980 return readl(dev->mfc_regs->ret_instance_id);
1986} 1981}
1987 1982
1988static int s5p_mfc_get_enc_dpb_count_v6(struct s5p_mfc_dev *dev) 1983static int s5p_mfc_get_enc_dpb_count_v6(struct s5p_mfc_dev *dev)
1989{ 1984{
1990 return READL(dev->mfc_regs->e_num_dpb); 1985 return readl(dev->mfc_regs->e_num_dpb);
1991} 1986}
1992 1987
1993static int s5p_mfc_get_enc_strm_size_v6(struct s5p_mfc_dev *dev) 1988static int s5p_mfc_get_enc_strm_size_v6(struct s5p_mfc_dev *dev)
1994{ 1989{
1995 return READL(dev->mfc_regs->e_stream_size); 1990 return readl(dev->mfc_regs->e_stream_size);
1996} 1991}
1997 1992
1998static int s5p_mfc_get_enc_slice_type_v6(struct s5p_mfc_dev *dev) 1993static int s5p_mfc_get_enc_slice_type_v6(struct s5p_mfc_dev *dev)
1999{ 1994{
2000 return READL(dev->mfc_regs->e_slice_type); 1995 return readl(dev->mfc_regs->e_slice_type);
2001} 1996}
2002 1997
2003static int s5p_mfc_get_enc_pic_count_v6(struct s5p_mfc_dev *dev) 1998static int s5p_mfc_get_enc_pic_count_v6(struct s5p_mfc_dev *dev)
2004{ 1999{
2005 return READL(dev->mfc_regs->e_picture_count); 2000 return readl(dev->mfc_regs->e_picture_count);
2006} 2001}
2007 2002
2008static int s5p_mfc_get_sei_avail_status_v6(struct s5p_mfc_ctx *ctx) 2003static int s5p_mfc_get_sei_avail_status_v6(struct s5p_mfc_ctx *ctx)
2009{ 2004{
2010 struct s5p_mfc_dev *dev = ctx->dev; 2005 struct s5p_mfc_dev *dev = ctx->dev;
2011 return READL(dev->mfc_regs->d_frame_pack_sei_avail); 2006 return readl(dev->mfc_regs->d_frame_pack_sei_avail);
2012} 2007}
2013 2008
2014static int s5p_mfc_get_mvc_num_views_v6(struct s5p_mfc_dev *dev) 2009static int s5p_mfc_get_mvc_num_views_v6(struct s5p_mfc_dev *dev)
2015{ 2010{
2016 return READL(dev->mfc_regs->d_mvc_num_views); 2011 return readl(dev->mfc_regs->d_mvc_num_views);
2017} 2012}
2018 2013
2019static int s5p_mfc_get_mvc_view_id_v6(struct s5p_mfc_dev *dev) 2014static int s5p_mfc_get_mvc_view_id_v6(struct s5p_mfc_dev *dev)
2020{ 2015{
2021 return READL(dev->mfc_regs->d_mvc_view_id); 2016 return readl(dev->mfc_regs->d_mvc_view_id);
2022} 2017}
2023 2018
2024static unsigned int s5p_mfc_get_pic_type_top_v6(struct s5p_mfc_ctx *ctx) 2019static unsigned int s5p_mfc_get_pic_type_top_v6(struct s5p_mfc_ctx *ctx)
2025{ 2020{
2026 return s5p_mfc_read_info_v6(ctx, 2021 return s5p_mfc_read_info_v6(ctx,
2027 (unsigned int) ctx->dev->mfc_regs->d_ret_picture_tag_top); 2022 (__force unsigned long) ctx->dev->mfc_regs->d_ret_picture_tag_top);
2028} 2023}
2029 2024
2030static unsigned int s5p_mfc_get_pic_type_bot_v6(struct s5p_mfc_ctx *ctx) 2025static unsigned int s5p_mfc_get_pic_type_bot_v6(struct s5p_mfc_ctx *ctx)
2031{ 2026{
2032 return s5p_mfc_read_info_v6(ctx, 2027 return s5p_mfc_read_info_v6(ctx,
2033 (unsigned int) ctx->dev->mfc_regs->d_ret_picture_tag_bot); 2028 (__force unsigned long) ctx->dev->mfc_regs->d_ret_picture_tag_bot);
2034} 2029}
2035 2030
2036static unsigned int s5p_mfc_get_crop_info_h_v6(struct s5p_mfc_ctx *ctx) 2031static unsigned int s5p_mfc_get_crop_info_h_v6(struct s5p_mfc_ctx *ctx)
2037{ 2032{
2038 return s5p_mfc_read_info_v6(ctx, 2033 return s5p_mfc_read_info_v6(ctx,
2039 (unsigned int) ctx->dev->mfc_regs->d_display_crop_info1); 2034 (__force unsigned long) ctx->dev->mfc_regs->d_display_crop_info1);
2040} 2035}
2041 2036
2042static unsigned int s5p_mfc_get_crop_info_v_v6(struct s5p_mfc_ctx *ctx) 2037static unsigned int s5p_mfc_get_crop_info_v_v6(struct s5p_mfc_ctx *ctx)
2043{ 2038{
2044 return s5p_mfc_read_info_v6(ctx, 2039 return s5p_mfc_read_info_v6(ctx,
2045 (unsigned int) ctx->dev->mfc_regs->d_display_crop_info2); 2040 (__force unsigned long) ctx->dev->mfc_regs->d_display_crop_info2);
2046} 2041}
2047 2042
2048static struct s5p_mfc_regs mfc_regs; 2043static struct s5p_mfc_regs mfc_regs;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_pm.c b/drivers/media/platform/s5p-mfc/s5p_mfc_pm.c
index b6a8be97a96c..826c48945bf5 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_pm.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_pm.c
@@ -21,7 +21,7 @@
21#include "s5p_mfc_pm.h" 21#include "s5p_mfc_pm.h"
22 22
23#define MFC_GATE_CLK_NAME "mfc" 23#define MFC_GATE_CLK_NAME "mfc"
24#define MFC_SCLK_NAME "sclk-mfc" 24#define MFC_SCLK_NAME "sclk_mfc"
25#define MFC_SCLK_RATE (200 * 1000000) 25#define MFC_SCLK_RATE (200 * 1000000)
26 26
27#define CLK_DEBUG 27#define CLK_DEBUG
diff --git a/drivers/media/platform/s5p-tv/Kconfig b/drivers/media/platform/s5p-tv/Kconfig
index 369a4c191e18..a9d56f8936b4 100644
--- a/drivers/media/platform/s5p-tv/Kconfig
+++ b/drivers/media/platform/s5p-tv/Kconfig
@@ -8,7 +8,8 @@
8 8
9config VIDEO_SAMSUNG_S5P_TV 9config VIDEO_SAMSUNG_S5P_TV
10 bool "Samsung TV driver for S5P platform" 10 bool "Samsung TV driver for S5P platform"
11 depends on (PLAT_S5P || ARCH_EXYNOS) && PM_RUNTIME 11 depends on PM_RUNTIME
12 depends on PLAT_S5P || ARCH_EXYNOS || COMPILE_TEST
12 default n 13 default n
13 ---help--- 14 ---help---
14 Say Y here to enable selecting the TV output devices for 15 Say Y here to enable selecting the TV output devices for
@@ -70,6 +71,7 @@ config VIDEO_SAMSUNG_S5P_MIXER
70 tristate "Samsung Mixer and Video Processor Driver" 71 tristate "Samsung Mixer and Video Processor Driver"
71 depends on VIDEO_DEV && VIDEO_V4L2 72 depends on VIDEO_DEV && VIDEO_V4L2
72 depends on VIDEO_SAMSUNG_S5P_TV 73 depends on VIDEO_SAMSUNG_S5P_TV
74 depends on HAS_DMA
73 select VIDEOBUF2_DMA_CONTIG 75 select VIDEOBUF2_DMA_CONTIG
74 help 76 help
75 Say Y here if you want support for the Mixer in Samsung S5P SoCs. 77 Say Y here if you want support for the Mixer in Samsung S5P SoCs.
diff --git a/drivers/media/platform/s5p-tv/hdmi_drv.c b/drivers/media/platform/s5p-tv/hdmi_drv.c
index 754740f4b671..37c8bd694c5f 100644
--- a/drivers/media/platform/s5p-tv/hdmi_drv.c
+++ b/drivers/media/platform/s5p-tv/hdmi_drv.c
@@ -615,7 +615,7 @@ static int hdmi_s_power(struct v4l2_subdev *sd, int on)
615 else 615 else
616 ret = pm_runtime_put_sync(hdev->dev); 616 ret = pm_runtime_put_sync(hdev->dev);
617 /* only values < 0 indicate errors */ 617 /* only values < 0 indicate errors */
618 return IS_ERR_VALUE(ret) ? ret : 0; 618 return ret < 0 ? ret : 0;
619} 619}
620 620
621static int hdmi_s_dv_timings(struct v4l2_subdev *sd, 621static int hdmi_s_dv_timings(struct v4l2_subdev *sd,
diff --git a/drivers/media/platform/s5p-tv/sdo_drv.c b/drivers/media/platform/s5p-tv/sdo_drv.c
index 5a7c3796f22e..72cf892dd008 100644
--- a/drivers/media/platform/s5p-tv/sdo_drv.c
+++ b/drivers/media/platform/s5p-tv/sdo_drv.c
@@ -190,7 +190,7 @@ static int sdo_s_power(struct v4l2_subdev *sd, int on)
190 ret = pm_runtime_put_sync(dev); 190 ret = pm_runtime_put_sync(dev);
191 191
192 /* only values < 0 indicate errors */ 192 /* only values < 0 indicate errors */
193 return IS_ERR_VALUE(ret) ? ret : 0; 193 return ret < 0 ? ret : 0;
194} 194}
195 195
196static int sdo_streamon(struct sdo_device *sdev) 196static int sdo_streamon(struct sdo_device *sdev)
diff --git a/drivers/media/platform/s5p-tv/sii9234_drv.c b/drivers/media/platform/s5p-tv/sii9234_drv.c
index 3dd762e5b67e..db8c17bb4aaa 100644
--- a/drivers/media/platform/s5p-tv/sii9234_drv.c
+++ b/drivers/media/platform/s5p-tv/sii9234_drv.c
@@ -289,7 +289,7 @@ static int sii9234_s_power(struct v4l2_subdev *sd, int on)
289 else 289 else
290 ret = pm_runtime_put(&ctx->client->dev); 290 ret = pm_runtime_put(&ctx->client->dev);
291 /* only values < 0 indicate errors */ 291 /* only values < 0 indicate errors */
292 return IS_ERR_VALUE(ret) ? ret : 0; 292 return ret < 0 ? ret : 0;
293} 293}
294 294
295static int sii9234_s_stream(struct v4l2_subdev *sd, int enable) 295static int sii9234_s_stream(struct v4l2_subdev *sd, int enable)
diff --git a/drivers/media/platform/sh_veu.c b/drivers/media/platform/sh_veu.c
index 8dc279d4d561..be3b3bc71a0f 100644
--- a/drivers/media/platform/sh_veu.c
+++ b/drivers/media/platform/sh_veu.c
@@ -26,6 +26,7 @@
26#include <media/v4l2-device.h> 26#include <media/v4l2-device.h>
27#include <media/v4l2-ioctl.h> 27#include <media/v4l2-ioctl.h>
28#include <media/v4l2-mem2mem.h> 28#include <media/v4l2-mem2mem.h>
29#include <media/v4l2-image-sizes.h>
29#include <media/videobuf2-dma-contig.h> 30#include <media/videobuf2-dma-contig.h>
30 31
31#define VEU_STR 0x00 /* start register */ 32#define VEU_STR 0x00 /* start register */
@@ -135,9 +136,6 @@ enum sh_veu_fmt_idx {
135 SH_VEU_FMT_RGB24, 136 SH_VEU_FMT_RGB24,
136}; 137};
137 138
138#define VGA_WIDTH 640
139#define VGA_HEIGHT 480
140
141#define DEFAULT_IN_WIDTH VGA_WIDTH 139#define DEFAULT_IN_WIDTH VGA_WIDTH
142#define DEFAULT_IN_HEIGHT VGA_HEIGHT 140#define DEFAULT_IN_HEIGHT VGA_HEIGHT
143#define DEFAULT_IN_FMTIDX SH_VEU_FMT_NV12 141#define DEFAULT_IN_FMTIDX SH_VEU_FMT_NV12
diff --git a/drivers/media/platform/soc_camera/Kconfig b/drivers/media/platform/soc_camera/Kconfig
index 6540847f4e1d..f2776cd415ca 100644
--- a/drivers/media/platform/soc_camera/Kconfig
+++ b/drivers/media/platform/soc_camera/Kconfig
@@ -20,6 +20,8 @@ config SOC_CAMERA_PLATFORM
20config VIDEO_MX3 20config VIDEO_MX3
21 tristate "i.MX3x Camera Sensor Interface driver" 21 tristate "i.MX3x Camera Sensor Interface driver"
22 depends on VIDEO_DEV && MX3_IPU && SOC_CAMERA 22 depends on VIDEO_DEV && MX3_IPU && SOC_CAMERA
23 depends on MX3_IPU || COMPILE_TEST
24 depends on HAS_DMA
23 select VIDEOBUF2_DMA_CONTIG 25 select VIDEOBUF2_DMA_CONTIG
24 ---help--- 26 ---help---
25 This is a v4l2 driver for the i.MX3x Camera Sensor Interface 27 This is a v4l2 driver for the i.MX3x Camera Sensor Interface
@@ -35,6 +37,7 @@ config VIDEO_RCAR_VIN
35 tristate "R-Car Video Input (VIN) support" 37 tristate "R-Car Video Input (VIN) support"
36 depends on VIDEO_DEV && SOC_CAMERA 38 depends on VIDEO_DEV && SOC_CAMERA
37 depends on ARCH_SHMOBILE || COMPILE_TEST 39 depends on ARCH_SHMOBILE || COMPILE_TEST
40 depends on HAS_DMA
38 select VIDEOBUF2_DMA_CONTIG 41 select VIDEOBUF2_DMA_CONTIG
39 select SOC_CAMERA_SCALE_CROP 42 select SOC_CAMERA_SCALE_CROP
40 ---help--- 43 ---help---
@@ -51,6 +54,7 @@ config VIDEO_SH_MOBILE_CEU
51 tristate "SuperH Mobile CEU Interface driver" 54 tristate "SuperH Mobile CEU Interface driver"
52 depends on VIDEO_DEV && SOC_CAMERA && HAS_DMA && HAVE_CLK 55 depends on VIDEO_DEV && SOC_CAMERA && HAS_DMA && HAVE_CLK
53 depends on ARCH_SHMOBILE || SUPERH || COMPILE_TEST 56 depends on ARCH_SHMOBILE || SUPERH || COMPILE_TEST
57 depends on HAS_DMA
54 select VIDEOBUF2_DMA_CONTIG 58 select VIDEOBUF2_DMA_CONTIG
55 select SOC_CAMERA_SCALE_CROP 59 select SOC_CAMERA_SCALE_CROP
56 ---help--- 60 ---help---
@@ -58,7 +62,9 @@ config VIDEO_SH_MOBILE_CEU
58 62
59config VIDEO_OMAP1 63config VIDEO_OMAP1
60 tristate "OMAP1 Camera Interface driver" 64 tristate "OMAP1 Camera Interface driver"
61 depends on VIDEO_DEV && ARCH_OMAP1 && SOC_CAMERA 65 depends on VIDEO_DEV && SOC_CAMERA
66 depends on ARCH_OMAP1
67 depends on HAS_DMA
62 select VIDEOBUF_DMA_CONTIG 68 select VIDEOBUF_DMA_CONTIG
63 select VIDEOBUF_DMA_SG 69 select VIDEOBUF_DMA_SG
64 ---help--- 70 ---help---
@@ -66,14 +72,18 @@ config VIDEO_OMAP1
66 72
67config VIDEO_MX2 73config VIDEO_MX2
68 tristate "i.MX27 Camera Sensor Interface driver" 74 tristate "i.MX27 Camera Sensor Interface driver"
69 depends on VIDEO_DEV && SOC_CAMERA && SOC_IMX27 75 depends on VIDEO_DEV && SOC_CAMERA
76 depends on SOC_IMX27 || COMPILE_TEST
77 depends on HAS_DMA
70 select VIDEOBUF2_DMA_CONTIG 78 select VIDEOBUF2_DMA_CONTIG
71 ---help--- 79 ---help---
72 This is a v4l2 driver for the i.MX27 Camera Sensor Interface 80 This is a v4l2 driver for the i.MX27 Camera Sensor Interface
73 81
74config VIDEO_ATMEL_ISI 82config VIDEO_ATMEL_ISI
75 tristate "ATMEL Image Sensor Interface (ISI) support" 83 tristate "ATMEL Image Sensor Interface (ISI) support"
76 depends on VIDEO_DEV && SOC_CAMERA && ARCH_AT91 84 depends on VIDEO_DEV && SOC_CAMERA
85 depends on ARCH_AT91 || COMPILE_TEST
86 depends on HAS_DMA
77 select VIDEOBUF2_DMA_CONTIG 87 select VIDEOBUF2_DMA_CONTIG
78 ---help--- 88 ---help---
79 This module makes the ATMEL Image Sensor Interface available 89 This module makes the ATMEL Image Sensor Interface available
diff --git a/drivers/media/platform/soc_camera/atmel-isi.c b/drivers/media/platform/soc_camera/atmel-isi.c
index 3408b045b3f1..c5291b001057 100644
--- a/drivers/media/platform/soc_camera/atmel-isi.c
+++ b/drivers/media/platform/soc_camera/atmel-isi.c
@@ -54,7 +54,7 @@ static void set_dma_ctrl(struct fbd *fb_desc, u32 ctrl)
54struct isi_dma_desc { 54struct isi_dma_desc {
55 struct list_head list; 55 struct list_head list;
56 struct fbd *p_fbd; 56 struct fbd *p_fbd;
57 u32 fbd_phys; 57 dma_addr_t fbd_phys;
58}; 58};
59 59
60/* Frame buffer data */ 60/* Frame buffer data */
@@ -75,7 +75,7 @@ struct atmel_isi {
75 75
76 /* Allocate descriptors for dma buffer use */ 76 /* Allocate descriptors for dma buffer use */
77 struct fbd *p_fb_descriptors; 77 struct fbd *p_fb_descriptors;
78 u32 fb_descriptors_phys; 78 dma_addr_t fb_descriptors_phys;
79 struct list_head dma_desc_head; 79 struct list_head dma_desc_head;
80 struct isi_dma_desc dma_desc[MAX_BUFFER_NUM]; 80 struct isi_dma_desc dma_desc[MAX_BUFFER_NUM];
81 81
@@ -169,7 +169,7 @@ static irqreturn_t atmel_isi_handle_streaming(struct atmel_isi *isi)
169 isi->active = list_entry(isi->video_buffer_list.next, 169 isi->active = list_entry(isi->video_buffer_list.next,
170 struct frame_buffer, list); 170 struct frame_buffer, list);
171 isi_writel(isi, ISI_DMA_C_DSCR, 171 isi_writel(isi, ISI_DMA_C_DSCR,
172 isi->active->p_dma_desc->fbd_phys); 172 (u32)isi->active->p_dma_desc->fbd_phys);
173 isi_writel(isi, ISI_DMA_C_CTRL, 173 isi_writel(isi, ISI_DMA_C_CTRL,
174 ISI_DMA_CTRL_FETCH | ISI_DMA_CTRL_DONE); 174 ISI_DMA_CTRL_FETCH | ISI_DMA_CTRL_DONE);
175 isi_writel(isi, ISI_DMA_CHER, ISI_DMA_CHSR_C_CH); 175 isi_writel(isi, ISI_DMA_CHER, ISI_DMA_CHSR_C_CH);
@@ -346,7 +346,7 @@ static void start_dma(struct atmel_isi *isi, struct frame_buffer *buffer)
346 return; 346 return;
347 } 347 }
348 348
349 isi_writel(isi, ISI_DMA_C_DSCR, buffer->p_dma_desc->fbd_phys); 349 isi_writel(isi, ISI_DMA_C_DSCR, (u32)buffer->p_dma_desc->fbd_phys);
350 isi_writel(isi, ISI_DMA_C_CTRL, ISI_DMA_CTRL_FETCH | ISI_DMA_CTRL_DONE); 350 isi_writel(isi, ISI_DMA_C_CTRL, ISI_DMA_CTRL_FETCH | ISI_DMA_CTRL_DONE);
351 isi_writel(isi, ISI_DMA_CHER, ISI_DMA_CHSR_C_CH); 351 isi_writel(isi, ISI_DMA_CHER, ISI_DMA_CHSR_C_CH);
352 352
@@ -384,7 +384,6 @@ static int start_streaming(struct vb2_queue *vq, unsigned int count)
384 struct soc_camera_device *icd = soc_camera_from_vb2q(vq); 384 struct soc_camera_device *icd = soc_camera_from_vb2q(vq);
385 struct soc_camera_host *ici = to_soc_camera_host(icd->parent); 385 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
386 struct atmel_isi *isi = ici->priv; 386 struct atmel_isi *isi = ici->priv;
387 u32 sr = 0;
388 int ret; 387 int ret;
389 388
390 /* Reset ISI */ 389 /* Reset ISI */
@@ -394,11 +393,11 @@ static int start_streaming(struct vb2_queue *vq, unsigned int count)
394 return ret; 393 return ret;
395 } 394 }
396 /* Disable all interrupts */ 395 /* Disable all interrupts */
397 isi_writel(isi, ISI_INTDIS, ~0UL); 396 isi_writel(isi, ISI_INTDIS, (u32)~0UL);
398 397
399 spin_lock_irq(&isi->lock); 398 spin_lock_irq(&isi->lock);
400 /* Clear any pending interrupt */ 399 /* Clear any pending interrupt */
401 sr = isi_readl(isi, ISI_STATUS); 400 isi_readl(isi, ISI_STATUS);
402 401
403 if (count) 402 if (count)
404 start_dma(isi, isi->active); 403 start_dma(isi, isi->active);
diff --git a/drivers/media/platform/soc_camera/mx2_camera.c b/drivers/media/platform/soc_camera/mx2_camera.c
index b40bc2e5ba47..2347612a4cc1 100644
--- a/drivers/media/platform/soc_camera/mx2_camera.c
+++ b/drivers/media/platform/soc_camera/mx2_camera.c
@@ -809,10 +809,9 @@ static int mx2_camera_init_videobuf(struct vb2_queue *q,
809 809
810static int mx27_camera_emma_prp_reset(struct mx2_camera_dev *pcdev) 810static int mx27_camera_emma_prp_reset(struct mx2_camera_dev *pcdev)
811{ 811{
812 u32 cntl;
813 int count = 0; 812 int count = 0;
814 813
815 cntl = readl(pcdev->base_emma + PRP_CNTL); 814 readl(pcdev->base_emma + PRP_CNTL);
816 writel(PRP_CNTL_SWRST, pcdev->base_emma + PRP_CNTL); 815 writel(PRP_CNTL_SWRST, pcdev->base_emma + PRP_CNTL);
817 while (count++ < 100) { 816 while (count++ < 100) {
818 if (!(readl(pcdev->base_emma + PRP_CNTL) & PRP_CNTL_SWRST)) 817 if (!(readl(pcdev->base_emma + PRP_CNTL) & PRP_CNTL_SWRST))
@@ -1003,7 +1002,7 @@ static int mx2_emmaprp_resize(struct mx2_camera_dev *pcdev,
1003 struct v4l2_mbus_framefmt *mf_in, 1002 struct v4l2_mbus_framefmt *mf_in,
1004 struct v4l2_pix_format *pix_out, bool apply) 1003 struct v4l2_pix_format *pix_out, bool apply)
1005{ 1004{
1006 int num, den; 1005 unsigned int num, den;
1007 unsigned long m; 1006 unsigned long m;
1008 int i, dir; 1007 int i, dir;
1009 1008
diff --git a/drivers/media/platform/soc_camera/pxa_camera.c b/drivers/media/platform/soc_camera/pxa_camera.c
index 64dc80ccd6f9..66178fc9f9eb 100644
--- a/drivers/media/platform/soc_camera/pxa_camera.c
+++ b/drivers/media/platform/soc_camera/pxa_camera.c
@@ -1694,7 +1694,7 @@ static int pxa_camera_pdata_from_dt(struct device *dev,
1694 break; 1694 break;
1695 default: 1695 default:
1696 break; 1696 break;
1697 }; 1697 }
1698 1698
1699 if (ep.bus.parallel.flags & V4L2_MBUS_MASTER) 1699 if (ep.bus.parallel.flags & V4L2_MBUS_MASTER)
1700 pcdev->platform_flags |= PXA_CAMERA_MASTER; 1700 pcdev->platform_flags |= PXA_CAMERA_MASTER;
diff --git a/drivers/media/platform/soc_camera/rcar_vin.c b/drivers/media/platform/soc_camera/rcar_vin.c
index 85d579f65f52..20defcb8b31b 100644
--- a/drivers/media/platform/soc_camera/rcar_vin.c
+++ b/drivers/media/platform/soc_camera/rcar_vin.c
@@ -981,7 +981,7 @@ static int rcar_vin_get_formats(struct soc_camera_device *icd, unsigned int idx,
981 981
982 if (shift == 3) { 982 if (shift == 3) {
983 dev_err(dev, 983 dev_err(dev,
984 "Failed to configure the client below %ux%x\n", 984 "Failed to configure the client below %ux%u\n",
985 mf.width, mf.height); 985 mf.width, mf.height);
986 return -EIO; 986 return -EIO;
987 } 987 }
@@ -1502,7 +1502,7 @@ static int rcar_vin_probe(struct platform_device *pdev)
1502 } else { 1502 } else {
1503 priv->ici.nr = of_alias_get_id(pdev->dev.of_node, "vin"); 1503 priv->ici.nr = of_alias_get_id(pdev->dev.of_node, "vin");
1504 priv->chip = (enum chip_id)match->data; 1504 priv->chip = (enum chip_id)match->data;
1505 }; 1505 }
1506 1506
1507 spin_lock_init(&priv->lock); 1507 spin_lock_init(&priv->lock);
1508 INIT_LIST_HEAD(&priv->capture); 1508 INIT_LIST_HEAD(&priv->capture);
diff --git a/drivers/media/platform/soc_camera/soc_camera.c b/drivers/media/platform/soc_camera/soc_camera.c
index f4308fed5431..8e61b976da19 100644
--- a/drivers/media/platform/soc_camera/soc_camera.c
+++ b/drivers/media/platform/soc_camera/soc_camera.c
@@ -437,6 +437,22 @@ static int soc_camera_prepare_buf(struct file *file, void *priv,
437 return vb2_prepare_buf(&icd->vb2_vidq, b); 437 return vb2_prepare_buf(&icd->vb2_vidq, b);
438} 438}
439 439
440static int soc_camera_expbuf(struct file *file, void *priv,
441 struct v4l2_exportbuffer *p)
442{
443 struct soc_camera_device *icd = file->private_data;
444 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
445
446 if (icd->streamer != file)
447 return -EBUSY;
448
449 /* videobuf2 only */
450 if (ici->ops->init_videobuf)
451 return -EINVAL;
452 else
453 return vb2_expbuf(&icd->vb2_vidq, p);
454}
455
440/* Always entered with .host_lock held */ 456/* Always entered with .host_lock held */
441static int soc_camera_init_user_formats(struct soc_camera_device *icd) 457static int soc_camera_init_user_formats(struct soc_camera_device *icd)
442{ 458{
@@ -1347,13 +1363,11 @@ static int soc_camera_i2c_init(struct soc_camera_device *icd,
1347 return -ENODEV; 1363 return -ENODEV;
1348 } 1364 }
1349 1365
1350 ssdd = kzalloc(sizeof(*ssdd), GFP_KERNEL); 1366 ssdd = kmemdup(&sdesc->subdev_desc, sizeof(*ssdd), GFP_KERNEL);
1351 if (!ssdd) { 1367 if (!ssdd) {
1352 ret = -ENOMEM; 1368 ret = -ENOMEM;
1353 goto ealloc; 1369 goto ealloc;
1354 } 1370 }
1355
1356 memcpy(ssdd, &sdesc->subdev_desc, sizeof(*ssdd));
1357 /* 1371 /*
1358 * In synchronous case we request regulators ourselves in 1372 * In synchronous case we request regulators ourselves in
1359 * soc_camera_pdrv_probe(), make sure the subdevice driver doesn't try 1373 * soc_camera_pdrv_probe(), make sure the subdevice driver doesn't try
@@ -2085,6 +2099,7 @@ static const struct v4l2_ioctl_ops soc_camera_ioctl_ops = {
2085 .vidioc_dqbuf = soc_camera_dqbuf, 2099 .vidioc_dqbuf = soc_camera_dqbuf,
2086 .vidioc_create_bufs = soc_camera_create_bufs, 2100 .vidioc_create_bufs = soc_camera_create_bufs,
2087 .vidioc_prepare_buf = soc_camera_prepare_buf, 2101 .vidioc_prepare_buf = soc_camera_prepare_buf,
2102 .vidioc_expbuf = soc_camera_expbuf,
2088 .vidioc_streamon = soc_camera_streamon, 2103 .vidioc_streamon = soc_camera_streamon,
2089 .vidioc_streamoff = soc_camera_streamoff, 2104 .vidioc_streamoff = soc_camera_streamoff,
2090 .vidioc_cropcap = soc_camera_cropcap, 2105 .vidioc_cropcap = soc_camera_cropcap,
diff --git a/drivers/media/platform/ti-vpe/vpdma.c b/drivers/media/platform/ti-vpe/vpdma.c
index a51a01359805..3e2e3a33e6ed 100644
--- a/drivers/media/platform/ti-vpe/vpdma.c
+++ b/drivers/media/platform/ti-vpe/vpdma.c
@@ -329,7 +329,7 @@ int vpdma_alloc_desc_buf(struct vpdma_buf *buf, size_t size)
329 if (!buf->addr) 329 if (!buf->addr)
330 return -ENOMEM; 330 return -ENOMEM;
331 331
332 WARN_ON((u32) buf->addr & VPDMA_DESC_ALIGN); 332 WARN_ON(((unsigned long)buf->addr & VPDMA_DESC_ALIGN) != 0);
333 333
334 return 0; 334 return 0;
335} 335}
@@ -584,7 +584,7 @@ static void dump_dtd(struct vpdma_dtd *dtd)
584 pr_debug("word1: line_length = %d, xfer_height = %d\n", 584 pr_debug("word1: line_length = %d, xfer_height = %d\n",
585 dtd_get_line_length(dtd), dtd_get_xfer_height(dtd)); 585 dtd_get_line_length(dtd), dtd_get_xfer_height(dtd));
586 586
587 pr_debug("word2: start_addr = 0x%08x\n", dtd->start_addr); 587 pr_debug("word2: start_addr = %pad\n", &dtd->start_addr);
588 588
589 pr_debug("word3: pkt_type = %d, mode = %d, dir = %d, chan = %d, " 589 pr_debug("word3: pkt_type = %d, mode = %d, dir = %d, chan = %d, "
590 "pri = %d, next_chan = %d\n", dtd_get_pkt_type(dtd), 590 "pri = %d, next_chan = %d\n", dtd_get_pkt_type(dtd),
diff --git a/drivers/media/platform/ti-vpe/vpe.c b/drivers/media/platform/ti-vpe/vpe.c
index 972f43f69206..9a081c291159 100644
--- a/drivers/media/platform/ti-vpe/vpe.c
+++ b/drivers/media/platform/ti-vpe/vpe.c
@@ -31,6 +31,7 @@
31#include <linux/slab.h> 31#include <linux/slab.h>
32#include <linux/videodev2.h> 32#include <linux/videodev2.h>
33#include <linux/log2.h> 33#include <linux/log2.h>
34#include <linux/sizes.h>
34 35
35#include <media/v4l2-common.h> 36#include <media/v4l2-common.h>
36#include <media/v4l2-ctrls.h> 37#include <media/v4l2-ctrls.h>
@@ -138,12 +139,12 @@ struct vpe_dei_regs {
138 * default expert DEI register values, unlikely to be modified. 139 * default expert DEI register values, unlikely to be modified.
139 */ 140 */
140static const struct vpe_dei_regs dei_regs = { 141static const struct vpe_dei_regs dei_regs = {
141 0x020C0804u, 142 .mdt_spacial_freq_thr_reg = 0x020C0804u,
142 0x0118100Fu, 143 .edi_config_reg = 0x0118100Fu,
143 0x08040200u, 144 .edi_lut_reg0 = 0x08040200u,
144 0x1010100Cu, 145 .edi_lut_reg1 = 0x1010100Cu,
145 0x10101010u, 146 .edi_lut_reg2 = 0x10101010u,
146 0x10101010u, 147 .edi_lut_reg3 = 0x10101010u,
147}; 148};
148 149
149/* 150/*
@@ -834,10 +835,10 @@ static int set_srcdst_params(struct vpe_ctx *ctx)
834 VPDMA_STRIDE_ALIGN); 835 VPDMA_STRIDE_ALIGN);
835 mv_buf_size = bytes_per_line * s_q_data->height; 836 mv_buf_size = bytes_per_line * s_q_data->height;
836 837
837 ctx->deinterlacing = 1; 838 ctx->deinterlacing = true;
838 src_h <<= 1; 839 src_h <<= 1;
839 } else { 840 } else {
840 ctx->deinterlacing = 0; 841 ctx->deinterlacing = false;
841 mv_buf_size = 0; 842 mv_buf_size = 0;
842 } 843 }
843 844
@@ -2343,8 +2344,7 @@ v4l2_dev_unreg:
2343 2344
2344static int vpe_remove(struct platform_device *pdev) 2345static int vpe_remove(struct platform_device *pdev)
2345{ 2346{
2346 struct vpe_dev *dev = 2347 struct vpe_dev *dev = platform_get_drvdata(pdev);
2347 (struct vpe_dev *) platform_get_drvdata(pdev);
2348 2348
2349 v4l2_info(&dev->v4l2_dev, "Removing " VPE_MODULE_NAME); 2349 v4l2_info(&dev->v4l2_dev, "Removing " VPE_MODULE_NAME);
2350 2350
diff --git a/drivers/media/platform/via-camera.c b/drivers/media/platform/via-camera.c
index b4f9d03636e3..ae6870cb8339 100644
--- a/drivers/media/platform/via-camera.c
+++ b/drivers/media/platform/via-camera.c
@@ -18,6 +18,7 @@
18#include <media/v4l2-device.h> 18#include <media/v4l2-device.h>
19#include <media/v4l2-ioctl.h> 19#include <media/v4l2-ioctl.h>
20#include <media/v4l2-ctrls.h> 20#include <media/v4l2-ctrls.h>
21#include <media/v4l2-image-sizes.h>
21#include <media/ov7670.h> 22#include <media/ov7670.h>
22#include <media/videobuf-dma-sg.h> 23#include <media/videobuf-dma-sg.h>
23#include <linux/delay.h> 24#include <linux/delay.h>
@@ -49,14 +50,6 @@ MODULE_PARM_DESC(override_serial,
49 "to force-enable the camera."); 50 "to force-enable the camera.");
50 51
51/* 52/*
52 * Basic window sizes.
53 */
54#define VGA_WIDTH 640
55#define VGA_HEIGHT 480
56#define QCIF_WIDTH 176
57#define QCIF_HEIGHT 144
58
59/*
60 * The structure describing our camera. 53 * The structure describing our camera.
61 */ 54 */
62enum viacam_opstate { S_IDLE = 0, S_RUNNING = 1 }; 55enum viacam_opstate { S_IDLE = 0, S_RUNNING = 1 };
@@ -89,7 +82,7 @@ struct via_camera {
89 * live in frame buffer memory, so we don't call them "DMA". 82 * live in frame buffer memory, so we don't call them "DMA".
90 */ 83 */
91 unsigned int cb_offsets[3]; /* offsets into fb mem */ 84 unsigned int cb_offsets[3]; /* offsets into fb mem */
92 u8 *cb_addrs[3]; /* Kernel-space addresses */ 85 u8 __iomem *cb_addrs[3]; /* Kernel-space addresses */
93 int n_cap_bufs; /* How many are we using? */ 86 int n_cap_bufs; /* How many are we using? */
94 int next_buf; 87 int next_buf;
95 struct videobuf_queue vb_queue; 88 struct videobuf_queue vb_queue;
@@ -1283,7 +1276,7 @@ static bool viacam_serial_is_enabled(void)
1283 VIACAM_SERIAL_CREG, &cbyte); 1276 VIACAM_SERIAL_CREG, &cbyte);
1284 if ((cbyte & VIACAM_SERIAL_BIT) == 0) 1277 if ((cbyte & VIACAM_SERIAL_BIT) == 0)
1285 return false; /* Not enabled */ 1278 return false; /* Not enabled */
1286 if (override_serial == 0) { 1279 if (!override_serial) {
1287 printk(KERN_NOTICE "Via camera: serial port is enabled, " \ 1280 printk(KERN_NOTICE "Via camera: serial port is enabled, " \
1288 "refusing to load.\n"); 1281 "refusing to load.\n");
1289 printk(KERN_NOTICE "Specify override_serial=1 to force " \ 1282 printk(KERN_NOTICE "Specify override_serial=1 to force " \
diff --git a/drivers/media/platform/vivi.c b/drivers/media/platform/vivi.c
deleted file mode 100644
index 80333714ffa7..000000000000
--- a/drivers/media/platform/vivi.c
+++ /dev/null
@@ -1,1542 +0,0 @@
1/*
2 * Virtual Video driver - This code emulates a real video device with v4l2 api
3 *
4 * Copyright (c) 2006 by:
5 * Mauro Carvalho Chehab <mchehab--a.t--infradead.org>
6 * Ted Walther <ted--a.t--enumera.com>
7 * John Sokol <sokol--a.t--videotechnology.com>
8 * http://v4l.videotechnology.com/
9 *
10 * Conversion to videobuf2 by Pawel Osciak & Marek Szyprowski
11 * Copyright (c) 2010 Samsung Electronics
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the BSD Licence, GNU General Public License
15 * as published by the Free Software Foundation; either version 2 of the
16 * License, or (at your option) any later version
17 */
18#include <linux/module.h>
19#include <linux/errno.h>
20#include <linux/kernel.h>
21#include <linux/init.h>
22#include <linux/sched.h>
23#include <linux/slab.h>
24#include <linux/font.h>
25#include <linux/mutex.h>
26#include <linux/videodev2.h>
27#include <linux/kthread.h>
28#include <linux/freezer.h>
29#include <media/videobuf2-vmalloc.h>
30#include <media/v4l2-device.h>
31#include <media/v4l2-ioctl.h>
32#include <media/v4l2-ctrls.h>
33#include <media/v4l2-fh.h>
34#include <media/v4l2-event.h>
35#include <media/v4l2-common.h>
36
37#define VIVI_MODULE_NAME "vivi"
38
39/* Maximum allowed frame rate
40 *
41 * Vivi will allow setting timeperframe in [1/FPS_MAX - FPS_MAX/1] range.
42 *
43 * Ideally FPS_MAX should be infinity, i.e. practically UINT_MAX, but that
44 * might hit application errors when they manipulate these values.
45 *
46 * Besides, for tpf < 1ms image-generation logic should be changed, to avoid
47 * producing frames with equal content.
48 */
49#define FPS_MAX 1000
50
51#define MAX_WIDTH 1920
52#define MAX_HEIGHT 1200
53
54#define VIVI_VERSION "0.8.1"
55
56MODULE_DESCRIPTION("Video Technology Magazine Virtual Video Capture Board");
57MODULE_AUTHOR("Mauro Carvalho Chehab, Ted Walther and John Sokol");
58MODULE_LICENSE("Dual BSD/GPL");
59MODULE_VERSION(VIVI_VERSION);
60
61static unsigned video_nr = -1;
62module_param(video_nr, uint, 0644);
63MODULE_PARM_DESC(video_nr, "videoX start number, -1 is autodetect");
64
65static unsigned n_devs = 1;
66module_param(n_devs, uint, 0644);
67MODULE_PARM_DESC(n_devs, "number of video devices to create");
68
69static unsigned debug;
70module_param(debug, uint, 0644);
71MODULE_PARM_DESC(debug, "activates debug info");
72
73/* Global font descriptor */
74static const u8 *font8x16;
75
76/* timeperframe: min/max and default */
77static const struct v4l2_fract
78 tpf_min = {.numerator = 1, .denominator = FPS_MAX},
79 tpf_max = {.numerator = FPS_MAX, .denominator = 1},
80 tpf_default = {.numerator = 1001, .denominator = 30000}; /* NTSC */
81
82#define dprintk(dev, level, fmt, arg...) \
83 v4l2_dbg(level, debug, &dev->v4l2_dev, fmt, ## arg)
84
85/* ------------------------------------------------------------------
86 Basic structures
87 ------------------------------------------------------------------*/
88
89struct vivi_fmt {
90 const char *name;
91 u32 fourcc; /* v4l2 format id */
92 u8 depth;
93 bool is_yuv;
94};
95
96static const struct vivi_fmt formats[] = {
97 {
98 .name = "4:2:2, packed, YUYV",
99 .fourcc = V4L2_PIX_FMT_YUYV,
100 .depth = 16,
101 .is_yuv = true,
102 },
103 {
104 .name = "4:2:2, packed, UYVY",
105 .fourcc = V4L2_PIX_FMT_UYVY,
106 .depth = 16,
107 .is_yuv = true,
108 },
109 {
110 .name = "4:2:2, packed, YVYU",
111 .fourcc = V4L2_PIX_FMT_YVYU,
112 .depth = 16,
113 .is_yuv = true,
114 },
115 {
116 .name = "4:2:2, packed, VYUY",
117 .fourcc = V4L2_PIX_FMT_VYUY,
118 .depth = 16,
119 .is_yuv = true,
120 },
121 {
122 .name = "RGB565 (LE)",
123 .fourcc = V4L2_PIX_FMT_RGB565, /* gggbbbbb rrrrrggg */
124 .depth = 16,
125 },
126 {
127 .name = "RGB565 (BE)",
128 .fourcc = V4L2_PIX_FMT_RGB565X, /* rrrrrggg gggbbbbb */
129 .depth = 16,
130 },
131 {
132 .name = "RGB555 (LE)",
133 .fourcc = V4L2_PIX_FMT_RGB555, /* gggbbbbb arrrrrgg */
134 .depth = 16,
135 },
136 {
137 .name = "RGB555 (BE)",
138 .fourcc = V4L2_PIX_FMT_RGB555X, /* arrrrrgg gggbbbbb */
139 .depth = 16,
140 },
141 {
142 .name = "RGB24 (LE)",
143 .fourcc = V4L2_PIX_FMT_RGB24, /* rgb */
144 .depth = 24,
145 },
146 {
147 .name = "RGB24 (BE)",
148 .fourcc = V4L2_PIX_FMT_BGR24, /* bgr */
149 .depth = 24,
150 },
151 {
152 .name = "RGB32 (LE)",
153 .fourcc = V4L2_PIX_FMT_RGB32, /* argb */
154 .depth = 32,
155 },
156 {
157 .name = "RGB32 (BE)",
158 .fourcc = V4L2_PIX_FMT_BGR32, /* bgra */
159 .depth = 32,
160 },
161};
162
163static const struct vivi_fmt *__get_format(u32 pixelformat)
164{
165 const struct vivi_fmt *fmt;
166 unsigned int k;
167
168 for (k = 0; k < ARRAY_SIZE(formats); k++) {
169 fmt = &formats[k];
170 if (fmt->fourcc == pixelformat)
171 break;
172 }
173
174 if (k == ARRAY_SIZE(formats))
175 return NULL;
176
177 return &formats[k];
178}
179
180static const struct vivi_fmt *get_format(struct v4l2_format *f)
181{
182 return __get_format(f->fmt.pix.pixelformat);
183}
184
185/* buffer for one video frame */
186struct vivi_buffer {
187 /* common v4l buffer stuff -- must be first */
188 struct vb2_buffer vb;
189 struct list_head list;
190};
191
192struct vivi_dmaqueue {
193 struct list_head active;
194
195 /* thread for generating video stream*/
196 struct task_struct *kthread;
197 wait_queue_head_t wq;
198 /* Counters to control fps rate */
199 int frame;
200 int ini_jiffies;
201};
202
203static LIST_HEAD(vivi_devlist);
204
205struct vivi_dev {
206 struct list_head vivi_devlist;
207 struct v4l2_device v4l2_dev;
208 struct v4l2_ctrl_handler ctrl_handler;
209 struct video_device vdev;
210
211 /* controls */
212 struct v4l2_ctrl *brightness;
213 struct v4l2_ctrl *contrast;
214 struct v4l2_ctrl *saturation;
215 struct v4l2_ctrl *hue;
216 struct {
217 /* autogain/gain cluster */
218 struct v4l2_ctrl *autogain;
219 struct v4l2_ctrl *gain;
220 };
221 struct v4l2_ctrl *volume;
222 struct v4l2_ctrl *alpha;
223 struct v4l2_ctrl *button;
224 struct v4l2_ctrl *boolean;
225 struct v4l2_ctrl *int32;
226 struct v4l2_ctrl *int64;
227 struct v4l2_ctrl *menu;
228 struct v4l2_ctrl *string;
229 struct v4l2_ctrl *bitmask;
230 struct v4l2_ctrl *int_menu;
231
232 spinlock_t slock;
233 struct mutex mutex;
234
235 struct vivi_dmaqueue vidq;
236
237 /* Several counters */
238 unsigned ms;
239 unsigned long jiffies;
240 unsigned button_pressed;
241
242 int mv_count; /* Controls bars movement */
243
244 /* Input Number */
245 int input;
246
247 /* video capture */
248 const struct vivi_fmt *fmt;
249 struct v4l2_fract timeperframe;
250 unsigned int width, height;
251 struct vb2_queue vb_vidq;
252 unsigned int seq_count;
253
254 u8 bars[9][3];
255 u8 line[MAX_WIDTH * 8] __attribute__((__aligned__(4)));
256 unsigned int pixelsize;
257 u8 alpha_component;
258 u32 textfg, textbg;
259};
260
261/* ------------------------------------------------------------------
262 DMA and thread functions
263 ------------------------------------------------------------------*/
264
265/* Bars and Colors should match positions */
266
267enum colors {
268 WHITE,
269 AMBER,
270 CYAN,
271 GREEN,
272 MAGENTA,
273 RED,
274 BLUE,
275 BLACK,
276 TEXT_BLACK,
277};
278
279/* R G B */
280#define COLOR_WHITE {204, 204, 204}
281#define COLOR_AMBER {208, 208, 0}
282#define COLOR_CYAN { 0, 206, 206}
283#define COLOR_GREEN { 0, 239, 0}
284#define COLOR_MAGENTA {239, 0, 239}
285#define COLOR_RED {205, 0, 0}
286#define COLOR_BLUE { 0, 0, 255}
287#define COLOR_BLACK { 0, 0, 0}
288
289struct bar_std {
290 u8 bar[9][3];
291};
292
293/* Maximum number of bars are 10 - otherwise, the input print code
294 should be modified */
295static const struct bar_std bars[] = {
296 { /* Standard ITU-R color bar sequence */
297 { COLOR_WHITE, COLOR_AMBER, COLOR_CYAN, COLOR_GREEN,
298 COLOR_MAGENTA, COLOR_RED, COLOR_BLUE, COLOR_BLACK, COLOR_BLACK }
299 }, {
300 { COLOR_WHITE, COLOR_AMBER, COLOR_BLACK, COLOR_WHITE,
301 COLOR_AMBER, COLOR_BLACK, COLOR_WHITE, COLOR_AMBER, COLOR_BLACK }
302 }, {
303 { COLOR_WHITE, COLOR_CYAN, COLOR_BLACK, COLOR_WHITE,
304 COLOR_CYAN, COLOR_BLACK, COLOR_WHITE, COLOR_CYAN, COLOR_BLACK }
305 }, {
306 { COLOR_WHITE, COLOR_GREEN, COLOR_BLACK, COLOR_WHITE,
307 COLOR_GREEN, COLOR_BLACK, COLOR_WHITE, COLOR_GREEN, COLOR_BLACK }
308 },
309};
310
311#define NUM_INPUTS ARRAY_SIZE(bars)
312
313#define TO_Y(r, g, b) \
314 (((16829 * r + 33039 * g + 6416 * b + 32768) >> 16) + 16)
315/* RGB to V(Cr) Color transform */
316#define TO_V(r, g, b) \
317 (((28784 * r - 24103 * g - 4681 * b + 32768) >> 16) + 128)
318/* RGB to U(Cb) Color transform */
319#define TO_U(r, g, b) \
320 (((-9714 * r - 19070 * g + 28784 * b + 32768) >> 16) + 128)
321
322/* precalculate color bar values to speed up rendering */
323static void precalculate_bars(struct vivi_dev *dev)
324{
325 u8 r, g, b;
326 int k, is_yuv;
327
328 for (k = 0; k < 9; k++) {
329 r = bars[dev->input].bar[k][0];
330 g = bars[dev->input].bar[k][1];
331 b = bars[dev->input].bar[k][2];
332 is_yuv = dev->fmt->is_yuv;
333
334 switch (dev->fmt->fourcc) {
335 case V4L2_PIX_FMT_RGB565:
336 case V4L2_PIX_FMT_RGB565X:
337 r >>= 3;
338 g >>= 2;
339 b >>= 3;
340 break;
341 case V4L2_PIX_FMT_RGB555:
342 case V4L2_PIX_FMT_RGB555X:
343 r >>= 3;
344 g >>= 3;
345 b >>= 3;
346 break;
347 case V4L2_PIX_FMT_YUYV:
348 case V4L2_PIX_FMT_UYVY:
349 case V4L2_PIX_FMT_YVYU:
350 case V4L2_PIX_FMT_VYUY:
351 case V4L2_PIX_FMT_RGB24:
352 case V4L2_PIX_FMT_BGR24:
353 case V4L2_PIX_FMT_RGB32:
354 case V4L2_PIX_FMT_BGR32:
355 break;
356 }
357
358 if (is_yuv) {
359 dev->bars[k][0] = TO_Y(r, g, b); /* Luma */
360 dev->bars[k][1] = TO_U(r, g, b); /* Cb */
361 dev->bars[k][2] = TO_V(r, g, b); /* Cr */
362 } else {
363 dev->bars[k][0] = r;
364 dev->bars[k][1] = g;
365 dev->bars[k][2] = b;
366 }
367 }
368}
369
370/* 'odd' is true for pixels 1, 3, 5, etc. and false for pixels 0, 2, 4, etc. */
371static void gen_twopix(struct vivi_dev *dev, u8 *buf, int colorpos, bool odd)
372{
373 u8 r_y, g_u, b_v;
374 u8 alpha = dev->alpha_component;
375 int color;
376 u8 *p;
377
378 r_y = dev->bars[colorpos][0]; /* R or precalculated Y */
379 g_u = dev->bars[colorpos][1]; /* G or precalculated U */
380 b_v = dev->bars[colorpos][2]; /* B or precalculated V */
381
382 for (color = 0; color < dev->pixelsize; color++) {
383 p = buf + color;
384
385 switch (dev->fmt->fourcc) {
386 case V4L2_PIX_FMT_YUYV:
387 switch (color) {
388 case 0:
389 *p = r_y;
390 break;
391 case 1:
392 *p = odd ? b_v : g_u;
393 break;
394 }
395 break;
396 case V4L2_PIX_FMT_UYVY:
397 switch (color) {
398 case 0:
399 *p = odd ? b_v : g_u;
400 break;
401 case 1:
402 *p = r_y;
403 break;
404 }
405 break;
406 case V4L2_PIX_FMT_YVYU:
407 switch (color) {
408 case 0:
409 *p = r_y;
410 break;
411 case 1:
412 *p = odd ? g_u : b_v;
413 break;
414 }
415 break;
416 case V4L2_PIX_FMT_VYUY:
417 switch (color) {
418 case 0:
419 *p = odd ? g_u : b_v;
420 break;
421 case 1:
422 *p = r_y;
423 break;
424 }
425 break;
426 case V4L2_PIX_FMT_RGB565:
427 switch (color) {
428 case 0:
429 *p = (g_u << 5) | b_v;
430 break;
431 case 1:
432 *p = (r_y << 3) | (g_u >> 3);
433 break;
434 }
435 break;
436 case V4L2_PIX_FMT_RGB565X:
437 switch (color) {
438 case 0:
439 *p = (r_y << 3) | (g_u >> 3);
440 break;
441 case 1:
442 *p = (g_u << 5) | b_v;
443 break;
444 }
445 break;
446 case V4L2_PIX_FMT_RGB555:
447 switch (color) {
448 case 0:
449 *p = (g_u << 5) | b_v;
450 break;
451 case 1:
452 *p = (alpha & 0x80) | (r_y << 2) | (g_u >> 3);
453 break;
454 }
455 break;
456 case V4L2_PIX_FMT_RGB555X:
457 switch (color) {
458 case 0:
459 *p = (alpha & 0x80) | (r_y << 2) | (g_u >> 3);
460 break;
461 case 1:
462 *p = (g_u << 5) | b_v;
463 break;
464 }
465 break;
466 case V4L2_PIX_FMT_RGB24:
467 switch (color) {
468 case 0:
469 *p = r_y;
470 break;
471 case 1:
472 *p = g_u;
473 break;
474 case 2:
475 *p = b_v;
476 break;
477 }
478 break;
479 case V4L2_PIX_FMT_BGR24:
480 switch (color) {
481 case 0:
482 *p = b_v;
483 break;
484 case 1:
485 *p = g_u;
486 break;
487 case 2:
488 *p = r_y;
489 break;
490 }
491 break;
492 case V4L2_PIX_FMT_RGB32:
493 switch (color) {
494 case 0:
495 *p = alpha;
496 break;
497 case 1:
498 *p = r_y;
499 break;
500 case 2:
501 *p = g_u;
502 break;
503 case 3:
504 *p = b_v;
505 break;
506 }
507 break;
508 case V4L2_PIX_FMT_BGR32:
509 switch (color) {
510 case 0:
511 *p = b_v;
512 break;
513 case 1:
514 *p = g_u;
515 break;
516 case 2:
517 *p = r_y;
518 break;
519 case 3:
520 *p = alpha;
521 break;
522 }
523 break;
524 }
525 }
526}
527
528static void precalculate_line(struct vivi_dev *dev)
529{
530 unsigned pixsize = dev->pixelsize;
531 unsigned pixsize2 = 2*pixsize;
532 int colorpos;
533 u8 *pos;
534
535 for (colorpos = 0; colorpos < 16; ++colorpos) {
536 u8 pix[8];
537 int wstart = colorpos * dev->width / 8;
538 int wend = (colorpos+1) * dev->width / 8;
539 int w;
540
541 gen_twopix(dev, &pix[0], colorpos % 8, 0);
542 gen_twopix(dev, &pix[pixsize], colorpos % 8, 1);
543
544 for (w = wstart/2*2, pos = dev->line + w*pixsize; w < wend; w += 2, pos += pixsize2)
545 memcpy(pos, pix, pixsize2);
546 }
547}
548
549/* need this to do rgb24 rendering */
550typedef struct { u16 __; u8 _; } __attribute__((packed)) x24;
551
552static void gen_text(struct vivi_dev *dev, char *basep,
553 int y, int x, char *text)
554{
555 int line;
556 unsigned int width = dev->width;
557
558 /* Checks if it is possible to show string */
559 if (y + 16 >= dev->height || x + strlen(text) * 8 >= width)
560 return;
561
562 /* Print stream time */
563#define PRINTSTR(PIXTYPE) do { \
564 PIXTYPE fg; \
565 PIXTYPE bg; \
566 memcpy(&fg, &dev->textfg, sizeof(PIXTYPE)); \
567 memcpy(&bg, &dev->textbg, sizeof(PIXTYPE)); \
568 \
569 for (line = 0; line < 16; line++) { \
570 PIXTYPE *pos = (PIXTYPE *)( basep + ((y + line) * width + x) * sizeof(PIXTYPE) ); \
571 u8 *s; \
572 \
573 for (s = text; *s; s++) { \
574 u8 chr = font8x16[*s * 16 + line]; \
575 \
576 pos[0] = (chr & (0x01 << 7) ? fg : bg); \
577 pos[1] = (chr & (0x01 << 6) ? fg : bg); \
578 pos[2] = (chr & (0x01 << 5) ? fg : bg); \
579 pos[3] = (chr & (0x01 << 4) ? fg : bg); \
580 pos[4] = (chr & (0x01 << 3) ? fg : bg); \
581 pos[5] = (chr & (0x01 << 2) ? fg : bg); \
582 pos[6] = (chr & (0x01 << 1) ? fg : bg); \
583 pos[7] = (chr & (0x01 << 0) ? fg : bg); \
584 \
585 pos += 8; \
586 } \
587 } \
588} while (0)
589
590 switch (dev->pixelsize) {
591 case 2:
592 PRINTSTR(u16); break;
593 case 4:
594 PRINTSTR(u32); break;
595 case 3:
596 PRINTSTR(x24); break;
597 }
598}
599
600static void vivi_fillbuff(struct vivi_dev *dev, struct vivi_buffer *buf)
601{
602 int stride = dev->width * dev->pixelsize;
603 int hmax = dev->height;
604 void *vbuf = vb2_plane_vaddr(&buf->vb, 0);
605 unsigned ms;
606 char str[100];
607 int h, line = 1;
608 u8 *linestart;
609 s32 gain;
610
611 if (!vbuf)
612 return;
613
614 linestart = dev->line + (dev->mv_count % dev->width) * dev->pixelsize;
615
616 for (h = 0; h < hmax; h++)
617 memcpy(vbuf + h * stride, linestart, stride);
618
619 /* Updates stream time */
620
621 gen_twopix(dev, (u8 *)&dev->textbg, TEXT_BLACK, /*odd=*/ 0);
622 gen_twopix(dev, (u8 *)&dev->textfg, WHITE, /*odd=*/ 0);
623
624 dev->ms += jiffies_to_msecs(jiffies - dev->jiffies);
625 dev->jiffies = jiffies;
626 ms = dev->ms;
627 snprintf(str, sizeof(str), " %02d:%02d:%02d:%03d ",
628 (ms / (60 * 60 * 1000)) % 24,
629 (ms / (60 * 1000)) % 60,
630 (ms / 1000) % 60,
631 ms % 1000);
632 gen_text(dev, vbuf, line++ * 16, 16, str);
633 snprintf(str, sizeof(str), " %dx%d, input %d ",
634 dev->width, dev->height, dev->input);
635 gen_text(dev, vbuf, line++ * 16, 16, str);
636
637 gain = v4l2_ctrl_g_ctrl(dev->gain);
638 mutex_lock(dev->ctrl_handler.lock);
639 snprintf(str, sizeof(str), " brightness %3d, contrast %3d, saturation %3d, hue %d ",
640 dev->brightness->cur.val,
641 dev->contrast->cur.val,
642 dev->saturation->cur.val,
643 dev->hue->cur.val);
644 gen_text(dev, vbuf, line++ * 16, 16, str);
645 snprintf(str, sizeof(str), " autogain %d, gain %3d, volume %3d, alpha 0x%02x ",
646 dev->autogain->cur.val, gain, dev->volume->cur.val,
647 dev->alpha->cur.val);
648 gen_text(dev, vbuf, line++ * 16, 16, str);
649 snprintf(str, sizeof(str), " int32 %d, int64 %lld, bitmask %08x ",
650 dev->int32->cur.val,
651 *dev->int64->p_cur.p_s64,
652 dev->bitmask->cur.val);
653 gen_text(dev, vbuf, line++ * 16, 16, str);
654 snprintf(str, sizeof(str), " boolean %d, menu %s, string \"%s\" ",
655 dev->boolean->cur.val,
656 dev->menu->qmenu[dev->menu->cur.val],
657 dev->string->p_cur.p_char);
658 gen_text(dev, vbuf, line++ * 16, 16, str);
659 snprintf(str, sizeof(str), " integer_menu %lld, value %d ",
660 dev->int_menu->qmenu_int[dev->int_menu->cur.val],
661 dev->int_menu->cur.val);
662 gen_text(dev, vbuf, line++ * 16, 16, str);
663 mutex_unlock(dev->ctrl_handler.lock);
664 if (dev->button_pressed) {
665 dev->button_pressed--;
666 snprintf(str, sizeof(str), " button pressed!");
667 gen_text(dev, vbuf, line++ * 16, 16, str);
668 }
669
670 dev->mv_count += 2;
671
672 buf->vb.v4l2_buf.field = V4L2_FIELD_INTERLACED;
673 buf->vb.v4l2_buf.sequence = dev->seq_count++;
674 v4l2_get_timestamp(&buf->vb.v4l2_buf.timestamp);
675}
676
677static void vivi_thread_tick(struct vivi_dev *dev)
678{
679 struct vivi_dmaqueue *dma_q = &dev->vidq;
680 struct vivi_buffer *buf;
681 unsigned long flags = 0;
682
683 dprintk(dev, 1, "Thread tick\n");
684
685 spin_lock_irqsave(&dev->slock, flags);
686 if (list_empty(&dma_q->active)) {
687 dprintk(dev, 1, "No active queue to serve\n");
688 spin_unlock_irqrestore(&dev->slock, flags);
689 return;
690 }
691
692 buf = list_entry(dma_q->active.next, struct vivi_buffer, list);
693 list_del(&buf->list);
694 spin_unlock_irqrestore(&dev->slock, flags);
695
696 v4l2_get_timestamp(&buf->vb.v4l2_buf.timestamp);
697
698 /* Fill buffer */
699 vivi_fillbuff(dev, buf);
700 dprintk(dev, 1, "filled buffer %p\n", buf);
701
702 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_DONE);
703 dprintk(dev, 2, "[%p/%d] done\n", buf, buf->vb.v4l2_buf.index);
704}
705
706#define frames_to_ms(dev, frames) \
707 ((frames * dev->timeperframe.numerator * 1000) / dev->timeperframe.denominator)
708
709static void vivi_sleep(struct vivi_dev *dev)
710{
711 struct vivi_dmaqueue *dma_q = &dev->vidq;
712 int timeout;
713 DECLARE_WAITQUEUE(wait, current);
714
715 dprintk(dev, 1, "%s dma_q=0x%08lx\n", __func__,
716 (unsigned long)dma_q);
717
718 add_wait_queue(&dma_q->wq, &wait);
719 if (kthread_should_stop())
720 goto stop_task;
721
722 /* Calculate time to wake up */
723 timeout = msecs_to_jiffies(frames_to_ms(dev, 1));
724
725 vivi_thread_tick(dev);
726
727 schedule_timeout_interruptible(timeout);
728
729stop_task:
730 remove_wait_queue(&dma_q->wq, &wait);
731 try_to_freeze();
732}
733
734static int vivi_thread(void *data)
735{
736 struct vivi_dev *dev = data;
737
738 dprintk(dev, 1, "thread started\n");
739
740 set_freezable();
741
742 for (;;) {
743 vivi_sleep(dev);
744
745 if (kthread_should_stop())
746 break;
747 }
748 dprintk(dev, 1, "thread: exit\n");
749 return 0;
750}
751
752static int vivi_start_generating(struct vivi_dev *dev)
753{
754 struct vivi_dmaqueue *dma_q = &dev->vidq;
755
756 dprintk(dev, 1, "%s\n", __func__);
757
758 /* Resets frame counters */
759 dev->ms = 0;
760 dev->mv_count = 0;
761 dev->jiffies = jiffies;
762
763 dma_q->frame = 0;
764 dma_q->ini_jiffies = jiffies;
765 dma_q->kthread = kthread_run(vivi_thread, dev, "%s",
766 dev->v4l2_dev.name);
767
768 if (IS_ERR(dma_q->kthread)) {
769 v4l2_err(&dev->v4l2_dev, "kernel_thread() failed\n");
770 return PTR_ERR(dma_q->kthread);
771 }
772 /* Wakes thread */
773 wake_up_interruptible(&dma_q->wq);
774
775 dprintk(dev, 1, "returning from %s\n", __func__);
776 return 0;
777}
778
779static void vivi_stop_generating(struct vivi_dev *dev)
780{
781 struct vivi_dmaqueue *dma_q = &dev->vidq;
782
783 dprintk(dev, 1, "%s\n", __func__);
784
785 /* shutdown control thread */
786 if (dma_q->kthread) {
787 kthread_stop(dma_q->kthread);
788 dma_q->kthread = NULL;
789 }
790
791 /*
792 * Typical driver might need to wait here until dma engine stops.
793 * In this case we can abort imiedetly, so it's just a noop.
794 */
795
796 /* Release all active buffers */
797 while (!list_empty(&dma_q->active)) {
798 struct vivi_buffer *buf;
799 buf = list_entry(dma_q->active.next, struct vivi_buffer, list);
800 list_del(&buf->list);
801 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
802 dprintk(dev, 2, "[%p/%d] done\n", buf, buf->vb.v4l2_buf.index);
803 }
804}
805/* ------------------------------------------------------------------
806 Videobuf operations
807 ------------------------------------------------------------------*/
808static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *fmt,
809 unsigned int *nbuffers, unsigned int *nplanes,
810 unsigned int sizes[], void *alloc_ctxs[])
811{
812 struct vivi_dev *dev = vb2_get_drv_priv(vq);
813 unsigned long size;
814
815 size = dev->width * dev->height * dev->pixelsize;
816 if (fmt) {
817 if (fmt->fmt.pix.sizeimage < size)
818 return -EINVAL;
819 size = fmt->fmt.pix.sizeimage;
820 /* check against insane over 8K resolution buffers */
821 if (size > 7680 * 4320 * dev->pixelsize)
822 return -EINVAL;
823 }
824
825 *nplanes = 1;
826
827 sizes[0] = size;
828
829 /*
830 * videobuf2-vmalloc allocator is context-less so no need to set
831 * alloc_ctxs array.
832 */
833
834 dprintk(dev, 1, "%s, count=%d, size=%ld\n", __func__,
835 *nbuffers, size);
836
837 return 0;
838}
839
840static int buffer_prepare(struct vb2_buffer *vb)
841{
842 struct vivi_dev *dev = vb2_get_drv_priv(vb->vb2_queue);
843 struct vivi_buffer *buf = container_of(vb, struct vivi_buffer, vb);
844 unsigned long size;
845
846 dprintk(dev, 1, "%s, field=%d\n", __func__, vb->v4l2_buf.field);
847
848 BUG_ON(NULL == dev->fmt);
849
850 /*
851 * Theses properties only change when queue is idle, see s_fmt.
852 * The below checks should not be performed here, on each
853 * buffer_prepare (i.e. on each qbuf). Most of the code in this function
854 * should thus be moved to buffer_init and s_fmt.
855 */
856 if (dev->width < 48 || dev->width > MAX_WIDTH ||
857 dev->height < 32 || dev->height > MAX_HEIGHT)
858 return -EINVAL;
859
860 size = dev->width * dev->height * dev->pixelsize;
861 if (vb2_plane_size(vb, 0) < size) {
862 dprintk(dev, 1, "%s data will not fit into plane (%lu < %lu)\n",
863 __func__, vb2_plane_size(vb, 0), size);
864 return -EINVAL;
865 }
866
867 vb2_set_plane_payload(&buf->vb, 0, size);
868
869 precalculate_bars(dev);
870 precalculate_line(dev);
871
872 return 0;
873}
874
875static void buffer_queue(struct vb2_buffer *vb)
876{
877 struct vivi_dev *dev = vb2_get_drv_priv(vb->vb2_queue);
878 struct vivi_buffer *buf = container_of(vb, struct vivi_buffer, vb);
879 struct vivi_dmaqueue *vidq = &dev->vidq;
880 unsigned long flags = 0;
881
882 dprintk(dev, 1, "%s\n", __func__);
883
884 spin_lock_irqsave(&dev->slock, flags);
885 list_add_tail(&buf->list, &vidq->active);
886 spin_unlock_irqrestore(&dev->slock, flags);
887}
888
889static int start_streaming(struct vb2_queue *vq, unsigned int count)
890{
891 struct vivi_dev *dev = vb2_get_drv_priv(vq);
892 int err;
893
894 dprintk(dev, 1, "%s\n", __func__);
895 dev->seq_count = 0;
896 err = vivi_start_generating(dev);
897 if (err) {
898 struct vivi_buffer *buf, *tmp;
899
900 list_for_each_entry_safe(buf, tmp, &dev->vidq.active, list) {
901 list_del(&buf->list);
902 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_QUEUED);
903 }
904 }
905 return err;
906}
907
908/* abort streaming and wait for last buffer */
909static void stop_streaming(struct vb2_queue *vq)
910{
911 struct vivi_dev *dev = vb2_get_drv_priv(vq);
912 dprintk(dev, 1, "%s\n", __func__);
913 vivi_stop_generating(dev);
914}
915
916static void vivi_lock(struct vb2_queue *vq)
917{
918 struct vivi_dev *dev = vb2_get_drv_priv(vq);
919 mutex_lock(&dev->mutex);
920}
921
922static void vivi_unlock(struct vb2_queue *vq)
923{
924 struct vivi_dev *dev = vb2_get_drv_priv(vq);
925 mutex_unlock(&dev->mutex);
926}
927
928
929static const struct vb2_ops vivi_video_qops = {
930 .queue_setup = queue_setup,
931 .buf_prepare = buffer_prepare,
932 .buf_queue = buffer_queue,
933 .start_streaming = start_streaming,
934 .stop_streaming = stop_streaming,
935 .wait_prepare = vivi_unlock,
936 .wait_finish = vivi_lock,
937};
938
939/* ------------------------------------------------------------------
940 IOCTL vidioc handling
941 ------------------------------------------------------------------*/
942static int vidioc_querycap(struct file *file, void *priv,
943 struct v4l2_capability *cap)
944{
945 struct vivi_dev *dev = video_drvdata(file);
946
947 strcpy(cap->driver, "vivi");
948 strcpy(cap->card, "vivi");
949 snprintf(cap->bus_info, sizeof(cap->bus_info),
950 "platform:%s", dev->v4l2_dev.name);
951 cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING |
952 V4L2_CAP_READWRITE;
953 cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
954 return 0;
955}
956
957static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
958 struct v4l2_fmtdesc *f)
959{
960 const struct vivi_fmt *fmt;
961
962 if (f->index >= ARRAY_SIZE(formats))
963 return -EINVAL;
964
965 fmt = &formats[f->index];
966
967 strlcpy(f->description, fmt->name, sizeof(f->description));
968 f->pixelformat = fmt->fourcc;
969 return 0;
970}
971
972static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
973 struct v4l2_format *f)
974{
975 struct vivi_dev *dev = video_drvdata(file);
976
977 f->fmt.pix.width = dev->width;
978 f->fmt.pix.height = dev->height;
979 f->fmt.pix.field = V4L2_FIELD_INTERLACED;
980 f->fmt.pix.pixelformat = dev->fmt->fourcc;
981 f->fmt.pix.bytesperline =
982 (f->fmt.pix.width * dev->fmt->depth) >> 3;
983 f->fmt.pix.sizeimage =
984 f->fmt.pix.height * f->fmt.pix.bytesperline;
985 if (dev->fmt->is_yuv)
986 f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
987 else
988 f->fmt.pix.colorspace = V4L2_COLORSPACE_SRGB;
989 return 0;
990}
991
992static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
993 struct v4l2_format *f)
994{
995 struct vivi_dev *dev = video_drvdata(file);
996 const struct vivi_fmt *fmt;
997
998 fmt = get_format(f);
999 if (!fmt) {
1000 dprintk(dev, 1, "Fourcc format (0x%08x) unknown.\n",
1001 f->fmt.pix.pixelformat);
1002 f->fmt.pix.pixelformat = V4L2_PIX_FMT_YUYV;
1003 fmt = get_format(f);
1004 }
1005
1006 f->fmt.pix.field = V4L2_FIELD_INTERLACED;
1007 v4l_bound_align_image(&f->fmt.pix.width, 48, MAX_WIDTH, 2,
1008 &f->fmt.pix.height, 32, MAX_HEIGHT, 0, 0);
1009 f->fmt.pix.bytesperline =
1010 (f->fmt.pix.width * fmt->depth) >> 3;
1011 f->fmt.pix.sizeimage =
1012 f->fmt.pix.height * f->fmt.pix.bytesperline;
1013 if (fmt->is_yuv)
1014 f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
1015 else
1016 f->fmt.pix.colorspace = V4L2_COLORSPACE_SRGB;
1017 return 0;
1018}
1019
1020static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
1021 struct v4l2_format *f)
1022{
1023 struct vivi_dev *dev = video_drvdata(file);
1024 struct vb2_queue *q = &dev->vb_vidq;
1025
1026 int ret = vidioc_try_fmt_vid_cap(file, priv, f);
1027 if (ret < 0)
1028 return ret;
1029
1030 if (vb2_is_busy(q)) {
1031 dprintk(dev, 1, "%s device busy\n", __func__);
1032 return -EBUSY;
1033 }
1034
1035 dev->fmt = get_format(f);
1036 dev->pixelsize = dev->fmt->depth / 8;
1037 dev->width = f->fmt.pix.width;
1038 dev->height = f->fmt.pix.height;
1039
1040 return 0;
1041}
1042
1043static int vidioc_enum_framesizes(struct file *file, void *fh,
1044 struct v4l2_frmsizeenum *fsize)
1045{
1046 static const struct v4l2_frmsize_stepwise sizes = {
1047 48, MAX_WIDTH, 4,
1048 32, MAX_HEIGHT, 1
1049 };
1050 int i;
1051
1052 if (fsize->index)
1053 return -EINVAL;
1054 for (i = 0; i < ARRAY_SIZE(formats); i++)
1055 if (formats[i].fourcc == fsize->pixel_format)
1056 break;
1057 if (i == ARRAY_SIZE(formats))
1058 return -EINVAL;
1059 fsize->type = V4L2_FRMSIZE_TYPE_STEPWISE;
1060 fsize->stepwise = sizes;
1061 return 0;
1062}
1063
1064/* only one input in this sample driver */
1065static int vidioc_enum_input(struct file *file, void *priv,
1066 struct v4l2_input *inp)
1067{
1068 if (inp->index >= NUM_INPUTS)
1069 return -EINVAL;
1070
1071 inp->type = V4L2_INPUT_TYPE_CAMERA;
1072 sprintf(inp->name, "Camera %u", inp->index);
1073 return 0;
1074}
1075
1076static int vidioc_g_input(struct file *file, void *priv, unsigned int *i)
1077{
1078 struct vivi_dev *dev = video_drvdata(file);
1079
1080 *i = dev->input;
1081 return 0;
1082}
1083
1084static int vidioc_s_input(struct file *file, void *priv, unsigned int i)
1085{
1086 struct vivi_dev *dev = video_drvdata(file);
1087
1088 if (i >= NUM_INPUTS)
1089 return -EINVAL;
1090
1091 if (i == dev->input)
1092 return 0;
1093
1094 dev->input = i;
1095 /*
1096 * Modify the brightness range depending on the input.
1097 * This makes it easy to use vivi to test if applications can
1098 * handle control range modifications and is also how this is
1099 * typically used in practice as different inputs may be hooked
1100 * up to different receivers with different control ranges.
1101 */
1102 v4l2_ctrl_modify_range(dev->brightness,
1103 128 * i, 255 + 128 * i, 1, 127 + 128 * i);
1104 precalculate_bars(dev);
1105 precalculate_line(dev);
1106 return 0;
1107}
1108
1109/* timeperframe is arbitrary and continuous */
1110static int vidioc_enum_frameintervals(struct file *file, void *priv,
1111 struct v4l2_frmivalenum *fival)
1112{
1113 const struct vivi_fmt *fmt;
1114
1115 if (fival->index)
1116 return -EINVAL;
1117
1118 fmt = __get_format(fival->pixel_format);
1119 if (!fmt)
1120 return -EINVAL;
1121
1122 /* check for valid width/height */
1123 if (fival->width < 48 || fival->width > MAX_WIDTH || (fival->width & 3))
1124 return -EINVAL;
1125 if (fival->height < 32 || fival->height > MAX_HEIGHT)
1126 return -EINVAL;
1127
1128 fival->type = V4L2_FRMIVAL_TYPE_CONTINUOUS;
1129
1130 /* fill in stepwise (step=1.0 is required by V4L2 spec) */
1131 fival->stepwise.min = tpf_min;
1132 fival->stepwise.max = tpf_max;
1133 fival->stepwise.step = (struct v4l2_fract) {1, 1};
1134
1135 return 0;
1136}
1137
1138static int vidioc_g_parm(struct file *file, void *priv,
1139 struct v4l2_streamparm *parm)
1140{
1141 struct vivi_dev *dev = video_drvdata(file);
1142
1143 if (parm->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
1144 return -EINVAL;
1145
1146 parm->parm.capture.capability = V4L2_CAP_TIMEPERFRAME;
1147 parm->parm.capture.timeperframe = dev->timeperframe;
1148 parm->parm.capture.readbuffers = 1;
1149 return 0;
1150}
1151
1152#define FRACT_CMP(a, OP, b) \
1153 ((u64)(a).numerator * (b).denominator OP (u64)(b).numerator * (a).denominator)
1154
1155static int vidioc_s_parm(struct file *file, void *priv,
1156 struct v4l2_streamparm *parm)
1157{
1158 struct vivi_dev *dev = video_drvdata(file);
1159 struct v4l2_fract tpf;
1160
1161 if (parm->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
1162 return -EINVAL;
1163
1164 tpf = parm->parm.capture.timeperframe;
1165
1166 /* tpf: {*, 0} resets timing; clip to [min, max]*/
1167 tpf = tpf.denominator ? tpf : tpf_default;
1168 tpf = FRACT_CMP(tpf, <, tpf_min) ? tpf_min : tpf;
1169 tpf = FRACT_CMP(tpf, >, tpf_max) ? tpf_max : tpf;
1170
1171 dev->timeperframe = tpf;
1172 parm->parm.capture.timeperframe = tpf;
1173 parm->parm.capture.readbuffers = 1;
1174 return 0;
1175}
1176
1177/* --- controls ---------------------------------------------- */
1178
1179static int vivi_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
1180{
1181 struct vivi_dev *dev = container_of(ctrl->handler, struct vivi_dev, ctrl_handler);
1182
1183 if (ctrl == dev->autogain)
1184 dev->gain->val = jiffies & 0xff;
1185 return 0;
1186}
1187
1188static int vivi_s_ctrl(struct v4l2_ctrl *ctrl)
1189{
1190 struct vivi_dev *dev = container_of(ctrl->handler, struct vivi_dev, ctrl_handler);
1191
1192 switch (ctrl->id) {
1193 case V4L2_CID_ALPHA_COMPONENT:
1194 dev->alpha_component = ctrl->val;
1195 break;
1196 default:
1197 if (ctrl == dev->button)
1198 dev->button_pressed = 30;
1199 break;
1200 }
1201 return 0;
1202}
1203
1204/* ------------------------------------------------------------------
1205 File operations for the device
1206 ------------------------------------------------------------------*/
1207
1208static const struct v4l2_ctrl_ops vivi_ctrl_ops = {
1209 .g_volatile_ctrl = vivi_g_volatile_ctrl,
1210 .s_ctrl = vivi_s_ctrl,
1211};
1212
1213#define VIVI_CID_CUSTOM_BASE (V4L2_CID_USER_BASE | 0xf000)
1214
1215static const struct v4l2_ctrl_config vivi_ctrl_button = {
1216 .ops = &vivi_ctrl_ops,
1217 .id = VIVI_CID_CUSTOM_BASE + 0,
1218 .name = "Button",
1219 .type = V4L2_CTRL_TYPE_BUTTON,
1220};
1221
1222static const struct v4l2_ctrl_config vivi_ctrl_boolean = {
1223 .ops = &vivi_ctrl_ops,
1224 .id = VIVI_CID_CUSTOM_BASE + 1,
1225 .name = "Boolean",
1226 .type = V4L2_CTRL_TYPE_BOOLEAN,
1227 .min = 0,
1228 .max = 1,
1229 .step = 1,
1230 .def = 1,
1231};
1232
1233static const struct v4l2_ctrl_config vivi_ctrl_int32 = {
1234 .ops = &vivi_ctrl_ops,
1235 .id = VIVI_CID_CUSTOM_BASE + 2,
1236 .name = "Integer 32 Bits",
1237 .type = V4L2_CTRL_TYPE_INTEGER,
1238 .min = -0x80000000LL,
1239 .max = 0x7fffffff,
1240 .step = 1,
1241};
1242
1243static const struct v4l2_ctrl_config vivi_ctrl_int64 = {
1244 .ops = &vivi_ctrl_ops,
1245 .id = VIVI_CID_CUSTOM_BASE + 3,
1246 .name = "Integer 64 Bits",
1247 .type = V4L2_CTRL_TYPE_INTEGER64,
1248 .min = LLONG_MIN,
1249 .max = LLONG_MAX,
1250 .step = 1,
1251};
1252
1253static const char * const vivi_ctrl_menu_strings[] = {
1254 "Menu Item 0 (Skipped)",
1255 "Menu Item 1",
1256 "Menu Item 2 (Skipped)",
1257 "Menu Item 3",
1258 "Menu Item 4",
1259 "Menu Item 5 (Skipped)",
1260 NULL,
1261};
1262
1263static const struct v4l2_ctrl_config vivi_ctrl_menu = {
1264 .ops = &vivi_ctrl_ops,
1265 .id = VIVI_CID_CUSTOM_BASE + 4,
1266 .name = "Menu",
1267 .type = V4L2_CTRL_TYPE_MENU,
1268 .min = 1,
1269 .max = 4,
1270 .def = 3,
1271 .menu_skip_mask = 0x04,
1272 .qmenu = vivi_ctrl_menu_strings,
1273};
1274
1275static const struct v4l2_ctrl_config vivi_ctrl_string = {
1276 .ops = &vivi_ctrl_ops,
1277 .id = VIVI_CID_CUSTOM_BASE + 5,
1278 .name = "String",
1279 .type = V4L2_CTRL_TYPE_STRING,
1280 .min = 2,
1281 .max = 4,
1282 .step = 1,
1283};
1284
1285static const struct v4l2_ctrl_config vivi_ctrl_bitmask = {
1286 .ops = &vivi_ctrl_ops,
1287 .id = VIVI_CID_CUSTOM_BASE + 6,
1288 .name = "Bitmask",
1289 .type = V4L2_CTRL_TYPE_BITMASK,
1290 .def = 0x80002000,
1291 .min = 0,
1292 .max = 0x80402010,
1293 .step = 0,
1294};
1295
1296static const s64 vivi_ctrl_int_menu_values[] = {
1297 1, 1, 2, 3, 5, 8, 13, 21, 42,
1298};
1299
1300static const struct v4l2_ctrl_config vivi_ctrl_int_menu = {
1301 .ops = &vivi_ctrl_ops,
1302 .id = VIVI_CID_CUSTOM_BASE + 7,
1303 .name = "Integer menu",
1304 .type = V4L2_CTRL_TYPE_INTEGER_MENU,
1305 .min = 1,
1306 .max = 8,
1307 .def = 4,
1308 .menu_skip_mask = 0x02,
1309 .qmenu_int = vivi_ctrl_int_menu_values,
1310};
1311
1312static const struct v4l2_file_operations vivi_fops = {
1313 .owner = THIS_MODULE,
1314 .open = v4l2_fh_open,
1315 .release = vb2_fop_release,
1316 .read = vb2_fop_read,
1317 .poll = vb2_fop_poll,
1318 .unlocked_ioctl = video_ioctl2, /* V4L2 ioctl handler */
1319 .mmap = vb2_fop_mmap,
1320};
1321
1322static const struct v4l2_ioctl_ops vivi_ioctl_ops = {
1323 .vidioc_querycap = vidioc_querycap,
1324 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
1325 .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
1326 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
1327 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
1328 .vidioc_enum_framesizes = vidioc_enum_framesizes,
1329 .vidioc_reqbufs = vb2_ioctl_reqbufs,
1330 .vidioc_create_bufs = vb2_ioctl_create_bufs,
1331 .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
1332 .vidioc_querybuf = vb2_ioctl_querybuf,
1333 .vidioc_qbuf = vb2_ioctl_qbuf,
1334 .vidioc_dqbuf = vb2_ioctl_dqbuf,
1335 .vidioc_enum_input = vidioc_enum_input,
1336 .vidioc_g_input = vidioc_g_input,
1337 .vidioc_s_input = vidioc_s_input,
1338 .vidioc_enum_frameintervals = vidioc_enum_frameintervals,
1339 .vidioc_g_parm = vidioc_g_parm,
1340 .vidioc_s_parm = vidioc_s_parm,
1341 .vidioc_streamon = vb2_ioctl_streamon,
1342 .vidioc_streamoff = vb2_ioctl_streamoff,
1343 .vidioc_log_status = v4l2_ctrl_log_status,
1344 .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
1345 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
1346};
1347
1348static const struct video_device vivi_template = {
1349 .name = "vivi",
1350 .fops = &vivi_fops,
1351 .ioctl_ops = &vivi_ioctl_ops,
1352 .release = video_device_release_empty,
1353};
1354
1355/* -----------------------------------------------------------------
1356 Initialization and module stuff
1357 ------------------------------------------------------------------*/
1358
1359static int vivi_release(void)
1360{
1361 struct vivi_dev *dev;
1362 struct list_head *list;
1363
1364 while (!list_empty(&vivi_devlist)) {
1365 list = vivi_devlist.next;
1366 list_del(list);
1367 dev = list_entry(list, struct vivi_dev, vivi_devlist);
1368
1369 v4l2_info(&dev->v4l2_dev, "unregistering %s\n",
1370 video_device_node_name(&dev->vdev));
1371 video_unregister_device(&dev->vdev);
1372 v4l2_device_unregister(&dev->v4l2_dev);
1373 v4l2_ctrl_handler_free(&dev->ctrl_handler);
1374 kfree(dev);
1375 }
1376
1377 return 0;
1378}
1379
1380static int __init vivi_create_instance(int inst)
1381{
1382 struct vivi_dev *dev;
1383 struct video_device *vfd;
1384 struct v4l2_ctrl_handler *hdl;
1385 struct vb2_queue *q;
1386 int ret;
1387
1388 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1389 if (!dev)
1390 return -ENOMEM;
1391
1392 snprintf(dev->v4l2_dev.name, sizeof(dev->v4l2_dev.name),
1393 "%s-%03d", VIVI_MODULE_NAME, inst);
1394 ret = v4l2_device_register(NULL, &dev->v4l2_dev);
1395 if (ret)
1396 goto free_dev;
1397
1398 dev->fmt = &formats[0];
1399 dev->timeperframe = tpf_default;
1400 dev->width = 640;
1401 dev->height = 480;
1402 dev->pixelsize = dev->fmt->depth / 8;
1403 hdl = &dev->ctrl_handler;
1404 v4l2_ctrl_handler_init(hdl, 11);
1405 dev->volume = v4l2_ctrl_new_std(hdl, &vivi_ctrl_ops,
1406 V4L2_CID_AUDIO_VOLUME, 0, 255, 1, 200);
1407 dev->brightness = v4l2_ctrl_new_std(hdl, &vivi_ctrl_ops,
1408 V4L2_CID_BRIGHTNESS, 0, 255, 1, 127);
1409 dev->contrast = v4l2_ctrl_new_std(hdl, &vivi_ctrl_ops,
1410 V4L2_CID_CONTRAST, 0, 255, 1, 16);
1411 dev->saturation = v4l2_ctrl_new_std(hdl, &vivi_ctrl_ops,
1412 V4L2_CID_SATURATION, 0, 255, 1, 127);
1413 dev->hue = v4l2_ctrl_new_std(hdl, &vivi_ctrl_ops,
1414 V4L2_CID_HUE, -128, 127, 1, 0);
1415 dev->autogain = v4l2_ctrl_new_std(hdl, &vivi_ctrl_ops,
1416 V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
1417 dev->gain = v4l2_ctrl_new_std(hdl, &vivi_ctrl_ops,
1418 V4L2_CID_GAIN, 0, 255, 1, 100);
1419 dev->alpha = v4l2_ctrl_new_std(hdl, &vivi_ctrl_ops,
1420 V4L2_CID_ALPHA_COMPONENT, 0, 255, 1, 0);
1421 dev->button = v4l2_ctrl_new_custom(hdl, &vivi_ctrl_button, NULL);
1422 dev->int32 = v4l2_ctrl_new_custom(hdl, &vivi_ctrl_int32, NULL);
1423 dev->int64 = v4l2_ctrl_new_custom(hdl, &vivi_ctrl_int64, NULL);
1424 dev->boolean = v4l2_ctrl_new_custom(hdl, &vivi_ctrl_boolean, NULL);
1425 dev->menu = v4l2_ctrl_new_custom(hdl, &vivi_ctrl_menu, NULL);
1426 dev->string = v4l2_ctrl_new_custom(hdl, &vivi_ctrl_string, NULL);
1427 dev->bitmask = v4l2_ctrl_new_custom(hdl, &vivi_ctrl_bitmask, NULL);
1428 dev->int_menu = v4l2_ctrl_new_custom(hdl, &vivi_ctrl_int_menu, NULL);
1429 if (hdl->error) {
1430 ret = hdl->error;
1431 goto unreg_dev;
1432 }
1433 v4l2_ctrl_auto_cluster(2, &dev->autogain, 0, true);
1434 dev->v4l2_dev.ctrl_handler = hdl;
1435
1436 /* initialize locks */
1437 spin_lock_init(&dev->slock);
1438
1439 /* initialize queue */
1440 q = &dev->vb_vidq;
1441 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1442 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1443 q->drv_priv = dev;
1444 q->buf_struct_size = sizeof(struct vivi_buffer);
1445 q->ops = &vivi_video_qops;
1446 q->mem_ops = &vb2_vmalloc_memops;
1447 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1448
1449 ret = vb2_queue_init(q);
1450 if (ret)
1451 goto unreg_dev;
1452
1453 mutex_init(&dev->mutex);
1454
1455 /* init video dma queues */
1456 INIT_LIST_HEAD(&dev->vidq.active);
1457 init_waitqueue_head(&dev->vidq.wq);
1458
1459 vfd = &dev->vdev;
1460 *vfd = vivi_template;
1461 vfd->debug = debug;
1462 vfd->v4l2_dev = &dev->v4l2_dev;
1463 vfd->queue = q;
1464
1465 /*
1466 * Provide a mutex to v4l2 core. It will be used to protect
1467 * all fops and v4l2 ioctls.
1468 */
1469 vfd->lock = &dev->mutex;
1470 video_set_drvdata(vfd, dev);
1471
1472 ret = video_register_device(vfd, VFL_TYPE_GRABBER, video_nr);
1473 if (ret < 0)
1474 goto unreg_dev;
1475
1476 /* Now that everything is fine, let's add it to device list */
1477 list_add_tail(&dev->vivi_devlist, &vivi_devlist);
1478
1479 v4l2_info(&dev->v4l2_dev, "V4L2 device registered as %s\n",
1480 video_device_node_name(vfd));
1481 return 0;
1482
1483unreg_dev:
1484 v4l2_ctrl_handler_free(hdl);
1485 v4l2_device_unregister(&dev->v4l2_dev);
1486free_dev:
1487 kfree(dev);
1488 return ret;
1489}
1490
1491/* This routine allocates from 1 to n_devs virtual drivers.
1492
1493 The real maximum number of virtual drivers will depend on how many drivers
1494 will succeed. This is limited to the maximum number of devices that
1495 videodev supports, which is equal to VIDEO_NUM_DEVICES.
1496 */
1497static int __init vivi_init(void)
1498{
1499 const struct font_desc *font = find_font("VGA8x16");
1500 int ret = 0, i;
1501
1502 if (font == NULL) {
1503 printk(KERN_ERR "vivi: could not find font\n");
1504 return -ENODEV;
1505 }
1506 font8x16 = font->data;
1507
1508 if (n_devs <= 0)
1509 n_devs = 1;
1510
1511 for (i = 0; i < n_devs; i++) {
1512 ret = vivi_create_instance(i);
1513 if (ret) {
1514 /* If some instantiations succeeded, keep driver */
1515 if (i)
1516 ret = 0;
1517 break;
1518 }
1519 }
1520
1521 if (ret < 0) {
1522 printk(KERN_ERR "vivi: error %d while loading driver\n", ret);
1523 return ret;
1524 }
1525
1526 printk(KERN_INFO "Video Technology Magazine Virtual Video "
1527 "Capture Board ver %s successfully loaded.\n",
1528 VIVI_VERSION);
1529
1530 /* n_devs will reflect the actual number of allocated devices */
1531 n_devs = i;
1532
1533 return ret;
1534}
1535
1536static void __exit vivi_exit(void)
1537{
1538 vivi_release();
1539}
1540
1541module_init(vivi_init);
1542module_exit(vivi_exit);
diff --git a/drivers/media/platform/vivid/Kconfig b/drivers/media/platform/vivid/Kconfig
new file mode 100644
index 000000000000..d71139a2ae00
--- /dev/null
+++ b/drivers/media/platform/vivid/Kconfig
@@ -0,0 +1,19 @@
1config VIDEO_VIVID
2 tristate "Virtual Video Test Driver"
3 depends on VIDEO_DEV && VIDEO_V4L2 && !SPARC32 && !SPARC64
4 select FONT_SUPPORT
5 select FONT_8x16
6 select VIDEOBUF2_VMALLOC
7 default n
8 ---help---
9 Enables a virtual video driver. This driver emulates a webcam,
10 TV, S-Video and HDMI capture hardware, including VBI support for
11 the SDTV inputs. Also video output, VBI output, radio receivers,
12 transmitters and software defined radio capture is emulated.
13
14 It is highly configurable and is ideal for testing applications.
15 Error injection is supported to test rare errors that are hard
16 to reproduce in real hardware.
17
18 Say Y here if you want to test video apps or debug V4L devices.
19 When in doubt, say N.
diff --git a/drivers/media/platform/vivid/Makefile b/drivers/media/platform/vivid/Makefile
new file mode 100644
index 000000000000..756fc12851df
--- /dev/null
+++ b/drivers/media/platform/vivid/Makefile
@@ -0,0 +1,6 @@
1vivid-objs := vivid-core.o vivid-ctrls.o vivid-vid-common.o vivid-vbi-gen.o \
2 vivid-vid-cap.o vivid-vid-out.o vivid-kthread-cap.o vivid-kthread-out.o \
3 vivid-radio-rx.o vivid-radio-tx.o vivid-radio-common.o \
4 vivid-rds-gen.o vivid-sdr-cap.o vivid-vbi-cap.o vivid-vbi-out.o \
5 vivid-osd.o vivid-tpg.o vivid-tpg-colors.o
6obj-$(CONFIG_VIDEO_VIVID) += vivid.o
diff --git a/drivers/media/platform/vivid/vivid-core.c b/drivers/media/platform/vivid/vivid-core.c
new file mode 100644
index 000000000000..2c61a62ab48b
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-core.c
@@ -0,0 +1,1390 @@
1/*
2 * vivid-core.c - A Virtual Video Test Driver, core initialization
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#include <linux/module.h>
21#include <linux/errno.h>
22#include <linux/kernel.h>
23#include <linux/init.h>
24#include <linux/sched.h>
25#include <linux/slab.h>
26#include <linux/vmalloc.h>
27#include <linux/font.h>
28#include <linux/mutex.h>
29#include <linux/videodev2.h>
30#include <linux/v4l2-dv-timings.h>
31#include <media/videobuf2-vmalloc.h>
32#include <media/v4l2-dv-timings.h>
33#include <media/v4l2-ioctl.h>
34#include <media/v4l2-fh.h>
35#include <media/v4l2-event.h>
36
37#include "vivid-core.h"
38#include "vivid-vid-common.h"
39#include "vivid-vid-cap.h"
40#include "vivid-vid-out.h"
41#include "vivid-radio-common.h"
42#include "vivid-radio-rx.h"
43#include "vivid-radio-tx.h"
44#include "vivid-sdr-cap.h"
45#include "vivid-vbi-cap.h"
46#include "vivid-vbi-out.h"
47#include "vivid-osd.h"
48#include "vivid-ctrls.h"
49
50#define VIVID_MODULE_NAME "vivid"
51
52/* The maximum number of vivid devices */
53#define VIVID_MAX_DEVS 64
54
55MODULE_DESCRIPTION("Virtual Video Test Driver");
56MODULE_AUTHOR("Hans Verkuil");
57MODULE_LICENSE("GPL");
58
59static unsigned n_devs = 1;
60module_param(n_devs, uint, 0444);
61MODULE_PARM_DESC(n_devs, " number of driver instances to create");
62
63static int vid_cap_nr[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = -1 };
64module_param_array(vid_cap_nr, int, NULL, 0444);
65MODULE_PARM_DESC(vid_cap_nr, " videoX start number, -1 is autodetect");
66
67static int vid_out_nr[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = -1 };
68module_param_array(vid_out_nr, int, NULL, 0444);
69MODULE_PARM_DESC(vid_out_nr, " videoX start number, -1 is autodetect");
70
71static int vbi_cap_nr[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = -1 };
72module_param_array(vbi_cap_nr, int, NULL, 0444);
73MODULE_PARM_DESC(vbi_cap_nr, " vbiX start number, -1 is autodetect");
74
75static int vbi_out_nr[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = -1 };
76module_param_array(vbi_out_nr, int, NULL, 0444);
77MODULE_PARM_DESC(vbi_out_nr, " vbiX start number, -1 is autodetect");
78
79static int sdr_cap_nr[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = -1 };
80module_param_array(sdr_cap_nr, int, NULL, 0444);
81MODULE_PARM_DESC(sdr_cap_nr, " swradioX start number, -1 is autodetect");
82
83static int radio_rx_nr[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = -1 };
84module_param_array(radio_rx_nr, int, NULL, 0444);
85MODULE_PARM_DESC(radio_rx_nr, " radioX start number, -1 is autodetect");
86
87static int radio_tx_nr[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = -1 };
88module_param_array(radio_tx_nr, int, NULL, 0444);
89MODULE_PARM_DESC(radio_tx_nr, " radioX start number, -1 is autodetect");
90
91static int ccs_cap_mode[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = -1 };
92module_param_array(ccs_cap_mode, int, NULL, 0444);
93MODULE_PARM_DESC(ccs_cap_mode, " capture crop/compose/scale mode:\n"
94 "\t\t bit 0=crop, 1=compose, 2=scale,\n"
95 "\t\t -1=user-controlled (default)");
96
97static int ccs_out_mode[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = -1 };
98module_param_array(ccs_out_mode, int, NULL, 0444);
99MODULE_PARM_DESC(ccs_out_mode, " output crop/compose/scale mode:\n"
100 "\t\t bit 0=crop, 1=compose, 2=scale,\n"
101 "\t\t -1=user-controlled (default)");
102
103static unsigned multiplanar[VIVID_MAX_DEVS];
104module_param_array(multiplanar, uint, NULL, 0444);
105MODULE_PARM_DESC(multiplanar, " 0 (default) is alternating single and multiplanar devices,\n"
106 "\t\t 1 is single planar devices,\n"
107 "\t\t 2 is multiplanar devices");
108
109/* Default: video + vbi-cap (raw and sliced) + radio rx + radio tx + sdr + vbi-out + vid-out */
110static unsigned node_types[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = 0x1d3d };
111module_param_array(node_types, uint, NULL, 0444);
112MODULE_PARM_DESC(node_types, " node types, default is 0x1d3d. Bitmask with the following meaning:\n"
113 "\t\t bit 0: Video Capture node\n"
114 "\t\t bit 2-3: VBI Capture node: 0 = none, 1 = raw vbi, 2 = sliced vbi, 3 = both\n"
115 "\t\t bit 4: Radio Receiver node\n"
116 "\t\t bit 5: Software Defined Radio Receiver node\n"
117 "\t\t bit 8: Video Output node\n"
118 "\t\t bit 10-11: VBI Output node: 0 = none, 1 = raw vbi, 2 = sliced vbi, 3 = both\n"
119 "\t\t bit 12: Radio Transmitter node\n"
120 "\t\t bit 16: Framebuffer for testing overlays");
121
122/* Default: 4 inputs */
123static unsigned num_inputs[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = 4 };
124module_param_array(num_inputs, uint, NULL, 0444);
125MODULE_PARM_DESC(num_inputs, " number of inputs, default is 4");
126
127/* Default: input 0 = WEBCAM, 1 = TV, 2 = SVID, 3 = HDMI */
128static unsigned input_types[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = 0xe4 };
129module_param_array(input_types, uint, NULL, 0444);
130MODULE_PARM_DESC(input_types, " input types, default is 0xe4. Two bits per input,\n"
131 "\t\t bits 0-1 == input 0, bits 31-30 == input 15.\n"
132 "\t\t Type 0 == webcam, 1 == TV, 2 == S-Video, 3 == HDMI");
133
134/* Default: 2 outputs */
135static unsigned num_outputs[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = 2 };
136module_param_array(num_outputs, uint, NULL, 0444);
137MODULE_PARM_DESC(num_outputs, " number of outputs, default is 2");
138
139/* Default: output 0 = SVID, 1 = HDMI */
140static unsigned output_types[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = 2 };
141module_param_array(output_types, uint, NULL, 0444);
142MODULE_PARM_DESC(output_types, " output types, default is 0x02. One bit per output,\n"
143 "\t\t bit 0 == output 0, bit 15 == output 15.\n"
144 "\t\t Type 0 == S-Video, 1 == HDMI");
145
146unsigned vivid_debug;
147module_param(vivid_debug, uint, 0644);
148MODULE_PARM_DESC(vivid_debug, " activates debug info");
149
150static bool no_error_inj;
151module_param(no_error_inj, bool, 0444);
152MODULE_PARM_DESC(no_error_inj, " if set disable the error injecting controls");
153
154static struct vivid_dev *vivid_devs[VIVID_MAX_DEVS];
155
156const struct v4l2_rect vivid_min_rect = {
157 0, 0, MIN_WIDTH, MIN_HEIGHT
158};
159
160const struct v4l2_rect vivid_max_rect = {
161 0, 0, MAX_WIDTH * MAX_ZOOM, MAX_HEIGHT * MAX_ZOOM
162};
163
164static const u8 vivid_hdmi_edid[256] = {
165 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00,
166 0x63, 0x3a, 0xaa, 0x55, 0x00, 0x00, 0x00, 0x00,
167 0x0a, 0x18, 0x01, 0x03, 0x80, 0x10, 0x09, 0x78,
168 0x0e, 0x00, 0xb2, 0xa0, 0x57, 0x49, 0x9b, 0x26,
169 0x10, 0x48, 0x4f, 0x2f, 0xcf, 0x00, 0x31, 0x59,
170 0x45, 0x59, 0x81, 0x80, 0x81, 0x40, 0x90, 0x40,
171 0x95, 0x00, 0xa9, 0x40, 0xb3, 0x00, 0x02, 0x3a,
172 0x80, 0x18, 0x71, 0x38, 0x2d, 0x40, 0x58, 0x2c,
173 0x46, 0x00, 0x10, 0x09, 0x00, 0x00, 0x00, 0x1e,
174 0x00, 0x00, 0x00, 0xfd, 0x00, 0x18, 0x55, 0x18,
175 0x5e, 0x11, 0x00, 0x0a, 0x20, 0x20, 0x20, 0x20,
176 0x20, 0x20, 0x00, 0x00, 0x00, 0xfc, 0x00, 'v',
177 '4', 'l', '2', '-', 'h', 'd', 'm', 'i',
178 0x0a, 0x0a, 0x0a, 0x0a, 0x00, 0x00, 0x00, 0x10,
179 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
180 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xf0,
181
182 0x02, 0x03, 0x1a, 0xc0, 0x48, 0xa2, 0x10, 0x04,
183 0x02, 0x01, 0x21, 0x14, 0x13, 0x23, 0x09, 0x07,
184 0x07, 0x65, 0x03, 0x0c, 0x00, 0x10, 0x00, 0xe2,
185 0x00, 0x2a, 0x01, 0x1d, 0x00, 0x80, 0x51, 0xd0,
186 0x1c, 0x20, 0x40, 0x80, 0x35, 0x00, 0x00, 0x00,
187 0x00, 0x00, 0x00, 0x1e, 0x8c, 0x0a, 0xd0, 0x8a,
188 0x20, 0xe0, 0x2d, 0x10, 0x10, 0x3e, 0x96, 0x00,
189 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00,
190 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
191 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
192 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
193 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
194 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
195 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
196 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
197 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xd7
198};
199
200void vivid_lock(struct vb2_queue *vq)
201{
202 struct vivid_dev *dev = vb2_get_drv_priv(vq);
203
204 mutex_lock(&dev->mutex);
205}
206
207void vivid_unlock(struct vb2_queue *vq)
208{
209 struct vivid_dev *dev = vb2_get_drv_priv(vq);
210
211 mutex_unlock(&dev->mutex);
212}
213
214static int vidioc_querycap(struct file *file, void *priv,
215 struct v4l2_capability *cap)
216{
217 struct vivid_dev *dev = video_drvdata(file);
218 struct video_device *vdev = video_devdata(file);
219
220 strcpy(cap->driver, "vivid");
221 strcpy(cap->card, "vivid");
222 snprintf(cap->bus_info, sizeof(cap->bus_info),
223 "platform:%s", dev->v4l2_dev.name);
224
225 if (vdev->vfl_type == VFL_TYPE_GRABBER && vdev->vfl_dir == VFL_DIR_RX)
226 cap->device_caps = dev->vid_cap_caps;
227 if (vdev->vfl_type == VFL_TYPE_GRABBER && vdev->vfl_dir == VFL_DIR_TX)
228 cap->device_caps = dev->vid_out_caps;
229 else if (vdev->vfl_type == VFL_TYPE_VBI && vdev->vfl_dir == VFL_DIR_RX)
230 cap->device_caps = dev->vbi_cap_caps;
231 else if (vdev->vfl_type == VFL_TYPE_VBI && vdev->vfl_dir == VFL_DIR_TX)
232 cap->device_caps = dev->vbi_out_caps;
233 else if (vdev->vfl_type == VFL_TYPE_SDR)
234 cap->device_caps = dev->sdr_cap_caps;
235 else if (vdev->vfl_type == VFL_TYPE_RADIO && vdev->vfl_dir == VFL_DIR_RX)
236 cap->device_caps = dev->radio_rx_caps;
237 else if (vdev->vfl_type == VFL_TYPE_RADIO && vdev->vfl_dir == VFL_DIR_TX)
238 cap->device_caps = dev->radio_tx_caps;
239 cap->capabilities = dev->vid_cap_caps | dev->vid_out_caps |
240 dev->vbi_cap_caps | dev->vbi_out_caps |
241 dev->radio_rx_caps | dev->radio_tx_caps |
242 dev->sdr_cap_caps | V4L2_CAP_DEVICE_CAPS;
243 return 0;
244}
245
246static int vidioc_s_hw_freq_seek(struct file *file, void *fh, const struct v4l2_hw_freq_seek *a)
247{
248 struct video_device *vdev = video_devdata(file);
249
250 if (vdev->vfl_type == VFL_TYPE_RADIO)
251 return vivid_radio_rx_s_hw_freq_seek(file, fh, a);
252 return -ENOTTY;
253}
254
255static int vidioc_enum_freq_bands(struct file *file, void *fh, struct v4l2_frequency_band *band)
256{
257 struct video_device *vdev = video_devdata(file);
258
259 if (vdev->vfl_type == VFL_TYPE_RADIO)
260 return vivid_radio_rx_enum_freq_bands(file, fh, band);
261 if (vdev->vfl_type == VFL_TYPE_SDR)
262 return vivid_sdr_enum_freq_bands(file, fh, band);
263 return -ENOTTY;
264}
265
266static int vidioc_g_tuner(struct file *file, void *fh, struct v4l2_tuner *vt)
267{
268 struct video_device *vdev = video_devdata(file);
269
270 if (vdev->vfl_type == VFL_TYPE_RADIO)
271 return vivid_radio_rx_g_tuner(file, fh, vt);
272 if (vdev->vfl_type == VFL_TYPE_SDR)
273 return vivid_sdr_g_tuner(file, fh, vt);
274 return vivid_video_g_tuner(file, fh, vt);
275}
276
277static int vidioc_s_tuner(struct file *file, void *fh, const struct v4l2_tuner *vt)
278{
279 struct video_device *vdev = video_devdata(file);
280
281 if (vdev->vfl_type == VFL_TYPE_RADIO)
282 return vivid_radio_rx_s_tuner(file, fh, vt);
283 if (vdev->vfl_type == VFL_TYPE_SDR)
284 return vivid_sdr_s_tuner(file, fh, vt);
285 return vivid_video_s_tuner(file, fh, vt);
286}
287
288static int vidioc_g_frequency(struct file *file, void *fh, struct v4l2_frequency *vf)
289{
290 struct vivid_dev *dev = video_drvdata(file);
291 struct video_device *vdev = video_devdata(file);
292
293 if (vdev->vfl_type == VFL_TYPE_RADIO)
294 return vivid_radio_g_frequency(file,
295 vdev->vfl_dir == VFL_DIR_RX ?
296 &dev->radio_rx_freq : &dev->radio_tx_freq, vf);
297 if (vdev->vfl_type == VFL_TYPE_SDR)
298 return vivid_sdr_g_frequency(file, fh, vf);
299 return vivid_video_g_frequency(file, fh, vf);
300}
301
302static int vidioc_s_frequency(struct file *file, void *fh, const struct v4l2_frequency *vf)
303{
304 struct vivid_dev *dev = video_drvdata(file);
305 struct video_device *vdev = video_devdata(file);
306
307 if (vdev->vfl_type == VFL_TYPE_RADIO)
308 return vivid_radio_s_frequency(file,
309 vdev->vfl_dir == VFL_DIR_RX ?
310 &dev->radio_rx_freq : &dev->radio_tx_freq, vf);
311 if (vdev->vfl_type == VFL_TYPE_SDR)
312 return vivid_sdr_s_frequency(file, fh, vf);
313 return vivid_video_s_frequency(file, fh, vf);
314}
315
316static int vidioc_overlay(struct file *file, void *fh, unsigned i)
317{
318 struct video_device *vdev = video_devdata(file);
319
320 if (vdev->vfl_dir == VFL_DIR_RX)
321 return vivid_vid_cap_overlay(file, fh, i);
322 return vivid_vid_out_overlay(file, fh, i);
323}
324
325static int vidioc_g_fbuf(struct file *file, void *fh, struct v4l2_framebuffer *a)
326{
327 struct video_device *vdev = video_devdata(file);
328
329 if (vdev->vfl_dir == VFL_DIR_RX)
330 return vivid_vid_cap_g_fbuf(file, fh, a);
331 return vivid_vid_out_g_fbuf(file, fh, a);
332}
333
334static int vidioc_s_fbuf(struct file *file, void *fh, const struct v4l2_framebuffer *a)
335{
336 struct video_device *vdev = video_devdata(file);
337
338 if (vdev->vfl_dir == VFL_DIR_RX)
339 return vivid_vid_cap_s_fbuf(file, fh, a);
340 return vivid_vid_out_s_fbuf(file, fh, a);
341}
342
343static int vidioc_s_std(struct file *file, void *fh, v4l2_std_id id)
344{
345 struct video_device *vdev = video_devdata(file);
346
347 if (vdev->vfl_dir == VFL_DIR_RX)
348 return vivid_vid_cap_s_std(file, fh, id);
349 return vivid_vid_out_s_std(file, fh, id);
350}
351
352static int vidioc_s_dv_timings(struct file *file, void *fh, struct v4l2_dv_timings *timings)
353{
354 struct video_device *vdev = video_devdata(file);
355
356 if (vdev->vfl_dir == VFL_DIR_RX)
357 return vivid_vid_cap_s_dv_timings(file, fh, timings);
358 return vivid_vid_out_s_dv_timings(file, fh, timings);
359}
360
361static int vidioc_cropcap(struct file *file, void *fh, struct v4l2_cropcap *cc)
362{
363 struct video_device *vdev = video_devdata(file);
364
365 if (vdev->vfl_dir == VFL_DIR_RX)
366 return vivid_vid_cap_cropcap(file, fh, cc);
367 return vivid_vid_out_cropcap(file, fh, cc);
368}
369
370static int vidioc_g_selection(struct file *file, void *fh,
371 struct v4l2_selection *sel)
372{
373 struct video_device *vdev = video_devdata(file);
374
375 if (vdev->vfl_dir == VFL_DIR_RX)
376 return vivid_vid_cap_g_selection(file, fh, sel);
377 return vivid_vid_out_g_selection(file, fh, sel);
378}
379
380static int vidioc_s_selection(struct file *file, void *fh,
381 struct v4l2_selection *sel)
382{
383 struct video_device *vdev = video_devdata(file);
384
385 if (vdev->vfl_dir == VFL_DIR_RX)
386 return vivid_vid_cap_s_selection(file, fh, sel);
387 return vivid_vid_out_s_selection(file, fh, sel);
388}
389
390static int vidioc_g_parm(struct file *file, void *fh,
391 struct v4l2_streamparm *parm)
392{
393 struct video_device *vdev = video_devdata(file);
394
395 if (vdev->vfl_dir == VFL_DIR_RX)
396 return vivid_vid_cap_g_parm(file, fh, parm);
397 return vivid_vid_out_g_parm(file, fh, parm);
398}
399
400static int vidioc_s_parm(struct file *file, void *fh,
401 struct v4l2_streamparm *parm)
402{
403 struct video_device *vdev = video_devdata(file);
404
405 if (vdev->vfl_dir == VFL_DIR_RX)
406 return vivid_vid_cap_s_parm(file, fh, parm);
407 return vivid_vid_out_g_parm(file, fh, parm);
408}
409
410static ssize_t vivid_radio_read(struct file *file, char __user *buf,
411 size_t size, loff_t *offset)
412{
413 struct video_device *vdev = video_devdata(file);
414
415 if (vdev->vfl_dir == VFL_DIR_TX)
416 return -EINVAL;
417 return vivid_radio_rx_read(file, buf, size, offset);
418}
419
420static ssize_t vivid_radio_write(struct file *file, const char __user *buf,
421 size_t size, loff_t *offset)
422{
423 struct video_device *vdev = video_devdata(file);
424
425 if (vdev->vfl_dir == VFL_DIR_RX)
426 return -EINVAL;
427 return vivid_radio_tx_write(file, buf, size, offset);
428}
429
430static unsigned int vivid_radio_poll(struct file *file, struct poll_table_struct *wait)
431{
432 struct video_device *vdev = video_devdata(file);
433
434 if (vdev->vfl_dir == VFL_DIR_RX)
435 return vivid_radio_rx_poll(file, wait);
436 return vivid_radio_tx_poll(file, wait);
437}
438
439static bool vivid_is_in_use(struct video_device *vdev)
440{
441 unsigned long flags;
442 bool res;
443
444 spin_lock_irqsave(&vdev->fh_lock, flags);
445 res = !list_empty(&vdev->fh_list);
446 spin_unlock_irqrestore(&vdev->fh_lock, flags);
447 return res;
448}
449
450static bool vivid_is_last_user(struct vivid_dev *dev)
451{
452 unsigned uses = vivid_is_in_use(&dev->vid_cap_dev) +
453 vivid_is_in_use(&dev->vid_out_dev) +
454 vivid_is_in_use(&dev->vbi_cap_dev) +
455 vivid_is_in_use(&dev->vbi_out_dev) +
456 vivid_is_in_use(&dev->sdr_cap_dev) +
457 vivid_is_in_use(&dev->radio_rx_dev) +
458 vivid_is_in_use(&dev->radio_tx_dev);
459
460 return uses == 1;
461}
462
463static int vivid_fop_release(struct file *file)
464{
465 struct vivid_dev *dev = video_drvdata(file);
466 struct video_device *vdev = video_devdata(file);
467
468 mutex_lock(&dev->mutex);
469 if (!no_error_inj && v4l2_fh_is_singular_file(file) &&
470 !video_is_registered(vdev) && vivid_is_last_user(dev)) {
471 /*
472 * I am the last user of this driver, and a disconnect
473 * was forced (since this video_device is unregistered),
474 * so re-register all video_device's again.
475 */
476 v4l2_info(&dev->v4l2_dev, "reconnect\n");
477 set_bit(V4L2_FL_REGISTERED, &dev->vid_cap_dev.flags);
478 set_bit(V4L2_FL_REGISTERED, &dev->vid_out_dev.flags);
479 set_bit(V4L2_FL_REGISTERED, &dev->vbi_cap_dev.flags);
480 set_bit(V4L2_FL_REGISTERED, &dev->vbi_out_dev.flags);
481 set_bit(V4L2_FL_REGISTERED, &dev->sdr_cap_dev.flags);
482 set_bit(V4L2_FL_REGISTERED, &dev->radio_rx_dev.flags);
483 set_bit(V4L2_FL_REGISTERED, &dev->radio_tx_dev.flags);
484 }
485 mutex_unlock(&dev->mutex);
486 if (file->private_data == dev->overlay_cap_owner)
487 dev->overlay_cap_owner = NULL;
488 if (file->private_data == dev->radio_rx_rds_owner) {
489 dev->radio_rx_rds_last_block = 0;
490 dev->radio_rx_rds_owner = NULL;
491 }
492 if (file->private_data == dev->radio_tx_rds_owner) {
493 dev->radio_tx_rds_last_block = 0;
494 dev->radio_tx_rds_owner = NULL;
495 }
496 if (vdev->queue)
497 return vb2_fop_release(file);
498 return v4l2_fh_release(file);
499}
500
501static const struct v4l2_file_operations vivid_fops = {
502 .owner = THIS_MODULE,
503 .open = v4l2_fh_open,
504 .release = vivid_fop_release,
505 .read = vb2_fop_read,
506 .write = vb2_fop_write,
507 .poll = vb2_fop_poll,
508 .unlocked_ioctl = video_ioctl2,
509 .mmap = vb2_fop_mmap,
510};
511
512static const struct v4l2_file_operations vivid_radio_fops = {
513 .owner = THIS_MODULE,
514 .open = v4l2_fh_open,
515 .release = vivid_fop_release,
516 .read = vivid_radio_read,
517 .write = vivid_radio_write,
518 .poll = vivid_radio_poll,
519 .unlocked_ioctl = video_ioctl2,
520};
521
522static const struct v4l2_ioctl_ops vivid_ioctl_ops = {
523 .vidioc_querycap = vidioc_querycap,
524
525 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid,
526 .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
527 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
528 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
529 .vidioc_enum_fmt_vid_cap_mplane = vidioc_enum_fmt_vid_mplane,
530 .vidioc_g_fmt_vid_cap_mplane = vidioc_g_fmt_vid_cap_mplane,
531 .vidioc_try_fmt_vid_cap_mplane = vidioc_try_fmt_vid_cap_mplane,
532 .vidioc_s_fmt_vid_cap_mplane = vidioc_s_fmt_vid_cap_mplane,
533
534 .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid,
535 .vidioc_g_fmt_vid_out = vidioc_g_fmt_vid_out,
536 .vidioc_try_fmt_vid_out = vidioc_try_fmt_vid_out,
537 .vidioc_s_fmt_vid_out = vidioc_s_fmt_vid_out,
538 .vidioc_enum_fmt_vid_out_mplane = vidioc_enum_fmt_vid_mplane,
539 .vidioc_g_fmt_vid_out_mplane = vidioc_g_fmt_vid_out_mplane,
540 .vidioc_try_fmt_vid_out_mplane = vidioc_try_fmt_vid_out_mplane,
541 .vidioc_s_fmt_vid_out_mplane = vidioc_s_fmt_vid_out_mplane,
542
543 .vidioc_g_selection = vidioc_g_selection,
544 .vidioc_s_selection = vidioc_s_selection,
545 .vidioc_cropcap = vidioc_cropcap,
546
547 .vidioc_g_fmt_vbi_cap = vidioc_g_fmt_vbi_cap,
548 .vidioc_try_fmt_vbi_cap = vidioc_g_fmt_vbi_cap,
549 .vidioc_s_fmt_vbi_cap = vidioc_s_fmt_vbi_cap,
550
551 .vidioc_g_fmt_sliced_vbi_cap = vidioc_g_fmt_sliced_vbi_cap,
552 .vidioc_try_fmt_sliced_vbi_cap = vidioc_try_fmt_sliced_vbi_cap,
553 .vidioc_s_fmt_sliced_vbi_cap = vidioc_s_fmt_sliced_vbi_cap,
554 .vidioc_g_sliced_vbi_cap = vidioc_g_sliced_vbi_cap,
555
556 .vidioc_g_fmt_vbi_out = vidioc_g_fmt_vbi_out,
557 .vidioc_try_fmt_vbi_out = vidioc_g_fmt_vbi_out,
558 .vidioc_s_fmt_vbi_out = vidioc_s_fmt_vbi_out,
559
560 .vidioc_g_fmt_sliced_vbi_out = vidioc_g_fmt_sliced_vbi_out,
561 .vidioc_try_fmt_sliced_vbi_out = vidioc_try_fmt_sliced_vbi_out,
562 .vidioc_s_fmt_sliced_vbi_out = vidioc_s_fmt_sliced_vbi_out,
563
564 .vidioc_enum_fmt_sdr_cap = vidioc_enum_fmt_sdr_cap,
565 .vidioc_g_fmt_sdr_cap = vidioc_g_fmt_sdr_cap,
566 .vidioc_try_fmt_sdr_cap = vidioc_g_fmt_sdr_cap,
567 .vidioc_s_fmt_sdr_cap = vidioc_g_fmt_sdr_cap,
568
569 .vidioc_overlay = vidioc_overlay,
570 .vidioc_enum_framesizes = vidioc_enum_framesizes,
571 .vidioc_enum_frameintervals = vidioc_enum_frameintervals,
572 .vidioc_g_parm = vidioc_g_parm,
573 .vidioc_s_parm = vidioc_s_parm,
574
575 .vidioc_enum_fmt_vid_overlay = vidioc_enum_fmt_vid_overlay,
576 .vidioc_g_fmt_vid_overlay = vidioc_g_fmt_vid_overlay,
577 .vidioc_try_fmt_vid_overlay = vidioc_try_fmt_vid_overlay,
578 .vidioc_s_fmt_vid_overlay = vidioc_s_fmt_vid_overlay,
579 .vidioc_g_fmt_vid_out_overlay = vidioc_g_fmt_vid_out_overlay,
580 .vidioc_try_fmt_vid_out_overlay = vidioc_try_fmt_vid_out_overlay,
581 .vidioc_s_fmt_vid_out_overlay = vidioc_s_fmt_vid_out_overlay,
582 .vidioc_g_fbuf = vidioc_g_fbuf,
583 .vidioc_s_fbuf = vidioc_s_fbuf,
584
585 .vidioc_reqbufs = vb2_ioctl_reqbufs,
586 .vidioc_create_bufs = vb2_ioctl_create_bufs,
587 .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
588 .vidioc_querybuf = vb2_ioctl_querybuf,
589 .vidioc_qbuf = vb2_ioctl_qbuf,
590 .vidioc_dqbuf = vb2_ioctl_dqbuf,
591/* Not yet .vidioc_expbuf = vb2_ioctl_expbuf,*/
592 .vidioc_streamon = vb2_ioctl_streamon,
593 .vidioc_streamoff = vb2_ioctl_streamoff,
594
595 .vidioc_enum_input = vidioc_enum_input,
596 .vidioc_g_input = vidioc_g_input,
597 .vidioc_s_input = vidioc_s_input,
598 .vidioc_s_audio = vidioc_s_audio,
599 .vidioc_g_audio = vidioc_g_audio,
600 .vidioc_enumaudio = vidioc_enumaudio,
601 .vidioc_s_frequency = vidioc_s_frequency,
602 .vidioc_g_frequency = vidioc_g_frequency,
603 .vidioc_s_tuner = vidioc_s_tuner,
604 .vidioc_g_tuner = vidioc_g_tuner,
605 .vidioc_s_modulator = vidioc_s_modulator,
606 .vidioc_g_modulator = vidioc_g_modulator,
607 .vidioc_s_hw_freq_seek = vidioc_s_hw_freq_seek,
608 .vidioc_enum_freq_bands = vidioc_enum_freq_bands,
609
610 .vidioc_enum_output = vidioc_enum_output,
611 .vidioc_g_output = vidioc_g_output,
612 .vidioc_s_output = vidioc_s_output,
613 .vidioc_s_audout = vidioc_s_audout,
614 .vidioc_g_audout = vidioc_g_audout,
615 .vidioc_enumaudout = vidioc_enumaudout,
616
617 .vidioc_querystd = vidioc_querystd,
618 .vidioc_g_std = vidioc_g_std,
619 .vidioc_s_std = vidioc_s_std,
620 .vidioc_s_dv_timings = vidioc_s_dv_timings,
621 .vidioc_g_dv_timings = vidioc_g_dv_timings,
622 .vidioc_query_dv_timings = vidioc_query_dv_timings,
623 .vidioc_enum_dv_timings = vidioc_enum_dv_timings,
624 .vidioc_dv_timings_cap = vidioc_dv_timings_cap,
625 .vidioc_g_edid = vidioc_g_edid,
626 .vidioc_s_edid = vidioc_s_edid,
627
628 .vidioc_log_status = v4l2_ctrl_log_status,
629 .vidioc_subscribe_event = vidioc_subscribe_event,
630 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
631};
632
633/* -----------------------------------------------------------------
634 Initialization and module stuff
635 ------------------------------------------------------------------*/
636
637static int __init vivid_create_instance(int inst)
638{
639 static const struct v4l2_dv_timings def_dv_timings =
640 V4L2_DV_BT_CEA_1280X720P60;
641 unsigned in_type_counter[4] = { 0, 0, 0, 0 };
642 unsigned out_type_counter[4] = { 0, 0, 0, 0 };
643 int ccs_cap = ccs_cap_mode[inst];
644 int ccs_out = ccs_out_mode[inst];
645 bool has_tuner;
646 bool has_modulator;
647 struct vivid_dev *dev;
648 struct video_device *vfd;
649 struct vb2_queue *q;
650 unsigned node_type = node_types[inst];
651 v4l2_std_id tvnorms_cap = 0, tvnorms_out = 0;
652 int ret;
653 int i;
654
655 /* allocate main vivid state structure */
656 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
657 if (!dev)
658 return -ENOMEM;
659
660 dev->inst = inst;
661
662 /* register v4l2_device */
663 snprintf(dev->v4l2_dev.name, sizeof(dev->v4l2_dev.name),
664 "%s-%03d", VIVID_MODULE_NAME, inst);
665 ret = v4l2_device_register(NULL, &dev->v4l2_dev);
666 if (ret)
667 goto free_dev;
668
669 /* start detecting feature set */
670
671 /* do we use single- or multi-planar? */
672 if (multiplanar[inst] == 0)
673 dev->multiplanar = inst & 1;
674 else
675 dev->multiplanar = multiplanar[inst] > 1;
676 v4l2_info(&dev->v4l2_dev, "using %splanar format API\n",
677 dev->multiplanar ? "multi" : "single ");
678
679 /* how many inputs do we have and of what type? */
680 dev->num_inputs = num_inputs[inst];
681 if (dev->num_inputs < 1)
682 dev->num_inputs = 1;
683 if (dev->num_inputs >= MAX_INPUTS)
684 dev->num_inputs = MAX_INPUTS;
685 for (i = 0; i < dev->num_inputs; i++) {
686 dev->input_type[i] = (input_types[inst] >> (i * 2)) & 0x3;
687 dev->input_name_counter[i] = in_type_counter[dev->input_type[i]]++;
688 }
689 dev->has_audio_inputs = in_type_counter[TV] && in_type_counter[SVID];
690
691 /* how many outputs do we have and of what type? */
692 dev->num_outputs = num_outputs[inst];
693 if (dev->num_outputs < 1)
694 dev->num_outputs = 1;
695 if (dev->num_outputs >= MAX_OUTPUTS)
696 dev->num_outputs = MAX_OUTPUTS;
697 for (i = 0; i < dev->num_outputs; i++) {
698 dev->output_type[i] = ((output_types[inst] >> i) & 1) ? HDMI : SVID;
699 dev->output_name_counter[i] = out_type_counter[dev->output_type[i]]++;
700 }
701 dev->has_audio_outputs = out_type_counter[SVID];
702
703 /* do we create a video capture device? */
704 dev->has_vid_cap = node_type & 0x0001;
705
706 /* do we create a vbi capture device? */
707 if (in_type_counter[TV] || in_type_counter[SVID]) {
708 dev->has_raw_vbi_cap = node_type & 0x0004;
709 dev->has_sliced_vbi_cap = node_type & 0x0008;
710 dev->has_vbi_cap = dev->has_raw_vbi_cap | dev->has_sliced_vbi_cap;
711 }
712
713 /* do we create a video output device? */
714 dev->has_vid_out = node_type & 0x0100;
715
716 /* do we create a vbi output device? */
717 if (out_type_counter[SVID]) {
718 dev->has_raw_vbi_out = node_type & 0x0400;
719 dev->has_sliced_vbi_out = node_type & 0x0800;
720 dev->has_vbi_out = dev->has_raw_vbi_out | dev->has_sliced_vbi_out;
721 }
722
723 /* do we create a radio receiver device? */
724 dev->has_radio_rx = node_type & 0x0010;
725
726 /* do we create a radio transmitter device? */
727 dev->has_radio_tx = node_type & 0x1000;
728
729 /* do we create a software defined radio capture device? */
730 dev->has_sdr_cap = node_type & 0x0020;
731
732 /* do we have a tuner? */
733 has_tuner = ((dev->has_vid_cap || dev->has_vbi_cap) && in_type_counter[TV]) ||
734 dev->has_radio_rx || dev->has_sdr_cap;
735
736 /* do we have a modulator? */
737 has_modulator = dev->has_radio_tx;
738
739 if (dev->has_vid_cap)
740 /* do we have a framebuffer for overlay testing? */
741 dev->has_fb = node_type & 0x10000;
742
743 /* can we do crop/compose/scaling while capturing? */
744 if (no_error_inj && ccs_cap == -1)
745 ccs_cap = 7;
746
747 /* if ccs_cap == -1, then the use can select it using controls */
748 if (ccs_cap != -1) {
749 dev->has_crop_cap = ccs_cap & 1;
750 dev->has_compose_cap = ccs_cap & 2;
751 dev->has_scaler_cap = ccs_cap & 4;
752 v4l2_info(&dev->v4l2_dev, "Capture Crop: %c Compose: %c Scaler: %c\n",
753 dev->has_crop_cap ? 'Y' : 'N',
754 dev->has_compose_cap ? 'Y' : 'N',
755 dev->has_scaler_cap ? 'Y' : 'N');
756 }
757
758 /* can we do crop/compose/scaling with video output? */
759 if (no_error_inj && ccs_out == -1)
760 ccs_out = 7;
761
762 /* if ccs_out == -1, then the use can select it using controls */
763 if (ccs_out != -1) {
764 dev->has_crop_out = ccs_out & 1;
765 dev->has_compose_out = ccs_out & 2;
766 dev->has_scaler_out = ccs_out & 4;
767 v4l2_info(&dev->v4l2_dev, "Output Crop: %c Compose: %c Scaler: %c\n",
768 dev->has_crop_out ? 'Y' : 'N',
769 dev->has_compose_out ? 'Y' : 'N',
770 dev->has_scaler_out ? 'Y' : 'N');
771 }
772
773 /* end detecting feature set */
774
775 if (dev->has_vid_cap) {
776 /* set up the capabilities of the video capture device */
777 dev->vid_cap_caps = dev->multiplanar ?
778 V4L2_CAP_VIDEO_CAPTURE_MPLANE :
779 V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OVERLAY;
780 dev->vid_cap_caps |= V4L2_CAP_STREAMING | V4L2_CAP_READWRITE;
781 if (dev->has_audio_inputs)
782 dev->vid_cap_caps |= V4L2_CAP_AUDIO;
783 if (in_type_counter[TV])
784 dev->vid_cap_caps |= V4L2_CAP_TUNER;
785 }
786 if (dev->has_vid_out) {
787 /* set up the capabilities of the video output device */
788 dev->vid_out_caps = dev->multiplanar ?
789 V4L2_CAP_VIDEO_OUTPUT_MPLANE :
790 V4L2_CAP_VIDEO_OUTPUT;
791 if (dev->has_fb)
792 dev->vid_out_caps |= V4L2_CAP_VIDEO_OUTPUT_OVERLAY;
793 dev->vid_out_caps |= V4L2_CAP_STREAMING | V4L2_CAP_READWRITE;
794 if (dev->has_audio_outputs)
795 dev->vid_out_caps |= V4L2_CAP_AUDIO;
796 }
797 if (dev->has_vbi_cap) {
798 /* set up the capabilities of the vbi capture device */
799 dev->vbi_cap_caps = (dev->has_raw_vbi_cap ? V4L2_CAP_VBI_CAPTURE : 0) |
800 (dev->has_sliced_vbi_cap ? V4L2_CAP_SLICED_VBI_CAPTURE : 0);
801 dev->vbi_cap_caps |= V4L2_CAP_STREAMING | V4L2_CAP_READWRITE;
802 if (dev->has_audio_inputs)
803 dev->vbi_cap_caps |= V4L2_CAP_AUDIO;
804 if (in_type_counter[TV])
805 dev->vbi_cap_caps |= V4L2_CAP_TUNER;
806 }
807 if (dev->has_vbi_out) {
808 /* set up the capabilities of the vbi output device */
809 dev->vbi_out_caps = (dev->has_raw_vbi_out ? V4L2_CAP_VBI_OUTPUT : 0) |
810 (dev->has_sliced_vbi_out ? V4L2_CAP_SLICED_VBI_OUTPUT : 0);
811 dev->vbi_out_caps |= V4L2_CAP_STREAMING | V4L2_CAP_READWRITE;
812 if (dev->has_audio_outputs)
813 dev->vbi_out_caps |= V4L2_CAP_AUDIO;
814 }
815 if (dev->has_sdr_cap) {
816 /* set up the capabilities of the sdr capture device */
817 dev->sdr_cap_caps = V4L2_CAP_SDR_CAPTURE | V4L2_CAP_TUNER;
818 dev->sdr_cap_caps |= V4L2_CAP_STREAMING | V4L2_CAP_READWRITE;
819 }
820 /* set up the capabilities of the radio receiver device */
821 if (dev->has_radio_rx)
822 dev->radio_rx_caps = V4L2_CAP_RADIO | V4L2_CAP_RDS_CAPTURE |
823 V4L2_CAP_HW_FREQ_SEEK | V4L2_CAP_TUNER |
824 V4L2_CAP_READWRITE;
825 /* set up the capabilities of the radio transmitter device */
826 if (dev->has_radio_tx)
827 dev->radio_tx_caps = V4L2_CAP_RDS_OUTPUT | V4L2_CAP_MODULATOR |
828 V4L2_CAP_READWRITE;
829
830 /* initialize the test pattern generator */
831 tpg_init(&dev->tpg, 640, 360);
832 if (tpg_alloc(&dev->tpg, MAX_ZOOM * MAX_WIDTH))
833 goto free_dev;
834 dev->scaled_line = vzalloc(MAX_ZOOM * MAX_WIDTH);
835 if (!dev->scaled_line)
836 goto free_dev;
837 dev->blended_line = vzalloc(MAX_ZOOM * MAX_WIDTH);
838 if (!dev->blended_line)
839 goto free_dev;
840
841 /* load the edid */
842 dev->edid = vmalloc(256 * 128);
843 if (!dev->edid)
844 goto free_dev;
845
846 /* create a string array containing the names of all the preset timings */
847 while (v4l2_dv_timings_presets[dev->query_dv_timings_size].bt.width)
848 dev->query_dv_timings_size++;
849 dev->query_dv_timings_qmenu = kmalloc(dev->query_dv_timings_size *
850 (sizeof(void *) + 32), GFP_KERNEL);
851 if (dev->query_dv_timings_qmenu == NULL)
852 goto free_dev;
853 for (i = 0; i < dev->query_dv_timings_size; i++) {
854 const struct v4l2_bt_timings *bt = &v4l2_dv_timings_presets[i].bt;
855 char *p = (char *)&dev->query_dv_timings_qmenu[dev->query_dv_timings_size];
856 u32 htot, vtot;
857
858 p += i * 32;
859 dev->query_dv_timings_qmenu[i] = p;
860
861 htot = V4L2_DV_BT_FRAME_WIDTH(bt);
862 vtot = V4L2_DV_BT_FRAME_HEIGHT(bt);
863 snprintf(p, 32, "%ux%u%s%u",
864 bt->width, bt->height, bt->interlaced ? "i" : "p",
865 (u32)bt->pixelclock / (htot * vtot));
866 }
867
868 /* disable invalid ioctls based on the feature set */
869 if (!dev->has_audio_inputs) {
870 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_S_AUDIO);
871 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_G_AUDIO);
872 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_ENUMAUDIO);
873 v4l2_disable_ioctl(&dev->vbi_cap_dev, VIDIOC_S_AUDIO);
874 v4l2_disable_ioctl(&dev->vbi_cap_dev, VIDIOC_G_AUDIO);
875 v4l2_disable_ioctl(&dev->vbi_cap_dev, VIDIOC_ENUMAUDIO);
876 }
877 if (!dev->has_audio_outputs) {
878 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_S_AUDOUT);
879 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_G_AUDOUT);
880 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_ENUMAUDOUT);
881 v4l2_disable_ioctl(&dev->vbi_out_dev, VIDIOC_S_AUDOUT);
882 v4l2_disable_ioctl(&dev->vbi_out_dev, VIDIOC_G_AUDOUT);
883 v4l2_disable_ioctl(&dev->vbi_out_dev, VIDIOC_ENUMAUDOUT);
884 }
885 if (!in_type_counter[TV] && !in_type_counter[SVID]) {
886 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_S_STD);
887 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_G_STD);
888 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_ENUMSTD);
889 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_QUERYSTD);
890 }
891 if (!out_type_counter[SVID]) {
892 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_S_STD);
893 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_G_STD);
894 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_ENUMSTD);
895 }
896 if (!has_tuner && !has_modulator) {
897 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_S_FREQUENCY);
898 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_G_FREQUENCY);
899 v4l2_disable_ioctl(&dev->vbi_cap_dev, VIDIOC_S_FREQUENCY);
900 v4l2_disable_ioctl(&dev->vbi_cap_dev, VIDIOC_G_FREQUENCY);
901 }
902 if (!has_tuner) {
903 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_S_TUNER);
904 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_G_TUNER);
905 v4l2_disable_ioctl(&dev->vbi_cap_dev, VIDIOC_S_TUNER);
906 v4l2_disable_ioctl(&dev->vbi_cap_dev, VIDIOC_G_TUNER);
907 }
908 if (in_type_counter[HDMI] == 0) {
909 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_S_EDID);
910 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_G_EDID);
911 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_DV_TIMINGS_CAP);
912 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_G_DV_TIMINGS);
913 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_S_DV_TIMINGS);
914 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_ENUM_DV_TIMINGS);
915 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_QUERY_DV_TIMINGS);
916 }
917 if (out_type_counter[HDMI] == 0) {
918 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_G_EDID);
919 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_DV_TIMINGS_CAP);
920 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_G_DV_TIMINGS);
921 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_S_DV_TIMINGS);
922 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_ENUM_DV_TIMINGS);
923 }
924 if (!dev->has_fb) {
925 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_G_FBUF);
926 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_S_FBUF);
927 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_OVERLAY);
928 }
929 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_S_HW_FREQ_SEEK);
930 v4l2_disable_ioctl(&dev->vbi_cap_dev, VIDIOC_S_HW_FREQ_SEEK);
931 v4l2_disable_ioctl(&dev->sdr_cap_dev, VIDIOC_S_HW_FREQ_SEEK);
932 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_S_FREQUENCY);
933 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_G_FREQUENCY);
934 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_ENUM_FRAMESIZES);
935 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_ENUM_FRAMEINTERVALS);
936 v4l2_disable_ioctl(&dev->vbi_out_dev, VIDIOC_S_FREQUENCY);
937 v4l2_disable_ioctl(&dev->vbi_out_dev, VIDIOC_G_FREQUENCY);
938
939 /* configure internal data */
940 dev->fmt_cap = &vivid_formats[0];
941 dev->fmt_out = &vivid_formats[0];
942 if (!dev->multiplanar)
943 vivid_formats[0].data_offset[0] = 0;
944 dev->webcam_size_idx = 1;
945 dev->webcam_ival_idx = 3;
946 tpg_s_fourcc(&dev->tpg, dev->fmt_cap->fourcc);
947 dev->std_cap = V4L2_STD_PAL;
948 dev->std_out = V4L2_STD_PAL;
949 if (dev->input_type[0] == TV || dev->input_type[0] == SVID)
950 tvnorms_cap = V4L2_STD_ALL;
951 if (dev->output_type[0] == SVID)
952 tvnorms_out = V4L2_STD_ALL;
953 dev->dv_timings_cap = def_dv_timings;
954 dev->dv_timings_out = def_dv_timings;
955 dev->tv_freq = 2804 /* 175.25 * 16 */;
956 dev->tv_audmode = V4L2_TUNER_MODE_STEREO;
957 dev->tv_field_cap = V4L2_FIELD_INTERLACED;
958 dev->tv_field_out = V4L2_FIELD_INTERLACED;
959 dev->radio_rx_freq = 95000 * 16;
960 dev->radio_rx_audmode = V4L2_TUNER_MODE_STEREO;
961 if (dev->has_radio_tx) {
962 dev->radio_tx_freq = 95500 * 16;
963 dev->radio_rds_loop = false;
964 }
965 dev->radio_tx_subchans = V4L2_TUNER_SUB_STEREO | V4L2_TUNER_SUB_RDS;
966 dev->sdr_adc_freq = 300000;
967 dev->sdr_fm_freq = 50000000;
968 dev->edid_max_blocks = dev->edid_blocks = 2;
969 memcpy(dev->edid, vivid_hdmi_edid, sizeof(vivid_hdmi_edid));
970 ktime_get_ts(&dev->radio_rds_init_ts);
971
972 /* create all controls */
973 ret = vivid_create_controls(dev, ccs_cap == -1, ccs_out == -1, no_error_inj,
974 in_type_counter[TV] || in_type_counter[SVID] ||
975 out_type_counter[SVID],
976 in_type_counter[HDMI] || out_type_counter[HDMI]);
977 if (ret)
978 goto unreg_dev;
979
980 /*
981 * update the capture and output formats to do a proper initial
982 * configuration.
983 */
984 vivid_update_format_cap(dev, false);
985 vivid_update_format_out(dev);
986
987 v4l2_ctrl_handler_setup(&dev->ctrl_hdl_vid_cap);
988 v4l2_ctrl_handler_setup(&dev->ctrl_hdl_vid_out);
989 v4l2_ctrl_handler_setup(&dev->ctrl_hdl_vbi_cap);
990 v4l2_ctrl_handler_setup(&dev->ctrl_hdl_vbi_out);
991 v4l2_ctrl_handler_setup(&dev->ctrl_hdl_radio_rx);
992 v4l2_ctrl_handler_setup(&dev->ctrl_hdl_radio_tx);
993 v4l2_ctrl_handler_setup(&dev->ctrl_hdl_sdr_cap);
994
995 /* initialize overlay */
996 dev->fb_cap.fmt.width = dev->src_rect.width;
997 dev->fb_cap.fmt.height = dev->src_rect.height;
998 dev->fb_cap.fmt.pixelformat = dev->fmt_cap->fourcc;
999 dev->fb_cap.fmt.bytesperline = dev->src_rect.width * tpg_g_twopixelsize(&dev->tpg, 0) / 2;
1000 dev->fb_cap.fmt.sizeimage = dev->src_rect.height * dev->fb_cap.fmt.bytesperline;
1001
1002 /* initialize locks */
1003 spin_lock_init(&dev->slock);
1004 mutex_init(&dev->mutex);
1005
1006 /* init dma queues */
1007 INIT_LIST_HEAD(&dev->vid_cap_active);
1008 INIT_LIST_HEAD(&dev->vid_out_active);
1009 INIT_LIST_HEAD(&dev->vbi_cap_active);
1010 INIT_LIST_HEAD(&dev->vbi_out_active);
1011 INIT_LIST_HEAD(&dev->sdr_cap_active);
1012
1013 /* start creating the vb2 queues */
1014 if (dev->has_vid_cap) {
1015 /* initialize vid_cap queue */
1016 q = &dev->vb_vid_cap_q;
1017 q->type = dev->multiplanar ? V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE :
1018 V4L2_BUF_TYPE_VIDEO_CAPTURE;
1019 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1020 q->drv_priv = dev;
1021 q->buf_struct_size = sizeof(struct vivid_buffer);
1022 q->ops = &vivid_vid_cap_qops;
1023 q->mem_ops = &vb2_vmalloc_memops;
1024 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1025 q->min_buffers_needed = 2;
1026
1027 ret = vb2_queue_init(q);
1028 if (ret)
1029 goto unreg_dev;
1030 }
1031
1032 if (dev->has_vid_out) {
1033 /* initialize vid_out queue */
1034 q = &dev->vb_vid_out_q;
1035 q->type = dev->multiplanar ? V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE :
1036 V4L2_BUF_TYPE_VIDEO_OUTPUT;
1037 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_WRITE;
1038 q->drv_priv = dev;
1039 q->buf_struct_size = sizeof(struct vivid_buffer);
1040 q->ops = &vivid_vid_out_qops;
1041 q->mem_ops = &vb2_vmalloc_memops;
1042 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1043 q->min_buffers_needed = 2;
1044
1045 ret = vb2_queue_init(q);
1046 if (ret)
1047 goto unreg_dev;
1048 }
1049
1050 if (dev->has_vbi_cap) {
1051 /* initialize vbi_cap queue */
1052 q = &dev->vb_vbi_cap_q;
1053 q->type = dev->has_raw_vbi_cap ? V4L2_BUF_TYPE_VBI_CAPTURE :
1054 V4L2_BUF_TYPE_SLICED_VBI_CAPTURE;
1055 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1056 q->drv_priv = dev;
1057 q->buf_struct_size = sizeof(struct vivid_buffer);
1058 q->ops = &vivid_vbi_cap_qops;
1059 q->mem_ops = &vb2_vmalloc_memops;
1060 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1061 q->min_buffers_needed = 2;
1062
1063 ret = vb2_queue_init(q);
1064 if (ret)
1065 goto unreg_dev;
1066 }
1067
1068 if (dev->has_vbi_out) {
1069 /* initialize vbi_out queue */
1070 q = &dev->vb_vbi_out_q;
1071 q->type = dev->has_raw_vbi_out ? V4L2_BUF_TYPE_VBI_OUTPUT :
1072 V4L2_BUF_TYPE_SLICED_VBI_OUTPUT;
1073 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_WRITE;
1074 q->drv_priv = dev;
1075 q->buf_struct_size = sizeof(struct vivid_buffer);
1076 q->ops = &vivid_vbi_out_qops;
1077 q->mem_ops = &vb2_vmalloc_memops;
1078 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1079 q->min_buffers_needed = 2;
1080
1081 ret = vb2_queue_init(q);
1082 if (ret)
1083 goto unreg_dev;
1084 }
1085
1086 if (dev->has_sdr_cap) {
1087 /* initialize sdr_cap queue */
1088 q = &dev->vb_sdr_cap_q;
1089 q->type = V4L2_BUF_TYPE_SDR_CAPTURE;
1090 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1091 q->drv_priv = dev;
1092 q->buf_struct_size = sizeof(struct vivid_buffer);
1093 q->ops = &vivid_sdr_cap_qops;
1094 q->mem_ops = &vb2_vmalloc_memops;
1095 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1096 q->min_buffers_needed = 8;
1097
1098 ret = vb2_queue_init(q);
1099 if (ret)
1100 goto unreg_dev;
1101 }
1102
1103 if (dev->has_fb) {
1104 /* Create framebuffer for testing capture/output overlay */
1105 ret = vivid_fb_init(dev);
1106 if (ret)
1107 goto unreg_dev;
1108 v4l2_info(&dev->v4l2_dev, "Framebuffer device registered as fb%d\n",
1109 dev->fb_info.node);
1110 }
1111
1112 /* finally start creating the device nodes */
1113 if (dev->has_vid_cap) {
1114 vfd = &dev->vid_cap_dev;
1115 strlcpy(vfd->name, "vivid-vid-cap", sizeof(vfd->name));
1116 vfd->fops = &vivid_fops;
1117 vfd->ioctl_ops = &vivid_ioctl_ops;
1118 vfd->release = video_device_release_empty;
1119 vfd->v4l2_dev = &dev->v4l2_dev;
1120 vfd->queue = &dev->vb_vid_cap_q;
1121 vfd->tvnorms = tvnorms_cap;
1122
1123 /*
1124 * Provide a mutex to v4l2 core. It will be used to protect
1125 * all fops and v4l2 ioctls.
1126 */
1127 vfd->lock = &dev->mutex;
1128 video_set_drvdata(vfd, dev);
1129
1130 ret = video_register_device(vfd, VFL_TYPE_GRABBER, vid_cap_nr[inst]);
1131 if (ret < 0)
1132 goto unreg_dev;
1133 v4l2_info(&dev->v4l2_dev, "V4L2 capture device registered as %s\n",
1134 video_device_node_name(vfd));
1135 }
1136
1137 if (dev->has_vid_out) {
1138 vfd = &dev->vid_out_dev;
1139 strlcpy(vfd->name, "vivid-vid-out", sizeof(vfd->name));
1140 vfd->vfl_dir = VFL_DIR_TX;
1141 vfd->fops = &vivid_fops;
1142 vfd->ioctl_ops = &vivid_ioctl_ops;
1143 vfd->release = video_device_release_empty;
1144 vfd->v4l2_dev = &dev->v4l2_dev;
1145 vfd->queue = &dev->vb_vid_out_q;
1146 vfd->tvnorms = tvnorms_out;
1147
1148 /*
1149 * Provide a mutex to v4l2 core. It will be used to protect
1150 * all fops and v4l2 ioctls.
1151 */
1152 vfd->lock = &dev->mutex;
1153 video_set_drvdata(vfd, dev);
1154
1155 ret = video_register_device(vfd, VFL_TYPE_GRABBER, vid_out_nr[inst]);
1156 if (ret < 0)
1157 goto unreg_dev;
1158 v4l2_info(&dev->v4l2_dev, "V4L2 output device registered as %s\n",
1159 video_device_node_name(vfd));
1160 }
1161
1162 if (dev->has_vbi_cap) {
1163 vfd = &dev->vbi_cap_dev;
1164 strlcpy(vfd->name, "vivid-vbi-cap", sizeof(vfd->name));
1165 vfd->fops = &vivid_fops;
1166 vfd->ioctl_ops = &vivid_ioctl_ops;
1167 vfd->release = video_device_release_empty;
1168 vfd->v4l2_dev = &dev->v4l2_dev;
1169 vfd->queue = &dev->vb_vbi_cap_q;
1170 vfd->lock = &dev->mutex;
1171 vfd->tvnorms = tvnorms_cap;
1172 video_set_drvdata(vfd, dev);
1173
1174 ret = video_register_device(vfd, VFL_TYPE_VBI, vbi_cap_nr[inst]);
1175 if (ret < 0)
1176 goto unreg_dev;
1177 v4l2_info(&dev->v4l2_dev, "V4L2 capture device registered as %s, supports %s VBI\n",
1178 video_device_node_name(vfd),
1179 (dev->has_raw_vbi_cap && dev->has_sliced_vbi_cap) ?
1180 "raw and sliced" :
1181 (dev->has_raw_vbi_cap ? "raw" : "sliced"));
1182 }
1183
1184 if (dev->has_vbi_out) {
1185 vfd = &dev->vbi_out_dev;
1186 strlcpy(vfd->name, "vivid-vbi-out", sizeof(vfd->name));
1187 vfd->vfl_dir = VFL_DIR_TX;
1188 vfd->fops = &vivid_fops;
1189 vfd->ioctl_ops = &vivid_ioctl_ops;
1190 vfd->release = video_device_release_empty;
1191 vfd->v4l2_dev = &dev->v4l2_dev;
1192 vfd->queue = &dev->vb_vbi_out_q;
1193 vfd->lock = &dev->mutex;
1194 vfd->tvnorms = tvnorms_out;
1195 video_set_drvdata(vfd, dev);
1196
1197 ret = video_register_device(vfd, VFL_TYPE_VBI, vbi_out_nr[inst]);
1198 if (ret < 0)
1199 goto unreg_dev;
1200 v4l2_info(&dev->v4l2_dev, "V4L2 output device registered as %s, supports %s VBI\n",
1201 video_device_node_name(vfd),
1202 (dev->has_raw_vbi_out && dev->has_sliced_vbi_out) ?
1203 "raw and sliced" :
1204 (dev->has_raw_vbi_out ? "raw" : "sliced"));
1205 }
1206
1207 if (dev->has_sdr_cap) {
1208 vfd = &dev->sdr_cap_dev;
1209 strlcpy(vfd->name, "vivid-sdr-cap", sizeof(vfd->name));
1210 vfd->fops = &vivid_fops;
1211 vfd->ioctl_ops = &vivid_ioctl_ops;
1212 vfd->release = video_device_release_empty;
1213 vfd->v4l2_dev = &dev->v4l2_dev;
1214 vfd->queue = &dev->vb_sdr_cap_q;
1215 vfd->lock = &dev->mutex;
1216 video_set_drvdata(vfd, dev);
1217
1218 ret = video_register_device(vfd, VFL_TYPE_SDR, sdr_cap_nr[inst]);
1219 if (ret < 0)
1220 goto unreg_dev;
1221 v4l2_info(&dev->v4l2_dev, "V4L2 capture device registered as %s\n",
1222 video_device_node_name(vfd));
1223 }
1224
1225 if (dev->has_radio_rx) {
1226 vfd = &dev->radio_rx_dev;
1227 strlcpy(vfd->name, "vivid-rad-rx", sizeof(vfd->name));
1228 vfd->fops = &vivid_radio_fops;
1229 vfd->ioctl_ops = &vivid_ioctl_ops;
1230 vfd->release = video_device_release_empty;
1231 vfd->v4l2_dev = &dev->v4l2_dev;
1232 vfd->lock = &dev->mutex;
1233 video_set_drvdata(vfd, dev);
1234
1235 ret = video_register_device(vfd, VFL_TYPE_RADIO, radio_rx_nr[inst]);
1236 if (ret < 0)
1237 goto unreg_dev;
1238 v4l2_info(&dev->v4l2_dev, "V4L2 receiver device registered as %s\n",
1239 video_device_node_name(vfd));
1240 }
1241
1242 if (dev->has_radio_tx) {
1243 vfd = &dev->radio_tx_dev;
1244 strlcpy(vfd->name, "vivid-rad-tx", sizeof(vfd->name));
1245 vfd->vfl_dir = VFL_DIR_TX;
1246 vfd->fops = &vivid_radio_fops;
1247 vfd->ioctl_ops = &vivid_ioctl_ops;
1248 vfd->release = video_device_release_empty;
1249 vfd->v4l2_dev = &dev->v4l2_dev;
1250 vfd->lock = &dev->mutex;
1251 video_set_drvdata(vfd, dev);
1252
1253 ret = video_register_device(vfd, VFL_TYPE_RADIO, radio_tx_nr[inst]);
1254 if (ret < 0)
1255 goto unreg_dev;
1256 v4l2_info(&dev->v4l2_dev, "V4L2 transmitter device registered as %s\n",
1257 video_device_node_name(vfd));
1258 }
1259
1260 /* Now that everything is fine, let's add it to device list */
1261 vivid_devs[inst] = dev;
1262
1263 return 0;
1264
1265unreg_dev:
1266 video_unregister_device(&dev->radio_tx_dev);
1267 video_unregister_device(&dev->radio_rx_dev);
1268 video_unregister_device(&dev->sdr_cap_dev);
1269 video_unregister_device(&dev->vbi_out_dev);
1270 video_unregister_device(&dev->vbi_cap_dev);
1271 video_unregister_device(&dev->vid_out_dev);
1272 video_unregister_device(&dev->vid_cap_dev);
1273 vivid_free_controls(dev);
1274 v4l2_device_unregister(&dev->v4l2_dev);
1275free_dev:
1276 vfree(dev->scaled_line);
1277 vfree(dev->blended_line);
1278 vfree(dev->edid);
1279 tpg_free(&dev->tpg);
1280 kfree(dev->query_dv_timings_qmenu);
1281 kfree(dev);
1282 return ret;
1283}
1284
1285/* This routine allocates from 1 to n_devs virtual drivers.
1286
1287 The real maximum number of virtual drivers will depend on how many drivers
1288 will succeed. This is limited to the maximum number of devices that
1289 videodev supports, which is equal to VIDEO_NUM_DEVICES.
1290 */
1291static int __init vivid_init(void)
1292{
1293 const struct font_desc *font = find_font("VGA8x16");
1294 int ret = 0, i;
1295
1296 if (font == NULL) {
1297 pr_err("vivid: could not find font\n");
1298 return -ENODEV;
1299 }
1300
1301 tpg_set_font(font->data);
1302
1303 n_devs = clamp_t(unsigned, n_devs, 1, VIVID_MAX_DEVS);
1304
1305 for (i = 0; i < n_devs; i++) {
1306 ret = vivid_create_instance(i);
1307 if (ret) {
1308 /* If some instantiations succeeded, keep driver */
1309 if (i)
1310 ret = 0;
1311 break;
1312 }
1313 }
1314
1315 if (ret < 0) {
1316 pr_err("vivid: error %d while loading driver\n", ret);
1317 return ret;
1318 }
1319
1320 /* n_devs will reflect the actual number of allocated devices */
1321 n_devs = i;
1322
1323 return ret;
1324}
1325
1326static void __exit vivid_exit(void)
1327{
1328 struct vivid_dev *dev;
1329 unsigned i;
1330
1331 for (i = 0; vivid_devs[i]; i++) {
1332 dev = vivid_devs[i];
1333
1334 if (dev->has_vid_cap) {
1335 v4l2_info(&dev->v4l2_dev, "unregistering %s\n",
1336 video_device_node_name(&dev->vid_cap_dev));
1337 video_unregister_device(&dev->vid_cap_dev);
1338 }
1339 if (dev->has_vid_out) {
1340 v4l2_info(&dev->v4l2_dev, "unregistering %s\n",
1341 video_device_node_name(&dev->vid_out_dev));
1342 video_unregister_device(&dev->vid_out_dev);
1343 }
1344 if (dev->has_vbi_cap) {
1345 v4l2_info(&dev->v4l2_dev, "unregistering %s\n",
1346 video_device_node_name(&dev->vbi_cap_dev));
1347 video_unregister_device(&dev->vbi_cap_dev);
1348 }
1349 if (dev->has_vbi_out) {
1350 v4l2_info(&dev->v4l2_dev, "unregistering %s\n",
1351 video_device_node_name(&dev->vbi_out_dev));
1352 video_unregister_device(&dev->vbi_out_dev);
1353 }
1354 if (dev->has_sdr_cap) {
1355 v4l2_info(&dev->v4l2_dev, "unregistering %s\n",
1356 video_device_node_name(&dev->sdr_cap_dev));
1357 video_unregister_device(&dev->sdr_cap_dev);
1358 }
1359 if (dev->has_radio_rx) {
1360 v4l2_info(&dev->v4l2_dev, "unregistering %s\n",
1361 video_device_node_name(&dev->radio_rx_dev));
1362 video_unregister_device(&dev->radio_rx_dev);
1363 }
1364 if (dev->has_radio_tx) {
1365 v4l2_info(&dev->v4l2_dev, "unregistering %s\n",
1366 video_device_node_name(&dev->radio_tx_dev));
1367 video_unregister_device(&dev->radio_tx_dev);
1368 }
1369 if (dev->has_fb) {
1370 v4l2_info(&dev->v4l2_dev, "unregistering fb%d\n",
1371 dev->fb_info.node);
1372 unregister_framebuffer(&dev->fb_info);
1373 vivid_fb_release_buffers(dev);
1374 }
1375 v4l2_device_unregister(&dev->v4l2_dev);
1376 vivid_free_controls(dev);
1377 vfree(dev->scaled_line);
1378 vfree(dev->blended_line);
1379 vfree(dev->edid);
1380 vfree(dev->bitmap_cap);
1381 vfree(dev->bitmap_out);
1382 tpg_free(&dev->tpg);
1383 kfree(dev->query_dv_timings_qmenu);
1384 kfree(dev);
1385 vivid_devs[i] = NULL;
1386 }
1387}
1388
1389module_init(vivid_init);
1390module_exit(vivid_exit);
diff --git a/drivers/media/platform/vivid/vivid-core.h b/drivers/media/platform/vivid/vivid-core.h
new file mode 100644
index 000000000000..811c286491a5
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-core.h
@@ -0,0 +1,520 @@
1/*
2 * vivid-core.h - core datastructures
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#ifndef _VIVID_CORE_H_
21#define _VIVID_CORE_H_
22
23#include <linux/fb.h>
24#include <media/videobuf2-core.h>
25#include <media/v4l2-device.h>
26#include <media/v4l2-dev.h>
27#include <media/v4l2-ctrls.h>
28#include "vivid-tpg.h"
29#include "vivid-rds-gen.h"
30#include "vivid-vbi-gen.h"
31
32#define dprintk(dev, level, fmt, arg...) \
33 v4l2_dbg(level, vivid_debug, &dev->v4l2_dev, fmt, ## arg)
34
35/* Maximum allowed frame rate
36 *
37 * vivid will allow setting timeperframe in [1/FPS_MAX - FPS_MAX/1] range.
38 *
39 * Ideally FPS_MAX should be infinity, i.e. practically UINT_MAX, but that
40 * might hit application errors when they manipulate these values.
41 *
42 * Besides, for tpf < 10ms image-generation logic should be changed, to avoid
43 * producing frames with equal content.
44 */
45#define FPS_MAX 100
46
47/* The maximum number of clip rectangles */
48#define MAX_CLIPS 16
49/* The maximum number of inputs */
50#define MAX_INPUTS 16
51/* The maximum number of outputs */
52#define MAX_OUTPUTS 16
53/* The maximum up or down scaling factor is 4 */
54#define MAX_ZOOM 4
55/* The maximum image width/height are set to 4K DMT */
56#define MAX_WIDTH 4096
57#define MAX_HEIGHT 2160
58/* The minimum image width/height */
59#define MIN_WIDTH 16
60#define MIN_HEIGHT 16
61/* The data_offset of plane 0 for the multiplanar formats */
62#define PLANE0_DATA_OFFSET 128
63
64/* The supported TV frequency range in MHz */
65#define MIN_TV_FREQ (44U * 16U)
66#define MAX_TV_FREQ (958U * 16U)
67
68/* The number of samples returned in every SDR buffer */
69#define SDR_CAP_SAMPLES_PER_BUF 0x4000
70
71/* used by the threads to know when to resync internal counters */
72#define JIFFIES_PER_DAY (3600U * 24U * HZ)
73#define JIFFIES_RESYNC (JIFFIES_PER_DAY * (0xf0000000U / JIFFIES_PER_DAY))
74
75extern const struct v4l2_rect vivid_min_rect;
76extern const struct v4l2_rect vivid_max_rect;
77extern unsigned vivid_debug;
78
79struct vivid_fmt {
80 const char *name;
81 u32 fourcc; /* v4l2 format id */
82 u8 depth;
83 bool is_yuv;
84 bool can_do_overlay;
85 u32 alpha_mask;
86 u8 planes;
87 u32 data_offset[2];
88};
89
90extern struct vivid_fmt vivid_formats[];
91
92/* buffer for one video frame */
93struct vivid_buffer {
94 /* common v4l buffer stuff -- must be first */
95 struct vb2_buffer vb;
96 struct list_head list;
97};
98
99enum vivid_input {
100 WEBCAM,
101 TV,
102 SVID,
103 HDMI,
104};
105
106enum vivid_signal_mode {
107 CURRENT_DV_TIMINGS,
108 CURRENT_STD = CURRENT_DV_TIMINGS,
109 NO_SIGNAL,
110 NO_LOCK,
111 OUT_OF_RANGE,
112 SELECTED_DV_TIMINGS,
113 SELECTED_STD = SELECTED_DV_TIMINGS,
114 CYCLE_DV_TIMINGS,
115 CYCLE_STD = CYCLE_DV_TIMINGS,
116 CUSTOM_DV_TIMINGS,
117};
118
119#define VIVID_INVALID_SIGNAL(mode) \
120 ((mode) == NO_SIGNAL || (mode) == NO_LOCK || (mode) == OUT_OF_RANGE)
121
122struct vivid_dev {
123 unsigned inst;
124 struct v4l2_device v4l2_dev;
125 struct v4l2_ctrl_handler ctrl_hdl_user_gen;
126 struct v4l2_ctrl_handler ctrl_hdl_user_vid;
127 struct v4l2_ctrl_handler ctrl_hdl_user_aud;
128 struct v4l2_ctrl_handler ctrl_hdl_streaming;
129 struct v4l2_ctrl_handler ctrl_hdl_sdtv_cap;
130 struct v4l2_ctrl_handler ctrl_hdl_loop_out;
131 struct video_device vid_cap_dev;
132 struct v4l2_ctrl_handler ctrl_hdl_vid_cap;
133 struct video_device vid_out_dev;
134 struct v4l2_ctrl_handler ctrl_hdl_vid_out;
135 struct video_device vbi_cap_dev;
136 struct v4l2_ctrl_handler ctrl_hdl_vbi_cap;
137 struct video_device vbi_out_dev;
138 struct v4l2_ctrl_handler ctrl_hdl_vbi_out;
139 struct video_device radio_rx_dev;
140 struct v4l2_ctrl_handler ctrl_hdl_radio_rx;
141 struct video_device radio_tx_dev;
142 struct v4l2_ctrl_handler ctrl_hdl_radio_tx;
143 struct video_device sdr_cap_dev;
144 struct v4l2_ctrl_handler ctrl_hdl_sdr_cap;
145 spinlock_t slock;
146 struct mutex mutex;
147
148 /* capabilities */
149 u32 vid_cap_caps;
150 u32 vid_out_caps;
151 u32 vbi_cap_caps;
152 u32 vbi_out_caps;
153 u32 sdr_cap_caps;
154 u32 radio_rx_caps;
155 u32 radio_tx_caps;
156
157 /* supported features */
158 bool multiplanar;
159 unsigned num_inputs;
160 u8 input_type[MAX_INPUTS];
161 u8 input_name_counter[MAX_INPUTS];
162 unsigned num_outputs;
163 u8 output_type[MAX_OUTPUTS];
164 u8 output_name_counter[MAX_OUTPUTS];
165 bool has_audio_inputs;
166 bool has_audio_outputs;
167 bool has_vid_cap;
168 bool has_vid_out;
169 bool has_vbi_cap;
170 bool has_raw_vbi_cap;
171 bool has_sliced_vbi_cap;
172 bool has_vbi_out;
173 bool has_raw_vbi_out;
174 bool has_sliced_vbi_out;
175 bool has_radio_rx;
176 bool has_radio_tx;
177 bool has_sdr_cap;
178 bool has_fb;
179
180 bool can_loop_video;
181
182 /* controls */
183 struct v4l2_ctrl *brightness;
184 struct v4l2_ctrl *contrast;
185 struct v4l2_ctrl *saturation;
186 struct v4l2_ctrl *hue;
187 struct {
188 /* autogain/gain cluster */
189 struct v4l2_ctrl *autogain;
190 struct v4l2_ctrl *gain;
191 };
192 struct v4l2_ctrl *volume;
193 struct v4l2_ctrl *mute;
194 struct v4l2_ctrl *alpha;
195 struct v4l2_ctrl *button;
196 struct v4l2_ctrl *boolean;
197 struct v4l2_ctrl *int32;
198 struct v4l2_ctrl *int64;
199 struct v4l2_ctrl *menu;
200 struct v4l2_ctrl *string;
201 struct v4l2_ctrl *bitmask;
202 struct v4l2_ctrl *int_menu;
203 struct v4l2_ctrl *test_pattern;
204 struct v4l2_ctrl *colorspace;
205 struct v4l2_ctrl *rgb_range_cap;
206 struct v4l2_ctrl *real_rgb_range_cap;
207 struct {
208 /* std_signal_mode/standard cluster */
209 struct v4l2_ctrl *ctrl_std_signal_mode;
210 struct v4l2_ctrl *ctrl_standard;
211 };
212 struct {
213 /* dv_timings_signal_mode/timings cluster */
214 struct v4l2_ctrl *ctrl_dv_timings_signal_mode;
215 struct v4l2_ctrl *ctrl_dv_timings;
216 };
217 struct v4l2_ctrl *ctrl_has_crop_cap;
218 struct v4l2_ctrl *ctrl_has_compose_cap;
219 struct v4l2_ctrl *ctrl_has_scaler_cap;
220 struct v4l2_ctrl *ctrl_has_crop_out;
221 struct v4l2_ctrl *ctrl_has_compose_out;
222 struct v4l2_ctrl *ctrl_has_scaler_out;
223 struct v4l2_ctrl *ctrl_tx_mode;
224 struct v4l2_ctrl *ctrl_tx_rgb_range;
225
226 struct v4l2_ctrl *radio_tx_rds_pi;
227 struct v4l2_ctrl *radio_tx_rds_pty;
228 struct v4l2_ctrl *radio_tx_rds_mono_stereo;
229 struct v4l2_ctrl *radio_tx_rds_art_head;
230 struct v4l2_ctrl *radio_tx_rds_compressed;
231 struct v4l2_ctrl *radio_tx_rds_dyn_pty;
232 struct v4l2_ctrl *radio_tx_rds_ta;
233 struct v4l2_ctrl *radio_tx_rds_tp;
234 struct v4l2_ctrl *radio_tx_rds_ms;
235 struct v4l2_ctrl *radio_tx_rds_psname;
236 struct v4l2_ctrl *radio_tx_rds_radiotext;
237
238 struct v4l2_ctrl *radio_rx_rds_pty;
239 struct v4l2_ctrl *radio_rx_rds_ta;
240 struct v4l2_ctrl *radio_rx_rds_tp;
241 struct v4l2_ctrl *radio_rx_rds_ms;
242 struct v4l2_ctrl *radio_rx_rds_psname;
243 struct v4l2_ctrl *radio_rx_rds_radiotext;
244
245 unsigned input_brightness[MAX_INPUTS];
246 unsigned osd_mode;
247 unsigned button_pressed;
248 bool sensor_hflip;
249 bool sensor_vflip;
250 bool hflip;
251 bool vflip;
252 bool vbi_cap_interlaced;
253 bool loop_video;
254
255 /* Framebuffer */
256 unsigned long video_pbase;
257 void *video_vbase;
258 u32 video_buffer_size;
259 int display_width;
260 int display_height;
261 int display_byte_stride;
262 int bits_per_pixel;
263 int bytes_per_pixel;
264 struct fb_info fb_info;
265 struct fb_var_screeninfo fb_defined;
266 struct fb_fix_screeninfo fb_fix;
267
268 /* Error injection */
269 bool queue_setup_error;
270 bool buf_prepare_error;
271 bool start_streaming_error;
272 bool dqbuf_error;
273 bool seq_wrap;
274 bool time_wrap;
275 __kernel_time_t time_wrap_offset;
276 unsigned perc_dropped_buffers;
277 enum vivid_signal_mode std_signal_mode;
278 unsigned query_std_last;
279 v4l2_std_id query_std;
280 enum tpg_video_aspect std_aspect_ratio;
281
282 enum vivid_signal_mode dv_timings_signal_mode;
283 char **query_dv_timings_qmenu;
284 unsigned query_dv_timings_size;
285 unsigned query_dv_timings_last;
286 unsigned query_dv_timings;
287 enum tpg_video_aspect dv_timings_aspect_ratio;
288
289 /* Input */
290 unsigned input;
291 v4l2_std_id std_cap;
292 struct v4l2_dv_timings dv_timings_cap;
293 u32 service_set_cap;
294 struct vivid_vbi_gen_data vbi_gen;
295 u8 *edid;
296 unsigned edid_blocks;
297 unsigned edid_max_blocks;
298 unsigned webcam_size_idx;
299 unsigned webcam_ival_idx;
300 unsigned tv_freq;
301 unsigned tv_audmode;
302 unsigned tv_field_cap;
303 unsigned tv_audio_input;
304
305 /* Capture Overlay */
306 struct v4l2_framebuffer fb_cap;
307 struct v4l2_fh *overlay_cap_owner;
308 void *fb_vbase_cap;
309 int overlay_cap_top, overlay_cap_left;
310 enum v4l2_field overlay_cap_field;
311 void *bitmap_cap;
312 struct v4l2_clip clips_cap[MAX_CLIPS];
313 struct v4l2_clip try_clips_cap[MAX_CLIPS];
314 unsigned clipcount_cap;
315
316 /* Output */
317 unsigned output;
318 v4l2_std_id std_out;
319 struct v4l2_dv_timings dv_timings_out;
320 u32 colorspace_out;
321 u32 service_set_out;
322 u32 bytesperline_out[2];
323 unsigned tv_field_out;
324 unsigned tv_audio_output;
325 bool vbi_out_have_wss;
326 u8 vbi_out_wss[2];
327 bool vbi_out_have_cc[2];
328 u8 vbi_out_cc[2][2];
329 bool dvi_d_out;
330 u8 *scaled_line;
331 u8 *blended_line;
332 unsigned cur_scaled_line;
333
334 /* Output Overlay */
335 void *fb_vbase_out;
336 bool overlay_out_enabled;
337 int overlay_out_top, overlay_out_left;
338 void *bitmap_out;
339 struct v4l2_clip clips_out[MAX_CLIPS];
340 struct v4l2_clip try_clips_out[MAX_CLIPS];
341 unsigned clipcount_out;
342 unsigned fbuf_out_flags;
343 u32 chromakey_out;
344 u8 global_alpha_out;
345
346 /* video capture */
347 struct tpg_data tpg;
348 unsigned ms_vid_cap;
349 bool must_blank[VIDEO_MAX_FRAME];
350
351 const struct vivid_fmt *fmt_cap;
352 struct v4l2_fract timeperframe_vid_cap;
353 enum v4l2_field field_cap;
354 struct v4l2_rect src_rect;
355 struct v4l2_rect fmt_cap_rect;
356 struct v4l2_rect crop_cap;
357 struct v4l2_rect compose_cap;
358 struct v4l2_rect crop_bounds_cap;
359 struct vb2_queue vb_vid_cap_q;
360 struct list_head vid_cap_active;
361 struct vb2_queue vb_vbi_cap_q;
362 struct list_head vbi_cap_active;
363
364 /* thread for generating video capture stream */
365 struct task_struct *kthread_vid_cap;
366 unsigned long jiffies_vid_cap;
367 u32 cap_seq_offset;
368 u32 cap_seq_count;
369 bool cap_seq_resync;
370 u32 vid_cap_seq_start;
371 u32 vid_cap_seq_count;
372 bool vid_cap_streaming;
373 u32 vbi_cap_seq_start;
374 u32 vbi_cap_seq_count;
375 bool vbi_cap_streaming;
376 bool stream_sliced_vbi_cap;
377
378 /* video output */
379 const struct vivid_fmt *fmt_out;
380 struct v4l2_fract timeperframe_vid_out;
381 enum v4l2_field field_out;
382 struct v4l2_rect sink_rect;
383 struct v4l2_rect fmt_out_rect;
384 struct v4l2_rect crop_out;
385 struct v4l2_rect compose_out;
386 struct v4l2_rect compose_bounds_out;
387 struct vb2_queue vb_vid_out_q;
388 struct list_head vid_out_active;
389 struct vb2_queue vb_vbi_out_q;
390 struct list_head vbi_out_active;
391
392 /* video loop precalculated rectangles */
393
394 /*
395 * Intersection between what the output side composes and the capture side
396 * crops. I.e., what actually needs to be copied from the output buffer to
397 * the capture buffer.
398 */
399 struct v4l2_rect loop_vid_copy;
400 /* The part of the output buffer that (after scaling) corresponds to loop_vid_copy. */
401 struct v4l2_rect loop_vid_out;
402 /* The part of the capture buffer that (after scaling) corresponds to loop_vid_copy. */
403 struct v4l2_rect loop_vid_cap;
404 /*
405 * The intersection of the framebuffer, the overlay output window and
406 * loop_vid_copy. I.e., the part of the framebuffer that actually should be
407 * blended with the compose_out rectangle. This uses the framebuffer origin.
408 */
409 struct v4l2_rect loop_fb_copy;
410 /* The same as loop_fb_copy but with compose_out origin. */
411 struct v4l2_rect loop_vid_overlay;
412 /*
413 * The part of the capture buffer that (after scaling) corresponds
414 * to loop_vid_overlay.
415 */
416 struct v4l2_rect loop_vid_overlay_cap;
417
418 /* thread for generating video output stream */
419 struct task_struct *kthread_vid_out;
420 unsigned long jiffies_vid_out;
421 u32 out_seq_offset;
422 u32 out_seq_count;
423 bool out_seq_resync;
424 u32 vid_out_seq_start;
425 u32 vid_out_seq_count;
426 bool vid_out_streaming;
427 u32 vbi_out_seq_start;
428 u32 vbi_out_seq_count;
429 bool vbi_out_streaming;
430 bool stream_sliced_vbi_out;
431
432 /* SDR capture */
433 struct vb2_queue vb_sdr_cap_q;
434 struct list_head sdr_cap_active;
435 unsigned sdr_adc_freq;
436 unsigned sdr_fm_freq;
437 int sdr_fixp_src_phase;
438 int sdr_fixp_mod_phase;
439
440 bool tstamp_src_is_soe;
441 bool has_crop_cap;
442 bool has_compose_cap;
443 bool has_scaler_cap;
444 bool has_crop_out;
445 bool has_compose_out;
446 bool has_scaler_out;
447
448 /* thread for generating SDR stream */
449 struct task_struct *kthread_sdr_cap;
450 unsigned long jiffies_sdr_cap;
451 u32 sdr_cap_seq_offset;
452 u32 sdr_cap_seq_count;
453 bool sdr_cap_seq_resync;
454
455 /* RDS generator */
456 struct vivid_rds_gen rds_gen;
457
458 /* Radio receiver */
459 unsigned radio_rx_freq;
460 unsigned radio_rx_audmode;
461 int radio_rx_sig_qual;
462 unsigned radio_rx_hw_seek_mode;
463 bool radio_rx_hw_seek_prog_lim;
464 bool radio_rx_rds_controls;
465 bool radio_rx_rds_enabled;
466 unsigned radio_rx_rds_use_alternates;
467 unsigned radio_rx_rds_last_block;
468 struct v4l2_fh *radio_rx_rds_owner;
469
470 /* Radio transmitter */
471 unsigned radio_tx_freq;
472 unsigned radio_tx_subchans;
473 bool radio_tx_rds_controls;
474 unsigned radio_tx_rds_last_block;
475 struct v4l2_fh *radio_tx_rds_owner;
476
477 /* Shared between radio receiver and transmitter */
478 bool radio_rds_loop;
479 struct timespec radio_rds_init_ts;
480};
481
482static inline bool vivid_is_webcam(const struct vivid_dev *dev)
483{
484 return dev->input_type[dev->input] == WEBCAM;
485}
486
487static inline bool vivid_is_tv_cap(const struct vivid_dev *dev)
488{
489 return dev->input_type[dev->input] == TV;
490}
491
492static inline bool vivid_is_svid_cap(const struct vivid_dev *dev)
493{
494 return dev->input_type[dev->input] == SVID;
495}
496
497static inline bool vivid_is_hdmi_cap(const struct vivid_dev *dev)
498{
499 return dev->input_type[dev->input] == HDMI;
500}
501
502static inline bool vivid_is_sdtv_cap(const struct vivid_dev *dev)
503{
504 return vivid_is_tv_cap(dev) || vivid_is_svid_cap(dev);
505}
506
507static inline bool vivid_is_svid_out(const struct vivid_dev *dev)
508{
509 return dev->output_type[dev->output] == SVID;
510}
511
512static inline bool vivid_is_hdmi_out(const struct vivid_dev *dev)
513{
514 return dev->output_type[dev->output] == HDMI;
515}
516
517void vivid_lock(struct vb2_queue *vq);
518void vivid_unlock(struct vb2_queue *vq);
519
520#endif
diff --git a/drivers/media/platform/vivid/vivid-ctrls.c b/drivers/media/platform/vivid/vivid-ctrls.c
new file mode 100644
index 000000000000..d5cbf0038f24
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-ctrls.c
@@ -0,0 +1,1502 @@
1/*
2 * vivid-ctrls.c - control support functions.
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#include <linux/errno.h>
21#include <linux/kernel.h>
22#include <linux/videodev2.h>
23#include <media/v4l2-event.h>
24#include <media/v4l2-common.h>
25
26#include "vivid-core.h"
27#include "vivid-vid-cap.h"
28#include "vivid-vid-out.h"
29#include "vivid-vid-common.h"
30#include "vivid-radio-common.h"
31#include "vivid-osd.h"
32#include "vivid-ctrls.h"
33
34#define VIVID_CID_CUSTOM_BASE (V4L2_CID_USER_BASE | 0xf000)
35#define VIVID_CID_BUTTON (VIVID_CID_CUSTOM_BASE + 0)
36#define VIVID_CID_BOOLEAN (VIVID_CID_CUSTOM_BASE + 1)
37#define VIVID_CID_INTEGER (VIVID_CID_CUSTOM_BASE + 2)
38#define VIVID_CID_INTEGER64 (VIVID_CID_CUSTOM_BASE + 3)
39#define VIVID_CID_MENU (VIVID_CID_CUSTOM_BASE + 4)
40#define VIVID_CID_STRING (VIVID_CID_CUSTOM_BASE + 5)
41#define VIVID_CID_BITMASK (VIVID_CID_CUSTOM_BASE + 6)
42#define VIVID_CID_INTMENU (VIVID_CID_CUSTOM_BASE + 7)
43
44#define VIVID_CID_VIVID_BASE (0x00f00000 | 0xf000)
45#define VIVID_CID_VIVID_CLASS (0x00f00000 | 1)
46#define VIVID_CID_TEST_PATTERN (VIVID_CID_VIVID_BASE + 0)
47#define VIVID_CID_OSD_TEXT_MODE (VIVID_CID_VIVID_BASE + 1)
48#define VIVID_CID_HOR_MOVEMENT (VIVID_CID_VIVID_BASE + 2)
49#define VIVID_CID_VERT_MOVEMENT (VIVID_CID_VIVID_BASE + 3)
50#define VIVID_CID_SHOW_BORDER (VIVID_CID_VIVID_BASE + 4)
51#define VIVID_CID_SHOW_SQUARE (VIVID_CID_VIVID_BASE + 5)
52#define VIVID_CID_INSERT_SAV (VIVID_CID_VIVID_BASE + 6)
53#define VIVID_CID_INSERT_EAV (VIVID_CID_VIVID_BASE + 7)
54#define VIVID_CID_VBI_CAP_INTERLACED (VIVID_CID_VIVID_BASE + 8)
55
56#define VIVID_CID_HFLIP (VIVID_CID_VIVID_BASE + 20)
57#define VIVID_CID_VFLIP (VIVID_CID_VIVID_BASE + 21)
58#define VIVID_CID_STD_ASPECT_RATIO (VIVID_CID_VIVID_BASE + 22)
59#define VIVID_CID_DV_TIMINGS_ASPECT_RATIO (VIVID_CID_VIVID_BASE + 23)
60#define VIVID_CID_TSTAMP_SRC (VIVID_CID_VIVID_BASE + 24)
61#define VIVID_CID_COLORSPACE (VIVID_CID_VIVID_BASE + 25)
62#define VIVID_CID_LIMITED_RGB_RANGE (VIVID_CID_VIVID_BASE + 26)
63#define VIVID_CID_ALPHA_MODE (VIVID_CID_VIVID_BASE + 27)
64#define VIVID_CID_HAS_CROP_CAP (VIVID_CID_VIVID_BASE + 28)
65#define VIVID_CID_HAS_COMPOSE_CAP (VIVID_CID_VIVID_BASE + 29)
66#define VIVID_CID_HAS_SCALER_CAP (VIVID_CID_VIVID_BASE + 30)
67#define VIVID_CID_HAS_CROP_OUT (VIVID_CID_VIVID_BASE + 31)
68#define VIVID_CID_HAS_COMPOSE_OUT (VIVID_CID_VIVID_BASE + 32)
69#define VIVID_CID_HAS_SCALER_OUT (VIVID_CID_VIVID_BASE + 33)
70#define VIVID_CID_LOOP_VIDEO (VIVID_CID_VIVID_BASE + 34)
71#define VIVID_CID_SEQ_WRAP (VIVID_CID_VIVID_BASE + 35)
72#define VIVID_CID_TIME_WRAP (VIVID_CID_VIVID_BASE + 36)
73#define VIVID_CID_MAX_EDID_BLOCKS (VIVID_CID_VIVID_BASE + 37)
74#define VIVID_CID_PERCENTAGE_FILL (VIVID_CID_VIVID_BASE + 38)
75
76#define VIVID_CID_STD_SIGNAL_MODE (VIVID_CID_VIVID_BASE + 60)
77#define VIVID_CID_STANDARD (VIVID_CID_VIVID_BASE + 61)
78#define VIVID_CID_DV_TIMINGS_SIGNAL_MODE (VIVID_CID_VIVID_BASE + 62)
79#define VIVID_CID_DV_TIMINGS (VIVID_CID_VIVID_BASE + 63)
80#define VIVID_CID_PERC_DROPPED (VIVID_CID_VIVID_BASE + 64)
81#define VIVID_CID_DISCONNECT (VIVID_CID_VIVID_BASE + 65)
82#define VIVID_CID_DQBUF_ERROR (VIVID_CID_VIVID_BASE + 66)
83#define VIVID_CID_QUEUE_SETUP_ERROR (VIVID_CID_VIVID_BASE + 67)
84#define VIVID_CID_BUF_PREPARE_ERROR (VIVID_CID_VIVID_BASE + 68)
85#define VIVID_CID_START_STR_ERROR (VIVID_CID_VIVID_BASE + 69)
86#define VIVID_CID_QUEUE_ERROR (VIVID_CID_VIVID_BASE + 70)
87#define VIVID_CID_CLEAR_FB (VIVID_CID_VIVID_BASE + 71)
88
89#define VIVID_CID_RADIO_SEEK_MODE (VIVID_CID_VIVID_BASE + 90)
90#define VIVID_CID_RADIO_SEEK_PROG_LIM (VIVID_CID_VIVID_BASE + 91)
91#define VIVID_CID_RADIO_RX_RDS_RBDS (VIVID_CID_VIVID_BASE + 92)
92#define VIVID_CID_RADIO_RX_RDS_BLOCKIO (VIVID_CID_VIVID_BASE + 93)
93
94#define VIVID_CID_RADIO_TX_RDS_BLOCKIO (VIVID_CID_VIVID_BASE + 94)
95
96
97/* General User Controls */
98
99static int vivid_user_gen_s_ctrl(struct v4l2_ctrl *ctrl)
100{
101 struct vivid_dev *dev = container_of(ctrl->handler, struct vivid_dev, ctrl_hdl_user_gen);
102
103 switch (ctrl->id) {
104 case VIVID_CID_DISCONNECT:
105 v4l2_info(&dev->v4l2_dev, "disconnect\n");
106 clear_bit(V4L2_FL_REGISTERED, &dev->vid_cap_dev.flags);
107 clear_bit(V4L2_FL_REGISTERED, &dev->vid_out_dev.flags);
108 clear_bit(V4L2_FL_REGISTERED, &dev->vbi_cap_dev.flags);
109 clear_bit(V4L2_FL_REGISTERED, &dev->vbi_out_dev.flags);
110 clear_bit(V4L2_FL_REGISTERED, &dev->sdr_cap_dev.flags);
111 clear_bit(V4L2_FL_REGISTERED, &dev->radio_rx_dev.flags);
112 clear_bit(V4L2_FL_REGISTERED, &dev->radio_tx_dev.flags);
113 break;
114 case VIVID_CID_CLEAR_FB:
115 vivid_clear_fb(dev);
116 break;
117 case VIVID_CID_BUTTON:
118 dev->button_pressed = 30;
119 break;
120 }
121 return 0;
122}
123
124static const struct v4l2_ctrl_ops vivid_user_gen_ctrl_ops = {
125 .s_ctrl = vivid_user_gen_s_ctrl,
126};
127
128static const struct v4l2_ctrl_config vivid_ctrl_button = {
129 .ops = &vivid_user_gen_ctrl_ops,
130 .id = VIVID_CID_BUTTON,
131 .name = "Button",
132 .type = V4L2_CTRL_TYPE_BUTTON,
133};
134
135static const struct v4l2_ctrl_config vivid_ctrl_boolean = {
136 .ops = &vivid_user_gen_ctrl_ops,
137 .id = VIVID_CID_BOOLEAN,
138 .name = "Boolean",
139 .type = V4L2_CTRL_TYPE_BOOLEAN,
140 .min = 0,
141 .max = 1,
142 .step = 1,
143 .def = 1,
144};
145
146static const struct v4l2_ctrl_config vivid_ctrl_int32 = {
147 .ops = &vivid_user_gen_ctrl_ops,
148 .id = VIVID_CID_INTEGER,
149 .name = "Integer 32 Bits",
150 .type = V4L2_CTRL_TYPE_INTEGER,
151 .min = 0xffffffff80000000ULL,
152 .max = 0x7fffffff,
153 .step = 1,
154};
155
156static const struct v4l2_ctrl_config vivid_ctrl_int64 = {
157 .ops = &vivid_user_gen_ctrl_ops,
158 .id = VIVID_CID_INTEGER64,
159 .name = "Integer 64 Bits",
160 .type = V4L2_CTRL_TYPE_INTEGER64,
161 .min = 0x8000000000000000ULL,
162 .max = 0x7fffffffffffffffLL,
163 .step = 1,
164};
165
166static const char * const vivid_ctrl_menu_strings[] = {
167 "Menu Item 0 (Skipped)",
168 "Menu Item 1",
169 "Menu Item 2 (Skipped)",
170 "Menu Item 3",
171 "Menu Item 4",
172 "Menu Item 5 (Skipped)",
173 NULL,
174};
175
176static const struct v4l2_ctrl_config vivid_ctrl_menu = {
177 .ops = &vivid_user_gen_ctrl_ops,
178 .id = VIVID_CID_MENU,
179 .name = "Menu",
180 .type = V4L2_CTRL_TYPE_MENU,
181 .min = 1,
182 .max = 4,
183 .def = 3,
184 .menu_skip_mask = 0x04,
185 .qmenu = vivid_ctrl_menu_strings,
186};
187
188static const struct v4l2_ctrl_config vivid_ctrl_string = {
189 .ops = &vivid_user_gen_ctrl_ops,
190 .id = VIVID_CID_STRING,
191 .name = "String",
192 .type = V4L2_CTRL_TYPE_STRING,
193 .min = 2,
194 .max = 4,
195 .step = 1,
196};
197
198static const struct v4l2_ctrl_config vivid_ctrl_bitmask = {
199 .ops = &vivid_user_gen_ctrl_ops,
200 .id = VIVID_CID_BITMASK,
201 .name = "Bitmask",
202 .type = V4L2_CTRL_TYPE_BITMASK,
203 .def = 0x80002000,
204 .min = 0,
205 .max = 0x80402010,
206 .step = 0,
207};
208
209static const s64 vivid_ctrl_int_menu_values[] = {
210 1, 1, 2, 3, 5, 8, 13, 21, 42,
211};
212
213static const struct v4l2_ctrl_config vivid_ctrl_int_menu = {
214 .ops = &vivid_user_gen_ctrl_ops,
215 .id = VIVID_CID_INTMENU,
216 .name = "Integer Menu",
217 .type = V4L2_CTRL_TYPE_INTEGER_MENU,
218 .min = 1,
219 .max = 8,
220 .def = 4,
221 .menu_skip_mask = 0x02,
222 .qmenu_int = vivid_ctrl_int_menu_values,
223};
224
225static const struct v4l2_ctrl_config vivid_ctrl_disconnect = {
226 .ops = &vivid_user_gen_ctrl_ops,
227 .id = VIVID_CID_DISCONNECT,
228 .name = "Disconnect",
229 .type = V4L2_CTRL_TYPE_BUTTON,
230};
231
232static const struct v4l2_ctrl_config vivid_ctrl_clear_fb = {
233 .ops = &vivid_user_gen_ctrl_ops,
234 .id = VIVID_CID_CLEAR_FB,
235 .name = "Clear Framebuffer",
236 .type = V4L2_CTRL_TYPE_BUTTON,
237};
238
239
240/* Video User Controls */
241
242static int vivid_user_vid_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
243{
244 struct vivid_dev *dev = container_of(ctrl->handler, struct vivid_dev, ctrl_hdl_user_vid);
245
246 switch (ctrl->id) {
247 case V4L2_CID_AUTOGAIN:
248 dev->gain->val = dev->jiffies_vid_cap & 0xff;
249 break;
250 }
251 return 0;
252}
253
254static int vivid_user_vid_s_ctrl(struct v4l2_ctrl *ctrl)
255{
256 struct vivid_dev *dev = container_of(ctrl->handler, struct vivid_dev, ctrl_hdl_user_vid);
257
258 switch (ctrl->id) {
259 case V4L2_CID_BRIGHTNESS:
260 dev->input_brightness[dev->input] = ctrl->val - dev->input * 128;
261 tpg_s_brightness(&dev->tpg, dev->input_brightness[dev->input]);
262 break;
263 case V4L2_CID_CONTRAST:
264 tpg_s_contrast(&dev->tpg, ctrl->val);
265 break;
266 case V4L2_CID_SATURATION:
267 tpg_s_saturation(&dev->tpg, ctrl->val);
268 break;
269 case V4L2_CID_HUE:
270 tpg_s_hue(&dev->tpg, ctrl->val);
271 break;
272 case V4L2_CID_HFLIP:
273 dev->hflip = ctrl->val;
274 tpg_s_hflip(&dev->tpg, dev->sensor_hflip ^ dev->hflip);
275 break;
276 case V4L2_CID_VFLIP:
277 dev->vflip = ctrl->val;
278 tpg_s_vflip(&dev->tpg, dev->sensor_vflip ^ dev->vflip);
279 break;
280 case V4L2_CID_ALPHA_COMPONENT:
281 tpg_s_alpha_component(&dev->tpg, ctrl->val);
282 break;
283 }
284 return 0;
285}
286
287static const struct v4l2_ctrl_ops vivid_user_vid_ctrl_ops = {
288 .g_volatile_ctrl = vivid_user_vid_g_volatile_ctrl,
289 .s_ctrl = vivid_user_vid_s_ctrl,
290};
291
292
293/* Video Capture Controls */
294
295static int vivid_vid_cap_s_ctrl(struct v4l2_ctrl *ctrl)
296{
297 struct vivid_dev *dev = container_of(ctrl->handler, struct vivid_dev, ctrl_hdl_vid_cap);
298 unsigned i;
299
300 switch (ctrl->id) {
301 case VIVID_CID_TEST_PATTERN:
302 vivid_update_quality(dev);
303 tpg_s_pattern(&dev->tpg, ctrl->val);
304 break;
305 case VIVID_CID_COLORSPACE:
306 tpg_s_colorspace(&dev->tpg, ctrl->val);
307 vivid_send_source_change(dev, TV);
308 vivid_send_source_change(dev, SVID);
309 vivid_send_source_change(dev, HDMI);
310 vivid_send_source_change(dev, WEBCAM);
311 break;
312 case V4L2_CID_DV_RX_RGB_RANGE:
313 if (!vivid_is_hdmi_cap(dev))
314 break;
315 tpg_s_rgb_range(&dev->tpg, ctrl->val);
316 break;
317 case VIVID_CID_LIMITED_RGB_RANGE:
318 tpg_s_real_rgb_range(&dev->tpg, ctrl->val ?
319 V4L2_DV_RGB_RANGE_LIMITED : V4L2_DV_RGB_RANGE_FULL);
320 break;
321 case VIVID_CID_ALPHA_MODE:
322 tpg_s_alpha_mode(&dev->tpg, ctrl->val);
323 break;
324 case VIVID_CID_HOR_MOVEMENT:
325 tpg_s_mv_hor_mode(&dev->tpg, ctrl->val);
326 break;
327 case VIVID_CID_VERT_MOVEMENT:
328 tpg_s_mv_vert_mode(&dev->tpg, ctrl->val);
329 break;
330 case VIVID_CID_OSD_TEXT_MODE:
331 dev->osd_mode = ctrl->val;
332 break;
333 case VIVID_CID_PERCENTAGE_FILL:
334 tpg_s_perc_fill(&dev->tpg, ctrl->val);
335 for (i = 0; i < VIDEO_MAX_FRAME; i++)
336 dev->must_blank[i] = ctrl->val < 100;
337 break;
338 case VIVID_CID_INSERT_SAV:
339 tpg_s_insert_sav(&dev->tpg, ctrl->val);
340 break;
341 case VIVID_CID_INSERT_EAV:
342 tpg_s_insert_eav(&dev->tpg, ctrl->val);
343 break;
344 case VIVID_CID_HFLIP:
345 dev->sensor_hflip = ctrl->val;
346 tpg_s_hflip(&dev->tpg, dev->sensor_hflip ^ dev->hflip);
347 break;
348 case VIVID_CID_VFLIP:
349 dev->sensor_vflip = ctrl->val;
350 tpg_s_vflip(&dev->tpg, dev->sensor_vflip ^ dev->vflip);
351 break;
352 case VIVID_CID_HAS_CROP_CAP:
353 dev->has_crop_cap = ctrl->val;
354 vivid_update_format_cap(dev, true);
355 break;
356 case VIVID_CID_HAS_COMPOSE_CAP:
357 dev->has_compose_cap = ctrl->val;
358 vivid_update_format_cap(dev, true);
359 break;
360 case VIVID_CID_HAS_SCALER_CAP:
361 dev->has_scaler_cap = ctrl->val;
362 vivid_update_format_cap(dev, true);
363 break;
364 case VIVID_CID_SHOW_BORDER:
365 tpg_s_show_border(&dev->tpg, ctrl->val);
366 break;
367 case VIVID_CID_SHOW_SQUARE:
368 tpg_s_show_square(&dev->tpg, ctrl->val);
369 break;
370 case VIVID_CID_STD_ASPECT_RATIO:
371 dev->std_aspect_ratio = ctrl->val;
372 tpg_s_video_aspect(&dev->tpg, vivid_get_video_aspect(dev));
373 break;
374 case VIVID_CID_DV_TIMINGS_SIGNAL_MODE:
375 dev->dv_timings_signal_mode = dev->ctrl_dv_timings_signal_mode->val;
376 if (dev->dv_timings_signal_mode == SELECTED_DV_TIMINGS)
377 dev->query_dv_timings = dev->ctrl_dv_timings->val;
378 v4l2_ctrl_activate(dev->ctrl_dv_timings,
379 dev->dv_timings_signal_mode == SELECTED_DV_TIMINGS);
380 vivid_update_quality(dev);
381 vivid_send_source_change(dev, HDMI);
382 break;
383 case VIVID_CID_DV_TIMINGS_ASPECT_RATIO:
384 dev->dv_timings_aspect_ratio = ctrl->val;
385 tpg_s_video_aspect(&dev->tpg, vivid_get_video_aspect(dev));
386 break;
387 case VIVID_CID_TSTAMP_SRC:
388 dev->tstamp_src_is_soe = ctrl->val;
389 dev->vb_vid_cap_q.timestamp_flags &= ~V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
390 if (dev->tstamp_src_is_soe)
391 dev->vb_vid_cap_q.timestamp_flags |= V4L2_BUF_FLAG_TSTAMP_SRC_SOE;
392 break;
393 case VIVID_CID_MAX_EDID_BLOCKS:
394 dev->edid_max_blocks = ctrl->val;
395 if (dev->edid_blocks > dev->edid_max_blocks)
396 dev->edid_blocks = dev->edid_max_blocks;
397 break;
398 }
399 return 0;
400}
401
402static const struct v4l2_ctrl_ops vivid_vid_cap_ctrl_ops = {
403 .s_ctrl = vivid_vid_cap_s_ctrl,
404};
405
406static const char * const vivid_ctrl_hor_movement_strings[] = {
407 "Move Left Fast",
408 "Move Left",
409 "Move Left Slow",
410 "No Movement",
411 "Move Right Slow",
412 "Move Right",
413 "Move Right Fast",
414 NULL,
415};
416
417static const struct v4l2_ctrl_config vivid_ctrl_hor_movement = {
418 .ops = &vivid_vid_cap_ctrl_ops,
419 .id = VIVID_CID_HOR_MOVEMENT,
420 .name = "Horizontal Movement",
421 .type = V4L2_CTRL_TYPE_MENU,
422 .max = TPG_MOVE_POS_FAST,
423 .def = TPG_MOVE_NONE,
424 .qmenu = vivid_ctrl_hor_movement_strings,
425};
426
427static const char * const vivid_ctrl_vert_movement_strings[] = {
428 "Move Up Fast",
429 "Move Up",
430 "Move Up Slow",
431 "No Movement",
432 "Move Down Slow",
433 "Move Down",
434 "Move Down Fast",
435 NULL,
436};
437
438static const struct v4l2_ctrl_config vivid_ctrl_vert_movement = {
439 .ops = &vivid_vid_cap_ctrl_ops,
440 .id = VIVID_CID_VERT_MOVEMENT,
441 .name = "Vertical Movement",
442 .type = V4L2_CTRL_TYPE_MENU,
443 .max = TPG_MOVE_POS_FAST,
444 .def = TPG_MOVE_NONE,
445 .qmenu = vivid_ctrl_vert_movement_strings,
446};
447
448static const struct v4l2_ctrl_config vivid_ctrl_show_border = {
449 .ops = &vivid_vid_cap_ctrl_ops,
450 .id = VIVID_CID_SHOW_BORDER,
451 .name = "Show Border",
452 .type = V4L2_CTRL_TYPE_BOOLEAN,
453 .max = 1,
454 .step = 1,
455};
456
457static const struct v4l2_ctrl_config vivid_ctrl_show_square = {
458 .ops = &vivid_vid_cap_ctrl_ops,
459 .id = VIVID_CID_SHOW_SQUARE,
460 .name = "Show Square",
461 .type = V4L2_CTRL_TYPE_BOOLEAN,
462 .max = 1,
463 .step = 1,
464};
465
466static const char * const vivid_ctrl_osd_mode_strings[] = {
467 "All",
468 "Counters Only",
469 "None",
470 NULL,
471};
472
473static const struct v4l2_ctrl_config vivid_ctrl_osd_mode = {
474 .ops = &vivid_vid_cap_ctrl_ops,
475 .id = VIVID_CID_OSD_TEXT_MODE,
476 .name = "OSD Text Mode",
477 .type = V4L2_CTRL_TYPE_MENU,
478 .max = 2,
479 .qmenu = vivid_ctrl_osd_mode_strings,
480};
481
482static const struct v4l2_ctrl_config vivid_ctrl_perc_fill = {
483 .ops = &vivid_vid_cap_ctrl_ops,
484 .id = VIVID_CID_PERCENTAGE_FILL,
485 .name = "Fill Percentage of Frame",
486 .type = V4L2_CTRL_TYPE_INTEGER,
487 .min = 0,
488 .max = 100,
489 .def = 100,
490 .step = 1,
491};
492
493static const struct v4l2_ctrl_config vivid_ctrl_insert_sav = {
494 .ops = &vivid_vid_cap_ctrl_ops,
495 .id = VIVID_CID_INSERT_SAV,
496 .name = "Insert SAV Code in Image",
497 .type = V4L2_CTRL_TYPE_BOOLEAN,
498 .max = 1,
499 .step = 1,
500};
501
502static const struct v4l2_ctrl_config vivid_ctrl_insert_eav = {
503 .ops = &vivid_vid_cap_ctrl_ops,
504 .id = VIVID_CID_INSERT_EAV,
505 .name = "Insert EAV Code in Image",
506 .type = V4L2_CTRL_TYPE_BOOLEAN,
507 .max = 1,
508 .step = 1,
509};
510
511static const struct v4l2_ctrl_config vivid_ctrl_hflip = {
512 .ops = &vivid_vid_cap_ctrl_ops,
513 .id = VIVID_CID_HFLIP,
514 .name = "Sensor Flipped Horizontally",
515 .type = V4L2_CTRL_TYPE_BOOLEAN,
516 .max = 1,
517 .step = 1,
518};
519
520static const struct v4l2_ctrl_config vivid_ctrl_vflip = {
521 .ops = &vivid_vid_cap_ctrl_ops,
522 .id = VIVID_CID_VFLIP,
523 .name = "Sensor Flipped Vertically",
524 .type = V4L2_CTRL_TYPE_BOOLEAN,
525 .max = 1,
526 .step = 1,
527};
528
529static const struct v4l2_ctrl_config vivid_ctrl_has_crop_cap = {
530 .ops = &vivid_vid_cap_ctrl_ops,
531 .id = VIVID_CID_HAS_CROP_CAP,
532 .name = "Enable Capture Cropping",
533 .type = V4L2_CTRL_TYPE_BOOLEAN,
534 .max = 1,
535 .def = 1,
536 .step = 1,
537};
538
539static const struct v4l2_ctrl_config vivid_ctrl_has_compose_cap = {
540 .ops = &vivid_vid_cap_ctrl_ops,
541 .id = VIVID_CID_HAS_COMPOSE_CAP,
542 .name = "Enable Capture Composing",
543 .type = V4L2_CTRL_TYPE_BOOLEAN,
544 .max = 1,
545 .def = 1,
546 .step = 1,
547};
548
549static const struct v4l2_ctrl_config vivid_ctrl_has_scaler_cap = {
550 .ops = &vivid_vid_cap_ctrl_ops,
551 .id = VIVID_CID_HAS_SCALER_CAP,
552 .name = "Enable Capture Scaler",
553 .type = V4L2_CTRL_TYPE_BOOLEAN,
554 .max = 1,
555 .def = 1,
556 .step = 1,
557};
558
559static const char * const vivid_ctrl_tstamp_src_strings[] = {
560 "End of Frame",
561 "Start of Exposure",
562 NULL,
563};
564
565static const struct v4l2_ctrl_config vivid_ctrl_tstamp_src = {
566 .ops = &vivid_vid_cap_ctrl_ops,
567 .id = VIVID_CID_TSTAMP_SRC,
568 .name = "Timestamp Source",
569 .type = V4L2_CTRL_TYPE_MENU,
570 .max = 1,
571 .qmenu = vivid_ctrl_tstamp_src_strings,
572};
573
574static const struct v4l2_ctrl_config vivid_ctrl_std_aspect_ratio = {
575 .ops = &vivid_vid_cap_ctrl_ops,
576 .id = VIVID_CID_STD_ASPECT_RATIO,
577 .name = "Standard Aspect Ratio",
578 .type = V4L2_CTRL_TYPE_MENU,
579 .min = 1,
580 .max = 4,
581 .def = 1,
582 .qmenu = tpg_aspect_strings,
583};
584
585static const char * const vivid_ctrl_dv_timings_signal_mode_strings[] = {
586 "Current DV Timings",
587 "No Signal",
588 "No Lock",
589 "Out of Range",
590 "Selected DV Timings",
591 "Cycle Through All DV Timings",
592 "Custom DV Timings",
593 NULL,
594};
595
596static const struct v4l2_ctrl_config vivid_ctrl_dv_timings_signal_mode = {
597 .ops = &vivid_vid_cap_ctrl_ops,
598 .id = VIVID_CID_DV_TIMINGS_SIGNAL_MODE,
599 .name = "DV Timings Signal Mode",
600 .type = V4L2_CTRL_TYPE_MENU,
601 .max = 5,
602 .qmenu = vivid_ctrl_dv_timings_signal_mode_strings,
603};
604
605static const struct v4l2_ctrl_config vivid_ctrl_dv_timings_aspect_ratio = {
606 .ops = &vivid_vid_cap_ctrl_ops,
607 .id = VIVID_CID_DV_TIMINGS_ASPECT_RATIO,
608 .name = "DV Timings Aspect Ratio",
609 .type = V4L2_CTRL_TYPE_MENU,
610 .max = 3,
611 .qmenu = tpg_aspect_strings,
612};
613
614static const struct v4l2_ctrl_config vivid_ctrl_max_edid_blocks = {
615 .ops = &vivid_vid_cap_ctrl_ops,
616 .id = VIVID_CID_MAX_EDID_BLOCKS,
617 .name = "Maximum EDID Blocks",
618 .type = V4L2_CTRL_TYPE_INTEGER,
619 .min = 1,
620 .max = 256,
621 .def = 2,
622 .step = 1,
623};
624
625static const char * const vivid_ctrl_colorspace_strings[] = {
626 "",
627 "SMPTE 170M",
628 "SMPTE 240M",
629 "REC 709",
630 "", /* Skip Bt878 entry */
631 "470 System M",
632 "470 System BG",
633 "", /* Skip JPEG entry */
634 "sRGB",
635 NULL,
636};
637
638static const struct v4l2_ctrl_config vivid_ctrl_colorspace = {
639 .ops = &vivid_vid_cap_ctrl_ops,
640 .id = VIVID_CID_COLORSPACE,
641 .name = "Colorspace",
642 .type = V4L2_CTRL_TYPE_MENU,
643 .min = 1,
644 .max = 8,
645 .menu_skip_mask = (1 << 4) | (1 << 7),
646 .def = 8,
647 .qmenu = vivid_ctrl_colorspace_strings,
648};
649
650static const struct v4l2_ctrl_config vivid_ctrl_alpha_mode = {
651 .ops = &vivid_vid_cap_ctrl_ops,
652 .id = VIVID_CID_ALPHA_MODE,
653 .name = "Apply Alpha To Red Only",
654 .type = V4L2_CTRL_TYPE_BOOLEAN,
655 .max = 1,
656 .step = 1,
657};
658
659static const struct v4l2_ctrl_config vivid_ctrl_limited_rgb_range = {
660 .ops = &vivid_vid_cap_ctrl_ops,
661 .id = VIVID_CID_LIMITED_RGB_RANGE,
662 .name = "Limited RGB Range (16-235)",
663 .type = V4L2_CTRL_TYPE_BOOLEAN,
664 .max = 1,
665 .step = 1,
666};
667
668
669/* VBI Capture Control */
670
671static int vivid_vbi_cap_s_ctrl(struct v4l2_ctrl *ctrl)
672{
673 struct vivid_dev *dev = container_of(ctrl->handler, struct vivid_dev, ctrl_hdl_vbi_cap);
674
675 switch (ctrl->id) {
676 case VIVID_CID_VBI_CAP_INTERLACED:
677 dev->vbi_cap_interlaced = ctrl->val;
678 break;
679 }
680 return 0;
681}
682
683static const struct v4l2_ctrl_ops vivid_vbi_cap_ctrl_ops = {
684 .s_ctrl = vivid_vbi_cap_s_ctrl,
685};
686
687static const struct v4l2_ctrl_config vivid_ctrl_vbi_cap_interlaced = {
688 .ops = &vivid_vbi_cap_ctrl_ops,
689 .id = VIVID_CID_VBI_CAP_INTERLACED,
690 .name = "Interlaced VBI Format",
691 .type = V4L2_CTRL_TYPE_BOOLEAN,
692 .max = 1,
693 .step = 1,
694};
695
696
697/* Video Output Controls */
698
699static int vivid_vid_out_s_ctrl(struct v4l2_ctrl *ctrl)
700{
701 struct vivid_dev *dev = container_of(ctrl->handler, struct vivid_dev, ctrl_hdl_vid_out);
702 struct v4l2_bt_timings *bt = &dev->dv_timings_out.bt;
703
704 switch (ctrl->id) {
705 case VIVID_CID_HAS_CROP_OUT:
706 dev->has_crop_out = ctrl->val;
707 vivid_update_format_out(dev);
708 break;
709 case VIVID_CID_HAS_COMPOSE_OUT:
710 dev->has_compose_out = ctrl->val;
711 vivid_update_format_out(dev);
712 break;
713 case VIVID_CID_HAS_SCALER_OUT:
714 dev->has_scaler_out = ctrl->val;
715 vivid_update_format_out(dev);
716 break;
717 case V4L2_CID_DV_TX_MODE:
718 dev->dvi_d_out = ctrl->val == V4L2_DV_TX_MODE_DVI_D;
719 if (!vivid_is_hdmi_out(dev))
720 break;
721 if (!dev->dvi_d_out && (bt->standards & V4L2_DV_BT_STD_CEA861)) {
722 if (bt->width == 720 && bt->height <= 576)
723 dev->colorspace_out = V4L2_COLORSPACE_SMPTE170M;
724 else
725 dev->colorspace_out = V4L2_COLORSPACE_REC709;
726 } else {
727 dev->colorspace_out = V4L2_COLORSPACE_SRGB;
728 }
729 if (dev->loop_video)
730 vivid_send_source_change(dev, HDMI);
731 break;
732 }
733 return 0;
734}
735
736static const struct v4l2_ctrl_ops vivid_vid_out_ctrl_ops = {
737 .s_ctrl = vivid_vid_out_s_ctrl,
738};
739
740static const struct v4l2_ctrl_config vivid_ctrl_has_crop_out = {
741 .ops = &vivid_vid_out_ctrl_ops,
742 .id = VIVID_CID_HAS_CROP_OUT,
743 .name = "Enable Output Cropping",
744 .type = V4L2_CTRL_TYPE_BOOLEAN,
745 .max = 1,
746 .def = 1,
747 .step = 1,
748};
749
750static const struct v4l2_ctrl_config vivid_ctrl_has_compose_out = {
751 .ops = &vivid_vid_out_ctrl_ops,
752 .id = VIVID_CID_HAS_COMPOSE_OUT,
753 .name = "Enable Output Composing",
754 .type = V4L2_CTRL_TYPE_BOOLEAN,
755 .max = 1,
756 .def = 1,
757 .step = 1,
758};
759
760static const struct v4l2_ctrl_config vivid_ctrl_has_scaler_out = {
761 .ops = &vivid_vid_out_ctrl_ops,
762 .id = VIVID_CID_HAS_SCALER_OUT,
763 .name = "Enable Output Scaler",
764 .type = V4L2_CTRL_TYPE_BOOLEAN,
765 .max = 1,
766 .def = 1,
767 .step = 1,
768};
769
770
771/* Streaming Controls */
772
773static int vivid_streaming_s_ctrl(struct v4l2_ctrl *ctrl)
774{
775 struct vivid_dev *dev = container_of(ctrl->handler, struct vivid_dev, ctrl_hdl_streaming);
776 struct timeval tv;
777
778 switch (ctrl->id) {
779 case VIVID_CID_DQBUF_ERROR:
780 dev->dqbuf_error = true;
781 break;
782 case VIVID_CID_PERC_DROPPED:
783 dev->perc_dropped_buffers = ctrl->val;
784 break;
785 case VIVID_CID_QUEUE_SETUP_ERROR:
786 dev->queue_setup_error = true;
787 break;
788 case VIVID_CID_BUF_PREPARE_ERROR:
789 dev->buf_prepare_error = true;
790 break;
791 case VIVID_CID_START_STR_ERROR:
792 dev->start_streaming_error = true;
793 break;
794 case VIVID_CID_QUEUE_ERROR:
795 if (dev->vb_vid_cap_q.start_streaming_called)
796 vb2_queue_error(&dev->vb_vid_cap_q);
797 if (dev->vb_vbi_cap_q.start_streaming_called)
798 vb2_queue_error(&dev->vb_vbi_cap_q);
799 if (dev->vb_vid_out_q.start_streaming_called)
800 vb2_queue_error(&dev->vb_vid_out_q);
801 if (dev->vb_vbi_out_q.start_streaming_called)
802 vb2_queue_error(&dev->vb_vbi_out_q);
803 if (dev->vb_sdr_cap_q.start_streaming_called)
804 vb2_queue_error(&dev->vb_sdr_cap_q);
805 break;
806 case VIVID_CID_SEQ_WRAP:
807 dev->seq_wrap = ctrl->val;
808 break;
809 case VIVID_CID_TIME_WRAP:
810 dev->time_wrap = ctrl->val;
811 if (ctrl->val == 0) {
812 dev->time_wrap_offset = 0;
813 break;
814 }
815 v4l2_get_timestamp(&tv);
816 dev->time_wrap_offset = -tv.tv_sec - 16;
817 break;
818 }
819 return 0;
820}
821
822static const struct v4l2_ctrl_ops vivid_streaming_ctrl_ops = {
823 .s_ctrl = vivid_streaming_s_ctrl,
824};
825
826static const struct v4l2_ctrl_config vivid_ctrl_dqbuf_error = {
827 .ops = &vivid_streaming_ctrl_ops,
828 .id = VIVID_CID_DQBUF_ERROR,
829 .name = "Inject V4L2_BUF_FLAG_ERROR",
830 .type = V4L2_CTRL_TYPE_BUTTON,
831};
832
833static const struct v4l2_ctrl_config vivid_ctrl_perc_dropped = {
834 .ops = &vivid_streaming_ctrl_ops,
835 .id = VIVID_CID_PERC_DROPPED,
836 .name = "Percentage of Dropped Buffers",
837 .type = V4L2_CTRL_TYPE_INTEGER,
838 .min = 0,
839 .max = 100,
840 .step = 1,
841};
842
843static const struct v4l2_ctrl_config vivid_ctrl_queue_setup_error = {
844 .ops = &vivid_streaming_ctrl_ops,
845 .id = VIVID_CID_QUEUE_SETUP_ERROR,
846 .name = "Inject VIDIOC_REQBUFS Error",
847 .type = V4L2_CTRL_TYPE_BUTTON,
848};
849
850static const struct v4l2_ctrl_config vivid_ctrl_buf_prepare_error = {
851 .ops = &vivid_streaming_ctrl_ops,
852 .id = VIVID_CID_BUF_PREPARE_ERROR,
853 .name = "Inject VIDIOC_QBUF Error",
854 .type = V4L2_CTRL_TYPE_BUTTON,
855};
856
857static const struct v4l2_ctrl_config vivid_ctrl_start_streaming_error = {
858 .ops = &vivid_streaming_ctrl_ops,
859 .id = VIVID_CID_START_STR_ERROR,
860 .name = "Inject VIDIOC_STREAMON Error",
861 .type = V4L2_CTRL_TYPE_BUTTON,
862};
863
864static const struct v4l2_ctrl_config vivid_ctrl_queue_error = {
865 .ops = &vivid_streaming_ctrl_ops,
866 .id = VIVID_CID_QUEUE_ERROR,
867 .name = "Inject Fatal Streaming Error",
868 .type = V4L2_CTRL_TYPE_BUTTON,
869};
870
871static const struct v4l2_ctrl_config vivid_ctrl_seq_wrap = {
872 .ops = &vivid_streaming_ctrl_ops,
873 .id = VIVID_CID_SEQ_WRAP,
874 .name = "Wrap Sequence Number",
875 .type = V4L2_CTRL_TYPE_BOOLEAN,
876 .max = 1,
877 .step = 1,
878};
879
880static const struct v4l2_ctrl_config vivid_ctrl_time_wrap = {
881 .ops = &vivid_streaming_ctrl_ops,
882 .id = VIVID_CID_TIME_WRAP,
883 .name = "Wrap Timestamp",
884 .type = V4L2_CTRL_TYPE_BOOLEAN,
885 .max = 1,
886 .step = 1,
887};
888
889
890/* SDTV Capture Controls */
891
892static int vivid_sdtv_cap_s_ctrl(struct v4l2_ctrl *ctrl)
893{
894 struct vivid_dev *dev = container_of(ctrl->handler, struct vivid_dev, ctrl_hdl_sdtv_cap);
895
896 switch (ctrl->id) {
897 case VIVID_CID_STD_SIGNAL_MODE:
898 dev->std_signal_mode = dev->ctrl_std_signal_mode->val;
899 if (dev->std_signal_mode == SELECTED_STD)
900 dev->query_std = vivid_standard[dev->ctrl_standard->val];
901 v4l2_ctrl_activate(dev->ctrl_standard, dev->std_signal_mode == SELECTED_STD);
902 vivid_update_quality(dev);
903 vivid_send_source_change(dev, TV);
904 vivid_send_source_change(dev, SVID);
905 break;
906 }
907 return 0;
908}
909
910static const struct v4l2_ctrl_ops vivid_sdtv_cap_ctrl_ops = {
911 .s_ctrl = vivid_sdtv_cap_s_ctrl,
912};
913
914static const char * const vivid_ctrl_std_signal_mode_strings[] = {
915 "Current Standard",
916 "No Signal",
917 "No Lock",
918 "",
919 "Selected Standard",
920 "Cycle Through All Standards",
921 NULL,
922};
923
924static const struct v4l2_ctrl_config vivid_ctrl_std_signal_mode = {
925 .ops = &vivid_sdtv_cap_ctrl_ops,
926 .id = VIVID_CID_STD_SIGNAL_MODE,
927 .name = "Standard Signal Mode",
928 .type = V4L2_CTRL_TYPE_MENU,
929 .max = 5,
930 .menu_skip_mask = 1 << 3,
931 .qmenu = vivid_ctrl_std_signal_mode_strings,
932};
933
934static const struct v4l2_ctrl_config vivid_ctrl_standard = {
935 .ops = &vivid_sdtv_cap_ctrl_ops,
936 .id = VIVID_CID_STANDARD,
937 .name = "Standard",
938 .type = V4L2_CTRL_TYPE_MENU,
939 .max = 14,
940 .qmenu = vivid_ctrl_standard_strings,
941};
942
943
944
945/* Radio Receiver Controls */
946
947static int vivid_radio_rx_s_ctrl(struct v4l2_ctrl *ctrl)
948{
949 struct vivid_dev *dev = container_of(ctrl->handler, struct vivid_dev, ctrl_hdl_radio_rx);
950
951 switch (ctrl->id) {
952 case VIVID_CID_RADIO_SEEK_MODE:
953 dev->radio_rx_hw_seek_mode = ctrl->val;
954 break;
955 case VIVID_CID_RADIO_SEEK_PROG_LIM:
956 dev->radio_rx_hw_seek_prog_lim = ctrl->val;
957 break;
958 case VIVID_CID_RADIO_RX_RDS_RBDS:
959 dev->rds_gen.use_rbds = ctrl->val;
960 break;
961 case VIVID_CID_RADIO_RX_RDS_BLOCKIO:
962 dev->radio_rx_rds_controls = ctrl->val;
963 dev->radio_rx_caps &= ~V4L2_CAP_READWRITE;
964 dev->radio_rx_rds_use_alternates = false;
965 if (!dev->radio_rx_rds_controls) {
966 dev->radio_rx_caps |= V4L2_CAP_READWRITE;
967 __v4l2_ctrl_s_ctrl(dev->radio_rx_rds_pty, 0);
968 __v4l2_ctrl_s_ctrl(dev->radio_rx_rds_ta, 0);
969 __v4l2_ctrl_s_ctrl(dev->radio_rx_rds_tp, 0);
970 __v4l2_ctrl_s_ctrl(dev->radio_rx_rds_ms, 0);
971 __v4l2_ctrl_s_ctrl_string(dev->radio_rx_rds_psname, "");
972 __v4l2_ctrl_s_ctrl_string(dev->radio_rx_rds_radiotext, "");
973 }
974 v4l2_ctrl_activate(dev->radio_rx_rds_pty, dev->radio_rx_rds_controls);
975 v4l2_ctrl_activate(dev->radio_rx_rds_psname, dev->radio_rx_rds_controls);
976 v4l2_ctrl_activate(dev->radio_rx_rds_radiotext, dev->radio_rx_rds_controls);
977 v4l2_ctrl_activate(dev->radio_rx_rds_ta, dev->radio_rx_rds_controls);
978 v4l2_ctrl_activate(dev->radio_rx_rds_tp, dev->radio_rx_rds_controls);
979 v4l2_ctrl_activate(dev->radio_rx_rds_ms, dev->radio_rx_rds_controls);
980 break;
981 case V4L2_CID_RDS_RECEPTION:
982 dev->radio_rx_rds_enabled = ctrl->val;
983 break;
984 }
985 return 0;
986}
987
988static const struct v4l2_ctrl_ops vivid_radio_rx_ctrl_ops = {
989 .s_ctrl = vivid_radio_rx_s_ctrl,
990};
991
992static const char * const vivid_ctrl_radio_rds_mode_strings[] = {
993 "Block I/O",
994 "Controls",
995 NULL,
996};
997
998static const struct v4l2_ctrl_config vivid_ctrl_radio_rx_rds_blockio = {
999 .ops = &vivid_radio_rx_ctrl_ops,
1000 .id = VIVID_CID_RADIO_RX_RDS_BLOCKIO,
1001 .name = "RDS Rx I/O Mode",
1002 .type = V4L2_CTRL_TYPE_MENU,
1003 .qmenu = vivid_ctrl_radio_rds_mode_strings,
1004 .max = 1,
1005};
1006
1007static const struct v4l2_ctrl_config vivid_ctrl_radio_rx_rds_rbds = {
1008 .ops = &vivid_radio_rx_ctrl_ops,
1009 .id = VIVID_CID_RADIO_RX_RDS_RBDS,
1010 .name = "Generate RBDS Instead of RDS",
1011 .type = V4L2_CTRL_TYPE_BOOLEAN,
1012 .max = 1,
1013 .step = 1,
1014};
1015
1016static const char * const vivid_ctrl_radio_hw_seek_mode_strings[] = {
1017 "Bounded",
1018 "Wrap Around",
1019 "Both",
1020 NULL,
1021};
1022
1023static const struct v4l2_ctrl_config vivid_ctrl_radio_hw_seek_mode = {
1024 .ops = &vivid_radio_rx_ctrl_ops,
1025 .id = VIVID_CID_RADIO_SEEK_MODE,
1026 .name = "Radio HW Seek Mode",
1027 .type = V4L2_CTRL_TYPE_MENU,
1028 .max = 2,
1029 .qmenu = vivid_ctrl_radio_hw_seek_mode_strings,
1030};
1031
1032static const struct v4l2_ctrl_config vivid_ctrl_radio_hw_seek_prog_lim = {
1033 .ops = &vivid_radio_rx_ctrl_ops,
1034 .id = VIVID_CID_RADIO_SEEK_PROG_LIM,
1035 .name = "Radio Programmable HW Seek",
1036 .type = V4L2_CTRL_TYPE_BOOLEAN,
1037 .max = 1,
1038 .step = 1,
1039};
1040
1041
1042/* Radio Transmitter Controls */
1043
1044static int vivid_radio_tx_s_ctrl(struct v4l2_ctrl *ctrl)
1045{
1046 struct vivid_dev *dev = container_of(ctrl->handler, struct vivid_dev, ctrl_hdl_radio_tx);
1047
1048 switch (ctrl->id) {
1049 case VIVID_CID_RADIO_TX_RDS_BLOCKIO:
1050 dev->radio_tx_rds_controls = ctrl->val;
1051 dev->radio_tx_caps &= ~V4L2_CAP_READWRITE;
1052 if (!dev->radio_tx_rds_controls)
1053 dev->radio_tx_caps |= V4L2_CAP_READWRITE;
1054 break;
1055 case V4L2_CID_RDS_TX_PTY:
1056 if (dev->radio_rx_rds_controls)
1057 v4l2_ctrl_s_ctrl(dev->radio_rx_rds_pty, ctrl->val);
1058 break;
1059 case V4L2_CID_RDS_TX_PS_NAME:
1060 if (dev->radio_rx_rds_controls)
1061 v4l2_ctrl_s_ctrl_string(dev->radio_rx_rds_psname, ctrl->p_new.p_char);
1062 break;
1063 case V4L2_CID_RDS_TX_RADIO_TEXT:
1064 if (dev->radio_rx_rds_controls)
1065 v4l2_ctrl_s_ctrl_string(dev->radio_rx_rds_radiotext, ctrl->p_new.p_char);
1066 break;
1067 case V4L2_CID_RDS_TX_TRAFFIC_ANNOUNCEMENT:
1068 if (dev->radio_rx_rds_controls)
1069 v4l2_ctrl_s_ctrl(dev->radio_rx_rds_ta, ctrl->val);
1070 break;
1071 case V4L2_CID_RDS_TX_TRAFFIC_PROGRAM:
1072 if (dev->radio_rx_rds_controls)
1073 v4l2_ctrl_s_ctrl(dev->radio_rx_rds_tp, ctrl->val);
1074 break;
1075 case V4L2_CID_RDS_TX_MUSIC_SPEECH:
1076 if (dev->radio_rx_rds_controls)
1077 v4l2_ctrl_s_ctrl(dev->radio_rx_rds_ms, ctrl->val);
1078 break;
1079 }
1080 return 0;
1081}
1082
1083static const struct v4l2_ctrl_ops vivid_radio_tx_ctrl_ops = {
1084 .s_ctrl = vivid_radio_tx_s_ctrl,
1085};
1086
1087static const struct v4l2_ctrl_config vivid_ctrl_radio_tx_rds_blockio = {
1088 .ops = &vivid_radio_tx_ctrl_ops,
1089 .id = VIVID_CID_RADIO_TX_RDS_BLOCKIO,
1090 .name = "RDS Tx I/O Mode",
1091 .type = V4L2_CTRL_TYPE_MENU,
1092 .qmenu = vivid_ctrl_radio_rds_mode_strings,
1093 .max = 1,
1094 .def = 1,
1095};
1096
1097
1098
1099/* Video Loop Control */
1100
1101static int vivid_loop_out_s_ctrl(struct v4l2_ctrl *ctrl)
1102{
1103 struct vivid_dev *dev = container_of(ctrl->handler, struct vivid_dev, ctrl_hdl_loop_out);
1104
1105 switch (ctrl->id) {
1106 case VIVID_CID_LOOP_VIDEO:
1107 dev->loop_video = ctrl->val;
1108 vivid_update_quality(dev);
1109 vivid_send_source_change(dev, SVID);
1110 vivid_send_source_change(dev, HDMI);
1111 break;
1112 }
1113 return 0;
1114}
1115
1116static const struct v4l2_ctrl_ops vivid_loop_out_ctrl_ops = {
1117 .s_ctrl = vivid_loop_out_s_ctrl,
1118};
1119
1120static const struct v4l2_ctrl_config vivid_ctrl_loop_video = {
1121 .ops = &vivid_loop_out_ctrl_ops,
1122 .id = VIVID_CID_LOOP_VIDEO,
1123 .name = "Loop Video",
1124 .type = V4L2_CTRL_TYPE_BOOLEAN,
1125 .max = 1,
1126 .step = 1,
1127};
1128
1129
1130static const struct v4l2_ctrl_config vivid_ctrl_class = {
1131 .ops = &vivid_user_gen_ctrl_ops,
1132 .flags = V4L2_CTRL_FLAG_READ_ONLY | V4L2_CTRL_FLAG_WRITE_ONLY,
1133 .id = VIVID_CID_VIVID_CLASS,
1134 .name = "Vivid Controls",
1135 .type = V4L2_CTRL_TYPE_CTRL_CLASS,
1136};
1137
1138int vivid_create_controls(struct vivid_dev *dev, bool show_ccs_cap,
1139 bool show_ccs_out, bool no_error_inj,
1140 bool has_sdtv, bool has_hdmi)
1141{
1142 struct v4l2_ctrl_handler *hdl_user_gen = &dev->ctrl_hdl_user_gen;
1143 struct v4l2_ctrl_handler *hdl_user_vid = &dev->ctrl_hdl_user_vid;
1144 struct v4l2_ctrl_handler *hdl_user_aud = &dev->ctrl_hdl_user_aud;
1145 struct v4l2_ctrl_handler *hdl_streaming = &dev->ctrl_hdl_streaming;
1146 struct v4l2_ctrl_handler *hdl_sdtv_cap = &dev->ctrl_hdl_sdtv_cap;
1147 struct v4l2_ctrl_handler *hdl_loop_out = &dev->ctrl_hdl_loop_out;
1148 struct v4l2_ctrl_handler *hdl_vid_cap = &dev->ctrl_hdl_vid_cap;
1149 struct v4l2_ctrl_handler *hdl_vid_out = &dev->ctrl_hdl_vid_out;
1150 struct v4l2_ctrl_handler *hdl_vbi_cap = &dev->ctrl_hdl_vbi_cap;
1151 struct v4l2_ctrl_handler *hdl_vbi_out = &dev->ctrl_hdl_vbi_out;
1152 struct v4l2_ctrl_handler *hdl_radio_rx = &dev->ctrl_hdl_radio_rx;
1153 struct v4l2_ctrl_handler *hdl_radio_tx = &dev->ctrl_hdl_radio_tx;
1154 struct v4l2_ctrl_handler *hdl_sdr_cap = &dev->ctrl_hdl_sdr_cap;
1155 struct v4l2_ctrl_config vivid_ctrl_dv_timings = {
1156 .ops = &vivid_vid_cap_ctrl_ops,
1157 .id = VIVID_CID_DV_TIMINGS,
1158 .name = "DV Timings",
1159 .type = V4L2_CTRL_TYPE_MENU,
1160 };
1161 int i;
1162
1163 v4l2_ctrl_handler_init(hdl_user_gen, 10);
1164 v4l2_ctrl_new_custom(hdl_user_gen, &vivid_ctrl_class, NULL);
1165 v4l2_ctrl_handler_init(hdl_user_vid, 9);
1166 v4l2_ctrl_new_custom(hdl_user_vid, &vivid_ctrl_class, NULL);
1167 v4l2_ctrl_handler_init(hdl_user_aud, 2);
1168 v4l2_ctrl_new_custom(hdl_user_aud, &vivid_ctrl_class, NULL);
1169 v4l2_ctrl_handler_init(hdl_streaming, 8);
1170 v4l2_ctrl_new_custom(hdl_streaming, &vivid_ctrl_class, NULL);
1171 v4l2_ctrl_handler_init(hdl_sdtv_cap, 2);
1172 v4l2_ctrl_new_custom(hdl_sdtv_cap, &vivid_ctrl_class, NULL);
1173 v4l2_ctrl_handler_init(hdl_loop_out, 1);
1174 v4l2_ctrl_new_custom(hdl_loop_out, &vivid_ctrl_class, NULL);
1175 v4l2_ctrl_handler_init(hdl_vid_cap, 55);
1176 v4l2_ctrl_new_custom(hdl_vid_cap, &vivid_ctrl_class, NULL);
1177 v4l2_ctrl_handler_init(hdl_vid_out, 26);
1178 v4l2_ctrl_new_custom(hdl_vid_out, &vivid_ctrl_class, NULL);
1179 v4l2_ctrl_handler_init(hdl_vbi_cap, 21);
1180 v4l2_ctrl_new_custom(hdl_vbi_cap, &vivid_ctrl_class, NULL);
1181 v4l2_ctrl_handler_init(hdl_vbi_out, 19);
1182 v4l2_ctrl_new_custom(hdl_vbi_out, &vivid_ctrl_class, NULL);
1183 v4l2_ctrl_handler_init(hdl_radio_rx, 17);
1184 v4l2_ctrl_new_custom(hdl_radio_rx, &vivid_ctrl_class, NULL);
1185 v4l2_ctrl_handler_init(hdl_radio_tx, 17);
1186 v4l2_ctrl_new_custom(hdl_radio_tx, &vivid_ctrl_class, NULL);
1187 v4l2_ctrl_handler_init(hdl_sdr_cap, 18);
1188 v4l2_ctrl_new_custom(hdl_sdr_cap, &vivid_ctrl_class, NULL);
1189
1190 /* User Controls */
1191 dev->volume = v4l2_ctrl_new_std(hdl_user_aud, NULL,
1192 V4L2_CID_AUDIO_VOLUME, 0, 255, 1, 200);
1193 dev->mute = v4l2_ctrl_new_std(hdl_user_aud, NULL,
1194 V4L2_CID_AUDIO_MUTE, 0, 1, 1, 0);
1195 if (dev->has_vid_cap) {
1196 dev->brightness = v4l2_ctrl_new_std(hdl_user_vid, &vivid_user_vid_ctrl_ops,
1197 V4L2_CID_BRIGHTNESS, 0, 255, 1, 128);
1198 for (i = 0; i < MAX_INPUTS; i++)
1199 dev->input_brightness[i] = 128;
1200 dev->contrast = v4l2_ctrl_new_std(hdl_user_vid, &vivid_user_vid_ctrl_ops,
1201 V4L2_CID_CONTRAST, 0, 255, 1, 128);
1202 dev->saturation = v4l2_ctrl_new_std(hdl_user_vid, &vivid_user_vid_ctrl_ops,
1203 V4L2_CID_SATURATION, 0, 255, 1, 128);
1204 dev->hue = v4l2_ctrl_new_std(hdl_user_vid, &vivid_user_vid_ctrl_ops,
1205 V4L2_CID_HUE, -128, 128, 1, 0);
1206 v4l2_ctrl_new_std(hdl_user_vid, &vivid_user_vid_ctrl_ops,
1207 V4L2_CID_HFLIP, 0, 1, 1, 0);
1208 v4l2_ctrl_new_std(hdl_user_vid, &vivid_user_vid_ctrl_ops,
1209 V4L2_CID_VFLIP, 0, 1, 1, 0);
1210 dev->autogain = v4l2_ctrl_new_std(hdl_user_vid, &vivid_user_vid_ctrl_ops,
1211 V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
1212 dev->gain = v4l2_ctrl_new_std(hdl_user_vid, &vivid_user_vid_ctrl_ops,
1213 V4L2_CID_GAIN, 0, 255, 1, 100);
1214 dev->alpha = v4l2_ctrl_new_std(hdl_user_vid, &vivid_user_vid_ctrl_ops,
1215 V4L2_CID_ALPHA_COMPONENT, 0, 255, 1, 0);
1216 }
1217 dev->button = v4l2_ctrl_new_custom(hdl_user_gen, &vivid_ctrl_button, NULL);
1218 dev->int32 = v4l2_ctrl_new_custom(hdl_user_gen, &vivid_ctrl_int32, NULL);
1219 dev->int64 = v4l2_ctrl_new_custom(hdl_user_gen, &vivid_ctrl_int64, NULL);
1220 dev->boolean = v4l2_ctrl_new_custom(hdl_user_gen, &vivid_ctrl_boolean, NULL);
1221 dev->menu = v4l2_ctrl_new_custom(hdl_user_gen, &vivid_ctrl_menu, NULL);
1222 dev->string = v4l2_ctrl_new_custom(hdl_user_gen, &vivid_ctrl_string, NULL);
1223 dev->bitmask = v4l2_ctrl_new_custom(hdl_user_gen, &vivid_ctrl_bitmask, NULL);
1224 dev->int_menu = v4l2_ctrl_new_custom(hdl_user_gen, &vivid_ctrl_int_menu, NULL);
1225
1226 if (dev->has_vid_cap) {
1227 /* Image Processing Controls */
1228 struct v4l2_ctrl_config vivid_ctrl_test_pattern = {
1229 .ops = &vivid_vid_cap_ctrl_ops,
1230 .id = VIVID_CID_TEST_PATTERN,
1231 .name = "Test Pattern",
1232 .type = V4L2_CTRL_TYPE_MENU,
1233 .max = TPG_PAT_NOISE,
1234 .qmenu = tpg_pattern_strings,
1235 };
1236
1237 dev->test_pattern = v4l2_ctrl_new_custom(hdl_vid_cap,
1238 &vivid_ctrl_test_pattern, NULL);
1239 v4l2_ctrl_new_custom(hdl_vid_cap, &vivid_ctrl_perc_fill, NULL);
1240 v4l2_ctrl_new_custom(hdl_vid_cap, &vivid_ctrl_hor_movement, NULL);
1241 v4l2_ctrl_new_custom(hdl_vid_cap, &vivid_ctrl_vert_movement, NULL);
1242 v4l2_ctrl_new_custom(hdl_vid_cap, &vivid_ctrl_osd_mode, NULL);
1243 v4l2_ctrl_new_custom(hdl_vid_cap, &vivid_ctrl_show_border, NULL);
1244 v4l2_ctrl_new_custom(hdl_vid_cap, &vivid_ctrl_show_square, NULL);
1245 v4l2_ctrl_new_custom(hdl_vid_cap, &vivid_ctrl_hflip, NULL);
1246 v4l2_ctrl_new_custom(hdl_vid_cap, &vivid_ctrl_vflip, NULL);
1247 v4l2_ctrl_new_custom(hdl_vid_cap, &vivid_ctrl_insert_sav, NULL);
1248 v4l2_ctrl_new_custom(hdl_vid_cap, &vivid_ctrl_insert_eav, NULL);
1249 if (show_ccs_cap) {
1250 dev->ctrl_has_crop_cap = v4l2_ctrl_new_custom(hdl_vid_cap,
1251 &vivid_ctrl_has_crop_cap, NULL);
1252 dev->ctrl_has_compose_cap = v4l2_ctrl_new_custom(hdl_vid_cap,
1253 &vivid_ctrl_has_compose_cap, NULL);
1254 dev->ctrl_has_scaler_cap = v4l2_ctrl_new_custom(hdl_vid_cap,
1255 &vivid_ctrl_has_scaler_cap, NULL);
1256 }
1257
1258 v4l2_ctrl_new_custom(hdl_vid_cap, &vivid_ctrl_tstamp_src, NULL);
1259 dev->colorspace = v4l2_ctrl_new_custom(hdl_vid_cap,
1260 &vivid_ctrl_colorspace, NULL);
1261 v4l2_ctrl_new_custom(hdl_vid_cap, &vivid_ctrl_alpha_mode, NULL);
1262 }
1263
1264 if (dev->has_vid_out && show_ccs_out) {
1265 dev->ctrl_has_crop_out = v4l2_ctrl_new_custom(hdl_vid_out,
1266 &vivid_ctrl_has_crop_out, NULL);
1267 dev->ctrl_has_compose_out = v4l2_ctrl_new_custom(hdl_vid_out,
1268 &vivid_ctrl_has_compose_out, NULL);
1269 dev->ctrl_has_scaler_out = v4l2_ctrl_new_custom(hdl_vid_out,
1270 &vivid_ctrl_has_scaler_out, NULL);
1271 }
1272
1273 /*
1274 * Testing this driver with v4l2-compliance will trigger the error
1275 * injection controls, and after that nothing will work as expected.
1276 * So we have a module option to drop these error injecting controls
1277 * allowing us to run v4l2_compliance again.
1278 */
1279 if (!no_error_inj) {
1280 v4l2_ctrl_new_custom(hdl_user_gen, &vivid_ctrl_disconnect, NULL);
1281 v4l2_ctrl_new_custom(hdl_streaming, &vivid_ctrl_dqbuf_error, NULL);
1282 v4l2_ctrl_new_custom(hdl_streaming, &vivid_ctrl_perc_dropped, NULL);
1283 v4l2_ctrl_new_custom(hdl_streaming, &vivid_ctrl_queue_setup_error, NULL);
1284 v4l2_ctrl_new_custom(hdl_streaming, &vivid_ctrl_buf_prepare_error, NULL);
1285 v4l2_ctrl_new_custom(hdl_streaming, &vivid_ctrl_start_streaming_error, NULL);
1286 v4l2_ctrl_new_custom(hdl_streaming, &vivid_ctrl_queue_error, NULL);
1287 v4l2_ctrl_new_custom(hdl_streaming, &vivid_ctrl_seq_wrap, NULL);
1288 v4l2_ctrl_new_custom(hdl_streaming, &vivid_ctrl_time_wrap, NULL);
1289 }
1290
1291 if (has_sdtv && (dev->has_vid_cap || dev->has_vbi_cap)) {
1292 if (dev->has_vid_cap)
1293 v4l2_ctrl_new_custom(hdl_vid_cap, &vivid_ctrl_std_aspect_ratio, NULL);
1294 dev->ctrl_std_signal_mode = v4l2_ctrl_new_custom(hdl_sdtv_cap,
1295 &vivid_ctrl_std_signal_mode, NULL);
1296 dev->ctrl_standard = v4l2_ctrl_new_custom(hdl_sdtv_cap,
1297 &vivid_ctrl_standard, NULL);
1298 if (dev->ctrl_std_signal_mode)
1299 v4l2_ctrl_cluster(2, &dev->ctrl_std_signal_mode);
1300 if (dev->has_raw_vbi_cap)
1301 v4l2_ctrl_new_custom(hdl_vbi_cap, &vivid_ctrl_vbi_cap_interlaced, NULL);
1302 }
1303
1304 if (has_hdmi && dev->has_vid_cap) {
1305 dev->ctrl_dv_timings_signal_mode = v4l2_ctrl_new_custom(hdl_vid_cap,
1306 &vivid_ctrl_dv_timings_signal_mode, NULL);
1307
1308 vivid_ctrl_dv_timings.max = dev->query_dv_timings_size - 1;
1309 vivid_ctrl_dv_timings.qmenu =
1310 (const char * const *)dev->query_dv_timings_qmenu;
1311 dev->ctrl_dv_timings = v4l2_ctrl_new_custom(hdl_vid_cap,
1312 &vivid_ctrl_dv_timings, NULL);
1313 if (dev->ctrl_dv_timings_signal_mode)
1314 v4l2_ctrl_cluster(2, &dev->ctrl_dv_timings_signal_mode);
1315
1316 v4l2_ctrl_new_custom(hdl_vid_cap, &vivid_ctrl_dv_timings_aspect_ratio, NULL);
1317 v4l2_ctrl_new_custom(hdl_vid_cap, &vivid_ctrl_max_edid_blocks, NULL);
1318 dev->real_rgb_range_cap = v4l2_ctrl_new_custom(hdl_vid_cap,
1319 &vivid_ctrl_limited_rgb_range, NULL);
1320 dev->rgb_range_cap = v4l2_ctrl_new_std_menu(hdl_vid_cap,
1321 &vivid_vid_cap_ctrl_ops,
1322 V4L2_CID_DV_RX_RGB_RANGE, V4L2_DV_RGB_RANGE_FULL,
1323 0, V4L2_DV_RGB_RANGE_AUTO);
1324 }
1325 if (has_hdmi && dev->has_vid_out) {
1326 /*
1327 * We aren't doing anything with this at the moment, but
1328 * HDMI outputs typically have this controls.
1329 */
1330 dev->ctrl_tx_rgb_range = v4l2_ctrl_new_std_menu(hdl_vid_out, NULL,
1331 V4L2_CID_DV_TX_RGB_RANGE, V4L2_DV_RGB_RANGE_FULL,
1332 0, V4L2_DV_RGB_RANGE_AUTO);
1333 dev->ctrl_tx_mode = v4l2_ctrl_new_std_menu(hdl_vid_out, NULL,
1334 V4L2_CID_DV_TX_MODE, V4L2_DV_TX_MODE_HDMI,
1335 0, V4L2_DV_TX_MODE_HDMI);
1336 }
1337 if ((dev->has_vid_cap && dev->has_vid_out) ||
1338 (dev->has_vbi_cap && dev->has_vbi_out))
1339 v4l2_ctrl_new_custom(hdl_loop_out, &vivid_ctrl_loop_video, NULL);
1340
1341 if (dev->has_fb)
1342 v4l2_ctrl_new_custom(hdl_user_gen, &vivid_ctrl_clear_fb, NULL);
1343
1344 if (dev->has_radio_rx) {
1345 v4l2_ctrl_new_custom(hdl_radio_rx, &vivid_ctrl_radio_hw_seek_mode, NULL);
1346 v4l2_ctrl_new_custom(hdl_radio_rx, &vivid_ctrl_radio_hw_seek_prog_lim, NULL);
1347 v4l2_ctrl_new_custom(hdl_radio_rx, &vivid_ctrl_radio_rx_rds_blockio, NULL);
1348 v4l2_ctrl_new_custom(hdl_radio_rx, &vivid_ctrl_radio_rx_rds_rbds, NULL);
1349 v4l2_ctrl_new_std(hdl_radio_rx, &vivid_radio_rx_ctrl_ops,
1350 V4L2_CID_RDS_RECEPTION, 0, 1, 1, 1);
1351 dev->radio_rx_rds_pty = v4l2_ctrl_new_std(hdl_radio_rx,
1352 &vivid_radio_rx_ctrl_ops,
1353 V4L2_CID_RDS_RX_PTY, 0, 31, 1, 0);
1354 dev->radio_rx_rds_psname = v4l2_ctrl_new_std(hdl_radio_rx,
1355 &vivid_radio_rx_ctrl_ops,
1356 V4L2_CID_RDS_RX_PS_NAME, 0, 8, 8, 0);
1357 dev->radio_rx_rds_radiotext = v4l2_ctrl_new_std(hdl_radio_rx,
1358 &vivid_radio_rx_ctrl_ops,
1359 V4L2_CID_RDS_RX_RADIO_TEXT, 0, 64, 64, 0);
1360 dev->radio_rx_rds_ta = v4l2_ctrl_new_std(hdl_radio_rx,
1361 &vivid_radio_rx_ctrl_ops,
1362 V4L2_CID_RDS_RX_TRAFFIC_ANNOUNCEMENT, 0, 1, 1, 0);
1363 dev->radio_rx_rds_tp = v4l2_ctrl_new_std(hdl_radio_rx,
1364 &vivid_radio_rx_ctrl_ops,
1365 V4L2_CID_RDS_RX_TRAFFIC_PROGRAM, 0, 1, 1, 0);
1366 dev->radio_rx_rds_ms = v4l2_ctrl_new_std(hdl_radio_rx,
1367 &vivid_radio_rx_ctrl_ops,
1368 V4L2_CID_RDS_RX_MUSIC_SPEECH, 0, 1, 1, 1);
1369 }
1370 if (dev->has_radio_tx) {
1371 v4l2_ctrl_new_custom(hdl_radio_tx,
1372 &vivid_ctrl_radio_tx_rds_blockio, NULL);
1373 dev->radio_tx_rds_pi = v4l2_ctrl_new_std(hdl_radio_tx,
1374 &vivid_radio_tx_ctrl_ops,
1375 V4L2_CID_RDS_TX_PI, 0, 0xffff, 1, 0x8088);
1376 dev->radio_tx_rds_pty = v4l2_ctrl_new_std(hdl_radio_tx,
1377 &vivid_radio_tx_ctrl_ops,
1378 V4L2_CID_RDS_TX_PTY, 0, 31, 1, 3);
1379 dev->radio_tx_rds_psname = v4l2_ctrl_new_std(hdl_radio_tx,
1380 &vivid_radio_tx_ctrl_ops,
1381 V4L2_CID_RDS_TX_PS_NAME, 0, 8, 8, 0);
1382 if (dev->radio_tx_rds_psname)
1383 v4l2_ctrl_s_ctrl_string(dev->radio_tx_rds_psname, "VIVID-TX");
1384 dev->radio_tx_rds_radiotext = v4l2_ctrl_new_std(hdl_radio_tx,
1385 &vivid_radio_tx_ctrl_ops,
1386 V4L2_CID_RDS_TX_RADIO_TEXT, 0, 64 * 2, 64, 0);
1387 if (dev->radio_tx_rds_radiotext)
1388 v4l2_ctrl_s_ctrl_string(dev->radio_tx_rds_radiotext,
1389 "This is a VIVID default Radio Text template text, change at will");
1390 dev->radio_tx_rds_mono_stereo = v4l2_ctrl_new_std(hdl_radio_tx,
1391 &vivid_radio_tx_ctrl_ops,
1392 V4L2_CID_RDS_TX_MONO_STEREO, 0, 1, 1, 1);
1393 dev->radio_tx_rds_art_head = v4l2_ctrl_new_std(hdl_radio_tx,
1394 &vivid_radio_tx_ctrl_ops,
1395 V4L2_CID_RDS_TX_ARTIFICIAL_HEAD, 0, 1, 1, 0);
1396 dev->radio_tx_rds_compressed = v4l2_ctrl_new_std(hdl_radio_tx,
1397 &vivid_radio_tx_ctrl_ops,
1398 V4L2_CID_RDS_TX_COMPRESSED, 0, 1, 1, 0);
1399 dev->radio_tx_rds_dyn_pty = v4l2_ctrl_new_std(hdl_radio_tx,
1400 &vivid_radio_tx_ctrl_ops,
1401 V4L2_CID_RDS_TX_DYNAMIC_PTY, 0, 1, 1, 0);
1402 dev->radio_tx_rds_ta = v4l2_ctrl_new_std(hdl_radio_tx,
1403 &vivid_radio_tx_ctrl_ops,
1404 V4L2_CID_RDS_TX_TRAFFIC_ANNOUNCEMENT, 0, 1, 1, 0);
1405 dev->radio_tx_rds_tp = v4l2_ctrl_new_std(hdl_radio_tx,
1406 &vivid_radio_tx_ctrl_ops,
1407 V4L2_CID_RDS_TX_TRAFFIC_PROGRAM, 0, 1, 1, 1);
1408 dev->radio_tx_rds_ms = v4l2_ctrl_new_std(hdl_radio_tx,
1409 &vivid_radio_tx_ctrl_ops,
1410 V4L2_CID_RDS_TX_MUSIC_SPEECH, 0, 1, 1, 1);
1411 }
1412 if (hdl_user_gen->error)
1413 return hdl_user_gen->error;
1414 if (hdl_user_vid->error)
1415 return hdl_user_vid->error;
1416 if (hdl_user_aud->error)
1417 return hdl_user_aud->error;
1418 if (hdl_streaming->error)
1419 return hdl_streaming->error;
1420 if (hdl_sdr_cap->error)
1421 return hdl_sdr_cap->error;
1422 if (hdl_loop_out->error)
1423 return hdl_loop_out->error;
1424
1425 if (dev->autogain)
1426 v4l2_ctrl_auto_cluster(2, &dev->autogain, 0, true);
1427
1428 if (dev->has_vid_cap) {
1429 v4l2_ctrl_add_handler(hdl_vid_cap, hdl_user_gen, NULL);
1430 v4l2_ctrl_add_handler(hdl_vid_cap, hdl_user_vid, NULL);
1431 v4l2_ctrl_add_handler(hdl_vid_cap, hdl_user_aud, NULL);
1432 v4l2_ctrl_add_handler(hdl_vid_cap, hdl_streaming, NULL);
1433 v4l2_ctrl_add_handler(hdl_vid_cap, hdl_sdtv_cap, NULL);
1434 if (hdl_vid_cap->error)
1435 return hdl_vid_cap->error;
1436 dev->vid_cap_dev.ctrl_handler = hdl_vid_cap;
1437 }
1438 if (dev->has_vid_out) {
1439 v4l2_ctrl_add_handler(hdl_vid_out, hdl_user_gen, NULL);
1440 v4l2_ctrl_add_handler(hdl_vid_out, hdl_user_aud, NULL);
1441 v4l2_ctrl_add_handler(hdl_vid_out, hdl_streaming, NULL);
1442 v4l2_ctrl_add_handler(hdl_vid_out, hdl_loop_out, NULL);
1443 if (hdl_vid_out->error)
1444 return hdl_vid_out->error;
1445 dev->vid_out_dev.ctrl_handler = hdl_vid_out;
1446 }
1447 if (dev->has_vbi_cap) {
1448 v4l2_ctrl_add_handler(hdl_vbi_cap, hdl_user_gen, NULL);
1449 v4l2_ctrl_add_handler(hdl_vbi_cap, hdl_streaming, NULL);
1450 v4l2_ctrl_add_handler(hdl_vbi_cap, hdl_sdtv_cap, NULL);
1451 if (hdl_vbi_cap->error)
1452 return hdl_vbi_cap->error;
1453 dev->vbi_cap_dev.ctrl_handler = hdl_vbi_cap;
1454 }
1455 if (dev->has_vbi_out) {
1456 v4l2_ctrl_add_handler(hdl_vbi_out, hdl_user_gen, NULL);
1457 v4l2_ctrl_add_handler(hdl_vbi_out, hdl_streaming, NULL);
1458 v4l2_ctrl_add_handler(hdl_vbi_out, hdl_loop_out, NULL);
1459 if (hdl_vbi_out->error)
1460 return hdl_vbi_out->error;
1461 dev->vbi_out_dev.ctrl_handler = hdl_vbi_out;
1462 }
1463 if (dev->has_radio_rx) {
1464 v4l2_ctrl_add_handler(hdl_radio_rx, hdl_user_gen, NULL);
1465 v4l2_ctrl_add_handler(hdl_radio_rx, hdl_user_aud, NULL);
1466 if (hdl_radio_rx->error)
1467 return hdl_radio_rx->error;
1468 dev->radio_rx_dev.ctrl_handler = hdl_radio_rx;
1469 }
1470 if (dev->has_radio_tx) {
1471 v4l2_ctrl_add_handler(hdl_radio_tx, hdl_user_gen, NULL);
1472 v4l2_ctrl_add_handler(hdl_radio_tx, hdl_user_aud, NULL);
1473 if (hdl_radio_tx->error)
1474 return hdl_radio_tx->error;
1475 dev->radio_tx_dev.ctrl_handler = hdl_radio_tx;
1476 }
1477 if (dev->has_sdr_cap) {
1478 v4l2_ctrl_add_handler(hdl_sdr_cap, hdl_user_gen, NULL);
1479 v4l2_ctrl_add_handler(hdl_sdr_cap, hdl_streaming, NULL);
1480 if (hdl_sdr_cap->error)
1481 return hdl_sdr_cap->error;
1482 dev->sdr_cap_dev.ctrl_handler = hdl_sdr_cap;
1483 }
1484 return 0;
1485}
1486
1487void vivid_free_controls(struct vivid_dev *dev)
1488{
1489 v4l2_ctrl_handler_free(&dev->ctrl_hdl_vid_cap);
1490 v4l2_ctrl_handler_free(&dev->ctrl_hdl_vid_out);
1491 v4l2_ctrl_handler_free(&dev->ctrl_hdl_vbi_cap);
1492 v4l2_ctrl_handler_free(&dev->ctrl_hdl_vbi_out);
1493 v4l2_ctrl_handler_free(&dev->ctrl_hdl_radio_rx);
1494 v4l2_ctrl_handler_free(&dev->ctrl_hdl_radio_tx);
1495 v4l2_ctrl_handler_free(&dev->ctrl_hdl_sdr_cap);
1496 v4l2_ctrl_handler_free(&dev->ctrl_hdl_user_gen);
1497 v4l2_ctrl_handler_free(&dev->ctrl_hdl_user_vid);
1498 v4l2_ctrl_handler_free(&dev->ctrl_hdl_user_aud);
1499 v4l2_ctrl_handler_free(&dev->ctrl_hdl_streaming);
1500 v4l2_ctrl_handler_free(&dev->ctrl_hdl_sdtv_cap);
1501 v4l2_ctrl_handler_free(&dev->ctrl_hdl_loop_out);
1502}
diff --git a/drivers/media/platform/vivid/vivid-ctrls.h b/drivers/media/platform/vivid/vivid-ctrls.h
new file mode 100644
index 000000000000..9bcca9d56359
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-ctrls.h
@@ -0,0 +1,34 @@
1/*
2 * vivid-ctrls.h - control support functions.
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#ifndef _VIVID_CTRLS_H_
21#define _VIVID_CTRLS_H_
22
23enum vivid_hw_seek_modes {
24 VIVID_HW_SEEK_BOUNDED,
25 VIVID_HW_SEEK_WRAP,
26 VIVID_HW_SEEK_BOTH,
27};
28
29int vivid_create_controls(struct vivid_dev *dev, bool show_ccs_cap,
30 bool show_ccs_out, bool no_error_inj,
31 bool has_sdtv, bool has_hdmi);
32void vivid_free_controls(struct vivid_dev *dev);
33
34#endif
diff --git a/drivers/media/platform/vivid/vivid-kthread-cap.c b/drivers/media/platform/vivid/vivid-kthread-cap.c
new file mode 100644
index 000000000000..39a67cfae120
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-kthread-cap.c
@@ -0,0 +1,886 @@
1/*
2 * vivid-kthread-cap.h - video/vbi capture thread support functions.
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#include <linux/module.h>
21#include <linux/errno.h>
22#include <linux/kernel.h>
23#include <linux/init.h>
24#include <linux/sched.h>
25#include <linux/slab.h>
26#include <linux/font.h>
27#include <linux/mutex.h>
28#include <linux/videodev2.h>
29#include <linux/kthread.h>
30#include <linux/freezer.h>
31#include <linux/random.h>
32#include <linux/v4l2-dv-timings.h>
33#include <asm/div64.h>
34#include <media/videobuf2-vmalloc.h>
35#include <media/v4l2-dv-timings.h>
36#include <media/v4l2-ioctl.h>
37#include <media/v4l2-fh.h>
38#include <media/v4l2-event.h>
39
40#include "vivid-core.h"
41#include "vivid-vid-common.h"
42#include "vivid-vid-cap.h"
43#include "vivid-vid-out.h"
44#include "vivid-radio-common.h"
45#include "vivid-radio-rx.h"
46#include "vivid-radio-tx.h"
47#include "vivid-sdr-cap.h"
48#include "vivid-vbi-cap.h"
49#include "vivid-vbi-out.h"
50#include "vivid-osd.h"
51#include "vivid-ctrls.h"
52#include "vivid-kthread-cap.h"
53
54static inline v4l2_std_id vivid_get_std_cap(const struct vivid_dev *dev)
55{
56 if (vivid_is_sdtv_cap(dev))
57 return dev->std_cap;
58 return 0;
59}
60
61static void copy_pix(struct vivid_dev *dev, int win_y, int win_x,
62 u16 *cap, const u16 *osd)
63{
64 u16 out;
65 int left = dev->overlay_out_left;
66 int top = dev->overlay_out_top;
67 int fb_x = win_x + left;
68 int fb_y = win_y + top;
69 int i;
70
71 out = *cap;
72 *cap = *osd;
73 if (dev->bitmap_out) {
74 const u8 *p = dev->bitmap_out;
75 unsigned stride = (dev->compose_out.width + 7) / 8;
76
77 win_x -= dev->compose_out.left;
78 win_y -= dev->compose_out.top;
79 if (!(p[stride * win_y + win_x / 8] & (1 << (win_x & 7))))
80 return;
81 }
82
83 for (i = 0; i < dev->clipcount_out; i++) {
84 struct v4l2_rect *r = &dev->clips_out[i].c;
85
86 if (fb_y >= r->top && fb_y < r->top + r->height &&
87 fb_x >= r->left && fb_x < r->left + r->width)
88 return;
89 }
90 if ((dev->fbuf_out_flags & V4L2_FBUF_FLAG_CHROMAKEY) &&
91 *osd != dev->chromakey_out)
92 return;
93 if ((dev->fbuf_out_flags & V4L2_FBUF_FLAG_SRC_CHROMAKEY) &&
94 out == dev->chromakey_out)
95 return;
96 if (dev->fmt_cap->alpha_mask) {
97 if ((dev->fbuf_out_flags & V4L2_FBUF_FLAG_GLOBAL_ALPHA) &&
98 dev->global_alpha_out)
99 return;
100 if ((dev->fbuf_out_flags & V4L2_FBUF_FLAG_LOCAL_ALPHA) &&
101 *cap & dev->fmt_cap->alpha_mask)
102 return;
103 if ((dev->fbuf_out_flags & V4L2_FBUF_FLAG_LOCAL_INV_ALPHA) &&
104 !(*cap & dev->fmt_cap->alpha_mask))
105 return;
106 }
107 *cap = out;
108}
109
110static void blend_line(struct vivid_dev *dev, unsigned y_offset, unsigned x_offset,
111 u8 *vcapbuf, const u8 *vosdbuf,
112 unsigned width, unsigned pixsize)
113{
114 unsigned x;
115
116 for (x = 0; x < width; x++, vcapbuf += pixsize, vosdbuf += pixsize) {
117 copy_pix(dev, y_offset, x_offset + x,
118 (u16 *)vcapbuf, (const u16 *)vosdbuf);
119 }
120}
121
122static void scale_line(const u8 *src, u8 *dst, unsigned srcw, unsigned dstw, unsigned twopixsize)
123{
124 /* Coarse scaling with Bresenham */
125 unsigned int_part;
126 unsigned fract_part;
127 unsigned src_x = 0;
128 unsigned error = 0;
129 unsigned x;
130
131 /*
132 * We always combine two pixels to prevent color bleed in the packed
133 * yuv case.
134 */
135 srcw /= 2;
136 dstw /= 2;
137 int_part = srcw / dstw;
138 fract_part = srcw % dstw;
139 for (x = 0; x < dstw; x++, dst += twopixsize) {
140 memcpy(dst, src + src_x * twopixsize, twopixsize);
141 src_x += int_part;
142 error += fract_part;
143 if (error >= dstw) {
144 error -= dstw;
145 src_x++;
146 }
147 }
148}
149
150/*
151 * Precalculate the rectangles needed to perform video looping:
152 *
153 * The nominal pipeline is that the video output buffer is cropped by
154 * crop_out, scaled to compose_out, overlaid with the output overlay,
155 * cropped on the capture side by crop_cap and scaled again to the video
156 * capture buffer using compose_cap.
157 *
158 * To keep things efficient we calculate the intersection of compose_out
159 * and crop_cap (since that's the only part of the video that will
160 * actually end up in the capture buffer), determine which part of the
161 * video output buffer that is and which part of the video capture buffer
162 * so we can scale the video straight from the output buffer to the capture
163 * buffer without any intermediate steps.
164 *
165 * If we need to deal with an output overlay, then there is no choice and
166 * that intermediate step still has to be taken. For the output overlay
167 * support we calculate the intersection of the framebuffer and the overlay
168 * window (which may be partially or wholly outside of the framebuffer
169 * itself) and the intersection of that with loop_vid_copy (i.e. the part of
170 * the actual looped video that will be overlaid). The result is calculated
171 * both in framebuffer coordinates (loop_fb_copy) and compose_out coordinates
172 * (loop_vid_overlay). Finally calculate the part of the capture buffer that
173 * will receive that overlaid video.
174 */
175static void vivid_precalc_copy_rects(struct vivid_dev *dev)
176{
177 /* Framebuffer rectangle */
178 struct v4l2_rect r_fb = {
179 0, 0, dev->display_width, dev->display_height
180 };
181 /* Overlay window rectangle in framebuffer coordinates */
182 struct v4l2_rect r_overlay = {
183 dev->overlay_out_left, dev->overlay_out_top,
184 dev->compose_out.width, dev->compose_out.height
185 };
186
187 dev->loop_vid_copy = rect_intersect(&dev->crop_cap, &dev->compose_out);
188
189 dev->loop_vid_out = dev->loop_vid_copy;
190 rect_scale(&dev->loop_vid_out, &dev->compose_out, &dev->crop_out);
191 dev->loop_vid_out.left += dev->crop_out.left;
192 dev->loop_vid_out.top += dev->crop_out.top;
193
194 dev->loop_vid_cap = dev->loop_vid_copy;
195 rect_scale(&dev->loop_vid_cap, &dev->crop_cap, &dev->compose_cap);
196
197 dprintk(dev, 1,
198 "loop_vid_copy: %dx%d@%dx%d loop_vid_out: %dx%d@%dx%d loop_vid_cap: %dx%d@%dx%d\n",
199 dev->loop_vid_copy.width, dev->loop_vid_copy.height,
200 dev->loop_vid_copy.left, dev->loop_vid_copy.top,
201 dev->loop_vid_out.width, dev->loop_vid_out.height,
202 dev->loop_vid_out.left, dev->loop_vid_out.top,
203 dev->loop_vid_cap.width, dev->loop_vid_cap.height,
204 dev->loop_vid_cap.left, dev->loop_vid_cap.top);
205
206 r_overlay = rect_intersect(&r_fb, &r_overlay);
207
208 /* shift r_overlay to the same origin as compose_out */
209 r_overlay.left += dev->compose_out.left - dev->overlay_out_left;
210 r_overlay.top += dev->compose_out.top - dev->overlay_out_top;
211
212 dev->loop_vid_overlay = rect_intersect(&r_overlay, &dev->loop_vid_copy);
213 dev->loop_fb_copy = dev->loop_vid_overlay;
214
215 /* shift dev->loop_fb_copy back again to the fb origin */
216 dev->loop_fb_copy.left -= dev->compose_out.left - dev->overlay_out_left;
217 dev->loop_fb_copy.top -= dev->compose_out.top - dev->overlay_out_top;
218
219 dev->loop_vid_overlay_cap = dev->loop_vid_overlay;
220 rect_scale(&dev->loop_vid_overlay_cap, &dev->crop_cap, &dev->compose_cap);
221
222 dprintk(dev, 1,
223 "loop_fb_copy: %dx%d@%dx%d loop_vid_overlay: %dx%d@%dx%d loop_vid_overlay_cap: %dx%d@%dx%d\n",
224 dev->loop_fb_copy.width, dev->loop_fb_copy.height,
225 dev->loop_fb_copy.left, dev->loop_fb_copy.top,
226 dev->loop_vid_overlay.width, dev->loop_vid_overlay.height,
227 dev->loop_vid_overlay.left, dev->loop_vid_overlay.top,
228 dev->loop_vid_overlay_cap.width, dev->loop_vid_overlay_cap.height,
229 dev->loop_vid_overlay_cap.left, dev->loop_vid_overlay_cap.top);
230}
231
232static int vivid_copy_buffer(struct vivid_dev *dev, unsigned p, u8 *vcapbuf,
233 struct vivid_buffer *vid_cap_buf)
234{
235 bool blank = dev->must_blank[vid_cap_buf->vb.v4l2_buf.index];
236 struct tpg_data *tpg = &dev->tpg;
237 struct vivid_buffer *vid_out_buf = NULL;
238 unsigned pixsize = tpg_g_twopixelsize(tpg, p) / 2;
239 unsigned img_width = dev->compose_cap.width;
240 unsigned img_height = dev->compose_cap.height;
241 unsigned stride_cap = tpg->bytesperline[p];
242 unsigned stride_out = dev->bytesperline_out[p];
243 unsigned stride_osd = dev->display_byte_stride;
244 unsigned hmax = (img_height * tpg->perc_fill) / 100;
245 u8 *voutbuf;
246 u8 *vosdbuf = NULL;
247 unsigned y;
248 bool blend = dev->bitmap_out || dev->clipcount_out || dev->fbuf_out_flags;
249 /* Coarse scaling with Bresenham */
250 unsigned vid_out_int_part;
251 unsigned vid_out_fract_part;
252 unsigned vid_out_y = 0;
253 unsigned vid_out_error = 0;
254 unsigned vid_overlay_int_part = 0;
255 unsigned vid_overlay_fract_part = 0;
256 unsigned vid_overlay_y = 0;
257 unsigned vid_overlay_error = 0;
258 unsigned vid_cap_right;
259 bool quick;
260
261 vid_out_int_part = dev->loop_vid_out.height / dev->loop_vid_cap.height;
262 vid_out_fract_part = dev->loop_vid_out.height % dev->loop_vid_cap.height;
263
264 if (!list_empty(&dev->vid_out_active))
265 vid_out_buf = list_entry(dev->vid_out_active.next,
266 struct vivid_buffer, list);
267 if (vid_out_buf == NULL)
268 return -ENODATA;
269
270 vid_cap_buf->vb.v4l2_buf.field = vid_out_buf->vb.v4l2_buf.field;
271
272 voutbuf = vb2_plane_vaddr(&vid_out_buf->vb, p) +
273 vid_out_buf->vb.v4l2_planes[p].data_offset;
274 voutbuf += dev->loop_vid_out.left * pixsize + dev->loop_vid_out.top * stride_out;
275 vcapbuf += dev->compose_cap.left * pixsize + dev->compose_cap.top * stride_cap;
276
277 if (dev->loop_vid_copy.width == 0 || dev->loop_vid_copy.height == 0) {
278 /*
279 * If there is nothing to copy, then just fill the capture window
280 * with black.
281 */
282 for (y = 0; y < hmax; y++, vcapbuf += stride_cap)
283 memcpy(vcapbuf, tpg->black_line[p], img_width * pixsize);
284 return 0;
285 }
286
287 if (dev->overlay_out_enabled &&
288 dev->loop_vid_overlay.width && dev->loop_vid_overlay.height) {
289 vosdbuf = dev->video_vbase;
290 vosdbuf += dev->loop_fb_copy.left * pixsize +
291 dev->loop_fb_copy.top * stride_osd;
292 vid_overlay_int_part = dev->loop_vid_overlay.height /
293 dev->loop_vid_overlay_cap.height;
294 vid_overlay_fract_part = dev->loop_vid_overlay.height %
295 dev->loop_vid_overlay_cap.height;
296 }
297
298 vid_cap_right = dev->loop_vid_cap.left + dev->loop_vid_cap.width;
299 /* quick is true if no video scaling is needed */
300 quick = dev->loop_vid_out.width == dev->loop_vid_cap.width;
301
302 dev->cur_scaled_line = dev->loop_vid_out.height;
303 for (y = 0; y < hmax; y++, vcapbuf += stride_cap) {
304 /* osdline is true if this line requires overlay blending */
305 bool osdline = vosdbuf && y >= dev->loop_vid_overlay_cap.top &&
306 y < dev->loop_vid_overlay_cap.top + dev->loop_vid_overlay_cap.height;
307
308 /*
309 * If this line of the capture buffer doesn't get any video, then
310 * just fill with black.
311 */
312 if (y < dev->loop_vid_cap.top ||
313 y >= dev->loop_vid_cap.top + dev->loop_vid_cap.height) {
314 memcpy(vcapbuf, tpg->black_line[p], img_width * pixsize);
315 continue;
316 }
317
318 /* fill the left border with black */
319 if (dev->loop_vid_cap.left)
320 memcpy(vcapbuf, tpg->black_line[p], dev->loop_vid_cap.left * pixsize);
321
322 /* fill the right border with black */
323 if (vid_cap_right < img_width)
324 memcpy(vcapbuf + vid_cap_right * pixsize,
325 tpg->black_line[p], (img_width - vid_cap_right) * pixsize);
326
327 if (quick && !osdline) {
328 memcpy(vcapbuf + dev->loop_vid_cap.left * pixsize,
329 voutbuf + vid_out_y * stride_out,
330 dev->loop_vid_cap.width * pixsize);
331 goto update_vid_out_y;
332 }
333 if (dev->cur_scaled_line == vid_out_y) {
334 memcpy(vcapbuf + dev->loop_vid_cap.left * pixsize,
335 dev->scaled_line,
336 dev->loop_vid_cap.width * pixsize);
337 goto update_vid_out_y;
338 }
339 if (!osdline) {
340 scale_line(voutbuf + vid_out_y * stride_out, dev->scaled_line,
341 dev->loop_vid_out.width, dev->loop_vid_cap.width,
342 tpg_g_twopixelsize(tpg, p));
343 } else {
344 /*
345 * Offset in bytes within loop_vid_copy to the start of the
346 * loop_vid_overlay rectangle.
347 */
348 unsigned offset =
349 (dev->loop_vid_overlay.left - dev->loop_vid_copy.left) * pixsize;
350 u8 *osd = vosdbuf + vid_overlay_y * stride_osd;
351
352 scale_line(voutbuf + vid_out_y * stride_out, dev->blended_line,
353 dev->loop_vid_out.width, dev->loop_vid_copy.width,
354 tpg_g_twopixelsize(tpg, p));
355 if (blend)
356 blend_line(dev, vid_overlay_y + dev->loop_vid_overlay.top,
357 dev->loop_vid_overlay.left,
358 dev->blended_line + offset, osd,
359 dev->loop_vid_overlay.width, pixsize);
360 else
361 memcpy(dev->blended_line + offset,
362 osd, dev->loop_vid_overlay.width * pixsize);
363 scale_line(dev->blended_line, dev->scaled_line,
364 dev->loop_vid_copy.width, dev->loop_vid_cap.width,
365 tpg_g_twopixelsize(tpg, p));
366 }
367 dev->cur_scaled_line = vid_out_y;
368 memcpy(vcapbuf + dev->loop_vid_cap.left * pixsize,
369 dev->scaled_line,
370 dev->loop_vid_cap.width * pixsize);
371
372update_vid_out_y:
373 if (osdline) {
374 vid_overlay_y += vid_overlay_int_part;
375 vid_overlay_error += vid_overlay_fract_part;
376 if (vid_overlay_error >= dev->loop_vid_overlay_cap.height) {
377 vid_overlay_error -= dev->loop_vid_overlay_cap.height;
378 vid_overlay_y++;
379 }
380 }
381 vid_out_y += vid_out_int_part;
382 vid_out_error += vid_out_fract_part;
383 if (vid_out_error >= dev->loop_vid_cap.height) {
384 vid_out_error -= dev->loop_vid_cap.height;
385 vid_out_y++;
386 }
387 }
388
389 if (!blank)
390 return 0;
391 for (; y < img_height; y++, vcapbuf += stride_cap)
392 memcpy(vcapbuf, tpg->contrast_line[p], img_width * pixsize);
393 return 0;
394}
395
396static void vivid_fillbuff(struct vivid_dev *dev, struct vivid_buffer *buf)
397{
398 unsigned factor = V4L2_FIELD_HAS_T_OR_B(dev->field_cap) ? 2 : 1;
399 unsigned line_height = 16 / factor;
400 bool is_tv = vivid_is_sdtv_cap(dev);
401 bool is_60hz = is_tv && (dev->std_cap & V4L2_STD_525_60);
402 unsigned p;
403 int line = 1;
404 u8 *basep[TPG_MAX_PLANES][2];
405 unsigned ms;
406 char str[100];
407 s32 gain;
408 bool is_loop = false;
409
410 if (dev->loop_video && dev->can_loop_video &&
411 ((vivid_is_svid_cap(dev) && !VIVID_INVALID_SIGNAL(dev->std_signal_mode)) ||
412 (vivid_is_hdmi_cap(dev) && !VIVID_INVALID_SIGNAL(dev->dv_timings_signal_mode))))
413 is_loop = true;
414
415 buf->vb.v4l2_buf.sequence = dev->vid_cap_seq_count;
416 /*
417 * Take the timestamp now if the timestamp source is set to
418 * "Start of Exposure".
419 */
420 if (dev->tstamp_src_is_soe)
421 v4l2_get_timestamp(&buf->vb.v4l2_buf.timestamp);
422 if (dev->field_cap == V4L2_FIELD_ALTERNATE) {
423 /*
424 * 60 Hz standards start with the bottom field, 50 Hz standards
425 * with the top field. So if the 0-based seq_count is even,
426 * then the field is TOP for 50 Hz and BOTTOM for 60 Hz
427 * standards.
428 */
429 buf->vb.v4l2_buf.field = ((dev->vid_cap_seq_count & 1) ^ is_60hz) ?
430 V4L2_FIELD_TOP : V4L2_FIELD_BOTTOM;
431 /*
432 * The sequence counter counts frames, not fields. So divide
433 * by two.
434 */
435 buf->vb.v4l2_buf.sequence /= 2;
436 } else {
437 buf->vb.v4l2_buf.field = dev->field_cap;
438 }
439 tpg_s_field(&dev->tpg, buf->vb.v4l2_buf.field);
440 tpg_s_perc_fill_blank(&dev->tpg, dev->must_blank[buf->vb.v4l2_buf.index]);
441
442 vivid_precalc_copy_rects(dev);
443
444 for (p = 0; p < tpg_g_planes(&dev->tpg); p++) {
445 void *vbuf = vb2_plane_vaddr(&buf->vb, p);
446
447 /*
448 * The first plane of a multiplanar format has a non-zero
449 * data_offset. This helps testing whether the application
450 * correctly supports non-zero data offsets.
451 */
452 if (dev->fmt_cap->data_offset[p]) {
453 memset(vbuf, dev->fmt_cap->data_offset[p] & 0xff,
454 dev->fmt_cap->data_offset[p]);
455 vbuf += dev->fmt_cap->data_offset[p];
456 }
457 tpg_calc_text_basep(&dev->tpg, basep, p, vbuf);
458 if (!is_loop || vivid_copy_buffer(dev, p, vbuf, buf))
459 tpg_fillbuffer(&dev->tpg, vivid_get_std_cap(dev), p, vbuf);
460 }
461 dev->must_blank[buf->vb.v4l2_buf.index] = false;
462
463 /* Updates stream time, only update at the start of a new frame. */
464 if (dev->field_cap != V4L2_FIELD_ALTERNATE || (buf->vb.v4l2_buf.sequence & 1) == 0)
465 dev->ms_vid_cap = jiffies_to_msecs(jiffies - dev->jiffies_vid_cap);
466
467 ms = dev->ms_vid_cap;
468 if (dev->osd_mode <= 1) {
469 snprintf(str, sizeof(str), " %02d:%02d:%02d:%03d %u%s",
470 (ms / (60 * 60 * 1000)) % 24,
471 (ms / (60 * 1000)) % 60,
472 (ms / 1000) % 60,
473 ms % 1000,
474 buf->vb.v4l2_buf.sequence,
475 (dev->field_cap == V4L2_FIELD_ALTERNATE) ?
476 (buf->vb.v4l2_buf.field == V4L2_FIELD_TOP ?
477 " top" : " bottom") : "");
478 tpg_gen_text(&dev->tpg, basep, line++ * line_height, 16, str);
479 }
480 if (dev->osd_mode == 0) {
481 snprintf(str, sizeof(str), " %dx%d, input %d ",
482 dev->src_rect.width, dev->src_rect.height, dev->input);
483 tpg_gen_text(&dev->tpg, basep, line++ * line_height, 16, str);
484
485 gain = v4l2_ctrl_g_ctrl(dev->gain);
486 mutex_lock(dev->ctrl_hdl_user_vid.lock);
487 snprintf(str, sizeof(str),
488 " brightness %3d, contrast %3d, saturation %3d, hue %d ",
489 dev->brightness->cur.val,
490 dev->contrast->cur.val,
491 dev->saturation->cur.val,
492 dev->hue->cur.val);
493 tpg_gen_text(&dev->tpg, basep, line++ * line_height, 16, str);
494 snprintf(str, sizeof(str),
495 " autogain %d, gain %3d, alpha 0x%02x ",
496 dev->autogain->cur.val, gain, dev->alpha->cur.val);
497 mutex_unlock(dev->ctrl_hdl_user_vid.lock);
498 tpg_gen_text(&dev->tpg, basep, line++ * line_height, 16, str);
499 mutex_lock(dev->ctrl_hdl_user_aud.lock);
500 snprintf(str, sizeof(str),
501 " volume %3d, mute %d ",
502 dev->volume->cur.val, dev->mute->cur.val);
503 mutex_unlock(dev->ctrl_hdl_user_aud.lock);
504 tpg_gen_text(&dev->tpg, basep, line++ * line_height, 16, str);
505 mutex_lock(dev->ctrl_hdl_user_gen.lock);
506 snprintf(str, sizeof(str), " int32 %d, int64 %lld, bitmask %08x ",
507 dev->int32->cur.val,
508 *dev->int64->p_cur.p_s64,
509 dev->bitmask->cur.val);
510 tpg_gen_text(&dev->tpg, basep, line++ * line_height, 16, str);
511 snprintf(str, sizeof(str), " boolean %d, menu %s, string \"%s\" ",
512 dev->boolean->cur.val,
513 dev->menu->qmenu[dev->menu->cur.val],
514 dev->string->p_cur.p_char);
515 tpg_gen_text(&dev->tpg, basep, line++ * line_height, 16, str);
516 snprintf(str, sizeof(str), " integer_menu %lld, value %d ",
517 dev->int_menu->qmenu_int[dev->int_menu->cur.val],
518 dev->int_menu->cur.val);
519 mutex_unlock(dev->ctrl_hdl_user_gen.lock);
520 tpg_gen_text(&dev->tpg, basep, line++ * line_height, 16, str);
521 if (dev->button_pressed) {
522 dev->button_pressed--;
523 snprintf(str, sizeof(str), " button pressed!");
524 tpg_gen_text(&dev->tpg, basep, line++ * line_height, 16, str);
525 }
526 }
527
528 /*
529 * If "End of Frame" is specified at the timestamp source, then take
530 * the timestamp now.
531 */
532 if (!dev->tstamp_src_is_soe)
533 v4l2_get_timestamp(&buf->vb.v4l2_buf.timestamp);
534 buf->vb.v4l2_buf.timestamp.tv_sec += dev->time_wrap_offset;
535}
536
537/*
538 * Return true if this pixel coordinate is a valid video pixel.
539 */
540static bool valid_pix(struct vivid_dev *dev, int win_y, int win_x, int fb_y, int fb_x)
541{
542 int i;
543
544 if (dev->bitmap_cap) {
545 /*
546 * Only if the corresponding bit in the bitmap is set can
547 * the video pixel be shown. Coordinates are relative to
548 * the overlay window set by VIDIOC_S_FMT.
549 */
550 const u8 *p = dev->bitmap_cap;
551 unsigned stride = (dev->compose_cap.width + 7) / 8;
552
553 if (!(p[stride * win_y + win_x / 8] & (1 << (win_x & 7))))
554 return false;
555 }
556
557 for (i = 0; i < dev->clipcount_cap; i++) {
558 /*
559 * Only if the framebuffer coordinate is not in any of the
560 * clip rectangles will be video pixel be shown.
561 */
562 struct v4l2_rect *r = &dev->clips_cap[i].c;
563
564 if (fb_y >= r->top && fb_y < r->top + r->height &&
565 fb_x >= r->left && fb_x < r->left + r->width)
566 return false;
567 }
568 return true;
569}
570
571/*
572 * Draw the image into the overlay buffer.
573 * Note that the combination of overlay and multiplanar is not supported.
574 */
575static void vivid_overlay(struct vivid_dev *dev, struct vivid_buffer *buf)
576{
577 struct tpg_data *tpg = &dev->tpg;
578 unsigned pixsize = tpg_g_twopixelsize(tpg, 0) / 2;
579 void *vbase = dev->fb_vbase_cap;
580 void *vbuf = vb2_plane_vaddr(&buf->vb, 0);
581 unsigned img_width = dev->compose_cap.width;
582 unsigned img_height = dev->compose_cap.height;
583 unsigned stride = tpg->bytesperline[0];
584 /* if quick is true, then valid_pix() doesn't have to be called */
585 bool quick = dev->bitmap_cap == NULL && dev->clipcount_cap == 0;
586 int x, y, w, out_x = 0;
587
588 if ((dev->overlay_cap_field == V4L2_FIELD_TOP ||
589 dev->overlay_cap_field == V4L2_FIELD_BOTTOM) &&
590 dev->overlay_cap_field != buf->vb.v4l2_buf.field)
591 return;
592
593 vbuf += dev->compose_cap.left * pixsize + dev->compose_cap.top * stride;
594 x = dev->overlay_cap_left;
595 w = img_width;
596 if (x < 0) {
597 out_x = -x;
598 w = w - out_x;
599 x = 0;
600 } else {
601 w = dev->fb_cap.fmt.width - x;
602 if (w > img_width)
603 w = img_width;
604 }
605 if (w <= 0)
606 return;
607 if (dev->overlay_cap_top >= 0)
608 vbase += dev->overlay_cap_top * dev->fb_cap.fmt.bytesperline;
609 for (y = dev->overlay_cap_top;
610 y < dev->overlay_cap_top + (int)img_height;
611 y++, vbuf += stride) {
612 int px;
613
614 if (y < 0 || y > dev->fb_cap.fmt.height)
615 continue;
616 if (quick) {
617 memcpy(vbase + x * pixsize,
618 vbuf + out_x * pixsize, w * pixsize);
619 vbase += dev->fb_cap.fmt.bytesperline;
620 continue;
621 }
622 for (px = 0; px < w; px++) {
623 if (!valid_pix(dev, y - dev->overlay_cap_top,
624 px + out_x, y, px + x))
625 continue;
626 memcpy(vbase + (px + x) * pixsize,
627 vbuf + (px + out_x) * pixsize,
628 pixsize);
629 }
630 vbase += dev->fb_cap.fmt.bytesperline;
631 }
632}
633
634static void vivid_thread_vid_cap_tick(struct vivid_dev *dev, int dropped_bufs)
635{
636 struct vivid_buffer *vid_cap_buf = NULL;
637 struct vivid_buffer *vbi_cap_buf = NULL;
638
639 dprintk(dev, 1, "Video Capture Thread Tick\n");
640
641 while (dropped_bufs-- > 1)
642 tpg_update_mv_count(&dev->tpg,
643 dev->field_cap == V4L2_FIELD_NONE ||
644 dev->field_cap == V4L2_FIELD_ALTERNATE);
645
646 /* Drop a certain percentage of buffers. */
647 if (dev->perc_dropped_buffers &&
648 prandom_u32_max(100) < dev->perc_dropped_buffers)
649 goto update_mv;
650
651 spin_lock(&dev->slock);
652 if (!list_empty(&dev->vid_cap_active)) {
653 vid_cap_buf = list_entry(dev->vid_cap_active.next, struct vivid_buffer, list);
654 list_del(&vid_cap_buf->list);
655 }
656 if (!list_empty(&dev->vbi_cap_active)) {
657 if (dev->field_cap != V4L2_FIELD_ALTERNATE ||
658 (dev->vbi_cap_seq_count & 1)) {
659 vbi_cap_buf = list_entry(dev->vbi_cap_active.next,
660 struct vivid_buffer, list);
661 list_del(&vbi_cap_buf->list);
662 }
663 }
664 spin_unlock(&dev->slock);
665
666 if (!vid_cap_buf && !vbi_cap_buf)
667 goto update_mv;
668
669 if (vid_cap_buf) {
670 /* Fill buffer */
671 vivid_fillbuff(dev, vid_cap_buf);
672 dprintk(dev, 1, "filled buffer %d\n",
673 vid_cap_buf->vb.v4l2_buf.index);
674
675 /* Handle overlay */
676 if (dev->overlay_cap_owner && dev->fb_cap.base &&
677 dev->fb_cap.fmt.pixelformat == dev->fmt_cap->fourcc)
678 vivid_overlay(dev, vid_cap_buf);
679
680 vb2_buffer_done(&vid_cap_buf->vb, dev->dqbuf_error ?
681 VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE);
682 dprintk(dev, 2, "vid_cap buffer %d done\n",
683 vid_cap_buf->vb.v4l2_buf.index);
684 }
685
686 if (vbi_cap_buf) {
687 if (dev->stream_sliced_vbi_cap)
688 vivid_sliced_vbi_cap_process(dev, vbi_cap_buf);
689 else
690 vivid_raw_vbi_cap_process(dev, vbi_cap_buf);
691 vb2_buffer_done(&vbi_cap_buf->vb, dev->dqbuf_error ?
692 VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE);
693 dprintk(dev, 2, "vbi_cap %d done\n",
694 vbi_cap_buf->vb.v4l2_buf.index);
695 }
696 dev->dqbuf_error = false;
697
698update_mv:
699 /* Update the test pattern movement counters */
700 tpg_update_mv_count(&dev->tpg, dev->field_cap == V4L2_FIELD_NONE ||
701 dev->field_cap == V4L2_FIELD_ALTERNATE);
702}
703
704static int vivid_thread_vid_cap(void *data)
705{
706 struct vivid_dev *dev = data;
707 u64 numerators_since_start;
708 u64 buffers_since_start;
709 u64 next_jiffies_since_start;
710 unsigned long jiffies_since_start;
711 unsigned long cur_jiffies;
712 unsigned wait_jiffies;
713 unsigned numerator;
714 unsigned denominator;
715 int dropped_bufs;
716
717 dprintk(dev, 1, "Video Capture Thread Start\n");
718
719 set_freezable();
720
721 /* Resets frame counters */
722 dev->cap_seq_offset = 0;
723 dev->cap_seq_count = 0;
724 dev->cap_seq_resync = false;
725 dev->jiffies_vid_cap = jiffies;
726
727 for (;;) {
728 try_to_freeze();
729 if (kthread_should_stop())
730 break;
731
732 mutex_lock(&dev->mutex);
733 cur_jiffies = jiffies;
734 if (dev->cap_seq_resync) {
735 dev->jiffies_vid_cap = cur_jiffies;
736 dev->cap_seq_offset = dev->cap_seq_count + 1;
737 dev->cap_seq_count = 0;
738 dev->cap_seq_resync = false;
739 }
740 numerator = dev->timeperframe_vid_cap.numerator;
741 denominator = dev->timeperframe_vid_cap.denominator;
742
743 if (dev->field_cap == V4L2_FIELD_ALTERNATE)
744 denominator *= 2;
745
746 /* Calculate the number of jiffies since we started streaming */
747 jiffies_since_start = cur_jiffies - dev->jiffies_vid_cap;
748 /* Get the number of buffers streamed since the start */
749 buffers_since_start = (u64)jiffies_since_start * denominator +
750 (HZ * numerator) / 2;
751 do_div(buffers_since_start, HZ * numerator);
752
753 /*
754 * After more than 0xf0000000 (rounded down to a multiple of
755 * 'jiffies-per-day' to ease jiffies_to_msecs calculation)
756 * jiffies have passed since we started streaming reset the
757 * counters and keep track of the sequence offset.
758 */
759 if (jiffies_since_start > JIFFIES_RESYNC) {
760 dev->jiffies_vid_cap = cur_jiffies;
761 dev->cap_seq_offset = buffers_since_start;
762 buffers_since_start = 0;
763 }
764 dropped_bufs = buffers_since_start + dev->cap_seq_offset - dev->cap_seq_count;
765 dev->cap_seq_count = buffers_since_start + dev->cap_seq_offset;
766 dev->vid_cap_seq_count = dev->cap_seq_count - dev->vid_cap_seq_start;
767 dev->vbi_cap_seq_count = dev->cap_seq_count - dev->vbi_cap_seq_start;
768
769 vivid_thread_vid_cap_tick(dev, dropped_bufs);
770
771 /*
772 * Calculate the number of 'numerators' streamed since we started,
773 * including the current buffer.
774 */
775 numerators_since_start = ++buffers_since_start * numerator;
776
777 /* And the number of jiffies since we started */
778 jiffies_since_start = jiffies - dev->jiffies_vid_cap;
779
780 mutex_unlock(&dev->mutex);
781
782 /*
783 * Calculate when that next buffer is supposed to start
784 * in jiffies since we started streaming.
785 */
786 next_jiffies_since_start = numerators_since_start * HZ +
787 denominator / 2;
788 do_div(next_jiffies_since_start, denominator);
789 /* If it is in the past, then just schedule asap */
790 if (next_jiffies_since_start < jiffies_since_start)
791 next_jiffies_since_start = jiffies_since_start;
792
793 wait_jiffies = next_jiffies_since_start - jiffies_since_start;
794 schedule_timeout_interruptible(wait_jiffies ? wait_jiffies : 1);
795 }
796 dprintk(dev, 1, "Video Capture Thread End\n");
797 return 0;
798}
799
800static void vivid_grab_controls(struct vivid_dev *dev, bool grab)
801{
802 v4l2_ctrl_grab(dev->ctrl_has_crop_cap, grab);
803 v4l2_ctrl_grab(dev->ctrl_has_compose_cap, grab);
804 v4l2_ctrl_grab(dev->ctrl_has_scaler_cap, grab);
805}
806
807int vivid_start_generating_vid_cap(struct vivid_dev *dev, bool *pstreaming)
808{
809 dprintk(dev, 1, "%s\n", __func__);
810
811 if (dev->kthread_vid_cap) {
812 u32 seq_count = dev->cap_seq_count + dev->seq_wrap * 128;
813
814 if (pstreaming == &dev->vid_cap_streaming)
815 dev->vid_cap_seq_start = seq_count;
816 else
817 dev->vbi_cap_seq_start = seq_count;
818 *pstreaming = true;
819 return 0;
820 }
821
822 /* Resets frame counters */
823 tpg_init_mv_count(&dev->tpg);
824
825 dev->vid_cap_seq_start = dev->seq_wrap * 128;
826 dev->vbi_cap_seq_start = dev->seq_wrap * 128;
827
828 dev->kthread_vid_cap = kthread_run(vivid_thread_vid_cap, dev,
829 "%s-vid-cap", dev->v4l2_dev.name);
830
831 if (IS_ERR(dev->kthread_vid_cap)) {
832 v4l2_err(&dev->v4l2_dev, "kernel_thread() failed\n");
833 return PTR_ERR(dev->kthread_vid_cap);
834 }
835 *pstreaming = true;
836 vivid_grab_controls(dev, true);
837
838 dprintk(dev, 1, "returning from %s\n", __func__);
839 return 0;
840}
841
842void vivid_stop_generating_vid_cap(struct vivid_dev *dev, bool *pstreaming)
843{
844 dprintk(dev, 1, "%s\n", __func__);
845
846 if (dev->kthread_vid_cap == NULL)
847 return;
848
849 *pstreaming = false;
850 if (pstreaming == &dev->vid_cap_streaming) {
851 /* Release all active buffers */
852 while (!list_empty(&dev->vid_cap_active)) {
853 struct vivid_buffer *buf;
854
855 buf = list_entry(dev->vid_cap_active.next,
856 struct vivid_buffer, list);
857 list_del(&buf->list);
858 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
859 dprintk(dev, 2, "vid_cap buffer %d done\n",
860 buf->vb.v4l2_buf.index);
861 }
862 }
863
864 if (pstreaming == &dev->vbi_cap_streaming) {
865 while (!list_empty(&dev->vbi_cap_active)) {
866 struct vivid_buffer *buf;
867
868 buf = list_entry(dev->vbi_cap_active.next,
869 struct vivid_buffer, list);
870 list_del(&buf->list);
871 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
872 dprintk(dev, 2, "vbi_cap buffer %d done\n",
873 buf->vb.v4l2_buf.index);
874 }
875 }
876
877 if (dev->vid_cap_streaming || dev->vbi_cap_streaming)
878 return;
879
880 /* shutdown control thread */
881 vivid_grab_controls(dev, false);
882 mutex_unlock(&dev->mutex);
883 kthread_stop(dev->kthread_vid_cap);
884 dev->kthread_vid_cap = NULL;
885 mutex_lock(&dev->mutex);
886}
diff --git a/drivers/media/platform/vivid/vivid-kthread-cap.h b/drivers/media/platform/vivid/vivid-kthread-cap.h
new file mode 100644
index 000000000000..5b92fc9a0d04
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-kthread-cap.h
@@ -0,0 +1,26 @@
1/*
2 * vivid-kthread-cap.h - video/vbi capture thread support functions.
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#ifndef _VIVID_KTHREAD_CAP_H_
21#define _VIVID_KTHREAD_CAP_H_
22
23int vivid_start_generating_vid_cap(struct vivid_dev *dev, bool *pstreaming);
24void vivid_stop_generating_vid_cap(struct vivid_dev *dev, bool *pstreaming);
25
26#endif
diff --git a/drivers/media/platform/vivid/vivid-kthread-out.c b/drivers/media/platform/vivid/vivid-kthread-out.c
new file mode 100644
index 000000000000..d9f36ccd7efb
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-kthread-out.c
@@ -0,0 +1,305 @@
1/*
2 * vivid-kthread-out.h - video/vbi output thread support functions.
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#include <linux/module.h>
21#include <linux/errno.h>
22#include <linux/kernel.h>
23#include <linux/init.h>
24#include <linux/sched.h>
25#include <linux/slab.h>
26#include <linux/font.h>
27#include <linux/mutex.h>
28#include <linux/videodev2.h>
29#include <linux/kthread.h>
30#include <linux/freezer.h>
31#include <linux/random.h>
32#include <linux/v4l2-dv-timings.h>
33#include <asm/div64.h>
34#include <media/videobuf2-vmalloc.h>
35#include <media/v4l2-dv-timings.h>
36#include <media/v4l2-ioctl.h>
37#include <media/v4l2-fh.h>
38#include <media/v4l2-event.h>
39
40#include "vivid-core.h"
41#include "vivid-vid-common.h"
42#include "vivid-vid-cap.h"
43#include "vivid-vid-out.h"
44#include "vivid-radio-common.h"
45#include "vivid-radio-rx.h"
46#include "vivid-radio-tx.h"
47#include "vivid-sdr-cap.h"
48#include "vivid-vbi-cap.h"
49#include "vivid-vbi-out.h"
50#include "vivid-osd.h"
51#include "vivid-ctrls.h"
52#include "vivid-kthread-out.h"
53
54static void vivid_thread_vid_out_tick(struct vivid_dev *dev)
55{
56 struct vivid_buffer *vid_out_buf = NULL;
57 struct vivid_buffer *vbi_out_buf = NULL;
58
59 dprintk(dev, 1, "Video Output Thread Tick\n");
60
61 /* Drop a certain percentage of buffers. */
62 if (dev->perc_dropped_buffers &&
63 prandom_u32_max(100) < dev->perc_dropped_buffers)
64 return;
65
66 spin_lock(&dev->slock);
67 /*
68 * Only dequeue buffer if there is at least one more pending.
69 * This makes video loopback possible.
70 */
71 if (!list_empty(&dev->vid_out_active) &&
72 !list_is_singular(&dev->vid_out_active)) {
73 vid_out_buf = list_entry(dev->vid_out_active.next,
74 struct vivid_buffer, list);
75 list_del(&vid_out_buf->list);
76 }
77 if (!list_empty(&dev->vbi_out_active) &&
78 (dev->field_out != V4L2_FIELD_ALTERNATE ||
79 (dev->vbi_out_seq_count & 1))) {
80 vbi_out_buf = list_entry(dev->vbi_out_active.next,
81 struct vivid_buffer, list);
82 list_del(&vbi_out_buf->list);
83 }
84 spin_unlock(&dev->slock);
85
86 if (!vid_out_buf && !vbi_out_buf)
87 return;
88
89 if (vid_out_buf) {
90 vid_out_buf->vb.v4l2_buf.sequence = dev->vid_out_seq_count;
91 if (dev->field_out == V4L2_FIELD_ALTERNATE) {
92 /*
93 * The sequence counter counts frames, not fields. So divide
94 * by two.
95 */
96 vid_out_buf->vb.v4l2_buf.sequence /= 2;
97 }
98 v4l2_get_timestamp(&vid_out_buf->vb.v4l2_buf.timestamp);
99 vid_out_buf->vb.v4l2_buf.timestamp.tv_sec += dev->time_wrap_offset;
100 vb2_buffer_done(&vid_out_buf->vb, dev->dqbuf_error ?
101 VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE);
102 dprintk(dev, 2, "vid_out buffer %d done\n",
103 vid_out_buf->vb.v4l2_buf.index);
104 }
105
106 if (vbi_out_buf) {
107 if (dev->stream_sliced_vbi_out)
108 vivid_sliced_vbi_out_process(dev, vbi_out_buf);
109
110 vbi_out_buf->vb.v4l2_buf.sequence = dev->vbi_out_seq_count;
111 v4l2_get_timestamp(&vbi_out_buf->vb.v4l2_buf.timestamp);
112 vbi_out_buf->vb.v4l2_buf.timestamp.tv_sec += dev->time_wrap_offset;
113 vb2_buffer_done(&vbi_out_buf->vb, dev->dqbuf_error ?
114 VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE);
115 dprintk(dev, 2, "vbi_out buffer %d done\n",
116 vbi_out_buf->vb.v4l2_buf.index);
117 }
118 dev->dqbuf_error = false;
119}
120
121static int vivid_thread_vid_out(void *data)
122{
123 struct vivid_dev *dev = data;
124 u64 numerators_since_start;
125 u64 buffers_since_start;
126 u64 next_jiffies_since_start;
127 unsigned long jiffies_since_start;
128 unsigned long cur_jiffies;
129 unsigned wait_jiffies;
130 unsigned numerator;
131 unsigned denominator;
132
133 dprintk(dev, 1, "Video Output Thread Start\n");
134
135 set_freezable();
136
137 /* Resets frame counters */
138 dev->out_seq_offset = 0;
139 if (dev->seq_wrap)
140 dev->out_seq_count = 0xffffff80U;
141 dev->jiffies_vid_out = jiffies;
142 dev->vid_out_seq_start = dev->vbi_out_seq_start = 0;
143 dev->out_seq_resync = false;
144
145 for (;;) {
146 try_to_freeze();
147 if (kthread_should_stop())
148 break;
149
150 mutex_lock(&dev->mutex);
151 cur_jiffies = jiffies;
152 if (dev->out_seq_resync) {
153 dev->jiffies_vid_out = cur_jiffies;
154 dev->out_seq_offset = dev->out_seq_count + 1;
155 dev->out_seq_count = 0;
156 dev->out_seq_resync = false;
157 }
158 numerator = dev->timeperframe_vid_out.numerator;
159 denominator = dev->timeperframe_vid_out.denominator;
160
161 if (dev->field_out == V4L2_FIELD_ALTERNATE)
162 denominator *= 2;
163
164 /* Calculate the number of jiffies since we started streaming */
165 jiffies_since_start = cur_jiffies - dev->jiffies_vid_out;
166 /* Get the number of buffers streamed since the start */
167 buffers_since_start = (u64)jiffies_since_start * denominator +
168 (HZ * numerator) / 2;
169 do_div(buffers_since_start, HZ * numerator);
170
171 /*
172 * After more than 0xf0000000 (rounded down to a multiple of
173 * 'jiffies-per-day' to ease jiffies_to_msecs calculation)
174 * jiffies have passed since we started streaming reset the
175 * counters and keep track of the sequence offset.
176 */
177 if (jiffies_since_start > JIFFIES_RESYNC) {
178 dev->jiffies_vid_out = cur_jiffies;
179 dev->out_seq_offset = buffers_since_start;
180 buffers_since_start = 0;
181 }
182 dev->out_seq_count = buffers_since_start + dev->out_seq_offset;
183 dev->vid_out_seq_count = dev->out_seq_count - dev->vid_out_seq_start;
184 dev->vbi_out_seq_count = dev->out_seq_count - dev->vbi_out_seq_start;
185
186 vivid_thread_vid_out_tick(dev);
187 mutex_unlock(&dev->mutex);
188
189 /*
190 * Calculate the number of 'numerators' streamed since we started,
191 * not including the current buffer.
192 */
193 numerators_since_start = buffers_since_start * numerator;
194
195 /* And the number of jiffies since we started */
196 jiffies_since_start = jiffies - dev->jiffies_vid_out;
197
198 /* Increase by the 'numerator' of one buffer */
199 numerators_since_start += numerator;
200 /*
201 * Calculate when that next buffer is supposed to start
202 * in jiffies since we started streaming.
203 */
204 next_jiffies_since_start = numerators_since_start * HZ +
205 denominator / 2;
206 do_div(next_jiffies_since_start, denominator);
207 /* If it is in the past, then just schedule asap */
208 if (next_jiffies_since_start < jiffies_since_start)
209 next_jiffies_since_start = jiffies_since_start;
210
211 wait_jiffies = next_jiffies_since_start - jiffies_since_start;
212 schedule_timeout_interruptible(wait_jiffies ? wait_jiffies : 1);
213 }
214 dprintk(dev, 1, "Video Output Thread End\n");
215 return 0;
216}
217
218static void vivid_grab_controls(struct vivid_dev *dev, bool grab)
219{
220 v4l2_ctrl_grab(dev->ctrl_has_crop_out, grab);
221 v4l2_ctrl_grab(dev->ctrl_has_compose_out, grab);
222 v4l2_ctrl_grab(dev->ctrl_has_scaler_out, grab);
223 v4l2_ctrl_grab(dev->ctrl_tx_mode, grab);
224 v4l2_ctrl_grab(dev->ctrl_tx_rgb_range, grab);
225}
226
227int vivid_start_generating_vid_out(struct vivid_dev *dev, bool *pstreaming)
228{
229 dprintk(dev, 1, "%s\n", __func__);
230
231 if (dev->kthread_vid_out) {
232 u32 seq_count = dev->out_seq_count + dev->seq_wrap * 128;
233
234 if (pstreaming == &dev->vid_out_streaming)
235 dev->vid_out_seq_start = seq_count;
236 else
237 dev->vbi_out_seq_start = seq_count;
238 *pstreaming = true;
239 return 0;
240 }
241
242 /* Resets frame counters */
243 dev->jiffies_vid_out = jiffies;
244 dev->vid_out_seq_start = dev->seq_wrap * 128;
245 dev->vbi_out_seq_start = dev->seq_wrap * 128;
246
247 dev->kthread_vid_out = kthread_run(vivid_thread_vid_out, dev,
248 "%s-vid-out", dev->v4l2_dev.name);
249
250 if (IS_ERR(dev->kthread_vid_out)) {
251 v4l2_err(&dev->v4l2_dev, "kernel_thread() failed\n");
252 return PTR_ERR(dev->kthread_vid_out);
253 }
254 *pstreaming = true;
255 vivid_grab_controls(dev, true);
256
257 dprintk(dev, 1, "returning from %s\n", __func__);
258 return 0;
259}
260
261void vivid_stop_generating_vid_out(struct vivid_dev *dev, bool *pstreaming)
262{
263 dprintk(dev, 1, "%s\n", __func__);
264
265 if (dev->kthread_vid_out == NULL)
266 return;
267
268 *pstreaming = false;
269 if (pstreaming == &dev->vid_out_streaming) {
270 /* Release all active buffers */
271 while (!list_empty(&dev->vid_out_active)) {
272 struct vivid_buffer *buf;
273
274 buf = list_entry(dev->vid_out_active.next,
275 struct vivid_buffer, list);
276 list_del(&buf->list);
277 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
278 dprintk(dev, 2, "vid_out buffer %d done\n",
279 buf->vb.v4l2_buf.index);
280 }
281 }
282
283 if (pstreaming == &dev->vbi_out_streaming) {
284 while (!list_empty(&dev->vbi_out_active)) {
285 struct vivid_buffer *buf;
286
287 buf = list_entry(dev->vbi_out_active.next,
288 struct vivid_buffer, list);
289 list_del(&buf->list);
290 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
291 dprintk(dev, 2, "vbi_out buffer %d done\n",
292 buf->vb.v4l2_buf.index);
293 }
294 }
295
296 if (dev->vid_out_streaming || dev->vbi_out_streaming)
297 return;
298
299 /* shutdown control thread */
300 vivid_grab_controls(dev, false);
301 mutex_unlock(&dev->mutex);
302 kthread_stop(dev->kthread_vid_out);
303 dev->kthread_vid_out = NULL;
304 mutex_lock(&dev->mutex);
305}
diff --git a/drivers/media/platform/vivid/vivid-kthread-out.h b/drivers/media/platform/vivid/vivid-kthread-out.h
new file mode 100644
index 000000000000..2bf04a17b05d
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-kthread-out.h
@@ -0,0 +1,26 @@
1/*
2 * vivid-kthread-out.h - video/vbi output thread support functions.
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#ifndef _VIVID_KTHREAD_OUT_H_
21#define _VIVID_KTHREAD_OUT_H_
22
23int vivid_start_generating_vid_out(struct vivid_dev *dev, bool *pstreaming);
24void vivid_stop_generating_vid_out(struct vivid_dev *dev, bool *pstreaming);
25
26#endif
diff --git a/drivers/media/platform/vivid/vivid-osd.c b/drivers/media/platform/vivid/vivid-osd.c
new file mode 100644
index 000000000000..084d346fb4c4
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-osd.c
@@ -0,0 +1,400 @@
1/*
2 * vivid-osd.c - osd support for testing overlays.
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#include <linux/module.h>
21#include <linux/errno.h>
22#include <linux/kernel.h>
23#include <linux/init.h>
24#include <linux/sched.h>
25#include <linux/slab.h>
26#include <linux/font.h>
27#include <linux/mutex.h>
28#include <linux/videodev2.h>
29#include <linux/kthread.h>
30#include <linux/freezer.h>
31#include <linux/fb.h>
32#include <media/videobuf2-vmalloc.h>
33#include <media/v4l2-device.h>
34#include <media/v4l2-ioctl.h>
35#include <media/v4l2-ctrls.h>
36#include <media/v4l2-fh.h>
37#include <media/v4l2-event.h>
38#include <media/v4l2-common.h>
39
40#include "vivid-core.h"
41#include "vivid-osd.h"
42
43#define MAX_OSD_WIDTH 720
44#define MAX_OSD_HEIGHT 576
45
46/*
47 * Order: white, yellow, cyan, green, magenta, red, blue, black,
48 * and same again with the alpha bit set (if any)
49 */
50static const u16 rgb555[16] = {
51 0x7fff, 0x7fe0, 0x03ff, 0x03e0, 0x7c1f, 0x7c00, 0x001f, 0x0000,
52 0xffff, 0xffe0, 0x83ff, 0x83e0, 0xfc1f, 0xfc00, 0x801f, 0x8000
53};
54
55static const u16 rgb565[16] = {
56 0xffff, 0xffe0, 0x07ff, 0x07e0, 0xf81f, 0xf800, 0x001f, 0x0000,
57 0xffff, 0xffe0, 0x07ff, 0x07e0, 0xf81f, 0xf800, 0x001f, 0x0000
58};
59
60void vivid_clear_fb(struct vivid_dev *dev)
61{
62 void *p = dev->video_vbase;
63 const u16 *rgb = rgb555;
64 unsigned x, y;
65
66 if (dev->fb_defined.green.length == 6)
67 rgb = rgb565;
68
69 for (y = 0; y < dev->display_height; y++) {
70 u16 *d = p;
71
72 for (x = 0; x < dev->display_width; x++)
73 d[x] = rgb[(y / 16 + x / 16) % 16];
74 p += dev->display_byte_stride;
75 }
76}
77
78/* --------------------------------------------------------------------- */
79
80static int vivid_fb_ioctl(struct fb_info *info, unsigned cmd, unsigned long arg)
81{
82 struct vivid_dev *dev = (struct vivid_dev *)info->par;
83
84 switch (cmd) {
85 case FBIOGET_VBLANK: {
86 struct fb_vblank vblank;
87
88 vblank.flags = FB_VBLANK_HAVE_COUNT | FB_VBLANK_HAVE_VCOUNT |
89 FB_VBLANK_HAVE_VSYNC;
90 vblank.count = 0;
91 vblank.vcount = 0;
92 vblank.hcount = 0;
93 if (copy_to_user((void __user *)arg, &vblank, sizeof(vblank)))
94 return -EFAULT;
95 return 0;
96 }
97
98 default:
99 dprintk(dev, 1, "Unknown ioctl %08x\n", cmd);
100 return -EINVAL;
101 }
102 return 0;
103}
104
105/* Framebuffer device handling */
106
107static int vivid_fb_set_var(struct vivid_dev *dev, struct fb_var_screeninfo *var)
108{
109 dprintk(dev, 1, "vivid_fb_set_var\n");
110
111 if (var->bits_per_pixel != 16) {
112 dprintk(dev, 1, "vivid_fb_set_var - Invalid bpp\n");
113 return -EINVAL;
114 }
115 dev->display_byte_stride = var->xres * dev->bytes_per_pixel;
116
117 return 0;
118}
119
120static int vivid_fb_get_fix(struct vivid_dev *dev, struct fb_fix_screeninfo *fix)
121{
122 dprintk(dev, 1, "vivid_fb_get_fix\n");
123 memset(fix, 0, sizeof(struct fb_fix_screeninfo));
124 strlcpy(fix->id, "vioverlay fb", sizeof(fix->id));
125 fix->smem_start = dev->video_pbase;
126 fix->smem_len = dev->video_buffer_size;
127 fix->type = FB_TYPE_PACKED_PIXELS;
128 fix->visual = FB_VISUAL_TRUECOLOR;
129 fix->xpanstep = 1;
130 fix->ypanstep = 1;
131 fix->ywrapstep = 0;
132 fix->line_length = dev->display_byte_stride;
133 fix->accel = FB_ACCEL_NONE;
134 return 0;
135}
136
137/* Check the requested display mode, returning -EINVAL if we can't
138 handle it. */
139
140static int _vivid_fb_check_var(struct fb_var_screeninfo *var, struct vivid_dev *dev)
141{
142 dprintk(dev, 1, "vivid_fb_check_var\n");
143
144 var->bits_per_pixel = 16;
145 if (var->green.length == 5) {
146 var->red.offset = 10;
147 var->red.length = 5;
148 var->green.offset = 5;
149 var->green.length = 5;
150 var->blue.offset = 0;
151 var->blue.length = 5;
152 var->transp.offset = 15;
153 var->transp.length = 1;
154 } else {
155 var->red.offset = 11;
156 var->red.length = 5;
157 var->green.offset = 5;
158 var->green.length = 6;
159 var->blue.offset = 0;
160 var->blue.length = 5;
161 var->transp.offset = 0;
162 var->transp.length = 0;
163 }
164 var->xoffset = var->yoffset = 0;
165 var->left_margin = var->upper_margin = 0;
166 var->nonstd = 0;
167
168 var->vmode &= ~FB_VMODE_MASK;
169 var->vmode = FB_VMODE_NONINTERLACED;
170
171 /* Dummy values */
172 var->hsync_len = 24;
173 var->vsync_len = 2;
174 var->pixclock = 84316;
175 var->right_margin = 776;
176 var->lower_margin = 591;
177 return 0;
178}
179
180static int vivid_fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
181{
182 struct vivid_dev *dev = (struct vivid_dev *) info->par;
183
184 dprintk(dev, 1, "vivid_fb_check_var\n");
185 return _vivid_fb_check_var(var, dev);
186}
187
188static int vivid_fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
189{
190 return 0;
191}
192
193static int vivid_fb_set_par(struct fb_info *info)
194{
195 int rc = 0;
196 struct vivid_dev *dev = (struct vivid_dev *) info->par;
197
198 dprintk(dev, 1, "vivid_fb_set_par\n");
199
200 rc = vivid_fb_set_var(dev, &info->var);
201 vivid_fb_get_fix(dev, &info->fix);
202 return rc;
203}
204
205static int vivid_fb_setcolreg(unsigned regno, unsigned red, unsigned green,
206 unsigned blue, unsigned transp,
207 struct fb_info *info)
208{
209 u32 color, *palette;
210
211 if (regno >= info->cmap.len)
212 return -EINVAL;
213
214 color = ((transp & 0xFF00) << 16) | ((red & 0xFF00) << 8) |
215 (green & 0xFF00) | ((blue & 0xFF00) >> 8);
216 if (regno >= 16)
217 return -EINVAL;
218
219 palette = info->pseudo_palette;
220 if (info->var.bits_per_pixel == 16) {
221 switch (info->var.green.length) {
222 case 6:
223 color = (red & 0xf800) |
224 ((green & 0xfc00) >> 5) |
225 ((blue & 0xf800) >> 11);
226 break;
227 case 5:
228 color = ((red & 0xf800) >> 1) |
229 ((green & 0xf800) >> 6) |
230 ((blue & 0xf800) >> 11) |
231 (transp ? 0x8000 : 0);
232 break;
233 }
234 }
235 palette[regno] = color;
236 return 0;
237}
238
239/* We don't really support blanking. All this does is enable or
240 disable the OSD. */
241static int vivid_fb_blank(int blank_mode, struct fb_info *info)
242{
243 struct vivid_dev *dev = (struct vivid_dev *)info->par;
244
245 dprintk(dev, 1, "Set blanking mode : %d\n", blank_mode);
246 switch (blank_mode) {
247 case FB_BLANK_UNBLANK:
248 break;
249 case FB_BLANK_NORMAL:
250 case FB_BLANK_HSYNC_SUSPEND:
251 case FB_BLANK_VSYNC_SUSPEND:
252 case FB_BLANK_POWERDOWN:
253 break;
254 }
255 return 0;
256}
257
258static struct fb_ops vivid_fb_ops = {
259 .owner = THIS_MODULE,
260 .fb_check_var = vivid_fb_check_var,
261 .fb_set_par = vivid_fb_set_par,
262 .fb_setcolreg = vivid_fb_setcolreg,
263 .fb_fillrect = cfb_fillrect,
264 .fb_copyarea = cfb_copyarea,
265 .fb_imageblit = cfb_imageblit,
266 .fb_cursor = NULL,
267 .fb_ioctl = vivid_fb_ioctl,
268 .fb_pan_display = vivid_fb_pan_display,
269 .fb_blank = vivid_fb_blank,
270};
271
272/* Initialization */
273
274
275/* Setup our initial video mode */
276static int vivid_fb_init_vidmode(struct vivid_dev *dev)
277{
278 struct v4l2_rect start_window;
279
280 /* Color mode */
281
282 dev->bits_per_pixel = 16;
283 dev->bytes_per_pixel = dev->bits_per_pixel / 8;
284
285 start_window.width = MAX_OSD_WIDTH;
286 start_window.left = 0;
287
288 dev->display_byte_stride = start_window.width * dev->bytes_per_pixel;
289
290 /* Vertical size & position */
291
292 start_window.height = MAX_OSD_HEIGHT;
293 start_window.top = 0;
294
295 dev->display_width = start_window.width;
296 dev->display_height = start_window.height;
297
298 /* Generate a valid fb_var_screeninfo */
299
300 dev->fb_defined.xres = dev->display_width;
301 dev->fb_defined.yres = dev->display_height;
302 dev->fb_defined.xres_virtual = dev->display_width;
303 dev->fb_defined.yres_virtual = dev->display_height;
304 dev->fb_defined.bits_per_pixel = dev->bits_per_pixel;
305 dev->fb_defined.vmode = FB_VMODE_NONINTERLACED;
306 dev->fb_defined.left_margin = start_window.left + 1;
307 dev->fb_defined.upper_margin = start_window.top + 1;
308 dev->fb_defined.accel_flags = FB_ACCEL_NONE;
309 dev->fb_defined.nonstd = 0;
310 /* set default to 1:5:5:5 */
311 dev->fb_defined.green.length = 5;
312
313 /* We've filled in the most data, let the usual mode check
314 routine fill in the rest. */
315 _vivid_fb_check_var(&dev->fb_defined, dev);
316
317 /* Generate valid fb_fix_screeninfo */
318
319 vivid_fb_get_fix(dev, &dev->fb_fix);
320
321 /* Generate valid fb_info */
322
323 dev->fb_info.node = -1;
324 dev->fb_info.flags = FBINFO_FLAG_DEFAULT;
325 dev->fb_info.fbops = &vivid_fb_ops;
326 dev->fb_info.par = dev;
327 dev->fb_info.var = dev->fb_defined;
328 dev->fb_info.fix = dev->fb_fix;
329 dev->fb_info.screen_base = (u8 __iomem *)dev->video_vbase;
330 dev->fb_info.fbops = &vivid_fb_ops;
331
332 /* Supply some monitor specs. Bogus values will do for now */
333 dev->fb_info.monspecs.hfmin = 8000;
334 dev->fb_info.monspecs.hfmax = 70000;
335 dev->fb_info.monspecs.vfmin = 10;
336 dev->fb_info.monspecs.vfmax = 100;
337
338 /* Allocate color map */
339 if (fb_alloc_cmap(&dev->fb_info.cmap, 256, 1)) {
340 pr_err("abort, unable to alloc cmap\n");
341 return -ENOMEM;
342 }
343
344 /* Allocate the pseudo palette */
345 dev->fb_info.pseudo_palette = kmalloc_array(16, sizeof(u32), GFP_KERNEL);
346
347 return dev->fb_info.pseudo_palette ? 0 : -ENOMEM;
348}
349
350/* Release any memory we've grabbed */
351void vivid_fb_release_buffers(struct vivid_dev *dev)
352{
353 if (dev->video_vbase == NULL)
354 return;
355
356 /* Release cmap */
357 if (dev->fb_info.cmap.len)
358 fb_dealloc_cmap(&dev->fb_info.cmap);
359
360 /* Release pseudo palette */
361 kfree(dev->fb_info.pseudo_palette);
362 kfree((void *)dev->video_vbase);
363}
364
365/* Initialize the specified card */
366
367int vivid_fb_init(struct vivid_dev *dev)
368{
369 int ret;
370
371 dev->video_buffer_size = MAX_OSD_HEIGHT * MAX_OSD_WIDTH * 2;
372 dev->video_vbase = kzalloc(dev->video_buffer_size, GFP_KERNEL | GFP_DMA32);
373 if (dev->video_vbase == NULL)
374 return -ENOMEM;
375 dev->video_pbase = virt_to_phys(dev->video_vbase);
376
377 pr_info("Framebuffer at 0x%lx, mapped to 0x%p, size %dk\n",
378 dev->video_pbase, dev->video_vbase,
379 dev->video_buffer_size / 1024);
380
381 /* Set the startup video mode information */
382 ret = vivid_fb_init_vidmode(dev);
383 if (ret) {
384 vivid_fb_release_buffers(dev);
385 return ret;
386 }
387
388 vivid_clear_fb(dev);
389
390 /* Register the framebuffer */
391 if (register_framebuffer(&dev->fb_info) < 0) {
392 vivid_fb_release_buffers(dev);
393 return -EINVAL;
394 }
395
396 /* Set the card to the requested mode */
397 vivid_fb_set_par(&dev->fb_info);
398 return 0;
399
400}
diff --git a/drivers/media/platform/vivid/vivid-osd.h b/drivers/media/platform/vivid/vivid-osd.h
new file mode 100644
index 000000000000..57c9daa5940a
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-osd.h
@@ -0,0 +1,27 @@
1/*
2 * vivid-osd.h - output overlay support functions.
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#ifndef _VIVID_OSD_H_
21#define _VIVID_OSD_H_
22
23int vivid_fb_init(struct vivid_dev *dev);
24void vivid_fb_release_buffers(struct vivid_dev *dev);
25void vivid_clear_fb(struct vivid_dev *dev);
26
27#endif
diff --git a/drivers/media/platform/vivid/vivid-radio-common.c b/drivers/media/platform/vivid/vivid-radio-common.c
new file mode 100644
index 000000000000..78c1e920670a
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-radio-common.c
@@ -0,0 +1,189 @@
1/*
2 * vivid-radio-common.c - common radio rx/tx support functions.
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#include <linux/errno.h>
21#include <linux/kernel.h>
22#include <linux/delay.h>
23#include <linux/videodev2.h>
24
25#include "vivid-core.h"
26#include "vivid-ctrls.h"
27#include "vivid-radio-common.h"
28#include "vivid-rds-gen.h"
29
30/*
31 * These functions are shared between the vivid receiver and transmitter
32 * since both use the same frequency bands.
33 */
34
35const struct v4l2_frequency_band vivid_radio_bands[TOT_BANDS] = {
36 /* Band FM */
37 {
38 .type = V4L2_TUNER_RADIO,
39 .index = 0,
40 .capability = V4L2_TUNER_CAP_LOW | V4L2_TUNER_CAP_STEREO |
41 V4L2_TUNER_CAP_FREQ_BANDS,
42 .rangelow = FM_FREQ_RANGE_LOW,
43 .rangehigh = FM_FREQ_RANGE_HIGH,
44 .modulation = V4L2_BAND_MODULATION_FM,
45 },
46 /* Band AM */
47 {
48 .type = V4L2_TUNER_RADIO,
49 .index = 1,
50 .capability = V4L2_TUNER_CAP_LOW | V4L2_TUNER_CAP_FREQ_BANDS,
51 .rangelow = AM_FREQ_RANGE_LOW,
52 .rangehigh = AM_FREQ_RANGE_HIGH,
53 .modulation = V4L2_BAND_MODULATION_AM,
54 },
55 /* Band SW */
56 {
57 .type = V4L2_TUNER_RADIO,
58 .index = 2,
59 .capability = V4L2_TUNER_CAP_LOW | V4L2_TUNER_CAP_FREQ_BANDS,
60 .rangelow = SW_FREQ_RANGE_LOW,
61 .rangehigh = SW_FREQ_RANGE_HIGH,
62 .modulation = V4L2_BAND_MODULATION_AM,
63 },
64};
65
66/*
67 * Initialize the RDS generator. If we can loop, then the RDS generator
68 * is set up with the values from the RDS TX controls, otherwise it
69 * will fill in standard values using one of two alternates.
70 */
71void vivid_radio_rds_init(struct vivid_dev *dev)
72{
73 struct vivid_rds_gen *rds = &dev->rds_gen;
74 bool alt = dev->radio_rx_rds_use_alternates;
75
76 /* Do nothing, blocks will be filled by the transmitter */
77 if (dev->radio_rds_loop && !dev->radio_tx_rds_controls)
78 return;
79
80 if (dev->radio_rds_loop) {
81 v4l2_ctrl_lock(dev->radio_tx_rds_pi);
82 rds->picode = dev->radio_tx_rds_pi->cur.val;
83 rds->pty = dev->radio_tx_rds_pty->cur.val;
84 rds->mono_stereo = dev->radio_tx_rds_mono_stereo->cur.val;
85 rds->art_head = dev->radio_tx_rds_art_head->cur.val;
86 rds->compressed = dev->radio_tx_rds_compressed->cur.val;
87 rds->dyn_pty = dev->radio_tx_rds_dyn_pty->cur.val;
88 rds->ta = dev->radio_tx_rds_ta->cur.val;
89 rds->tp = dev->radio_tx_rds_tp->cur.val;
90 rds->ms = dev->radio_tx_rds_ms->cur.val;
91 strlcpy(rds->psname,
92 dev->radio_tx_rds_psname->p_cur.p_char,
93 sizeof(rds->psname));
94 strlcpy(rds->radiotext,
95 dev->radio_tx_rds_radiotext->p_cur.p_char + alt * 64,
96 sizeof(rds->radiotext));
97 v4l2_ctrl_unlock(dev->radio_tx_rds_pi);
98 } else {
99 vivid_rds_gen_fill(rds, dev->radio_rx_freq, alt);
100 }
101 if (dev->radio_rx_rds_controls) {
102 v4l2_ctrl_s_ctrl(dev->radio_rx_rds_pty, rds->pty);
103 v4l2_ctrl_s_ctrl(dev->radio_rx_rds_ta, rds->ta);
104 v4l2_ctrl_s_ctrl(dev->radio_rx_rds_tp, rds->tp);
105 v4l2_ctrl_s_ctrl(dev->radio_rx_rds_ms, rds->ms);
106 v4l2_ctrl_s_ctrl_string(dev->radio_rx_rds_psname, rds->psname);
107 v4l2_ctrl_s_ctrl_string(dev->radio_rx_rds_radiotext, rds->radiotext);
108 if (!dev->radio_rds_loop)
109 dev->radio_rx_rds_use_alternates = !dev->radio_rx_rds_use_alternates;
110 }
111 vivid_rds_generate(rds);
112}
113
114/*
115 * Calculate the emulated signal quality taking into account the frequency
116 * the transmitter is using.
117 */
118static void vivid_radio_calc_sig_qual(struct vivid_dev *dev)
119{
120 int mod = 16000;
121 int delta = 800;
122 int sig_qual, sig_qual_tx = mod;
123
124 /*
125 * For SW and FM there is a channel every 1000 kHz, for AM there is one
126 * every 100 kHz.
127 */
128 if (dev->radio_rx_freq <= AM_FREQ_RANGE_HIGH) {
129 mod /= 10;
130 delta /= 10;
131 }
132 sig_qual = (dev->radio_rx_freq + delta) % mod - delta;
133 if (dev->has_radio_tx)
134 sig_qual_tx = dev->radio_rx_freq - dev->radio_tx_freq;
135 if (abs(sig_qual_tx) <= abs(sig_qual)) {
136 sig_qual = sig_qual_tx;
137 /*
138 * Zero the internal rds buffer if we are going to loop
139 * rds blocks.
140 */
141 if (!dev->radio_rds_loop && !dev->radio_tx_rds_controls)
142 memset(dev->rds_gen.data, 0,
143 sizeof(dev->rds_gen.data));
144 dev->radio_rds_loop = dev->radio_rx_freq >= FM_FREQ_RANGE_LOW;
145 } else {
146 dev->radio_rds_loop = false;
147 }
148 if (dev->radio_rx_freq <= AM_FREQ_RANGE_HIGH)
149 sig_qual *= 10;
150 dev->radio_rx_sig_qual = sig_qual;
151}
152
153int vivid_radio_g_frequency(struct file *file, const unsigned *pfreq, struct v4l2_frequency *vf)
154{
155 if (vf->tuner != 0)
156 return -EINVAL;
157 vf->frequency = *pfreq;
158 return 0;
159}
160
161int vivid_radio_s_frequency(struct file *file, unsigned *pfreq, const struct v4l2_frequency *vf)
162{
163 struct vivid_dev *dev = video_drvdata(file);
164 unsigned freq;
165 unsigned band;
166
167 if (vf->tuner != 0)
168 return -EINVAL;
169
170 if (vf->frequency >= (FM_FREQ_RANGE_LOW + SW_FREQ_RANGE_HIGH) / 2)
171 band = BAND_FM;
172 else if (vf->frequency <= (AM_FREQ_RANGE_HIGH + SW_FREQ_RANGE_LOW) / 2)
173 band = BAND_AM;
174 else
175 band = BAND_SW;
176
177 freq = clamp_t(u32, vf->frequency, vivid_radio_bands[band].rangelow,
178 vivid_radio_bands[band].rangehigh);
179 *pfreq = freq;
180
181 /*
182 * For both receiver and transmitter recalculate the signal quality
183 * (since that depends on both frequencies) and re-init the rds
184 * generator.
185 */
186 vivid_radio_calc_sig_qual(dev);
187 vivid_radio_rds_init(dev);
188 return 0;
189}
diff --git a/drivers/media/platform/vivid/vivid-radio-common.h b/drivers/media/platform/vivid/vivid-radio-common.h
new file mode 100644
index 000000000000..92fe589141b7
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-radio-common.h
@@ -0,0 +1,40 @@
1/*
2 * vivid-radio-common.h - common radio rx/tx support functions.
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#ifndef _VIVID_RADIO_COMMON_H_
21#define _VIVID_RADIO_COMMON_H_
22
23/* The supported radio frequency ranges in kHz */
24#define FM_FREQ_RANGE_LOW (64000U * 16U)
25#define FM_FREQ_RANGE_HIGH (108000U * 16U)
26#define AM_FREQ_RANGE_LOW (520U * 16U)
27#define AM_FREQ_RANGE_HIGH (1710U * 16U)
28#define SW_FREQ_RANGE_LOW (2300U * 16U)
29#define SW_FREQ_RANGE_HIGH (26100U * 16U)
30
31enum { BAND_FM, BAND_AM, BAND_SW, TOT_BANDS };
32
33extern const struct v4l2_frequency_band vivid_radio_bands[TOT_BANDS];
34
35int vivid_radio_g_frequency(struct file *file, const unsigned *freq, struct v4l2_frequency *vf);
36int vivid_radio_s_frequency(struct file *file, unsigned *freq, const struct v4l2_frequency *vf);
37
38void vivid_radio_rds_init(struct vivid_dev *dev);
39
40#endif
diff --git a/drivers/media/platform/vivid/vivid-radio-rx.c b/drivers/media/platform/vivid/vivid-radio-rx.c
new file mode 100644
index 000000000000..c7651a506668
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-radio-rx.c
@@ -0,0 +1,287 @@
1/*
2 * vivid-radio-rx.c - radio receiver support functions.
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#include <linux/errno.h>
21#include <linux/kernel.h>
22#include <linux/delay.h>
23#include <linux/videodev2.h>
24#include <linux/v4l2-dv-timings.h>
25#include <media/v4l2-common.h>
26#include <media/v4l2-event.h>
27#include <media/v4l2-dv-timings.h>
28
29#include "vivid-core.h"
30#include "vivid-ctrls.h"
31#include "vivid-radio-common.h"
32#include "vivid-rds-gen.h"
33#include "vivid-radio-rx.h"
34
35ssize_t vivid_radio_rx_read(struct file *file, char __user *buf,
36 size_t size, loff_t *offset)
37{
38 struct vivid_dev *dev = video_drvdata(file);
39 struct timespec ts;
40 struct v4l2_rds_data *data = dev->rds_gen.data;
41 bool use_alternates;
42 unsigned blk;
43 int perc;
44 int i;
45
46 if (dev->radio_rx_rds_controls)
47 return -EINVAL;
48 if (size < sizeof(*data))
49 return 0;
50 size = sizeof(*data) * (size / sizeof(*data));
51
52 if (mutex_lock_interruptible(&dev->mutex))
53 return -ERESTARTSYS;
54 if (dev->radio_rx_rds_owner &&
55 file->private_data != dev->radio_rx_rds_owner) {
56 mutex_unlock(&dev->mutex);
57 return -EBUSY;
58 }
59 if (dev->radio_rx_rds_owner == NULL) {
60 vivid_radio_rds_init(dev);
61 dev->radio_rx_rds_owner = file->private_data;
62 }
63
64retry:
65 ktime_get_ts(&ts);
66 use_alternates = ts.tv_sec % 10 >= 5;
67 if (dev->radio_rx_rds_last_block == 0 ||
68 dev->radio_rx_rds_use_alternates != use_alternates) {
69 dev->radio_rx_rds_use_alternates = use_alternates;
70 /* Re-init the RDS generator */
71 vivid_radio_rds_init(dev);
72 }
73 ts = timespec_sub(ts, dev->radio_rds_init_ts);
74 blk = ts.tv_sec * 100 + ts.tv_nsec / 10000000;
75 blk = (blk * VIVID_RDS_GEN_BLOCKS) / 500;
76 if (blk >= dev->radio_rx_rds_last_block + VIVID_RDS_GEN_BLOCKS)
77 dev->radio_rx_rds_last_block = blk - VIVID_RDS_GEN_BLOCKS + 1;
78
79 /*
80 * No data is available if there hasn't been time to get new data,
81 * or if the RDS receiver has been disabled, or if we use the data
82 * from the RDS transmitter and that RDS transmitter has been disabled,
83 * or if the signal quality is too weak.
84 */
85 if (blk == dev->radio_rx_rds_last_block || !dev->radio_rx_rds_enabled ||
86 (dev->radio_rds_loop && !(dev->radio_tx_subchans & V4L2_TUNER_SUB_RDS)) ||
87 abs(dev->radio_rx_sig_qual) > 200) {
88 mutex_unlock(&dev->mutex);
89 if (file->f_flags & O_NONBLOCK)
90 return -EWOULDBLOCK;
91 if (msleep_interruptible(20) && signal_pending(current))
92 return -EINTR;
93 if (mutex_lock_interruptible(&dev->mutex))
94 return -ERESTARTSYS;
95 goto retry;
96 }
97
98 /* abs(dev->radio_rx_sig_qual) <= 200, map that to a 0-50% range */
99 perc = abs(dev->radio_rx_sig_qual) / 4;
100
101 for (i = 0; i < size && blk > dev->radio_rx_rds_last_block;
102 dev->radio_rx_rds_last_block++) {
103 unsigned data_blk = dev->radio_rx_rds_last_block % VIVID_RDS_GEN_BLOCKS;
104 struct v4l2_rds_data rds = data[data_blk];
105
106 if (data_blk == 0 && dev->radio_rds_loop)
107 vivid_radio_rds_init(dev);
108 if (perc && prandom_u32_max(100) < perc) {
109 switch (prandom_u32_max(4)) {
110 case 0:
111 rds.block |= V4L2_RDS_BLOCK_CORRECTED;
112 break;
113 case 1:
114 rds.block |= V4L2_RDS_BLOCK_INVALID;
115 break;
116 case 2:
117 rds.block |= V4L2_RDS_BLOCK_ERROR;
118 rds.lsb = prandom_u32_max(256);
119 rds.msb = prandom_u32_max(256);
120 break;
121 case 3: /* Skip block altogether */
122 if (i)
123 continue;
124 /*
125 * Must make sure at least one block is
126 * returned, otherwise the application
127 * might think that end-of-file occurred.
128 */
129 break;
130 }
131 }
132 if (copy_to_user(buf + i, &rds, sizeof(rds))) {
133 i = -EFAULT;
134 break;
135 }
136 i += sizeof(rds);
137 }
138 mutex_unlock(&dev->mutex);
139 return i;
140}
141
142unsigned int vivid_radio_rx_poll(struct file *file, struct poll_table_struct *wait)
143{
144 return POLLIN | POLLRDNORM | v4l2_ctrl_poll(file, wait);
145}
146
147int vivid_radio_rx_enum_freq_bands(struct file *file, void *fh, struct v4l2_frequency_band *band)
148{
149 if (band->tuner != 0)
150 return -EINVAL;
151
152 if (band->index >= TOT_BANDS)
153 return -EINVAL;
154
155 *band = vivid_radio_bands[band->index];
156 return 0;
157}
158
159int vivid_radio_rx_s_hw_freq_seek(struct file *file, void *fh, const struct v4l2_hw_freq_seek *a)
160{
161 struct vivid_dev *dev = video_drvdata(file);
162 unsigned low, high;
163 unsigned freq;
164 unsigned spacing;
165 unsigned band;
166
167 if (a->tuner)
168 return -EINVAL;
169 if (a->wrap_around && dev->radio_rx_hw_seek_mode == VIVID_HW_SEEK_BOUNDED)
170 return -EINVAL;
171
172 if (!a->wrap_around && dev->radio_rx_hw_seek_mode == VIVID_HW_SEEK_WRAP)
173 return -EINVAL;
174 if (!a->rangelow ^ !a->rangehigh)
175 return -EINVAL;
176
177 if (file->f_flags & O_NONBLOCK)
178 return -EWOULDBLOCK;
179
180 if (a->rangelow) {
181 for (band = 0; band < TOT_BANDS; band++)
182 if (a->rangelow >= vivid_radio_bands[band].rangelow &&
183 a->rangehigh <= vivid_radio_bands[band].rangehigh)
184 break;
185 if (band == TOT_BANDS)
186 return -EINVAL;
187 if (!dev->radio_rx_hw_seek_prog_lim &&
188 (a->rangelow != vivid_radio_bands[band].rangelow ||
189 a->rangehigh != vivid_radio_bands[band].rangehigh))
190 return -EINVAL;
191 low = a->rangelow;
192 high = a->rangehigh;
193 } else {
194 for (band = 0; band < TOT_BANDS; band++)
195 if (dev->radio_rx_freq >= vivid_radio_bands[band].rangelow &&
196 dev->radio_rx_freq <= vivid_radio_bands[band].rangehigh)
197 break;
198 low = vivid_radio_bands[band].rangelow;
199 high = vivid_radio_bands[band].rangehigh;
200 }
201 spacing = band == BAND_AM ? 1600 : 16000;
202 freq = clamp(dev->radio_rx_freq, low, high);
203
204 if (a->seek_upward) {
205 freq = spacing * (freq / spacing) + spacing;
206 if (freq > high) {
207 if (!a->wrap_around)
208 return -ENODATA;
209 freq = spacing * (low / spacing) + spacing;
210 if (freq >= dev->radio_rx_freq)
211 return -ENODATA;
212 }
213 } else {
214 freq = spacing * ((freq + spacing - 1) / spacing) - spacing;
215 if (freq < low) {
216 if (!a->wrap_around)
217 return -ENODATA;
218 freq = spacing * ((high + spacing - 1) / spacing) - spacing;
219 if (freq <= dev->radio_rx_freq)
220 return -ENODATA;
221 }
222 }
223 return 0;
224}
225
226int vivid_radio_rx_g_tuner(struct file *file, void *fh, struct v4l2_tuner *vt)
227{
228 struct vivid_dev *dev = video_drvdata(file);
229 int delta = 800;
230 int sig_qual;
231
232 if (vt->index > 0)
233 return -EINVAL;
234
235 strlcpy(vt->name, "AM/FM/SW Receiver", sizeof(vt->name));
236 vt->capability = V4L2_TUNER_CAP_LOW | V4L2_TUNER_CAP_STEREO |
237 V4L2_TUNER_CAP_FREQ_BANDS | V4L2_TUNER_CAP_RDS |
238 (dev->radio_rx_rds_controls ?
239 V4L2_TUNER_CAP_RDS_CONTROLS :
240 V4L2_TUNER_CAP_RDS_BLOCK_IO) |
241 (dev->radio_rx_hw_seek_prog_lim ?
242 V4L2_TUNER_CAP_HWSEEK_PROG_LIM : 0);
243 switch (dev->radio_rx_hw_seek_mode) {
244 case VIVID_HW_SEEK_BOUNDED:
245 vt->capability |= V4L2_TUNER_CAP_HWSEEK_BOUNDED;
246 break;
247 case VIVID_HW_SEEK_WRAP:
248 vt->capability |= V4L2_TUNER_CAP_HWSEEK_WRAP;
249 break;
250 case VIVID_HW_SEEK_BOTH:
251 vt->capability |= V4L2_TUNER_CAP_HWSEEK_WRAP |
252 V4L2_TUNER_CAP_HWSEEK_BOUNDED;
253 break;
254 }
255 vt->rangelow = AM_FREQ_RANGE_LOW;
256 vt->rangehigh = FM_FREQ_RANGE_HIGH;
257 sig_qual = dev->radio_rx_sig_qual;
258 vt->signal = abs(sig_qual) > delta ? 0 :
259 0xffff - (abs(sig_qual) * 0xffff) / delta;
260 vt->afc = sig_qual > delta ? 0 : sig_qual;
261 if (abs(sig_qual) > delta)
262 vt->rxsubchans = 0;
263 else if (dev->radio_rx_freq < FM_FREQ_RANGE_LOW || vt->signal < 0x8000)
264 vt->rxsubchans = V4L2_TUNER_SUB_MONO;
265 else if (dev->radio_rds_loop && !(dev->radio_tx_subchans & V4L2_TUNER_SUB_STEREO))
266 vt->rxsubchans = V4L2_TUNER_SUB_MONO;
267 else
268 vt->rxsubchans = V4L2_TUNER_SUB_STEREO;
269 if (dev->radio_rx_rds_enabled &&
270 (!dev->radio_rds_loop || (dev->radio_tx_subchans & V4L2_TUNER_SUB_RDS)) &&
271 dev->radio_rx_freq >= FM_FREQ_RANGE_LOW && vt->signal >= 0xc000)
272 vt->rxsubchans |= V4L2_TUNER_SUB_RDS;
273 if (dev->radio_rx_rds_controls)
274 vivid_radio_rds_init(dev);
275 vt->audmode = dev->radio_rx_audmode;
276 return 0;
277}
278
279int vivid_radio_rx_s_tuner(struct file *file, void *fh, const struct v4l2_tuner *vt)
280{
281 struct vivid_dev *dev = video_drvdata(file);
282
283 if (vt->index)
284 return -EINVAL;
285 dev->radio_rx_audmode = vt->audmode >= V4L2_TUNER_MODE_STEREO;
286 return 0;
287}
diff --git a/drivers/media/platform/vivid/vivid-radio-rx.h b/drivers/media/platform/vivid/vivid-radio-rx.h
new file mode 100644
index 000000000000..1077d8f061eb
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-radio-rx.h
@@ -0,0 +1,31 @@
1/*
2 * vivid-radio-rx.h - radio receiver support functions.
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#ifndef _VIVID_RADIO_RX_H_
21#define _VIVID_RADIO_RX_H_
22
23ssize_t vivid_radio_rx_read(struct file *, char __user *, size_t, loff_t *);
24unsigned int vivid_radio_rx_poll(struct file *file, struct poll_table_struct *wait);
25
26int vivid_radio_rx_enum_freq_bands(struct file *file, void *fh, struct v4l2_frequency_band *band);
27int vivid_radio_rx_s_hw_freq_seek(struct file *file, void *fh, const struct v4l2_hw_freq_seek *a);
28int vivid_radio_rx_g_tuner(struct file *file, void *fh, struct v4l2_tuner *vt);
29int vivid_radio_rx_s_tuner(struct file *file, void *fh, const struct v4l2_tuner *vt);
30
31#endif
diff --git a/drivers/media/platform/vivid/vivid-radio-tx.c b/drivers/media/platform/vivid/vivid-radio-tx.c
new file mode 100644
index 000000000000..8c59d4f53200
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-radio-tx.c
@@ -0,0 +1,141 @@
1/*
2 * vivid-radio-tx.c - radio transmitter support functions.
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#include <linux/errno.h>
21#include <linux/kernel.h>
22#include <linux/delay.h>
23#include <linux/videodev2.h>
24#include <linux/v4l2-dv-timings.h>
25#include <media/v4l2-common.h>
26#include <media/v4l2-event.h>
27#include <media/v4l2-dv-timings.h>
28
29#include "vivid-core.h"
30#include "vivid-ctrls.h"
31#include "vivid-radio-common.h"
32#include "vivid-radio-tx.h"
33
34ssize_t vivid_radio_tx_write(struct file *file, const char __user *buf,
35 size_t size, loff_t *offset)
36{
37 struct vivid_dev *dev = video_drvdata(file);
38 struct v4l2_rds_data *data = dev->rds_gen.data;
39 struct timespec ts;
40 unsigned blk;
41 int i;
42
43 if (dev->radio_tx_rds_controls)
44 return -EINVAL;
45
46 if (size < sizeof(*data))
47 return -EINVAL;
48 size = sizeof(*data) * (size / sizeof(*data));
49
50 if (mutex_lock_interruptible(&dev->mutex))
51 return -ERESTARTSYS;
52 if (dev->radio_tx_rds_owner &&
53 file->private_data != dev->radio_tx_rds_owner) {
54 mutex_unlock(&dev->mutex);
55 return -EBUSY;
56 }
57 dev->radio_tx_rds_owner = file->private_data;
58
59retry:
60 ktime_get_ts(&ts);
61 ts = timespec_sub(ts, dev->radio_rds_init_ts);
62 blk = ts.tv_sec * 100 + ts.tv_nsec / 10000000;
63 blk = (blk * VIVID_RDS_GEN_BLOCKS) / 500;
64 if (blk - VIVID_RDS_GEN_BLOCKS >= dev->radio_tx_rds_last_block)
65 dev->radio_tx_rds_last_block = blk - VIVID_RDS_GEN_BLOCKS + 1;
66
67 /*
68 * No data is available if there hasn't been time to get new data,
69 * or if the RDS receiver has been disabled, or if we use the data
70 * from the RDS transmitter and that RDS transmitter has been disabled,
71 * or if the signal quality is too weak.
72 */
73 if (blk == dev->radio_tx_rds_last_block ||
74 !(dev->radio_tx_subchans & V4L2_TUNER_SUB_RDS)) {
75 mutex_unlock(&dev->mutex);
76 if (file->f_flags & O_NONBLOCK)
77 return -EWOULDBLOCK;
78 if (msleep_interruptible(20) && signal_pending(current))
79 return -EINTR;
80 if (mutex_lock_interruptible(&dev->mutex))
81 return -ERESTARTSYS;
82 goto retry;
83 }
84
85 for (i = 0; i < size && blk > dev->radio_tx_rds_last_block;
86 dev->radio_tx_rds_last_block++) {
87 unsigned data_blk = dev->radio_tx_rds_last_block % VIVID_RDS_GEN_BLOCKS;
88 struct v4l2_rds_data rds;
89
90 if (copy_from_user(&rds, buf + i, sizeof(rds))) {
91 i = -EFAULT;
92 break;
93 }
94 i += sizeof(rds);
95 if (!dev->radio_rds_loop)
96 continue;
97 if ((rds.block & V4L2_RDS_BLOCK_MSK) == V4L2_RDS_BLOCK_INVALID ||
98 (rds.block & V4L2_RDS_BLOCK_ERROR))
99 continue;
100 rds.block &= V4L2_RDS_BLOCK_MSK;
101 data[data_blk] = rds;
102 }
103 mutex_unlock(&dev->mutex);
104 return i;
105}
106
107unsigned int vivid_radio_tx_poll(struct file *file, struct poll_table_struct *wait)
108{
109 return POLLOUT | POLLWRNORM | v4l2_ctrl_poll(file, wait);
110}
111
112int vidioc_g_modulator(struct file *file, void *fh, struct v4l2_modulator *a)
113{
114 struct vivid_dev *dev = video_drvdata(file);
115
116 if (a->index > 0)
117 return -EINVAL;
118
119 strlcpy(a->name, "AM/FM/SW Transmitter", sizeof(a->name));
120 a->capability = V4L2_TUNER_CAP_LOW | V4L2_TUNER_CAP_STEREO |
121 V4L2_TUNER_CAP_FREQ_BANDS | V4L2_TUNER_CAP_RDS |
122 (dev->radio_tx_rds_controls ?
123 V4L2_TUNER_CAP_RDS_CONTROLS :
124 V4L2_TUNER_CAP_RDS_BLOCK_IO);
125 a->rangelow = AM_FREQ_RANGE_LOW;
126 a->rangehigh = FM_FREQ_RANGE_HIGH;
127 a->txsubchans = dev->radio_tx_subchans;
128 return 0;
129}
130
131int vidioc_s_modulator(struct file *file, void *fh, const struct v4l2_modulator *a)
132{
133 struct vivid_dev *dev = video_drvdata(file);
134
135 if (a->index)
136 return -EINVAL;
137 if (a->txsubchans & ~0x13)
138 return -EINVAL;
139 dev->radio_tx_subchans = a->txsubchans;
140 return 0;
141}
diff --git a/drivers/media/platform/vivid/vivid-radio-tx.h b/drivers/media/platform/vivid/vivid-radio-tx.h
new file mode 100644
index 000000000000..7f8ff7547119
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-radio-tx.h
@@ -0,0 +1,29 @@
1/*
2 * vivid-radio-tx.h - radio transmitter support functions.
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#ifndef _VIVID_RADIO_TX_H_
21#define _VIVID_RADIO_TX_H_
22
23ssize_t vivid_radio_tx_write(struct file *, const char __user *, size_t, loff_t *);
24unsigned int vivid_radio_tx_poll(struct file *file, struct poll_table_struct *wait);
25
26int vidioc_g_modulator(struct file *file, void *fh, struct v4l2_modulator *a);
27int vidioc_s_modulator(struct file *file, void *fh, const struct v4l2_modulator *a);
28
29#endif
diff --git a/drivers/media/platform/vivid/vivid-rds-gen.c b/drivers/media/platform/vivid/vivid-rds-gen.c
new file mode 100644
index 000000000000..c382343fdb66
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-rds-gen.c
@@ -0,0 +1,166 @@
1/*
2 * vivid-rds-gen.c - rds (radio data system) generator support functions.
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#include <linux/kernel.h>
21#include <linux/ktime.h>
22#include <linux/string.h>
23#include <linux/videodev2.h>
24
25#include "vivid-rds-gen.h"
26
27static u8 vivid_get_di(const struct vivid_rds_gen *rds, unsigned grp)
28{
29 switch (grp) {
30 case 0:
31 return (rds->dyn_pty << 2) | (grp & 3);
32 case 1:
33 return (rds->compressed << 2) | (grp & 3);
34 case 2:
35 return (rds->art_head << 2) | (grp & 3);
36 case 3:
37 return (rds->mono_stereo << 2) | (grp & 3);
38 }
39 return 0;
40}
41
42/*
43 * This RDS generator creates 57 RDS groups (one group == four RDS blocks).
44 * Groups 0-3, 22-25 and 44-47 (spaced 22 groups apart) are filled with a
45 * standard 0B group containing the PI code and PS name.
46 *
47 * Groups 4-19 and 26-41 use group 2A for the radio text.
48 *
49 * Group 56 contains the time (group 4A).
50 *
51 * All remaining groups use a filler group 15B block that just repeats
52 * the PI and PTY codes.
53 */
54void vivid_rds_generate(struct vivid_rds_gen *rds)
55{
56 struct v4l2_rds_data *data = rds->data;
57 unsigned grp;
58 struct tm tm;
59 unsigned date;
60 unsigned time;
61 int l;
62
63 for (grp = 0; grp < VIVID_RDS_GEN_GROUPS; grp++, data += VIVID_RDS_GEN_BLKS_PER_GRP) {
64 data[0].lsb = rds->picode & 0xff;
65 data[0].msb = rds->picode >> 8;
66 data[0].block = V4L2_RDS_BLOCK_A | (V4L2_RDS_BLOCK_A << 3);
67 data[1].lsb = rds->pty << 5;
68 data[1].msb = (rds->pty >> 3) | (rds->tp << 2);
69 data[1].block = V4L2_RDS_BLOCK_B | (V4L2_RDS_BLOCK_B << 3);
70 data[3].block = V4L2_RDS_BLOCK_D | (V4L2_RDS_BLOCK_D << 3);
71
72 switch (grp) {
73 case 0 ... 3:
74 case 22 ... 25:
75 case 44 ... 47: /* Group 0B */
76 data[1].lsb |= (rds->ta << 4) | (rds->ms << 3);
77 data[1].lsb |= vivid_get_di(rds, grp % 22);
78 data[1].msb |= 1 << 3;
79 data[2].lsb = rds->picode & 0xff;
80 data[2].msb = rds->picode >> 8;
81 data[2].block = V4L2_RDS_BLOCK_C_ALT | (V4L2_RDS_BLOCK_C_ALT << 3);
82 data[3].lsb = rds->psname[2 * (grp % 22) + 1];
83 data[3].msb = rds->psname[2 * (grp % 22)];
84 break;
85 case 4 ... 19:
86 case 26 ... 41: /* Group 2A */
87 data[1].lsb |= (grp - 4) % 22;
88 data[1].msb |= 4 << 3;
89 data[2].msb = rds->radiotext[4 * ((grp - 4) % 22)];
90 data[2].lsb = rds->radiotext[4 * ((grp - 4) % 22) + 1];
91 data[2].block = V4L2_RDS_BLOCK_C | (V4L2_RDS_BLOCK_C << 3);
92 data[3].msb = rds->radiotext[4 * ((grp - 4) % 22) + 2];
93 data[3].lsb = rds->radiotext[4 * ((grp - 4) % 22) + 3];
94 break;
95 case 56:
96 /*
97 * Group 4A
98 *
99 * Uses the algorithm from Annex G of the RDS standard
100 * EN 50067:1998 to convert a UTC date to an RDS Modified
101 * Julian Day.
102 */
103 time_to_tm(get_seconds(), 0, &tm);
104 l = tm.tm_mon <= 1;
105 date = 14956 + tm.tm_mday + ((tm.tm_year - l) * 1461) / 4 +
106 ((tm.tm_mon + 2 + l * 12) * 306001) / 10000;
107 time = (tm.tm_hour << 12) |
108 (tm.tm_min << 6) |
109 (sys_tz.tz_minuteswest >= 0 ? 0x20 : 0) |
110 (abs(sys_tz.tz_minuteswest) / 30);
111 data[1].lsb &= ~3;
112 data[1].lsb |= date >> 15;
113 data[1].msb |= 8 << 3;
114 data[2].lsb = (date << 1) & 0xfe;
115 data[2].lsb |= (time >> 16) & 1;
116 data[2].msb = (date >> 7) & 0xff;
117 data[2].block = V4L2_RDS_BLOCK_C | (V4L2_RDS_BLOCK_C << 3);
118 data[3].lsb = time & 0xff;
119 data[3].msb = (time >> 8) & 0xff;
120 break;
121 default: /* Group 15B */
122 data[1].lsb |= (rds->ta << 4) | (rds->ms << 3);
123 data[1].lsb |= vivid_get_di(rds, grp % 22);
124 data[1].msb |= 0x1f << 3;
125 data[2].lsb = rds->picode & 0xff;
126 data[2].msb = rds->picode >> 8;
127 data[2].block = V4L2_RDS_BLOCK_C_ALT | (V4L2_RDS_BLOCK_C_ALT << 3);
128 data[3].lsb = rds->pty << 5;
129 data[3].lsb |= (rds->ta << 4) | (rds->ms << 3);
130 data[3].lsb |= vivid_get_di(rds, grp % 22);
131 data[3].msb |= rds->pty >> 3;
132 data[3].msb |= 0x1f << 3;
133 break;
134 }
135 }
136}
137
138void vivid_rds_gen_fill(struct vivid_rds_gen *rds, unsigned freq,
139 bool alt)
140{
141 /* Alternate PTY between Info and Weather */
142 if (rds->use_rbds) {
143 rds->picode = 0x2e75; /* 'KLNX' call sign */
144 rds->pty = alt ? 29 : 2;
145 } else {
146 rds->picode = 0x8088;
147 rds->pty = alt ? 16 : 3;
148 }
149 rds->mono_stereo = true;
150 rds->art_head = false;
151 rds->compressed = false;
152 rds->dyn_pty = false;
153 rds->tp = true;
154 rds->ta = alt;
155 rds->ms = true;
156 snprintf(rds->psname, sizeof(rds->psname), "%6d.%1d",
157 freq / 16, ((freq & 0xf) * 10) / 16);
158 if (alt)
159 strlcpy(rds->radiotext,
160 " The Radio Data System can switch between different Radio Texts ",
161 sizeof(rds->radiotext));
162 else
163 strlcpy(rds->radiotext,
164 "An example of Radio Text as transmitted by the Radio Data System",
165 sizeof(rds->radiotext));
166}
diff --git a/drivers/media/platform/vivid/vivid-rds-gen.h b/drivers/media/platform/vivid/vivid-rds-gen.h
new file mode 100644
index 000000000000..eff4bf552ed3
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-rds-gen.h
@@ -0,0 +1,53 @@
1/*
2 * vivid-rds-gen.h - rds (radio data system) generator support functions.
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#ifndef _VIVID_RDS_GEN_H_
21#define _VIVID_RDS_GEN_H_
22
23/*
24 * It takes almost exactly 5 seconds to transmit 57 RDS groups.
25 * Each group has 4 blocks and each block has a payload of 16 bits + a
26 * block identification. The driver will generate the contents of these
27 * 57 groups only when necessary and it will just be played continuously.
28 */
29#define VIVID_RDS_GEN_GROUPS 57
30#define VIVID_RDS_GEN_BLKS_PER_GRP 4
31#define VIVID_RDS_GEN_BLOCKS (VIVID_RDS_GEN_BLKS_PER_GRP * VIVID_RDS_GEN_GROUPS)
32
33struct vivid_rds_gen {
34 struct v4l2_rds_data data[VIVID_RDS_GEN_BLOCKS];
35 bool use_rbds;
36 u16 picode;
37 u8 pty;
38 bool mono_stereo;
39 bool art_head;
40 bool compressed;
41 bool dyn_pty;
42 bool ta;
43 bool tp;
44 bool ms;
45 char psname[8 + 1];
46 char radiotext[64 + 1];
47};
48
49void vivid_rds_gen_fill(struct vivid_rds_gen *rds, unsigned freq,
50 bool use_alternate);
51void vivid_rds_generate(struct vivid_rds_gen *rds);
52
53#endif
diff --git a/drivers/media/platform/vivid/vivid-sdr-cap.c b/drivers/media/platform/vivid/vivid-sdr-cap.c
new file mode 100644
index 000000000000..8c5d661cfc49
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-sdr-cap.c
@@ -0,0 +1,499 @@
1/*
2 * vivid-sdr-cap.c - software defined radio support functions.
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#include <linux/errno.h>
21#include <linux/kernel.h>
22#include <linux/delay.h>
23#include <linux/kthread.h>
24#include <linux/freezer.h>
25#include <linux/videodev2.h>
26#include <linux/v4l2-dv-timings.h>
27#include <media/v4l2-common.h>
28#include <media/v4l2-event.h>
29#include <media/v4l2-dv-timings.h>
30
31#include "vivid-core.h"
32#include "vivid-ctrls.h"
33#include "vivid-sdr-cap.h"
34
35static const struct v4l2_frequency_band bands_adc[] = {
36 {
37 .tuner = 0,
38 .type = V4L2_TUNER_ADC,
39 .index = 0,
40 .capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
41 .rangelow = 300000,
42 .rangehigh = 300000,
43 },
44 {
45 .tuner = 0,
46 .type = V4L2_TUNER_ADC,
47 .index = 1,
48 .capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
49 .rangelow = 900001,
50 .rangehigh = 2800000,
51 },
52 {
53 .tuner = 0,
54 .type = V4L2_TUNER_ADC,
55 .index = 2,
56 .capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
57 .rangelow = 3200000,
58 .rangehigh = 3200000,
59 },
60};
61
62/* ADC band midpoints */
63#define BAND_ADC_0 ((bands_adc[0].rangehigh + bands_adc[1].rangelow) / 2)
64#define BAND_ADC_1 ((bands_adc[1].rangehigh + bands_adc[2].rangelow) / 2)
65
66static const struct v4l2_frequency_band bands_fm[] = {
67 {
68 .tuner = 1,
69 .type = V4L2_TUNER_RF,
70 .index = 0,
71 .capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
72 .rangelow = 50000000,
73 .rangehigh = 2000000000,
74 },
75};
76
77static void vivid_thread_sdr_cap_tick(struct vivid_dev *dev)
78{
79 struct vivid_buffer *sdr_cap_buf = NULL;
80
81 dprintk(dev, 1, "SDR Capture Thread Tick\n");
82
83 /* Drop a certain percentage of buffers. */
84 if (dev->perc_dropped_buffers &&
85 prandom_u32_max(100) < dev->perc_dropped_buffers)
86 return;
87
88 spin_lock(&dev->slock);
89 if (!list_empty(&dev->sdr_cap_active)) {
90 sdr_cap_buf = list_entry(dev->sdr_cap_active.next,
91 struct vivid_buffer, list);
92 list_del(&sdr_cap_buf->list);
93 }
94 spin_unlock(&dev->slock);
95
96 if (sdr_cap_buf) {
97 sdr_cap_buf->vb.v4l2_buf.sequence = dev->sdr_cap_seq_count;
98 vivid_sdr_cap_process(dev, sdr_cap_buf);
99 v4l2_get_timestamp(&sdr_cap_buf->vb.v4l2_buf.timestamp);
100 sdr_cap_buf->vb.v4l2_buf.timestamp.tv_sec += dev->time_wrap_offset;
101 vb2_buffer_done(&sdr_cap_buf->vb, dev->dqbuf_error ?
102 VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE);
103 dev->dqbuf_error = false;
104 }
105}
106
107static int vivid_thread_sdr_cap(void *data)
108{
109 struct vivid_dev *dev = data;
110 u64 samples_since_start;
111 u64 buffers_since_start;
112 u64 next_jiffies_since_start;
113 unsigned long jiffies_since_start;
114 unsigned long cur_jiffies;
115 unsigned wait_jiffies;
116
117 dprintk(dev, 1, "SDR Capture Thread Start\n");
118
119 set_freezable();
120
121 /* Resets frame counters */
122 dev->sdr_cap_seq_offset = 0;
123 if (dev->seq_wrap)
124 dev->sdr_cap_seq_offset = 0xffffff80U;
125 dev->jiffies_sdr_cap = jiffies;
126 dev->sdr_cap_seq_resync = false;
127
128 for (;;) {
129 try_to_freeze();
130 if (kthread_should_stop())
131 break;
132
133 mutex_lock(&dev->mutex);
134 cur_jiffies = jiffies;
135 if (dev->sdr_cap_seq_resync) {
136 dev->jiffies_sdr_cap = cur_jiffies;
137 dev->sdr_cap_seq_offset = dev->sdr_cap_seq_count + 1;
138 dev->sdr_cap_seq_count = 0;
139 dev->sdr_cap_seq_resync = false;
140 }
141 /* Calculate the number of jiffies since we started streaming */
142 jiffies_since_start = cur_jiffies - dev->jiffies_sdr_cap;
143 /* Get the number of buffers streamed since the start */
144 buffers_since_start = (u64)jiffies_since_start * dev->sdr_adc_freq +
145 (HZ * SDR_CAP_SAMPLES_PER_BUF) / 2;
146 do_div(buffers_since_start, HZ * SDR_CAP_SAMPLES_PER_BUF);
147
148 /*
149 * After more than 0xf0000000 (rounded down to a multiple of
150 * 'jiffies-per-day' to ease jiffies_to_msecs calculation)
151 * jiffies have passed since we started streaming reset the
152 * counters and keep track of the sequence offset.
153 */
154 if (jiffies_since_start > JIFFIES_RESYNC) {
155 dev->jiffies_sdr_cap = cur_jiffies;
156 dev->sdr_cap_seq_offset = buffers_since_start;
157 buffers_since_start = 0;
158 }
159 dev->sdr_cap_seq_count = buffers_since_start + dev->sdr_cap_seq_offset;
160
161 vivid_thread_sdr_cap_tick(dev);
162 mutex_unlock(&dev->mutex);
163
164 /*
165 * Calculate the number of samples streamed since we started,
166 * not including the current buffer.
167 */
168 samples_since_start = buffers_since_start * SDR_CAP_SAMPLES_PER_BUF;
169
170 /* And the number of jiffies since we started */
171 jiffies_since_start = jiffies - dev->jiffies_sdr_cap;
172
173 /* Increase by the number of samples in one buffer */
174 samples_since_start += SDR_CAP_SAMPLES_PER_BUF;
175 /*
176 * Calculate when that next buffer is supposed to start
177 * in jiffies since we started streaming.
178 */
179 next_jiffies_since_start = samples_since_start * HZ +
180 dev->sdr_adc_freq / 2;
181 do_div(next_jiffies_since_start, dev->sdr_adc_freq);
182 /* If it is in the past, then just schedule asap */
183 if (next_jiffies_since_start < jiffies_since_start)
184 next_jiffies_since_start = jiffies_since_start;
185
186 wait_jiffies = next_jiffies_since_start - jiffies_since_start;
187 schedule_timeout_interruptible(wait_jiffies ? wait_jiffies : 1);
188 }
189 dprintk(dev, 1, "SDR Capture Thread End\n");
190 return 0;
191}
192
193static int sdr_cap_queue_setup(struct vb2_queue *vq, const struct v4l2_format *fmt,
194 unsigned *nbuffers, unsigned *nplanes,
195 unsigned sizes[], void *alloc_ctxs[])
196{
197 /* 2 = max 16-bit sample returned */
198 sizes[0] = SDR_CAP_SAMPLES_PER_BUF * 2;
199 *nplanes = 1;
200 return 0;
201}
202
203static int sdr_cap_buf_prepare(struct vb2_buffer *vb)
204{
205 struct vivid_dev *dev = vb2_get_drv_priv(vb->vb2_queue);
206 unsigned size = SDR_CAP_SAMPLES_PER_BUF * 2;
207
208 dprintk(dev, 1, "%s\n", __func__);
209
210 if (dev->buf_prepare_error) {
211 /*
212 * Error injection: test what happens if buf_prepare() returns
213 * an error.
214 */
215 dev->buf_prepare_error = false;
216 return -EINVAL;
217 }
218 if (vb2_plane_size(vb, 0) < size) {
219 dprintk(dev, 1, "%s data will not fit into plane (%lu < %u)\n",
220 __func__, vb2_plane_size(vb, 0), size);
221 return -EINVAL;
222 }
223 vb2_set_plane_payload(vb, 0, size);
224
225 return 0;
226}
227
228static void sdr_cap_buf_queue(struct vb2_buffer *vb)
229{
230 struct vivid_dev *dev = vb2_get_drv_priv(vb->vb2_queue);
231 struct vivid_buffer *buf = container_of(vb, struct vivid_buffer, vb);
232
233 dprintk(dev, 1, "%s\n", __func__);
234
235 spin_lock(&dev->slock);
236 list_add_tail(&buf->list, &dev->sdr_cap_active);
237 spin_unlock(&dev->slock);
238}
239
240static int sdr_cap_start_streaming(struct vb2_queue *vq, unsigned count)
241{
242 struct vivid_dev *dev = vb2_get_drv_priv(vq);
243 int err = 0;
244
245 dprintk(dev, 1, "%s\n", __func__);
246 dev->sdr_cap_seq_count = 0;
247 if (dev->start_streaming_error) {
248 dev->start_streaming_error = false;
249 err = -EINVAL;
250 } else if (dev->kthread_sdr_cap == NULL) {
251 dev->kthread_sdr_cap = kthread_run(vivid_thread_sdr_cap, dev,
252 "%s-sdr-cap", dev->v4l2_dev.name);
253
254 if (IS_ERR(dev->kthread_sdr_cap)) {
255 v4l2_err(&dev->v4l2_dev, "kernel_thread() failed\n");
256 err = PTR_ERR(dev->kthread_sdr_cap);
257 dev->kthread_sdr_cap = NULL;
258 }
259 }
260 if (err) {
261 struct vivid_buffer *buf, *tmp;
262
263 list_for_each_entry_safe(buf, tmp, &dev->sdr_cap_active, list) {
264 list_del(&buf->list);
265 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_QUEUED);
266 }
267 }
268 return err;
269}
270
271/* abort streaming and wait for last buffer */
272static void sdr_cap_stop_streaming(struct vb2_queue *vq)
273{
274 struct vivid_dev *dev = vb2_get_drv_priv(vq);
275
276 if (dev->kthread_sdr_cap == NULL)
277 return;
278
279 while (!list_empty(&dev->sdr_cap_active)) {
280 struct vivid_buffer *buf;
281
282 buf = list_entry(dev->sdr_cap_active.next, struct vivid_buffer, list);
283 list_del(&buf->list);
284 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
285 }
286
287 /* shutdown control thread */
288 mutex_unlock(&dev->mutex);
289 kthread_stop(dev->kthread_sdr_cap);
290 dev->kthread_sdr_cap = NULL;
291 mutex_lock(&dev->mutex);
292}
293
294const struct vb2_ops vivid_sdr_cap_qops = {
295 .queue_setup = sdr_cap_queue_setup,
296 .buf_prepare = sdr_cap_buf_prepare,
297 .buf_queue = sdr_cap_buf_queue,
298 .start_streaming = sdr_cap_start_streaming,
299 .stop_streaming = sdr_cap_stop_streaming,
300 .wait_prepare = vivid_unlock,
301 .wait_finish = vivid_lock,
302};
303
304int vivid_sdr_enum_freq_bands(struct file *file, void *fh, struct v4l2_frequency_band *band)
305{
306 switch (band->tuner) {
307 case 0:
308 if (band->index >= ARRAY_SIZE(bands_adc))
309 return -EINVAL;
310 *band = bands_adc[band->index];
311 return 0;
312 case 1:
313 if (band->index >= ARRAY_SIZE(bands_fm))
314 return -EINVAL;
315 *band = bands_fm[band->index];
316 return 0;
317 default:
318 return -EINVAL;
319 }
320}
321
322int vivid_sdr_g_frequency(struct file *file, void *fh, struct v4l2_frequency *vf)
323{
324 struct vivid_dev *dev = video_drvdata(file);
325
326 switch (vf->tuner) {
327 case 0:
328 vf->frequency = dev->sdr_adc_freq;
329 vf->type = V4L2_TUNER_ADC;
330 return 0;
331 case 1:
332 vf->frequency = dev->sdr_fm_freq;
333 vf->type = V4L2_TUNER_RF;
334 return 0;
335 default:
336 return -EINVAL;
337 }
338}
339
340int vivid_sdr_s_frequency(struct file *file, void *fh, const struct v4l2_frequency *vf)
341{
342 struct vivid_dev *dev = video_drvdata(file);
343 unsigned freq = vf->frequency;
344 unsigned band;
345
346 switch (vf->tuner) {
347 case 0:
348 if (vf->type != V4L2_TUNER_ADC)
349 return -EINVAL;
350 if (freq < BAND_ADC_0)
351 band = 0;
352 else if (freq < BAND_ADC_1)
353 band = 1;
354 else
355 band = 2;
356
357 freq = clamp_t(unsigned, freq,
358 bands_adc[band].rangelow,
359 bands_adc[band].rangehigh);
360
361 if (vb2_is_streaming(&dev->vb_sdr_cap_q) &&
362 freq != dev->sdr_adc_freq) {
363 /* resync the thread's timings */
364 dev->sdr_cap_seq_resync = true;
365 }
366 dev->sdr_adc_freq = freq;
367 return 0;
368 case 1:
369 if (vf->type != V4L2_TUNER_RF)
370 return -EINVAL;
371 dev->sdr_fm_freq = clamp_t(unsigned, freq,
372 bands_fm[0].rangelow,
373 bands_fm[0].rangehigh);
374 return 0;
375 default:
376 return -EINVAL;
377 }
378}
379
380int vivid_sdr_g_tuner(struct file *file, void *fh, struct v4l2_tuner *vt)
381{
382 switch (vt->index) {
383 case 0:
384 strlcpy(vt->name, "ADC", sizeof(vt->name));
385 vt->type = V4L2_TUNER_ADC;
386 vt->capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS;
387 vt->rangelow = bands_adc[0].rangelow;
388 vt->rangehigh = bands_adc[2].rangehigh;
389 return 0;
390 case 1:
391 strlcpy(vt->name, "RF", sizeof(vt->name));
392 vt->type = V4L2_TUNER_RF;
393 vt->capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS;
394 vt->rangelow = bands_fm[0].rangelow;
395 vt->rangehigh = bands_fm[0].rangehigh;
396 return 0;
397 default:
398 return -EINVAL;
399 }
400}
401
402int vivid_sdr_s_tuner(struct file *file, void *fh, const struct v4l2_tuner *vt)
403{
404 if (vt->index > 1)
405 return -EINVAL;
406 return 0;
407}
408
409int vidioc_enum_fmt_sdr_cap(struct file *file, void *fh, struct v4l2_fmtdesc *f)
410{
411 if (f->index)
412 return -EINVAL;
413 f->pixelformat = V4L2_SDR_FMT_CU8;
414 strlcpy(f->description, "IQ U8", sizeof(f->description));
415 return 0;
416}
417
418int vidioc_g_fmt_sdr_cap(struct file *file, void *fh, struct v4l2_format *f)
419{
420 f->fmt.sdr.pixelformat = V4L2_SDR_FMT_CU8;
421 f->fmt.sdr.buffersize = SDR_CAP_SAMPLES_PER_BUF * 2;
422 memset(f->fmt.sdr.reserved, 0, sizeof(f->fmt.sdr.reserved));
423 return 0;
424}
425
426#define FIXP_FRAC (1 << 15)
427#define FIXP_PI ((int)(FIXP_FRAC * 3.141592653589))
428
429/* cos() from cx88 driver: cx88-dsp.c */
430static s32 fixp_cos(unsigned int x)
431{
432 u32 t2, t4, t6, t8;
433 u16 period = x / FIXP_PI;
434
435 if (period % 2)
436 return -fixp_cos(x - FIXP_PI);
437 x = x % FIXP_PI;
438 if (x > FIXP_PI/2)
439 return -fixp_cos(FIXP_PI/2 - (x % (FIXP_PI/2)));
440 /* Now x is between 0 and FIXP_PI/2.
441 * To calculate cos(x) we use it's Taylor polinom. */
442 t2 = x*x/FIXP_FRAC/2;
443 t4 = t2*x/FIXP_FRAC*x/FIXP_FRAC/3/4;
444 t6 = t4*x/FIXP_FRAC*x/FIXP_FRAC/5/6;
445 t8 = t6*x/FIXP_FRAC*x/FIXP_FRAC/7/8;
446 return FIXP_FRAC-t2+t4-t6+t8;
447}
448
449static inline s32 fixp_sin(unsigned int x)
450{
451 return -fixp_cos(x + (FIXP_PI / 2));
452}
453
454void vivid_sdr_cap_process(struct vivid_dev *dev, struct vivid_buffer *buf)
455{
456 u8 *vbuf = vb2_plane_vaddr(&buf->vb, 0);
457 unsigned long i;
458 unsigned long plane_size = vb2_plane_size(&buf->vb, 0);
459 int fixp_src_phase_step, fixp_i, fixp_q;
460
461 /*
462 * TODO: Generated beep tone goes very crackly when sample rate is
463 * increased to ~1Msps or more. That is because of huge rounding error
464 * of phase angle caused by used cosine implementation.
465 */
466
467 /* calculate phase step */
468 #define BEEP_FREQ 1000 /* 1kHz beep */
469 fixp_src_phase_step = DIV_ROUND_CLOSEST(2 * FIXP_PI * BEEP_FREQ,
470 dev->sdr_adc_freq);
471
472 for (i = 0; i < plane_size; i += 2) {
473 dev->sdr_fixp_mod_phase += fixp_cos(dev->sdr_fixp_src_phase);
474 dev->sdr_fixp_src_phase += fixp_src_phase_step;
475
476 /*
477 * Transfer phases to [0 / 2xPI] in order to avoid variable
478 * overflow and make it suitable for cosine implementation
479 * used, which does not support negative angles.
480 */
481 while (dev->sdr_fixp_mod_phase < (0 * FIXP_PI))
482 dev->sdr_fixp_mod_phase += (2 * FIXP_PI);
483 while (dev->sdr_fixp_mod_phase > (2 * FIXP_PI))
484 dev->sdr_fixp_mod_phase -= (2 * FIXP_PI);
485
486 while (dev->sdr_fixp_src_phase > (2 * FIXP_PI))
487 dev->sdr_fixp_src_phase -= (2 * FIXP_PI);
488
489 fixp_i = fixp_cos(dev->sdr_fixp_mod_phase);
490 fixp_q = fixp_sin(dev->sdr_fixp_mod_phase);
491
492 /* convert 'fixp float' to u8 */
493 /* u8 = X * 127.5f + 127.5f; where X is float [-1.0 / +1.0] */
494 fixp_i = fixp_i * 1275 + FIXP_FRAC * 1275;
495 fixp_q = fixp_q * 1275 + FIXP_FRAC * 1275;
496 *vbuf++ = DIV_ROUND_CLOSEST(fixp_i, FIXP_FRAC * 10);
497 *vbuf++ = DIV_ROUND_CLOSEST(fixp_q, FIXP_FRAC * 10);
498 }
499}
diff --git a/drivers/media/platform/vivid/vivid-sdr-cap.h b/drivers/media/platform/vivid/vivid-sdr-cap.h
new file mode 100644
index 000000000000..79c1890de972
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-sdr-cap.h
@@ -0,0 +1,34 @@
1/*
2 * vivid-sdr-cap.h - software defined radio support functions.
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#ifndef _VIVID_SDR_CAP_H_
21#define _VIVID_SDR_CAP_H_
22
23int vivid_sdr_enum_freq_bands(struct file *file, void *fh, struct v4l2_frequency_band *band);
24int vivid_sdr_g_frequency(struct file *file, void *fh, struct v4l2_frequency *vf);
25int vivid_sdr_s_frequency(struct file *file, void *fh, const struct v4l2_frequency *vf);
26int vivid_sdr_g_tuner(struct file *file, void *fh, struct v4l2_tuner *vt);
27int vivid_sdr_s_tuner(struct file *file, void *fh, const struct v4l2_tuner *vt);
28int vidioc_enum_fmt_sdr_cap(struct file *file, void *fh, struct v4l2_fmtdesc *f);
29int vidioc_g_fmt_sdr_cap(struct file *file, void *fh, struct v4l2_format *f);
30void vivid_sdr_cap_process(struct vivid_dev *dev, struct vivid_buffer *buf);
31
32extern const struct vb2_ops vivid_sdr_cap_qops;
33
34#endif
diff --git a/drivers/media/platform/vivid/vivid-tpg-colors.c b/drivers/media/platform/vivid/vivid-tpg-colors.c
new file mode 100644
index 000000000000..2adddc0ca662
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-tpg-colors.c
@@ -0,0 +1,310 @@
1/*
2 * vivid-color.c - A table that converts colors to various colorspaces
3 *
4 * The test pattern generator uses the tpg_colors for its test patterns.
5 * For testing colorspaces the first 8 colors of that table need to be
6 * converted to their equivalent in the target colorspace.
7 *
8 * The tpg_csc_colors[] table is the result of that conversion and since
9 * it is precalculated the colorspace conversion is just a simple table
10 * lookup.
11 *
12 * This source also contains the code used to generate the tpg_csc_colors
13 * table. Run the following command to compile it:
14 *
15 * gcc vivid-colors.c -DCOMPILE_APP -o gen-colors -lm
16 *
17 * and run the utility.
18 *
19 * Note that the converted colors are in the range 0x000-0xff0 (so times 16)
20 * in order to preserve precision.
21 *
22 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
23 *
24 * This program is free software; you may redistribute it and/or modify
25 * it under the terms of the GNU General Public License as published by
26 * the Free Software Foundation; version 2 of the License.
27 *
28 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
29 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
31 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
32 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
33 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
34 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
35 * SOFTWARE.
36 */
37
38#include <linux/videodev2.h>
39
40#include "vivid-tpg-colors.h"
41
42/* sRGB colors with range [0-255] */
43const struct color tpg_colors[TPG_COLOR_MAX] = {
44 /*
45 * Colors to test colorspace conversion: converting these colors
46 * to other colorspaces will never lead to out-of-gamut colors.
47 */
48 { 191, 191, 191 }, /* TPG_COLOR_CSC_WHITE */
49 { 191, 191, 50 }, /* TPG_COLOR_CSC_YELLOW */
50 { 50, 191, 191 }, /* TPG_COLOR_CSC_CYAN */
51 { 50, 191, 50 }, /* TPG_COLOR_CSC_GREEN */
52 { 191, 50, 191 }, /* TPG_COLOR_CSC_MAGENTA */
53 { 191, 50, 50 }, /* TPG_COLOR_CSC_RED */
54 { 50, 50, 191 }, /* TPG_COLOR_CSC_BLUE */
55 { 50, 50, 50 }, /* TPG_COLOR_CSC_BLACK */
56
57 /* 75% colors */
58 { 191, 191, 0 }, /* TPG_COLOR_75_YELLOW */
59 { 0, 191, 191 }, /* TPG_COLOR_75_CYAN */
60 { 0, 191, 0 }, /* TPG_COLOR_75_GREEN */
61 { 191, 0, 191 }, /* TPG_COLOR_75_MAGENTA */
62 { 191, 0, 0 }, /* TPG_COLOR_75_RED */
63 { 0, 0, 191 }, /* TPG_COLOR_75_BLUE */
64
65 /* 100% colors */
66 { 255, 255, 255 }, /* TPG_COLOR_100_WHITE */
67 { 255, 255, 0 }, /* TPG_COLOR_100_YELLOW */
68 { 0, 255, 255 }, /* TPG_COLOR_100_CYAN */
69 { 0, 255, 0 }, /* TPG_COLOR_100_GREEN */
70 { 255, 0, 255 }, /* TPG_COLOR_100_MAGENTA */
71 { 255, 0, 0 }, /* TPG_COLOR_100_RED */
72 { 0, 0, 255 }, /* TPG_COLOR_100_BLUE */
73 { 0, 0, 0 }, /* TPG_COLOR_100_BLACK */
74
75 { 0, 0, 0 }, /* TPG_COLOR_RANDOM placeholder */
76};
77
78#ifndef COMPILE_APP
79
80/* Generated table */
81const struct color16 tpg_csc_colors[V4L2_COLORSPACE_SRGB + 1][TPG_COLOR_CSC_BLACK + 1] = {
82 [V4L2_COLORSPACE_SMPTE170M][0] = { 2953, 2939, 2939 },
83 [V4L2_COLORSPACE_SMPTE170M][1] = { 2954, 2963, 585 },
84 [V4L2_COLORSPACE_SMPTE170M][2] = { 84, 2967, 2937 },
85 [V4L2_COLORSPACE_SMPTE170M][3] = { 93, 2990, 575 },
86 [V4L2_COLORSPACE_SMPTE170M][4] = { 3030, 259, 2933 },
87 [V4L2_COLORSPACE_SMPTE170M][5] = { 3031, 406, 557 },
88 [V4L2_COLORSPACE_SMPTE170M][6] = { 544, 428, 2931 },
89 [V4L2_COLORSPACE_SMPTE170M][7] = { 551, 547, 547 },
90 [V4L2_COLORSPACE_SMPTE240M][0] = { 2926, 2926, 2926 },
91 [V4L2_COLORSPACE_SMPTE240M][1] = { 2926, 2926, 857 },
92 [V4L2_COLORSPACE_SMPTE240M][2] = { 1594, 2901, 2901 },
93 [V4L2_COLORSPACE_SMPTE240M][3] = { 1594, 2901, 774 },
94 [V4L2_COLORSPACE_SMPTE240M][4] = { 2484, 618, 2858 },
95 [V4L2_COLORSPACE_SMPTE240M][5] = { 2484, 618, 617 },
96 [V4L2_COLORSPACE_SMPTE240M][6] = { 507, 507, 2832 },
97 [V4L2_COLORSPACE_SMPTE240M][7] = { 507, 507, 507 },
98 [V4L2_COLORSPACE_REC709][0] = { 2939, 2939, 2939 },
99 [V4L2_COLORSPACE_REC709][1] = { 2939, 2939, 547 },
100 [V4L2_COLORSPACE_REC709][2] = { 547, 2939, 2939 },
101 [V4L2_COLORSPACE_REC709][3] = { 547, 2939, 547 },
102 [V4L2_COLORSPACE_REC709][4] = { 2939, 547, 2939 },
103 [V4L2_COLORSPACE_REC709][5] = { 2939, 547, 547 },
104 [V4L2_COLORSPACE_REC709][6] = { 547, 547, 2939 },
105 [V4L2_COLORSPACE_REC709][7] = { 547, 547, 547 },
106 [V4L2_COLORSPACE_470_SYSTEM_M][0] = { 2894, 2988, 2808 },
107 [V4L2_COLORSPACE_470_SYSTEM_M][1] = { 2847, 3070, 843 },
108 [V4L2_COLORSPACE_470_SYSTEM_M][2] = { 1656, 2962, 2783 },
109 [V4L2_COLORSPACE_470_SYSTEM_M][3] = { 1572, 3045, 763 },
110 [V4L2_COLORSPACE_470_SYSTEM_M][4] = { 2477, 229, 2743 },
111 [V4L2_COLORSPACE_470_SYSTEM_M][5] = { 2422, 672, 614 },
112 [V4L2_COLORSPACE_470_SYSTEM_M][6] = { 725, 63, 2718 },
113 [V4L2_COLORSPACE_470_SYSTEM_M][7] = { 534, 561, 509 },
114 [V4L2_COLORSPACE_470_SYSTEM_BG][0] = { 2939, 2939, 2939 },
115 [V4L2_COLORSPACE_470_SYSTEM_BG][1] = { 2939, 2939, 621 },
116 [V4L2_COLORSPACE_470_SYSTEM_BG][2] = { 786, 2939, 2939 },
117 [V4L2_COLORSPACE_470_SYSTEM_BG][3] = { 786, 2939, 621 },
118 [V4L2_COLORSPACE_470_SYSTEM_BG][4] = { 2879, 547, 2923 },
119 [V4L2_COLORSPACE_470_SYSTEM_BG][5] = { 2879, 547, 547 },
120 [V4L2_COLORSPACE_470_SYSTEM_BG][6] = { 547, 547, 2923 },
121 [V4L2_COLORSPACE_470_SYSTEM_BG][7] = { 547, 547, 547 },
122 [V4L2_COLORSPACE_SRGB][0] = { 3056, 3056, 3056 },
123 [V4L2_COLORSPACE_SRGB][1] = { 3056, 3056, 800 },
124 [V4L2_COLORSPACE_SRGB][2] = { 800, 3056, 3056 },
125 [V4L2_COLORSPACE_SRGB][3] = { 800, 3056, 800 },
126 [V4L2_COLORSPACE_SRGB][4] = { 3056, 800, 3056 },
127 [V4L2_COLORSPACE_SRGB][5] = { 3056, 800, 800 },
128 [V4L2_COLORSPACE_SRGB][6] = { 800, 800, 3056 },
129 [V4L2_COLORSPACE_SRGB][7] = { 800, 800, 800 },
130};
131
132#else
133
134/* This code generates the table above */
135
136#include <math.h>
137#include <stdio.h>
138#include <stdlib.h>
139
140static const double rec709_to_ntsc1953[3][3] = {
141 { 0.6698, 0.2678, 0.0323 },
142 { 0.0185, 1.0742, -0.0603 },
143 { 0.0162, 0.0432, 0.8551 }
144};
145
146static const double rec709_to_ebu[3][3] = {
147 { 0.9578, 0.0422, 0 },
148 { 0 , 1 , 0 },
149 { 0 , 0.0118, 0.9882 }
150};
151
152static const double rec709_to_170m[3][3] = {
153 { 1.0654, -0.0554, -0.0010 },
154 { -0.0196, 1.0364, -0.0167 },
155 { 0.0016, 0.0044, 0.9940 }
156};
157
158static const double rec709_to_240m[3][3] = {
159 { 0.7151, 0.2849, 0 },
160 { 0.0179, 0.9821, 0 },
161 { 0.0177, 0.0472, 0.9350 }
162};
163
164
165static void mult_matrix(double *r, double *g, double *b, const double m[3][3])
166{
167 double ir, ig, ib;
168
169 ir = m[0][0] * (*r) + m[0][1] * (*g) + m[0][2] * (*b);
170 ig = m[1][0] * (*r) + m[1][1] * (*g) + m[1][2] * (*b);
171 ib = m[2][0] * (*r) + m[2][1] * (*g) + m[2][2] * (*b);
172 *r = ir;
173 *g = ig;
174 *b = ib;
175}
176
177static double transfer_srgb_to_rgb(double v)
178{
179 return (v <= 0.03928) ? v / 12.92 : pow((v + 0.055) / 1.055, 2.4);
180}
181
182static double transfer_rgb_to_smpte240m(double v)
183{
184 return (v <= 0.0228) ? v * 4.0 : 1.1115 * pow(v, 0.45) - 0.1115;
185}
186
187static double transfer_rgb_to_rec709(double v)
188{
189 return (v < 0.018) ? v * 4.5 : 1.099 * pow(v, 0.45) - 0.099;
190}
191
192static double transfer_srgb_to_rec709(double v)
193{
194 return transfer_rgb_to_rec709(transfer_srgb_to_rgb(v));
195}
196
197static void csc(enum v4l2_colorspace colorspace, double *r, double *g, double *b)
198{
199 /* Convert the primaries of Rec. 709 Linear RGB */
200 switch (colorspace) {
201 case V4L2_COLORSPACE_SMPTE240M:
202 *r = transfer_srgb_to_rgb(*r);
203 *g = transfer_srgb_to_rgb(*g);
204 *b = transfer_srgb_to_rgb(*b);
205 mult_matrix(r, g, b, rec709_to_240m);
206 break;
207 case V4L2_COLORSPACE_SMPTE170M:
208 *r = transfer_srgb_to_rgb(*r);
209 *g = transfer_srgb_to_rgb(*g);
210 *b = transfer_srgb_to_rgb(*b);
211 mult_matrix(r, g, b, rec709_to_170m);
212 break;
213 case V4L2_COLORSPACE_470_SYSTEM_BG:
214 *r = transfer_srgb_to_rgb(*r);
215 *g = transfer_srgb_to_rgb(*g);
216 *b = transfer_srgb_to_rgb(*b);
217 mult_matrix(r, g, b, rec709_to_ebu);
218 break;
219 case V4L2_COLORSPACE_470_SYSTEM_M:
220 *r = transfer_srgb_to_rgb(*r);
221 *g = transfer_srgb_to_rgb(*g);
222 *b = transfer_srgb_to_rgb(*b);
223 mult_matrix(r, g, b, rec709_to_ntsc1953);
224 break;
225 case V4L2_COLORSPACE_SRGB:
226 case V4L2_COLORSPACE_REC709:
227 default:
228 break;
229 }
230
231 *r = ((*r) < 0) ? 0 : (((*r) > 1) ? 1 : (*r));
232 *g = ((*g) < 0) ? 0 : (((*g) > 1) ? 1 : (*g));
233 *b = ((*b) < 0) ? 0 : (((*b) > 1) ? 1 : (*b));
234
235 /* Encode to gamma corrected colorspace */
236 switch (colorspace) {
237 case V4L2_COLORSPACE_SMPTE240M:
238 *r = transfer_rgb_to_smpte240m(*r);
239 *g = transfer_rgb_to_smpte240m(*g);
240 *b = transfer_rgb_to_smpte240m(*b);
241 break;
242 case V4L2_COLORSPACE_SMPTE170M:
243 case V4L2_COLORSPACE_470_SYSTEM_M:
244 case V4L2_COLORSPACE_470_SYSTEM_BG:
245 *r = transfer_rgb_to_rec709(*r);
246 *g = transfer_rgb_to_rec709(*g);
247 *b = transfer_rgb_to_rec709(*b);
248 break;
249 case V4L2_COLORSPACE_SRGB:
250 break;
251 case V4L2_COLORSPACE_REC709:
252 default:
253 *r = transfer_srgb_to_rec709(*r);
254 *g = transfer_srgb_to_rec709(*g);
255 *b = transfer_srgb_to_rec709(*b);
256 break;
257 }
258}
259
260int main(int argc, char **argv)
261{
262 static const unsigned colorspaces[] = {
263 0,
264 V4L2_COLORSPACE_SMPTE170M,
265 V4L2_COLORSPACE_SMPTE240M,
266 V4L2_COLORSPACE_REC709,
267 0,
268 V4L2_COLORSPACE_470_SYSTEM_M,
269 V4L2_COLORSPACE_470_SYSTEM_BG,
270 0,
271 V4L2_COLORSPACE_SRGB,
272 };
273 static const char * const colorspace_names[] = {
274 "",
275 "V4L2_COLORSPACE_SMPTE170M",
276 "V4L2_COLORSPACE_SMPTE240M",
277 "V4L2_COLORSPACE_REC709",
278 "",
279 "V4L2_COLORSPACE_470_SYSTEM_M",
280 "V4L2_COLORSPACE_470_SYSTEM_BG",
281 "",
282 "V4L2_COLORSPACE_SRGB",
283 };
284 int i;
285 int c;
286
287 printf("/* Generated table */\n");
288 printf("const struct color16 tpg_csc_colors[V4L2_COLORSPACE_SRGB + 1][TPG_COLOR_CSC_BLACK + 1] = {\n");
289 for (c = 0; c <= V4L2_COLORSPACE_SRGB; c++) {
290 for (i = 0; i <= TPG_COLOR_CSC_BLACK; i++) {
291 double r, g, b;
292
293 if (colorspaces[c] == 0)
294 continue;
295
296 r = tpg_colors[i].r / 255.0;
297 g = tpg_colors[i].g / 255.0;
298 b = tpg_colors[i].b / 255.0;
299
300 csc(c, &r, &g, &b);
301
302 printf("\t[%s][%d] = { %d, %d, %d },\n", colorspace_names[c], i,
303 (int)(r * 4080), (int)(g * 4080), (int)(b * 4080));
304 }
305 }
306 printf("};\n\n");
307 return 0;
308}
309
310#endif
diff --git a/drivers/media/platform/vivid/vivid-tpg-colors.h b/drivers/media/platform/vivid/vivid-tpg-colors.h
new file mode 100644
index 000000000000..a2678fbec256
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-tpg-colors.h
@@ -0,0 +1,64 @@
1/*
2 * vivid-color.h - Color definitions for the test pattern generator
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#ifndef _VIVID_COLORS_H_
21#define _VIVID_COLORS_H_
22
23struct color {
24 unsigned char r, g, b;
25};
26
27struct color16 {
28 int r, g, b;
29};
30
31enum tpg_color {
32 TPG_COLOR_CSC_WHITE,
33 TPG_COLOR_CSC_YELLOW,
34 TPG_COLOR_CSC_CYAN,
35 TPG_COLOR_CSC_GREEN,
36 TPG_COLOR_CSC_MAGENTA,
37 TPG_COLOR_CSC_RED,
38 TPG_COLOR_CSC_BLUE,
39 TPG_COLOR_CSC_BLACK,
40 TPG_COLOR_75_YELLOW,
41 TPG_COLOR_75_CYAN,
42 TPG_COLOR_75_GREEN,
43 TPG_COLOR_75_MAGENTA,
44 TPG_COLOR_75_RED,
45 TPG_COLOR_75_BLUE,
46 TPG_COLOR_100_WHITE,
47 TPG_COLOR_100_YELLOW,
48 TPG_COLOR_100_CYAN,
49 TPG_COLOR_100_GREEN,
50 TPG_COLOR_100_MAGENTA,
51 TPG_COLOR_100_RED,
52 TPG_COLOR_100_BLUE,
53 TPG_COLOR_100_BLACK,
54 TPG_COLOR_TEXTFG,
55 TPG_COLOR_TEXTBG,
56 TPG_COLOR_RANDOM,
57 TPG_COLOR_RAMP,
58 TPG_COLOR_MAX = TPG_COLOR_RAMP + 256
59};
60
61extern const struct color tpg_colors[TPG_COLOR_MAX];
62extern const struct color16 tpg_csc_colors[V4L2_COLORSPACE_SRGB + 1][TPG_COLOR_CSC_BLACK + 1];
63
64#endif
diff --git a/drivers/media/platform/vivid/vivid-tpg.c b/drivers/media/platform/vivid/vivid-tpg.c
new file mode 100644
index 000000000000..0c6fa53fa646
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-tpg.c
@@ -0,0 +1,1439 @@
1/*
2 * vivid-tpg.c - Test Pattern Generator
3 *
4 * Note: gen_twopix and tpg_gen_text are based on code from vivi.c. See the
5 * vivi.c source for the copyright information of those functions.
6 *
7 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
8 *
9 * This program is free software; you may redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
15 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
16 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
17 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
18 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
19 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20 * SOFTWARE.
21 */
22
23#include "vivid-tpg.h"
24
25/* Must remain in sync with enum tpg_pattern */
26const char * const tpg_pattern_strings[] = {
27 "75% Colorbar",
28 "100% Colorbar",
29 "CSC Colorbar",
30 "Horizontal 100% Colorbar",
31 "100% Color Squares",
32 "100% Black",
33 "100% White",
34 "100% Red",
35 "100% Green",
36 "100% Blue",
37 "16x16 Checkers",
38 "1x1 Checkers",
39 "Alternating Hor Lines",
40 "Alternating Vert Lines",
41 "One Pixel Wide Cross",
42 "Two Pixels Wide Cross",
43 "Ten Pixels Wide Cross",
44 "Gray Ramp",
45 "Noise",
46 NULL
47};
48
49/* Must remain in sync with enum tpg_aspect */
50const char * const tpg_aspect_strings[] = {
51 "Source Width x Height",
52 "4x3",
53 "14x9",
54 "16x9",
55 "16x9 Anamorphic",
56 NULL
57};
58
59/*
60 * Sine table: sin[0] = 127 * sin(-180 degrees)
61 * sin[128] = 127 * sin(0 degrees)
62 * sin[256] = 127 * sin(180 degrees)
63 */
64static const s8 sin[257] = {
65 0, -4, -7, -11, -13, -18, -20, -22, -26, -29, -33, -35, -37, -41, -43, -48,
66 -50, -52, -56, -58, -62, -63, -65, -69, -71, -75, -76, -78, -82, -83, -87, -88,
67 -90, -93, -94, -97, -99, -101, -103, -104, -107, -108, -110, -111, -112, -114, -115, -117,
68 -118, -119, -120, -121, -122, -123, -123, -124, -125, -125, -126, -126, -127, -127, -127, -127,
69 -127, -127, -127, -127, -126, -126, -125, -125, -124, -124, -123, -122, -121, -120, -119, -118,
70 -117, -116, -114, -113, -111, -110, -109, -107, -105, -103, -101, -100, -97, -96, -93, -91,
71 -90, -87, -85, -82, -80, -76, -75, -73, -69, -67, -63, -62, -60, -56, -54, -50,
72 -48, -46, -41, -39, -35, -33, -31, -26, -24, -20, -18, -15, -11, -9, -4, -2,
73 0, 2, 4, 9, 11, 15, 18, 20, 24, 26, 31, 33, 35, 39, 41, 46,
74 48, 50, 54, 56, 60, 62, 64, 67, 69, 73, 75, 76, 80, 82, 85, 87,
75 90, 91, 93, 96, 97, 100, 101, 103, 105, 107, 109, 110, 111, 113, 114, 116,
76 117, 118, 119, 120, 121, 122, 123, 124, 124, 125, 125, 126, 126, 127, 127, 127,
77 127, 127, 127, 127, 127, 126, 126, 125, 125, 124, 123, 123, 122, 121, 120, 119,
78 118, 117, 115, 114, 112, 111, 110, 108, 107, 104, 103, 101, 99, 97, 94, 93,
79 90, 88, 87, 83, 82, 78, 76, 75, 71, 69, 65, 64, 62, 58, 56, 52,
80 50, 48, 43, 41, 37, 35, 33, 29, 26, 22, 20, 18, 13, 11, 7, 4,
81 0,
82};
83
84#define cos(idx) sin[((idx) + 64) % sizeof(sin)]
85
86/* Global font descriptor */
87static const u8 *font8x16;
88
89void tpg_set_font(const u8 *f)
90{
91 font8x16 = f;
92}
93
94void tpg_init(struct tpg_data *tpg, unsigned w, unsigned h)
95{
96 memset(tpg, 0, sizeof(*tpg));
97 tpg->scaled_width = tpg->src_width = w;
98 tpg->src_height = tpg->buf_height = h;
99 tpg->crop.width = tpg->compose.width = w;
100 tpg->crop.height = tpg->compose.height = h;
101 tpg->recalc_colors = true;
102 tpg->recalc_square_border = true;
103 tpg->brightness = 128;
104 tpg->contrast = 128;
105 tpg->saturation = 128;
106 tpg->hue = 0;
107 tpg->mv_hor_mode = TPG_MOVE_NONE;
108 tpg->mv_vert_mode = TPG_MOVE_NONE;
109 tpg->field = V4L2_FIELD_NONE;
110 tpg_s_fourcc(tpg, V4L2_PIX_FMT_RGB24);
111 tpg->colorspace = V4L2_COLORSPACE_SRGB;
112 tpg->perc_fill = 100;
113}
114
115int tpg_alloc(struct tpg_data *tpg, unsigned max_w)
116{
117 unsigned pat;
118 unsigned plane;
119
120 tpg->max_line_width = max_w;
121 for (pat = 0; pat < TPG_MAX_PAT_LINES; pat++) {
122 for (plane = 0; plane < TPG_MAX_PLANES; plane++) {
123 unsigned pixelsz = plane ? 1 : 4;
124
125 tpg->lines[pat][plane] = vzalloc(max_w * 2 * pixelsz);
126 if (!tpg->lines[pat][plane])
127 return -ENOMEM;
128 }
129 }
130 for (plane = 0; plane < TPG_MAX_PLANES; plane++) {
131 unsigned pixelsz = plane ? 1 : 4;
132
133 tpg->contrast_line[plane] = vzalloc(max_w * pixelsz);
134 if (!tpg->contrast_line[plane])
135 return -ENOMEM;
136 tpg->black_line[plane] = vzalloc(max_w * pixelsz);
137 if (!tpg->black_line[plane])
138 return -ENOMEM;
139 tpg->random_line[plane] = vzalloc(max_w * pixelsz);
140 if (!tpg->random_line[plane])
141 return -ENOMEM;
142 }
143 return 0;
144}
145
146void tpg_free(struct tpg_data *tpg)
147{
148 unsigned pat;
149 unsigned plane;
150
151 for (pat = 0; pat < TPG_MAX_PAT_LINES; pat++)
152 for (plane = 0; plane < TPG_MAX_PLANES; plane++) {
153 vfree(tpg->lines[pat][plane]);
154 tpg->lines[pat][plane] = NULL;
155 }
156 for (plane = 0; plane < TPG_MAX_PLANES; plane++) {
157 vfree(tpg->contrast_line[plane]);
158 vfree(tpg->black_line[plane]);
159 vfree(tpg->random_line[plane]);
160 tpg->contrast_line[plane] = NULL;
161 tpg->black_line[plane] = NULL;
162 tpg->random_line[plane] = NULL;
163 }
164}
165
166bool tpg_s_fourcc(struct tpg_data *tpg, u32 fourcc)
167{
168 tpg->fourcc = fourcc;
169 tpg->planes = 1;
170 tpg->recalc_colors = true;
171 switch (fourcc) {
172 case V4L2_PIX_FMT_RGB565:
173 case V4L2_PIX_FMT_RGB565X:
174 case V4L2_PIX_FMT_RGB555:
175 case V4L2_PIX_FMT_XRGB555:
176 case V4L2_PIX_FMT_ARGB555:
177 case V4L2_PIX_FMT_RGB555X:
178 case V4L2_PIX_FMT_RGB24:
179 case V4L2_PIX_FMT_BGR24:
180 case V4L2_PIX_FMT_RGB32:
181 case V4L2_PIX_FMT_BGR32:
182 case V4L2_PIX_FMT_XRGB32:
183 case V4L2_PIX_FMT_XBGR32:
184 case V4L2_PIX_FMT_ARGB32:
185 case V4L2_PIX_FMT_ABGR32:
186 tpg->is_yuv = false;
187 break;
188 case V4L2_PIX_FMT_NV16M:
189 case V4L2_PIX_FMT_NV61M:
190 tpg->planes = 2;
191 /* fall-through */
192 case V4L2_PIX_FMT_YUYV:
193 case V4L2_PIX_FMT_UYVY:
194 case V4L2_PIX_FMT_YVYU:
195 case V4L2_PIX_FMT_VYUY:
196 tpg->is_yuv = true;
197 break;
198 default:
199 return false;
200 }
201
202 switch (fourcc) {
203 case V4L2_PIX_FMT_RGB565:
204 case V4L2_PIX_FMT_RGB565X:
205 case V4L2_PIX_FMT_RGB555:
206 case V4L2_PIX_FMT_XRGB555:
207 case V4L2_PIX_FMT_ARGB555:
208 case V4L2_PIX_FMT_RGB555X:
209 case V4L2_PIX_FMT_YUYV:
210 case V4L2_PIX_FMT_UYVY:
211 case V4L2_PIX_FMT_YVYU:
212 case V4L2_PIX_FMT_VYUY:
213 tpg->twopixelsize[0] = 2 * 2;
214 break;
215 case V4L2_PIX_FMT_RGB24:
216 case V4L2_PIX_FMT_BGR24:
217 tpg->twopixelsize[0] = 2 * 3;
218 break;
219 case V4L2_PIX_FMT_RGB32:
220 case V4L2_PIX_FMT_BGR32:
221 case V4L2_PIX_FMT_XRGB32:
222 case V4L2_PIX_FMT_XBGR32:
223 case V4L2_PIX_FMT_ARGB32:
224 case V4L2_PIX_FMT_ABGR32:
225 tpg->twopixelsize[0] = 2 * 4;
226 break;
227 case V4L2_PIX_FMT_NV16M:
228 case V4L2_PIX_FMT_NV61M:
229 tpg->twopixelsize[0] = 2;
230 tpg->twopixelsize[1] = 2;
231 break;
232 }
233 return true;
234}
235
236void tpg_s_crop_compose(struct tpg_data *tpg, const struct v4l2_rect *crop,
237 const struct v4l2_rect *compose)
238{
239 tpg->crop = *crop;
240 tpg->compose = *compose;
241 tpg->scaled_width = (tpg->src_width * tpg->compose.width +
242 tpg->crop.width - 1) / tpg->crop.width;
243 tpg->scaled_width &= ~1;
244 if (tpg->scaled_width > tpg->max_line_width)
245 tpg->scaled_width = tpg->max_line_width;
246 if (tpg->scaled_width < 2)
247 tpg->scaled_width = 2;
248 tpg->recalc_lines = true;
249}
250
251void tpg_reset_source(struct tpg_data *tpg, unsigned width, unsigned height,
252 u32 field)
253{
254 unsigned p;
255
256 tpg->src_width = width;
257 tpg->src_height = height;
258 tpg->field = field;
259 tpg->buf_height = height;
260 if (V4L2_FIELD_HAS_T_OR_B(field))
261 tpg->buf_height /= 2;
262 tpg->scaled_width = width;
263 tpg->crop.top = tpg->crop.left = 0;
264 tpg->crop.width = width;
265 tpg->crop.height = height;
266 tpg->compose.top = tpg->compose.left = 0;
267 tpg->compose.width = width;
268 tpg->compose.height = tpg->buf_height;
269 for (p = 0; p < tpg->planes; p++)
270 tpg->bytesperline[p] = width * tpg->twopixelsize[p] / 2;
271 tpg->recalc_square_border = true;
272}
273
274static enum tpg_color tpg_get_textbg_color(struct tpg_data *tpg)
275{
276 switch (tpg->pattern) {
277 case TPG_PAT_BLACK:
278 return TPG_COLOR_100_WHITE;
279 case TPG_PAT_CSC_COLORBAR:
280 return TPG_COLOR_CSC_BLACK;
281 default:
282 return TPG_COLOR_100_BLACK;
283 }
284}
285
286static enum tpg_color tpg_get_textfg_color(struct tpg_data *tpg)
287{
288 switch (tpg->pattern) {
289 case TPG_PAT_75_COLORBAR:
290 case TPG_PAT_CSC_COLORBAR:
291 return TPG_COLOR_CSC_WHITE;
292 case TPG_PAT_BLACK:
293 return TPG_COLOR_100_BLACK;
294 default:
295 return TPG_COLOR_100_WHITE;
296 }
297}
298
299static u16 color_to_y(struct tpg_data *tpg, int r, int g, int b)
300{
301 switch (tpg->colorspace) {
302 case V4L2_COLORSPACE_SMPTE170M:
303 case V4L2_COLORSPACE_470_SYSTEM_M:
304 case V4L2_COLORSPACE_470_SYSTEM_BG:
305 return ((16829 * r + 33039 * g + 6416 * b + 16 * 32768) >> 16) + (16 << 4);
306 case V4L2_COLORSPACE_SMPTE240M:
307 return ((11932 * r + 39455 * g + 4897 * b + 16 * 32768) >> 16) + (16 << 4);
308 case V4L2_COLORSPACE_REC709:
309 case V4L2_COLORSPACE_SRGB:
310 default:
311 return ((11966 * r + 40254 * g + 4064 * b + 16 * 32768) >> 16) + (16 << 4);
312 }
313}
314
315static u16 color_to_cb(struct tpg_data *tpg, int r, int g, int b)
316{
317 switch (tpg->colorspace) {
318 case V4L2_COLORSPACE_SMPTE170M:
319 case V4L2_COLORSPACE_470_SYSTEM_M:
320 case V4L2_COLORSPACE_470_SYSTEM_BG:
321 return ((-9714 * r - 19070 * g + 28784 * b + 16 * 32768) >> 16) + (128 << 4);
322 case V4L2_COLORSPACE_SMPTE240M:
323 return ((-6684 * r - 22100 * g + 28784 * b + 16 * 32768) >> 16) + (128 << 4);
324 case V4L2_COLORSPACE_REC709:
325 case V4L2_COLORSPACE_SRGB:
326 default:
327 return ((-6596 * r - 22189 * g + 28784 * b + 16 * 32768) >> 16) + (128 << 4);
328 }
329}
330
331static u16 color_to_cr(struct tpg_data *tpg, int r, int g, int b)
332{
333 switch (tpg->colorspace) {
334 case V4L2_COLORSPACE_SMPTE170M:
335 case V4L2_COLORSPACE_470_SYSTEM_M:
336 case V4L2_COLORSPACE_470_SYSTEM_BG:
337 return ((28784 * r - 24103 * g - 4681 * b + 16 * 32768) >> 16) + (128 << 4);
338 case V4L2_COLORSPACE_SMPTE240M:
339 return ((28784 * r - 25606 * g - 3178 * b + 16 * 32768) >> 16) + (128 << 4);
340 case V4L2_COLORSPACE_REC709:
341 case V4L2_COLORSPACE_SRGB:
342 default:
343 return ((28784 * r - 26145 * g - 2639 * b + 16 * 32768) >> 16) + (128 << 4);
344 }
345}
346
347static u16 ycbcr_to_r(struct tpg_data *tpg, int y, int cb, int cr)
348{
349 int r;
350
351 y -= 16 << 4;
352 cb -= 128 << 4;
353 cr -= 128 << 4;
354 switch (tpg->colorspace) {
355 case V4L2_COLORSPACE_SMPTE170M:
356 case V4L2_COLORSPACE_470_SYSTEM_M:
357 case V4L2_COLORSPACE_470_SYSTEM_BG:
358 r = 4769 * y + 6537 * cr;
359 break;
360 case V4L2_COLORSPACE_SMPTE240M:
361 r = 4769 * y + 7376 * cr;
362 break;
363 case V4L2_COLORSPACE_REC709:
364 case V4L2_COLORSPACE_SRGB:
365 default:
366 r = 4769 * y + 7343 * cr;
367 break;
368 }
369 return clamp(r >> 12, 0, 0xff0);
370}
371
372static u16 ycbcr_to_g(struct tpg_data *tpg, int y, int cb, int cr)
373{
374 int g;
375
376 y -= 16 << 4;
377 cb -= 128 << 4;
378 cr -= 128 << 4;
379 switch (tpg->colorspace) {
380 case V4L2_COLORSPACE_SMPTE170M:
381 case V4L2_COLORSPACE_470_SYSTEM_M:
382 case V4L2_COLORSPACE_470_SYSTEM_BG:
383 g = 4769 * y - 1605 * cb - 3330 * cr;
384 break;
385 case V4L2_COLORSPACE_SMPTE240M:
386 g = 4769 * y - 1055 * cb - 2341 * cr;
387 break;
388 case V4L2_COLORSPACE_REC709:
389 case V4L2_COLORSPACE_SRGB:
390 default:
391 g = 4769 * y - 873 * cb - 2183 * cr;
392 break;
393 }
394 return clamp(g >> 12, 0, 0xff0);
395}
396
397static u16 ycbcr_to_b(struct tpg_data *tpg, int y, int cb, int cr)
398{
399 int b;
400
401 y -= 16 << 4;
402 cb -= 128 << 4;
403 cr -= 128 << 4;
404 switch (tpg->colorspace) {
405 case V4L2_COLORSPACE_SMPTE170M:
406 case V4L2_COLORSPACE_470_SYSTEM_M:
407 case V4L2_COLORSPACE_470_SYSTEM_BG:
408 b = 4769 * y + 7343 * cb;
409 break;
410 case V4L2_COLORSPACE_SMPTE240M:
411 b = 4769 * y + 8552 * cb;
412 break;
413 case V4L2_COLORSPACE_REC709:
414 case V4L2_COLORSPACE_SRGB:
415 default:
416 b = 4769 * y + 8652 * cb;
417 break;
418 }
419 return clamp(b >> 12, 0, 0xff0);
420}
421
422/* precalculate color bar values to speed up rendering */
423static void precalculate_color(struct tpg_data *tpg, int k)
424{
425 int col = k;
426 int r = tpg_colors[col].r;
427 int g = tpg_colors[col].g;
428 int b = tpg_colors[col].b;
429
430 if (k == TPG_COLOR_TEXTBG) {
431 col = tpg_get_textbg_color(tpg);
432
433 r = tpg_colors[col].r;
434 g = tpg_colors[col].g;
435 b = tpg_colors[col].b;
436 } else if (k == TPG_COLOR_TEXTFG) {
437 col = tpg_get_textfg_color(tpg);
438
439 r = tpg_colors[col].r;
440 g = tpg_colors[col].g;
441 b = tpg_colors[col].b;
442 } else if (tpg->pattern == TPG_PAT_NOISE) {
443 r = g = b = prandom_u32_max(256);
444 } else if (k == TPG_COLOR_RANDOM) {
445 r = g = b = tpg->qual_offset + prandom_u32_max(196);
446 } else if (k >= TPG_COLOR_RAMP) {
447 r = g = b = k - TPG_COLOR_RAMP;
448 }
449
450 if (tpg->pattern == TPG_PAT_CSC_COLORBAR && col <= TPG_COLOR_CSC_BLACK) {
451 r = tpg_csc_colors[tpg->colorspace][col].r;
452 g = tpg_csc_colors[tpg->colorspace][col].g;
453 b = tpg_csc_colors[tpg->colorspace][col].b;
454 } else {
455 r <<= 4;
456 g <<= 4;
457 b <<= 4;
458 }
459 if (tpg->qual == TPG_QUAL_GRAY)
460 r = g = b = color_to_y(tpg, r, g, b);
461
462 /*
463 * The assumption is that the RGB output is always full range,
464 * so only if the rgb_range overrides the 'real' rgb range do
465 * we need to convert the RGB values.
466 *
467 * Currently there is no way of signalling to userspace if you
468 * are actually giving it limited range RGB (or full range
469 * YUV for that matter).
470 *
471 * Remember that r, g and b are still in the 0 - 0xff0 range.
472 */
473 if (tpg->real_rgb_range == V4L2_DV_RGB_RANGE_LIMITED &&
474 tpg->rgb_range == V4L2_DV_RGB_RANGE_FULL) {
475 /*
476 * Convert from full range (which is what r, g and b are)
477 * to limited range (which is the 'real' RGB range), which
478 * is then interpreted as full range.
479 */
480 r = (r * 219) / 255 + (16 << 4);
481 g = (g * 219) / 255 + (16 << 4);
482 b = (b * 219) / 255 + (16 << 4);
483 } else if (tpg->real_rgb_range != V4L2_DV_RGB_RANGE_LIMITED &&
484 tpg->rgb_range == V4L2_DV_RGB_RANGE_LIMITED) {
485 /*
486 * Clamp r, g and b to the limited range and convert to full
487 * range since that's what we deliver.
488 */
489 r = clamp(r, 16 << 4, 235 << 4);
490 g = clamp(g, 16 << 4, 235 << 4);
491 b = clamp(b, 16 << 4, 235 << 4);
492 r = (r - (16 << 4)) * 255 / 219;
493 g = (g - (16 << 4)) * 255 / 219;
494 b = (b - (16 << 4)) * 255 / 219;
495 }
496
497 if (tpg->brightness != 128 || tpg->contrast != 128 ||
498 tpg->saturation != 128 || tpg->hue) {
499 /* Implement these operations */
500
501 /* First convert to YCbCr */
502 int y = color_to_y(tpg, r, g, b); /* Luma */
503 int cb = color_to_cb(tpg, r, g, b); /* Cb */
504 int cr = color_to_cr(tpg, r, g, b); /* Cr */
505 int tmp_cb, tmp_cr;
506
507 y = (16 << 4) + ((y - (16 << 4)) * tpg->contrast) / 128;
508 y += (tpg->brightness << 4) - (128 << 4);
509
510 cb -= 128 << 4;
511 cr -= 128 << 4;
512 tmp_cb = (cb * cos(128 + tpg->hue)) / 127 + (cr * sin[128 + tpg->hue]) / 127;
513 tmp_cr = (cr * cos(128 + tpg->hue)) / 127 - (cb * sin[128 + tpg->hue]) / 127;
514
515 cb = (128 << 4) + (tmp_cb * tpg->contrast * tpg->saturation) / (128 * 128);
516 cr = (128 << 4) + (tmp_cr * tpg->contrast * tpg->saturation) / (128 * 128);
517 if (tpg->is_yuv) {
518 tpg->colors[k][0] = clamp(y >> 4, 1, 254);
519 tpg->colors[k][1] = clamp(cb >> 4, 1, 254);
520 tpg->colors[k][2] = clamp(cr >> 4, 1, 254);
521 return;
522 }
523 r = ycbcr_to_r(tpg, y, cb, cr);
524 g = ycbcr_to_g(tpg, y, cb, cr);
525 b = ycbcr_to_b(tpg, y, cb, cr);
526 }
527
528 if (tpg->is_yuv) {
529 /* Convert to YCbCr */
530 u16 y = color_to_y(tpg, r, g, b); /* Luma */
531 u16 cb = color_to_cb(tpg, r, g, b); /* Cb */
532 u16 cr = color_to_cr(tpg, r, g, b); /* Cr */
533
534 tpg->colors[k][0] = clamp(y >> 4, 1, 254);
535 tpg->colors[k][1] = clamp(cb >> 4, 1, 254);
536 tpg->colors[k][2] = clamp(cr >> 4, 1, 254);
537 } else {
538 switch (tpg->fourcc) {
539 case V4L2_PIX_FMT_RGB565:
540 case V4L2_PIX_FMT_RGB565X:
541 r >>= 7;
542 g >>= 6;
543 b >>= 7;
544 break;
545 case V4L2_PIX_FMT_RGB555:
546 case V4L2_PIX_FMT_XRGB555:
547 case V4L2_PIX_FMT_ARGB555:
548 case V4L2_PIX_FMT_RGB555X:
549 r >>= 7;
550 g >>= 7;
551 b >>= 7;
552 break;
553 default:
554 r >>= 4;
555 g >>= 4;
556 b >>= 4;
557 break;
558 }
559
560 tpg->colors[k][0] = r;
561 tpg->colors[k][1] = g;
562 tpg->colors[k][2] = b;
563 }
564}
565
566static void tpg_precalculate_colors(struct tpg_data *tpg)
567{
568 int k;
569
570 for (k = 0; k < TPG_COLOR_MAX; k++)
571 precalculate_color(tpg, k);
572}
573
574/* 'odd' is true for pixels 1, 3, 5, etc. and false for pixels 0, 2, 4, etc. */
575static void gen_twopix(struct tpg_data *tpg,
576 u8 buf[TPG_MAX_PLANES][8], int color, bool odd)
577{
578 unsigned offset = odd * tpg->twopixelsize[0] / 2;
579 u8 alpha = tpg->alpha_component;
580 u8 r_y, g_u, b_v;
581
582 if (tpg->alpha_red_only && color != TPG_COLOR_CSC_RED &&
583 color != TPG_COLOR_100_RED &&
584 color != TPG_COLOR_75_RED)
585 alpha = 0;
586 if (color == TPG_COLOR_RANDOM)
587 precalculate_color(tpg, color);
588 r_y = tpg->colors[color][0]; /* R or precalculated Y */
589 g_u = tpg->colors[color][1]; /* G or precalculated U */
590 b_v = tpg->colors[color][2]; /* B or precalculated V */
591
592 switch (tpg->fourcc) {
593 case V4L2_PIX_FMT_NV16M:
594 buf[0][offset] = r_y;
595 buf[1][offset] = odd ? b_v : g_u;
596 break;
597 case V4L2_PIX_FMT_NV61M:
598 buf[0][offset] = r_y;
599 buf[1][offset] = odd ? g_u : b_v;
600 break;
601
602 case V4L2_PIX_FMT_YUYV:
603 buf[0][offset] = r_y;
604 buf[0][offset + 1] = odd ? b_v : g_u;
605 break;
606 case V4L2_PIX_FMT_UYVY:
607 buf[0][offset] = odd ? b_v : g_u;
608 buf[0][offset + 1] = r_y;
609 break;
610 case V4L2_PIX_FMT_YVYU:
611 buf[0][offset] = r_y;
612 buf[0][offset + 1] = odd ? g_u : b_v;
613 break;
614 case V4L2_PIX_FMT_VYUY:
615 buf[0][offset] = odd ? g_u : b_v;
616 buf[0][offset + 1] = r_y;
617 break;
618 case V4L2_PIX_FMT_RGB565:
619 buf[0][offset] = (g_u << 5) | b_v;
620 buf[0][offset + 1] = (r_y << 3) | (g_u >> 3);
621 break;
622 case V4L2_PIX_FMT_RGB565X:
623 buf[0][offset] = (r_y << 3) | (g_u >> 3);
624 buf[0][offset + 1] = (g_u << 5) | b_v;
625 break;
626 case V4L2_PIX_FMT_RGB555:
627 case V4L2_PIX_FMT_XRGB555:
628 alpha = 0;
629 /* fall through */
630 case V4L2_PIX_FMT_ARGB555:
631 buf[0][offset] = (g_u << 5) | b_v;
632 buf[0][offset + 1] = (alpha & 0x80) | (r_y << 2) | (g_u >> 3);
633 break;
634 case V4L2_PIX_FMT_RGB555X:
635 buf[0][offset] = (alpha & 0x80) | (r_y << 2) | (g_u >> 3);
636 buf[0][offset + 1] = (g_u << 5) | b_v;
637 break;
638 case V4L2_PIX_FMT_RGB24:
639 buf[0][offset] = r_y;
640 buf[0][offset + 1] = g_u;
641 buf[0][offset + 2] = b_v;
642 break;
643 case V4L2_PIX_FMT_BGR24:
644 buf[0][offset] = b_v;
645 buf[0][offset + 1] = g_u;
646 buf[0][offset + 2] = r_y;
647 break;
648 case V4L2_PIX_FMT_RGB32:
649 case V4L2_PIX_FMT_XRGB32:
650 alpha = 0;
651 /* fall through */
652 case V4L2_PIX_FMT_ARGB32:
653 buf[0][offset] = alpha;
654 buf[0][offset + 1] = r_y;
655 buf[0][offset + 2] = g_u;
656 buf[0][offset + 3] = b_v;
657 break;
658 case V4L2_PIX_FMT_BGR32:
659 case V4L2_PIX_FMT_XBGR32:
660 alpha = 0;
661 /* fall through */
662 case V4L2_PIX_FMT_ABGR32:
663 buf[0][offset] = b_v;
664 buf[0][offset + 1] = g_u;
665 buf[0][offset + 2] = r_y;
666 buf[0][offset + 3] = alpha;
667 break;
668 }
669}
670
671/* Return how many pattern lines are used by the current pattern. */
672static unsigned tpg_get_pat_lines(struct tpg_data *tpg)
673{
674 switch (tpg->pattern) {
675 case TPG_PAT_CHECKERS_16X16:
676 case TPG_PAT_CHECKERS_1X1:
677 case TPG_PAT_ALTERNATING_HLINES:
678 case TPG_PAT_CROSS_1_PIXEL:
679 case TPG_PAT_CROSS_2_PIXELS:
680 case TPG_PAT_CROSS_10_PIXELS:
681 return 2;
682 case TPG_PAT_100_COLORSQUARES:
683 case TPG_PAT_100_HCOLORBAR:
684 return 8;
685 default:
686 return 1;
687 }
688}
689
690/* Which pattern line should be used for the given frame line. */
691static unsigned tpg_get_pat_line(struct tpg_data *tpg, unsigned line)
692{
693 switch (tpg->pattern) {
694 case TPG_PAT_CHECKERS_16X16:
695 return (line >> 4) & 1;
696 case TPG_PAT_CHECKERS_1X1:
697 case TPG_PAT_ALTERNATING_HLINES:
698 return line & 1;
699 case TPG_PAT_100_COLORSQUARES:
700 case TPG_PAT_100_HCOLORBAR:
701 return (line * 8) / tpg->src_height;
702 case TPG_PAT_CROSS_1_PIXEL:
703 return line == tpg->src_height / 2;
704 case TPG_PAT_CROSS_2_PIXELS:
705 return (line + 1) / 2 == tpg->src_height / 4;
706 case TPG_PAT_CROSS_10_PIXELS:
707 return (line + 10) / 20 == tpg->src_height / 40;
708 default:
709 return 0;
710 }
711}
712
713/*
714 * Which color should be used for the given pattern line and X coordinate.
715 * Note: x is in the range 0 to 2 * tpg->src_width.
716 */
717static enum tpg_color tpg_get_color(struct tpg_data *tpg, unsigned pat_line, unsigned x)
718{
719 /* Maximum number of bars are TPG_COLOR_MAX - otherwise, the input print code
720 should be modified */
721 static const enum tpg_color bars[3][8] = {
722 /* Standard ITU-R 75% color bar sequence */
723 { TPG_COLOR_CSC_WHITE, TPG_COLOR_75_YELLOW,
724 TPG_COLOR_75_CYAN, TPG_COLOR_75_GREEN,
725 TPG_COLOR_75_MAGENTA, TPG_COLOR_75_RED,
726 TPG_COLOR_75_BLUE, TPG_COLOR_100_BLACK, },
727 /* Standard ITU-R 100% color bar sequence */
728 { TPG_COLOR_100_WHITE, TPG_COLOR_100_YELLOW,
729 TPG_COLOR_100_CYAN, TPG_COLOR_100_GREEN,
730 TPG_COLOR_100_MAGENTA, TPG_COLOR_100_RED,
731 TPG_COLOR_100_BLUE, TPG_COLOR_100_BLACK, },
732 /* Color bar sequence suitable to test CSC */
733 { TPG_COLOR_CSC_WHITE, TPG_COLOR_CSC_YELLOW,
734 TPG_COLOR_CSC_CYAN, TPG_COLOR_CSC_GREEN,
735 TPG_COLOR_CSC_MAGENTA, TPG_COLOR_CSC_RED,
736 TPG_COLOR_CSC_BLUE, TPG_COLOR_CSC_BLACK, },
737 };
738
739 switch (tpg->pattern) {
740 case TPG_PAT_75_COLORBAR:
741 case TPG_PAT_100_COLORBAR:
742 case TPG_PAT_CSC_COLORBAR:
743 return bars[tpg->pattern][((x * 8) / tpg->src_width) % 8];
744 case TPG_PAT_100_COLORSQUARES:
745 return bars[1][(pat_line + (x * 8) / tpg->src_width) % 8];
746 case TPG_PAT_100_HCOLORBAR:
747 return bars[1][pat_line];
748 case TPG_PAT_BLACK:
749 return TPG_COLOR_100_BLACK;
750 case TPG_PAT_WHITE:
751 return TPG_COLOR_100_WHITE;
752 case TPG_PAT_RED:
753 return TPG_COLOR_100_RED;
754 case TPG_PAT_GREEN:
755 return TPG_COLOR_100_GREEN;
756 case TPG_PAT_BLUE:
757 return TPG_COLOR_100_BLUE;
758 case TPG_PAT_CHECKERS_16X16:
759 return (((x >> 4) & 1) ^ (pat_line & 1)) ?
760 TPG_COLOR_100_BLACK : TPG_COLOR_100_WHITE;
761 case TPG_PAT_CHECKERS_1X1:
762 return ((x & 1) ^ (pat_line & 1)) ?
763 TPG_COLOR_100_WHITE : TPG_COLOR_100_BLACK;
764 case TPG_PAT_ALTERNATING_HLINES:
765 return pat_line ? TPG_COLOR_100_WHITE : TPG_COLOR_100_BLACK;
766 case TPG_PAT_ALTERNATING_VLINES:
767 return (x & 1) ? TPG_COLOR_100_WHITE : TPG_COLOR_100_BLACK;
768 case TPG_PAT_CROSS_1_PIXEL:
769 if (pat_line || (x % tpg->src_width) == tpg->src_width / 2)
770 return TPG_COLOR_100_BLACK;
771 return TPG_COLOR_100_WHITE;
772 case TPG_PAT_CROSS_2_PIXELS:
773 if (pat_line || ((x % tpg->src_width) + 1) / 2 == tpg->src_width / 4)
774 return TPG_COLOR_100_BLACK;
775 return TPG_COLOR_100_WHITE;
776 case TPG_PAT_CROSS_10_PIXELS:
777 if (pat_line || ((x % tpg->src_width) + 10) / 20 == tpg->src_width / 40)
778 return TPG_COLOR_100_BLACK;
779 return TPG_COLOR_100_WHITE;
780 case TPG_PAT_GRAY_RAMP:
781 return TPG_COLOR_RAMP + ((x % tpg->src_width) * 256) / tpg->src_width;
782 default:
783 return TPG_COLOR_100_RED;
784 }
785}
786
787/*
788 * Given the pixel aspect ratio and video aspect ratio calculate the
789 * coordinates of a centered square and the coordinates of the border of
790 * the active video area. The coordinates are relative to the source
791 * frame rectangle.
792 */
793static void tpg_calculate_square_border(struct tpg_data *tpg)
794{
795 unsigned w = tpg->src_width;
796 unsigned h = tpg->src_height;
797 unsigned sq_w, sq_h;
798
799 sq_w = (w * 2 / 5) & ~1;
800 if (((w - sq_w) / 2) & 1)
801 sq_w += 2;
802 sq_h = sq_w;
803 tpg->square.width = sq_w;
804 if (tpg->vid_aspect == TPG_VIDEO_ASPECT_16X9_ANAMORPHIC) {
805 unsigned ana_sq_w = (sq_w / 4) * 3;
806
807 if (((w - ana_sq_w) / 2) & 1)
808 ana_sq_w += 2;
809 tpg->square.width = ana_sq_w;
810 }
811 tpg->square.left = (w - tpg->square.width) / 2;
812 if (tpg->pix_aspect == TPG_PIXEL_ASPECT_NTSC)
813 sq_h = sq_w * 10 / 11;
814 else if (tpg->pix_aspect == TPG_PIXEL_ASPECT_PAL)
815 sq_h = sq_w * 59 / 54;
816 tpg->square.height = sq_h;
817 tpg->square.top = (h - sq_h) / 2;
818 tpg->border.left = 0;
819 tpg->border.width = w;
820 tpg->border.top = 0;
821 tpg->border.height = h;
822 switch (tpg->vid_aspect) {
823 case TPG_VIDEO_ASPECT_4X3:
824 if (tpg->pix_aspect)
825 return;
826 if (3 * w >= 4 * h) {
827 tpg->border.width = ((4 * h) / 3) & ~1;
828 if (((w - tpg->border.width) / 2) & ~1)
829 tpg->border.width -= 2;
830 tpg->border.left = (w - tpg->border.width) / 2;
831 break;
832 }
833 tpg->border.height = ((3 * w) / 4) & ~1;
834 tpg->border.top = (h - tpg->border.height) / 2;
835 break;
836 case TPG_VIDEO_ASPECT_14X9_CENTRE:
837 if (tpg->pix_aspect) {
838 tpg->border.height = tpg->pix_aspect == TPG_PIXEL_ASPECT_NTSC ? 420 : 506;
839 tpg->border.top = (h - tpg->border.height) / 2;
840 break;
841 }
842 if (9 * w >= 14 * h) {
843 tpg->border.width = ((14 * h) / 9) & ~1;
844 if (((w - tpg->border.width) / 2) & ~1)
845 tpg->border.width -= 2;
846 tpg->border.left = (w - tpg->border.width) / 2;
847 break;
848 }
849 tpg->border.height = ((9 * w) / 14) & ~1;
850 tpg->border.top = (h - tpg->border.height) / 2;
851 break;
852 case TPG_VIDEO_ASPECT_16X9_CENTRE:
853 if (tpg->pix_aspect) {
854 tpg->border.height = tpg->pix_aspect == TPG_PIXEL_ASPECT_NTSC ? 368 : 442;
855 tpg->border.top = (h - tpg->border.height) / 2;
856 break;
857 }
858 if (9 * w >= 16 * h) {
859 tpg->border.width = ((16 * h) / 9) & ~1;
860 if (((w - tpg->border.width) / 2) & ~1)
861 tpg->border.width -= 2;
862 tpg->border.left = (w - tpg->border.width) / 2;
863 break;
864 }
865 tpg->border.height = ((9 * w) / 16) & ~1;
866 tpg->border.top = (h - tpg->border.height) / 2;
867 break;
868 default:
869 break;
870 }
871}
872
873static void tpg_precalculate_line(struct tpg_data *tpg)
874{
875 enum tpg_color contrast;
876 unsigned pat;
877 unsigned p;
878 unsigned x;
879
880 switch (tpg->pattern) {
881 case TPG_PAT_GREEN:
882 contrast = TPG_COLOR_100_RED;
883 break;
884 case TPG_PAT_CSC_COLORBAR:
885 contrast = TPG_COLOR_CSC_GREEN;
886 break;
887 default:
888 contrast = TPG_COLOR_100_GREEN;
889 break;
890 }
891
892 for (pat = 0; pat < tpg_get_pat_lines(tpg); pat++) {
893 /* Coarse scaling with Bresenham */
894 unsigned int_part = tpg->src_width / tpg->scaled_width;
895 unsigned fract_part = tpg->src_width % tpg->scaled_width;
896 unsigned src_x = 0;
897 unsigned error = 0;
898
899 for (x = 0; x < tpg->scaled_width * 2; x += 2) {
900 unsigned real_x = src_x;
901 enum tpg_color color1, color2;
902 u8 pix[TPG_MAX_PLANES][8];
903
904 real_x = tpg->hflip ? tpg->src_width * 2 - real_x - 2 : real_x;
905 color1 = tpg_get_color(tpg, pat, real_x);
906
907 src_x += int_part;
908 error += fract_part;
909 if (error >= tpg->scaled_width) {
910 error -= tpg->scaled_width;
911 src_x++;
912 }
913
914 real_x = src_x;
915 real_x = tpg->hflip ? tpg->src_width * 2 - real_x - 2 : real_x;
916 color2 = tpg_get_color(tpg, pat, real_x);
917
918 src_x += int_part;
919 error += fract_part;
920 if (error >= tpg->scaled_width) {
921 error -= tpg->scaled_width;
922 src_x++;
923 }
924
925 gen_twopix(tpg, pix, tpg->hflip ? color2 : color1, 0);
926 gen_twopix(tpg, pix, tpg->hflip ? color1 : color2, 1);
927 for (p = 0; p < tpg->planes; p++) {
928 unsigned twopixsize = tpg->twopixelsize[p];
929 u8 *pos = tpg->lines[pat][p] + x * twopixsize / 2;
930
931 memcpy(pos, pix[p], twopixsize);
932 }
933 }
934 }
935 for (x = 0; x < tpg->scaled_width; x += 2) {
936 u8 pix[TPG_MAX_PLANES][8];
937
938 gen_twopix(tpg, pix, contrast, 0);
939 gen_twopix(tpg, pix, contrast, 1);
940 for (p = 0; p < tpg->planes; p++) {
941 unsigned twopixsize = tpg->twopixelsize[p];
942 u8 *pos = tpg->contrast_line[p] + x * twopixsize / 2;
943
944 memcpy(pos, pix[p], twopixsize);
945 }
946 }
947 for (x = 0; x < tpg->scaled_width; x += 2) {
948 u8 pix[TPG_MAX_PLANES][8];
949
950 gen_twopix(tpg, pix, TPG_COLOR_100_BLACK, 0);
951 gen_twopix(tpg, pix, TPG_COLOR_100_BLACK, 1);
952 for (p = 0; p < tpg->planes; p++) {
953 unsigned twopixsize = tpg->twopixelsize[p];
954 u8 *pos = tpg->black_line[p] + x * twopixsize / 2;
955
956 memcpy(pos, pix[p], twopixsize);
957 }
958 }
959 for (x = 0; x < tpg->scaled_width * 2; x += 2) {
960 u8 pix[TPG_MAX_PLANES][8];
961
962 gen_twopix(tpg, pix, TPG_COLOR_RANDOM, 0);
963 gen_twopix(tpg, pix, TPG_COLOR_RANDOM, 1);
964 for (p = 0; p < tpg->planes; p++) {
965 unsigned twopixsize = tpg->twopixelsize[p];
966 u8 *pos = tpg->random_line[p] + x * twopixsize / 2;
967
968 memcpy(pos, pix[p], twopixsize);
969 }
970 }
971 gen_twopix(tpg, tpg->textbg, TPG_COLOR_TEXTBG, 0);
972 gen_twopix(tpg, tpg->textbg, TPG_COLOR_TEXTBG, 1);
973 gen_twopix(tpg, tpg->textfg, TPG_COLOR_TEXTFG, 0);
974 gen_twopix(tpg, tpg->textfg, TPG_COLOR_TEXTFG, 1);
975}
976
977/* need this to do rgb24 rendering */
978typedef struct { u16 __; u8 _; } __packed x24;
979
980void tpg_gen_text(struct tpg_data *tpg, u8 *basep[TPG_MAX_PLANES][2],
981 int y, int x, char *text)
982{
983 int line;
984 unsigned step = V4L2_FIELD_HAS_T_OR_B(tpg->field) ? 2 : 1;
985 unsigned div = step;
986 unsigned first = 0;
987 unsigned len = strlen(text);
988 unsigned p;
989
990 if (font8x16 == NULL || basep == NULL)
991 return;
992
993 /* Checks if it is possible to show string */
994 if (y + 16 >= tpg->compose.height || x + 8 >= tpg->compose.width)
995 return;
996
997 if (len > (tpg->compose.width - x) / 8)
998 len = (tpg->compose.width - x) / 8;
999 if (tpg->vflip)
1000 y = tpg->compose.height - y - 16;
1001 if (tpg->hflip)
1002 x = tpg->compose.width - x - 8;
1003 y += tpg->compose.top;
1004 x += tpg->compose.left;
1005 if (tpg->field == V4L2_FIELD_BOTTOM)
1006 first = 1;
1007 else if (tpg->field == V4L2_FIELD_SEQ_TB || tpg->field == V4L2_FIELD_SEQ_BT)
1008 div = 2;
1009
1010 for (p = 0; p < tpg->planes; p++) {
1011 /* Print stream time */
1012#define PRINTSTR(PIXTYPE) do { \
1013 PIXTYPE fg; \
1014 PIXTYPE bg; \
1015 memcpy(&fg, tpg->textfg[p], sizeof(PIXTYPE)); \
1016 memcpy(&bg, tpg->textbg[p], sizeof(PIXTYPE)); \
1017 \
1018 for (line = first; line < 16; line += step) { \
1019 int l = tpg->vflip ? 15 - line : line; \
1020 PIXTYPE *pos = (PIXTYPE *)(basep[p][line & 1] + \
1021 ((y * step + l) / div) * tpg->bytesperline[p] + \
1022 x * sizeof(PIXTYPE)); \
1023 unsigned s; \
1024 \
1025 for (s = 0; s < len; s++) { \
1026 u8 chr = font8x16[text[s] * 16 + line]; \
1027 \
1028 if (tpg->hflip) { \
1029 pos[7] = (chr & (0x01 << 7) ? fg : bg); \
1030 pos[6] = (chr & (0x01 << 6) ? fg : bg); \
1031 pos[5] = (chr & (0x01 << 5) ? fg : bg); \
1032 pos[4] = (chr & (0x01 << 4) ? fg : bg); \
1033 pos[3] = (chr & (0x01 << 3) ? fg : bg); \
1034 pos[2] = (chr & (0x01 << 2) ? fg : bg); \
1035 pos[1] = (chr & (0x01 << 1) ? fg : bg); \
1036 pos[0] = (chr & (0x01 << 0) ? fg : bg); \
1037 } else { \
1038 pos[0] = (chr & (0x01 << 7) ? fg : bg); \
1039 pos[1] = (chr & (0x01 << 6) ? fg : bg); \
1040 pos[2] = (chr & (0x01 << 5) ? fg : bg); \
1041 pos[3] = (chr & (0x01 << 4) ? fg : bg); \
1042 pos[4] = (chr & (0x01 << 3) ? fg : bg); \
1043 pos[5] = (chr & (0x01 << 2) ? fg : bg); \
1044 pos[6] = (chr & (0x01 << 1) ? fg : bg); \
1045 pos[7] = (chr & (0x01 << 0) ? fg : bg); \
1046 } \
1047 \
1048 pos += tpg->hflip ? -8 : 8; \
1049 } \
1050 } \
1051} while (0)
1052
1053 switch (tpg->twopixelsize[p]) {
1054 case 2:
1055 PRINTSTR(u8); break;
1056 case 4:
1057 PRINTSTR(u16); break;
1058 case 6:
1059 PRINTSTR(x24); break;
1060 case 8:
1061 PRINTSTR(u32); break;
1062 }
1063 }
1064}
1065
1066void tpg_update_mv_step(struct tpg_data *tpg)
1067{
1068 int factor = tpg->mv_hor_mode > TPG_MOVE_NONE ? -1 : 1;
1069
1070 if (tpg->hflip)
1071 factor = -factor;
1072 switch (tpg->mv_hor_mode) {
1073 case TPG_MOVE_NEG_FAST:
1074 case TPG_MOVE_POS_FAST:
1075 tpg->mv_hor_step = ((tpg->src_width + 319) / 320) * 4;
1076 break;
1077 case TPG_MOVE_NEG:
1078 case TPG_MOVE_POS:
1079 tpg->mv_hor_step = ((tpg->src_width + 639) / 640) * 4;
1080 break;
1081 case TPG_MOVE_NEG_SLOW:
1082 case TPG_MOVE_POS_SLOW:
1083 tpg->mv_hor_step = 2;
1084 break;
1085 case TPG_MOVE_NONE:
1086 tpg->mv_hor_step = 0;
1087 break;
1088 }
1089 if (factor < 0)
1090 tpg->mv_hor_step = tpg->src_width - tpg->mv_hor_step;
1091
1092 factor = tpg->mv_vert_mode > TPG_MOVE_NONE ? -1 : 1;
1093 switch (tpg->mv_vert_mode) {
1094 case TPG_MOVE_NEG_FAST:
1095 case TPG_MOVE_POS_FAST:
1096 tpg->mv_vert_step = ((tpg->src_width + 319) / 320) * 4;
1097 break;
1098 case TPG_MOVE_NEG:
1099 case TPG_MOVE_POS:
1100 tpg->mv_vert_step = ((tpg->src_width + 639) / 640) * 4;
1101 break;
1102 case TPG_MOVE_NEG_SLOW:
1103 case TPG_MOVE_POS_SLOW:
1104 tpg->mv_vert_step = 1;
1105 break;
1106 case TPG_MOVE_NONE:
1107 tpg->mv_vert_step = 0;
1108 break;
1109 }
1110 if (factor < 0)
1111 tpg->mv_vert_step = tpg->src_height - tpg->mv_vert_step;
1112}
1113
1114/* Map the line number relative to the crop rectangle to a frame line number */
1115static unsigned tpg_calc_frameline(struct tpg_data *tpg, unsigned src_y,
1116 unsigned field)
1117{
1118 switch (field) {
1119 case V4L2_FIELD_TOP:
1120 return tpg->crop.top + src_y * 2;
1121 case V4L2_FIELD_BOTTOM:
1122 return tpg->crop.top + src_y * 2 + 1;
1123 default:
1124 return src_y + tpg->crop.top;
1125 }
1126}
1127
1128/*
1129 * Map the line number relative to the compose rectangle to a destination
1130 * buffer line number.
1131 */
1132static unsigned tpg_calc_buffer_line(struct tpg_data *tpg, unsigned y,
1133 unsigned field)
1134{
1135 y += tpg->compose.top;
1136 switch (field) {
1137 case V4L2_FIELD_SEQ_TB:
1138 if (y & 1)
1139 return tpg->buf_height / 2 + y / 2;
1140 return y / 2;
1141 case V4L2_FIELD_SEQ_BT:
1142 if (y & 1)
1143 return y / 2;
1144 return tpg->buf_height / 2 + y / 2;
1145 default:
1146 return y;
1147 }
1148}
1149
1150static void tpg_recalc(struct tpg_data *tpg)
1151{
1152 if (tpg->recalc_colors) {
1153 tpg->recalc_colors = false;
1154 tpg->recalc_lines = true;
1155 tpg_precalculate_colors(tpg);
1156 }
1157 if (tpg->recalc_square_border) {
1158 tpg->recalc_square_border = false;
1159 tpg_calculate_square_border(tpg);
1160 }
1161 if (tpg->recalc_lines) {
1162 tpg->recalc_lines = false;
1163 tpg_precalculate_line(tpg);
1164 }
1165}
1166
1167void tpg_calc_text_basep(struct tpg_data *tpg,
1168 u8 *basep[TPG_MAX_PLANES][2], unsigned p, u8 *vbuf)
1169{
1170 unsigned stride = tpg->bytesperline[p];
1171
1172 tpg_recalc(tpg);
1173
1174 basep[p][0] = vbuf;
1175 basep[p][1] = vbuf;
1176 if (tpg->field == V4L2_FIELD_SEQ_TB)
1177 basep[p][1] += tpg->buf_height * stride / 2;
1178 else if (tpg->field == V4L2_FIELD_SEQ_BT)
1179 basep[p][0] += tpg->buf_height * stride / 2;
1180}
1181
1182void tpg_fillbuffer(struct tpg_data *tpg, v4l2_std_id std, unsigned p, u8 *vbuf)
1183{
1184 bool is_tv = std;
1185 bool is_60hz = is_tv && (std & V4L2_STD_525_60);
1186 unsigned mv_hor_old = tpg->mv_hor_count % tpg->src_width;
1187 unsigned mv_hor_new = (tpg->mv_hor_count + tpg->mv_hor_step) % tpg->src_width;
1188 unsigned mv_vert_old = tpg->mv_vert_count % tpg->src_height;
1189 unsigned mv_vert_new = (tpg->mv_vert_count + tpg->mv_vert_step) % tpg->src_height;
1190 unsigned wss_width;
1191 unsigned f;
1192 int hmax = (tpg->compose.height * tpg->perc_fill) / 100;
1193 int h;
1194 unsigned twopixsize = tpg->twopixelsize[p];
1195 unsigned img_width = tpg->compose.width * twopixsize / 2;
1196 unsigned line_offset;
1197 unsigned left_pillar_width = 0;
1198 unsigned right_pillar_start = img_width;
1199 unsigned stride = tpg->bytesperline[p];
1200 unsigned factor = V4L2_FIELD_HAS_T_OR_B(tpg->field) ? 2 : 1;
1201 u8 *orig_vbuf = vbuf;
1202
1203 /* Coarse scaling with Bresenham */
1204 unsigned int_part = (tpg->crop.height / factor) / tpg->compose.height;
1205 unsigned fract_part = (tpg->crop.height / factor) % tpg->compose.height;
1206 unsigned src_y = 0;
1207 unsigned error = 0;
1208
1209 tpg_recalc(tpg);
1210
1211 mv_hor_old = (mv_hor_old * tpg->scaled_width / tpg->src_width) & ~1;
1212 mv_hor_new = (mv_hor_new * tpg->scaled_width / tpg->src_width) & ~1;
1213 wss_width = tpg->crop.left < tpg->src_width / 2 ?
1214 tpg->src_width / 2 - tpg->crop.left : 0;
1215 if (wss_width > tpg->crop.width)
1216 wss_width = tpg->crop.width;
1217 wss_width = wss_width * tpg->scaled_width / tpg->src_width;
1218
1219 vbuf += tpg->compose.left * twopixsize / 2;
1220 line_offset = tpg->crop.left * tpg->scaled_width / tpg->src_width;
1221 line_offset = (line_offset & ~1) * twopixsize / 2;
1222 if (tpg->crop.left < tpg->border.left) {
1223 left_pillar_width = tpg->border.left - tpg->crop.left;
1224 if (left_pillar_width > tpg->crop.width)
1225 left_pillar_width = tpg->crop.width;
1226 left_pillar_width = (left_pillar_width * tpg->scaled_width) / tpg->src_width;
1227 left_pillar_width = (left_pillar_width & ~1) * twopixsize / 2;
1228 }
1229 if (tpg->crop.left + tpg->crop.width > tpg->border.left + tpg->border.width) {
1230 right_pillar_start = tpg->border.left + tpg->border.width - tpg->crop.left;
1231 right_pillar_start = (right_pillar_start * tpg->scaled_width) / tpg->src_width;
1232 right_pillar_start = (right_pillar_start & ~1) * twopixsize / 2;
1233 if (right_pillar_start > img_width)
1234 right_pillar_start = img_width;
1235 }
1236
1237 f = tpg->field == (is_60hz ? V4L2_FIELD_TOP : V4L2_FIELD_BOTTOM);
1238
1239 for (h = 0; h < tpg->compose.height; h++) {
1240 bool even;
1241 bool fill_blank = false;
1242 unsigned frame_line;
1243 unsigned buf_line;
1244 unsigned pat_line_old;
1245 unsigned pat_line_new;
1246 u8 *linestart_older;
1247 u8 *linestart_newer;
1248 u8 *linestart_top;
1249 u8 *linestart_bottom;
1250
1251 frame_line = tpg_calc_frameline(tpg, src_y, tpg->field);
1252 even = !(frame_line & 1);
1253 buf_line = tpg_calc_buffer_line(tpg, h, tpg->field);
1254 src_y += int_part;
1255 error += fract_part;
1256 if (error >= tpg->compose.height) {
1257 error -= tpg->compose.height;
1258 src_y++;
1259 }
1260
1261 if (h >= hmax) {
1262 if (hmax == tpg->compose.height)
1263 continue;
1264 if (!tpg->perc_fill_blank)
1265 continue;
1266 fill_blank = true;
1267 }
1268
1269 if (tpg->vflip)
1270 frame_line = tpg->src_height - frame_line - 1;
1271
1272 if (fill_blank) {
1273 linestart_older = tpg->contrast_line[p];
1274 linestart_newer = tpg->contrast_line[p];
1275 } else if (tpg->qual != TPG_QUAL_NOISE &&
1276 (frame_line < tpg->border.top ||
1277 frame_line >= tpg->border.top + tpg->border.height)) {
1278 linestart_older = tpg->black_line[p];
1279 linestart_newer = tpg->black_line[p];
1280 } else if (tpg->pattern == TPG_PAT_NOISE || tpg->qual == TPG_QUAL_NOISE) {
1281 linestart_older = tpg->random_line[p] +
1282 twopixsize * prandom_u32_max(tpg->src_width / 2);
1283 linestart_newer = tpg->random_line[p] +
1284 twopixsize * prandom_u32_max(tpg->src_width / 2);
1285 } else {
1286 pat_line_old = tpg_get_pat_line(tpg,
1287 (frame_line + mv_vert_old) % tpg->src_height);
1288 pat_line_new = tpg_get_pat_line(tpg,
1289 (frame_line + mv_vert_new) % tpg->src_height);
1290 linestart_older = tpg->lines[pat_line_old][p] +
1291 mv_hor_old * twopixsize / 2;
1292 linestart_newer = tpg->lines[pat_line_new][p] +
1293 mv_hor_new * twopixsize / 2;
1294 linestart_older += line_offset;
1295 linestart_newer += line_offset;
1296 }
1297 if (is_60hz) {
1298 linestart_top = linestart_newer;
1299 linestart_bottom = linestart_older;
1300 } else {
1301 linestart_top = linestart_older;
1302 linestart_bottom = linestart_newer;
1303 }
1304
1305 switch (tpg->field) {
1306 case V4L2_FIELD_INTERLACED:
1307 case V4L2_FIELD_INTERLACED_TB:
1308 case V4L2_FIELD_SEQ_TB:
1309 case V4L2_FIELD_SEQ_BT:
1310 if (even)
1311 memcpy(vbuf + buf_line * stride, linestart_top, img_width);
1312 else
1313 memcpy(vbuf + buf_line * stride, linestart_bottom, img_width);
1314 break;
1315 case V4L2_FIELD_INTERLACED_BT:
1316 if (even)
1317 memcpy(vbuf + buf_line * stride, linestart_bottom, img_width);
1318 else
1319 memcpy(vbuf + buf_line * stride, linestart_top, img_width);
1320 break;
1321 case V4L2_FIELD_TOP:
1322 memcpy(vbuf + buf_line * stride, linestart_top, img_width);
1323 break;
1324 case V4L2_FIELD_BOTTOM:
1325 memcpy(vbuf + buf_line * stride, linestart_bottom, img_width);
1326 break;
1327 case V4L2_FIELD_NONE:
1328 default:
1329 memcpy(vbuf + buf_line * stride, linestart_older, img_width);
1330 break;
1331 }
1332
1333 if (is_tv && !is_60hz && frame_line == 0 && wss_width) {
1334 /*
1335 * Replace the first half of the top line of a 50 Hz frame
1336 * with random data to simulate a WSS signal.
1337 */
1338 u8 *wss = tpg->random_line[p] +
1339 twopixsize * prandom_u32_max(tpg->src_width / 2);
1340
1341 memcpy(vbuf + buf_line * stride, wss, wss_width * twopixsize / 2);
1342 }
1343 }
1344
1345 vbuf = orig_vbuf;
1346 vbuf += tpg->compose.left * twopixsize / 2;
1347 src_y = 0;
1348 error = 0;
1349 for (h = 0; h < tpg->compose.height; h++) {
1350 unsigned frame_line = tpg_calc_frameline(tpg, src_y, tpg->field);
1351 unsigned buf_line = tpg_calc_buffer_line(tpg, h, tpg->field);
1352 const struct v4l2_rect *sq = &tpg->square;
1353 const struct v4l2_rect *b = &tpg->border;
1354 const struct v4l2_rect *c = &tpg->crop;
1355
1356 src_y += int_part;
1357 error += fract_part;
1358 if (error >= tpg->compose.height) {
1359 error -= tpg->compose.height;
1360 src_y++;
1361 }
1362
1363 if (tpg->show_border && frame_line >= b->top &&
1364 frame_line < b->top + b->height) {
1365 unsigned bottom = b->top + b->height - 1;
1366 unsigned left = left_pillar_width;
1367 unsigned right = right_pillar_start;
1368
1369 if (frame_line == b->top || frame_line == b->top + 1 ||
1370 frame_line == bottom || frame_line == bottom - 1) {
1371 memcpy(vbuf + buf_line * stride + left, tpg->contrast_line[p],
1372 right - left);
1373 } else {
1374 if (b->left >= c->left &&
1375 b->left < c->left + c->width)
1376 memcpy(vbuf + buf_line * stride + left,
1377 tpg->contrast_line[p], twopixsize);
1378 if (b->left + b->width > c->left &&
1379 b->left + b->width <= c->left + c->width)
1380 memcpy(vbuf + buf_line * stride + right - twopixsize,
1381 tpg->contrast_line[p], twopixsize);
1382 }
1383 }
1384 if (tpg->qual != TPG_QUAL_NOISE && frame_line >= b->top &&
1385 frame_line < b->top + b->height) {
1386 memcpy(vbuf + buf_line * stride, tpg->black_line[p], left_pillar_width);
1387 memcpy(vbuf + buf_line * stride + right_pillar_start, tpg->black_line[p],
1388 img_width - right_pillar_start);
1389 }
1390 if (tpg->show_square && frame_line >= sq->top &&
1391 frame_line < sq->top + sq->height &&
1392 sq->left < c->left + c->width &&
1393 sq->left + sq->width >= c->left) {
1394 unsigned left = sq->left;
1395 unsigned width = sq->width;
1396
1397 if (c->left > left) {
1398 width -= c->left - left;
1399 left = c->left;
1400 }
1401 if (c->left + c->width < left + width)
1402 width -= left + width - c->left - c->width;
1403 left -= c->left;
1404 left = (left * tpg->scaled_width) / tpg->src_width;
1405 left = (left & ~1) * twopixsize / 2;
1406 width = (width * tpg->scaled_width) / tpg->src_width;
1407 width = (width & ~1) * twopixsize / 2;
1408 memcpy(vbuf + buf_line * stride + left, tpg->contrast_line[p], width);
1409 }
1410 if (tpg->insert_sav) {
1411 unsigned offset = (tpg->compose.width / 6) * twopixsize;
1412 u8 *p = vbuf + buf_line * stride + offset;
1413 unsigned vact = 0, hact = 0;
1414
1415 p[0] = 0xff;
1416 p[1] = 0;
1417 p[2] = 0;
1418 p[3] = 0x80 | (f << 6) | (vact << 5) | (hact << 4) |
1419 ((hact ^ vact) << 3) |
1420 ((hact ^ f) << 2) |
1421 ((f ^ vact) << 1) |
1422 (hact ^ vact ^ f);
1423 }
1424 if (tpg->insert_eav) {
1425 unsigned offset = (tpg->compose.width / 6) * 2 * twopixsize;
1426 u8 *p = vbuf + buf_line * stride + offset;
1427 unsigned vact = 0, hact = 1;
1428
1429 p[0] = 0xff;
1430 p[1] = 0;
1431 p[2] = 0;
1432 p[3] = 0x80 | (f << 6) | (vact << 5) | (hact << 4) |
1433 ((hact ^ vact) << 3) |
1434 ((hact ^ f) << 2) |
1435 ((f ^ vact) << 1) |
1436 (hact ^ vact ^ f);
1437 }
1438 }
1439}
diff --git a/drivers/media/platform/vivid/vivid-tpg.h b/drivers/media/platform/vivid/vivid-tpg.h
new file mode 100644
index 000000000000..8ef3e52ba3be
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-tpg.h
@@ -0,0 +1,439 @@
1/*
2 * vivid-tpg.h - Test Pattern Generator
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#ifndef _VIVID_TPG_H_
21#define _VIVID_TPG_H_
22
23#include <linux/version.h>
24#include <linux/types.h>
25#include <linux/errno.h>
26#include <linux/random.h>
27#include <linux/slab.h>
28#include <linux/vmalloc.h>
29#include <linux/videodev2.h>
30
31#include "vivid-tpg-colors.h"
32
33enum tpg_pattern {
34 TPG_PAT_75_COLORBAR,
35 TPG_PAT_100_COLORBAR,
36 TPG_PAT_CSC_COLORBAR,
37 TPG_PAT_100_HCOLORBAR,
38 TPG_PAT_100_COLORSQUARES,
39 TPG_PAT_BLACK,
40 TPG_PAT_WHITE,
41 TPG_PAT_RED,
42 TPG_PAT_GREEN,
43 TPG_PAT_BLUE,
44 TPG_PAT_CHECKERS_16X16,
45 TPG_PAT_CHECKERS_1X1,
46 TPG_PAT_ALTERNATING_HLINES,
47 TPG_PAT_ALTERNATING_VLINES,
48 TPG_PAT_CROSS_1_PIXEL,
49 TPG_PAT_CROSS_2_PIXELS,
50 TPG_PAT_CROSS_10_PIXELS,
51 TPG_PAT_GRAY_RAMP,
52
53 /* Must be the last pattern */
54 TPG_PAT_NOISE,
55};
56
57extern const char * const tpg_pattern_strings[];
58
59enum tpg_quality {
60 TPG_QUAL_COLOR,
61 TPG_QUAL_GRAY,
62 TPG_QUAL_NOISE
63};
64
65enum tpg_video_aspect {
66 TPG_VIDEO_ASPECT_IMAGE,
67 TPG_VIDEO_ASPECT_4X3,
68 TPG_VIDEO_ASPECT_14X9_CENTRE,
69 TPG_VIDEO_ASPECT_16X9_CENTRE,
70 TPG_VIDEO_ASPECT_16X9_ANAMORPHIC,
71};
72
73enum tpg_pixel_aspect {
74 TPG_PIXEL_ASPECT_SQUARE,
75 TPG_PIXEL_ASPECT_NTSC,
76 TPG_PIXEL_ASPECT_PAL,
77};
78
79enum tpg_move_mode {
80 TPG_MOVE_NEG_FAST,
81 TPG_MOVE_NEG,
82 TPG_MOVE_NEG_SLOW,
83 TPG_MOVE_NONE,
84 TPG_MOVE_POS_SLOW,
85 TPG_MOVE_POS,
86 TPG_MOVE_POS_FAST,
87};
88
89extern const char * const tpg_aspect_strings[];
90
91#define TPG_MAX_PLANES 2
92#define TPG_MAX_PAT_LINES 8
93
94struct tpg_data {
95 /* Source frame size */
96 unsigned src_width, src_height;
97 /* Buffer height */
98 unsigned buf_height;
99 /* Scaled output frame size */
100 unsigned scaled_width;
101 u32 field;
102 /* crop coordinates are frame-based */
103 struct v4l2_rect crop;
104 /* compose coordinates are format-based */
105 struct v4l2_rect compose;
106 /* border and square coordinates are frame-based */
107 struct v4l2_rect border;
108 struct v4l2_rect square;
109
110 /* Color-related fields */
111 enum tpg_quality qual;
112 unsigned qual_offset;
113 u8 alpha_component;
114 bool alpha_red_only;
115 u8 brightness;
116 u8 contrast;
117 u8 saturation;
118 s16 hue;
119 u32 fourcc;
120 bool is_yuv;
121 u32 colorspace;
122 enum tpg_video_aspect vid_aspect;
123 enum tpg_pixel_aspect pix_aspect;
124 unsigned rgb_range;
125 unsigned real_rgb_range;
126 unsigned planes;
127 /* Used to store the colors in native format, either RGB or YUV */
128 u8 colors[TPG_COLOR_MAX][3];
129 u8 textfg[TPG_MAX_PLANES][8], textbg[TPG_MAX_PLANES][8];
130 /* size in bytes for two pixels in each plane */
131 unsigned twopixelsize[TPG_MAX_PLANES];
132 unsigned bytesperline[TPG_MAX_PLANES];
133
134 /* Configuration */
135 enum tpg_pattern pattern;
136 bool hflip;
137 bool vflip;
138 unsigned perc_fill;
139 bool perc_fill_blank;
140 bool show_border;
141 bool show_square;
142 bool insert_sav;
143 bool insert_eav;
144
145 /* Test pattern movement */
146 enum tpg_move_mode mv_hor_mode;
147 int mv_hor_count;
148 int mv_hor_step;
149 enum tpg_move_mode mv_vert_mode;
150 int mv_vert_count;
151 int mv_vert_step;
152
153 bool recalc_colors;
154 bool recalc_lines;
155 bool recalc_square_border;
156
157 /* Used to store TPG_MAX_PAT_LINES lines, each with up to two planes */
158 unsigned max_line_width;
159 u8 *lines[TPG_MAX_PAT_LINES][TPG_MAX_PLANES];
160 u8 *random_line[TPG_MAX_PLANES];
161 u8 *contrast_line[TPG_MAX_PLANES];
162 u8 *black_line[TPG_MAX_PLANES];
163};
164
165void tpg_init(struct tpg_data *tpg, unsigned w, unsigned h);
166int tpg_alloc(struct tpg_data *tpg, unsigned max_w);
167void tpg_free(struct tpg_data *tpg);
168void tpg_reset_source(struct tpg_data *tpg, unsigned width, unsigned height,
169 u32 field);
170
171void tpg_set_font(const u8 *f);
172void tpg_gen_text(struct tpg_data *tpg,
173 u8 *basep[TPG_MAX_PLANES][2], int y, int x, char *text);
174void tpg_calc_text_basep(struct tpg_data *tpg,
175 u8 *basep[TPG_MAX_PLANES][2], unsigned p, u8 *vbuf);
176void tpg_fillbuffer(struct tpg_data *tpg, v4l2_std_id std, unsigned p, u8 *vbuf);
177bool tpg_s_fourcc(struct tpg_data *tpg, u32 fourcc);
178void tpg_s_crop_compose(struct tpg_data *tpg, const struct v4l2_rect *crop,
179 const struct v4l2_rect *compose);
180
181static inline void tpg_s_pattern(struct tpg_data *tpg, enum tpg_pattern pattern)
182{
183 if (tpg->pattern == pattern)
184 return;
185 tpg->pattern = pattern;
186 tpg->recalc_colors = true;
187}
188
189static inline void tpg_s_quality(struct tpg_data *tpg,
190 enum tpg_quality qual, unsigned qual_offset)
191{
192 if (tpg->qual == qual && tpg->qual_offset == qual_offset)
193 return;
194 tpg->qual = qual;
195 tpg->qual_offset = qual_offset;
196 tpg->recalc_colors = true;
197}
198
199static inline enum tpg_quality tpg_g_quality(const struct tpg_data *tpg)
200{
201 return tpg->qual;
202}
203
204static inline void tpg_s_alpha_component(struct tpg_data *tpg,
205 u8 alpha_component)
206{
207 if (tpg->alpha_component == alpha_component)
208 return;
209 tpg->alpha_component = alpha_component;
210 tpg->recalc_colors = true;
211}
212
213static inline void tpg_s_alpha_mode(struct tpg_data *tpg,
214 bool red_only)
215{
216 if (tpg->alpha_red_only == red_only)
217 return;
218 tpg->alpha_red_only = red_only;
219 tpg->recalc_colors = true;
220}
221
222static inline void tpg_s_brightness(struct tpg_data *tpg,
223 u8 brightness)
224{
225 if (tpg->brightness == brightness)
226 return;
227 tpg->brightness = brightness;
228 tpg->recalc_colors = true;
229}
230
231static inline void tpg_s_contrast(struct tpg_data *tpg,
232 u8 contrast)
233{
234 if (tpg->contrast == contrast)
235 return;
236 tpg->contrast = contrast;
237 tpg->recalc_colors = true;
238}
239
240static inline void tpg_s_saturation(struct tpg_data *tpg,
241 u8 saturation)
242{
243 if (tpg->saturation == saturation)
244 return;
245 tpg->saturation = saturation;
246 tpg->recalc_colors = true;
247}
248
249static inline void tpg_s_hue(struct tpg_data *tpg,
250 s16 hue)
251{
252 if (tpg->hue == hue)
253 return;
254 tpg->hue = hue;
255 tpg->recalc_colors = true;
256}
257
258static inline void tpg_s_rgb_range(struct tpg_data *tpg,
259 unsigned rgb_range)
260{
261 if (tpg->rgb_range == rgb_range)
262 return;
263 tpg->rgb_range = rgb_range;
264 tpg->recalc_colors = true;
265}
266
267static inline void tpg_s_real_rgb_range(struct tpg_data *tpg,
268 unsigned rgb_range)
269{
270 if (tpg->real_rgb_range == rgb_range)
271 return;
272 tpg->real_rgb_range = rgb_range;
273 tpg->recalc_colors = true;
274}
275
276static inline void tpg_s_colorspace(struct tpg_data *tpg, u32 colorspace)
277{
278 if (tpg->colorspace == colorspace)
279 return;
280 tpg->colorspace = colorspace;
281 tpg->recalc_colors = true;
282}
283
284static inline u32 tpg_g_colorspace(const struct tpg_data *tpg)
285{
286 return tpg->colorspace;
287}
288
289static inline unsigned tpg_g_planes(const struct tpg_data *tpg)
290{
291 return tpg->planes;
292}
293
294static inline unsigned tpg_g_twopixelsize(const struct tpg_data *tpg, unsigned plane)
295{
296 return tpg->twopixelsize[plane];
297}
298
299static inline unsigned tpg_g_bytesperline(const struct tpg_data *tpg, unsigned plane)
300{
301 return tpg->bytesperline[plane];
302}
303
304static inline void tpg_s_bytesperline(struct tpg_data *tpg, unsigned plane, unsigned bpl)
305{
306 tpg->bytesperline[plane] = bpl;
307}
308
309static inline void tpg_s_buf_height(struct tpg_data *tpg, unsigned h)
310{
311 tpg->buf_height = h;
312}
313
314static inline void tpg_s_field(struct tpg_data *tpg, unsigned field)
315{
316 tpg->field = field;
317}
318
319static inline void tpg_s_perc_fill(struct tpg_data *tpg,
320 unsigned perc_fill)
321{
322 tpg->perc_fill = perc_fill;
323}
324
325static inline unsigned tpg_g_perc_fill(const struct tpg_data *tpg)
326{
327 return tpg->perc_fill;
328}
329
330static inline void tpg_s_perc_fill_blank(struct tpg_data *tpg,
331 bool perc_fill_blank)
332{
333 tpg->perc_fill_blank = perc_fill_blank;
334}
335
336static inline void tpg_s_video_aspect(struct tpg_data *tpg,
337 enum tpg_video_aspect vid_aspect)
338{
339 if (tpg->vid_aspect == vid_aspect)
340 return;
341 tpg->vid_aspect = vid_aspect;
342 tpg->recalc_square_border = true;
343}
344
345static inline enum tpg_video_aspect tpg_g_video_aspect(const struct tpg_data *tpg)
346{
347 return tpg->vid_aspect;
348}
349
350static inline void tpg_s_pixel_aspect(struct tpg_data *tpg,
351 enum tpg_pixel_aspect pix_aspect)
352{
353 if (tpg->pix_aspect == pix_aspect)
354 return;
355 tpg->pix_aspect = pix_aspect;
356 tpg->recalc_square_border = true;
357}
358
359static inline void tpg_s_show_border(struct tpg_data *tpg,
360 bool show_border)
361{
362 tpg->show_border = show_border;
363}
364
365static inline void tpg_s_show_square(struct tpg_data *tpg,
366 bool show_square)
367{
368 tpg->show_square = show_square;
369}
370
371static inline void tpg_s_insert_sav(struct tpg_data *tpg, bool insert_sav)
372{
373 tpg->insert_sav = insert_sav;
374}
375
376static inline void tpg_s_insert_eav(struct tpg_data *tpg, bool insert_eav)
377{
378 tpg->insert_eav = insert_eav;
379}
380
381void tpg_update_mv_step(struct tpg_data *tpg);
382
383static inline void tpg_s_mv_hor_mode(struct tpg_data *tpg,
384 enum tpg_move_mode mv_hor_mode)
385{
386 tpg->mv_hor_mode = mv_hor_mode;
387 tpg_update_mv_step(tpg);
388}
389
390static inline void tpg_s_mv_vert_mode(struct tpg_data *tpg,
391 enum tpg_move_mode mv_vert_mode)
392{
393 tpg->mv_vert_mode = mv_vert_mode;
394 tpg_update_mv_step(tpg);
395}
396
397static inline void tpg_init_mv_count(struct tpg_data *tpg)
398{
399 tpg->mv_hor_count = tpg->mv_vert_count = 0;
400}
401
402static inline void tpg_update_mv_count(struct tpg_data *tpg, bool frame_is_field)
403{
404 tpg->mv_hor_count += tpg->mv_hor_step * (frame_is_field ? 1 : 2);
405 tpg->mv_vert_count += tpg->mv_vert_step * (frame_is_field ? 1 : 2);
406}
407
408static inline void tpg_s_hflip(struct tpg_data *tpg, bool hflip)
409{
410 if (tpg->hflip == hflip)
411 return;
412 tpg->hflip = hflip;
413 tpg_update_mv_step(tpg);
414 tpg->recalc_lines = true;
415}
416
417static inline bool tpg_g_hflip(const struct tpg_data *tpg)
418{
419 return tpg->hflip;
420}
421
422static inline void tpg_s_vflip(struct tpg_data *tpg, bool vflip)
423{
424 tpg->vflip = vflip;
425}
426
427static inline bool tpg_g_vflip(const struct tpg_data *tpg)
428{
429 return tpg->vflip;
430}
431
432static inline bool tpg_pattern_is_static(const struct tpg_data *tpg)
433{
434 return tpg->pattern != TPG_PAT_NOISE &&
435 tpg->mv_hor_mode == TPG_MOVE_NONE &&
436 tpg->mv_vert_mode == TPG_MOVE_NONE;
437}
438
439#endif
diff --git a/drivers/media/platform/vivid/vivid-vbi-cap.c b/drivers/media/platform/vivid/vivid-vbi-cap.c
new file mode 100644
index 000000000000..2166d0bf6fe2
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-vbi-cap.c
@@ -0,0 +1,371 @@
1/*
2 * vivid-vbi-cap.c - vbi capture support functions.
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#include <linux/errno.h>
21#include <linux/kernel.h>
22#include <linux/videodev2.h>
23#include <media/v4l2-common.h>
24
25#include "vivid-core.h"
26#include "vivid-kthread-cap.h"
27#include "vivid-vbi-cap.h"
28#include "vivid-vbi-gen.h"
29
30static void vivid_sliced_vbi_cap_fill(struct vivid_dev *dev, unsigned seqnr)
31{
32 struct vivid_vbi_gen_data *vbi_gen = &dev->vbi_gen;
33 bool is_60hz = dev->std_cap & V4L2_STD_525_60;
34
35 vivid_vbi_gen_sliced(vbi_gen, is_60hz, seqnr);
36
37 if (!is_60hz) {
38 if (dev->loop_video) {
39 if (dev->vbi_out_have_wss) {
40 vbi_gen->data[12].data[0] = dev->vbi_out_wss[0];
41 vbi_gen->data[12].data[1] = dev->vbi_out_wss[1];
42 } else {
43 vbi_gen->data[12].id = 0;
44 }
45 } else {
46 switch (tpg_g_video_aspect(&dev->tpg)) {
47 case TPG_VIDEO_ASPECT_14X9_CENTRE:
48 vbi_gen->data[12].data[0] = 0x01;
49 break;
50 case TPG_VIDEO_ASPECT_16X9_CENTRE:
51 vbi_gen->data[12].data[0] = 0x0b;
52 break;
53 case TPG_VIDEO_ASPECT_16X9_ANAMORPHIC:
54 vbi_gen->data[12].data[0] = 0x07;
55 break;
56 case TPG_VIDEO_ASPECT_4X3:
57 default:
58 vbi_gen->data[12].data[0] = 0x08;
59 break;
60 }
61 }
62 } else if (dev->loop_video && is_60hz) {
63 if (dev->vbi_out_have_cc[0]) {
64 vbi_gen->data[0].data[0] = dev->vbi_out_cc[0][0];
65 vbi_gen->data[0].data[1] = dev->vbi_out_cc[0][1];
66 } else {
67 vbi_gen->data[0].id = 0;
68 }
69 if (dev->vbi_out_have_cc[1]) {
70 vbi_gen->data[1].data[0] = dev->vbi_out_cc[1][0];
71 vbi_gen->data[1].data[1] = dev->vbi_out_cc[1][1];
72 } else {
73 vbi_gen->data[1].id = 0;
74 }
75 }
76}
77
78static void vivid_g_fmt_vbi_cap(struct vivid_dev *dev, struct v4l2_vbi_format *vbi)
79{
80 bool is_60hz = dev->std_cap & V4L2_STD_525_60;
81
82 vbi->sampling_rate = 27000000;
83 vbi->offset = 24;
84 vbi->samples_per_line = 1440;
85 vbi->sample_format = V4L2_PIX_FMT_GREY;
86 vbi->start[0] = is_60hz ? V4L2_VBI_ITU_525_F1_START + 9 : V4L2_VBI_ITU_625_F1_START + 5;
87 vbi->start[1] = is_60hz ? V4L2_VBI_ITU_525_F2_START + 9 : V4L2_VBI_ITU_625_F2_START + 5;
88 vbi->count[0] = vbi->count[1] = is_60hz ? 12 : 18;
89 vbi->flags = dev->vbi_cap_interlaced ? V4L2_VBI_INTERLACED : 0;
90 vbi->reserved[0] = 0;
91 vbi->reserved[1] = 0;
92}
93
94void vivid_raw_vbi_cap_process(struct vivid_dev *dev, struct vivid_buffer *buf)
95{
96 struct v4l2_vbi_format vbi;
97 u8 *vbuf = vb2_plane_vaddr(&buf->vb, 0);
98
99 vivid_g_fmt_vbi_cap(dev, &vbi);
100 buf->vb.v4l2_buf.sequence = dev->vbi_cap_seq_count;
101 if (dev->field_cap == V4L2_FIELD_ALTERNATE)
102 buf->vb.v4l2_buf.sequence /= 2;
103
104 vivid_sliced_vbi_cap_fill(dev, buf->vb.v4l2_buf.sequence);
105
106 memset(vbuf, 0x10, vb2_plane_size(&buf->vb, 0));
107
108 if (!VIVID_INVALID_SIGNAL(dev->std_signal_mode))
109 vivid_vbi_gen_raw(&dev->vbi_gen, &vbi, vbuf);
110
111 v4l2_get_timestamp(&buf->vb.v4l2_buf.timestamp);
112 buf->vb.v4l2_buf.timestamp.tv_sec += dev->time_wrap_offset;
113}
114
115
116void vivid_sliced_vbi_cap_process(struct vivid_dev *dev, struct vivid_buffer *buf)
117{
118 struct v4l2_sliced_vbi_data *vbuf = vb2_plane_vaddr(&buf->vb, 0);
119
120 buf->vb.v4l2_buf.sequence = dev->vbi_cap_seq_count;
121 if (dev->field_cap == V4L2_FIELD_ALTERNATE)
122 buf->vb.v4l2_buf.sequence /= 2;
123
124 vivid_sliced_vbi_cap_fill(dev, buf->vb.v4l2_buf.sequence);
125
126 memset(vbuf, 0, vb2_plane_size(&buf->vb, 0));
127 if (!VIVID_INVALID_SIGNAL(dev->std_signal_mode)) {
128 unsigned i;
129
130 for (i = 0; i < 25; i++)
131 vbuf[i] = dev->vbi_gen.data[i];
132 }
133
134 v4l2_get_timestamp(&buf->vb.v4l2_buf.timestamp);
135 buf->vb.v4l2_buf.timestamp.tv_sec += dev->time_wrap_offset;
136}
137
138static int vbi_cap_queue_setup(struct vb2_queue *vq, const struct v4l2_format *fmt,
139 unsigned *nbuffers, unsigned *nplanes,
140 unsigned sizes[], void *alloc_ctxs[])
141{
142 struct vivid_dev *dev = vb2_get_drv_priv(vq);
143 bool is_60hz = dev->std_cap & V4L2_STD_525_60;
144 unsigned size = vq->type == V4L2_BUF_TYPE_SLICED_VBI_CAPTURE ?
145 36 * sizeof(struct v4l2_sliced_vbi_data) :
146 1440 * 2 * (is_60hz ? 12 : 18);
147
148 if (!vivid_is_sdtv_cap(dev))
149 return -EINVAL;
150
151 sizes[0] = size;
152
153 if (vq->num_buffers + *nbuffers < 2)
154 *nbuffers = 2 - vq->num_buffers;
155
156 *nplanes = 1;
157 return 0;
158}
159
160static int vbi_cap_buf_prepare(struct vb2_buffer *vb)
161{
162 struct vivid_dev *dev = vb2_get_drv_priv(vb->vb2_queue);
163 bool is_60hz = dev->std_cap & V4L2_STD_525_60;
164 unsigned size = vb->vb2_queue->type == V4L2_BUF_TYPE_SLICED_VBI_CAPTURE ?
165 36 * sizeof(struct v4l2_sliced_vbi_data) :
166 1440 * 2 * (is_60hz ? 12 : 18);
167
168 dprintk(dev, 1, "%s\n", __func__);
169
170 if (dev->buf_prepare_error) {
171 /*
172 * Error injection: test what happens if buf_prepare() returns
173 * an error.
174 */
175 dev->buf_prepare_error = false;
176 return -EINVAL;
177 }
178 if (vb2_plane_size(vb, 0) < size) {
179 dprintk(dev, 1, "%s data will not fit into plane (%lu < %u)\n",
180 __func__, vb2_plane_size(vb, 0), size);
181 return -EINVAL;
182 }
183 vb2_set_plane_payload(vb, 0, size);
184
185 return 0;
186}
187
188static void vbi_cap_buf_queue(struct vb2_buffer *vb)
189{
190 struct vivid_dev *dev = vb2_get_drv_priv(vb->vb2_queue);
191 struct vivid_buffer *buf = container_of(vb, struct vivid_buffer, vb);
192
193 dprintk(dev, 1, "%s\n", __func__);
194
195 spin_lock(&dev->slock);
196 list_add_tail(&buf->list, &dev->vbi_cap_active);
197 spin_unlock(&dev->slock);
198}
199
200static int vbi_cap_start_streaming(struct vb2_queue *vq, unsigned count)
201{
202 struct vivid_dev *dev = vb2_get_drv_priv(vq);
203 int err;
204
205 dprintk(dev, 1, "%s\n", __func__);
206 dev->vbi_cap_seq_count = 0;
207 if (dev->start_streaming_error) {
208 dev->start_streaming_error = false;
209 err = -EINVAL;
210 } else {
211 err = vivid_start_generating_vid_cap(dev, &dev->vbi_cap_streaming);
212 }
213 if (err) {
214 struct vivid_buffer *buf, *tmp;
215
216 list_for_each_entry_safe(buf, tmp, &dev->vbi_cap_active, list) {
217 list_del(&buf->list);
218 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_QUEUED);
219 }
220 }
221 return err;
222}
223
224/* abort streaming and wait for last buffer */
225static void vbi_cap_stop_streaming(struct vb2_queue *vq)
226{
227 struct vivid_dev *dev = vb2_get_drv_priv(vq);
228
229 dprintk(dev, 1, "%s\n", __func__);
230 vivid_stop_generating_vid_cap(dev, &dev->vbi_cap_streaming);
231}
232
233const struct vb2_ops vivid_vbi_cap_qops = {
234 .queue_setup = vbi_cap_queue_setup,
235 .buf_prepare = vbi_cap_buf_prepare,
236 .buf_queue = vbi_cap_buf_queue,
237 .start_streaming = vbi_cap_start_streaming,
238 .stop_streaming = vbi_cap_stop_streaming,
239 .wait_prepare = vivid_unlock,
240 .wait_finish = vivid_lock,
241};
242
243int vidioc_g_fmt_vbi_cap(struct file *file, void *priv,
244 struct v4l2_format *f)
245{
246 struct vivid_dev *dev = video_drvdata(file);
247 struct v4l2_vbi_format *vbi = &f->fmt.vbi;
248
249 if (!vivid_is_sdtv_cap(dev) || !dev->has_raw_vbi_cap)
250 return -EINVAL;
251
252 vivid_g_fmt_vbi_cap(dev, vbi);
253 return 0;
254}
255
256int vidioc_s_fmt_vbi_cap(struct file *file, void *priv,
257 struct v4l2_format *f)
258{
259 struct vivid_dev *dev = video_drvdata(file);
260 int ret = vidioc_g_fmt_vbi_cap(file, priv, f);
261
262 if (ret)
263 return ret;
264 if (dev->stream_sliced_vbi_cap && vb2_is_busy(&dev->vb_vbi_cap_q))
265 return -EBUSY;
266 dev->stream_sliced_vbi_cap = false;
267 dev->vbi_cap_dev.queue->type = V4L2_BUF_TYPE_VBI_CAPTURE;
268 return 0;
269}
270
271void vivid_fill_service_lines(struct v4l2_sliced_vbi_format *vbi, u32 service_set)
272{
273 vbi->io_size = sizeof(struct v4l2_sliced_vbi_data) * 36;
274 vbi->service_set = service_set;
275 memset(vbi->service_lines, 0, sizeof(vbi->service_lines));
276 memset(vbi->reserved, 0, sizeof(vbi->reserved));
277
278 if (vbi->service_set == 0)
279 return;
280
281 if (vbi->service_set & V4L2_SLICED_CAPTION_525) {
282 vbi->service_lines[0][21] = V4L2_SLICED_CAPTION_525;
283 vbi->service_lines[1][21] = V4L2_SLICED_CAPTION_525;
284 }
285 if (vbi->service_set & V4L2_SLICED_WSS_625) {
286 unsigned i;
287
288 for (i = 7; i <= 18; i++)
289 vbi->service_lines[0][i] =
290 vbi->service_lines[1][i] = V4L2_SLICED_TELETEXT_B;
291 vbi->service_lines[0][23] = V4L2_SLICED_WSS_625;
292 }
293}
294
295int vidioc_g_fmt_sliced_vbi_cap(struct file *file, void *fh, struct v4l2_format *fmt)
296{
297 struct vivid_dev *dev = video_drvdata(file);
298 struct v4l2_sliced_vbi_format *vbi = &fmt->fmt.sliced;
299
300 if (!vivid_is_sdtv_cap(dev) || !dev->has_sliced_vbi_cap)
301 return -EINVAL;
302
303 vivid_fill_service_lines(vbi, dev->service_set_cap);
304 return 0;
305}
306
307int vidioc_try_fmt_sliced_vbi_cap(struct file *file, void *fh, struct v4l2_format *fmt)
308{
309 struct vivid_dev *dev = video_drvdata(file);
310 struct v4l2_sliced_vbi_format *vbi = &fmt->fmt.sliced;
311 bool is_60hz = dev->std_cap & V4L2_STD_525_60;
312 u32 service_set = vbi->service_set;
313
314 if (!vivid_is_sdtv_cap(dev) || !dev->has_sliced_vbi_cap)
315 return -EINVAL;
316
317 service_set &= is_60hz ? V4L2_SLICED_CAPTION_525 :
318 V4L2_SLICED_WSS_625 | V4L2_SLICED_TELETEXT_B;
319 vivid_fill_service_lines(vbi, service_set);
320 return 0;
321}
322
323int vidioc_s_fmt_sliced_vbi_cap(struct file *file, void *fh, struct v4l2_format *fmt)
324{
325 struct vivid_dev *dev = video_drvdata(file);
326 struct v4l2_sliced_vbi_format *vbi = &fmt->fmt.sliced;
327 int ret = vidioc_try_fmt_sliced_vbi_cap(file, fh, fmt);
328
329 if (ret)
330 return ret;
331 if (!dev->stream_sliced_vbi_cap && vb2_is_busy(&dev->vb_vbi_cap_q))
332 return -EBUSY;
333 dev->service_set_cap = vbi->service_set;
334 dev->stream_sliced_vbi_cap = true;
335 dev->vbi_cap_dev.queue->type = V4L2_BUF_TYPE_SLICED_VBI_CAPTURE;
336 return 0;
337}
338
339int vidioc_g_sliced_vbi_cap(struct file *file, void *fh, struct v4l2_sliced_vbi_cap *cap)
340{
341 struct vivid_dev *dev = video_drvdata(file);
342 struct video_device *vdev = video_devdata(file);
343 bool is_60hz;
344
345 if (vdev->vfl_dir == VFL_DIR_RX) {
346 is_60hz = dev->std_cap & V4L2_STD_525_60;
347 if (!vivid_is_sdtv_cap(dev) || !dev->has_sliced_vbi_cap ||
348 cap->type != V4L2_BUF_TYPE_SLICED_VBI_CAPTURE)
349 return -EINVAL;
350 } else {
351 is_60hz = dev->std_out & V4L2_STD_525_60;
352 if (!vivid_is_svid_out(dev) || !dev->has_sliced_vbi_out ||
353 cap->type != V4L2_BUF_TYPE_SLICED_VBI_OUTPUT)
354 return -EINVAL;
355 }
356
357 cap->service_set = is_60hz ? V4L2_SLICED_CAPTION_525 :
358 V4L2_SLICED_WSS_625 | V4L2_SLICED_TELETEXT_B;
359 if (is_60hz) {
360 cap->service_lines[0][21] = V4L2_SLICED_CAPTION_525;
361 cap->service_lines[1][21] = V4L2_SLICED_CAPTION_525;
362 } else {
363 unsigned i;
364
365 for (i = 7; i <= 18; i++)
366 cap->service_lines[0][i] =
367 cap->service_lines[1][i] = V4L2_SLICED_TELETEXT_B;
368 cap->service_lines[0][23] = V4L2_SLICED_WSS_625;
369 }
370 return 0;
371}
diff --git a/drivers/media/platform/vivid/vivid-vbi-cap.h b/drivers/media/platform/vivid/vivid-vbi-cap.h
new file mode 100644
index 000000000000..2d8ea0bac743
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-vbi-cap.h
@@ -0,0 +1,40 @@
1/*
2 * vivid-vbi-cap.h - vbi capture support functions.
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#ifndef _VIVID_VBI_CAP_H_
21#define _VIVID_VBI_CAP_H_
22
23void vivid_fill_time_of_day_packet(u8 *packet);
24void vivid_raw_vbi_cap_process(struct vivid_dev *dev, struct vivid_buffer *buf);
25void vivid_sliced_vbi_cap_process(struct vivid_dev *dev, struct vivid_buffer *buf);
26void vivid_sliced_vbi_out_process(struct vivid_dev *dev, struct vivid_buffer *buf);
27int vidioc_g_fmt_vbi_cap(struct file *file, void *priv,
28 struct v4l2_format *f);
29int vidioc_s_fmt_vbi_cap(struct file *file, void *priv,
30 struct v4l2_format *f);
31int vidioc_g_fmt_sliced_vbi_cap(struct file *file, void *fh, struct v4l2_format *fmt);
32int vidioc_try_fmt_sliced_vbi_cap(struct file *file, void *fh, struct v4l2_format *fmt);
33int vidioc_s_fmt_sliced_vbi_cap(struct file *file, void *fh, struct v4l2_format *fmt);
34int vidioc_g_sliced_vbi_cap(struct file *file, void *fh, struct v4l2_sliced_vbi_cap *cap);
35
36void vivid_fill_service_lines(struct v4l2_sliced_vbi_format *vbi, u32 service_set);
37
38extern const struct vb2_ops vivid_vbi_cap_qops;
39
40#endif
diff --git a/drivers/media/platform/vivid/vivid-vbi-gen.c b/drivers/media/platform/vivid/vivid-vbi-gen.c
new file mode 100644
index 000000000000..a2159de83d0b
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-vbi-gen.c
@@ -0,0 +1,323 @@
1/*
2 * vivid-vbi-gen.c - vbi generator support functions.
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#include <linux/errno.h>
21#include <linux/kernel.h>
22#include <linux/ktime.h>
23#include <linux/string.h>
24#include <linux/videodev2.h>
25
26#include "vivid-vbi-gen.h"
27
28static void wss_insert(u8 *wss, u32 val, unsigned size)
29{
30 while (size--)
31 *wss++ = (val & (1 << size)) ? 0xc0 : 0x10;
32}
33
34static void vivid_vbi_gen_wss_raw(const struct v4l2_sliced_vbi_data *data,
35 u8 *buf, unsigned sampling_rate)
36{
37 const unsigned rate = 5000000; /* WSS has a 5 MHz transmission rate */
38 u8 wss[29 + 24 + 24 + 24 + 18 + 18] = { 0 };
39 const unsigned zero = 0x07;
40 const unsigned one = 0x38;
41 unsigned bit = 0;
42 u16 wss_data;
43 int i;
44
45 wss_insert(wss + bit, 0x1f1c71c7, 29); bit += 29;
46 wss_insert(wss + bit, 0x1e3c1f, 24); bit += 24;
47
48 wss_data = (data->data[1] << 8) | data->data[0];
49 for (i = 0; i <= 13; i++, bit += 6)
50 wss_insert(wss + bit, (wss_data & (1 << i)) ? one : zero, 6);
51
52 for (i = 0, bit = 0; bit < sizeof(wss); bit++) {
53 unsigned n = ((bit + 1) * sampling_rate) / rate;
54
55 while (i < n)
56 buf[i++] = wss[bit];
57 }
58}
59
60static void vivid_vbi_gen_teletext_raw(const struct v4l2_sliced_vbi_data *data,
61 u8 *buf, unsigned sampling_rate)
62{
63 const unsigned rate = 6937500 / 10; /* Teletext has a 6.9375 MHz transmission rate */
64 u8 teletext[45] = { 0x55, 0x55, 0x27 };
65 unsigned bit = 0;
66 int i;
67
68 memcpy(teletext + 3, data->data, sizeof(teletext) - 3);
69 /* prevents 32 bit overflow */
70 sampling_rate /= 10;
71
72 for (i = 0, bit = 0; bit < sizeof(teletext) * 8; bit++) {
73 unsigned n = ((bit + 1) * sampling_rate) / rate;
74 u8 val = (teletext[bit / 8] & (1 << (bit & 7))) ? 0xc0 : 0x10;
75
76 while (i < n)
77 buf[i++] = val;
78 }
79}
80
81static void cc_insert(u8 *cc, u8 ch)
82{
83 unsigned tot = 0;
84 unsigned i;
85
86 for (i = 0; i < 7; i++) {
87 cc[2 * i] = cc[2 * i + 1] = (ch & (1 << i)) ? 1 : 0;
88 tot += cc[2 * i];
89 }
90 cc[14] = cc[15] = !(tot & 1);
91}
92
93#define CC_PREAMBLE_BITS (14 + 4 + 2)
94
95static void vivid_vbi_gen_cc_raw(const struct v4l2_sliced_vbi_data *data,
96 u8 *buf, unsigned sampling_rate)
97{
98 const unsigned rate = 1000000; /* CC has a 1 MHz transmission rate */
99
100 u8 cc[CC_PREAMBLE_BITS + 2 * 16] = {
101 /* Clock run-in: 7 cycles */
102 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
103 /* 2 cycles of 0 */
104 0, 0, 0, 0,
105 /* Start bit of 1 (each bit is two cycles) */
106 1, 1
107 };
108 unsigned bit, i;
109
110 cc_insert(cc + CC_PREAMBLE_BITS, data->data[0]);
111 cc_insert(cc + CC_PREAMBLE_BITS + 16, data->data[1]);
112
113 for (i = 0, bit = 0; bit < sizeof(cc); bit++) {
114 unsigned n = ((bit + 1) * sampling_rate) / rate;
115
116 while (i < n)
117 buf[i++] = cc[bit] ? 0xc0 : 0x10;
118 }
119}
120
121void vivid_vbi_gen_raw(const struct vivid_vbi_gen_data *vbi,
122 const struct v4l2_vbi_format *vbi_fmt, u8 *buf)
123{
124 unsigned idx;
125
126 for (idx = 0; idx < 25; idx++) {
127 const struct v4l2_sliced_vbi_data *data = vbi->data + idx;
128 unsigned start_2nd_field;
129 unsigned line = data->line;
130 u8 *linebuf = buf;
131
132 start_2nd_field = (data->id & V4L2_SLICED_VBI_525) ? 263 : 313;
133 if (data->field)
134 line += start_2nd_field;
135 line -= vbi_fmt->start[data->field];
136
137 if (vbi_fmt->flags & V4L2_VBI_INTERLACED)
138 linebuf += (line * 2 + data->field) *
139 vbi_fmt->samples_per_line;
140 else
141 linebuf += (line + data->field * vbi_fmt->count[0]) *
142 vbi_fmt->samples_per_line;
143 if (data->id == V4L2_SLICED_CAPTION_525)
144 vivid_vbi_gen_cc_raw(data, linebuf, vbi_fmt->sampling_rate);
145 else if (data->id == V4L2_SLICED_WSS_625)
146 vivid_vbi_gen_wss_raw(data, linebuf, vbi_fmt->sampling_rate);
147 else if (data->id == V4L2_SLICED_TELETEXT_B)
148 vivid_vbi_gen_teletext_raw(data, linebuf, vbi_fmt->sampling_rate);
149 }
150}
151
152static const u8 vivid_cc_sequence1[30] = {
153 0x14, 0x20, /* Resume Caption Loading */
154 'H', 'e',
155 'l', 'l',
156 'o', ' ',
157 'w', 'o',
158 'r', 'l',
159 'd', '!',
160 0x14, 0x2f, /* End of Caption */
161};
162
163static const u8 vivid_cc_sequence2[30] = {
164 0x14, 0x20, /* Resume Caption Loading */
165 'C', 'l',
166 'o', 's',
167 'e', 'd',
168 ' ', 'c',
169 'a', 'p',
170 't', 'i',
171 'o', 'n',
172 's', ' ',
173 't', 'e',
174 's', 't',
175 0x14, 0x2f, /* End of Caption */
176};
177
178static u8 calc_parity(u8 val)
179{
180 unsigned i;
181 unsigned tot = 0;
182
183 for (i = 0; i < 7; i++)
184 tot += (val & (1 << i)) ? 1 : 0;
185 return val | ((tot & 1) ? 0 : 0x80);
186}
187
188static void vivid_vbi_gen_set_time_of_day(u8 *packet)
189{
190 struct tm tm;
191 u8 checksum, i;
192
193 time_to_tm(get_seconds(), 0, &tm);
194 packet[0] = calc_parity(0x07);
195 packet[1] = calc_parity(0x01);
196 packet[2] = calc_parity(0x40 | tm.tm_min);
197 packet[3] = calc_parity(0x40 | tm.tm_hour);
198 packet[4] = calc_parity(0x40 | tm.tm_mday);
199 if (tm.tm_mday == 1 && tm.tm_mon == 2 &&
200 sys_tz.tz_minuteswest > tm.tm_min + tm.tm_hour * 60)
201 packet[4] = calc_parity(0x60 | tm.tm_mday);
202 packet[5] = calc_parity(0x40 | (1 + tm.tm_mon));
203 packet[6] = calc_parity(0x40 | (1 + tm.tm_wday));
204 packet[7] = calc_parity(0x40 | ((tm.tm_year - 90) & 0x3f));
205 packet[8] = calc_parity(0x0f);
206 for (checksum = i = 0; i <= 8; i++)
207 checksum += packet[i] & 0x7f;
208 packet[9] = calc_parity(0x100 - checksum);
209 checksum = 0;
210 packet[10] = calc_parity(0x07);
211 packet[11] = calc_parity(0x04);
212 if (sys_tz.tz_minuteswest >= 0)
213 packet[12] = calc_parity(0x40 | ((sys_tz.tz_minuteswest / 60) & 0x1f));
214 else
215 packet[12] = calc_parity(0x40 | ((24 + sys_tz.tz_minuteswest / 60) & 0x1f));
216 packet[13] = calc_parity(0);
217 packet[14] = calc_parity(0x0f);
218 for (checksum = 0, i = 10; i <= 14; i++)
219 checksum += packet[i] & 0x7f;
220 packet[15] = calc_parity(0x100 - checksum);
221}
222
223static const u8 hamming[16] = {
224 0x15, 0x02, 0x49, 0x5e, 0x64, 0x73, 0x38, 0x2f,
225 0xd0, 0xc7, 0x8c, 0x9b, 0xa1, 0xb6, 0xfd, 0xea
226};
227
228static void vivid_vbi_gen_teletext(u8 *packet, unsigned line, unsigned frame)
229{
230 unsigned offset = 2;
231 unsigned i;
232
233 packet[0] = hamming[1 + ((line & 1) << 3)];
234 packet[1] = hamming[line >> 1];
235 memset(packet + 2, 0x20, 40);
236 if (line == 0) {
237 /* subcode */
238 packet[2] = hamming[frame % 10];
239 packet[3] = hamming[frame / 10];
240 packet[4] = hamming[0];
241 packet[5] = hamming[0];
242 packet[6] = hamming[0];
243 packet[7] = hamming[0];
244 packet[8] = hamming[0];
245 packet[9] = hamming[1];
246 offset = 10;
247 }
248 packet += offset;
249 memcpy(packet, "Page: 100 Row: 10", 17);
250 packet[7] = '0' + frame / 10;
251 packet[8] = '0' + frame % 10;
252 packet[15] = '0' + line / 10;
253 packet[16] = '0' + line % 10;
254 for (i = 0; i < 42 - offset; i++)
255 packet[i] = calc_parity(packet[i]);
256}
257
258void vivid_vbi_gen_sliced(struct vivid_vbi_gen_data *vbi,
259 bool is_60hz, unsigned seqnr)
260{
261 struct v4l2_sliced_vbi_data *data0 = vbi->data;
262 struct v4l2_sliced_vbi_data *data1 = vbi->data + 1;
263 unsigned frame = seqnr % 60;
264
265 memset(vbi->data, 0, sizeof(vbi->data));
266
267 if (!is_60hz) {
268 unsigned i;
269
270 for (i = 0; i <= 11; i++) {
271 data0->id = V4L2_SLICED_TELETEXT_B;
272 data0->line = 7 + i;
273 vivid_vbi_gen_teletext(data0->data, i, frame);
274 data0++;
275 }
276 data0->id = V4L2_SLICED_WSS_625;
277 data0->line = 23;
278 /* 4x3 video aspect ratio */
279 data0->data[0] = 0x08;
280 data0++;
281 for (i = 0; i <= 11; i++) {
282 data0->id = V4L2_SLICED_TELETEXT_B;
283 data0->field = 1;
284 data0->line = 7 + i;
285 vivid_vbi_gen_teletext(data0->data, 12 + i, frame);
286 data0++;
287 }
288 return;
289 }
290
291 data0->id = V4L2_SLICED_CAPTION_525;
292 data0->line = 21;
293 data1->id = V4L2_SLICED_CAPTION_525;
294 data1->field = 1;
295 data1->line = 21;
296
297 if (frame < 15) {
298 data0->data[0] = calc_parity(vivid_cc_sequence1[2 * frame]);
299 data0->data[1] = calc_parity(vivid_cc_sequence1[2 * frame + 1]);
300 } else if (frame >= 30 && frame < 45) {
301 frame -= 30;
302 data0->data[0] = calc_parity(vivid_cc_sequence2[2 * frame]);
303 data0->data[1] = calc_parity(vivid_cc_sequence2[2 * frame + 1]);
304 } else {
305 data0->data[0] = calc_parity(0);
306 data0->data[1] = calc_parity(0);
307 }
308
309 frame = seqnr % (30 * 60);
310 switch (frame) {
311 case 0:
312 vivid_vbi_gen_set_time_of_day(vbi->time_of_day_packet);
313 /* fall through */
314 case 1 ... 7:
315 data1->data[0] = vbi->time_of_day_packet[frame * 2];
316 data1->data[1] = vbi->time_of_day_packet[frame * 2 + 1];
317 break;
318 default:
319 data1->data[0] = calc_parity(0);
320 data1->data[1] = calc_parity(0);
321 break;
322 }
323}
diff --git a/drivers/media/platform/vivid/vivid-vbi-gen.h b/drivers/media/platform/vivid/vivid-vbi-gen.h
new file mode 100644
index 000000000000..8444abe905ea
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-vbi-gen.h
@@ -0,0 +1,33 @@
1/*
2 * vivid-vbi-gen.h - vbi generator support functions.
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#ifndef _VIVID_VBI_GEN_H_
21#define _VIVID_VBI_GEN_H_
22
23struct vivid_vbi_gen_data {
24 struct v4l2_sliced_vbi_data data[25];
25 u8 time_of_day_packet[16];
26};
27
28void vivid_vbi_gen_sliced(struct vivid_vbi_gen_data *vbi,
29 bool is_60hz, unsigned seqnr);
30void vivid_vbi_gen_raw(const struct vivid_vbi_gen_data *vbi,
31 const struct v4l2_vbi_format *vbi_fmt, u8 *buf);
32
33#endif
diff --git a/drivers/media/platform/vivid/vivid-vbi-out.c b/drivers/media/platform/vivid/vivid-vbi-out.c
new file mode 100644
index 000000000000..9d00a07ecdcd
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-vbi-out.c
@@ -0,0 +1,248 @@
1/*
2 * vivid-vbi-out.c - vbi output support functions.
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#include <linux/errno.h>
21#include <linux/kernel.h>
22#include <linux/videodev2.h>
23#include <media/v4l2-common.h>
24
25#include "vivid-core.h"
26#include "vivid-kthread-out.h"
27#include "vivid-vbi-out.h"
28#include "vivid-vbi-cap.h"
29
30static int vbi_out_queue_setup(struct vb2_queue *vq, const struct v4l2_format *fmt,
31 unsigned *nbuffers, unsigned *nplanes,
32 unsigned sizes[], void *alloc_ctxs[])
33{
34 struct vivid_dev *dev = vb2_get_drv_priv(vq);
35 bool is_60hz = dev->std_out & V4L2_STD_525_60;
36 unsigned size = vq->type == V4L2_BUF_TYPE_SLICED_VBI_OUTPUT ?
37 36 * sizeof(struct v4l2_sliced_vbi_data) :
38 1440 * 2 * (is_60hz ? 12 : 18);
39
40 if (!vivid_is_svid_out(dev))
41 return -EINVAL;
42
43 sizes[0] = size;
44
45 if (vq->num_buffers + *nbuffers < 2)
46 *nbuffers = 2 - vq->num_buffers;
47
48 *nplanes = 1;
49 return 0;
50}
51
52static int vbi_out_buf_prepare(struct vb2_buffer *vb)
53{
54 struct vivid_dev *dev = vb2_get_drv_priv(vb->vb2_queue);
55 bool is_60hz = dev->std_out & V4L2_STD_525_60;
56 unsigned size = vb->vb2_queue->type == V4L2_BUF_TYPE_SLICED_VBI_OUTPUT ?
57 36 * sizeof(struct v4l2_sliced_vbi_data) :
58 1440 * 2 * (is_60hz ? 12 : 18);
59
60 dprintk(dev, 1, "%s\n", __func__);
61
62 if (dev->buf_prepare_error) {
63 /*
64 * Error injection: test what happens if buf_prepare() returns
65 * an error.
66 */
67 dev->buf_prepare_error = false;
68 return -EINVAL;
69 }
70 if (vb2_plane_size(vb, 0) < size) {
71 dprintk(dev, 1, "%s data will not fit into plane (%lu < %u)\n",
72 __func__, vb2_plane_size(vb, 0), size);
73 return -EINVAL;
74 }
75 vb2_set_plane_payload(vb, 0, size);
76
77 return 0;
78}
79
80static void vbi_out_buf_queue(struct vb2_buffer *vb)
81{
82 struct vivid_dev *dev = vb2_get_drv_priv(vb->vb2_queue);
83 struct vivid_buffer *buf = container_of(vb, struct vivid_buffer, vb);
84
85 dprintk(dev, 1, "%s\n", __func__);
86
87 spin_lock(&dev->slock);
88 list_add_tail(&buf->list, &dev->vbi_out_active);
89 spin_unlock(&dev->slock);
90}
91
92static int vbi_out_start_streaming(struct vb2_queue *vq, unsigned count)
93{
94 struct vivid_dev *dev = vb2_get_drv_priv(vq);
95 int err;
96
97 dprintk(dev, 1, "%s\n", __func__);
98 dev->vbi_out_seq_count = 0;
99 if (dev->start_streaming_error) {
100 dev->start_streaming_error = false;
101 err = -EINVAL;
102 } else {
103 err = vivid_start_generating_vid_out(dev, &dev->vbi_out_streaming);
104 }
105 if (err) {
106 struct vivid_buffer *buf, *tmp;
107
108 list_for_each_entry_safe(buf, tmp, &dev->vbi_out_active, list) {
109 list_del(&buf->list);
110 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_QUEUED);
111 }
112 }
113 return err;
114}
115
116/* abort streaming and wait for last buffer */
117static void vbi_out_stop_streaming(struct vb2_queue *vq)
118{
119 struct vivid_dev *dev = vb2_get_drv_priv(vq);
120
121 dprintk(dev, 1, "%s\n", __func__);
122 vivid_stop_generating_vid_out(dev, &dev->vbi_out_streaming);
123 dev->vbi_out_have_wss = false;
124 dev->vbi_out_have_cc[0] = false;
125 dev->vbi_out_have_cc[1] = false;
126}
127
128const struct vb2_ops vivid_vbi_out_qops = {
129 .queue_setup = vbi_out_queue_setup,
130 .buf_prepare = vbi_out_buf_prepare,
131 .buf_queue = vbi_out_buf_queue,
132 .start_streaming = vbi_out_start_streaming,
133 .stop_streaming = vbi_out_stop_streaming,
134 .wait_prepare = vivid_unlock,
135 .wait_finish = vivid_lock,
136};
137
138int vidioc_g_fmt_vbi_out(struct file *file, void *priv,
139 struct v4l2_format *f)
140{
141 struct vivid_dev *dev = video_drvdata(file);
142 struct v4l2_vbi_format *vbi = &f->fmt.vbi;
143 bool is_60hz = dev->std_out & V4L2_STD_525_60;
144
145 if (!vivid_is_svid_out(dev) || !dev->has_raw_vbi_out)
146 return -EINVAL;
147
148 vbi->sampling_rate = 25000000;
149 vbi->offset = 24;
150 vbi->samples_per_line = 1440;
151 vbi->sample_format = V4L2_PIX_FMT_GREY;
152 vbi->start[0] = is_60hz ? V4L2_VBI_ITU_525_F1_START + 9 : V4L2_VBI_ITU_625_F1_START + 5;
153 vbi->start[1] = is_60hz ? V4L2_VBI_ITU_525_F2_START + 9 : V4L2_VBI_ITU_625_F2_START + 5;
154 vbi->count[0] = vbi->count[1] = is_60hz ? 12 : 18;
155 vbi->flags = dev->vbi_cap_interlaced ? V4L2_VBI_INTERLACED : 0;
156 vbi->reserved[0] = 0;
157 vbi->reserved[1] = 0;
158 return 0;
159}
160
161int vidioc_s_fmt_vbi_out(struct file *file, void *priv,
162 struct v4l2_format *f)
163{
164 struct vivid_dev *dev = video_drvdata(file);
165 int ret = vidioc_g_fmt_vbi_out(file, priv, f);
166
167 if (ret)
168 return ret;
169 if (vb2_is_busy(&dev->vb_vbi_out_q))
170 return -EBUSY;
171 dev->stream_sliced_vbi_out = false;
172 dev->vbi_out_dev.queue->type = V4L2_BUF_TYPE_VBI_OUTPUT;
173 return 0;
174}
175
176int vidioc_g_fmt_sliced_vbi_out(struct file *file, void *fh, struct v4l2_format *fmt)
177{
178 struct vivid_dev *dev = video_drvdata(file);
179 struct v4l2_sliced_vbi_format *vbi = &fmt->fmt.sliced;
180
181 if (!vivid_is_svid_out(dev) || !dev->has_sliced_vbi_out)
182 return -EINVAL;
183
184 vivid_fill_service_lines(vbi, dev->service_set_out);
185 return 0;
186}
187
188int vidioc_try_fmt_sliced_vbi_out(struct file *file, void *fh, struct v4l2_format *fmt)
189{
190 struct vivid_dev *dev = video_drvdata(file);
191 struct v4l2_sliced_vbi_format *vbi = &fmt->fmt.sliced;
192 bool is_60hz = dev->std_out & V4L2_STD_525_60;
193 u32 service_set = vbi->service_set;
194
195 if (!vivid_is_svid_out(dev) || !dev->has_sliced_vbi_out)
196 return -EINVAL;
197
198 service_set &= is_60hz ? V4L2_SLICED_CAPTION_525 :
199 V4L2_SLICED_WSS_625 | V4L2_SLICED_TELETEXT_B;
200 vivid_fill_service_lines(vbi, service_set);
201 return 0;
202}
203
204int vidioc_s_fmt_sliced_vbi_out(struct file *file, void *fh, struct v4l2_format *fmt)
205{
206 struct vivid_dev *dev = video_drvdata(file);
207 struct v4l2_sliced_vbi_format *vbi = &fmt->fmt.sliced;
208 int ret = vidioc_try_fmt_sliced_vbi_out(file, fh, fmt);
209
210 if (ret)
211 return ret;
212 if (vb2_is_busy(&dev->vb_vbi_out_q))
213 return -EBUSY;
214 dev->service_set_out = vbi->service_set;
215 dev->stream_sliced_vbi_out = true;
216 dev->vbi_out_dev.queue->type = V4L2_BUF_TYPE_SLICED_VBI_OUTPUT;
217 return 0;
218}
219
220void vivid_sliced_vbi_out_process(struct vivid_dev *dev, struct vivid_buffer *buf)
221{
222 struct v4l2_sliced_vbi_data *vbi = vb2_plane_vaddr(&buf->vb, 0);
223 unsigned elems = vb2_get_plane_payload(&buf->vb, 0) / sizeof(*vbi);
224
225 dev->vbi_out_have_cc[0] = false;
226 dev->vbi_out_have_cc[1] = false;
227 dev->vbi_out_have_wss = false;
228 while (elems--) {
229 switch (vbi->id) {
230 case V4L2_SLICED_CAPTION_525:
231 if ((dev->std_out & V4L2_STD_525_60) && vbi->line == 21) {
232 dev->vbi_out_have_cc[!!vbi->field] = true;
233 dev->vbi_out_cc[!!vbi->field][0] = vbi->data[0];
234 dev->vbi_out_cc[!!vbi->field][1] = vbi->data[1];
235 }
236 break;
237 case V4L2_SLICED_WSS_625:
238 if ((dev->std_out & V4L2_STD_625_50) &&
239 vbi->field == 0 && vbi->line == 23) {
240 dev->vbi_out_have_wss = true;
241 dev->vbi_out_wss[0] = vbi->data[0];
242 dev->vbi_out_wss[1] = vbi->data[1];
243 }
244 break;
245 }
246 vbi++;
247 }
248}
diff --git a/drivers/media/platform/vivid/vivid-vbi-out.h b/drivers/media/platform/vivid/vivid-vbi-out.h
new file mode 100644
index 000000000000..6555ba9d2860
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-vbi-out.h
@@ -0,0 +1,34 @@
1/*
2 * vivid-vbi-out.h - vbi output support functions.
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#ifndef _VIVID_VBI_OUT_H_
21#define _VIVID_VBI_OUT_H_
22
23void vivid_sliced_vbi_out_process(struct vivid_dev *dev, struct vivid_buffer *buf);
24int vidioc_g_fmt_vbi_out(struct file *file, void *priv,
25 struct v4l2_format *f);
26int vidioc_s_fmt_vbi_out(struct file *file, void *priv,
27 struct v4l2_format *f);
28int vidioc_g_fmt_sliced_vbi_out(struct file *file, void *fh, struct v4l2_format *fmt);
29int vidioc_try_fmt_sliced_vbi_out(struct file *file, void *fh, struct v4l2_format *fmt);
30int vidioc_s_fmt_sliced_vbi_out(struct file *file, void *fh, struct v4l2_format *fmt);
31
32extern const struct vb2_ops vivid_vbi_out_qops;
33
34#endif
diff --git a/drivers/media/platform/vivid/vivid-vid-cap.c b/drivers/media/platform/vivid/vivid-vid-cap.c
new file mode 100644
index 000000000000..331c54429b40
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-vid-cap.c
@@ -0,0 +1,1730 @@
1/*
2 * vivid-vid-cap.c - video capture support functions.
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#include <linux/errno.h>
21#include <linux/kernel.h>
22#include <linux/sched.h>
23#include <linux/vmalloc.h>
24#include <linux/videodev2.h>
25#include <linux/v4l2-dv-timings.h>
26#include <media/v4l2-common.h>
27#include <media/v4l2-event.h>
28#include <media/v4l2-dv-timings.h>
29
30#include "vivid-core.h"
31#include "vivid-vid-common.h"
32#include "vivid-kthread-cap.h"
33#include "vivid-vid-cap.h"
34
35/* timeperframe: min/max and default */
36static const struct v4l2_fract
37 tpf_min = {.numerator = 1, .denominator = FPS_MAX},
38 tpf_max = {.numerator = FPS_MAX, .denominator = 1},
39 tpf_default = {.numerator = 1, .denominator = 30};
40
41static const struct vivid_fmt formats_ovl[] = {
42 {
43 .name = "RGB565 (LE)",
44 .fourcc = V4L2_PIX_FMT_RGB565, /* gggbbbbb rrrrrggg */
45 .depth = 16,
46 .planes = 1,
47 },
48 {
49 .name = "XRGB555 (LE)",
50 .fourcc = V4L2_PIX_FMT_XRGB555, /* gggbbbbb arrrrrgg */
51 .depth = 16,
52 .planes = 1,
53 },
54 {
55 .name = "ARGB555 (LE)",
56 .fourcc = V4L2_PIX_FMT_ARGB555, /* gggbbbbb arrrrrgg */
57 .depth = 16,
58 .planes = 1,
59 },
60};
61
62/* The number of discrete webcam framesizes */
63#define VIVID_WEBCAM_SIZES 3
64/* The number of discrete webcam frameintervals */
65#define VIVID_WEBCAM_IVALS (VIVID_WEBCAM_SIZES * 2)
66
67/* Sizes must be in increasing order */
68static const struct v4l2_frmsize_discrete webcam_sizes[VIVID_WEBCAM_SIZES] = {
69 { 320, 180 },
70 { 640, 360 },
71 { 1280, 720 },
72};
73
74/*
75 * Intervals must be in increasing order and there must be twice as many
76 * elements in this array as there are in webcam_sizes.
77 */
78static const struct v4l2_fract webcam_intervals[VIVID_WEBCAM_IVALS] = {
79 { 1, 10 },
80 { 1, 15 },
81 { 1, 25 },
82 { 1, 30 },
83 { 1, 50 },
84 { 1, 60 },
85};
86
87static const struct v4l2_discrete_probe webcam_probe = {
88 webcam_sizes,
89 VIVID_WEBCAM_SIZES
90};
91
92static int vid_cap_queue_setup(struct vb2_queue *vq, const struct v4l2_format *fmt,
93 unsigned *nbuffers, unsigned *nplanes,
94 unsigned sizes[], void *alloc_ctxs[])
95{
96 struct vivid_dev *dev = vb2_get_drv_priv(vq);
97 unsigned planes = tpg_g_planes(&dev->tpg);
98 unsigned h = dev->fmt_cap_rect.height;
99 unsigned p;
100
101 if (dev->field_cap == V4L2_FIELD_ALTERNATE) {
102 /*
103 * You cannot use read() with FIELD_ALTERNATE since the field
104 * information (TOP/BOTTOM) cannot be passed back to the user.
105 */
106 if (vb2_fileio_is_active(vq))
107 return -EINVAL;
108 }
109
110 if (dev->queue_setup_error) {
111 /*
112 * Error injection: test what happens if queue_setup() returns
113 * an error.
114 */
115 dev->queue_setup_error = false;
116 return -EINVAL;
117 }
118 if (fmt) {
119 const struct v4l2_pix_format_mplane *mp;
120 struct v4l2_format mp_fmt;
121 const struct vivid_fmt *vfmt;
122
123 if (!V4L2_TYPE_IS_MULTIPLANAR(fmt->type)) {
124 fmt_sp2mp(fmt, &mp_fmt);
125 fmt = &mp_fmt;
126 }
127 mp = &fmt->fmt.pix_mp;
128 /*
129 * Check if the number of planes in the specified format match
130 * the number of planes in the current format. You can't mix that.
131 */
132 if (mp->num_planes != planes)
133 return -EINVAL;
134 vfmt = vivid_get_format(dev, mp->pixelformat);
135 for (p = 0; p < planes; p++) {
136 sizes[p] = mp->plane_fmt[p].sizeimage;
137 if (sizes[0] < tpg_g_bytesperline(&dev->tpg, 0) * h +
138 vfmt->data_offset[p])
139 return -EINVAL;
140 }
141 } else {
142 for (p = 0; p < planes; p++)
143 sizes[p] = tpg_g_bytesperline(&dev->tpg, p) * h +
144 dev->fmt_cap->data_offset[p];
145 }
146
147 if (vq->num_buffers + *nbuffers < 2)
148 *nbuffers = 2 - vq->num_buffers;
149
150 *nplanes = planes;
151
152 /*
153 * videobuf2-vmalloc allocator is context-less so no need to set
154 * alloc_ctxs array.
155 */
156
157 if (planes == 2)
158 dprintk(dev, 1, "%s, count=%d, sizes=%u, %u\n", __func__,
159 *nbuffers, sizes[0], sizes[1]);
160 else
161 dprintk(dev, 1, "%s, count=%d, size=%u\n", __func__,
162 *nbuffers, sizes[0]);
163
164 return 0;
165}
166
167static int vid_cap_buf_prepare(struct vb2_buffer *vb)
168{
169 struct vivid_dev *dev = vb2_get_drv_priv(vb->vb2_queue);
170 unsigned long size;
171 unsigned planes = tpg_g_planes(&dev->tpg);
172 unsigned p;
173
174 dprintk(dev, 1, "%s\n", __func__);
175
176 if (WARN_ON(NULL == dev->fmt_cap))
177 return -EINVAL;
178
179 if (dev->buf_prepare_error) {
180 /*
181 * Error injection: test what happens if buf_prepare() returns
182 * an error.
183 */
184 dev->buf_prepare_error = false;
185 return -EINVAL;
186 }
187 for (p = 0; p < planes; p++) {
188 size = tpg_g_bytesperline(&dev->tpg, p) * dev->fmt_cap_rect.height +
189 dev->fmt_cap->data_offset[p];
190
191 if (vb2_plane_size(vb, 0) < size) {
192 dprintk(dev, 1, "%s data will not fit into plane %u (%lu < %lu)\n",
193 __func__, p, vb2_plane_size(vb, 0), size);
194 return -EINVAL;
195 }
196
197 vb2_set_plane_payload(vb, p, size);
198 vb->v4l2_planes[p].data_offset = dev->fmt_cap->data_offset[p];
199 }
200
201 return 0;
202}
203
204static void vid_cap_buf_finish(struct vb2_buffer *vb)
205{
206 struct vivid_dev *dev = vb2_get_drv_priv(vb->vb2_queue);
207 struct v4l2_timecode *tc = &vb->v4l2_buf.timecode;
208 unsigned fps = 25;
209 unsigned seq = vb->v4l2_buf.sequence;
210
211 if (!vivid_is_sdtv_cap(dev))
212 return;
213
214 /*
215 * Set the timecode. Rarely used, so it is interesting to
216 * test this.
217 */
218 vb->v4l2_buf.flags |= V4L2_BUF_FLAG_TIMECODE;
219 if (dev->std_cap & V4L2_STD_525_60)
220 fps = 30;
221 tc->type = (fps == 30) ? V4L2_TC_TYPE_30FPS : V4L2_TC_TYPE_25FPS;
222 tc->flags = 0;
223 tc->frames = seq % fps;
224 tc->seconds = (seq / fps) % 60;
225 tc->minutes = (seq / (60 * fps)) % 60;
226 tc->hours = (seq / (60 * 60 * fps)) % 24;
227}
228
229static void vid_cap_buf_queue(struct vb2_buffer *vb)
230{
231 struct vivid_dev *dev = vb2_get_drv_priv(vb->vb2_queue);
232 struct vivid_buffer *buf = container_of(vb, struct vivid_buffer, vb);
233
234 dprintk(dev, 1, "%s\n", __func__);
235
236 spin_lock(&dev->slock);
237 list_add_tail(&buf->list, &dev->vid_cap_active);
238 spin_unlock(&dev->slock);
239}
240
241static int vid_cap_start_streaming(struct vb2_queue *vq, unsigned count)
242{
243 struct vivid_dev *dev = vb2_get_drv_priv(vq);
244 unsigned i;
245 int err;
246
247 if (vb2_is_streaming(&dev->vb_vid_out_q))
248 dev->can_loop_video = vivid_vid_can_loop(dev);
249
250 if (dev->kthread_vid_cap)
251 return 0;
252
253 dev->vid_cap_seq_count = 0;
254 dprintk(dev, 1, "%s\n", __func__);
255 for (i = 0; i < VIDEO_MAX_FRAME; i++)
256 dev->must_blank[i] = tpg_g_perc_fill(&dev->tpg) < 100;
257 if (dev->start_streaming_error) {
258 dev->start_streaming_error = false;
259 err = -EINVAL;
260 } else {
261 err = vivid_start_generating_vid_cap(dev, &dev->vid_cap_streaming);
262 }
263 if (err) {
264 struct vivid_buffer *buf, *tmp;
265
266 list_for_each_entry_safe(buf, tmp, &dev->vid_cap_active, list) {
267 list_del(&buf->list);
268 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_QUEUED);
269 }
270 }
271 return err;
272}
273
274/* abort streaming and wait for last buffer */
275static void vid_cap_stop_streaming(struct vb2_queue *vq)
276{
277 struct vivid_dev *dev = vb2_get_drv_priv(vq);
278
279 dprintk(dev, 1, "%s\n", __func__);
280 vivid_stop_generating_vid_cap(dev, &dev->vid_cap_streaming);
281 dev->can_loop_video = false;
282}
283
284const struct vb2_ops vivid_vid_cap_qops = {
285 .queue_setup = vid_cap_queue_setup,
286 .buf_prepare = vid_cap_buf_prepare,
287 .buf_finish = vid_cap_buf_finish,
288 .buf_queue = vid_cap_buf_queue,
289 .start_streaming = vid_cap_start_streaming,
290 .stop_streaming = vid_cap_stop_streaming,
291 .wait_prepare = vivid_unlock,
292 .wait_finish = vivid_lock,
293};
294
295/*
296 * Determine the 'picture' quality based on the current TV frequency: either
297 * COLOR for a good 'signal', GRAY (grayscale picture) for a slightly off
298 * signal or NOISE for no signal.
299 */
300void vivid_update_quality(struct vivid_dev *dev)
301{
302 unsigned freq_modulus;
303
304 if (dev->loop_video && (vivid_is_svid_cap(dev) || vivid_is_hdmi_cap(dev))) {
305 /*
306 * The 'noise' will only be replaced by the actual video
307 * if the output video matches the input video settings.
308 */
309 tpg_s_quality(&dev->tpg, TPG_QUAL_NOISE, 0);
310 return;
311 }
312 if (vivid_is_hdmi_cap(dev) && VIVID_INVALID_SIGNAL(dev->dv_timings_signal_mode)) {
313 tpg_s_quality(&dev->tpg, TPG_QUAL_NOISE, 0);
314 return;
315 }
316 if (vivid_is_sdtv_cap(dev) && VIVID_INVALID_SIGNAL(dev->std_signal_mode)) {
317 tpg_s_quality(&dev->tpg, TPG_QUAL_NOISE, 0);
318 return;
319 }
320 if (!vivid_is_tv_cap(dev)) {
321 tpg_s_quality(&dev->tpg, TPG_QUAL_COLOR, 0);
322 return;
323 }
324
325 /*
326 * There is a fake channel every 6 MHz at 49.25, 55.25, etc.
327 * From +/- 0.25 MHz around the channel there is color, and from
328 * +/- 1 MHz there is grayscale (chroma is lost).
329 * Everywhere else it is just noise.
330 */
331 freq_modulus = (dev->tv_freq - 676 /* (43.25-1) * 16 */) % (6 * 16);
332 if (freq_modulus > 2 * 16) {
333 tpg_s_quality(&dev->tpg, TPG_QUAL_NOISE,
334 next_pseudo_random32(dev->tv_freq ^ 0x55) & 0x3f);
335 return;
336 }
337 if (freq_modulus < 12 /*0.75 * 16*/ || freq_modulus > 20 /*1.25 * 16*/)
338 tpg_s_quality(&dev->tpg, TPG_QUAL_GRAY, 0);
339 else
340 tpg_s_quality(&dev->tpg, TPG_QUAL_COLOR, 0);
341}
342
343/*
344 * Get the current picture quality and the associated afc value.
345 */
346static enum tpg_quality vivid_get_quality(struct vivid_dev *dev, s32 *afc)
347{
348 unsigned freq_modulus;
349
350 if (afc)
351 *afc = 0;
352 if (tpg_g_quality(&dev->tpg) == TPG_QUAL_COLOR ||
353 tpg_g_quality(&dev->tpg) == TPG_QUAL_NOISE)
354 return tpg_g_quality(&dev->tpg);
355
356 /*
357 * There is a fake channel every 6 MHz at 49.25, 55.25, etc.
358 * From +/- 0.25 MHz around the channel there is color, and from
359 * +/- 1 MHz there is grayscale (chroma is lost).
360 * Everywhere else it is just gray.
361 */
362 freq_modulus = (dev->tv_freq - 676 /* (43.25-1) * 16 */) % (6 * 16);
363 if (afc)
364 *afc = freq_modulus - 1 * 16;
365 return TPG_QUAL_GRAY;
366}
367
368enum tpg_video_aspect vivid_get_video_aspect(const struct vivid_dev *dev)
369{
370 if (vivid_is_sdtv_cap(dev))
371 return dev->std_aspect_ratio;
372
373 if (vivid_is_hdmi_cap(dev))
374 return dev->dv_timings_aspect_ratio;
375
376 return TPG_VIDEO_ASPECT_IMAGE;
377}
378
379static enum tpg_pixel_aspect vivid_get_pixel_aspect(const struct vivid_dev *dev)
380{
381 if (vivid_is_sdtv_cap(dev))
382 return (dev->std_cap & V4L2_STD_525_60) ?
383 TPG_PIXEL_ASPECT_NTSC : TPG_PIXEL_ASPECT_PAL;
384
385 if (vivid_is_hdmi_cap(dev) &&
386 dev->src_rect.width == 720 && dev->src_rect.height <= 576)
387 return dev->src_rect.height == 480 ?
388 TPG_PIXEL_ASPECT_NTSC : TPG_PIXEL_ASPECT_PAL;
389
390 return TPG_PIXEL_ASPECT_SQUARE;
391}
392
393/*
394 * Called whenever the format has to be reset which can occur when
395 * changing inputs, standard, timings, etc.
396 */
397void vivid_update_format_cap(struct vivid_dev *dev, bool keep_controls)
398{
399 struct v4l2_bt_timings *bt = &dev->dv_timings_cap.bt;
400 unsigned size;
401
402 switch (dev->input_type[dev->input]) {
403 case WEBCAM:
404 default:
405 dev->src_rect.width = webcam_sizes[dev->webcam_size_idx].width;
406 dev->src_rect.height = webcam_sizes[dev->webcam_size_idx].height;
407 dev->timeperframe_vid_cap = webcam_intervals[dev->webcam_ival_idx];
408 dev->field_cap = V4L2_FIELD_NONE;
409 tpg_s_rgb_range(&dev->tpg, V4L2_DV_RGB_RANGE_AUTO);
410 break;
411 case TV:
412 case SVID:
413 dev->field_cap = dev->tv_field_cap;
414 dev->src_rect.width = 720;
415 if (dev->std_cap & V4L2_STD_525_60) {
416 dev->src_rect.height = 480;
417 dev->timeperframe_vid_cap = (struct v4l2_fract) { 1001, 30000 };
418 dev->service_set_cap = V4L2_SLICED_CAPTION_525;
419 } else {
420 dev->src_rect.height = 576;
421 dev->timeperframe_vid_cap = (struct v4l2_fract) { 1000, 25000 };
422 dev->service_set_cap = V4L2_SLICED_WSS_625 | V4L2_SLICED_TELETEXT_B;
423 }
424 tpg_s_rgb_range(&dev->tpg, V4L2_DV_RGB_RANGE_AUTO);
425 break;
426 case HDMI:
427 dev->src_rect.width = bt->width;
428 dev->src_rect.height = bt->height;
429 size = V4L2_DV_BT_FRAME_WIDTH(bt) * V4L2_DV_BT_FRAME_HEIGHT(bt);
430 dev->timeperframe_vid_cap = (struct v4l2_fract) {
431 size / 100, (u32)bt->pixelclock / 100
432 };
433 if (bt->interlaced)
434 dev->field_cap = V4L2_FIELD_ALTERNATE;
435 else
436 dev->field_cap = V4L2_FIELD_NONE;
437
438 /*
439 * We can be called from within s_ctrl, in that case we can't
440 * set/get controls. Luckily we don't need to in that case.
441 */
442 if (keep_controls || !dev->colorspace)
443 break;
444 if (bt->standards & V4L2_DV_BT_STD_CEA861) {
445 if (bt->width == 720 && bt->height <= 576)
446 v4l2_ctrl_s_ctrl(dev->colorspace, V4L2_COLORSPACE_SMPTE170M);
447 else
448 v4l2_ctrl_s_ctrl(dev->colorspace, V4L2_COLORSPACE_REC709);
449 v4l2_ctrl_s_ctrl(dev->real_rgb_range_cap, 1);
450 } else {
451 v4l2_ctrl_s_ctrl(dev->colorspace, V4L2_COLORSPACE_SRGB);
452 v4l2_ctrl_s_ctrl(dev->real_rgb_range_cap, 0);
453 }
454 tpg_s_rgb_range(&dev->tpg, v4l2_ctrl_g_ctrl(dev->rgb_range_cap));
455 break;
456 }
457 vivid_update_quality(dev);
458 tpg_reset_source(&dev->tpg, dev->src_rect.width, dev->src_rect.height, dev->field_cap);
459 dev->crop_cap = dev->src_rect;
460 dev->crop_bounds_cap = dev->src_rect;
461 dev->compose_cap = dev->crop_cap;
462 if (V4L2_FIELD_HAS_T_OR_B(dev->field_cap))
463 dev->compose_cap.height /= 2;
464 dev->fmt_cap_rect = dev->compose_cap;
465 tpg_s_video_aspect(&dev->tpg, vivid_get_video_aspect(dev));
466 tpg_s_pixel_aspect(&dev->tpg, vivid_get_pixel_aspect(dev));
467 tpg_update_mv_step(&dev->tpg);
468}
469
470/* Map the field to something that is valid for the current input */
471static enum v4l2_field vivid_field_cap(struct vivid_dev *dev, enum v4l2_field field)
472{
473 if (vivid_is_sdtv_cap(dev)) {
474 switch (field) {
475 case V4L2_FIELD_INTERLACED_TB:
476 case V4L2_FIELD_INTERLACED_BT:
477 case V4L2_FIELD_SEQ_TB:
478 case V4L2_FIELD_SEQ_BT:
479 case V4L2_FIELD_TOP:
480 case V4L2_FIELD_BOTTOM:
481 case V4L2_FIELD_ALTERNATE:
482 return field;
483 case V4L2_FIELD_INTERLACED:
484 default:
485 return V4L2_FIELD_INTERLACED;
486 }
487 }
488 if (vivid_is_hdmi_cap(dev))
489 return dev->dv_timings_cap.bt.interlaced ? V4L2_FIELD_ALTERNATE :
490 V4L2_FIELD_NONE;
491 return V4L2_FIELD_NONE;
492}
493
494static unsigned vivid_colorspace_cap(struct vivid_dev *dev)
495{
496 if (!dev->loop_video || vivid_is_webcam(dev) || vivid_is_tv_cap(dev))
497 return tpg_g_colorspace(&dev->tpg);
498 return dev->colorspace_out;
499}
500
501int vivid_g_fmt_vid_cap(struct file *file, void *priv,
502 struct v4l2_format *f)
503{
504 struct vivid_dev *dev = video_drvdata(file);
505 struct v4l2_pix_format_mplane *mp = &f->fmt.pix_mp;
506 unsigned p;
507
508 mp->width = dev->fmt_cap_rect.width;
509 mp->height = dev->fmt_cap_rect.height;
510 mp->field = dev->field_cap;
511 mp->pixelformat = dev->fmt_cap->fourcc;
512 mp->colorspace = vivid_colorspace_cap(dev);
513 mp->num_planes = dev->fmt_cap->planes;
514 for (p = 0; p < mp->num_planes; p++) {
515 mp->plane_fmt[p].bytesperline = tpg_g_bytesperline(&dev->tpg, p);
516 mp->plane_fmt[p].sizeimage =
517 mp->plane_fmt[p].bytesperline * mp->height +
518 dev->fmt_cap->data_offset[p];
519 }
520 return 0;
521}
522
523int vivid_try_fmt_vid_cap(struct file *file, void *priv,
524 struct v4l2_format *f)
525{
526 struct v4l2_pix_format_mplane *mp = &f->fmt.pix_mp;
527 struct v4l2_plane_pix_format *pfmt = mp->plane_fmt;
528 struct vivid_dev *dev = video_drvdata(file);
529 const struct vivid_fmt *fmt;
530 unsigned bytesperline, max_bpl;
531 unsigned factor = 1;
532 unsigned w, h;
533 unsigned p;
534
535 fmt = vivid_get_format(dev, mp->pixelformat);
536 if (!fmt) {
537 dprintk(dev, 1, "Fourcc format (0x%08x) unknown.\n",
538 mp->pixelformat);
539 mp->pixelformat = V4L2_PIX_FMT_YUYV;
540 fmt = vivid_get_format(dev, mp->pixelformat);
541 }
542
543 mp->field = vivid_field_cap(dev, mp->field);
544 if (vivid_is_webcam(dev)) {
545 const struct v4l2_frmsize_discrete *sz =
546 v4l2_find_nearest_format(&webcam_probe, mp->width, mp->height);
547
548 w = sz->width;
549 h = sz->height;
550 } else if (vivid_is_sdtv_cap(dev)) {
551 w = 720;
552 h = (dev->std_cap & V4L2_STD_525_60) ? 480 : 576;
553 } else {
554 w = dev->src_rect.width;
555 h = dev->src_rect.height;
556 }
557 if (V4L2_FIELD_HAS_T_OR_B(mp->field))
558 factor = 2;
559 if (vivid_is_webcam(dev) ||
560 (!dev->has_scaler_cap && !dev->has_crop_cap && !dev->has_compose_cap)) {
561 mp->width = w;
562 mp->height = h / factor;
563 } else {
564 struct v4l2_rect r = { 0, 0, mp->width, mp->height * factor };
565
566 rect_set_min_size(&r, &vivid_min_rect);
567 rect_set_max_size(&r, &vivid_max_rect);
568 if (dev->has_scaler_cap && !dev->has_compose_cap) {
569 struct v4l2_rect max_r = { 0, 0, MAX_ZOOM * w, MAX_ZOOM * h };
570
571 rect_set_max_size(&r, &max_r);
572 } else if (!dev->has_scaler_cap && dev->has_crop_cap && !dev->has_compose_cap) {
573 rect_set_max_size(&r, &dev->src_rect);
574 } else if (!dev->has_scaler_cap && !dev->has_crop_cap) {
575 rect_set_min_size(&r, &dev->src_rect);
576 }
577 mp->width = r.width;
578 mp->height = r.height / factor;
579 }
580
581 /* This driver supports custom bytesperline values */
582
583 /* Calculate the minimum supported bytesperline value */
584 bytesperline = (mp->width * fmt->depth) >> 3;
585 /* Calculate the maximum supported bytesperline value */
586 max_bpl = (MAX_ZOOM * MAX_WIDTH * fmt->depth) >> 3;
587 mp->num_planes = fmt->planes;
588 for (p = 0; p < mp->num_planes; p++) {
589 if (pfmt[p].bytesperline > max_bpl)
590 pfmt[p].bytesperline = max_bpl;
591 if (pfmt[p].bytesperline < bytesperline)
592 pfmt[p].bytesperline = bytesperline;
593 pfmt[p].sizeimage = pfmt[p].bytesperline * mp->height +
594 fmt->data_offset[p];
595 memset(pfmt[p].reserved, 0, sizeof(pfmt[p].reserved));
596 }
597 mp->colorspace = vivid_colorspace_cap(dev);
598 memset(mp->reserved, 0, sizeof(mp->reserved));
599 return 0;
600}
601
602int vivid_s_fmt_vid_cap(struct file *file, void *priv,
603 struct v4l2_format *f)
604{
605 struct v4l2_pix_format_mplane *mp = &f->fmt.pix_mp;
606 struct vivid_dev *dev = video_drvdata(file);
607 struct v4l2_rect *crop = &dev->crop_cap;
608 struct v4l2_rect *compose = &dev->compose_cap;
609 struct vb2_queue *q = &dev->vb_vid_cap_q;
610 int ret = vivid_try_fmt_vid_cap(file, priv, f);
611 unsigned factor = 1;
612 unsigned i;
613
614 if (ret < 0)
615 return ret;
616
617 if (vb2_is_busy(q)) {
618 dprintk(dev, 1, "%s device busy\n", __func__);
619 return -EBUSY;
620 }
621
622 if (dev->overlay_cap_owner && dev->fb_cap.fmt.pixelformat != mp->pixelformat) {
623 dprintk(dev, 1, "overlay is active, can't change pixelformat\n");
624 return -EBUSY;
625 }
626
627 dev->fmt_cap = vivid_get_format(dev, mp->pixelformat);
628 if (V4L2_FIELD_HAS_T_OR_B(mp->field))
629 factor = 2;
630
631 /* Note: the webcam input doesn't support scaling, cropping or composing */
632
633 if (!vivid_is_webcam(dev) &&
634 (dev->has_scaler_cap || dev->has_crop_cap || dev->has_compose_cap)) {
635 struct v4l2_rect r = { 0, 0, mp->width, mp->height };
636
637 if (dev->has_scaler_cap) {
638 if (dev->has_compose_cap)
639 rect_map_inside(compose, &r);
640 else
641 *compose = r;
642 if (dev->has_crop_cap && !dev->has_compose_cap) {
643 struct v4l2_rect min_r = {
644 0, 0,
645 r.width / MAX_ZOOM,
646 factor * r.height / MAX_ZOOM
647 };
648 struct v4l2_rect max_r = {
649 0, 0,
650 r.width * MAX_ZOOM,
651 factor * r.height * MAX_ZOOM
652 };
653
654 rect_set_min_size(crop, &min_r);
655 rect_set_max_size(crop, &max_r);
656 rect_map_inside(crop, &dev->crop_bounds_cap);
657 } else if (dev->has_crop_cap) {
658 struct v4l2_rect min_r = {
659 0, 0,
660 compose->width / MAX_ZOOM,
661 factor * compose->height / MAX_ZOOM
662 };
663 struct v4l2_rect max_r = {
664 0, 0,
665 compose->width * MAX_ZOOM,
666 factor * compose->height * MAX_ZOOM
667 };
668
669 rect_set_min_size(crop, &min_r);
670 rect_set_max_size(crop, &max_r);
671 rect_map_inside(crop, &dev->crop_bounds_cap);
672 }
673 } else if (dev->has_crop_cap && !dev->has_compose_cap) {
674 r.height *= factor;
675 rect_set_size_to(crop, &r);
676 rect_map_inside(crop, &dev->crop_bounds_cap);
677 r = *crop;
678 r.height /= factor;
679 rect_set_size_to(compose, &r);
680 } else if (!dev->has_crop_cap) {
681 rect_map_inside(compose, &r);
682 } else {
683 r.height *= factor;
684 rect_set_max_size(crop, &r);
685 rect_map_inside(crop, &dev->crop_bounds_cap);
686 compose->top *= factor;
687 compose->height *= factor;
688 rect_set_size_to(compose, crop);
689 rect_map_inside(compose, &r);
690 compose->top /= factor;
691 compose->height /= factor;
692 }
693 } else if (vivid_is_webcam(dev)) {
694 /* Guaranteed to be a match */
695 for (i = 0; i < ARRAY_SIZE(webcam_sizes); i++)
696 if (webcam_sizes[i].width == mp->width &&
697 webcam_sizes[i].height == mp->height)
698 break;
699 dev->webcam_size_idx = i;
700 if (dev->webcam_ival_idx >= 2 * (3 - i))
701 dev->webcam_ival_idx = 2 * (3 - i) - 1;
702 vivid_update_format_cap(dev, false);
703 } else {
704 struct v4l2_rect r = { 0, 0, mp->width, mp->height };
705
706 rect_set_size_to(compose, &r);
707 r.height *= factor;
708 rect_set_size_to(crop, &r);
709 }
710
711 dev->fmt_cap_rect.width = mp->width;
712 dev->fmt_cap_rect.height = mp->height;
713 tpg_s_buf_height(&dev->tpg, mp->height);
714 tpg_s_bytesperline(&dev->tpg, 0, mp->plane_fmt[0].bytesperline);
715 if (tpg_g_planes(&dev->tpg) > 1)
716 tpg_s_bytesperline(&dev->tpg, 1, mp->plane_fmt[1].bytesperline);
717 dev->field_cap = mp->field;
718 tpg_s_field(&dev->tpg, dev->field_cap);
719 tpg_s_crop_compose(&dev->tpg, &dev->crop_cap, &dev->compose_cap);
720 tpg_s_fourcc(&dev->tpg, dev->fmt_cap->fourcc);
721 if (vivid_is_sdtv_cap(dev))
722 dev->tv_field_cap = mp->field;
723 tpg_update_mv_step(&dev->tpg);
724 return 0;
725}
726
727int vidioc_g_fmt_vid_cap_mplane(struct file *file, void *priv,
728 struct v4l2_format *f)
729{
730 struct vivid_dev *dev = video_drvdata(file);
731
732 if (!dev->multiplanar)
733 return -ENOTTY;
734 return vivid_g_fmt_vid_cap(file, priv, f);
735}
736
737int vidioc_try_fmt_vid_cap_mplane(struct file *file, void *priv,
738 struct v4l2_format *f)
739{
740 struct vivid_dev *dev = video_drvdata(file);
741
742 if (!dev->multiplanar)
743 return -ENOTTY;
744 return vivid_try_fmt_vid_cap(file, priv, f);
745}
746
747int vidioc_s_fmt_vid_cap_mplane(struct file *file, void *priv,
748 struct v4l2_format *f)
749{
750 struct vivid_dev *dev = video_drvdata(file);
751
752 if (!dev->multiplanar)
753 return -ENOTTY;
754 return vivid_s_fmt_vid_cap(file, priv, f);
755}
756
757int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
758 struct v4l2_format *f)
759{
760 struct vivid_dev *dev = video_drvdata(file);
761
762 if (dev->multiplanar)
763 return -ENOTTY;
764 return fmt_sp2mp_func(file, priv, f, vivid_g_fmt_vid_cap);
765}
766
767int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
768 struct v4l2_format *f)
769{
770 struct vivid_dev *dev = video_drvdata(file);
771
772 if (dev->multiplanar)
773 return -ENOTTY;
774 return fmt_sp2mp_func(file, priv, f, vivid_try_fmt_vid_cap);
775}
776
777int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
778 struct v4l2_format *f)
779{
780 struct vivid_dev *dev = video_drvdata(file);
781
782 if (dev->multiplanar)
783 return -ENOTTY;
784 return fmt_sp2mp_func(file, priv, f, vivid_s_fmt_vid_cap);
785}
786
787int vivid_vid_cap_g_selection(struct file *file, void *priv,
788 struct v4l2_selection *sel)
789{
790 struct vivid_dev *dev = video_drvdata(file);
791
792 if (!dev->has_crop_cap && !dev->has_compose_cap)
793 return -ENOTTY;
794 if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
795 return -EINVAL;
796 if (vivid_is_webcam(dev))
797 return -EINVAL;
798
799 sel->r.left = sel->r.top = 0;
800 switch (sel->target) {
801 case V4L2_SEL_TGT_CROP:
802 if (!dev->has_crop_cap)
803 return -EINVAL;
804 sel->r = dev->crop_cap;
805 break;
806 case V4L2_SEL_TGT_CROP_DEFAULT:
807 case V4L2_SEL_TGT_CROP_BOUNDS:
808 if (!dev->has_crop_cap)
809 return -EINVAL;
810 sel->r = dev->src_rect;
811 break;
812 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
813 if (!dev->has_compose_cap)
814 return -EINVAL;
815 sel->r = vivid_max_rect;
816 break;
817 case V4L2_SEL_TGT_COMPOSE:
818 if (!dev->has_compose_cap)
819 return -EINVAL;
820 sel->r = dev->compose_cap;
821 break;
822 case V4L2_SEL_TGT_COMPOSE_DEFAULT:
823 if (!dev->has_compose_cap)
824 return -EINVAL;
825 sel->r = dev->fmt_cap_rect;
826 break;
827 default:
828 return -EINVAL;
829 }
830 return 0;
831}
832
833int vivid_vid_cap_s_selection(struct file *file, void *fh, struct v4l2_selection *s)
834{
835 struct vivid_dev *dev = video_drvdata(file);
836 struct v4l2_rect *crop = &dev->crop_cap;
837 struct v4l2_rect *compose = &dev->compose_cap;
838 unsigned factor = V4L2_FIELD_HAS_T_OR_B(dev->field_cap) ? 2 : 1;
839 int ret;
840
841 if (!dev->has_crop_cap && !dev->has_compose_cap)
842 return -ENOTTY;
843 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
844 return -EINVAL;
845 if (vivid_is_webcam(dev))
846 return -EINVAL;
847
848 switch (s->target) {
849 case V4L2_SEL_TGT_CROP:
850 if (!dev->has_crop_cap)
851 return -EINVAL;
852 ret = vivid_vid_adjust_sel(s->flags, &s->r);
853 if (ret)
854 return ret;
855 rect_set_min_size(&s->r, &vivid_min_rect);
856 rect_set_max_size(&s->r, &dev->src_rect);
857 rect_map_inside(&s->r, &dev->crop_bounds_cap);
858 s->r.top /= factor;
859 s->r.height /= factor;
860 if (dev->has_scaler_cap) {
861 struct v4l2_rect fmt = dev->fmt_cap_rect;
862 struct v4l2_rect max_rect = {
863 0, 0,
864 s->r.width * MAX_ZOOM,
865 s->r.height * MAX_ZOOM
866 };
867 struct v4l2_rect min_rect = {
868 0, 0,
869 s->r.width / MAX_ZOOM,
870 s->r.height / MAX_ZOOM
871 };
872
873 rect_set_min_size(&fmt, &min_rect);
874 if (!dev->has_compose_cap)
875 rect_set_max_size(&fmt, &max_rect);
876 if (!rect_same_size(&dev->fmt_cap_rect, &fmt) &&
877 vb2_is_busy(&dev->vb_vid_cap_q))
878 return -EBUSY;
879 if (dev->has_compose_cap) {
880 rect_set_min_size(compose, &min_rect);
881 rect_set_max_size(compose, &max_rect);
882 }
883 dev->fmt_cap_rect = fmt;
884 tpg_s_buf_height(&dev->tpg, fmt.height);
885 } else if (dev->has_compose_cap) {
886 struct v4l2_rect fmt = dev->fmt_cap_rect;
887
888 rect_set_min_size(&fmt, &s->r);
889 if (!rect_same_size(&dev->fmt_cap_rect, &fmt) &&
890 vb2_is_busy(&dev->vb_vid_cap_q))
891 return -EBUSY;
892 dev->fmt_cap_rect = fmt;
893 tpg_s_buf_height(&dev->tpg, fmt.height);
894 rect_set_size_to(compose, &s->r);
895 rect_map_inside(compose, &dev->fmt_cap_rect);
896 } else {
897 if (!rect_same_size(&s->r, &dev->fmt_cap_rect) &&
898 vb2_is_busy(&dev->vb_vid_cap_q))
899 return -EBUSY;
900 rect_set_size_to(&dev->fmt_cap_rect, &s->r);
901 rect_set_size_to(compose, &s->r);
902 rect_map_inside(compose, &dev->fmt_cap_rect);
903 tpg_s_buf_height(&dev->tpg, dev->fmt_cap_rect.height);
904 }
905 s->r.top *= factor;
906 s->r.height *= factor;
907 *crop = s->r;
908 break;
909 case V4L2_SEL_TGT_COMPOSE:
910 if (!dev->has_compose_cap)
911 return -EINVAL;
912 ret = vivid_vid_adjust_sel(s->flags, &s->r);
913 if (ret)
914 return ret;
915 rect_set_min_size(&s->r, &vivid_min_rect);
916 rect_set_max_size(&s->r, &dev->fmt_cap_rect);
917 if (dev->has_scaler_cap) {
918 struct v4l2_rect max_rect = {
919 0, 0,
920 dev->src_rect.width * MAX_ZOOM,
921 (dev->src_rect.height / factor) * MAX_ZOOM
922 };
923
924 rect_set_max_size(&s->r, &max_rect);
925 if (dev->has_crop_cap) {
926 struct v4l2_rect min_rect = {
927 0, 0,
928 s->r.width / MAX_ZOOM,
929 (s->r.height * factor) / MAX_ZOOM
930 };
931 struct v4l2_rect max_rect = {
932 0, 0,
933 s->r.width * MAX_ZOOM,
934 (s->r.height * factor) * MAX_ZOOM
935 };
936
937 rect_set_min_size(crop, &min_rect);
938 rect_set_max_size(crop, &max_rect);
939 rect_map_inside(crop, &dev->crop_bounds_cap);
940 }
941 } else if (dev->has_crop_cap) {
942 s->r.top *= factor;
943 s->r.height *= factor;
944 rect_set_max_size(&s->r, &dev->src_rect);
945 rect_set_size_to(crop, &s->r);
946 rect_map_inside(crop, &dev->crop_bounds_cap);
947 s->r.top /= factor;
948 s->r.height /= factor;
949 } else {
950 rect_set_size_to(&s->r, &dev->src_rect);
951 s->r.height /= factor;
952 }
953 rect_map_inside(&s->r, &dev->fmt_cap_rect);
954 if (dev->bitmap_cap && (compose->width != s->r.width ||
955 compose->height != s->r.height)) {
956 kfree(dev->bitmap_cap);
957 dev->bitmap_cap = NULL;
958 }
959 *compose = s->r;
960 break;
961 default:
962 return -EINVAL;
963 }
964
965 tpg_s_crop_compose(&dev->tpg, crop, compose);
966 return 0;
967}
968
969int vivid_vid_cap_cropcap(struct file *file, void *priv,
970 struct v4l2_cropcap *cap)
971{
972 struct vivid_dev *dev = video_drvdata(file);
973
974 if (cap->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
975 return -EINVAL;
976
977 switch (vivid_get_pixel_aspect(dev)) {
978 case TPG_PIXEL_ASPECT_NTSC:
979 cap->pixelaspect.numerator = 11;
980 cap->pixelaspect.denominator = 10;
981 break;
982 case TPG_PIXEL_ASPECT_PAL:
983 cap->pixelaspect.numerator = 54;
984 cap->pixelaspect.denominator = 59;
985 break;
986 case TPG_PIXEL_ASPECT_SQUARE:
987 cap->pixelaspect.numerator = 1;
988 cap->pixelaspect.denominator = 1;
989 break;
990 }
991 return 0;
992}
993
994int vidioc_enum_fmt_vid_overlay(struct file *file, void *priv,
995 struct v4l2_fmtdesc *f)
996{
997 const struct vivid_fmt *fmt;
998
999 if (f->index >= ARRAY_SIZE(formats_ovl))
1000 return -EINVAL;
1001
1002 fmt = &formats_ovl[f->index];
1003
1004 strlcpy(f->description, fmt->name, sizeof(f->description));
1005 f->pixelformat = fmt->fourcc;
1006 return 0;
1007}
1008
1009int vidioc_g_fmt_vid_overlay(struct file *file, void *priv,
1010 struct v4l2_format *f)
1011{
1012 struct vivid_dev *dev = video_drvdata(file);
1013 const struct v4l2_rect *compose = &dev->compose_cap;
1014 struct v4l2_window *win = &f->fmt.win;
1015 unsigned clipcount = win->clipcount;
1016
1017 win->w.top = dev->overlay_cap_top;
1018 win->w.left = dev->overlay_cap_left;
1019 win->w.width = compose->width;
1020 win->w.height = compose->height;
1021 win->field = dev->overlay_cap_field;
1022 win->clipcount = dev->clipcount_cap;
1023 if (clipcount > dev->clipcount_cap)
1024 clipcount = dev->clipcount_cap;
1025 if (dev->bitmap_cap == NULL)
1026 win->bitmap = NULL;
1027 else if (win->bitmap) {
1028 if (copy_to_user(win->bitmap, dev->bitmap_cap,
1029 ((compose->width + 7) / 8) * compose->height))
1030 return -EFAULT;
1031 }
1032 if (clipcount && win->clips) {
1033 if (copy_to_user(win->clips, dev->clips_cap,
1034 clipcount * sizeof(dev->clips_cap[0])))
1035 return -EFAULT;
1036 }
1037 return 0;
1038}
1039
1040int vidioc_try_fmt_vid_overlay(struct file *file, void *priv,
1041 struct v4l2_format *f)
1042{
1043 struct vivid_dev *dev = video_drvdata(file);
1044 const struct v4l2_rect *compose = &dev->compose_cap;
1045 struct v4l2_window *win = &f->fmt.win;
1046 int i, j;
1047
1048 win->w.left = clamp_t(int, win->w.left,
1049 -dev->fb_cap.fmt.width, dev->fb_cap.fmt.width);
1050 win->w.top = clamp_t(int, win->w.top,
1051 -dev->fb_cap.fmt.height, dev->fb_cap.fmt.height);
1052 win->w.width = compose->width;
1053 win->w.height = compose->height;
1054 if (win->field != V4L2_FIELD_BOTTOM && win->field != V4L2_FIELD_TOP)
1055 win->field = V4L2_FIELD_ANY;
1056 win->chromakey = 0;
1057 win->global_alpha = 0;
1058 if (win->clipcount && !win->clips)
1059 win->clipcount = 0;
1060 if (win->clipcount > MAX_CLIPS)
1061 win->clipcount = MAX_CLIPS;
1062 if (win->clipcount) {
1063 if (copy_from_user(dev->try_clips_cap, win->clips,
1064 win->clipcount * sizeof(dev->clips_cap[0])))
1065 return -EFAULT;
1066 for (i = 0; i < win->clipcount; i++) {
1067 struct v4l2_rect *r = &dev->try_clips_cap[i].c;
1068
1069 r->top = clamp_t(s32, r->top, 0, dev->fb_cap.fmt.height - 1);
1070 r->height = clamp_t(s32, r->height, 1, dev->fb_cap.fmt.height - r->top);
1071 r->left = clamp_t(u32, r->left, 0, dev->fb_cap.fmt.width - 1);
1072 r->width = clamp_t(u32, r->width, 1, dev->fb_cap.fmt.width - r->left);
1073 }
1074 /*
1075 * Yeah, so sue me, it's an O(n^2) algorithm. But n is a small
1076 * number and it's typically a one-time deal.
1077 */
1078 for (i = 0; i < win->clipcount - 1; i++) {
1079 struct v4l2_rect *r1 = &dev->try_clips_cap[i].c;
1080
1081 for (j = i + 1; j < win->clipcount; j++) {
1082 struct v4l2_rect *r2 = &dev->try_clips_cap[j].c;
1083
1084 if (rect_overlap(r1, r2))
1085 return -EINVAL;
1086 }
1087 }
1088 if (copy_to_user(win->clips, dev->try_clips_cap,
1089 win->clipcount * sizeof(dev->clips_cap[0])))
1090 return -EFAULT;
1091 }
1092 return 0;
1093}
1094
1095int vidioc_s_fmt_vid_overlay(struct file *file, void *priv,
1096 struct v4l2_format *f)
1097{
1098 struct vivid_dev *dev = video_drvdata(file);
1099 const struct v4l2_rect *compose = &dev->compose_cap;
1100 struct v4l2_window *win = &f->fmt.win;
1101 int ret = vidioc_try_fmt_vid_overlay(file, priv, f);
1102 unsigned bitmap_size = ((compose->width + 7) / 8) * compose->height;
1103 unsigned clips_size = win->clipcount * sizeof(dev->clips_cap[0]);
1104 void *new_bitmap = NULL;
1105
1106 if (ret)
1107 return ret;
1108
1109 if (win->bitmap) {
1110 new_bitmap = vzalloc(bitmap_size);
1111
1112 if (new_bitmap == NULL)
1113 return -ENOMEM;
1114 if (copy_from_user(new_bitmap, win->bitmap, bitmap_size)) {
1115 vfree(new_bitmap);
1116 return -EFAULT;
1117 }
1118 }
1119
1120 dev->overlay_cap_top = win->w.top;
1121 dev->overlay_cap_left = win->w.left;
1122 dev->overlay_cap_field = win->field;
1123 vfree(dev->bitmap_cap);
1124 dev->bitmap_cap = new_bitmap;
1125 dev->clipcount_cap = win->clipcount;
1126 if (dev->clipcount_cap)
1127 memcpy(dev->clips_cap, dev->try_clips_cap, clips_size);
1128 return 0;
1129}
1130
1131int vivid_vid_cap_overlay(struct file *file, void *fh, unsigned i)
1132{
1133 struct vivid_dev *dev = video_drvdata(file);
1134
1135 if (i && dev->fb_vbase_cap == NULL)
1136 return -EINVAL;
1137
1138 if (i && dev->fb_cap.fmt.pixelformat != dev->fmt_cap->fourcc) {
1139 dprintk(dev, 1, "mismatch between overlay and video capture pixelformats\n");
1140 return -EINVAL;
1141 }
1142
1143 if (dev->overlay_cap_owner && dev->overlay_cap_owner != fh)
1144 return -EBUSY;
1145 dev->overlay_cap_owner = i ? fh : NULL;
1146 return 0;
1147}
1148
1149int vivid_vid_cap_g_fbuf(struct file *file, void *fh,
1150 struct v4l2_framebuffer *a)
1151{
1152 struct vivid_dev *dev = video_drvdata(file);
1153
1154 *a = dev->fb_cap;
1155 a->capability = V4L2_FBUF_CAP_BITMAP_CLIPPING |
1156 V4L2_FBUF_CAP_LIST_CLIPPING;
1157 a->flags = V4L2_FBUF_FLAG_PRIMARY;
1158 a->fmt.field = V4L2_FIELD_NONE;
1159 a->fmt.colorspace = V4L2_COLORSPACE_SRGB;
1160 a->fmt.priv = 0;
1161 return 0;
1162}
1163
1164int vivid_vid_cap_s_fbuf(struct file *file, void *fh,
1165 const struct v4l2_framebuffer *a)
1166{
1167 struct vivid_dev *dev = video_drvdata(file);
1168 const struct vivid_fmt *fmt;
1169
1170 if (!capable(CAP_SYS_ADMIN) && !capable(CAP_SYS_RAWIO))
1171 return -EPERM;
1172
1173 if (dev->overlay_cap_owner)
1174 return -EBUSY;
1175
1176 if (a->base == NULL) {
1177 dev->fb_cap.base = NULL;
1178 dev->fb_vbase_cap = NULL;
1179 return 0;
1180 }
1181
1182 if (a->fmt.width < 48 || a->fmt.height < 32)
1183 return -EINVAL;
1184 fmt = vivid_get_format(dev, a->fmt.pixelformat);
1185 if (!fmt || !fmt->can_do_overlay)
1186 return -EINVAL;
1187 if (a->fmt.bytesperline < (a->fmt.width * fmt->depth) / 8)
1188 return -EINVAL;
1189 if (a->fmt.height * a->fmt.bytesperline < a->fmt.sizeimage)
1190 return -EINVAL;
1191
1192 dev->fb_vbase_cap = phys_to_virt((unsigned long)a->base);
1193 dev->fb_cap = *a;
1194 dev->overlay_cap_left = clamp_t(int, dev->overlay_cap_left,
1195 -dev->fb_cap.fmt.width, dev->fb_cap.fmt.width);
1196 dev->overlay_cap_top = clamp_t(int, dev->overlay_cap_top,
1197 -dev->fb_cap.fmt.height, dev->fb_cap.fmt.height);
1198 return 0;
1199}
1200
1201static const struct v4l2_audio vivid_audio_inputs[] = {
1202 { 0, "TV", V4L2_AUDCAP_STEREO },
1203 { 1, "Line-In", V4L2_AUDCAP_STEREO },
1204};
1205
1206int vidioc_enum_input(struct file *file, void *priv,
1207 struct v4l2_input *inp)
1208{
1209 struct vivid_dev *dev = video_drvdata(file);
1210
1211 if (inp->index >= dev->num_inputs)
1212 return -EINVAL;
1213
1214 inp->type = V4L2_INPUT_TYPE_CAMERA;
1215 switch (dev->input_type[inp->index]) {
1216 case WEBCAM:
1217 snprintf(inp->name, sizeof(inp->name), "Webcam %u",
1218 dev->input_name_counter[inp->index]);
1219 inp->capabilities = 0;
1220 break;
1221 case TV:
1222 snprintf(inp->name, sizeof(inp->name), "TV %u",
1223 dev->input_name_counter[inp->index]);
1224 inp->type = V4L2_INPUT_TYPE_TUNER;
1225 inp->std = V4L2_STD_ALL;
1226 if (dev->has_audio_inputs)
1227 inp->audioset = (1 << ARRAY_SIZE(vivid_audio_inputs)) - 1;
1228 inp->capabilities = V4L2_IN_CAP_STD;
1229 break;
1230 case SVID:
1231 snprintf(inp->name, sizeof(inp->name), "S-Video %u",
1232 dev->input_name_counter[inp->index]);
1233 inp->std = V4L2_STD_ALL;
1234 if (dev->has_audio_inputs)
1235 inp->audioset = (1 << ARRAY_SIZE(vivid_audio_inputs)) - 1;
1236 inp->capabilities = V4L2_IN_CAP_STD;
1237 break;
1238 case HDMI:
1239 snprintf(inp->name, sizeof(inp->name), "HDMI %u",
1240 dev->input_name_counter[inp->index]);
1241 inp->capabilities = V4L2_IN_CAP_DV_TIMINGS;
1242 if (dev->edid_blocks == 0 ||
1243 dev->dv_timings_signal_mode == NO_SIGNAL)
1244 inp->status |= V4L2_IN_ST_NO_SIGNAL;
1245 else if (dev->dv_timings_signal_mode == NO_LOCK ||
1246 dev->dv_timings_signal_mode == OUT_OF_RANGE)
1247 inp->status |= V4L2_IN_ST_NO_H_LOCK;
1248 break;
1249 }
1250 if (dev->sensor_hflip)
1251 inp->status |= V4L2_IN_ST_HFLIP;
1252 if (dev->sensor_vflip)
1253 inp->status |= V4L2_IN_ST_VFLIP;
1254 if (dev->input == inp->index && vivid_is_sdtv_cap(dev)) {
1255 if (dev->std_signal_mode == NO_SIGNAL) {
1256 inp->status |= V4L2_IN_ST_NO_SIGNAL;
1257 } else if (dev->std_signal_mode == NO_LOCK) {
1258 inp->status |= V4L2_IN_ST_NO_H_LOCK;
1259 } else if (vivid_is_tv_cap(dev)) {
1260 switch (tpg_g_quality(&dev->tpg)) {
1261 case TPG_QUAL_GRAY:
1262 inp->status |= V4L2_IN_ST_COLOR_KILL;
1263 break;
1264 case TPG_QUAL_NOISE:
1265 inp->status |= V4L2_IN_ST_NO_H_LOCK;
1266 break;
1267 default:
1268 break;
1269 }
1270 }
1271 }
1272 return 0;
1273}
1274
1275int vidioc_g_input(struct file *file, void *priv, unsigned *i)
1276{
1277 struct vivid_dev *dev = video_drvdata(file);
1278
1279 *i = dev->input;
1280 return 0;
1281}
1282
1283int vidioc_s_input(struct file *file, void *priv, unsigned i)
1284{
1285 struct vivid_dev *dev = video_drvdata(file);
1286 struct v4l2_bt_timings *bt = &dev->dv_timings_cap.bt;
1287 unsigned brightness;
1288
1289 if (i >= dev->num_inputs)
1290 return -EINVAL;
1291
1292 if (i == dev->input)
1293 return 0;
1294
1295 if (vb2_is_busy(&dev->vb_vid_cap_q) || vb2_is_busy(&dev->vb_vbi_cap_q))
1296 return -EBUSY;
1297
1298 dev->input = i;
1299 dev->vid_cap_dev.tvnorms = 0;
1300 if (dev->input_type[i] == TV || dev->input_type[i] == SVID) {
1301 dev->tv_audio_input = (dev->input_type[i] == TV) ? 0 : 1;
1302 dev->vid_cap_dev.tvnorms = V4L2_STD_ALL;
1303 }
1304 dev->vbi_cap_dev.tvnorms = dev->vid_cap_dev.tvnorms;
1305 vivid_update_format_cap(dev, false);
1306
1307 if (dev->colorspace) {
1308 switch (dev->input_type[i]) {
1309 case WEBCAM:
1310 v4l2_ctrl_s_ctrl(dev->colorspace, V4L2_COLORSPACE_SRGB);
1311 break;
1312 case TV:
1313 case SVID:
1314 v4l2_ctrl_s_ctrl(dev->colorspace, V4L2_COLORSPACE_SMPTE170M);
1315 break;
1316 case HDMI:
1317 if (bt->standards & V4L2_DV_BT_STD_CEA861) {
1318 if (dev->src_rect.width == 720 && dev->src_rect.height <= 576)
1319 v4l2_ctrl_s_ctrl(dev->colorspace, V4L2_COLORSPACE_SMPTE170M);
1320 else
1321 v4l2_ctrl_s_ctrl(dev->colorspace, V4L2_COLORSPACE_REC709);
1322 } else {
1323 v4l2_ctrl_s_ctrl(dev->colorspace, V4L2_COLORSPACE_SRGB);
1324 }
1325 break;
1326 }
1327 }
1328
1329 /*
1330 * Modify the brightness range depending on the input.
1331 * This makes it easy to use vivid to test if applications can
1332 * handle control range modifications and is also how this is
1333 * typically used in practice as different inputs may be hooked
1334 * up to different receivers with different control ranges.
1335 */
1336 brightness = 128 * i + dev->input_brightness[i];
1337 v4l2_ctrl_modify_range(dev->brightness,
1338 128 * i, 255 + 128 * i, 1, 128 + 128 * i);
1339 v4l2_ctrl_s_ctrl(dev->brightness, brightness);
1340 return 0;
1341}
1342
1343int vidioc_enumaudio(struct file *file, void *fh, struct v4l2_audio *vin)
1344{
1345 if (vin->index >= ARRAY_SIZE(vivid_audio_inputs))
1346 return -EINVAL;
1347 *vin = vivid_audio_inputs[vin->index];
1348 return 0;
1349}
1350
1351int vidioc_g_audio(struct file *file, void *fh, struct v4l2_audio *vin)
1352{
1353 struct vivid_dev *dev = video_drvdata(file);
1354
1355 if (!vivid_is_sdtv_cap(dev))
1356 return -EINVAL;
1357 *vin = vivid_audio_inputs[dev->tv_audio_input];
1358 return 0;
1359}
1360
1361int vidioc_s_audio(struct file *file, void *fh, const struct v4l2_audio *vin)
1362{
1363 struct vivid_dev *dev = video_drvdata(file);
1364
1365 if (!vivid_is_sdtv_cap(dev))
1366 return -EINVAL;
1367 if (vin->index >= ARRAY_SIZE(vivid_audio_inputs))
1368 return -EINVAL;
1369 dev->tv_audio_input = vin->index;
1370 return 0;
1371}
1372
1373int vivid_video_g_frequency(struct file *file, void *fh, struct v4l2_frequency *vf)
1374{
1375 struct vivid_dev *dev = video_drvdata(file);
1376
1377 if (vf->tuner != 0)
1378 return -EINVAL;
1379 vf->frequency = dev->tv_freq;
1380 return 0;
1381}
1382
1383int vivid_video_s_frequency(struct file *file, void *fh, const struct v4l2_frequency *vf)
1384{
1385 struct vivid_dev *dev = video_drvdata(file);
1386
1387 if (vf->tuner != 0)
1388 return -EINVAL;
1389 dev->tv_freq = clamp_t(unsigned, vf->frequency, MIN_TV_FREQ, MAX_TV_FREQ);
1390 if (vivid_is_tv_cap(dev))
1391 vivid_update_quality(dev);
1392 return 0;
1393}
1394
1395int vivid_video_s_tuner(struct file *file, void *fh, const struct v4l2_tuner *vt)
1396{
1397 struct vivid_dev *dev = video_drvdata(file);
1398
1399 if (vt->index != 0)
1400 return -EINVAL;
1401 if (vt->audmode > V4L2_TUNER_MODE_LANG1_LANG2)
1402 return -EINVAL;
1403 dev->tv_audmode = vt->audmode;
1404 return 0;
1405}
1406
1407int vivid_video_g_tuner(struct file *file, void *fh, struct v4l2_tuner *vt)
1408{
1409 struct vivid_dev *dev = video_drvdata(file);
1410 enum tpg_quality qual;
1411
1412 if (vt->index != 0)
1413 return -EINVAL;
1414
1415 vt->capability = V4L2_TUNER_CAP_NORM | V4L2_TUNER_CAP_STEREO |
1416 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
1417 vt->audmode = dev->tv_audmode;
1418 vt->rangelow = MIN_TV_FREQ;
1419 vt->rangehigh = MAX_TV_FREQ;
1420 qual = vivid_get_quality(dev, &vt->afc);
1421 if (qual == TPG_QUAL_COLOR)
1422 vt->signal = 0xffff;
1423 else if (qual == TPG_QUAL_GRAY)
1424 vt->signal = 0x8000;
1425 else
1426 vt->signal = 0;
1427 if (qual == TPG_QUAL_NOISE) {
1428 vt->rxsubchans = 0;
1429 } else if (qual == TPG_QUAL_GRAY) {
1430 vt->rxsubchans = V4L2_TUNER_SUB_MONO;
1431 } else {
1432 unsigned channel_nr = dev->tv_freq / (6 * 16);
1433 unsigned options = (dev->std_cap & V4L2_STD_NTSC_M) ? 4 : 3;
1434
1435 switch (channel_nr % options) {
1436 case 0:
1437 vt->rxsubchans = V4L2_TUNER_SUB_MONO;
1438 break;
1439 case 1:
1440 vt->rxsubchans = V4L2_TUNER_SUB_STEREO;
1441 break;
1442 case 2:
1443 if (dev->std_cap & V4L2_STD_NTSC_M)
1444 vt->rxsubchans = V4L2_TUNER_SUB_MONO | V4L2_TUNER_SUB_SAP;
1445 else
1446 vt->rxsubchans = V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
1447 break;
1448 case 3:
1449 vt->rxsubchans = V4L2_TUNER_SUB_STEREO | V4L2_TUNER_SUB_SAP;
1450 break;
1451 }
1452 }
1453 strlcpy(vt->name, "TV Tuner", sizeof(vt->name));
1454 return 0;
1455}
1456
1457/* Must remain in sync with the vivid_ctrl_standard_strings array */
1458const v4l2_std_id vivid_standard[] = {
1459 V4L2_STD_NTSC_M,
1460 V4L2_STD_NTSC_M_JP,
1461 V4L2_STD_NTSC_M_KR,
1462 V4L2_STD_NTSC_443,
1463 V4L2_STD_PAL_BG | V4L2_STD_PAL_H,
1464 V4L2_STD_PAL_I,
1465 V4L2_STD_PAL_DK,
1466 V4L2_STD_PAL_M,
1467 V4L2_STD_PAL_N,
1468 V4L2_STD_PAL_Nc,
1469 V4L2_STD_PAL_60,
1470 V4L2_STD_SECAM_B | V4L2_STD_SECAM_G | V4L2_STD_SECAM_H,
1471 V4L2_STD_SECAM_DK,
1472 V4L2_STD_SECAM_L,
1473 V4L2_STD_SECAM_LC,
1474 V4L2_STD_UNKNOWN
1475};
1476
1477/* Must remain in sync with the vivid_standard array */
1478const char * const vivid_ctrl_standard_strings[] = {
1479 "NTSC-M",
1480 "NTSC-M-JP",
1481 "NTSC-M-KR",
1482 "NTSC-443",
1483 "PAL-BGH",
1484 "PAL-I",
1485 "PAL-DK",
1486 "PAL-M",
1487 "PAL-N",
1488 "PAL-Nc",
1489 "PAL-60",
1490 "SECAM-BGH",
1491 "SECAM-DK",
1492 "SECAM-L",
1493 "SECAM-Lc",
1494 NULL,
1495};
1496
1497int vidioc_querystd(struct file *file, void *priv, v4l2_std_id *id)
1498{
1499 struct vivid_dev *dev = video_drvdata(file);
1500
1501 if (!vivid_is_sdtv_cap(dev))
1502 return -ENODATA;
1503 if (dev->std_signal_mode == NO_SIGNAL ||
1504 dev->std_signal_mode == NO_LOCK) {
1505 *id = V4L2_STD_UNKNOWN;
1506 return 0;
1507 }
1508 if (vivid_is_tv_cap(dev) && tpg_g_quality(&dev->tpg) == TPG_QUAL_NOISE) {
1509 *id = V4L2_STD_UNKNOWN;
1510 } else if (dev->std_signal_mode == CURRENT_STD) {
1511 *id = dev->std_cap;
1512 } else if (dev->std_signal_mode == SELECTED_STD) {
1513 *id = dev->query_std;
1514 } else {
1515 *id = vivid_standard[dev->query_std_last];
1516 dev->query_std_last = (dev->query_std_last + 1) % ARRAY_SIZE(vivid_standard);
1517 }
1518
1519 return 0;
1520}
1521
1522int vivid_vid_cap_s_std(struct file *file, void *priv, v4l2_std_id id)
1523{
1524 struct vivid_dev *dev = video_drvdata(file);
1525
1526 if (!vivid_is_sdtv_cap(dev))
1527 return -ENODATA;
1528 if (dev->std_cap == id)
1529 return 0;
1530 if (vb2_is_busy(&dev->vb_vid_cap_q) || vb2_is_busy(&dev->vb_vbi_cap_q))
1531 return -EBUSY;
1532 dev->std_cap = id;
1533 vivid_update_format_cap(dev, false);
1534 return 0;
1535}
1536
1537int vivid_vid_cap_s_dv_timings(struct file *file, void *_fh,
1538 struct v4l2_dv_timings *timings)
1539{
1540 struct vivid_dev *dev = video_drvdata(file);
1541
1542 if (!vivid_is_hdmi_cap(dev))
1543 return -ENODATA;
1544 if (vb2_is_busy(&dev->vb_vid_cap_q))
1545 return -EBUSY;
1546 if (!v4l2_find_dv_timings_cap(timings, &vivid_dv_timings_cap,
1547 0, NULL, NULL))
1548 return -EINVAL;
1549 if (v4l2_match_dv_timings(timings, &dev->dv_timings_cap, 0))
1550 return 0;
1551 dev->dv_timings_cap = *timings;
1552 vivid_update_format_cap(dev, false);
1553 return 0;
1554}
1555
1556int vidioc_query_dv_timings(struct file *file, void *_fh,
1557 struct v4l2_dv_timings *timings)
1558{
1559 struct vivid_dev *dev = video_drvdata(file);
1560
1561 if (!vivid_is_hdmi_cap(dev))
1562 return -ENODATA;
1563 if (dev->dv_timings_signal_mode == NO_SIGNAL ||
1564 dev->edid_blocks == 0)
1565 return -ENOLINK;
1566 if (dev->dv_timings_signal_mode == NO_LOCK)
1567 return -ENOLCK;
1568 if (dev->dv_timings_signal_mode == OUT_OF_RANGE) {
1569 timings->bt.pixelclock = vivid_dv_timings_cap.bt.max_pixelclock * 2;
1570 return -ERANGE;
1571 }
1572 if (dev->dv_timings_signal_mode == CURRENT_DV_TIMINGS) {
1573 *timings = dev->dv_timings_cap;
1574 } else if (dev->dv_timings_signal_mode == SELECTED_DV_TIMINGS) {
1575 *timings = v4l2_dv_timings_presets[dev->query_dv_timings];
1576 } else {
1577 *timings = v4l2_dv_timings_presets[dev->query_dv_timings_last];
1578 dev->query_dv_timings_last = (dev->query_dv_timings_last + 1) %
1579 dev->query_dv_timings_size;
1580 }
1581 return 0;
1582}
1583
1584int vidioc_s_edid(struct file *file, void *_fh,
1585 struct v4l2_edid *edid)
1586{
1587 struct vivid_dev *dev = video_drvdata(file);
1588
1589 memset(edid->reserved, 0, sizeof(edid->reserved));
1590 if (edid->pad >= dev->num_inputs)
1591 return -EINVAL;
1592 if (dev->input_type[edid->pad] != HDMI || edid->start_block)
1593 return -EINVAL;
1594 if (edid->blocks == 0) {
1595 dev->edid_blocks = 0;
1596 return 0;
1597 }
1598 if (edid->blocks > dev->edid_max_blocks) {
1599 edid->blocks = dev->edid_max_blocks;
1600 return -E2BIG;
1601 }
1602 dev->edid_blocks = edid->blocks;
1603 memcpy(dev->edid, edid->edid, edid->blocks * 128);
1604 return 0;
1605}
1606
1607int vidioc_enum_framesizes(struct file *file, void *fh,
1608 struct v4l2_frmsizeenum *fsize)
1609{
1610 struct vivid_dev *dev = video_drvdata(file);
1611
1612 if (!vivid_is_webcam(dev) && !dev->has_scaler_cap)
1613 return -EINVAL;
1614 if (vivid_get_format(dev, fsize->pixel_format) == NULL)
1615 return -EINVAL;
1616 if (vivid_is_webcam(dev)) {
1617 if (fsize->index >= ARRAY_SIZE(webcam_sizes))
1618 return -EINVAL;
1619 fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE;
1620 fsize->discrete = webcam_sizes[fsize->index];
1621 return 0;
1622 }
1623 if (fsize->index)
1624 return -EINVAL;
1625 fsize->type = V4L2_FRMSIZE_TYPE_STEPWISE;
1626 fsize->stepwise.min_width = MIN_WIDTH;
1627 fsize->stepwise.max_width = MAX_WIDTH * MAX_ZOOM;
1628 fsize->stepwise.step_width = 2;
1629 fsize->stepwise.min_height = MIN_HEIGHT;
1630 fsize->stepwise.max_height = MAX_HEIGHT * MAX_ZOOM;
1631 fsize->stepwise.step_height = 2;
1632 return 0;
1633}
1634
1635/* timeperframe is arbitrary and continuous */
1636int vidioc_enum_frameintervals(struct file *file, void *priv,
1637 struct v4l2_frmivalenum *fival)
1638{
1639 struct vivid_dev *dev = video_drvdata(file);
1640 const struct vivid_fmt *fmt;
1641 int i;
1642
1643 fmt = vivid_get_format(dev, fival->pixel_format);
1644 if (!fmt)
1645 return -EINVAL;
1646
1647 if (!vivid_is_webcam(dev)) {
1648 static const struct v4l2_fract step = { 1, 1 };
1649
1650 if (fival->index)
1651 return -EINVAL;
1652 if (fival->width < MIN_WIDTH || fival->width > MAX_WIDTH * MAX_ZOOM)
1653 return -EINVAL;
1654 if (fival->height < MIN_HEIGHT || fival->height > MAX_HEIGHT * MAX_ZOOM)
1655 return -EINVAL;
1656 fival->type = V4L2_FRMIVAL_TYPE_CONTINUOUS;
1657 fival->stepwise.min = tpf_min;
1658 fival->stepwise.max = tpf_max;
1659 fival->stepwise.step = step;
1660 return 0;
1661 }
1662
1663 for (i = 0; i < ARRAY_SIZE(webcam_sizes); i++)
1664 if (fival->width == webcam_sizes[i].width &&
1665 fival->height == webcam_sizes[i].height)
1666 break;
1667 if (i == ARRAY_SIZE(webcam_sizes))
1668 return -EINVAL;
1669 if (fival->index >= 2 * (3 - i))
1670 return -EINVAL;
1671 fival->type = V4L2_FRMIVAL_TYPE_DISCRETE;
1672 fival->discrete = webcam_intervals[fival->index];
1673 return 0;
1674}
1675
1676int vivid_vid_cap_g_parm(struct file *file, void *priv,
1677 struct v4l2_streamparm *parm)
1678{
1679 struct vivid_dev *dev = video_drvdata(file);
1680
1681 if (parm->type != (dev->multiplanar ?
1682 V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE :
1683 V4L2_BUF_TYPE_VIDEO_CAPTURE))
1684 return -EINVAL;
1685
1686 parm->parm.capture.capability = V4L2_CAP_TIMEPERFRAME;
1687 parm->parm.capture.timeperframe = dev->timeperframe_vid_cap;
1688 parm->parm.capture.readbuffers = 1;
1689 return 0;
1690}
1691
1692#define FRACT_CMP(a, OP, b) \
1693 ((u64)(a).numerator * (b).denominator OP (u64)(b).numerator * (a).denominator)
1694
1695int vivid_vid_cap_s_parm(struct file *file, void *priv,
1696 struct v4l2_streamparm *parm)
1697{
1698 struct vivid_dev *dev = video_drvdata(file);
1699 unsigned ival_sz = 2 * (3 - dev->webcam_size_idx);
1700 struct v4l2_fract tpf;
1701 unsigned i;
1702
1703 if (parm->type != (dev->multiplanar ?
1704 V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE :
1705 V4L2_BUF_TYPE_VIDEO_CAPTURE))
1706 return -EINVAL;
1707 if (!vivid_is_webcam(dev))
1708 return vivid_vid_cap_g_parm(file, priv, parm);
1709
1710 tpf = parm->parm.capture.timeperframe;
1711
1712 if (tpf.denominator == 0)
1713 tpf = webcam_intervals[ival_sz - 1];
1714 for (i = 0; i < ival_sz; i++)
1715 if (FRACT_CMP(tpf, >=, webcam_intervals[i]))
1716 break;
1717 if (i == ival_sz)
1718 i = ival_sz - 1;
1719 dev->webcam_ival_idx = i;
1720 tpf = webcam_intervals[dev->webcam_ival_idx];
1721 tpf = FRACT_CMP(tpf, <, tpf_min) ? tpf_min : tpf;
1722 tpf = FRACT_CMP(tpf, >, tpf_max) ? tpf_max : tpf;
1723
1724 /* resync the thread's timings */
1725 dev->cap_seq_resync = true;
1726 dev->timeperframe_vid_cap = tpf;
1727 parm->parm.capture.timeperframe = tpf;
1728 parm->parm.capture.readbuffers = 1;
1729 return 0;
1730}
diff --git a/drivers/media/platform/vivid/vivid-vid-cap.h b/drivers/media/platform/vivid/vivid-vid-cap.h
new file mode 100644
index 000000000000..94079815dbc2
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-vid-cap.h
@@ -0,0 +1,71 @@
1/*
2 * vivid-vid-cap.h - video capture support functions.
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#ifndef _VIVID_VID_CAP_H_
21#define _VIVID_VID_CAP_H_
22
23void vivid_update_quality(struct vivid_dev *dev);
24void vivid_update_format_cap(struct vivid_dev *dev, bool keep_controls);
25enum tpg_video_aspect vivid_get_video_aspect(const struct vivid_dev *dev);
26
27extern const v4l2_std_id vivid_standard[];
28extern const char * const vivid_ctrl_standard_strings[];
29
30extern const struct vb2_ops vivid_vid_cap_qops;
31
32int vivid_g_fmt_vid_cap(struct file *file, void *priv, struct v4l2_format *f);
33int vivid_try_fmt_vid_cap(struct file *file, void *priv, struct v4l2_format *f);
34int vivid_s_fmt_vid_cap(struct file *file, void *priv, struct v4l2_format *f);
35int vidioc_g_fmt_vid_cap_mplane(struct file *file, void *priv, struct v4l2_format *f);
36int vidioc_try_fmt_vid_cap_mplane(struct file *file, void *priv, struct v4l2_format *f);
37int vidioc_s_fmt_vid_cap_mplane(struct file *file, void *priv, struct v4l2_format *f);
38int vidioc_g_fmt_vid_cap(struct file *file, void *priv, struct v4l2_format *f);
39int vidioc_try_fmt_vid_cap(struct file *file, void *priv, struct v4l2_format *f);
40int vidioc_s_fmt_vid_cap(struct file *file, void *priv, struct v4l2_format *f);
41int vivid_vid_cap_g_selection(struct file *file, void *priv, struct v4l2_selection *sel);
42int vivid_vid_cap_s_selection(struct file *file, void *fh, struct v4l2_selection *s);
43int vivid_vid_cap_cropcap(struct file *file, void *priv, struct v4l2_cropcap *cap);
44int vidioc_enum_fmt_vid_overlay(struct file *file, void *priv, struct v4l2_fmtdesc *f);
45int vidioc_g_fmt_vid_overlay(struct file *file, void *priv, struct v4l2_format *f);
46int vidioc_try_fmt_vid_overlay(struct file *file, void *priv, struct v4l2_format *f);
47int vidioc_s_fmt_vid_overlay(struct file *file, void *priv, struct v4l2_format *f);
48int vivid_vid_cap_overlay(struct file *file, void *fh, unsigned i);
49int vivid_vid_cap_g_fbuf(struct file *file, void *fh, struct v4l2_framebuffer *a);
50int vivid_vid_cap_s_fbuf(struct file *file, void *fh, const struct v4l2_framebuffer *a);
51int vidioc_enum_input(struct file *file, void *priv, struct v4l2_input *inp);
52int vidioc_g_input(struct file *file, void *priv, unsigned *i);
53int vidioc_s_input(struct file *file, void *priv, unsigned i);
54int vidioc_enumaudio(struct file *file, void *fh, struct v4l2_audio *vin);
55int vidioc_g_audio(struct file *file, void *fh, struct v4l2_audio *vin);
56int vidioc_s_audio(struct file *file, void *fh, const struct v4l2_audio *vin);
57int vivid_video_g_frequency(struct file *file, void *fh, struct v4l2_frequency *vf);
58int vivid_video_s_frequency(struct file *file, void *fh, const struct v4l2_frequency *vf);
59int vivid_video_s_tuner(struct file *file, void *fh, const struct v4l2_tuner *vt);
60int vivid_video_g_tuner(struct file *file, void *fh, struct v4l2_tuner *vt);
61int vidioc_querystd(struct file *file, void *priv, v4l2_std_id *id);
62int vivid_vid_cap_s_std(struct file *file, void *priv, v4l2_std_id id);
63int vivid_vid_cap_s_dv_timings(struct file *file, void *_fh, struct v4l2_dv_timings *timings);
64int vidioc_query_dv_timings(struct file *file, void *_fh, struct v4l2_dv_timings *timings);
65int vidioc_s_edid(struct file *file, void *_fh, struct v4l2_edid *edid);
66int vidioc_enum_framesizes(struct file *file, void *fh, struct v4l2_frmsizeenum *fsize);
67int vidioc_enum_frameintervals(struct file *file, void *priv, struct v4l2_frmivalenum *fival);
68int vivid_vid_cap_g_parm(struct file *file, void *priv, struct v4l2_streamparm *parm);
69int vivid_vid_cap_s_parm(struct file *file, void *priv, struct v4l2_streamparm *parm);
70
71#endif
diff --git a/drivers/media/platform/vivid/vivid-vid-common.c b/drivers/media/platform/vivid/vivid-vid-common.c
new file mode 100644
index 000000000000..16cd6d2d2ed6
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-vid-common.c
@@ -0,0 +1,571 @@
1/*
2 * vivid-vid-common.c - common video support functions.
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#include <linux/errno.h>
21#include <linux/kernel.h>
22#include <linux/sched.h>
23#include <linux/videodev2.h>
24#include <linux/v4l2-dv-timings.h>
25#include <media/v4l2-common.h>
26#include <media/v4l2-event.h>
27#include <media/v4l2-dv-timings.h>
28
29#include "vivid-core.h"
30#include "vivid-vid-common.h"
31
32const struct v4l2_dv_timings_cap vivid_dv_timings_cap = {
33 .type = V4L2_DV_BT_656_1120,
34 /* keep this initialization for compatibility with GCC < 4.4.6 */
35 .reserved = { 0 },
36 V4L2_INIT_BT_TIMINGS(0, MAX_WIDTH, 0, MAX_HEIGHT, 25000000, 600000000,
37 V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT,
38 V4L2_DV_BT_CAP_PROGRESSIVE | V4L2_DV_BT_CAP_INTERLACED)
39};
40
41/* ------------------------------------------------------------------
42 Basic structures
43 ------------------------------------------------------------------*/
44
45struct vivid_fmt vivid_formats[] = {
46 {
47 .name = "4:2:2, packed, YUYV",
48 .fourcc = V4L2_PIX_FMT_YUYV,
49 .depth = 16,
50 .is_yuv = true,
51 .planes = 1,
52 .data_offset = { PLANE0_DATA_OFFSET, 0 },
53 },
54 {
55 .name = "4:2:2, packed, UYVY",
56 .fourcc = V4L2_PIX_FMT_UYVY,
57 .depth = 16,
58 .is_yuv = true,
59 .planes = 1,
60 },
61 {
62 .name = "4:2:2, packed, YVYU",
63 .fourcc = V4L2_PIX_FMT_YVYU,
64 .depth = 16,
65 .is_yuv = true,
66 .planes = 1,
67 },
68 {
69 .name = "4:2:2, packed, VYUY",
70 .fourcc = V4L2_PIX_FMT_VYUY,
71 .depth = 16,
72 .is_yuv = true,
73 .planes = 1,
74 },
75 {
76 .name = "RGB565 (LE)",
77 .fourcc = V4L2_PIX_FMT_RGB565, /* gggbbbbb rrrrrggg */
78 .depth = 16,
79 .planes = 1,
80 .can_do_overlay = true,
81 },
82 {
83 .name = "RGB565 (BE)",
84 .fourcc = V4L2_PIX_FMT_RGB565X, /* rrrrrggg gggbbbbb */
85 .depth = 16,
86 .planes = 1,
87 .can_do_overlay = true,
88 },
89 {
90 .name = "RGB555 (LE)",
91 .fourcc = V4L2_PIX_FMT_RGB555, /* gggbbbbb arrrrrgg */
92 .depth = 16,
93 .planes = 1,
94 .can_do_overlay = true,
95 },
96 {
97 .name = "XRGB555 (LE)",
98 .fourcc = V4L2_PIX_FMT_XRGB555, /* gggbbbbb arrrrrgg */
99 .depth = 16,
100 .planes = 1,
101 .can_do_overlay = true,
102 },
103 {
104 .name = "ARGB555 (LE)",
105 .fourcc = V4L2_PIX_FMT_ARGB555, /* gggbbbbb arrrrrgg */
106 .depth = 16,
107 .planes = 1,
108 .can_do_overlay = true,
109 .alpha_mask = 0x8000,
110 },
111 {
112 .name = "RGB555 (BE)",
113 .fourcc = V4L2_PIX_FMT_RGB555X, /* arrrrrgg gggbbbbb */
114 .depth = 16,
115 .planes = 1,
116 .can_do_overlay = true,
117 },
118 {
119 .name = "RGB24 (LE)",
120 .fourcc = V4L2_PIX_FMT_RGB24, /* rgb */
121 .depth = 24,
122 .planes = 1,
123 },
124 {
125 .name = "RGB24 (BE)",
126 .fourcc = V4L2_PIX_FMT_BGR24, /* bgr */
127 .depth = 24,
128 .planes = 1,
129 },
130 {
131 .name = "RGB32 (LE)",
132 .fourcc = V4L2_PIX_FMT_RGB32, /* argb */
133 .depth = 32,
134 .planes = 1,
135 },
136 {
137 .name = "RGB32 (BE)",
138 .fourcc = V4L2_PIX_FMT_BGR32, /* bgra */
139 .depth = 32,
140 .planes = 1,
141 },
142 {
143 .name = "XRGB32 (LE)",
144 .fourcc = V4L2_PIX_FMT_XRGB32, /* argb */
145 .depth = 32,
146 .planes = 1,
147 },
148 {
149 .name = "XRGB32 (BE)",
150 .fourcc = V4L2_PIX_FMT_XBGR32, /* bgra */
151 .depth = 32,
152 .planes = 1,
153 },
154 {
155 .name = "ARGB32 (LE)",
156 .fourcc = V4L2_PIX_FMT_ARGB32, /* argb */
157 .depth = 32,
158 .planes = 1,
159 .alpha_mask = 0x000000ff,
160 },
161 {
162 .name = "ARGB32 (BE)",
163 .fourcc = V4L2_PIX_FMT_ABGR32, /* bgra */
164 .depth = 32,
165 .planes = 1,
166 .alpha_mask = 0xff000000,
167 },
168 {
169 .name = "4:2:2, planar, YUV",
170 .fourcc = V4L2_PIX_FMT_NV16M,
171 .depth = 8,
172 .is_yuv = true,
173 .planes = 2,
174 .data_offset = { PLANE0_DATA_OFFSET, 0 },
175 },
176 {
177 .name = "4:2:2, planar, YVU",
178 .fourcc = V4L2_PIX_FMT_NV61M,
179 .depth = 8,
180 .is_yuv = true,
181 .planes = 2,
182 .data_offset = { 0, PLANE0_DATA_OFFSET },
183 },
184};
185
186/* There are 2 multiplanar formats in the list */
187#define VIVID_MPLANAR_FORMATS 2
188
189const struct vivid_fmt *vivid_get_format(struct vivid_dev *dev, u32 pixelformat)
190{
191 const struct vivid_fmt *fmt;
192 unsigned k;
193
194 for (k = 0; k < ARRAY_SIZE(vivid_formats); k++) {
195 fmt = &vivid_formats[k];
196 if (fmt->fourcc == pixelformat)
197 if (fmt->planes == 1 || dev->multiplanar)
198 return fmt;
199 }
200
201 return NULL;
202}
203
204bool vivid_vid_can_loop(struct vivid_dev *dev)
205{
206 if (dev->src_rect.width != dev->sink_rect.width ||
207 dev->src_rect.height != dev->sink_rect.height)
208 return false;
209 if (dev->fmt_cap->fourcc != dev->fmt_out->fourcc)
210 return false;
211 if (dev->field_cap != dev->field_out)
212 return false;
213 if (vivid_is_svid_cap(dev) && vivid_is_svid_out(dev)) {
214 if (!(dev->std_cap & V4L2_STD_525_60) !=
215 !(dev->std_out & V4L2_STD_525_60))
216 return false;
217 return true;
218 }
219 if (vivid_is_hdmi_cap(dev) && vivid_is_hdmi_out(dev))
220 return true;
221 return false;
222}
223
224void vivid_send_source_change(struct vivid_dev *dev, unsigned type)
225{
226 struct v4l2_event ev = {
227 .type = V4L2_EVENT_SOURCE_CHANGE,
228 .u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION,
229 };
230 unsigned i;
231
232 for (i = 0; i < dev->num_inputs; i++) {
233 ev.id = i;
234 if (dev->input_type[i] == type) {
235 if (video_is_registered(&dev->vid_cap_dev) && dev->has_vid_cap)
236 v4l2_event_queue(&dev->vid_cap_dev, &ev);
237 if (video_is_registered(&dev->vbi_cap_dev) && dev->has_vbi_cap)
238 v4l2_event_queue(&dev->vbi_cap_dev, &ev);
239 }
240 }
241}
242
243/*
244 * Conversion function that converts a single-planar format to a
245 * single-plane multiplanar format.
246 */
247void fmt_sp2mp(const struct v4l2_format *sp_fmt, struct v4l2_format *mp_fmt)
248{
249 struct v4l2_pix_format_mplane *mp = &mp_fmt->fmt.pix_mp;
250 struct v4l2_plane_pix_format *ppix = &mp->plane_fmt[0];
251 const struct v4l2_pix_format *pix = &sp_fmt->fmt.pix;
252 bool is_out = sp_fmt->type == V4L2_BUF_TYPE_VIDEO_OUTPUT;
253
254 memset(mp->reserved, 0, sizeof(mp->reserved));
255 mp_fmt->type = is_out ? V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE :
256 V4L2_CAP_VIDEO_CAPTURE_MPLANE;
257 mp->width = pix->width;
258 mp->height = pix->height;
259 mp->pixelformat = pix->pixelformat;
260 mp->field = pix->field;
261 mp->colorspace = pix->colorspace;
262 mp->num_planes = 1;
263 mp->flags = pix->flags;
264 ppix->sizeimage = pix->sizeimage;
265 ppix->bytesperline = pix->bytesperline;
266 memset(ppix->reserved, 0, sizeof(ppix->reserved));
267}
268
269int fmt_sp2mp_func(struct file *file, void *priv,
270 struct v4l2_format *f, fmtfunc func)
271{
272 struct v4l2_format fmt;
273 struct v4l2_pix_format_mplane *mp = &fmt.fmt.pix_mp;
274 struct v4l2_plane_pix_format *ppix = &mp->plane_fmt[0];
275 struct v4l2_pix_format *pix = &f->fmt.pix;
276 int ret;
277
278 /* Converts to a mplane format */
279 fmt_sp2mp(f, &fmt);
280 /* Passes it to the generic mplane format function */
281 ret = func(file, priv, &fmt);
282 /* Copies back the mplane data to the single plane format */
283 pix->width = mp->width;
284 pix->height = mp->height;
285 pix->pixelformat = mp->pixelformat;
286 pix->field = mp->field;
287 pix->colorspace = mp->colorspace;
288 pix->sizeimage = ppix->sizeimage;
289 pix->bytesperline = ppix->bytesperline;
290 pix->flags = mp->flags;
291 return ret;
292}
293
294/* v4l2_rect helper function: copy the width/height values */
295void rect_set_size_to(struct v4l2_rect *r, const struct v4l2_rect *size)
296{
297 r->width = size->width;
298 r->height = size->height;
299}
300
301/* v4l2_rect helper function: width and height of r should be >= min_size */
302void rect_set_min_size(struct v4l2_rect *r, const struct v4l2_rect *min_size)
303{
304 if (r->width < min_size->width)
305 r->width = min_size->width;
306 if (r->height < min_size->height)
307 r->height = min_size->height;
308}
309
310/* v4l2_rect helper function: width and height of r should be <= max_size */
311void rect_set_max_size(struct v4l2_rect *r, const struct v4l2_rect *max_size)
312{
313 if (r->width > max_size->width)
314 r->width = max_size->width;
315 if (r->height > max_size->height)
316 r->height = max_size->height;
317}
318
319/* v4l2_rect helper function: r should be inside boundary */
320void rect_map_inside(struct v4l2_rect *r, const struct v4l2_rect *boundary)
321{
322 rect_set_max_size(r, boundary);
323 if (r->left < boundary->left)
324 r->left = boundary->left;
325 if (r->top < boundary->top)
326 r->top = boundary->top;
327 if (r->left + r->width > boundary->width)
328 r->left = boundary->width - r->width;
329 if (r->top + r->height > boundary->height)
330 r->top = boundary->height - r->height;
331}
332
333/* v4l2_rect helper function: return true if r1 has the same size as r2 */
334bool rect_same_size(const struct v4l2_rect *r1, const struct v4l2_rect *r2)
335{
336 return r1->width == r2->width && r1->height == r2->height;
337}
338
339/* v4l2_rect helper function: calculate the intersection of two rects */
340struct v4l2_rect rect_intersect(const struct v4l2_rect *a, const struct v4l2_rect *b)
341{
342 struct v4l2_rect r;
343 int right, bottom;
344
345 r.top = max(a->top, b->top);
346 r.left = max(a->left, b->left);
347 bottom = min(a->top + a->height, b->top + b->height);
348 right = min(a->left + a->width, b->left + b->width);
349 r.height = max(0, bottom - r.top);
350 r.width = max(0, right - r.left);
351 return r;
352}
353
354/*
355 * v4l2_rect helper function: scale rect r by to->width / from->width and
356 * to->height / from->height.
357 */
358void rect_scale(struct v4l2_rect *r, const struct v4l2_rect *from,
359 const struct v4l2_rect *to)
360{
361 if (from->width == 0 || from->height == 0) {
362 r->left = r->top = r->width = r->height = 0;
363 return;
364 }
365 r->left = (((r->left - from->left) * to->width) / from->width) & ~1;
366 r->width = ((r->width * to->width) / from->width) & ~1;
367 r->top = ((r->top - from->top) * to->height) / from->height;
368 r->height = (r->height * to->height) / from->height;
369}
370
371bool rect_overlap(const struct v4l2_rect *r1, const struct v4l2_rect *r2)
372{
373 /*
374 * IF the left side of r1 is to the right of the right side of r2 OR
375 * the left side of r2 is to the right of the right side of r1 THEN
376 * they do not overlap.
377 */
378 if (r1->left >= r2->left + r2->width ||
379 r2->left >= r1->left + r1->width)
380 return false;
381 /*
382 * IF the top side of r1 is below the bottom of r2 OR
383 * the top side of r2 is below the bottom of r1 THEN
384 * they do not overlap.
385 */
386 if (r1->top >= r2->top + r2->height ||
387 r2->top >= r1->top + r1->height)
388 return false;
389 return true;
390}
391int vivid_vid_adjust_sel(unsigned flags, struct v4l2_rect *r)
392{
393 unsigned w = r->width;
394 unsigned h = r->height;
395
396 if (!(flags & V4L2_SEL_FLAG_LE)) {
397 w++;
398 h++;
399 if (w < 2)
400 w = 2;
401 if (h < 2)
402 h = 2;
403 }
404 if (!(flags & V4L2_SEL_FLAG_GE)) {
405 if (w > MAX_WIDTH)
406 w = MAX_WIDTH;
407 if (h > MAX_HEIGHT)
408 h = MAX_HEIGHT;
409 }
410 w = w & ~1;
411 h = h & ~1;
412 if (w < 2 || h < 2)
413 return -ERANGE;
414 if (w > MAX_WIDTH || h > MAX_HEIGHT)
415 return -ERANGE;
416 if (r->top < 0)
417 r->top = 0;
418 if (r->left < 0)
419 r->left = 0;
420 r->left &= ~1;
421 r->top &= ~1;
422 if (r->left + w > MAX_WIDTH)
423 r->left = MAX_WIDTH - w;
424 if (r->top + h > MAX_HEIGHT)
425 r->top = MAX_HEIGHT - h;
426 if ((flags & (V4L2_SEL_FLAG_GE | V4L2_SEL_FLAG_LE)) ==
427 (V4L2_SEL_FLAG_GE | V4L2_SEL_FLAG_LE) &&
428 (r->width != w || r->height != h))
429 return -ERANGE;
430 r->width = w;
431 r->height = h;
432 return 0;
433}
434
435int vivid_enum_fmt_vid(struct file *file, void *priv,
436 struct v4l2_fmtdesc *f)
437{
438 struct vivid_dev *dev = video_drvdata(file);
439 const struct vivid_fmt *fmt;
440
441 if (f->index >= ARRAY_SIZE(vivid_formats) -
442 (dev->multiplanar ? 0 : VIVID_MPLANAR_FORMATS))
443 return -EINVAL;
444
445 fmt = &vivid_formats[f->index];
446
447 strlcpy(f->description, fmt->name, sizeof(f->description));
448 f->pixelformat = fmt->fourcc;
449 return 0;
450}
451
452int vidioc_enum_fmt_vid_mplane(struct file *file, void *priv,
453 struct v4l2_fmtdesc *f)
454{
455 struct vivid_dev *dev = video_drvdata(file);
456
457 if (!dev->multiplanar)
458 return -ENOTTY;
459 return vivid_enum_fmt_vid(file, priv, f);
460}
461
462int vidioc_enum_fmt_vid(struct file *file, void *priv,
463 struct v4l2_fmtdesc *f)
464{
465 struct vivid_dev *dev = video_drvdata(file);
466
467 if (dev->multiplanar)
468 return -ENOTTY;
469 return vivid_enum_fmt_vid(file, priv, f);
470}
471
472int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *id)
473{
474 struct vivid_dev *dev = video_drvdata(file);
475 struct video_device *vdev = video_devdata(file);
476
477 if (vdev->vfl_dir == VFL_DIR_RX) {
478 if (!vivid_is_sdtv_cap(dev))
479 return -ENODATA;
480 *id = dev->std_cap;
481 } else {
482 if (!vivid_is_svid_out(dev))
483 return -ENODATA;
484 *id = dev->std_out;
485 }
486 return 0;
487}
488
489int vidioc_g_dv_timings(struct file *file, void *_fh,
490 struct v4l2_dv_timings *timings)
491{
492 struct vivid_dev *dev = video_drvdata(file);
493 struct video_device *vdev = video_devdata(file);
494
495 if (vdev->vfl_dir == VFL_DIR_RX) {
496 if (!vivid_is_hdmi_cap(dev))
497 return -ENODATA;
498 *timings = dev->dv_timings_cap;
499 } else {
500 if (!vivid_is_hdmi_out(dev))
501 return -ENODATA;
502 *timings = dev->dv_timings_out;
503 }
504 return 0;
505}
506
507int vidioc_enum_dv_timings(struct file *file, void *_fh,
508 struct v4l2_enum_dv_timings *timings)
509{
510 struct vivid_dev *dev = video_drvdata(file);
511 struct video_device *vdev = video_devdata(file);
512
513 if (vdev->vfl_dir == VFL_DIR_RX) {
514 if (!vivid_is_hdmi_cap(dev))
515 return -ENODATA;
516 } else {
517 if (!vivid_is_hdmi_out(dev))
518 return -ENODATA;
519 }
520 return v4l2_enum_dv_timings_cap(timings, &vivid_dv_timings_cap,
521 NULL, NULL);
522}
523
524int vidioc_dv_timings_cap(struct file *file, void *_fh,
525 struct v4l2_dv_timings_cap *cap)
526{
527 struct vivid_dev *dev = video_drvdata(file);
528 struct video_device *vdev = video_devdata(file);
529
530 if (vdev->vfl_dir == VFL_DIR_RX) {
531 if (!vivid_is_hdmi_cap(dev))
532 return -ENODATA;
533 } else {
534 if (!vivid_is_hdmi_out(dev))
535 return -ENODATA;
536 }
537 *cap = vivid_dv_timings_cap;
538 return 0;
539}
540
541int vidioc_g_edid(struct file *file, void *_fh,
542 struct v4l2_edid *edid)
543{
544 struct vivid_dev *dev = video_drvdata(file);
545 struct video_device *vdev = video_devdata(file);
546
547 memset(edid->reserved, 0, sizeof(edid->reserved));
548 if (vdev->vfl_dir == VFL_DIR_RX) {
549 if (edid->pad >= dev->num_inputs)
550 return -EINVAL;
551 if (dev->input_type[edid->pad] != HDMI)
552 return -EINVAL;
553 } else {
554 if (edid->pad >= dev->num_outputs)
555 return -EINVAL;
556 if (dev->output_type[edid->pad] != HDMI)
557 return -EINVAL;
558 }
559 if (edid->start_block == 0 && edid->blocks == 0) {
560 edid->blocks = dev->edid_blocks;
561 return 0;
562 }
563 if (dev->edid_blocks == 0)
564 return -ENODATA;
565 if (edid->start_block >= dev->edid_blocks)
566 return -EINVAL;
567 if (edid->start_block + edid->blocks > dev->edid_blocks)
568 edid->blocks = dev->edid_blocks - edid->start_block;
569 memcpy(edid->edid, dev->edid, edid->blocks * 128);
570 return 0;
571}
diff --git a/drivers/media/platform/vivid/vivid-vid-common.h b/drivers/media/platform/vivid/vivid-vid-common.h
new file mode 100644
index 000000000000..3ec4fa85c9b9
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-vid-common.h
@@ -0,0 +1,61 @@
1/*
2 * vivid-vid-common.h - common video support functions.
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#ifndef _VIVID_VID_COMMON_H_
21#define _VIVID_VID_COMMON_H_
22
23typedef int (*fmtfunc)(struct file *file, void *priv, struct v4l2_format *f);
24
25/*
26 * Conversion function that converts a single-planar format to a
27 * single-plane multiplanar format.
28 */
29void fmt_sp2mp(const struct v4l2_format *sp_fmt, struct v4l2_format *mp_fmt);
30int fmt_sp2mp_func(struct file *file, void *priv,
31 struct v4l2_format *f, fmtfunc func);
32
33extern const struct v4l2_dv_timings_cap vivid_dv_timings_cap;
34
35const struct vivid_fmt *vivid_get_format(struct vivid_dev *dev, u32 pixelformat);
36
37bool vivid_vid_can_loop(struct vivid_dev *dev);
38void vivid_send_source_change(struct vivid_dev *dev, unsigned type);
39
40bool rect_overlap(const struct v4l2_rect *r1, const struct v4l2_rect *r2);
41void rect_set_size_to(struct v4l2_rect *r, const struct v4l2_rect *size);
42void rect_set_min_size(struct v4l2_rect *r, const struct v4l2_rect *min_size);
43void rect_set_max_size(struct v4l2_rect *r, const struct v4l2_rect *max_size);
44void rect_map_inside(struct v4l2_rect *r, const struct v4l2_rect *boundary);
45bool rect_same_size(const struct v4l2_rect *r1, const struct v4l2_rect *r2);
46struct v4l2_rect rect_intersect(const struct v4l2_rect *a, const struct v4l2_rect *b);
47void rect_scale(struct v4l2_rect *r, const struct v4l2_rect *from,
48 const struct v4l2_rect *to);
49int vivid_vid_adjust_sel(unsigned flags, struct v4l2_rect *r);
50
51int vivid_enum_fmt_vid(struct file *file, void *priv, struct v4l2_fmtdesc *f);
52int vidioc_enum_fmt_vid_mplane(struct file *file, void *priv, struct v4l2_fmtdesc *f);
53int vidioc_enum_fmt_vid(struct file *file, void *priv, struct v4l2_fmtdesc *f);
54int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *id);
55int vidioc_g_dv_timings(struct file *file, void *_fh, struct v4l2_dv_timings *timings);
56int vidioc_enum_dv_timings(struct file *file, void *_fh, struct v4l2_enum_dv_timings *timings);
57int vidioc_dv_timings_cap(struct file *file, void *_fh, struct v4l2_dv_timings_cap *cap);
58int vidioc_g_edid(struct file *file, void *_fh, struct v4l2_edid *edid);
59int vidioc_subscribe_event(struct v4l2_fh *fh, const struct v4l2_event_subscription *sub);
60
61#endif
diff --git a/drivers/media/platform/vivid/vivid-vid-out.c b/drivers/media/platform/vivid/vivid-vid-out.c
new file mode 100644
index 000000000000..69c2dbd2d165
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-vid-out.c
@@ -0,0 +1,1146 @@
1/*
2 * vivid-vid-out.c - video output support functions.
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#include <linux/errno.h>
21#include <linux/kernel.h>
22#include <linux/sched.h>
23#include <linux/videodev2.h>
24#include <linux/v4l2-dv-timings.h>
25#include <media/v4l2-common.h>
26#include <media/v4l2-event.h>
27#include <media/v4l2-dv-timings.h>
28
29#include "vivid-core.h"
30#include "vivid-vid-common.h"
31#include "vivid-kthread-out.h"
32#include "vivid-vid-out.h"
33
34static int vid_out_queue_setup(struct vb2_queue *vq, const struct v4l2_format *fmt,
35 unsigned *nbuffers, unsigned *nplanes,
36 unsigned sizes[], void *alloc_ctxs[])
37{
38 struct vivid_dev *dev = vb2_get_drv_priv(vq);
39 unsigned planes = dev->fmt_out->planes;
40 unsigned h = dev->fmt_out_rect.height;
41 unsigned size = dev->bytesperline_out[0] * h;
42
43 if (dev->field_out == V4L2_FIELD_ALTERNATE) {
44 /*
45 * You cannot use write() with FIELD_ALTERNATE since the field
46 * information (TOP/BOTTOM) cannot be passed to the kernel.
47 */
48 if (vb2_fileio_is_active(vq))
49 return -EINVAL;
50 }
51
52 if (dev->queue_setup_error) {
53 /*
54 * Error injection: test what happens if queue_setup() returns
55 * an error.
56 */
57 dev->queue_setup_error = false;
58 return -EINVAL;
59 }
60
61 if (fmt) {
62 const struct v4l2_pix_format_mplane *mp;
63 struct v4l2_format mp_fmt;
64
65 if (!V4L2_TYPE_IS_MULTIPLANAR(fmt->type)) {
66 fmt_sp2mp(fmt, &mp_fmt);
67 fmt = &mp_fmt;
68 }
69 mp = &fmt->fmt.pix_mp;
70 /*
71 * Check if the number of planes in the specified format match
72 * the number of planes in the current format. You can't mix that.
73 */
74 if (mp->num_planes != planes)
75 return -EINVAL;
76 sizes[0] = mp->plane_fmt[0].sizeimage;
77 if (planes == 2) {
78 sizes[1] = mp->plane_fmt[1].sizeimage;
79 if (sizes[0] < dev->bytesperline_out[0] * h ||
80 sizes[1] < dev->bytesperline_out[1] * h)
81 return -EINVAL;
82 } else if (sizes[0] < size) {
83 return -EINVAL;
84 }
85 } else {
86 if (planes == 2) {
87 sizes[0] = dev->bytesperline_out[0] * h;
88 sizes[1] = dev->bytesperline_out[1] * h;
89 } else {
90 sizes[0] = size;
91 }
92 }
93
94 if (vq->num_buffers + *nbuffers < 2)
95 *nbuffers = 2 - vq->num_buffers;
96
97 *nplanes = planes;
98
99 /*
100 * videobuf2-vmalloc allocator is context-less so no need to set
101 * alloc_ctxs array.
102 */
103
104 if (planes == 2)
105 dprintk(dev, 1, "%s, count=%d, sizes=%u, %u\n", __func__,
106 *nbuffers, sizes[0], sizes[1]);
107 else
108 dprintk(dev, 1, "%s, count=%d, size=%u\n", __func__,
109 *nbuffers, sizes[0]);
110 return 0;
111}
112
113static int vid_out_buf_prepare(struct vb2_buffer *vb)
114{
115 struct vivid_dev *dev = vb2_get_drv_priv(vb->vb2_queue);
116 unsigned long size;
117 unsigned planes = dev->fmt_out->planes;
118 unsigned p;
119
120 dprintk(dev, 1, "%s\n", __func__);
121
122 if (WARN_ON(NULL == dev->fmt_out))
123 return -EINVAL;
124
125 if (dev->buf_prepare_error) {
126 /*
127 * Error injection: test what happens if buf_prepare() returns
128 * an error.
129 */
130 dev->buf_prepare_error = false;
131 return -EINVAL;
132 }
133
134 if (dev->field_out != V4L2_FIELD_ALTERNATE)
135 vb->v4l2_buf.field = dev->field_out;
136 else if (vb->v4l2_buf.field != V4L2_FIELD_TOP &&
137 vb->v4l2_buf.field != V4L2_FIELD_BOTTOM)
138 return -EINVAL;
139
140 for (p = 0; p < planes; p++) {
141 size = dev->bytesperline_out[p] * dev->fmt_out_rect.height +
142 vb->v4l2_planes[p].data_offset;
143
144 if (vb2_get_plane_payload(vb, p) < size) {
145 dprintk(dev, 1, "%s the payload is too small for plane %u (%lu < %lu)\n",
146 __func__, p, vb2_get_plane_payload(vb, p), size);
147 return -EINVAL;
148 }
149 }
150
151 return 0;
152}
153
154static void vid_out_buf_queue(struct vb2_buffer *vb)
155{
156 struct vivid_dev *dev = vb2_get_drv_priv(vb->vb2_queue);
157 struct vivid_buffer *buf = container_of(vb, struct vivid_buffer, vb);
158
159 dprintk(dev, 1, "%s\n", __func__);
160
161 spin_lock(&dev->slock);
162 list_add_tail(&buf->list, &dev->vid_out_active);
163 spin_unlock(&dev->slock);
164}
165
166static int vid_out_start_streaming(struct vb2_queue *vq, unsigned count)
167{
168 struct vivid_dev *dev = vb2_get_drv_priv(vq);
169 int err;
170
171 if (vb2_is_streaming(&dev->vb_vid_cap_q))
172 dev->can_loop_video = vivid_vid_can_loop(dev);
173
174 if (dev->kthread_vid_out)
175 return 0;
176
177 dev->vid_out_seq_count = 0;
178 dprintk(dev, 1, "%s\n", __func__);
179 if (dev->start_streaming_error) {
180 dev->start_streaming_error = false;
181 err = -EINVAL;
182 } else {
183 err = vivid_start_generating_vid_out(dev, &dev->vid_out_streaming);
184 }
185 if (err) {
186 struct vivid_buffer *buf, *tmp;
187
188 list_for_each_entry_safe(buf, tmp, &dev->vid_out_active, list) {
189 list_del(&buf->list);
190 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_QUEUED);
191 }
192 }
193 return err;
194}
195
196/* abort streaming and wait for last buffer */
197static void vid_out_stop_streaming(struct vb2_queue *vq)
198{
199 struct vivid_dev *dev = vb2_get_drv_priv(vq);
200
201 dprintk(dev, 1, "%s\n", __func__);
202 vivid_stop_generating_vid_out(dev, &dev->vid_out_streaming);
203 dev->can_loop_video = false;
204}
205
206const struct vb2_ops vivid_vid_out_qops = {
207 .queue_setup = vid_out_queue_setup,
208 .buf_prepare = vid_out_buf_prepare,
209 .buf_queue = vid_out_buf_queue,
210 .start_streaming = vid_out_start_streaming,
211 .stop_streaming = vid_out_stop_streaming,
212 .wait_prepare = vivid_unlock,
213 .wait_finish = vivid_lock,
214};
215
216/*
217 * Called whenever the format has to be reset which can occur when
218 * changing outputs, standard, timings, etc.
219 */
220void vivid_update_format_out(struct vivid_dev *dev)
221{
222 struct v4l2_bt_timings *bt = &dev->dv_timings_out.bt;
223 unsigned size;
224
225 switch (dev->output_type[dev->output]) {
226 case SVID:
227 default:
228 dev->field_out = dev->tv_field_out;
229 dev->sink_rect.width = 720;
230 if (dev->std_out & V4L2_STD_525_60) {
231 dev->sink_rect.height = 480;
232 dev->timeperframe_vid_out = (struct v4l2_fract) { 1001, 30000 };
233 dev->service_set_out = V4L2_SLICED_CAPTION_525;
234 } else {
235 dev->sink_rect.height = 576;
236 dev->timeperframe_vid_out = (struct v4l2_fract) { 1000, 25000 };
237 dev->service_set_out = V4L2_SLICED_WSS_625 | V4L2_SLICED_TELETEXT_B;
238 }
239 dev->colorspace_out = V4L2_COLORSPACE_SMPTE170M;
240 break;
241 case HDMI:
242 dev->sink_rect.width = bt->width;
243 dev->sink_rect.height = bt->height;
244 size = V4L2_DV_BT_FRAME_WIDTH(bt) * V4L2_DV_BT_FRAME_HEIGHT(bt);
245 dev->timeperframe_vid_out = (struct v4l2_fract) {
246 size / 100, (u32)bt->pixelclock / 100
247 };
248 if (bt->interlaced)
249 dev->field_out = V4L2_FIELD_ALTERNATE;
250 else
251 dev->field_out = V4L2_FIELD_NONE;
252 if (!dev->dvi_d_out && (bt->standards & V4L2_DV_BT_STD_CEA861)) {
253 if (bt->width == 720 && bt->height <= 576)
254 dev->colorspace_out = V4L2_COLORSPACE_SMPTE170M;
255 else
256 dev->colorspace_out = V4L2_COLORSPACE_REC709;
257 } else {
258 dev->colorspace_out = V4L2_COLORSPACE_SRGB;
259 }
260 break;
261 }
262 dev->compose_out = dev->sink_rect;
263 dev->compose_bounds_out = dev->sink_rect;
264 dev->crop_out = dev->compose_out;
265 if (V4L2_FIELD_HAS_T_OR_B(dev->field_out))
266 dev->crop_out.height /= 2;
267 dev->fmt_out_rect = dev->crop_out;
268 dev->bytesperline_out[0] = (dev->sink_rect.width * dev->fmt_out->depth) / 8;
269 if (dev->fmt_out->planes == 2)
270 dev->bytesperline_out[1] = (dev->sink_rect.width * dev->fmt_out->depth) / 8;
271}
272
273/* Map the field to something that is valid for the current output */
274static enum v4l2_field vivid_field_out(struct vivid_dev *dev, enum v4l2_field field)
275{
276 if (vivid_is_svid_out(dev)) {
277 switch (field) {
278 case V4L2_FIELD_INTERLACED_TB:
279 case V4L2_FIELD_INTERLACED_BT:
280 case V4L2_FIELD_SEQ_TB:
281 case V4L2_FIELD_SEQ_BT:
282 case V4L2_FIELD_ALTERNATE:
283 return field;
284 case V4L2_FIELD_INTERLACED:
285 default:
286 return V4L2_FIELD_INTERLACED;
287 }
288 }
289 if (vivid_is_hdmi_out(dev))
290 return dev->dv_timings_out.bt.interlaced ? V4L2_FIELD_ALTERNATE :
291 V4L2_FIELD_NONE;
292 return V4L2_FIELD_NONE;
293}
294
295static enum tpg_pixel_aspect vivid_get_pixel_aspect(const struct vivid_dev *dev)
296{
297 if (vivid_is_svid_out(dev))
298 return (dev->std_out & V4L2_STD_525_60) ?
299 TPG_PIXEL_ASPECT_NTSC : TPG_PIXEL_ASPECT_PAL;
300
301 if (vivid_is_hdmi_out(dev) &&
302 dev->sink_rect.width == 720 && dev->sink_rect.height <= 576)
303 return dev->sink_rect.height == 480 ?
304 TPG_PIXEL_ASPECT_NTSC : TPG_PIXEL_ASPECT_PAL;
305
306 return TPG_PIXEL_ASPECT_SQUARE;
307}
308
309int vivid_g_fmt_vid_out(struct file *file, void *priv,
310 struct v4l2_format *f)
311{
312 struct vivid_dev *dev = video_drvdata(file);
313 struct v4l2_pix_format_mplane *mp = &f->fmt.pix_mp;
314 unsigned p;
315
316 mp->width = dev->fmt_out_rect.width;
317 mp->height = dev->fmt_out_rect.height;
318 mp->field = dev->field_out;
319 mp->pixelformat = dev->fmt_out->fourcc;
320 mp->colorspace = dev->colorspace_out;
321 mp->num_planes = dev->fmt_out->planes;
322 for (p = 0; p < mp->num_planes; p++) {
323 mp->plane_fmt[p].bytesperline = dev->bytesperline_out[p];
324 mp->plane_fmt[p].sizeimage =
325 mp->plane_fmt[p].bytesperline * mp->height;
326 }
327 return 0;
328}
329
330int vivid_try_fmt_vid_out(struct file *file, void *priv,
331 struct v4l2_format *f)
332{
333 struct vivid_dev *dev = video_drvdata(file);
334 struct v4l2_bt_timings *bt = &dev->dv_timings_out.bt;
335 struct v4l2_pix_format_mplane *mp = &f->fmt.pix_mp;
336 struct v4l2_plane_pix_format *pfmt = mp->plane_fmt;
337 const struct vivid_fmt *fmt;
338 unsigned bytesperline, max_bpl;
339 unsigned factor = 1;
340 unsigned w, h;
341 unsigned p;
342
343 fmt = vivid_get_format(dev, mp->pixelformat);
344 if (!fmt) {
345 dprintk(dev, 1, "Fourcc format (0x%08x) unknown.\n",
346 mp->pixelformat);
347 mp->pixelformat = V4L2_PIX_FMT_YUYV;
348 fmt = vivid_get_format(dev, mp->pixelformat);
349 }
350
351 mp->field = vivid_field_out(dev, mp->field);
352 if (vivid_is_svid_out(dev)) {
353 w = 720;
354 h = (dev->std_out & V4L2_STD_525_60) ? 480 : 576;
355 } else {
356 w = dev->sink_rect.width;
357 h = dev->sink_rect.height;
358 }
359 if (V4L2_FIELD_HAS_T_OR_B(mp->field))
360 factor = 2;
361 if (!dev->has_scaler_out && !dev->has_crop_out && !dev->has_compose_out) {
362 mp->width = w;
363 mp->height = h / factor;
364 } else {
365 struct v4l2_rect r = { 0, 0, mp->width, mp->height * factor };
366
367 rect_set_min_size(&r, &vivid_min_rect);
368 rect_set_max_size(&r, &vivid_max_rect);
369 if (dev->has_scaler_out && !dev->has_crop_out) {
370 struct v4l2_rect max_r = { 0, 0, MAX_ZOOM * w, MAX_ZOOM * h };
371
372 rect_set_max_size(&r, &max_r);
373 } else if (!dev->has_scaler_out && dev->has_compose_out && !dev->has_crop_out) {
374 rect_set_max_size(&r, &dev->sink_rect);
375 } else if (!dev->has_scaler_out && !dev->has_compose_out) {
376 rect_set_min_size(&r, &dev->sink_rect);
377 }
378 mp->width = r.width;
379 mp->height = r.height / factor;
380 }
381
382 /* This driver supports custom bytesperline values */
383
384 /* Calculate the minimum supported bytesperline value */
385 bytesperline = (mp->width * fmt->depth) >> 3;
386 /* Calculate the maximum supported bytesperline value */
387 max_bpl = (MAX_ZOOM * MAX_WIDTH * fmt->depth) >> 3;
388 mp->num_planes = fmt->planes;
389 for (p = 0; p < mp->num_planes; p++) {
390 if (pfmt[p].bytesperline > max_bpl)
391 pfmt[p].bytesperline = max_bpl;
392 if (pfmt[p].bytesperline < bytesperline)
393 pfmt[p].bytesperline = bytesperline;
394 pfmt[p].sizeimage = pfmt[p].bytesperline * mp->height;
395 memset(pfmt[p].reserved, 0, sizeof(pfmt[p].reserved));
396 }
397 if (vivid_is_svid_out(dev))
398 mp->colorspace = V4L2_COLORSPACE_SMPTE170M;
399 else if (dev->dvi_d_out || !(bt->standards & V4L2_DV_BT_STD_CEA861))
400 mp->colorspace = V4L2_COLORSPACE_SRGB;
401 else if (bt->width == 720 && bt->height <= 576)
402 mp->colorspace = V4L2_COLORSPACE_SMPTE170M;
403 else if (mp->colorspace != V4L2_COLORSPACE_SMPTE170M &&
404 mp->colorspace != V4L2_COLORSPACE_REC709 &&
405 mp->colorspace != V4L2_COLORSPACE_SRGB)
406 mp->colorspace = V4L2_COLORSPACE_REC709;
407 memset(mp->reserved, 0, sizeof(mp->reserved));
408 return 0;
409}
410
411int vivid_s_fmt_vid_out(struct file *file, void *priv,
412 struct v4l2_format *f)
413{
414 struct v4l2_pix_format_mplane *mp = &f->fmt.pix_mp;
415 struct vivid_dev *dev = video_drvdata(file);
416 struct v4l2_rect *crop = &dev->crop_out;
417 struct v4l2_rect *compose = &dev->compose_out;
418 struct vb2_queue *q = &dev->vb_vid_out_q;
419 int ret = vivid_try_fmt_vid_out(file, priv, f);
420 unsigned factor = 1;
421
422 if (ret < 0)
423 return ret;
424
425 if (vb2_is_busy(q) &&
426 (vivid_is_svid_out(dev) ||
427 mp->width != dev->fmt_out_rect.width ||
428 mp->height != dev->fmt_out_rect.height ||
429 mp->pixelformat != dev->fmt_out->fourcc ||
430 mp->field != dev->field_out)) {
431 dprintk(dev, 1, "%s device busy\n", __func__);
432 return -EBUSY;
433 }
434
435 /*
436 * Allow for changing the colorspace on the fly. Useful for testing
437 * purposes, and it is something that HDMI transmitters are able
438 * to do.
439 */
440 if (vb2_is_busy(q))
441 goto set_colorspace;
442
443 dev->fmt_out = vivid_get_format(dev, mp->pixelformat);
444 if (V4L2_FIELD_HAS_T_OR_B(mp->field))
445 factor = 2;
446
447 if (dev->has_scaler_out || dev->has_crop_out || dev->has_compose_out) {
448 struct v4l2_rect r = { 0, 0, mp->width, mp->height };
449
450 if (dev->has_scaler_out) {
451 if (dev->has_crop_out)
452 rect_map_inside(crop, &r);
453 else
454 *crop = r;
455 if (dev->has_compose_out && !dev->has_crop_out) {
456 struct v4l2_rect min_r = {
457 0, 0,
458 r.width / MAX_ZOOM,
459 factor * r.height / MAX_ZOOM
460 };
461 struct v4l2_rect max_r = {
462 0, 0,
463 r.width * MAX_ZOOM,
464 factor * r.height * MAX_ZOOM
465 };
466
467 rect_set_min_size(compose, &min_r);
468 rect_set_max_size(compose, &max_r);
469 rect_map_inside(compose, &dev->compose_bounds_out);
470 } else if (dev->has_compose_out) {
471 struct v4l2_rect min_r = {
472 0, 0,
473 crop->width / MAX_ZOOM,
474 factor * crop->height / MAX_ZOOM
475 };
476 struct v4l2_rect max_r = {
477 0, 0,
478 crop->width * MAX_ZOOM,
479 factor * crop->height * MAX_ZOOM
480 };
481
482 rect_set_min_size(compose, &min_r);
483 rect_set_max_size(compose, &max_r);
484 rect_map_inside(compose, &dev->compose_bounds_out);
485 }
486 } else if (dev->has_compose_out && !dev->has_crop_out) {
487 rect_set_size_to(crop, &r);
488 r.height *= factor;
489 rect_set_size_to(compose, &r);
490 rect_map_inside(compose, &dev->compose_bounds_out);
491 } else if (!dev->has_compose_out) {
492 rect_map_inside(crop, &r);
493 r.height /= factor;
494 rect_set_size_to(compose, &r);
495 } else {
496 r.height *= factor;
497 rect_set_max_size(compose, &r);
498 rect_map_inside(compose, &dev->compose_bounds_out);
499 crop->top *= factor;
500 crop->height *= factor;
501 rect_set_size_to(crop, compose);
502 rect_map_inside(crop, &r);
503 crop->top /= factor;
504 crop->height /= factor;
505 }
506 } else {
507 struct v4l2_rect r = { 0, 0, mp->width, mp->height };
508
509 rect_set_size_to(crop, &r);
510 r.height /= factor;
511 rect_set_size_to(compose, &r);
512 }
513
514 dev->fmt_out_rect.width = mp->width;
515 dev->fmt_out_rect.height = mp->height;
516 dev->bytesperline_out[0] = mp->plane_fmt[0].bytesperline;
517 if (mp->num_planes > 1)
518 dev->bytesperline_out[1] = mp->plane_fmt[1].bytesperline;
519 dev->field_out = mp->field;
520 if (vivid_is_svid_out(dev))
521 dev->tv_field_out = mp->field;
522
523set_colorspace:
524 dev->colorspace_out = mp->colorspace;
525 if (dev->loop_video) {
526 vivid_send_source_change(dev, SVID);
527 vivid_send_source_change(dev, HDMI);
528 }
529 return 0;
530}
531
532int vidioc_g_fmt_vid_out_mplane(struct file *file, void *priv,
533 struct v4l2_format *f)
534{
535 struct vivid_dev *dev = video_drvdata(file);
536
537 if (!dev->multiplanar)
538 return -ENOTTY;
539 return vivid_g_fmt_vid_out(file, priv, f);
540}
541
542int vidioc_try_fmt_vid_out_mplane(struct file *file, void *priv,
543 struct v4l2_format *f)
544{
545 struct vivid_dev *dev = video_drvdata(file);
546
547 if (!dev->multiplanar)
548 return -ENOTTY;
549 return vivid_try_fmt_vid_out(file, priv, f);
550}
551
552int vidioc_s_fmt_vid_out_mplane(struct file *file, void *priv,
553 struct v4l2_format *f)
554{
555 struct vivid_dev *dev = video_drvdata(file);
556
557 if (!dev->multiplanar)
558 return -ENOTTY;
559 return vivid_s_fmt_vid_out(file, priv, f);
560}
561
562int vidioc_g_fmt_vid_out(struct file *file, void *priv,
563 struct v4l2_format *f)
564{
565 struct vivid_dev *dev = video_drvdata(file);
566
567 if (dev->multiplanar)
568 return -ENOTTY;
569 return fmt_sp2mp_func(file, priv, f, vivid_g_fmt_vid_out);
570}
571
572int vidioc_try_fmt_vid_out(struct file *file, void *priv,
573 struct v4l2_format *f)
574{
575 struct vivid_dev *dev = video_drvdata(file);
576
577 if (dev->multiplanar)
578 return -ENOTTY;
579 return fmt_sp2mp_func(file, priv, f, vivid_try_fmt_vid_out);
580}
581
582int vidioc_s_fmt_vid_out(struct file *file, void *priv,
583 struct v4l2_format *f)
584{
585 struct vivid_dev *dev = video_drvdata(file);
586
587 if (dev->multiplanar)
588 return -ENOTTY;
589 return fmt_sp2mp_func(file, priv, f, vivid_s_fmt_vid_out);
590}
591
592int vivid_vid_out_g_selection(struct file *file, void *priv,
593 struct v4l2_selection *sel)
594{
595 struct vivid_dev *dev = video_drvdata(file);
596
597 if (!dev->has_crop_out && !dev->has_compose_out)
598 return -ENOTTY;
599 if (sel->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
600 return -EINVAL;
601
602 sel->r.left = sel->r.top = 0;
603 switch (sel->target) {
604 case V4L2_SEL_TGT_CROP:
605 if (!dev->has_crop_out)
606 return -EINVAL;
607 sel->r = dev->crop_out;
608 break;
609 case V4L2_SEL_TGT_CROP_DEFAULT:
610 if (!dev->has_crop_out)
611 return -EINVAL;
612 sel->r = dev->fmt_out_rect;
613 break;
614 case V4L2_SEL_TGT_CROP_BOUNDS:
615 if (!dev->has_compose_out)
616 return -EINVAL;
617 sel->r = vivid_max_rect;
618 break;
619 case V4L2_SEL_TGT_COMPOSE:
620 if (!dev->has_compose_out)
621 return -EINVAL;
622 sel->r = dev->compose_out;
623 break;
624 case V4L2_SEL_TGT_COMPOSE_DEFAULT:
625 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
626 if (!dev->has_compose_out)
627 return -EINVAL;
628 sel->r = dev->sink_rect;
629 break;
630 default:
631 return -EINVAL;
632 }
633 return 0;
634}
635
636int vivid_vid_out_s_selection(struct file *file, void *fh, struct v4l2_selection *s)
637{
638 struct vivid_dev *dev = video_drvdata(file);
639 struct v4l2_rect *crop = &dev->crop_out;
640 struct v4l2_rect *compose = &dev->compose_out;
641 unsigned factor = V4L2_FIELD_HAS_T_OR_B(dev->field_out) ? 2 : 1;
642 int ret;
643
644 if (!dev->has_crop_out && !dev->has_compose_out)
645 return -ENOTTY;
646 if (s->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
647 return -EINVAL;
648
649 switch (s->target) {
650 case V4L2_SEL_TGT_CROP:
651 if (!dev->has_crop_out)
652 return -EINVAL;
653 ret = vivid_vid_adjust_sel(s->flags, &s->r);
654 if (ret)
655 return ret;
656 rect_set_min_size(&s->r, &vivid_min_rect);
657 rect_set_max_size(&s->r, &dev->fmt_out_rect);
658 if (dev->has_scaler_out) {
659 struct v4l2_rect max_rect = {
660 0, 0,
661 dev->sink_rect.width * MAX_ZOOM,
662 (dev->sink_rect.height / factor) * MAX_ZOOM
663 };
664
665 rect_set_max_size(&s->r, &max_rect);
666 if (dev->has_compose_out) {
667 struct v4l2_rect min_rect = {
668 0, 0,
669 s->r.width / MAX_ZOOM,
670 (s->r.height * factor) / MAX_ZOOM
671 };
672 struct v4l2_rect max_rect = {
673 0, 0,
674 s->r.width * MAX_ZOOM,
675 (s->r.height * factor) * MAX_ZOOM
676 };
677
678 rect_set_min_size(compose, &min_rect);
679 rect_set_max_size(compose, &max_rect);
680 rect_map_inside(compose, &dev->compose_bounds_out);
681 }
682 } else if (dev->has_compose_out) {
683 s->r.top *= factor;
684 s->r.height *= factor;
685 rect_set_max_size(&s->r, &dev->sink_rect);
686 rect_set_size_to(compose, &s->r);
687 rect_map_inside(compose, &dev->compose_bounds_out);
688 s->r.top /= factor;
689 s->r.height /= factor;
690 } else {
691 rect_set_size_to(&s->r, &dev->sink_rect);
692 s->r.height /= factor;
693 }
694 rect_map_inside(&s->r, &dev->fmt_out_rect);
695 *crop = s->r;
696 break;
697 case V4L2_SEL_TGT_COMPOSE:
698 if (!dev->has_compose_out)
699 return -EINVAL;
700 ret = vivid_vid_adjust_sel(s->flags, &s->r);
701 if (ret)
702 return ret;
703 rect_set_min_size(&s->r, &vivid_min_rect);
704 rect_set_max_size(&s->r, &dev->sink_rect);
705 rect_map_inside(&s->r, &dev->compose_bounds_out);
706 s->r.top /= factor;
707 s->r.height /= factor;
708 if (dev->has_scaler_out) {
709 struct v4l2_rect fmt = dev->fmt_out_rect;
710 struct v4l2_rect max_rect = {
711 0, 0,
712 s->r.width * MAX_ZOOM,
713 s->r.height * MAX_ZOOM
714 };
715 struct v4l2_rect min_rect = {
716 0, 0,
717 s->r.width / MAX_ZOOM,
718 s->r.height / MAX_ZOOM
719 };
720
721 rect_set_min_size(&fmt, &min_rect);
722 if (!dev->has_crop_out)
723 rect_set_max_size(&fmt, &max_rect);
724 if (!rect_same_size(&dev->fmt_out_rect, &fmt) &&
725 vb2_is_busy(&dev->vb_vid_out_q))
726 return -EBUSY;
727 if (dev->has_crop_out) {
728 rect_set_min_size(crop, &min_rect);
729 rect_set_max_size(crop, &max_rect);
730 }
731 dev->fmt_out_rect = fmt;
732 } else if (dev->has_crop_out) {
733 struct v4l2_rect fmt = dev->fmt_out_rect;
734
735 rect_set_min_size(&fmt, &s->r);
736 if (!rect_same_size(&dev->fmt_out_rect, &fmt) &&
737 vb2_is_busy(&dev->vb_vid_out_q))
738 return -EBUSY;
739 dev->fmt_out_rect = fmt;
740 rect_set_size_to(crop, &s->r);
741 rect_map_inside(crop, &dev->fmt_out_rect);
742 } else {
743 if (!rect_same_size(&s->r, &dev->fmt_out_rect) &&
744 vb2_is_busy(&dev->vb_vid_out_q))
745 return -EBUSY;
746 rect_set_size_to(&dev->fmt_out_rect, &s->r);
747 rect_set_size_to(crop, &s->r);
748 crop->height /= factor;
749 rect_map_inside(crop, &dev->fmt_out_rect);
750 }
751 s->r.top *= factor;
752 s->r.height *= factor;
753 if (dev->bitmap_out && (compose->width != s->r.width ||
754 compose->height != s->r.height)) {
755 kfree(dev->bitmap_out);
756 dev->bitmap_out = NULL;
757 }
758 *compose = s->r;
759 break;
760 default:
761 return -EINVAL;
762 }
763
764 return 0;
765}
766
767int vivid_vid_out_cropcap(struct file *file, void *priv,
768 struct v4l2_cropcap *cap)
769{
770 struct vivid_dev *dev = video_drvdata(file);
771
772 if (cap->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
773 return -EINVAL;
774
775 switch (vivid_get_pixel_aspect(dev)) {
776 case TPG_PIXEL_ASPECT_NTSC:
777 cap->pixelaspect.numerator = 11;
778 cap->pixelaspect.denominator = 10;
779 break;
780 case TPG_PIXEL_ASPECT_PAL:
781 cap->pixelaspect.numerator = 54;
782 cap->pixelaspect.denominator = 59;
783 break;
784 case TPG_PIXEL_ASPECT_SQUARE:
785 cap->pixelaspect.numerator = 1;
786 cap->pixelaspect.denominator = 1;
787 break;
788 }
789 return 0;
790}
791
792int vidioc_g_fmt_vid_out_overlay(struct file *file, void *priv,
793 struct v4l2_format *f)
794{
795 struct vivid_dev *dev = video_drvdata(file);
796 const struct v4l2_rect *compose = &dev->compose_out;
797 struct v4l2_window *win = &f->fmt.win;
798 unsigned clipcount = win->clipcount;
799
800 if (!dev->has_fb)
801 return -EINVAL;
802 win->w.top = dev->overlay_out_top;
803 win->w.left = dev->overlay_out_left;
804 win->w.width = compose->width;
805 win->w.height = compose->height;
806 win->clipcount = dev->clipcount_out;
807 win->field = V4L2_FIELD_ANY;
808 win->chromakey = dev->chromakey_out;
809 win->global_alpha = dev->global_alpha_out;
810 if (clipcount > dev->clipcount_out)
811 clipcount = dev->clipcount_out;
812 if (dev->bitmap_out == NULL)
813 win->bitmap = NULL;
814 else if (win->bitmap) {
815 if (copy_to_user(win->bitmap, dev->bitmap_out,
816 ((dev->compose_out.width + 7) / 8) * dev->compose_out.height))
817 return -EFAULT;
818 }
819 if (clipcount && win->clips) {
820 if (copy_to_user(win->clips, dev->clips_out,
821 clipcount * sizeof(dev->clips_out[0])))
822 return -EFAULT;
823 }
824 return 0;
825}
826
827int vidioc_try_fmt_vid_out_overlay(struct file *file, void *priv,
828 struct v4l2_format *f)
829{
830 struct vivid_dev *dev = video_drvdata(file);
831 const struct v4l2_rect *compose = &dev->compose_out;
832 struct v4l2_window *win = &f->fmt.win;
833 int i, j;
834
835 if (!dev->has_fb)
836 return -EINVAL;
837 win->w.left = clamp_t(int, win->w.left,
838 -dev->display_width, dev->display_width);
839 win->w.top = clamp_t(int, win->w.top,
840 -dev->display_height, dev->display_height);
841 win->w.width = compose->width;
842 win->w.height = compose->height;
843 /*
844 * It makes no sense for an OSD to overlay only top or bottom fields,
845 * so always set this to ANY.
846 */
847 win->field = V4L2_FIELD_ANY;
848 if (win->clipcount && !win->clips)
849 win->clipcount = 0;
850 if (win->clipcount > MAX_CLIPS)
851 win->clipcount = MAX_CLIPS;
852 if (win->clipcount) {
853 if (copy_from_user(dev->try_clips_out, win->clips,
854 win->clipcount * sizeof(dev->clips_out[0])))
855 return -EFAULT;
856 for (i = 0; i < win->clipcount; i++) {
857 struct v4l2_rect *r = &dev->try_clips_out[i].c;
858
859 r->top = clamp_t(s32, r->top, 0, dev->display_height - 1);
860 r->height = clamp_t(s32, r->height, 1, dev->display_height - r->top);
861 r->left = clamp_t(u32, r->left, 0, dev->display_width - 1);
862 r->width = clamp_t(u32, r->width, 1, dev->display_width - r->left);
863 }
864 /*
865 * Yeah, so sue me, it's an O(n^2) algorithm. But n is a small
866 * number and it's typically a one-time deal.
867 */
868 for (i = 0; i < win->clipcount - 1; i++) {
869 struct v4l2_rect *r1 = &dev->try_clips_out[i].c;
870
871 for (j = i + 1; j < win->clipcount; j++) {
872 struct v4l2_rect *r2 = &dev->try_clips_out[j].c;
873
874 if (rect_overlap(r1, r2))
875 return -EINVAL;
876 }
877 }
878 if (copy_to_user(win->clips, dev->try_clips_out,
879 win->clipcount * sizeof(dev->clips_out[0])))
880 return -EFAULT;
881 }
882 return 0;
883}
884
885int vidioc_s_fmt_vid_out_overlay(struct file *file, void *priv,
886 struct v4l2_format *f)
887{
888 struct vivid_dev *dev = video_drvdata(file);
889 const struct v4l2_rect *compose = &dev->compose_out;
890 struct v4l2_window *win = &f->fmt.win;
891 int ret = vidioc_try_fmt_vid_out_overlay(file, priv, f);
892 unsigned bitmap_size = ((compose->width + 7) / 8) * compose->height;
893 unsigned clips_size = win->clipcount * sizeof(dev->clips_out[0]);
894 void *new_bitmap = NULL;
895
896 if (ret)
897 return ret;
898
899 if (win->bitmap) {
900 new_bitmap = memdup_user(win->bitmap, bitmap_size);
901
902 if (IS_ERR(new_bitmap))
903 return PTR_ERR(new_bitmap);
904 }
905
906 dev->overlay_out_top = win->w.top;
907 dev->overlay_out_left = win->w.left;
908 kfree(dev->bitmap_out);
909 dev->bitmap_out = new_bitmap;
910 dev->clipcount_out = win->clipcount;
911 if (dev->clipcount_out)
912 memcpy(dev->clips_out, dev->try_clips_out, clips_size);
913 dev->chromakey_out = win->chromakey;
914 dev->global_alpha_out = win->global_alpha;
915 return ret;
916}
917
918int vivid_vid_out_overlay(struct file *file, void *fh, unsigned i)
919{
920 struct vivid_dev *dev = video_drvdata(file);
921
922 if (i && !dev->fmt_out->can_do_overlay) {
923 dprintk(dev, 1, "unsupported output format for output overlay\n");
924 return -EINVAL;
925 }
926
927 dev->overlay_out_enabled = i;
928 return 0;
929}
930
931int vivid_vid_out_g_fbuf(struct file *file, void *fh,
932 struct v4l2_framebuffer *a)
933{
934 struct vivid_dev *dev = video_drvdata(file);
935
936 a->capability = V4L2_FBUF_CAP_EXTERNOVERLAY |
937 V4L2_FBUF_CAP_BITMAP_CLIPPING |
938 V4L2_FBUF_CAP_LIST_CLIPPING |
939 V4L2_FBUF_CAP_CHROMAKEY |
940 V4L2_FBUF_CAP_SRC_CHROMAKEY |
941 V4L2_FBUF_CAP_GLOBAL_ALPHA |
942 V4L2_FBUF_CAP_LOCAL_ALPHA |
943 V4L2_FBUF_CAP_LOCAL_INV_ALPHA;
944 a->flags = V4L2_FBUF_FLAG_OVERLAY | dev->fbuf_out_flags;
945 a->base = (void *)dev->video_pbase;
946 a->fmt.width = dev->display_width;
947 a->fmt.height = dev->display_height;
948 if (dev->fb_defined.green.length == 5)
949 a->fmt.pixelformat = V4L2_PIX_FMT_ARGB555;
950 else
951 a->fmt.pixelformat = V4L2_PIX_FMT_RGB565;
952 a->fmt.bytesperline = dev->display_byte_stride;
953 a->fmt.sizeimage = a->fmt.height * a->fmt.bytesperline;
954 a->fmt.field = V4L2_FIELD_NONE;
955 a->fmt.colorspace = V4L2_COLORSPACE_SRGB;
956 a->fmt.priv = 0;
957 return 0;
958}
959
960int vivid_vid_out_s_fbuf(struct file *file, void *fh,
961 const struct v4l2_framebuffer *a)
962{
963 struct vivid_dev *dev = video_drvdata(file);
964 const unsigned chroma_flags = V4L2_FBUF_FLAG_CHROMAKEY |
965 V4L2_FBUF_FLAG_SRC_CHROMAKEY;
966 const unsigned alpha_flags = V4L2_FBUF_FLAG_GLOBAL_ALPHA |
967 V4L2_FBUF_FLAG_LOCAL_ALPHA |
968 V4L2_FBUF_FLAG_LOCAL_INV_ALPHA;
969
970
971 if ((a->flags & chroma_flags) == chroma_flags)
972 return -EINVAL;
973 switch (a->flags & alpha_flags) {
974 case 0:
975 case V4L2_FBUF_FLAG_GLOBAL_ALPHA:
976 case V4L2_FBUF_FLAG_LOCAL_ALPHA:
977 case V4L2_FBUF_FLAG_LOCAL_INV_ALPHA:
978 break;
979 default:
980 return -EINVAL;
981 }
982 dev->fbuf_out_flags &= ~(chroma_flags | alpha_flags);
983 dev->fbuf_out_flags = a->flags & (chroma_flags | alpha_flags);
984 return 0;
985}
986
987static const struct v4l2_audioout vivid_audio_outputs[] = {
988 { 0, "Line-Out 1" },
989 { 1, "Line-Out 2" },
990};
991
992int vidioc_enum_output(struct file *file, void *priv,
993 struct v4l2_output *out)
994{
995 struct vivid_dev *dev = video_drvdata(file);
996
997 if (out->index >= dev->num_outputs)
998 return -EINVAL;
999
1000 out->type = V4L2_OUTPUT_TYPE_ANALOG;
1001 switch (dev->output_type[out->index]) {
1002 case SVID:
1003 snprintf(out->name, sizeof(out->name), "S-Video %u",
1004 dev->output_name_counter[out->index]);
1005 out->std = V4L2_STD_ALL;
1006 if (dev->has_audio_outputs)
1007 out->audioset = (1 << ARRAY_SIZE(vivid_audio_outputs)) - 1;
1008 out->capabilities = V4L2_OUT_CAP_STD;
1009 break;
1010 case HDMI:
1011 snprintf(out->name, sizeof(out->name), "HDMI %u",
1012 dev->output_name_counter[out->index]);
1013 out->capabilities = V4L2_OUT_CAP_DV_TIMINGS;
1014 break;
1015 }
1016 return 0;
1017}
1018
1019int vidioc_g_output(struct file *file, void *priv, unsigned *o)
1020{
1021 struct vivid_dev *dev = video_drvdata(file);
1022
1023 *o = dev->output;
1024 return 0;
1025}
1026
1027int vidioc_s_output(struct file *file, void *priv, unsigned o)
1028{
1029 struct vivid_dev *dev = video_drvdata(file);
1030
1031 if (o >= dev->num_outputs)
1032 return -EINVAL;
1033
1034 if (o == dev->output)
1035 return 0;
1036
1037 if (vb2_is_busy(&dev->vb_vid_out_q) || vb2_is_busy(&dev->vb_vbi_out_q))
1038 return -EBUSY;
1039
1040 dev->output = o;
1041 dev->tv_audio_output = 0;
1042 if (dev->output_type[o] == SVID)
1043 dev->vid_out_dev.tvnorms = V4L2_STD_ALL;
1044 else
1045 dev->vid_out_dev.tvnorms = 0;
1046
1047 dev->vbi_out_dev.tvnorms = dev->vid_out_dev.tvnorms;
1048 vivid_update_format_out(dev);
1049 return 0;
1050}
1051
1052int vidioc_enumaudout(struct file *file, void *fh, struct v4l2_audioout *vout)
1053{
1054 if (vout->index >= ARRAY_SIZE(vivid_audio_outputs))
1055 return -EINVAL;
1056 *vout = vivid_audio_outputs[vout->index];
1057 return 0;
1058}
1059
1060int vidioc_g_audout(struct file *file, void *fh, struct v4l2_audioout *vout)
1061{
1062 struct vivid_dev *dev = video_drvdata(file);
1063
1064 if (!vivid_is_svid_out(dev))
1065 return -EINVAL;
1066 *vout = vivid_audio_outputs[dev->tv_audio_output];
1067 return 0;
1068}
1069
1070int vidioc_s_audout(struct file *file, void *fh, const struct v4l2_audioout *vout)
1071{
1072 struct vivid_dev *dev = video_drvdata(file);
1073
1074 if (!vivid_is_svid_out(dev))
1075 return -EINVAL;
1076 if (vout->index >= ARRAY_SIZE(vivid_audio_outputs))
1077 return -EINVAL;
1078 dev->tv_audio_output = vout->index;
1079 return 0;
1080}
1081
1082int vivid_vid_out_s_std(struct file *file, void *priv, v4l2_std_id id)
1083{
1084 struct vivid_dev *dev = video_drvdata(file);
1085
1086 if (!vivid_is_svid_out(dev))
1087 return -ENODATA;
1088 if (dev->std_out == id)
1089 return 0;
1090 if (vb2_is_busy(&dev->vb_vid_out_q) || vb2_is_busy(&dev->vb_vbi_out_q))
1091 return -EBUSY;
1092 dev->std_out = id;
1093 vivid_update_format_out(dev);
1094 return 0;
1095}
1096
1097int vivid_vid_out_s_dv_timings(struct file *file, void *_fh,
1098 struct v4l2_dv_timings *timings)
1099{
1100 struct vivid_dev *dev = video_drvdata(file);
1101
1102 if (!vivid_is_hdmi_out(dev))
1103 return -ENODATA;
1104 if (vb2_is_busy(&dev->vb_vid_out_q))
1105 return -EBUSY;
1106 if (!v4l2_find_dv_timings_cap(timings, &vivid_dv_timings_cap,
1107 0, NULL, NULL))
1108 return -EINVAL;
1109 if (v4l2_match_dv_timings(timings, &dev->dv_timings_out, 0))
1110 return 0;
1111 dev->dv_timings_out = *timings;
1112 vivid_update_format_out(dev);
1113 return 0;
1114}
1115
1116int vivid_vid_out_g_parm(struct file *file, void *priv,
1117 struct v4l2_streamparm *parm)
1118{
1119 struct vivid_dev *dev = video_drvdata(file);
1120
1121 if (parm->type != (dev->multiplanar ?
1122 V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE :
1123 V4L2_BUF_TYPE_VIDEO_OUTPUT))
1124 return -EINVAL;
1125
1126 parm->parm.output.capability = V4L2_CAP_TIMEPERFRAME;
1127 parm->parm.output.timeperframe = dev->timeperframe_vid_out;
1128 parm->parm.output.writebuffers = 1;
1129return 0;
1130}
1131
1132int vidioc_subscribe_event(struct v4l2_fh *fh,
1133 const struct v4l2_event_subscription *sub)
1134{
1135 switch (sub->type) {
1136 case V4L2_EVENT_CTRL:
1137 return v4l2_ctrl_subscribe_event(fh, sub);
1138 case V4L2_EVENT_SOURCE_CHANGE:
1139 if (fh->vdev->vfl_dir == VFL_DIR_RX)
1140 return v4l2_src_change_event_subscribe(fh, sub);
1141 break;
1142 default:
1143 break;
1144 }
1145 return -EINVAL;
1146}
diff --git a/drivers/media/platform/vivid/vivid-vid-out.h b/drivers/media/platform/vivid/vivid-vid-out.h
new file mode 100644
index 000000000000..dfa84db184ed
--- /dev/null
+++ b/drivers/media/platform/vivid/vivid-vid-out.h
@@ -0,0 +1,56 @@
1/*
2 * vivid-vid-out.h - video output support functions.
3 *
4 * Copyright 2014 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
5 *
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
17 * SOFTWARE.
18 */
19
20#ifndef _VIVID_VID_OUT_H_
21#define _VIVID_VID_OUT_H_
22
23extern const struct vb2_ops vivid_vid_out_qops;
24
25void vivid_update_format_out(struct vivid_dev *dev);
26
27int vivid_g_fmt_vid_out(struct file *file, void *priv, struct v4l2_format *f);
28int vivid_try_fmt_vid_out(struct file *file, void *priv, struct v4l2_format *f);
29int vivid_s_fmt_vid_out(struct file *file, void *priv, struct v4l2_format *f);
30int vidioc_g_fmt_vid_out_mplane(struct file *file, void *priv, struct v4l2_format *f);
31int vidioc_try_fmt_vid_out_mplane(struct file *file, void *priv, struct v4l2_format *f);
32int vidioc_s_fmt_vid_out_mplane(struct file *file, void *priv, struct v4l2_format *f);
33int vidioc_g_fmt_vid_out(struct file *file, void *priv, struct v4l2_format *f);
34int vidioc_try_fmt_vid_out(struct file *file, void *priv, struct v4l2_format *f);
35int vidioc_s_fmt_vid_out(struct file *file, void *priv, struct v4l2_format *f);
36int vivid_vid_out_g_selection(struct file *file, void *priv, struct v4l2_selection *sel);
37int vivid_vid_out_s_selection(struct file *file, void *fh, struct v4l2_selection *s);
38int vivid_vid_out_cropcap(struct file *file, void *fh, struct v4l2_cropcap *cap);
39int vidioc_enum_fmt_vid_out_overlay(struct file *file, void *priv, struct v4l2_fmtdesc *f);
40int vidioc_g_fmt_vid_out_overlay(struct file *file, void *priv, struct v4l2_format *f);
41int vidioc_try_fmt_vid_out_overlay(struct file *file, void *priv, struct v4l2_format *f);
42int vidioc_s_fmt_vid_out_overlay(struct file *file, void *priv, struct v4l2_format *f);
43int vivid_vid_out_overlay(struct file *file, void *fh, unsigned i);
44int vivid_vid_out_g_fbuf(struct file *file, void *fh, struct v4l2_framebuffer *a);
45int vivid_vid_out_s_fbuf(struct file *file, void *fh, const struct v4l2_framebuffer *a);
46int vidioc_enum_output(struct file *file, void *priv, struct v4l2_output *out);
47int vidioc_g_output(struct file *file, void *priv, unsigned *i);
48int vidioc_s_output(struct file *file, void *priv, unsigned i);
49int vidioc_enumaudout(struct file *file, void *fh, struct v4l2_audioout *vout);
50int vidioc_g_audout(struct file *file, void *fh, struct v4l2_audioout *vout);
51int vidioc_s_audout(struct file *file, void *fh, const struct v4l2_audioout *vout);
52int vivid_vid_out_s_std(struct file *file, void *priv, v4l2_std_id id);
53int vivid_vid_out_s_dv_timings(struct file *file, void *_fh, struct v4l2_dv_timings *timings);
54int vivid_vid_out_g_parm(struct file *file, void *priv, struct v4l2_streamparm *parm);
55
56#endif
diff --git a/drivers/media/radio/radio-gemtek.c b/drivers/media/radio/radio-gemtek.c
index 235c0e349820..cff1eb144a5c 100644
--- a/drivers/media/radio/radio-gemtek.c
+++ b/drivers/media/radio/radio-gemtek.c
@@ -332,7 +332,7 @@ static int __init gemtek_init(void)
332 332
333static void __exit gemtek_exit(void) 333static void __exit gemtek_exit(void)
334{ 334{
335 hardmute = 1; /* Turn off PLL */ 335 hardmute = true; /* Turn off PLL */
336#ifdef CONFIG_PNP 336#ifdef CONFIG_PNP
337 pnp_unregister_driver(&gemtek_driver.pnp_driver); 337 pnp_unregister_driver(&gemtek_driver.pnp_driver);
338#endif 338#endif
diff --git a/drivers/media/radio/radio-sf16fmi.c b/drivers/media/radio/radio-sf16fmi.c
index d7ce8fe6b5ae..28a89466cddc 100644
--- a/drivers/media/radio/radio-sf16fmi.c
+++ b/drivers/media/radio/radio-sf16fmi.c
@@ -56,7 +56,7 @@ struct fmi
56 56
57static struct fmi fmi_card; 57static struct fmi fmi_card;
58static struct pnp_dev *dev; 58static struct pnp_dev *dev;
59bool pnp_attached; 59static bool pnp_attached;
60 60
61#define RSF16_MINFREQ (87U * 16000) 61#define RSF16_MINFREQ (87U * 16000)
62#define RSF16_MAXFREQ (108U * 16000) 62#define RSF16_MAXFREQ (108U * 16000)
@@ -285,7 +285,7 @@ static int __init fmi_init(void)
285 io = isapnp_fmi_probe(); 285 io = isapnp_fmi_probe();
286 if (io < 0) 286 if (io < 0)
287 continue; 287 continue;
288 pnp_attached = 1; 288 pnp_attached = true;
289 } 289 }
290 if (!request_region(io, 2, "radio-sf16fmi")) { 290 if (!request_region(io, 2, "radio-sf16fmi")) {
291 if (pnp_attached) 291 if (pnp_attached)
@@ -349,7 +349,7 @@ static int __init fmi_init(void)
349 mutex_init(&fmi->lock); 349 mutex_init(&fmi->lock);
350 350
351 /* mute card and set default frequency */ 351 /* mute card and set default frequency */
352 fmi->mute = 1; 352 fmi->mute = true;
353 fmi->curfreq = RSF16_MINFREQ; 353 fmi->curfreq = RSF16_MINFREQ;
354 fmi_set_freq(fmi); 354 fmi_set_freq(fmi);
355 355
diff --git a/drivers/media/radio/radio-sf16fmr2.c b/drivers/media/radio/radio-sf16fmr2.c
index 93d864eb8306..b8d61cbc18cb 100644
--- a/drivers/media/radio/radio-sf16fmr2.c
+++ b/drivers/media/radio/radio-sf16fmr2.c
@@ -305,7 +305,7 @@ static void fmr2_pnp_remove(struct pnp_dev *pdev)
305 pnp_set_drvdata(pdev, NULL); 305 pnp_set_drvdata(pdev, NULL);
306} 306}
307 307
308struct isa_driver fmr2_isa_driver = { 308static struct isa_driver fmr2_isa_driver = {
309 .match = fmr2_isa_match, 309 .match = fmr2_isa_match,
310 .remove = fmr2_isa_remove, 310 .remove = fmr2_isa_remove,
311 .driver = { 311 .driver = {
@@ -313,7 +313,7 @@ struct isa_driver fmr2_isa_driver = {
313 }, 313 },
314}; 314};
315 315
316struct pnp_driver fmr2_pnp_driver = { 316static struct pnp_driver fmr2_pnp_driver = {
317 .name = "radio-sf16fmr2", 317 .name = "radio-sf16fmr2",
318 .id_table = fmr2_pnp_ids, 318 .id_table = fmr2_pnp_ids,
319 .probe = fmr2_pnp_probe, 319 .probe = fmr2_pnp_probe,
diff --git a/drivers/media/radio/radio-tea5764.c b/drivers/media/radio/radio-tea5764.c
index 925049654c5b..cc3990111411 100644
--- a/drivers/media/radio/radio-tea5764.c
+++ b/drivers/media/radio/radio-tea5764.c
@@ -124,11 +124,11 @@ struct tea5764_regs {
124 124
125struct tea5764_write_regs { 125struct tea5764_write_regs {
126 u8 intreg; /* INTMSK */ 126 u8 intreg; /* INTMSK */
127 u16 frqset; /* FRQSETMSB & FRQSETLSB */ 127 __be16 frqset; /* FRQSETMSB & FRQSETLSB */
128 u16 tnctrl; /* TNCTRL1 & TNCTRL2 */ 128 __be16 tnctrl; /* TNCTRL1 & TNCTRL2 */
129 u16 testreg; /* TESTBITS & TESTMODE */ 129 __be16 testreg; /* TESTBITS & TESTMODE */
130 u16 rdsctrl; /* RDSCTRL1 & RDSCTRL2 */ 130 __be16 rdsctrl; /* RDSCTRL1 & RDSCTRL2 */
131 u16 rdsbbl; /* PAUSEDET & RDSBBL */ 131 __be16 rdsbbl; /* PAUSEDET & RDSBBL */
132} __attribute__ ((packed)); 132} __attribute__ ((packed));
133 133
134#ifdef CONFIG_RADIO_TEA5764_XTAL 134#ifdef CONFIG_RADIO_TEA5764_XTAL
@@ -165,7 +165,7 @@ static int tea5764_i2c_read(struct tea5764_device *radio)
165 if (i2c_transfer(radio->i2c_client->adapter, msgs, 1) != 1) 165 if (i2c_transfer(radio->i2c_client->adapter, msgs, 1) != 1)
166 return -EIO; 166 return -EIO;
167 for (i = 0; i < sizeof(struct tea5764_regs) / sizeof(u16); i++) 167 for (i = 0; i < sizeof(struct tea5764_regs) / sizeof(u16); i++)
168 p[i] = __be16_to_cpu(p[i]); 168 p[i] = __be16_to_cpu((__force __be16)p[i]);
169 169
170 return 0; 170 return 0;
171} 171}
diff --git a/drivers/media/radio/si470x/radio-si470x-common.c b/drivers/media/radio/si470x/radio-si470x-common.c
index 0e750aef656a..909c3f92d839 100644
--- a/drivers/media/radio/si470x/radio-si470x-common.c
+++ b/drivers/media/radio/si470x/radio-si470x-common.c
@@ -208,7 +208,7 @@ static int si470x_set_band(struct si470x_device *radio, int band)
208static int si470x_set_chan(struct si470x_device *radio, unsigned short chan) 208static int si470x_set_chan(struct si470x_device *radio, unsigned short chan)
209{ 209{
210 int retval; 210 int retval;
211 bool timed_out = 0; 211 bool timed_out = false;
212 212
213 /* start tuning */ 213 /* start tuning */
214 radio->registers[CHANNEL] &= ~CHANNEL_CHAN; 214 radio->registers[CHANNEL] &= ~CHANNEL_CHAN;
@@ -300,7 +300,7 @@ static int si470x_set_seek(struct si470x_device *radio,
300{ 300{
301 int band, retval; 301 int band, retval;
302 unsigned int freq; 302 unsigned int freq;
303 bool timed_out = 0; 303 bool timed_out = false;
304 304
305 /* set band */ 305 /* set band */
306 if (seek->rangelow || seek->rangehigh) { 306 if (seek->rangelow || seek->rangehigh) {
diff --git a/drivers/media/radio/si470x/radio-si470x-usb.c b/drivers/media/radio/si470x/radio-si470x-usb.c
index 494fac061306..57f0bc3b60e7 100644
--- a/drivers/media/radio/si470x/radio-si470x-usb.c
+++ b/drivers/media/radio/si470x/radio-si470x-usb.c
@@ -607,9 +607,7 @@ static int si470x_usb_driver_probe(struct usb_interface *intf,
607 /* Set up interrupt endpoint information. */ 607 /* Set up interrupt endpoint information. */
608 for (i = 0; i < iface_desc->desc.bNumEndpoints; ++i) { 608 for (i = 0; i < iface_desc->desc.bNumEndpoints; ++i) {
609 endpoint = &iface_desc->endpoint[i].desc; 609 endpoint = &iface_desc->endpoint[i].desc;
610 if (((endpoint->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == 610 if (usb_endpoint_is_int_in(endpoint))
611 USB_DIR_IN) && ((endpoint->bmAttributes &
612 USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_INT))
613 radio->int_in_endpoint = endpoint; 611 radio->int_in_endpoint = endpoint;
614 } 612 }
615 if (!radio->int_in_endpoint) { 613 if (!radio->int_in_endpoint) {
diff --git a/drivers/media/radio/wl128x/fmdrv_common.c b/drivers/media/radio/wl128x/fmdrv_common.c
index 4b2e9e8298e1..6f28f6e02ea5 100644
--- a/drivers/media/radio/wl128x/fmdrv_common.c
+++ b/drivers/media/radio/wl128x/fmdrv_common.c
@@ -440,7 +440,7 @@ static int fm_send_cmd(struct fmdev *fmdev, u8 fm_op, u16 type, void *payload,
440 * command with u16 payload - convert to be16 440 * command with u16 payload - convert to be16
441 */ 441 */
442 if (payload != NULL) 442 if (payload != NULL)
443 *(u16 *)payload = cpu_to_be16(*(u16 *)payload); 443 *(__be16 *)payload = cpu_to_be16(*(u16 *)payload);
444 444
445 } else if (payload != NULL) { 445 } else if (payload != NULL) {
446 fm_cb(skb)->fm_op = *((u8 *)payload + 2); 446 fm_cb(skb)->fm_op = *((u8 *)payload + 2);
@@ -595,7 +595,7 @@ static void fm_irq_handle_flag_getcmd_resp(struct fmdev *fmdev)
595 skb_pull(skb, sizeof(struct fm_event_msg_hdr)); 595 skb_pull(skb, sizeof(struct fm_event_msg_hdr));
596 memcpy(&fmdev->irq_info.flag, skb->data, fm_evt_hdr->dlen); 596 memcpy(&fmdev->irq_info.flag, skb->data, fm_evt_hdr->dlen);
597 597
598 fmdev->irq_info.flag = be16_to_cpu(fmdev->irq_info.flag); 598 fmdev->irq_info.flag = be16_to_cpu((__force __be16)fmdev->irq_info.flag);
599 fmdbg("irq: flag register(0x%x)\n", fmdev->irq_info.flag); 599 fmdbg("irq: flag register(0x%x)\n", fmdev->irq_info.flag);
600 600
601 /* Continue next function in interrupt handler table */ 601 /* Continue next function in interrupt handler table */
@@ -764,7 +764,7 @@ static void fm_irq_handle_rdsdata_getcmd_resp(struct fmdev *fmdev)
764 * Extract PI code and store in local cache. 764 * Extract PI code and store in local cache.
765 * We need this during AF switch processing. 765 * We need this during AF switch processing.
766 */ 766 */
767 cur_picode = be16_to_cpu(rds_fmt.data.groupgeneral.pidata); 767 cur_picode = be16_to_cpu((__force __be16)rds_fmt.data.groupgeneral.pidata);
768 if (fmdev->rx.stat_info.picode != cur_picode) 768 if (fmdev->rx.stat_info.picode != cur_picode)
769 fmdev->rx.stat_info.picode = cur_picode; 769 fmdev->rx.stat_info.picode = cur_picode;
770 770
@@ -989,7 +989,7 @@ static void fm_irq_afjump_rd_freq_resp(struct fmdev *fmdev)
989 /* Skip header info and copy only response data */ 989 /* Skip header info and copy only response data */
990 skb_pull(skb, sizeof(struct fm_event_msg_hdr)); 990 skb_pull(skb, sizeof(struct fm_event_msg_hdr));
991 memcpy(&read_freq, skb->data, sizeof(read_freq)); 991 memcpy(&read_freq, skb->data, sizeof(read_freq));
992 read_freq = be16_to_cpu(read_freq); 992 read_freq = be16_to_cpu((__force __be16)read_freq);
993 curr_freq = fmdev->rx.region.bot_freq + ((u32)read_freq * FM_FREQ_MUL); 993 curr_freq = fmdev->rx.region.bot_freq + ((u32)read_freq * FM_FREQ_MUL);
994 994
995 jumped_freq = fmdev->rx.stat_info.af_cache[fmdev->rx.afjump_idx]; 995 jumped_freq = fmdev->rx.stat_info.af_cache[fmdev->rx.afjump_idx];
@@ -1317,7 +1317,8 @@ static int load_default_rx_configuration(struct fmdev *fmdev)
1317/* Does FM power on sequence */ 1317/* Does FM power on sequence */
1318static int fm_power_up(struct fmdev *fmdev, u8 mode) 1318static int fm_power_up(struct fmdev *fmdev, u8 mode)
1319{ 1319{
1320 u16 payload, asic_id, asic_ver; 1320 u16 payload;
1321 __be16 asic_id, asic_ver;
1321 int resp_len, ret; 1322 int resp_len, ret;
1322 u8 fw_name[50]; 1323 u8 fw_name[50];
1323 1324
diff --git a/drivers/media/radio/wl128x/fmdrv_rx.c b/drivers/media/radio/wl128x/fmdrv_rx.c
index ebf09a3927de..09632cb26cb6 100644
--- a/drivers/media/radio/wl128x/fmdrv_rx.c
+++ b/drivers/media/radio/wl128x/fmdrv_rx.c
@@ -116,7 +116,7 @@ int fm_rx_set_freq(struct fmdev *fmdev, u32 freq)
116 if (ret < 0) 116 if (ret < 0)
117 goto exit; 117 goto exit;
118 118
119 curr_frq = be16_to_cpu(curr_frq); 119 curr_frq = be16_to_cpu((__force __be16)curr_frq);
120 curr_frq_in_khz = (fmdev->rx.region.bot_freq + ((u32)curr_frq * FM_FREQ_MUL)); 120 curr_frq_in_khz = (fmdev->rx.region.bot_freq + ((u32)curr_frq * FM_FREQ_MUL));
121 121
122 if (curr_frq_in_khz != freq) { 122 if (curr_frq_in_khz != freq) {
@@ -189,7 +189,7 @@ int fm_rx_seek(struct fmdev *fmdev, u32 seek_upward,
189 if (ret < 0) 189 if (ret < 0)
190 return ret; 190 return ret;
191 191
192 curr_frq = be16_to_cpu(curr_frq); 192 curr_frq = be16_to_cpu((__force __be16)curr_frq);
193 last_frq = (fmdev->rx.region.top_freq - fmdev->rx.region.bot_freq) / FM_FREQ_MUL; 193 last_frq = (fmdev->rx.region.top_freq - fmdev->rx.region.bot_freq) / FM_FREQ_MUL;
194 194
195 /* Check the offset in order to be aligned to the channel spacing*/ 195 /* Check the offset in order to be aligned to the channel spacing*/
@@ -285,7 +285,7 @@ again:
285 if (ret < 0) 285 if (ret < 0)
286 return ret; 286 return ret;
287 287
288 curr_frq = be16_to_cpu(curr_frq); 288 curr_frq = be16_to_cpu((__force __be16)curr_frq);
289 fmdev->rx.freq = (fmdev->rx.region.bot_freq + 289 fmdev->rx.freq = (fmdev->rx.region.bot_freq +
290 ((u32)curr_frq * FM_FREQ_MUL)); 290 ((u32)curr_frq * FM_FREQ_MUL));
291 291
@@ -517,7 +517,7 @@ int fm_rx_set_rfdepend_softmute(struct fmdev *fmdev, u8 rfdepend_mute)
517/* Returns the signal strength level of current channel */ 517/* Returns the signal strength level of current channel */
518int fm_rx_get_rssi_level(struct fmdev *fmdev, u16 *rssilvl) 518int fm_rx_get_rssi_level(struct fmdev *fmdev, u16 *rssilvl)
519{ 519{
520 u16 curr_rssi_lel; 520 __be16 curr_rssi_lel;
521 u32 resp_len; 521 u32 resp_len;
522 int ret; 522 int ret;
523 523
@@ -608,7 +608,7 @@ int fm_rx_set_stereo_mono(struct fmdev *fmdev, u16 mode)
608/* Gets current RX stereo/mono mode */ 608/* Gets current RX stereo/mono mode */
609int fm_rx_get_stereo_mono(struct fmdev *fmdev, u16 *mode) 609int fm_rx_get_stereo_mono(struct fmdev *fmdev, u16 *mode)
610{ 610{
611 u16 curr_mode; 611 __be16 curr_mode;
612 u32 resp_len; 612 u32 resp_len;
613 int ret; 613 int ret;
614 614
diff --git a/drivers/media/radio/wl128x/fmdrv_tx.c b/drivers/media/radio/wl128x/fmdrv_tx.c
index 6ea33e09d63b..839970b0f313 100644
--- a/drivers/media/radio/wl128x/fmdrv_tx.c
+++ b/drivers/media/radio/wl128x/fmdrv_tx.c
@@ -374,7 +374,7 @@ int fm_tx_get_tune_cap_val(struct fmdev *fmdev)
374 if (ret < 0) 374 if (ret < 0)
375 return ret; 375 return ret;
376 376
377 curr_val = be16_to_cpu(curr_val); 377 curr_val = be16_to_cpu((__force __be16)curr_val);
378 378
379 return curr_val; 379 return curr_val;
380} 380}
diff --git a/drivers/media/rc/Kconfig b/drivers/media/rc/Kconfig
index 5e626af8e313..8ce08107a69d 100644
--- a/drivers/media/rc/Kconfig
+++ b/drivers/media/rc/Kconfig
@@ -164,6 +164,16 @@ config IR_ENE
164 To compile this driver as a module, choose M here: the 164 To compile this driver as a module, choose M here: the
165 module will be called ene_ir. 165 module will be called ene_ir.
166 166
167config IR_HIX5HD2
168 tristate "Hisilicon hix5hd2 IR remote control"
169 depends on RC_CORE
170 help
171 Say Y here if you want to use hisilicon hix5hd2 remote control.
172 To compile this driver as a module, choose M here: the module will be
173 called ir-hix5hd2.
174
175 If you're not sure, select N here
176
167config IR_IMON 177config IR_IMON
168 tristate "SoundGraph iMON Receiver and Display" 178 tristate "SoundGraph iMON Receiver and Display"
169 depends on USB_ARCH_HAS_HCD 179 depends on USB_ARCH_HAS_HCD
@@ -333,7 +343,8 @@ config IR_GPIO_CIR
333 343
334config RC_ST 344config RC_ST
335 tristate "ST remote control receiver" 345 tristate "ST remote control receiver"
336 depends on ARCH_STI && RC_CORE 346 depends on RC_CORE
347 depends on ARCH_STI || COMPILE_TEST
337 help 348 help
338 Say Y here if you want support for ST remote control driver 349 Say Y here if you want support for ST remote control driver
339 which allows both IR and UHF RX. 350 which allows both IR and UHF RX.
@@ -344,7 +355,7 @@ config RC_ST
344config IR_SUNXI 355config IR_SUNXI
345 tristate "SUNXI IR remote control" 356 tristate "SUNXI IR remote control"
346 depends on RC_CORE 357 depends on RC_CORE
347 depends on ARCH_SUNXI 358 depends on ARCH_SUNXI || COMPILE_TEST
348 ---help--- 359 ---help---
349 Say Y if you want to use sunXi internal IR Controller 360 Say Y if you want to use sunXi internal IR Controller
350 361
diff --git a/drivers/media/rc/Makefile b/drivers/media/rc/Makefile
index 9f9843a1af5f..0989f940e9cf 100644
--- a/drivers/media/rc/Makefile
+++ b/drivers/media/rc/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_IR_XMP_DECODER) += ir-xmp-decoder.o
17 17
18# stand-alone IR receivers/transmitters 18# stand-alone IR receivers/transmitters
19obj-$(CONFIG_RC_ATI_REMOTE) += ati_remote.o 19obj-$(CONFIG_RC_ATI_REMOTE) += ati_remote.o
20obj-$(CONFIG_IR_HIX5HD2) += ir-hix5hd2.o
20obj-$(CONFIG_IR_IMON) += imon.o 21obj-$(CONFIG_IR_IMON) += imon.o
21obj-$(CONFIG_IR_ITE_CIR) += ite-cir.o 22obj-$(CONFIG_IR_ITE_CIR) += ite-cir.o
22obj-$(CONFIG_IR_MCEUSB) += mceusb.o 23obj-$(CONFIG_IR_MCEUSB) += mceusb.o
diff --git a/drivers/media/rc/ene_ir.c b/drivers/media/rc/ene_ir.c
index d16d9b496b92..e80f2c6c5f1a 100644
--- a/drivers/media/rc/ene_ir.c
+++ b/drivers/media/rc/ene_ir.c
@@ -979,7 +979,7 @@ static int ene_transmit(struct rc_dev *rdev, unsigned *buf, unsigned n)
979 dev->tx_reg = 0; 979 dev->tx_reg = 0;
980 dev->tx_done = 0; 980 dev->tx_done = 0;
981 dev->tx_sample = 0; 981 dev->tx_sample = 0;
982 dev->tx_sample_pulse = 0; 982 dev->tx_sample_pulse = false;
983 983
984 dbg("TX: %d samples", dev->tx_len); 984 dbg("TX: %d samples", dev->tx_len);
985 985
diff --git a/drivers/media/rc/fintek-cir.c b/drivers/media/rc/fintek-cir.c
index f0a1f7d31ee6..b5167573240e 100644
--- a/drivers/media/rc/fintek-cir.c
+++ b/drivers/media/rc/fintek-cir.c
@@ -148,7 +148,6 @@ static int fintek_hw_detect(struct fintek_dev *fintek)
148 u8 vendor_major, vendor_minor; 148 u8 vendor_major, vendor_minor;
149 u8 portsel, ir_class; 149 u8 portsel, ir_class;
150 u16 vendor, chip; 150 u16 vendor, chip;
151 int ret = 0;
152 151
153 fintek_config_mode_enable(fintek); 152 fintek_config_mode_enable(fintek);
154 153
@@ -208,7 +207,7 @@ static int fintek_hw_detect(struct fintek_dev *fintek)
208 207
209 spin_unlock_irqrestore(&fintek->fintek_lock, flags); 208 spin_unlock_irqrestore(&fintek->fintek_lock, flags);
210 209
211 return ret; 210 return 0;
212} 211}
213 212
214static void fintek_cir_ldev_init(struct fintek_dev *fintek) 213static void fintek_cir_ldev_init(struct fintek_dev *fintek)
@@ -644,7 +643,6 @@ static int fintek_suspend(struct pnp_dev *pdev, pm_message_t state)
644 643
645static int fintek_resume(struct pnp_dev *pdev) 644static int fintek_resume(struct pnp_dev *pdev)
646{ 645{
647 int ret = 0;
648 struct fintek_dev *fintek = pnp_get_drvdata(pdev); 646 struct fintek_dev *fintek = pnp_get_drvdata(pdev);
649 647
650 fit_dbg("%s called", __func__); 648 fit_dbg("%s called", __func__);
@@ -661,7 +659,7 @@ static int fintek_resume(struct pnp_dev *pdev)
661 659
662 fintek_cir_regs_init(fintek); 660 fintek_cir_regs_init(fintek);
663 661
664 return ret; 662 return 0;
665} 663}
666 664
667static void fintek_shutdown(struct pnp_dev *pdev) 665static void fintek_shutdown(struct pnp_dev *pdev)
diff --git a/drivers/media/rc/img-ir/img-ir-hw.c b/drivers/media/rc/img-ir/img-ir-hw.c
index bfb282a714e8..ec49f94425fc 100644
--- a/drivers/media/rc/img-ir/img-ir-hw.c
+++ b/drivers/media/rc/img-ir/img-ir-hw.c
@@ -25,12 +25,6 @@
25/* Decoders lock (only modified to preprocess them) */ 25/* Decoders lock (only modified to preprocess them) */
26static DEFINE_SPINLOCK(img_ir_decoders_lock); 26static DEFINE_SPINLOCK(img_ir_decoders_lock);
27 27
28extern struct img_ir_decoder img_ir_nec;
29extern struct img_ir_decoder img_ir_jvc;
30extern struct img_ir_decoder img_ir_sony;
31extern struct img_ir_decoder img_ir_sharp;
32extern struct img_ir_decoder img_ir_sanyo;
33
34static bool img_ir_decoders_preprocessed; 28static bool img_ir_decoders_preprocessed;
35static struct img_ir_decoder *img_ir_decoders[] = { 29static struct img_ir_decoder *img_ir_decoders[] = {
36#ifdef CONFIG_IR_IMG_NEC 30#ifdef CONFIG_IR_IMG_NEC
diff --git a/drivers/media/rc/img-ir/img-ir-hw.h b/drivers/media/rc/img-ir/img-ir-hw.h
index 3e40ce87b898..8fcc16c32c5b 100644
--- a/drivers/media/rc/img-ir/img-ir-hw.h
+++ b/drivers/media/rc/img-ir/img-ir-hw.h
@@ -168,6 +168,12 @@ struct img_ir_decoder {
168 struct img_ir_filter *out, u64 protocols); 168 struct img_ir_filter *out, u64 protocols);
169}; 169};
170 170
171extern struct img_ir_decoder img_ir_nec;
172extern struct img_ir_decoder img_ir_jvc;
173extern struct img_ir_decoder img_ir_sony;
174extern struct img_ir_decoder img_ir_sharp;
175extern struct img_ir_decoder img_ir_sanyo;
176
171/** 177/**
172 * struct img_ir_reg_timings - Reg values for decoder timings at clock rate. 178 * struct img_ir_reg_timings - Reg values for decoder timings at clock rate.
173 * @ctrl: Processed control register value. 179 * @ctrl: Processed control register value.
diff --git a/drivers/media/rc/imon.c b/drivers/media/rc/imon.c
index 7115e68ba697..b8837dd39bb2 100644
--- a/drivers/media/rc/imon.c
+++ b/drivers/media/rc/imon.c
@@ -87,6 +87,18 @@ static ssize_t lcd_write(struct file *file, const char __user *buf,
87 87
88/*** G L O B A L S ***/ 88/*** G L O B A L S ***/
89 89
90struct imon_panel_key_table {
91 u64 hw_code;
92 u32 keycode;
93};
94
95struct imon_usb_dev_descr {
96 __u16 flags;
97#define IMON_NO_FLAGS 0
98#define IMON_NEED_20MS_PKT_DELAY 1
99 struct imon_panel_key_table key_table[];
100};
101
90struct imon_context { 102struct imon_context {
91 struct device *dev; 103 struct device *dev;
92 /* Newer devices have two interfaces */ 104 /* Newer devices have two interfaces */
@@ -150,6 +162,8 @@ struct imon_context {
150 struct timer_list ttimer; /* touch screen timer */ 162 struct timer_list ttimer; /* touch screen timer */
151 int touch_x; /* x coordinate on touchscreen */ 163 int touch_x; /* x coordinate on touchscreen */
152 int touch_y; /* y coordinate on touchscreen */ 164 int touch_y; /* y coordinate on touchscreen */
165 struct imon_usb_dev_descr *dev_descr; /* device description with key
166 table for front panels */
153}; 167};
154 168
155#define TOUCH_TIMEOUT (HZ/30) 169#define TOUCH_TIMEOUT (HZ/30)
@@ -186,8 +200,132 @@ enum {
186 IMON_KEY_PANEL = 2, 200 IMON_KEY_PANEL = 2,
187}; 201};
188 202
189enum { 203static struct usb_class_driver imon_vfd_class = {
190 IMON_NEED_20MS_PKT_DELAY = 1 204 .name = DEVICE_NAME,
205 .fops = &vfd_fops,
206 .minor_base = DISPLAY_MINOR_BASE,
207};
208
209static struct usb_class_driver imon_lcd_class = {
210 .name = DEVICE_NAME,
211 .fops = &lcd_fops,
212 .minor_base = DISPLAY_MINOR_BASE,
213};
214
215/* imon receiver front panel/knob key table */
216static const struct imon_usb_dev_descr imon_default_table = {
217 .flags = IMON_NO_FLAGS,
218 .key_table = {
219 { 0x000000000f00ffeell, KEY_MEDIA }, /* Go */
220 { 0x000000001200ffeell, KEY_UP },
221 { 0x000000001300ffeell, KEY_DOWN },
222 { 0x000000001400ffeell, KEY_LEFT },
223 { 0x000000001500ffeell, KEY_RIGHT },
224 { 0x000000001600ffeell, KEY_ENTER },
225 { 0x000000001700ffeell, KEY_ESC },
226 { 0x000000001f00ffeell, KEY_AUDIO },
227 { 0x000000002000ffeell, KEY_VIDEO },
228 { 0x000000002100ffeell, KEY_CAMERA },
229 { 0x000000002700ffeell, KEY_DVD },
230 { 0x000000002300ffeell, KEY_TV },
231 { 0x000000002b00ffeell, KEY_EXIT },
232 { 0x000000002c00ffeell, KEY_SELECT },
233 { 0x000000002d00ffeell, KEY_MENU },
234 { 0x000000000500ffeell, KEY_PREVIOUS },
235 { 0x000000000700ffeell, KEY_REWIND },
236 { 0x000000000400ffeell, KEY_STOP },
237 { 0x000000003c00ffeell, KEY_PLAYPAUSE },
238 { 0x000000000800ffeell, KEY_FASTFORWARD },
239 { 0x000000000600ffeell, KEY_NEXT },
240 { 0x000000010000ffeell, KEY_RIGHT },
241 { 0x000001000000ffeell, KEY_LEFT },
242 { 0x000000003d00ffeell, KEY_SELECT },
243 { 0x000100000000ffeell, KEY_VOLUMEUP },
244 { 0x010000000000ffeell, KEY_VOLUMEDOWN },
245 { 0x000000000100ffeell, KEY_MUTE },
246 /* 0xffdc iMON MCE VFD */
247 { 0x00010000ffffffeell, KEY_VOLUMEUP },
248 { 0x01000000ffffffeell, KEY_VOLUMEDOWN },
249 { 0x00000001ffffffeell, KEY_MUTE },
250 { 0x0000000fffffffeell, KEY_MEDIA },
251 { 0x00000012ffffffeell, KEY_UP },
252 { 0x00000013ffffffeell, KEY_DOWN },
253 { 0x00000014ffffffeell, KEY_LEFT },
254 { 0x00000015ffffffeell, KEY_RIGHT },
255 { 0x00000016ffffffeell, KEY_ENTER },
256 { 0x00000017ffffffeell, KEY_ESC },
257 /* iMON Knob values */
258 { 0x000100ffffffffeell, KEY_VOLUMEUP },
259 { 0x010000ffffffffeell, KEY_VOLUMEDOWN },
260 { 0x000008ffffffffeell, KEY_MUTE },
261 { 0, KEY_RESERVED },
262 }
263};
264
265static const struct imon_usb_dev_descr imon_OEM_VFD = {
266 .flags = IMON_NEED_20MS_PKT_DELAY,
267 .key_table = {
268 { 0x000000000f00ffeell, KEY_MEDIA }, /* Go */
269 { 0x000000001200ffeell, KEY_UP },
270 { 0x000000001300ffeell, KEY_DOWN },
271 { 0x000000001400ffeell, KEY_LEFT },
272 { 0x000000001500ffeell, KEY_RIGHT },
273 { 0x000000001600ffeell, KEY_ENTER },
274 { 0x000000001700ffeell, KEY_ESC },
275 { 0x000000001f00ffeell, KEY_AUDIO },
276 { 0x000000002b00ffeell, KEY_EXIT },
277 { 0x000000002c00ffeell, KEY_SELECT },
278 { 0x000000002d00ffeell, KEY_MENU },
279 { 0x000000000500ffeell, KEY_PREVIOUS },
280 { 0x000000000700ffeell, KEY_REWIND },
281 { 0x000000000400ffeell, KEY_STOP },
282 { 0x000000003c00ffeell, KEY_PLAYPAUSE },
283 { 0x000000000800ffeell, KEY_FASTFORWARD },
284 { 0x000000000600ffeell, KEY_NEXT },
285 { 0x000000010000ffeell, KEY_RIGHT },
286 { 0x000001000000ffeell, KEY_LEFT },
287 { 0x000000003d00ffeell, KEY_SELECT },
288 { 0x000100000000ffeell, KEY_VOLUMEUP },
289 { 0x010000000000ffeell, KEY_VOLUMEDOWN },
290 { 0x000000000100ffeell, KEY_MUTE },
291 /* 0xffdc iMON MCE VFD */
292 { 0x00010000ffffffeell, KEY_VOLUMEUP },
293 { 0x01000000ffffffeell, KEY_VOLUMEDOWN },
294 { 0x00000001ffffffeell, KEY_MUTE },
295 { 0x0000000fffffffeell, KEY_MEDIA },
296 { 0x00000012ffffffeell, KEY_UP },
297 { 0x00000013ffffffeell, KEY_DOWN },
298 { 0x00000014ffffffeell, KEY_LEFT },
299 { 0x00000015ffffffeell, KEY_RIGHT },
300 { 0x00000016ffffffeell, KEY_ENTER },
301 { 0x00000017ffffffeell, KEY_ESC },
302 /* iMON Knob values */
303 { 0x000100ffffffffeell, KEY_VOLUMEUP },
304 { 0x010000ffffffffeell, KEY_VOLUMEDOWN },
305 { 0x000008ffffffffeell, KEY_MUTE },
306 { 0, KEY_RESERVED },
307 }
308};
309
310/* imon receiver front panel/knob key table for DH102*/
311static const struct imon_usb_dev_descr imon_DH102 = {
312 .flags = IMON_NO_FLAGS,
313 .key_table = {
314 { 0x000100000000ffeell, KEY_VOLUMEUP },
315 { 0x010000000000ffeell, KEY_VOLUMEDOWN },
316 { 0x000000010000ffeell, KEY_MUTE },
317 { 0x0000000f0000ffeell, KEY_MEDIA },
318 { 0x000000120000ffeell, KEY_UP },
319 { 0x000000130000ffeell, KEY_DOWN },
320 { 0x000000140000ffeell, KEY_LEFT },
321 { 0x000000150000ffeell, KEY_RIGHT },
322 { 0x000000160000ffeell, KEY_ENTER },
323 { 0x000000170000ffeell, KEY_ESC },
324 { 0x0000002b0000ffeell, KEY_EXIT },
325 { 0x0000002c0000ffeell, KEY_SELECT },
326 { 0x0000002d0000ffeell, KEY_MENU },
327 { 0, KEY_RESERVED }
328 }
191}; 329};
192 330
193/* 331/*
@@ -208,7 +346,8 @@ static struct usb_device_id imon_usb_id_table[] = {
208 * SoundGraph iMON PAD (IR & LCD) 346 * SoundGraph iMON PAD (IR & LCD)
209 * SoundGraph iMON Knob (IR only) 347 * SoundGraph iMON Knob (IR only)
210 */ 348 */
211 { USB_DEVICE(0x15c2, 0xffdc) }, 349 { USB_DEVICE(0x15c2, 0xffdc),
350 .driver_info = (unsigned long)&imon_default_table },
212 351
213 /* 352 /*
214 * Newer devices, all driven by the latest iMON Windows driver, full 353 * Newer devices, all driven by the latest iMON Windows driver, full
@@ -216,43 +355,62 @@ static struct usb_device_id imon_usb_id_table[] = {
216 * Need user input to fill in details on unknown devices. 355 * Need user input to fill in details on unknown devices.
217 */ 356 */
218 /* SoundGraph iMON OEM Touch LCD (IR & 7" VGA LCD) */ 357 /* SoundGraph iMON OEM Touch LCD (IR & 7" VGA LCD) */
219 { USB_DEVICE(0x15c2, 0x0034) }, 358 { USB_DEVICE(0x15c2, 0x0034),
359 .driver_info = (unsigned long)&imon_DH102 },
220 /* SoundGraph iMON OEM Touch LCD (IR & 4.3" VGA LCD) */ 360 /* SoundGraph iMON OEM Touch LCD (IR & 4.3" VGA LCD) */
221 { USB_DEVICE(0x15c2, 0x0035) }, 361 { USB_DEVICE(0x15c2, 0x0035),
362 .driver_info = (unsigned long)&imon_default_table},
222 /* SoundGraph iMON OEM VFD (IR & VFD) */ 363 /* SoundGraph iMON OEM VFD (IR & VFD) */
223 { USB_DEVICE(0x15c2, 0x0036), .driver_info = IMON_NEED_20MS_PKT_DELAY }, 364 { USB_DEVICE(0x15c2, 0x0036),
365 .driver_info = (unsigned long)&imon_OEM_VFD },
224 /* device specifics unknown */ 366 /* device specifics unknown */
225 { USB_DEVICE(0x15c2, 0x0037) }, 367 { USB_DEVICE(0x15c2, 0x0037),
368 .driver_info = (unsigned long)&imon_default_table},
226 /* SoundGraph iMON OEM LCD (IR & LCD) */ 369 /* SoundGraph iMON OEM LCD (IR & LCD) */
227 { USB_DEVICE(0x15c2, 0x0038) }, 370 { USB_DEVICE(0x15c2, 0x0038),
371 .driver_info = (unsigned long)&imon_default_table},
228 /* SoundGraph iMON UltraBay (IR & LCD) */ 372 /* SoundGraph iMON UltraBay (IR & LCD) */
229 { USB_DEVICE(0x15c2, 0x0039) }, 373 { USB_DEVICE(0x15c2, 0x0039),
374 .driver_info = (unsigned long)&imon_default_table},
230 /* device specifics unknown */ 375 /* device specifics unknown */
231 { USB_DEVICE(0x15c2, 0x003a) }, 376 { USB_DEVICE(0x15c2, 0x003a),
377 .driver_info = (unsigned long)&imon_default_table},
232 /* device specifics unknown */ 378 /* device specifics unknown */
233 { USB_DEVICE(0x15c2, 0x003b) }, 379 { USB_DEVICE(0x15c2, 0x003b),
380 .driver_info = (unsigned long)&imon_default_table},
234 /* SoundGraph iMON OEM Inside (IR only) */ 381 /* SoundGraph iMON OEM Inside (IR only) */
235 { USB_DEVICE(0x15c2, 0x003c) }, 382 { USB_DEVICE(0x15c2, 0x003c),
383 .driver_info = (unsigned long)&imon_default_table},
236 /* device specifics unknown */ 384 /* device specifics unknown */
237 { USB_DEVICE(0x15c2, 0x003d) }, 385 { USB_DEVICE(0x15c2, 0x003d),
386 .driver_info = (unsigned long)&imon_default_table},
238 /* device specifics unknown */ 387 /* device specifics unknown */
239 { USB_DEVICE(0x15c2, 0x003e) }, 388 { USB_DEVICE(0x15c2, 0x003e),
389 .driver_info = (unsigned long)&imon_default_table},
240 /* device specifics unknown */ 390 /* device specifics unknown */
241 { USB_DEVICE(0x15c2, 0x003f) }, 391 { USB_DEVICE(0x15c2, 0x003f),
392 .driver_info = (unsigned long)&imon_default_table},
242 /* device specifics unknown */ 393 /* device specifics unknown */
243 { USB_DEVICE(0x15c2, 0x0040) }, 394 { USB_DEVICE(0x15c2, 0x0040),
395 .driver_info = (unsigned long)&imon_default_table},
244 /* SoundGraph iMON MINI (IR only) */ 396 /* SoundGraph iMON MINI (IR only) */
245 { USB_DEVICE(0x15c2, 0x0041) }, 397 { USB_DEVICE(0x15c2, 0x0041),
398 .driver_info = (unsigned long)&imon_default_table},
246 /* Antec Veris Multimedia Station EZ External (IR only) */ 399 /* Antec Veris Multimedia Station EZ External (IR only) */
247 { USB_DEVICE(0x15c2, 0x0042) }, 400 { USB_DEVICE(0x15c2, 0x0042),
401 .driver_info = (unsigned long)&imon_default_table},
248 /* Antec Veris Multimedia Station Basic Internal (IR only) */ 402 /* Antec Veris Multimedia Station Basic Internal (IR only) */
249 { USB_DEVICE(0x15c2, 0x0043) }, 403 { USB_DEVICE(0x15c2, 0x0043),
404 .driver_info = (unsigned long)&imon_default_table},
250 /* Antec Veris Multimedia Station Elite (IR & VFD) */ 405 /* Antec Veris Multimedia Station Elite (IR & VFD) */
251 { USB_DEVICE(0x15c2, 0x0044) }, 406 { USB_DEVICE(0x15c2, 0x0044),
407 .driver_info = (unsigned long)&imon_default_table},
252 /* Antec Veris Multimedia Station Premiere (IR & LCD) */ 408 /* Antec Veris Multimedia Station Premiere (IR & LCD) */
253 { USB_DEVICE(0x15c2, 0x0045) }, 409 { USB_DEVICE(0x15c2, 0x0045),
410 .driver_info = (unsigned long)&imon_default_table},
254 /* device specifics unknown */ 411 /* device specifics unknown */
255 { USB_DEVICE(0x15c2, 0x0046) }, 412 { USB_DEVICE(0x15c2, 0x0046),
413 .driver_info = (unsigned long)&imon_default_table},
256 {} 414 {}
257}; 415};
258 416
@@ -266,67 +424,6 @@ static struct usb_driver imon_driver = {
266 .id_table = imon_usb_id_table, 424 .id_table = imon_usb_id_table,
267}; 425};
268 426
269static struct usb_class_driver imon_vfd_class = {
270 .name = DEVICE_NAME,
271 .fops = &vfd_fops,
272 .minor_base = DISPLAY_MINOR_BASE,
273};
274
275static struct usb_class_driver imon_lcd_class = {
276 .name = DEVICE_NAME,
277 .fops = &lcd_fops,
278 .minor_base = DISPLAY_MINOR_BASE,
279};
280
281/* imon receiver front panel/knob key table */
282static const struct {
283 u64 hw_code;
284 u32 keycode;
285} imon_panel_key_table[] = {
286 { 0x000000000f00ffeell, KEY_MEDIA }, /* Go */
287 { 0x000000001200ffeell, KEY_UP },
288 { 0x000000001300ffeell, KEY_DOWN },
289 { 0x000000001400ffeell, KEY_LEFT },
290 { 0x000000001500ffeell, KEY_RIGHT },
291 { 0x000000001600ffeell, KEY_ENTER },
292 { 0x000000001700ffeell, KEY_ESC },
293 { 0x000000001f00ffeell, KEY_AUDIO },
294 { 0x000000002000ffeell, KEY_VIDEO },
295 { 0x000000002100ffeell, KEY_CAMERA },
296 { 0x000000002700ffeell, KEY_DVD },
297 { 0x000000002300ffeell, KEY_TV },
298 { 0x000000002b00ffeell, KEY_EXIT },
299 { 0x000000002c00ffeell, KEY_SELECT },
300 { 0x000000002d00ffeell, KEY_MENU },
301 { 0x000000000500ffeell, KEY_PREVIOUS },
302 { 0x000000000700ffeell, KEY_REWIND },
303 { 0x000000000400ffeell, KEY_STOP },
304 { 0x000000003c00ffeell, KEY_PLAYPAUSE },
305 { 0x000000000800ffeell, KEY_FASTFORWARD },
306 { 0x000000000600ffeell, KEY_NEXT },
307 { 0x000000010000ffeell, KEY_RIGHT },
308 { 0x000001000000ffeell, KEY_LEFT },
309 { 0x000000003d00ffeell, KEY_SELECT },
310 { 0x000100000000ffeell, KEY_VOLUMEUP },
311 { 0x010000000000ffeell, KEY_VOLUMEDOWN },
312 { 0x000000000100ffeell, KEY_MUTE },
313 /* 0xffdc iMON MCE VFD */
314 { 0x00010000ffffffeell, KEY_VOLUMEUP },
315 { 0x01000000ffffffeell, KEY_VOLUMEDOWN },
316 { 0x00000001ffffffeell, KEY_MUTE },
317 { 0x0000000fffffffeell, KEY_MEDIA },
318 { 0x00000012ffffffeell, KEY_UP },
319 { 0x00000013ffffffeell, KEY_DOWN },
320 { 0x00000014ffffffeell, KEY_LEFT },
321 { 0x00000015ffffffeell, KEY_RIGHT },
322 { 0x00000016ffffffeell, KEY_ENTER },
323 { 0x00000017ffffffeell, KEY_ESC },
324 /* iMON Knob values */
325 { 0x000100ffffffffeell, KEY_VOLUMEUP },
326 { 0x010000ffffffffeell, KEY_VOLUMEDOWN },
327 { 0x000008ffffffffeell, KEY_MUTE },
328};
329
330/* to prevent races between open() and disconnect(), probing, etc */ 427/* to prevent races between open() and disconnect(), probing, etc */
331static DEFINE_MUTEX(driver_lock); 428static DEFINE_MUTEX(driver_lock);
332 429
@@ -1210,18 +1307,19 @@ static u32 imon_mce_key_lookup(struct imon_context *ictx, u32 scancode)
1210 return keycode; 1307 return keycode;
1211} 1308}
1212 1309
1213static u32 imon_panel_key_lookup(u64 code) 1310static u32 imon_panel_key_lookup(struct imon_context *ictx, u64 code)
1214{ 1311{
1215 int i; 1312 int i;
1216 u32 keycode = KEY_RESERVED; 1313 u32 keycode = KEY_RESERVED;
1314 struct imon_panel_key_table *key_table = ictx->dev_descr->key_table;
1217 1315
1218 for (i = 0; i < ARRAY_SIZE(imon_panel_key_table); i++) { 1316 for (i = 0; key_table[i].hw_code != 0; i++) {
1219 if (imon_panel_key_table[i].hw_code == (code | 0xffee)) { 1317 if (key_table[i].hw_code == (code | 0xffee)) {
1220 keycode = imon_panel_key_table[i].keycode; 1318 keycode = key_table[i].keycode;
1221 break; 1319 break;
1222 } 1320 }
1223 } 1321 }
1224 1322 ictx->release_code = false;
1225 return keycode; 1323 return keycode;
1226} 1324}
1227 1325
@@ -1340,7 +1438,7 @@ static void imon_pad_to_keys(struct imon_context *ictx, unsigned char *buf)
1340 } 1438 }
1341 buf[2] = dir & 0xFF; 1439 buf[2] = dir & 0xFF;
1342 buf[3] = (dir >> 8) & 0xFF; 1440 buf[3] = (dir >> 8) & 0xFF;
1343 scancode = be32_to_cpu(*((u32 *)buf)); 1441 scancode = be32_to_cpu(*((__be32 *)buf));
1344 } 1442 }
1345 } else { 1443 } else {
1346 /* 1444 /*
@@ -1404,7 +1502,7 @@ static void imon_pad_to_keys(struct imon_context *ictx, unsigned char *buf)
1404 } 1502 }
1405 buf[2] = dir & 0xFF; 1503 buf[2] = dir & 0xFF;
1406 buf[3] = (dir >> 8) & 0xFF; 1504 buf[3] = (dir >> 8) & 0xFF;
1407 scancode = be32_to_cpu(*((u32 *)buf)); 1505 scancode = be32_to_cpu(*((__be32 *)buf));
1408 } else { 1506 } else {
1409 /* 1507 /*
1410 * Hack alert: instead of using keycodes, we have 1508 * Hack alert: instead of using keycodes, we have
@@ -1509,11 +1607,12 @@ static void imon_incoming_packet(struct imon_context *ictx,
1509 1607
1510 /* Figure out what key was pressed */ 1608 /* Figure out what key was pressed */
1511 if (len == 8 && buf[7] == 0xee) { 1609 if (len == 8 && buf[7] == 0xee) {
1512 scancode = be64_to_cpu(*((u64 *)buf)); 1610 scancode = be64_to_cpu(*((__be64 *)buf));
1513 ktype = IMON_KEY_PANEL; 1611 ktype = IMON_KEY_PANEL;
1514 kc = imon_panel_key_lookup(scancode); 1612 kc = imon_panel_key_lookup(ictx, scancode);
1613 ictx->release_code = false;
1515 } else { 1614 } else {
1516 scancode = be32_to_cpu(*((u32 *)buf)); 1615 scancode = be32_to_cpu(*((__be32 *)buf));
1517 if (ictx->rc_type == RC_BIT_RC6_MCE) { 1616 if (ictx->rc_type == RC_BIT_RC6_MCE) {
1518 ktype = IMON_KEY_IMON; 1617 ktype = IMON_KEY_IMON;
1519 if (buf[0] == 0x80) 1618 if (buf[0] == 0x80)
@@ -1908,6 +2007,7 @@ out:
1908 2007
1909static struct input_dev *imon_init_idev(struct imon_context *ictx) 2008static struct input_dev *imon_init_idev(struct imon_context *ictx)
1910{ 2009{
2010 struct imon_panel_key_table *key_table = ictx->dev_descr->key_table;
1911 struct input_dev *idev; 2011 struct input_dev *idev;
1912 int ret, i; 2012 int ret, i;
1913 2013
@@ -1933,8 +2033,8 @@ static struct input_dev *imon_init_idev(struct imon_context *ictx)
1933 BIT_MASK(REL_WHEEL); 2033 BIT_MASK(REL_WHEEL);
1934 2034
1935 /* panel and/or knob code support */ 2035 /* panel and/or knob code support */
1936 for (i = 0; i < ARRAY_SIZE(imon_panel_key_table); i++) { 2036 for (i = 0; key_table[i].hw_code != 0; i++) {
1937 u32 kc = imon_panel_key_table[i].keycode; 2037 u32 kc = key_table[i].keycode;
1938 __set_bit(kc, idev->keybit); 2038 __set_bit(kc, idev->keybit);
1939 } 2039 }
1940 2040
@@ -2023,7 +2123,7 @@ static bool imon_find_endpoints(struct imon_context *ictx,
2023 for (i = 0; i < num_endpts && !(ir_ep_found && display_ep_found); ++i) { 2123 for (i = 0; i < num_endpts && !(ir_ep_found && display_ep_found); ++i) {
2024 ep = &iface_desc->endpoint[i].desc; 2124 ep = &iface_desc->endpoint[i].desc;
2025 ep_dir = ep->bEndpointAddress & USB_ENDPOINT_DIR_MASK; 2125 ep_dir = ep->bEndpointAddress & USB_ENDPOINT_DIR_MASK;
2026 ep_type = ep->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK; 2126 ep_type = usb_endpoint_type(ep);
2027 2127
2028 if (!ir_ep_found && ep_dir == USB_DIR_IN && 2128 if (!ir_ep_found && ep_dir == USB_DIR_IN &&
2029 ep_type == USB_ENDPOINT_XFER_INT) { 2129 ep_type == USB_ENDPOINT_XFER_INT) {
@@ -2135,9 +2235,11 @@ static struct imon_context *imon_init_intf0(struct usb_interface *intf,
2135 ictx->vendor = le16_to_cpu(ictx->usbdev_intf0->descriptor.idVendor); 2235 ictx->vendor = le16_to_cpu(ictx->usbdev_intf0->descriptor.idVendor);
2136 ictx->product = le16_to_cpu(ictx->usbdev_intf0->descriptor.idProduct); 2236 ictx->product = le16_to_cpu(ictx->usbdev_intf0->descriptor.idProduct);
2137 2237
2238 /* save drive info for later accessing the panel/knob key table */
2239 ictx->dev_descr = (struct imon_usb_dev_descr *)id->driver_info;
2138 /* default send_packet delay is 5ms but some devices need more */ 2240 /* default send_packet delay is 5ms but some devices need more */
2139 ictx->send_packet_delay = id->driver_info & IMON_NEED_20MS_PKT_DELAY ? 2241 ictx->send_packet_delay = ictx->dev_descr->flags &
2140 20 : 5; 2242 IMON_NEED_20MS_PKT_DELAY ? 20 : 5;
2141 2243
2142 ret = -ENODEV; 2244 ret = -ENODEV;
2143 iface_desc = intf->cur_altsetting; 2245 iface_desc = intf->cur_altsetting;
@@ -2181,6 +2283,7 @@ idev_setup_failed:
2181 usb_kill_urb(ictx->rx_urb_intf0); 2283 usb_kill_urb(ictx->rx_urb_intf0);
2182urb_submit_failed: 2284urb_submit_failed:
2183find_endpoint_failed: 2285find_endpoint_failed:
2286 usb_put_dev(ictx->usbdev_intf0);
2184 mutex_unlock(&ictx->lock); 2287 mutex_unlock(&ictx->lock);
2185 usb_free_urb(tx_urb); 2288 usb_free_urb(tx_urb);
2186tx_urb_alloc_failed: 2289tx_urb_alloc_failed:
@@ -2253,6 +2356,7 @@ urb_submit_failed:
2253 input_unregister_device(ictx->touch); 2356 input_unregister_device(ictx->touch);
2254touch_setup_failed: 2357touch_setup_failed:
2255find_endpoint_failed: 2358find_endpoint_failed:
2359 usb_put_dev(ictx->usbdev_intf1);
2256 mutex_unlock(&ictx->lock); 2360 mutex_unlock(&ictx->lock);
2257 usb_free_urb(rx_urb); 2361 usb_free_urb(rx_urb);
2258rx_urb_alloc_failed: 2362rx_urb_alloc_failed:
@@ -2366,11 +2470,13 @@ static int imon_probe(struct usb_interface *interface,
2366 usbdev->bus->busnum, usbdev->devnum); 2470 usbdev->bus->busnum, usbdev->devnum);
2367 2471
2368 mutex_unlock(&driver_lock); 2472 mutex_unlock(&driver_lock);
2473 usb_put_dev(usbdev);
2369 2474
2370 return 0; 2475 return 0;
2371 2476
2372fail: 2477fail:
2373 mutex_unlock(&driver_lock); 2478 mutex_unlock(&driver_lock);
2479 usb_put_dev(usbdev);
2374 dev_err(dev, "unable to register, err %d\n", ret); 2480 dev_err(dev, "unable to register, err %d\n", ret);
2375 2481
2376 return ret; 2482 return ret;
@@ -2410,6 +2516,7 @@ static void imon_disconnect(struct usb_interface *interface)
2410 if (ifnum == 0) { 2516 if (ifnum == 0) {
2411 ictx->dev_present_intf0 = false; 2517 ictx->dev_present_intf0 = false;
2412 usb_kill_urb(ictx->rx_urb_intf0); 2518 usb_kill_urb(ictx->rx_urb_intf0);
2519 usb_put_dev(ictx->usbdev_intf0);
2413 input_unregister_device(ictx->idev); 2520 input_unregister_device(ictx->idev);
2414 rc_unregister_device(ictx->rdev); 2521 rc_unregister_device(ictx->rdev);
2415 if (ictx->display_supported) { 2522 if (ictx->display_supported) {
@@ -2421,6 +2528,7 @@ static void imon_disconnect(struct usb_interface *interface)
2421 } else { 2528 } else {
2422 ictx->dev_present_intf1 = false; 2529 ictx->dev_present_intf1 = false;
2423 usb_kill_urb(ictx->rx_urb_intf1); 2530 usb_kill_urb(ictx->rx_urb_intf1);
2531 usb_put_dev(ictx->usbdev_intf1);
2424 if (ictx->display_type == IMON_DISPLAY_TYPE_VGA) { 2532 if (ictx->display_type == IMON_DISPLAY_TYPE_VGA) {
2425 input_unregister_device(ictx->touch); 2533 input_unregister_device(ictx->touch);
2426 del_timer_sync(&ictx->ttimer); 2534 del_timer_sync(&ictx->ttimer);
diff --git a/drivers/media/rc/ir-hix5hd2.c b/drivers/media/rc/ir-hix5hd2.c
new file mode 100644
index 000000000000..08bbd4f508cd
--- /dev/null
+++ b/drivers/media/rc/ir-hix5hd2.c
@@ -0,0 +1,351 @@
1/*
2 * Copyright (c) 2014 Linaro Ltd.
3 * Copyright (c) 2014 Hisilicon Limited.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 */
9
10#include <linux/clk.h>
11#include <linux/delay.h>
12#include <linux/interrupt.h>
13#include <linux/mfd/syscon.h>
14#include <linux/module.h>
15#include <linux/of_device.h>
16#include <linux/regmap.h>
17#include <media/rc-core.h>
18
19/* Allow the driver to compile on all architectures */
20#ifndef writel_relaxed
21# define writel_relaxed writel
22#endif
23#ifndef readl_relaxed
24# define readl_relaxed readl
25#endif
26
27#define IR_ENABLE 0x00
28#define IR_CONFIG 0x04
29#define CNT_LEADS 0x08
30#define CNT_LEADE 0x0c
31#define CNT_SLEADE 0x10
32#define CNT0_B 0x14
33#define CNT1_B 0x18
34#define IR_BUSY 0x1c
35#define IR_DATAH 0x20
36#define IR_DATAL 0x24
37#define IR_INTM 0x28
38#define IR_INTS 0x2c
39#define IR_INTC 0x30
40#define IR_START 0x34
41
42/* interrupt mask */
43#define INTMS_SYMBRCV (BIT(24) | BIT(8))
44#define INTMS_TIMEOUT (BIT(25) | BIT(9))
45#define INTMS_OVERFLOW (BIT(26) | BIT(10))
46#define INT_CLR_OVERFLOW BIT(18)
47#define INT_CLR_TIMEOUT BIT(17)
48#define INT_CLR_RCV BIT(16)
49#define INT_CLR_RCVTIMEOUT (BIT(16) | BIT(17))
50
51#define IR_CLK 0x48
52#define IR_CLK_ENABLE BIT(4)
53#define IR_CLK_RESET BIT(5)
54
55#define IR_CFG_WIDTH_MASK 0xffff
56#define IR_CFG_WIDTH_SHIFT 16
57#define IR_CFG_FORMAT_MASK 0x3
58#define IR_CFG_FORMAT_SHIFT 14
59#define IR_CFG_INT_LEVEL_MASK 0x3f
60#define IR_CFG_INT_LEVEL_SHIFT 8
61/* only support raw mode */
62#define IR_CFG_MODE_RAW BIT(7)
63#define IR_CFG_FREQ_MASK 0x7f
64#define IR_CFG_FREQ_SHIFT 0
65#define IR_CFG_INT_THRESHOLD 1
66/* symbol start from low to high, symbol stream end at high*/
67#define IR_CFG_SYMBOL_FMT 0
68#define IR_CFG_SYMBOL_MAXWIDTH 0x3e80
69
70#define IR_HIX5HD2_NAME "hix5hd2-ir"
71
72struct hix5hd2_ir_priv {
73 int irq;
74 void volatile __iomem *base;
75 struct device *dev;
76 struct rc_dev *rdev;
77 struct regmap *regmap;
78 struct clk *clock;
79 unsigned long rate;
80};
81
82static void hix5hd2_ir_enable(struct hix5hd2_ir_priv *dev, bool on)
83{
84 u32 val;
85
86 regmap_read(dev->regmap, IR_CLK, &val);
87 if (on) {
88 val &= ~IR_CLK_RESET;
89 val |= IR_CLK_ENABLE;
90 } else {
91 val &= ~IR_CLK_ENABLE;
92 val |= IR_CLK_RESET;
93 }
94 regmap_write(dev->regmap, IR_CLK, val);
95}
96
97static int hix5hd2_ir_config(struct hix5hd2_ir_priv *priv)
98{
99 int timeout = 10000;
100 u32 val, rate;
101
102 writel_relaxed(0x01, priv->base + IR_ENABLE);
103 while (readl_relaxed(priv->base + IR_BUSY)) {
104 if (timeout--) {
105 udelay(1);
106 } else {
107 dev_err(priv->dev, "IR_BUSY timeout\n");
108 return -ETIMEDOUT;
109 }
110 }
111
112 /* Now only support raw mode, with symbol start from low to high */
113 rate = DIV_ROUND_CLOSEST(priv->rate, 1000000);
114 val = IR_CFG_SYMBOL_MAXWIDTH & IR_CFG_WIDTH_MASK << IR_CFG_WIDTH_SHIFT;
115 val |= IR_CFG_SYMBOL_FMT & IR_CFG_FORMAT_MASK << IR_CFG_FORMAT_SHIFT;
116 val |= (IR_CFG_INT_THRESHOLD - 1) & IR_CFG_INT_LEVEL_MASK
117 << IR_CFG_INT_LEVEL_SHIFT;
118 val |= IR_CFG_MODE_RAW;
119 val |= (rate - 1) & IR_CFG_FREQ_MASK << IR_CFG_FREQ_SHIFT;
120 writel_relaxed(val, priv->base + IR_CONFIG);
121
122 writel_relaxed(0x00, priv->base + IR_INTM);
123 /* write arbitrary value to start */
124 writel_relaxed(0x01, priv->base + IR_START);
125 return 0;
126}
127
128static int hix5hd2_ir_open(struct rc_dev *rdev)
129{
130 struct hix5hd2_ir_priv *priv = rdev->priv;
131
132 hix5hd2_ir_enable(priv, true);
133 return hix5hd2_ir_config(priv);
134}
135
136static void hix5hd2_ir_close(struct rc_dev *rdev)
137{
138 struct hix5hd2_ir_priv *priv = rdev->priv;
139
140 hix5hd2_ir_enable(priv, false);
141}
142
143static irqreturn_t hix5hd2_ir_rx_interrupt(int irq, void *data)
144{
145 u32 symb_num, symb_val, symb_time;
146 u32 data_l, data_h;
147 u32 irq_sr, i;
148 struct hix5hd2_ir_priv *priv = data;
149
150 irq_sr = readl_relaxed(priv->base + IR_INTS);
151 if (irq_sr & INTMS_OVERFLOW) {
152 /*
153 * we must read IR_DATAL first, then we can clean up
154 * IR_INTS availably since logic would not clear
155 * fifo when overflow, drv do the job
156 */
157 ir_raw_event_reset(priv->rdev);
158 symb_num = readl_relaxed(priv->base + IR_DATAH);
159 for (i = 0; i < symb_num; i++)
160 readl_relaxed(priv->base + IR_DATAL);
161
162 writel_relaxed(INT_CLR_OVERFLOW, priv->base + IR_INTC);
163 dev_info(priv->dev, "overflow, level=%d\n",
164 IR_CFG_INT_THRESHOLD);
165 }
166
167 if ((irq_sr & INTMS_SYMBRCV) || (irq_sr & INTMS_TIMEOUT)) {
168 DEFINE_IR_RAW_EVENT(ev);
169
170 symb_num = readl_relaxed(priv->base + IR_DATAH);
171 for (i = 0; i < symb_num; i++) {
172 symb_val = readl_relaxed(priv->base + IR_DATAL);
173 data_l = ((symb_val & 0xffff) * 10);
174 data_h = ((symb_val >> 16) & 0xffff) * 10;
175 symb_time = (data_l + data_h) / 10;
176
177 ev.duration = US_TO_NS(data_l);
178 ev.pulse = true;
179 ir_raw_event_store(priv->rdev, &ev);
180
181 if (symb_time < IR_CFG_SYMBOL_MAXWIDTH) {
182 ev.duration = US_TO_NS(data_h);
183 ev.pulse = false;
184 ir_raw_event_store(priv->rdev, &ev);
185 } else {
186 ir_raw_event_set_idle(priv->rdev, true);
187 }
188 }
189
190 if (irq_sr & INTMS_SYMBRCV)
191 writel_relaxed(INT_CLR_RCV, priv->base + IR_INTC);
192 if (irq_sr & INTMS_TIMEOUT)
193 writel_relaxed(INT_CLR_TIMEOUT, priv->base + IR_INTC);
194 }
195
196 /* Empty software fifo */
197 ir_raw_event_handle(priv->rdev);
198 return IRQ_HANDLED;
199}
200
201static int hix5hd2_ir_probe(struct platform_device *pdev)
202{
203 struct rc_dev *rdev;
204 struct device *dev = &pdev->dev;
205 struct resource *res;
206 struct hix5hd2_ir_priv *priv;
207 struct device_node *node = pdev->dev.of_node;
208 const char *map_name;
209 int ret;
210
211 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
212 if (!priv)
213 return -ENOMEM;
214
215 priv->regmap = syscon_regmap_lookup_by_phandle(node,
216 "hisilicon,power-syscon");
217 if (IS_ERR(priv->regmap)) {
218 dev_err(dev, "no power-reg\n");
219 return -EINVAL;
220 }
221
222 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
223 priv->base = devm_ioremap_resource(dev, res);
224 if (IS_ERR((__force void *)priv->base))
225 return PTR_ERR((__force void *)priv->base);
226
227 priv->irq = platform_get_irq(pdev, 0);
228 if (priv->irq < 0) {
229 dev_err(dev, "irq can not get\n");
230 return priv->irq;
231 }
232
233 rdev = rc_allocate_device();
234 if (!rdev)
235 return -ENOMEM;
236
237 priv->clock = devm_clk_get(dev, NULL);
238 if (IS_ERR(priv->clock)) {
239 dev_err(dev, "clock not found\n");
240 ret = PTR_ERR(priv->clock);
241 goto err;
242 }
243 clk_prepare_enable(priv->clock);
244 priv->rate = clk_get_rate(priv->clock);
245
246 rdev->driver_type = RC_DRIVER_IR_RAW;
247 rdev->allowed_protocols = RC_BIT_ALL;
248 rdev->priv = priv;
249 rdev->open = hix5hd2_ir_open;
250 rdev->close = hix5hd2_ir_close;
251 rdev->driver_name = IR_HIX5HD2_NAME;
252 map_name = of_get_property(node, "linux,rc-map-name", NULL);
253 rdev->map_name = map_name ?: RC_MAP_EMPTY;
254 rdev->input_name = IR_HIX5HD2_NAME;
255 rdev->input_phys = IR_HIX5HD2_NAME "/input0";
256 rdev->input_id.bustype = BUS_HOST;
257 rdev->input_id.vendor = 0x0001;
258 rdev->input_id.product = 0x0001;
259 rdev->input_id.version = 0x0100;
260 rdev->rx_resolution = US_TO_NS(10);
261 rdev->timeout = US_TO_NS(IR_CFG_SYMBOL_MAXWIDTH * 10);
262
263 ret = rc_register_device(rdev);
264 if (ret < 0)
265 goto clkerr;
266
267 if (devm_request_irq(dev, priv->irq, hix5hd2_ir_rx_interrupt,
268 IRQF_NO_SUSPEND, pdev->name, priv) < 0) {
269 dev_err(dev, "IRQ %d register failed\n", priv->irq);
270 ret = -EINVAL;
271 goto regerr;
272 }
273
274 priv->rdev = rdev;
275 priv->dev = dev;
276 platform_set_drvdata(pdev, priv);
277
278 return ret;
279
280regerr:
281 rc_unregister_device(rdev);
282 rdev = NULL;
283clkerr:
284 clk_disable_unprepare(priv->clock);
285err:
286 rc_free_device(rdev);
287 dev_err(dev, "Unable to register device (%d)\n", ret);
288 return ret;
289}
290
291static int hix5hd2_ir_remove(struct platform_device *pdev)
292{
293 struct hix5hd2_ir_priv *priv = platform_get_drvdata(pdev);
294
295 clk_disable_unprepare(priv->clock);
296 rc_unregister_device(priv->rdev);
297 return 0;
298}
299
300#ifdef CONFIG_PM
301static int hix5hd2_ir_suspend(struct device *dev)
302{
303 struct hix5hd2_ir_priv *priv = dev_get_drvdata(dev);
304
305 clk_disable_unprepare(priv->clock);
306 hix5hd2_ir_enable(priv, false);
307
308 return 0;
309}
310
311static int hix5hd2_ir_resume(struct device *dev)
312{
313 struct hix5hd2_ir_priv *priv = dev_get_drvdata(dev);
314
315 hix5hd2_ir_enable(priv, true);
316 clk_prepare_enable(priv->clock);
317
318 writel_relaxed(0x01, priv->base + IR_ENABLE);
319 writel_relaxed(0x00, priv->base + IR_INTM);
320 writel_relaxed(0xff, priv->base + IR_INTC);
321 writel_relaxed(0x01, priv->base + IR_START);
322
323 return 0;
324}
325#endif
326
327static SIMPLE_DEV_PM_OPS(hix5hd2_ir_pm_ops, hix5hd2_ir_suspend,
328 hix5hd2_ir_resume);
329
330static struct of_device_id hix5hd2_ir_table[] = {
331 { .compatible = "hisilicon,hix5hd2-ir", },
332 {},
333};
334MODULE_DEVICE_TABLE(of, hix5hd2_ir_table);
335
336static struct platform_driver hix5hd2_ir_driver = {
337 .driver = {
338 .name = IR_HIX5HD2_NAME,
339 .of_match_table = hix5hd2_ir_table,
340 .pm = &hix5hd2_ir_pm_ops,
341 },
342 .probe = hix5hd2_ir_probe,
343 .remove = hix5hd2_ir_remove,
344};
345
346module_platform_driver(hix5hd2_ir_driver);
347
348MODULE_DESCRIPTION("IR controller driver for hix5hd2 platforms");
349MODULE_AUTHOR("Guoxiong Yan <yanguoxiong@huawei.com>");
350MODULE_LICENSE("GPL v2");
351MODULE_ALIAS("platform:hix5hd2-ir");
diff --git a/drivers/media/rc/ite-cir.c b/drivers/media/rc/ite-cir.c
index 447fe35862dc..56abf9120cc2 100644
--- a/drivers/media/rc/ite-cir.c
+++ b/drivers/media/rc/ite-cir.c
@@ -1666,7 +1666,6 @@ static int ite_suspend(struct pnp_dev *pdev, pm_message_t state)
1666 1666
1667static int ite_resume(struct pnp_dev *pdev) 1667static int ite_resume(struct pnp_dev *pdev)
1668{ 1668{
1669 int ret = 0;
1670 struct ite_dev *dev = pnp_get_drvdata(pdev); 1669 struct ite_dev *dev = pnp_get_drvdata(pdev);
1671 unsigned long flags; 1670 unsigned long flags;
1672 1671
@@ -1681,7 +1680,7 @@ static int ite_resume(struct pnp_dev *pdev)
1681 1680
1682 spin_unlock_irqrestore(&dev->lock, flags); 1681 spin_unlock_irqrestore(&dev->lock, flags);
1683 1682
1684 return ret; 1683 return 0;
1685} 1684}
1686 1685
1687static void ite_shutdown(struct pnp_dev *pdev) 1686static void ite_shutdown(struct pnp_dev *pdev)
diff --git a/drivers/media/rc/keymaps/Makefile b/drivers/media/rc/keymaps/Makefile
index 0b8c54919010..abf60794223d 100644
--- a/drivers/media/rc/keymaps/Makefile
+++ b/drivers/media/rc/keymaps/Makefile
@@ -28,6 +28,7 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \
28 rc-dm1105-nec.o \ 28 rc-dm1105-nec.o \
29 rc-dntv-live-dvb-t.o \ 29 rc-dntv-live-dvb-t.o \
30 rc-dntv-live-dvbt-pro.o \ 30 rc-dntv-live-dvbt-pro.o \
31 rc-dvbsky.o \
31 rc-em-terratec.o \ 32 rc-em-terratec.o \
32 rc-encore-enltv2.o \ 33 rc-encore-enltv2.o \
33 rc-encore-enltv.o \ 34 rc-encore-enltv.o \
diff --git a/drivers/media/rc/keymaps/rc-dvbsky.c b/drivers/media/rc/keymaps/rc-dvbsky.c
new file mode 100644
index 000000000000..c5115a1165d1
--- /dev/null
+++ b/drivers/media/rc/keymaps/rc-dvbsky.c
@@ -0,0 +1,78 @@
1/* rc-dvbsky.c - Keytable for DVBSky Remote Controllers
2 *
3 * keymap imported from ir-keymaps.c
4 *
5 *
6 * Copyright (c) 2010-2012 by Nibble Max <nibble.max@gmail.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#include <media/rc-map.h>
15#include <linux/module.h>
16/*
17 * This table contains the complete RC5 code, instead of just the data part
18 */
19
20static struct rc_map_table rc5_dvbsky[] = {
21 { 0x0000, KEY_0 },
22 { 0x0001, KEY_1 },
23 { 0x0002, KEY_2 },
24 { 0x0003, KEY_3 },
25 { 0x0004, KEY_4 },
26 { 0x0005, KEY_5 },
27 { 0x0006, KEY_6 },
28 { 0x0007, KEY_7 },
29 { 0x0008, KEY_8 },
30 { 0x0009, KEY_9 },
31 { 0x000a, KEY_MUTE },
32 { 0x000d, KEY_OK },
33 { 0x000b, KEY_STOP },
34 { 0x000c, KEY_EXIT },
35 { 0x000e, KEY_CAMERA }, /*Snap shot*/
36 { 0x000f, KEY_SUBTITLE }, /*PIP*/
37 { 0x0010, KEY_VOLUMEUP },
38 { 0x0011, KEY_VOLUMEDOWN },
39 { 0x0012, KEY_FAVORITES },
40 { 0x0013, KEY_LIST }, /*Info*/
41 { 0x0016, KEY_PAUSE },
42 { 0x0017, KEY_PLAY },
43 { 0x001f, KEY_RECORD },
44 { 0x0020, KEY_CHANNELDOWN },
45 { 0x0021, KEY_CHANNELUP },
46 { 0x0025, KEY_POWER2 },
47 { 0x0026, KEY_REWIND },
48 { 0x0027, KEY_FASTFORWARD },
49 { 0x0029, KEY_LAST },
50 { 0x002b, KEY_MENU },
51 { 0x002c, KEY_EPG },
52 { 0x002d, KEY_ZOOM },
53};
54
55static struct rc_map_list rc5_dvbsky_map = {
56 .map = {
57 .scan = rc5_dvbsky,
58 .size = ARRAY_SIZE(rc5_dvbsky),
59 .rc_type = RC_TYPE_RC5,
60 .name = RC_MAP_DVBSKY,
61 }
62};
63
64static int __init init_rc_map_rc5_dvbsky(void)
65{
66 return rc_map_register(&rc5_dvbsky_map);
67}
68
69static void __exit exit_rc_map_rc5_dvbsky(void)
70{
71 rc_map_unregister(&rc5_dvbsky_map);
72}
73
74module_init(init_rc_map_rc5_dvbsky)
75module_exit(exit_rc_map_rc5_dvbsky)
76
77MODULE_LICENSE("GPL");
78MODULE_AUTHOR("Nibble Max <nibble.max@gmail.com>");
diff --git a/drivers/media/rc/lirc_dev.c b/drivers/media/rc/lirc_dev.c
index dc5cbffcd5a2..249d2fbc8f37 100644
--- a/drivers/media/rc/lirc_dev.c
+++ b/drivers/media/rc/lirc_dev.c
@@ -595,7 +595,7 @@ long lirc_dev_fop_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
595 595
596 switch (cmd) { 596 switch (cmd) {
597 case LIRC_GET_FEATURES: 597 case LIRC_GET_FEATURES:
598 result = put_user(ir->d.features, (__u32 *)arg); 598 result = put_user(ir->d.features, (__u32 __user *)arg);
599 break; 599 break;
600 case LIRC_GET_REC_MODE: 600 case LIRC_GET_REC_MODE:
601 if (!(ir->d.features & LIRC_CAN_REC_MASK)) { 601 if (!(ir->d.features & LIRC_CAN_REC_MASK)) {
@@ -605,7 +605,7 @@ long lirc_dev_fop_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
605 605
606 result = put_user(LIRC_REC2MODE 606 result = put_user(LIRC_REC2MODE
607 (ir->d.features & LIRC_CAN_REC_MASK), 607 (ir->d.features & LIRC_CAN_REC_MASK),
608 (__u32 *)arg); 608 (__u32 __user *)arg);
609 break; 609 break;
610 case LIRC_SET_REC_MODE: 610 case LIRC_SET_REC_MODE:
611 if (!(ir->d.features & LIRC_CAN_REC_MASK)) { 611 if (!(ir->d.features & LIRC_CAN_REC_MASK)) {
@@ -613,7 +613,7 @@ long lirc_dev_fop_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
613 break; 613 break;
614 } 614 }
615 615
616 result = get_user(mode, (__u32 *)arg); 616 result = get_user(mode, (__u32 __user *)arg);
617 if (!result && !(LIRC_MODE2REC(mode) & ir->d.features)) 617 if (!result && !(LIRC_MODE2REC(mode) & ir->d.features))
618 result = -EINVAL; 618 result = -EINVAL;
619 /* 619 /*
@@ -622,7 +622,7 @@ long lirc_dev_fop_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
622 */ 622 */
623 break; 623 break;
624 case LIRC_GET_LENGTH: 624 case LIRC_GET_LENGTH:
625 result = put_user(ir->d.code_length, (__u32 *)arg); 625 result = put_user(ir->d.code_length, (__u32 __user *)arg);
626 break; 626 break;
627 case LIRC_GET_MIN_TIMEOUT: 627 case LIRC_GET_MIN_TIMEOUT:
628 if (!(ir->d.features & LIRC_CAN_SET_REC_TIMEOUT) || 628 if (!(ir->d.features & LIRC_CAN_SET_REC_TIMEOUT) ||
@@ -631,7 +631,7 @@ long lirc_dev_fop_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
631 break; 631 break;
632 } 632 }
633 633
634 result = put_user(ir->d.min_timeout, (__u32 *)arg); 634 result = put_user(ir->d.min_timeout, (__u32 __user *)arg);
635 break; 635 break;
636 case LIRC_GET_MAX_TIMEOUT: 636 case LIRC_GET_MAX_TIMEOUT:
637 if (!(ir->d.features & LIRC_CAN_SET_REC_TIMEOUT) || 637 if (!(ir->d.features & LIRC_CAN_SET_REC_TIMEOUT) ||
@@ -640,7 +640,7 @@ long lirc_dev_fop_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
640 break; 640 break;
641 } 641 }
642 642
643 result = put_user(ir->d.max_timeout, (__u32 *)arg); 643 result = put_user(ir->d.max_timeout, (__u32 __user *)arg);
644 break; 644 break;
645 default: 645 default:
646 result = -EINVAL; 646 result = -EINVAL;
@@ -736,7 +736,7 @@ ssize_t lirc_dev_fop_read(struct file *file,
736 } 736 }
737 } else { 737 } else {
738 lirc_buffer_read(ir->buf, buf); 738 lirc_buffer_read(ir->buf, buf);
739 ret = copy_to_user((void *)buffer+written, buf, 739 ret = copy_to_user((void __user *)buffer+written, buf,
740 ir->buf->chunk_size); 740 ir->buf->chunk_size);
741 if (!ret) 741 if (!ret)
742 written += ir->buf->chunk_size; 742 written += ir->buf->chunk_size;
diff --git a/drivers/media/rc/mceusb.c b/drivers/media/rc/mceusb.c
index 45b0894288e5..2cdb740cde48 100644
--- a/drivers/media/rc/mceusb.c
+++ b/drivers/media/rc/mceusb.c
@@ -397,6 +397,10 @@ static struct usb_device_id mceusb_dev_table[] = {
397 .driver_info = HAUPPAUGE_CX_HYBRID_TV }, 397 .driver_info = HAUPPAUGE_CX_HYBRID_TV },
398 { USB_DEVICE(VENDOR_HAUPPAUGE, 0xb131), 398 { USB_DEVICE(VENDOR_HAUPPAUGE, 0xb131),
399 .driver_info = HAUPPAUGE_CX_HYBRID_TV }, 399 .driver_info = HAUPPAUGE_CX_HYBRID_TV },
400 { USB_DEVICE(VENDOR_HAUPPAUGE, 0xb138),
401 .driver_info = HAUPPAUGE_CX_HYBRID_TV },
402 { USB_DEVICE(VENDOR_HAUPPAUGE, 0xb139),
403 .driver_info = HAUPPAUGE_CX_HYBRID_TV },
400 { USB_DEVICE(VENDOR_PCTV, 0x0259), 404 { USB_DEVICE(VENDOR_PCTV, 0x0259),
401 .driver_info = HAUPPAUGE_CX_HYBRID_TV }, 405 .driver_info = HAUPPAUGE_CX_HYBRID_TV },
402 { USB_DEVICE(VENDOR_PCTV, 0x025e), 406 { USB_DEVICE(VENDOR_PCTV, 0x025e),
@@ -1198,10 +1202,9 @@ static void mceusb_flash_led(struct mceusb_dev *ir)
1198 mce_async_out(ir, FLASH_LED, sizeof(FLASH_LED)); 1202 mce_async_out(ir, FLASH_LED, sizeof(FLASH_LED));
1199} 1203}
1200 1204
1201static struct rc_dev *mceusb_init_rc_dev(struct mceusb_dev *ir, 1205static struct rc_dev *mceusb_init_rc_dev(struct mceusb_dev *ir)
1202 struct usb_interface *intf)
1203{ 1206{
1204 struct usb_device *udev = usb_get_dev(interface_to_usbdev(intf)); 1207 struct usb_device *udev = ir->usbdev;
1205 struct device *dev = ir->dev; 1208 struct device *dev = ir->dev;
1206 struct rc_dev *rc; 1209 struct rc_dev *rc;
1207 int ret; 1210 int ret;
@@ -1341,7 +1344,7 @@ static int mceusb_dev_probe(struct usb_interface *intf,
1341 if (!ir->urb_in) 1344 if (!ir->urb_in)
1342 goto urb_in_alloc_fail; 1345 goto urb_in_alloc_fail;
1343 1346
1344 ir->usbdev = dev; 1347 ir->usbdev = usb_get_dev(dev);
1345 ir->dev = &intf->dev; 1348 ir->dev = &intf->dev;
1346 ir->len_in = maxp; 1349 ir->len_in = maxp;
1347 ir->flags.microsoft_gen1 = is_microsoft_gen1; 1350 ir->flags.microsoft_gen1 = is_microsoft_gen1;
@@ -1362,7 +1365,7 @@ static int mceusb_dev_probe(struct usb_interface *intf,
1362 snprintf(name + strlen(name), sizeof(name) - strlen(name), 1365 snprintf(name + strlen(name), sizeof(name) - strlen(name),
1363 " %s", buf); 1366 " %s", buf);
1364 1367
1365 ir->rc = mceusb_init_rc_dev(ir, intf); 1368 ir->rc = mceusb_init_rc_dev(ir);
1366 if (!ir->rc) 1369 if (!ir->rc)
1367 goto rc_dev_fail; 1370 goto rc_dev_fail;
1368 1371
@@ -1408,6 +1411,7 @@ static int mceusb_dev_probe(struct usb_interface *intf,
1408 1411
1409 /* Error-handling path */ 1412 /* Error-handling path */
1410rc_dev_fail: 1413rc_dev_fail:
1414 usb_put_dev(ir->usbdev);
1411 usb_free_urb(ir->urb_in); 1415 usb_free_urb(ir->urb_in);
1412urb_in_alloc_fail: 1416urb_in_alloc_fail:
1413 usb_free_coherent(dev, maxp, ir->buf_in, ir->dma_in); 1417 usb_free_coherent(dev, maxp, ir->buf_in, ir->dma_in);
@@ -1435,6 +1439,7 @@ static void mceusb_dev_disconnect(struct usb_interface *intf)
1435 usb_kill_urb(ir->urb_in); 1439 usb_kill_urb(ir->urb_in);
1436 usb_free_urb(ir->urb_in); 1440 usb_free_urb(ir->urb_in);
1437 usb_free_coherent(dev, ir->len_in, ir->buf_in, ir->dma_in); 1441 usb_free_coherent(dev, ir->len_in, ir->buf_in, ir->dma_in);
1442 usb_put_dev(dev);
1438 1443
1439 kfree(ir); 1444 kfree(ir);
1440} 1445}
diff --git a/drivers/media/rc/nuvoton-cir.c b/drivers/media/rc/nuvoton-cir.c
index 7f4fd859bba5..9c2c8635ff33 100644
--- a/drivers/media/rc/nuvoton-cir.c
+++ b/drivers/media/rc/nuvoton-cir.c
@@ -229,7 +229,6 @@ static int nvt_hw_detect(struct nvt_dev *nvt)
229{ 229{
230 unsigned long flags; 230 unsigned long flags;
231 u8 chip_major, chip_minor; 231 u8 chip_major, chip_minor;
232 int ret = 0;
233 char chip_id[12]; 232 char chip_id[12];
234 bool chip_unknown = false; 233 bool chip_unknown = false;
235 234
@@ -285,7 +284,7 @@ static int nvt_hw_detect(struct nvt_dev *nvt)
285 nvt->chip_minor = chip_minor; 284 nvt->chip_minor = chip_minor;
286 spin_unlock_irqrestore(&nvt->nvt_lock, flags); 285 spin_unlock_irqrestore(&nvt->nvt_lock, flags);
287 286
288 return ret; 287 return 0;
289} 288}
290 289
291static void nvt_cir_ldev_init(struct nvt_dev *nvt) 290static void nvt_cir_ldev_init(struct nvt_dev *nvt)
@@ -1177,7 +1176,6 @@ static int nvt_suspend(struct pnp_dev *pdev, pm_message_t state)
1177 1176
1178static int nvt_resume(struct pnp_dev *pdev) 1177static int nvt_resume(struct pnp_dev *pdev)
1179{ 1178{
1180 int ret = 0;
1181 struct nvt_dev *nvt = pnp_get_drvdata(pdev); 1179 struct nvt_dev *nvt = pnp_get_drvdata(pdev);
1182 1180
1183 nvt_dbg("%s called", __func__); 1181 nvt_dbg("%s called", __func__);
@@ -1195,7 +1193,7 @@ static int nvt_resume(struct pnp_dev *pdev)
1195 nvt_cir_regs_init(nvt); 1193 nvt_cir_regs_init(nvt);
1196 nvt_cir_wake_regs_init(nvt); 1194 nvt_cir_wake_regs_init(nvt);
1197 1195
1198 return ret; 1196 return 0;
1199} 1197}
1200 1198
1201static void nvt_shutdown(struct pnp_dev *pdev) 1199static void nvt_shutdown(struct pnp_dev *pdev)
diff --git a/drivers/media/rc/st_rc.c b/drivers/media/rc/st_rc.c
index 5c151351afa4..0e758ae2e529 100644
--- a/drivers/media/rc/st_rc.c
+++ b/drivers/media/rc/st_rc.c
@@ -22,8 +22,8 @@ struct st_rc_device {
22 int irq; 22 int irq;
23 int irq_wake; 23 int irq_wake;
24 struct clk *sys_clock; 24 struct clk *sys_clock;
25 void *base; /* Register base address */ 25 volatile void __iomem *base; /* Register base address */
26 void *rx_base;/* RX Register base address */ 26 volatile void __iomem *rx_base;/* RX Register base address */
27 struct rc_dev *rdev; 27 struct rc_dev *rdev;
28 bool overclocking; 28 bool overclocking;
29 int sample_mult; 29 int sample_mult;
@@ -267,8 +267,8 @@ static int st_rc_probe(struct platform_device *pdev)
267 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 267 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
268 268
269 rc_dev->base = devm_ioremap_resource(dev, res); 269 rc_dev->base = devm_ioremap_resource(dev, res);
270 if (IS_ERR(rc_dev->base)) { 270 if (IS_ERR((__force void *)rc_dev->base)) {
271 ret = PTR_ERR(rc_dev->base); 271 ret = PTR_ERR((__force void *)rc_dev->base);
272 goto err; 272 goto err;
273 } 273 }
274 274
@@ -278,7 +278,7 @@ static int st_rc_probe(struct platform_device *pdev)
278 rc_dev->rx_base = rc_dev->base; 278 rc_dev->rx_base = rc_dev->base;
279 279
280 280
281 rc_dev->rstc = reset_control_get(dev, NULL); 281 rc_dev->rstc = reset_control_get_optional(dev, NULL);
282 if (IS_ERR(rc_dev->rstc)) 282 if (IS_ERR(rc_dev->rstc))
283 rc_dev->rstc = NULL; 283 rc_dev->rstc = NULL;
284 284
@@ -376,9 +376,10 @@ static int st_rc_resume(struct device *dev)
376 return 0; 376 return 0;
377} 377}
378 378
379static SIMPLE_DEV_PM_OPS(st_rc_pm_ops, st_rc_suspend, st_rc_resume);
380#endif 379#endif
381 380
381static SIMPLE_DEV_PM_OPS(st_rc_pm_ops, st_rc_suspend, st_rc_resume);
382
382#ifdef CONFIG_OF 383#ifdef CONFIG_OF
383static struct of_device_id st_rc_match[] = { 384static struct of_device_id st_rc_match[] = {
384 { .compatible = "st,comms-irb", }, 385 { .compatible = "st,comms-irb", },
@@ -391,11 +392,8 @@ MODULE_DEVICE_TABLE(of, st_rc_match);
391static struct platform_driver st_rc_driver = { 392static struct platform_driver st_rc_driver = {
392 .driver = { 393 .driver = {
393 .name = IR_ST_NAME, 394 .name = IR_ST_NAME,
394 .owner = THIS_MODULE,
395 .of_match_table = of_match_ptr(st_rc_match), 395 .of_match_table = of_match_ptr(st_rc_match),
396#ifdef CONFIG_PM
397 .pm = &st_rc_pm_ops, 396 .pm = &st_rc_pm_ops,
398#endif
399 }, 397 },
400 .probe = st_rc_probe, 398 .probe = st_rc_probe,
401 .remove = st_rc_remove, 399 .remove = st_rc_remove,
diff --git a/drivers/media/rc/streamzap.c b/drivers/media/rc/streamzap.c
index 80c4feeb01ea..bf4a44272f0e 100644
--- a/drivers/media/rc/streamzap.c
+++ b/drivers/media/rc/streamzap.c
@@ -362,16 +362,14 @@ static int streamzap_probe(struct usb_interface *intf,
362 } 362 }
363 363
364 sz->endpoint = &(iface_host->endpoint[0].desc); 364 sz->endpoint = &(iface_host->endpoint[0].desc);
365 if ((sz->endpoint->bEndpointAddress & USB_ENDPOINT_DIR_MASK) 365 if (!usb_endpoint_dir_in(sz->endpoint)) {
366 != USB_DIR_IN) {
367 dev_err(&intf->dev, "%s: endpoint doesn't match input device " 366 dev_err(&intf->dev, "%s: endpoint doesn't match input device "
368 "02%02x\n", __func__, sz->endpoint->bEndpointAddress); 367 "02%02x\n", __func__, sz->endpoint->bEndpointAddress);
369 retval = -ENODEV; 368 retval = -ENODEV;
370 goto free_sz; 369 goto free_sz;
371 } 370 }
372 371
373 if ((sz->endpoint->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) 372 if (!usb_endpoint_xfer_int(sz->endpoint)) {
374 != USB_ENDPOINT_XFER_INT) {
375 dev_err(&intf->dev, "%s: endpoint attributes don't match xfer " 373 dev_err(&intf->dev, "%s: endpoint attributes don't match xfer "
376 "02%02x\n", __func__, sz->endpoint->bmAttributes); 374 "02%02x\n", __func__, sz->endpoint->bmAttributes);
377 retval = -ENODEV; 375 retval = -ENODEV;
diff --git a/drivers/media/tuners/Kconfig b/drivers/media/tuners/Kconfig
index d79fd1ce5a18..f039dc2a21cf 100644
--- a/drivers/media/tuners/Kconfig
+++ b/drivers/media/tuners/Kconfig
@@ -204,6 +204,7 @@ config MEDIA_TUNER_FC0013
204config MEDIA_TUNER_TDA18212 204config MEDIA_TUNER_TDA18212
205 tristate "NXP TDA18212 silicon tuner" 205 tristate "NXP TDA18212 silicon tuner"
206 depends on MEDIA_SUPPORT && I2C 206 depends on MEDIA_SUPPORT && I2C
207 select REGMAP_I2C
207 default m if !MEDIA_SUBDRV_AUTOSELECT 208 default m if !MEDIA_SUBDRV_AUTOSELECT
208 help 209 help
209 NXP TDA18212 silicon tuner driver. 210 NXP TDA18212 silicon tuner driver.
@@ -226,6 +227,7 @@ config MEDIA_TUNER_FC2580
226config MEDIA_TUNER_M88TS2022 227config MEDIA_TUNER_M88TS2022
227 tristate "Montage M88TS2022 silicon tuner" 228 tristate "Montage M88TS2022 silicon tuner"
228 depends on MEDIA_SUPPORT && I2C 229 depends on MEDIA_SUPPORT && I2C
230 select REGMAP_I2C
229 default m if !MEDIA_SUBDRV_AUTOSELECT 231 default m if !MEDIA_SUBDRV_AUTOSELECT
230 help 232 help
231 Montage M88TS2022 silicon tuner driver. 233 Montage M88TS2022 silicon tuner driver.
@@ -247,6 +249,7 @@ config MEDIA_TUNER_SI2157
247config MEDIA_TUNER_IT913X 249config MEDIA_TUNER_IT913X
248 tristate "ITE Tech IT913x silicon tuner" 250 tristate "ITE Tech IT913x silicon tuner"
249 depends on MEDIA_SUPPORT && I2C 251 depends on MEDIA_SUPPORT && I2C
252 select REGMAP_I2C
250 default m if !MEDIA_SUBDRV_AUTOSELECT 253 default m if !MEDIA_SUBDRV_AUTOSELECT
251 help 254 help
252 ITE Tech IT913x silicon tuner driver. 255 ITE Tech IT913x silicon tuner driver.
@@ -257,4 +260,18 @@ config MEDIA_TUNER_R820T
257 default m if !MEDIA_SUBDRV_AUTOSELECT 260 default m if !MEDIA_SUBDRV_AUTOSELECT
258 help 261 help
259 Rafael Micro R820T silicon tuner driver. 262 Rafael Micro R820T silicon tuner driver.
263
264config MEDIA_TUNER_MXL301RF
265 tristate "MaxLinear MxL301RF tuner"
266 depends on MEDIA_SUPPORT && I2C
267 default m if !MEDIA_SUBDRV_AUTOSELECT
268 help
269 MaxLinear MxL301RF OFDM tuner driver.
270
271config MEDIA_TUNER_QM1D1C0042
272 tristate "Sharp QM1D1C0042 tuner"
273 depends on MEDIA_SUPPORT && I2C
274 default m if !MEDIA_SUBDRV_AUTOSELECT
275 help
276 Sharp QM1D1C0042 trellis coded 8PSK tuner driver.
260endmenu 277endmenu
diff --git a/drivers/media/tuners/Makefile b/drivers/media/tuners/Makefile
index 5591699755ba..49fcf8033848 100644
--- a/drivers/media/tuners/Makefile
+++ b/drivers/media/tuners/Makefile
@@ -37,8 +37,10 @@ obj-$(CONFIG_MEDIA_TUNER_M88TS2022) += m88ts2022.o
37obj-$(CONFIG_MEDIA_TUNER_FC0011) += fc0011.o 37obj-$(CONFIG_MEDIA_TUNER_FC0011) += fc0011.o
38obj-$(CONFIG_MEDIA_TUNER_FC0012) += fc0012.o 38obj-$(CONFIG_MEDIA_TUNER_FC0012) += fc0012.o
39obj-$(CONFIG_MEDIA_TUNER_FC0013) += fc0013.o 39obj-$(CONFIG_MEDIA_TUNER_FC0013) += fc0013.o
40obj-$(CONFIG_MEDIA_TUNER_IT913X) += tuner_it913x.o 40obj-$(CONFIG_MEDIA_TUNER_IT913X) += it913x.o
41obj-$(CONFIG_MEDIA_TUNER_R820T) += r820t.o 41obj-$(CONFIG_MEDIA_TUNER_R820T) += r820t.o
42obj-$(CONFIG_MEDIA_TUNER_MXL301RF) += mxl301rf.o
43obj-$(CONFIG_MEDIA_TUNER_QM1D1C0042) += qm1d1c0042.o
42 44
43ccflags-y += -I$(srctree)/drivers/media/dvb-core 45ccflags-y += -I$(srctree)/drivers/media/dvb-core
44ccflags-y += -I$(srctree)/drivers/media/dvb-frontends 46ccflags-y += -I$(srctree)/drivers/media/dvb-frontends
diff --git a/drivers/media/tuners/e4000.c b/drivers/media/tuners/e4000.c
index 90d93348f20c..510239f80c0d 100644
--- a/drivers/media/tuners/e4000.c
+++ b/drivers/media/tuners/e4000.c
@@ -26,7 +26,7 @@ static int e4000_init(struct dvb_frontend *fe)
26 struct e4000 *s = fe->tuner_priv; 26 struct e4000 *s = fe->tuner_priv;
27 int ret; 27 int ret;
28 28
29 dev_dbg(&s->client->dev, "%s:\n", __func__); 29 dev_dbg(&s->client->dev, "\n");
30 30
31 /* dummy I2C to ensure I2C wakes up */ 31 /* dummy I2C to ensure I2C wakes up */
32 ret = regmap_write(s->regmap, 0x02, 0x40); 32 ret = regmap_write(s->regmap, 0x02, 0x40);
@@ -87,7 +87,7 @@ static int e4000_init(struct dvb_frontend *fe)
87 s->active = true; 87 s->active = true;
88err: 88err:
89 if (ret) 89 if (ret)
90 dev_dbg(&s->client->dev, "%s: failed=%d\n", __func__, ret); 90 dev_dbg(&s->client->dev, "failed=%d\n", ret);
91 91
92 return ret; 92 return ret;
93} 93}
@@ -97,7 +97,7 @@ static int e4000_sleep(struct dvb_frontend *fe)
97 struct e4000 *s = fe->tuner_priv; 97 struct e4000 *s = fe->tuner_priv;
98 int ret; 98 int ret;
99 99
100 dev_dbg(&s->client->dev, "%s:\n", __func__); 100 dev_dbg(&s->client->dev, "\n");
101 101
102 s->active = false; 102 s->active = false;
103 103
@@ -106,7 +106,7 @@ static int e4000_sleep(struct dvb_frontend *fe)
106 goto err; 106 goto err;
107err: 107err:
108 if (ret) 108 if (ret)
109 dev_dbg(&s->client->dev, "%s: failed=%d\n", __func__, ret); 109 dev_dbg(&s->client->dev, "failed=%d\n", ret);
110 110
111 return ret; 111 return ret;
112} 112}
@@ -121,9 +121,8 @@ static int e4000_set_params(struct dvb_frontend *fe)
121 u8 buf[5], i_data[4], q_data[4]; 121 u8 buf[5], i_data[4], q_data[4];
122 122
123 dev_dbg(&s->client->dev, 123 dev_dbg(&s->client->dev,
124 "%s: delivery_system=%d frequency=%u bandwidth_hz=%u\n", 124 "delivery_system=%d frequency=%u bandwidth_hz=%u\n",
125 __func__, c->delivery_system, c->frequency, 125 c->delivery_system, c->frequency, c->bandwidth_hz);
126 c->bandwidth_hz);
127 126
128 /* gain control manual */ 127 /* gain control manual */
129 ret = regmap_write(s->regmap, 0x1a, 0x00); 128 ret = regmap_write(s->regmap, 0x1a, 0x00);
@@ -150,9 +149,8 @@ static int e4000_set_params(struct dvb_frontend *fe)
150 buf[3] = 0x00; 149 buf[3] = 0x00;
151 buf[4] = e4000_pll_lut[i].div; 150 buf[4] = e4000_pll_lut[i].div;
152 151
153 dev_dbg(&s->client->dev, 152 dev_dbg(&s->client->dev, "f_vco=%llu pll div=%d sigma_delta=%04x\n",
154 "%s: f_vco=%llu pll div=%d sigma_delta=%04x\n", 153 f_vco, buf[0], sigma_delta);
155 __func__, f_vco, buf[0], sigma_delta);
156 154
157 ret = regmap_bulk_write(s->regmap, 0x09, buf, 5); 155 ret = regmap_bulk_write(s->regmap, 0x09, buf, 5);
158 if (ret) 156 if (ret)
@@ -253,7 +251,7 @@ static int e4000_set_params(struct dvb_frontend *fe)
253 goto err; 251 goto err;
254err: 252err:
255 if (ret) 253 if (ret)
256 dev_dbg(&s->client->dev, "%s: failed=%d\n", __func__, ret); 254 dev_dbg(&s->client->dev, "failed=%d\n", ret);
257 255
258 return ret; 256 return ret;
259} 257}
@@ -262,7 +260,7 @@ static int e4000_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
262{ 260{
263 struct e4000 *s = fe->tuner_priv; 261 struct e4000 *s = fe->tuner_priv;
264 262
265 dev_dbg(&s->client->dev, "%s:\n", __func__); 263 dev_dbg(&s->client->dev, "\n");
266 264
267 *frequency = 0; /* Zero-IF */ 265 *frequency = 0; /* Zero-IF */
268 266
@@ -276,10 +274,9 @@ static int e4000_set_lna_gain(struct dvb_frontend *fe)
276 int ret; 274 int ret;
277 u8 u8tmp; 275 u8 u8tmp;
278 276
279 dev_dbg(&s->client->dev, "%s: lna auto=%d->%d val=%d->%d\n", 277 dev_dbg(&s->client->dev, "lna auto=%d->%d val=%d->%d\n",
280 __func__, s->lna_gain_auto->cur.val, 278 s->lna_gain_auto->cur.val, s->lna_gain_auto->val,
281 s->lna_gain_auto->val, s->lna_gain->cur.val, 279 s->lna_gain->cur.val, s->lna_gain->val);
282 s->lna_gain->val);
283 280
284 if (s->lna_gain_auto->val && s->if_gain_auto->cur.val) 281 if (s->lna_gain_auto->val && s->if_gain_auto->cur.val)
285 u8tmp = 0x17; 282 u8tmp = 0x17;
@@ -301,7 +298,7 @@ static int e4000_set_lna_gain(struct dvb_frontend *fe)
301 } 298 }
302err: 299err:
303 if (ret) 300 if (ret)
304 dev_dbg(&s->client->dev, "%s: failed=%d\n", __func__, ret); 301 dev_dbg(&s->client->dev, "failed=%d\n", ret);
305 302
306 return ret; 303 return ret;
307} 304}
@@ -312,10 +309,9 @@ static int e4000_set_mixer_gain(struct dvb_frontend *fe)
312 int ret; 309 int ret;
313 u8 u8tmp; 310 u8 u8tmp;
314 311
315 dev_dbg(&s->client->dev, "%s: mixer auto=%d->%d val=%d->%d\n", 312 dev_dbg(&s->client->dev, "mixer auto=%d->%d val=%d->%d\n",
316 __func__, s->mixer_gain_auto->cur.val, 313 s->mixer_gain_auto->cur.val, s->mixer_gain_auto->val,
317 s->mixer_gain_auto->val, s->mixer_gain->cur.val, 314 s->mixer_gain->cur.val, s->mixer_gain->val);
318 s->mixer_gain->val);
319 315
320 if (s->mixer_gain_auto->val) 316 if (s->mixer_gain_auto->val)
321 u8tmp = 0x15; 317 u8tmp = 0x15;
@@ -333,7 +329,7 @@ static int e4000_set_mixer_gain(struct dvb_frontend *fe)
333 } 329 }
334err: 330err:
335 if (ret) 331 if (ret)
336 dev_dbg(&s->client->dev, "%s: failed=%d\n", __func__, ret); 332 dev_dbg(&s->client->dev, "failed=%d\n", ret);
337 333
338 return ret; 334 return ret;
339} 335}
@@ -345,10 +341,9 @@ static int e4000_set_if_gain(struct dvb_frontend *fe)
345 u8 buf[2]; 341 u8 buf[2];
346 u8 u8tmp; 342 u8 u8tmp;
347 343
348 dev_dbg(&s->client->dev, "%s: if auto=%d->%d val=%d->%d\n", 344 dev_dbg(&s->client->dev, "if auto=%d->%d val=%d->%d\n",
349 __func__, s->if_gain_auto->cur.val, 345 s->if_gain_auto->cur.val, s->if_gain_auto->val,
350 s->if_gain_auto->val, s->if_gain->cur.val, 346 s->if_gain->cur.val, s->if_gain->val);
351 s->if_gain->val);
352 347
353 if (s->if_gain_auto->val && s->lna_gain_auto->cur.val) 348 if (s->if_gain_auto->val && s->lna_gain_auto->cur.val)
354 u8tmp = 0x17; 349 u8tmp = 0x17;
@@ -372,7 +367,7 @@ static int e4000_set_if_gain(struct dvb_frontend *fe)
372 } 367 }
373err: 368err:
374 if (ret) 369 if (ret)
375 dev_dbg(&s->client->dev, "%s: failed=%d\n", __func__, ret); 370 dev_dbg(&s->client->dev, "failed=%d\n", ret);
376 371
377 return ret; 372 return ret;
378} 373}
@@ -390,7 +385,7 @@ static int e4000_pll_lock(struct dvb_frontend *fe)
390 s->pll_lock->val = (utmp & 0x01); 385 s->pll_lock->val = (utmp & 0x01);
391err: 386err:
392 if (ret) 387 if (ret)
393 dev_dbg(&s->client->dev, "%s: failed=%d\n", __func__, ret); 388 dev_dbg(&s->client->dev, "failed=%d\n", ret);
394 389
395 return ret; 390 return ret;
396} 391}
@@ -400,7 +395,7 @@ static int e4000_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
400 struct e4000 *s = container_of(ctrl->handler, struct e4000, hdl); 395 struct e4000 *s = container_of(ctrl->handler, struct e4000, hdl);
401 int ret; 396 int ret;
402 397
403 if (s->active == false) 398 if (!s->active)
404 return 0; 399 return 0;
405 400
406 switch (ctrl->id) { 401 switch (ctrl->id) {
@@ -408,8 +403,8 @@ static int e4000_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
408 ret = e4000_pll_lock(s->fe); 403 ret = e4000_pll_lock(s->fe);
409 break; 404 break;
410 default: 405 default:
411 dev_dbg(&s->client->dev, "%s: unknown ctrl: id=%d name=%s\n", 406 dev_dbg(&s->client->dev, "unknown ctrl: id=%d name=%s\n",
412 __func__, ctrl->id, ctrl->name); 407 ctrl->id, ctrl->name);
413 ret = -EINVAL; 408 ret = -EINVAL;
414 } 409 }
415 410
@@ -423,7 +418,7 @@ static int e4000_s_ctrl(struct v4l2_ctrl *ctrl)
423 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 418 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
424 int ret; 419 int ret;
425 420
426 if (s->active == false) 421 if (!s->active)
427 return 0; 422 return 0;
428 423
429 switch (ctrl->id) { 424 switch (ctrl->id) {
@@ -445,8 +440,8 @@ static int e4000_s_ctrl(struct v4l2_ctrl *ctrl)
445 ret = e4000_set_if_gain(s->fe); 440 ret = e4000_set_if_gain(s->fe);
446 break; 441 break;
447 default: 442 default:
448 dev_dbg(&s->client->dev, "%s: unknown ctrl: id=%d name=%s\n", 443 dev_dbg(&s->client->dev, "unknown ctrl: id=%d name=%s\n",
449 __func__, ctrl->id, ctrl->name); 444 ctrl->id, ctrl->name);
450 ret = -EINVAL; 445 ret = -EINVAL;
451 } 446 }
452 447
@@ -494,7 +489,7 @@ static int e4000_probe(struct i2c_client *client,
494 s = kzalloc(sizeof(struct e4000), GFP_KERNEL); 489 s = kzalloc(sizeof(struct e4000), GFP_KERNEL);
495 if (!s) { 490 if (!s) {
496 ret = -ENOMEM; 491 ret = -ENOMEM;
497 dev_err(&client->dev, "%s: kzalloc() failed\n", KBUILD_MODNAME); 492 dev_err(&client->dev, "kzalloc() failed\n");
498 goto err; 493 goto err;
499 } 494 }
500 495
@@ -512,7 +507,7 @@ static int e4000_probe(struct i2c_client *client,
512 if (ret) 507 if (ret)
513 goto err; 508 goto err;
514 509
515 dev_dbg(&s->client->dev, "%s: chip id=%02x\n", __func__, utmp); 510 dev_dbg(&s->client->dev, "chip id=%02x\n", utmp);
516 511
517 if (utmp != 0x40) { 512 if (utmp != 0x40) {
518 ret = -ENODEV; 513 ret = -ENODEV;
@@ -559,9 +554,7 @@ static int e4000_probe(struct i2c_client *client,
559 s->sd.ctrl_handler = &s->hdl; 554 s->sd.ctrl_handler = &s->hdl;
560#endif 555#endif
561 556
562 dev_info(&s->client->dev, 557 dev_info(&s->client->dev, "Elonics E4000 successfully identified\n");
563 "%s: Elonics E4000 successfully identified\n",
564 KBUILD_MODNAME);
565 558
566 fe->tuner_priv = s; 559 fe->tuner_priv = s;
567 memcpy(&fe->ops.tuner_ops, &e4000_tuner_ops, 560 memcpy(&fe->ops.tuner_ops, &e4000_tuner_ops,
@@ -573,7 +566,7 @@ static int e4000_probe(struct i2c_client *client,
573 return 0; 566 return 0;
574err: 567err:
575 if (ret) { 568 if (ret) {
576 dev_dbg(&client->dev, "%s: failed=%d\n", __func__, ret); 569 dev_dbg(&client->dev, "failed=%d\n", ret);
577 kfree(s); 570 kfree(s);
578 } 571 }
579 572
@@ -586,7 +579,7 @@ static int e4000_remove(struct i2c_client *client)
586 struct e4000 *s = container_of(sd, struct e4000, sd); 579 struct e4000 *s = container_of(sd, struct e4000, sd);
587 struct dvb_frontend *fe = s->fe; 580 struct dvb_frontend *fe = s->fe;
588 581
589 dev_dbg(&client->dev, "%s:\n", __func__); 582 dev_dbg(&client->dev, "\n");
590 583
591#if IS_ENABLED(CONFIG_VIDEO_V4L2) 584#if IS_ENABLED(CONFIG_VIDEO_V4L2)
592 v4l2_ctrl_handler_free(&s->hdl); 585 v4l2_ctrl_handler_free(&s->hdl);
diff --git a/drivers/media/tuners/it913x.c b/drivers/media/tuners/it913x.c
new file mode 100644
index 000000000000..a076c87eda7a
--- /dev/null
+++ b/drivers/media/tuners/it913x.c
@@ -0,0 +1,478 @@
1/*
2 * ITE IT913X silicon tuner driver
3 *
4 * Copyright (C) 2011 Malcolm Priestley (tvboxspy@gmail.com)
5 * IT9137 Copyright (C) ITE Tech Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 *
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.=
21 */
22
23#include "it913x.h"
24#include <linux/regmap.h>
25
26struct it913x_dev {
27 struct i2c_client *client;
28 struct regmap *regmap;
29 struct dvb_frontend *fe;
30 u8 chip_ver:2;
31 u8 role:2;
32 u16 xtal;
33 u8 fdiv;
34 u8 clk_mode;
35 u32 fn_min;
36 bool active;
37};
38
39static int it913x_init(struct dvb_frontend *fe)
40{
41 struct it913x_dev *dev = fe->tuner_priv;
42 int ret;
43 unsigned int utmp;
44 u8 iqik_m_cal, nv_val, buf[2];
45 static const u8 nv[] = {48, 32, 24, 16, 12, 8, 6, 4, 2};
46 unsigned long timeout;
47
48 dev_dbg(&dev->client->dev, "role %u\n", dev->role);
49
50 ret = regmap_write(dev->regmap, 0x80ec4c, 0x68);
51 if (ret)
52 goto err;
53
54 usleep_range(10000, 100000);
55
56 ret = regmap_read(dev->regmap, 0x80ec86, &utmp);
57 if (ret)
58 goto err;
59
60 switch (utmp) {
61 case 0:
62 /* 12.000 MHz */
63 dev->clk_mode = utmp;
64 dev->xtal = 2000;
65 dev->fdiv = 3;
66 iqik_m_cal = 16;
67 break;
68 case 1:
69 /* 20.480 MHz */
70 dev->clk_mode = utmp;
71 dev->xtal = 640;
72 dev->fdiv = 1;
73 iqik_m_cal = 6;
74 break;
75 default:
76 dev_err(&dev->client->dev, "unknown clock identifier %d\n", utmp);
77 goto err;
78 }
79
80 ret = regmap_read(dev->regmap, 0x80ed03, &utmp);
81 if (ret)
82 goto err;
83
84 else if (utmp < ARRAY_SIZE(nv))
85 nv_val = nv[utmp];
86 else
87 nv_val = 2;
88
89 #define TIMEOUT 50
90 timeout = jiffies + msecs_to_jiffies(TIMEOUT);
91 while (!time_after(jiffies, timeout)) {
92 ret = regmap_bulk_read(dev->regmap, 0x80ed23, buf, 2);
93 if (ret)
94 goto err;
95
96 utmp = (buf[1] << 8) | (buf[0] << 0);
97 if (utmp)
98 break;
99 }
100
101 dev_dbg(&dev->client->dev, "r_fbc_m_bdry took %u ms, val %u\n",
102 jiffies_to_msecs(jiffies) -
103 (jiffies_to_msecs(timeout) - TIMEOUT), utmp);
104
105 dev->fn_min = dev->xtal * utmp;
106 dev->fn_min /= (dev->fdiv * nv_val);
107 dev->fn_min *= 1000;
108 dev_dbg(&dev->client->dev, "fn_min %u\n", dev->fn_min);
109
110 /*
111 * Chip version BX never sets that flag so we just wait 50ms in that
112 * case. It is possible poll BX similarly than AX and then timeout in
113 * order to get 50ms delay, but that causes about 120 extra I2C
114 * messages. As for now, we just wait and reduce IO.
115 */
116 if (dev->chip_ver == 1) {
117 #define TIMEOUT 50
118 timeout = jiffies + msecs_to_jiffies(TIMEOUT);
119 while (!time_after(jiffies, timeout)) {
120 ret = regmap_read(dev->regmap, 0x80ec82, &utmp);
121 if (ret)
122 goto err;
123
124 if (utmp)
125 break;
126 }
127
128 dev_dbg(&dev->client->dev, "p_tsm_init_mode took %u ms, val %u\n",
129 jiffies_to_msecs(jiffies) -
130 (jiffies_to_msecs(timeout) - TIMEOUT), utmp);
131 } else {
132 msleep(50);
133 }
134
135 ret = regmap_write(dev->regmap, 0x80ed81, iqik_m_cal);
136 if (ret)
137 goto err;
138
139 ret = regmap_write(dev->regmap, 0x80ec57, 0x00);
140 if (ret)
141 goto err;
142
143 ret = regmap_write(dev->regmap, 0x80ec58, 0x00);
144 if (ret)
145 goto err;
146
147 ret = regmap_write(dev->regmap, 0x80ec40, 0x01);
148 if (ret)
149 goto err;
150
151 dev->active = true;
152
153 return 0;
154err:
155 dev_dbg(&dev->client->dev, "failed %d\n", ret);
156 return ret;
157}
158
159static int it913x_sleep(struct dvb_frontend *fe)
160{
161 struct it913x_dev *dev = fe->tuner_priv;
162 int ret, len;
163
164 dev_dbg(&dev->client->dev, "role %u\n", dev->role);
165
166 dev->active = false;
167
168 ret = regmap_bulk_write(dev->regmap, 0x80ec40, "\x00", 1);
169 if (ret)
170 goto err;
171
172 /*
173 * Writing '0x00' to master tuner register '0x80ec08' causes slave tuner
174 * communication lost. Due to that, we cannot put master full sleep.
175 */
176 if (dev->role == IT913X_ROLE_DUAL_MASTER)
177 len = 4;
178 else
179 len = 15;
180
181 dev_dbg(&dev->client->dev, "role %u, len %d\n", dev->role, len);
182
183 ret = regmap_bulk_write(dev->regmap, 0x80ec02,
184 "\x3f\x1f\x3f\x3e\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00",
185 len);
186 if (ret)
187 goto err;
188
189 ret = regmap_bulk_write(dev->regmap, 0x80ec12, "\x00\x00\x00\x00", 4);
190 if (ret)
191 goto err;
192
193 ret = regmap_bulk_write(dev->regmap, 0x80ec17,
194 "\x00\x00\x00\x00\x00\x00\x00\x00\x00", 9);
195 if (ret)
196 goto err;
197
198 ret = regmap_bulk_write(dev->regmap, 0x80ec22,
199 "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00", 10);
200 if (ret)
201 goto err;
202
203 ret = regmap_bulk_write(dev->regmap, 0x80ec20, "\x00", 1);
204 if (ret)
205 goto err;
206
207 ret = regmap_bulk_write(dev->regmap, 0x80ec3f, "\x01", 1);
208 if (ret)
209 goto err;
210
211 return 0;
212err:
213 dev_dbg(&dev->client->dev, "failed %d\n", ret);
214 return ret;
215}
216
217static int it913x_set_params(struct dvb_frontend *fe)
218{
219 struct it913x_dev *dev = fe->tuner_priv;
220 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
221 int ret;
222 unsigned int utmp;
223 u32 pre_lo_freq, t_cal_freq;
224 u16 iqik_m_cal, n_div;
225 u8 u8tmp, n, l_band, lna_band;
226
227 dev_dbg(&dev->client->dev, "role=%u, frequency %u, bandwidth_hz %u\n",
228 dev->role, c->frequency, c->bandwidth_hz);
229
230 if (!dev->active) {
231 ret = -EINVAL;
232 goto err;
233 }
234
235 if (c->frequency <= 74000000) {
236 n_div = 48;
237 n = 0;
238 } else if (c->frequency <= 111000000) {
239 n_div = 32;
240 n = 1;
241 } else if (c->frequency <= 148000000) {
242 n_div = 24;
243 n = 2;
244 } else if (c->frequency <= 222000000) {
245 n_div = 16;
246 n = 3;
247 } else if (c->frequency <= 296000000) {
248 n_div = 12;
249 n = 4;
250 } else if (c->frequency <= 445000000) {
251 n_div = 8;
252 n = 5;
253 } else if (c->frequency <= dev->fn_min) {
254 n_div = 6;
255 n = 6;
256 } else if (c->frequency <= 950000000) {
257 n_div = 4;
258 n = 7;
259 } else {
260 n_div = 2;
261 n = 0;
262 }
263
264 ret = regmap_read(dev->regmap, 0x80ed81, &utmp);
265 if (ret)
266 goto err;
267
268 iqik_m_cal = utmp * n_div;
269
270 if (utmp < 0x20) {
271 if (dev->clk_mode == 0)
272 iqik_m_cal = (iqik_m_cal * 9) >> 5;
273 else
274 iqik_m_cal >>= 1;
275 } else {
276 iqik_m_cal = 0x40 - iqik_m_cal;
277 if (dev->clk_mode == 0)
278 iqik_m_cal = ~((iqik_m_cal * 9) >> 5);
279 else
280 iqik_m_cal = ~(iqik_m_cal >> 1);
281 }
282
283 t_cal_freq = (c->frequency / 1000) * n_div * dev->fdiv;
284 pre_lo_freq = t_cal_freq / dev->xtal;
285 utmp = pre_lo_freq * dev->xtal;
286
287 if ((t_cal_freq - utmp) >= (dev->xtal >> 1))
288 pre_lo_freq++;
289
290 pre_lo_freq += (u32) n << 13;
291 /* Frequency OMEGA_IQIK_M_CAL_MID*/
292 t_cal_freq = pre_lo_freq + (u32)iqik_m_cal;
293 dev_dbg(&dev->client->dev, "t_cal_freq %u, pre_lo_freq %u\n",
294 t_cal_freq, pre_lo_freq);
295
296 if (c->frequency <= 440000000) {
297 l_band = 0;
298 lna_band = 0;
299 } else if (c->frequency <= 484000000) {
300 l_band = 1;
301 lna_band = 1;
302 } else if (c->frequency <= 533000000) {
303 l_band = 1;
304 lna_band = 2;
305 } else if (c->frequency <= 587000000) {
306 l_band = 1;
307 lna_band = 3;
308 } else if (c->frequency <= 645000000) {
309 l_band = 1;
310 lna_band = 4;
311 } else if (c->frequency <= 710000000) {
312 l_band = 1;
313 lna_band = 5;
314 } else if (c->frequency <= 782000000) {
315 l_band = 1;
316 lna_band = 6;
317 } else if (c->frequency <= 860000000) {
318 l_band = 1;
319 lna_band = 7;
320 } else if (c->frequency <= 1492000000) {
321 l_band = 1;
322 lna_band = 0;
323 } else if (c->frequency <= 1685000000) {
324 l_band = 1;
325 lna_band = 1;
326 } else {
327 ret = -EINVAL;
328 goto err;
329 }
330
331 /* XXX: latest windows driver does not set that at all */
332 ret = regmap_write(dev->regmap, 0x80ee06, lna_band);
333 if (ret)
334 goto err;
335
336 if (c->bandwidth_hz <= 5000000)
337 u8tmp = 0;
338 else if (c->bandwidth_hz <= 6000000)
339 u8tmp = 2;
340 else if (c->bandwidth_hz <= 7000000)
341 u8tmp = 4;
342 else
343 u8tmp = 6; /* 8000000 */
344
345 ret = regmap_write(dev->regmap, 0x80ec56, u8tmp);
346 if (ret)
347 goto err;
348
349 /* XXX: latest windows driver sets different value (a8 != 68) */
350 ret = regmap_write(dev->regmap, 0x80ec4c, 0xa0 | (l_band << 3));
351 if (ret)
352 goto err;
353
354 ret = regmap_write(dev->regmap, 0x80ec4d, (t_cal_freq >> 0) & 0xff);
355 if (ret)
356 goto err;
357
358 ret = regmap_write(dev->regmap, 0x80ec4e, (t_cal_freq >> 8) & 0xff);
359 if (ret)
360 goto err;
361
362 ret = regmap_write(dev->regmap, 0x80011e, (pre_lo_freq >> 0) & 0xff);
363 if (ret)
364 goto err;
365
366 ret = regmap_write(dev->regmap, 0x80011f, (pre_lo_freq >> 8) & 0xff);
367 if (ret)
368 goto err;
369
370 return 0;
371err:
372 dev_dbg(&dev->client->dev, "failed %d\n", ret);
373 return ret;
374}
375
376static const struct dvb_tuner_ops it913x_tuner_ops = {
377 .info = {
378 .name = "ITE IT913X",
379 .frequency_min = 174000000,
380 .frequency_max = 862000000,
381 },
382
383 .init = it913x_init,
384 .sleep = it913x_sleep,
385 .set_params = it913x_set_params,
386};
387
388static int it913x_probe(struct i2c_client *client,
389 const struct i2c_device_id *id)
390{
391 struct it913x_config *cfg = client->dev.platform_data;
392 struct dvb_frontend *fe = cfg->fe;
393 struct it913x_dev *dev;
394 int ret;
395 char *chip_ver_str;
396 static const struct regmap_config regmap_config = {
397 .reg_bits = 24,
398 .val_bits = 8,
399 };
400
401 dev = kzalloc(sizeof(struct it913x_dev), GFP_KERNEL);
402 if (dev == NULL) {
403 ret = -ENOMEM;
404 dev_err(&client->dev, "kzalloc() failed\n");
405 goto err;
406 }
407
408 dev->client = client;
409 dev->fe = cfg->fe;
410 dev->chip_ver = cfg->chip_ver;
411 dev->role = cfg->role;
412 dev->regmap = regmap_init_i2c(client, &regmap_config);
413 if (IS_ERR(dev->regmap)) {
414 ret = PTR_ERR(dev->regmap);
415 goto err_kfree;
416 }
417
418 fe->tuner_priv = dev;
419 memcpy(&fe->ops.tuner_ops, &it913x_tuner_ops,
420 sizeof(struct dvb_tuner_ops));
421 i2c_set_clientdata(client, dev);
422
423 if (dev->chip_ver == 1)
424 chip_ver_str = "AX";
425 else if (dev->chip_ver == 2)
426 chip_ver_str = "BX";
427 else
428 chip_ver_str = "??";
429
430 dev_info(&dev->client->dev, "ITE IT913X %s successfully attached\n",
431 chip_ver_str);
432 dev_dbg(&dev->client->dev, "chip_ver %u, role %u\n",
433 dev->chip_ver, dev->role);
434 return 0;
435
436err_kfree:
437 kfree(dev);
438err:
439 dev_dbg(&client->dev, "failed %d\n", ret);
440 return ret;
441}
442
443static int it913x_remove(struct i2c_client *client)
444{
445 struct it913x_dev *dev = i2c_get_clientdata(client);
446 struct dvb_frontend *fe = dev->fe;
447
448 dev_dbg(&client->dev, "\n");
449
450 memset(&fe->ops.tuner_ops, 0, sizeof(struct dvb_tuner_ops));
451 fe->tuner_priv = NULL;
452 regmap_exit(dev->regmap);
453 kfree(dev);
454
455 return 0;
456}
457
458static const struct i2c_device_id it913x_id_table[] = {
459 {"it913x", 0},
460 {}
461};
462MODULE_DEVICE_TABLE(i2c, it913x_id_table);
463
464static struct i2c_driver it913x_driver = {
465 .driver = {
466 .owner = THIS_MODULE,
467 .name = "it913x",
468 },
469 .probe = it913x_probe,
470 .remove = it913x_remove,
471 .id_table = it913x_id_table,
472};
473
474module_i2c_driver(it913x_driver);
475
476MODULE_DESCRIPTION("ITE IT913X silicon tuner driver");
477MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
478MODULE_LICENSE("GPL");
diff --git a/drivers/media/tuners/tuner_it913x.h b/drivers/media/tuners/it913x.h
index 12dd36bd9e79..33de53d4a566 100644
--- a/drivers/media/tuners/tuner_it913x.h
+++ b/drivers/media/tuners/it913x.h
@@ -25,21 +25,30 @@
25 25
26#include "dvb_frontend.h" 26#include "dvb_frontend.h"
27 27
28#if defined(CONFIG_MEDIA_TUNER_IT913X) || \ 28/*
29 (defined(CONFIG_MEDIA_TUNER_IT913X_MODULE) && defined(MODULE)) 29 * I2C address
30extern struct dvb_frontend *it913x_attach(struct dvb_frontend *fe, 30 * 0x38, 0x3a, 0x3c, 0x3e
31 struct i2c_adapter *i2c_adap, 31 */
32 u8 i2c_addr, 32struct it913x_config {
33 u8 config); 33 /*
34#else 34 * pointer to DVB frontend
35static inline struct dvb_frontend *it913x_attach(struct dvb_frontend *fe, 35 */
36 struct i2c_adapter *i2c_adap, 36 struct dvb_frontend *fe;
37 u8 i2c_addr, 37
38 u8 config) 38 /*
39{ 39 * chip version
40 pr_warn("%s: driver disabled by Kconfig\n", __func__); 40 * 1 = IT9135 AX
41 return NULL; 41 * 2 = IT9135 BX
42} 42 */
43#endif 43 unsigned int chip_ver:2;
44
45 /*
46 * tuner role
47 */
48#define IT913X_ROLE_SINGLE 0
49#define IT913X_ROLE_DUAL_MASTER 1
50#define IT913X_ROLE_DUAL_SLAVE 2
51 unsigned int role:2;
52};
44 53
45#endif 54#endif
diff --git a/drivers/media/tuners/m88ts2022.c b/drivers/media/tuners/m88ts2022.c
index 40c42dec721b..caa542346891 100644
--- a/drivers/media/tuners/m88ts2022.c
+++ b/drivers/media/tuners/m88ts2022.c
@@ -18,120 +18,11 @@
18 18
19#include "m88ts2022_priv.h" 19#include "m88ts2022_priv.h"
20 20
21/* write multiple registers */ 21static int m88ts2022_cmd(struct m88ts2022_dev *dev, int op, int sleep, u8 reg,
22static int m88ts2022_wr_regs(struct m88ts2022_priv *priv, 22 u8 mask, u8 val, u8 *reg_val)
23 u8 reg, const u8 *val, int len)
24{ 23{
25#define MAX_WR_LEN 3
26#define MAX_WR_XFER_LEN (MAX_WR_LEN + 1)
27 int ret;
28 u8 buf[MAX_WR_XFER_LEN];
29 struct i2c_msg msg[1] = {
30 {
31 .addr = priv->client->addr,
32 .flags = 0,
33 .len = 1 + len,
34 .buf = buf,
35 }
36 };
37
38 if (WARN_ON(len > MAX_WR_LEN))
39 return -EINVAL;
40
41 buf[0] = reg;
42 memcpy(&buf[1], val, len);
43
44 ret = i2c_transfer(priv->client->adapter, msg, 1);
45 if (ret == 1) {
46 ret = 0;
47 } else {
48 dev_warn(&priv->client->dev,
49 "%s: i2c wr failed=%d reg=%02x len=%d\n",
50 KBUILD_MODNAME, ret, reg, len);
51 ret = -EREMOTEIO;
52 }
53
54 return ret;
55}
56
57/* read multiple registers */
58static int m88ts2022_rd_regs(struct m88ts2022_priv *priv, u8 reg,
59 u8 *val, int len)
60{
61#define MAX_RD_LEN 1
62#define MAX_RD_XFER_LEN (MAX_RD_LEN)
63 int ret;
64 u8 buf[MAX_RD_XFER_LEN];
65 struct i2c_msg msg[2] = {
66 {
67 .addr = priv->client->addr,
68 .flags = 0,
69 .len = 1,
70 .buf = &reg,
71 }, {
72 .addr = priv->client->addr,
73 .flags = I2C_M_RD,
74 .len = len,
75 .buf = buf,
76 }
77 };
78
79 if (WARN_ON(len > MAX_RD_LEN))
80 return -EINVAL;
81
82 ret = i2c_transfer(priv->client->adapter, msg, 2);
83 if (ret == 2) {
84 memcpy(val, buf, len);
85 ret = 0;
86 } else {
87 dev_warn(&priv->client->dev,
88 "%s: i2c rd failed=%d reg=%02x len=%d\n",
89 KBUILD_MODNAME, ret, reg, len);
90 ret = -EREMOTEIO;
91 }
92
93 return ret;
94}
95
96/* write single register */
97static int m88ts2022_wr_reg(struct m88ts2022_priv *priv, u8 reg, u8 val)
98{
99 return m88ts2022_wr_regs(priv, reg, &val, 1);
100}
101
102/* read single register */
103static int m88ts2022_rd_reg(struct m88ts2022_priv *priv, u8 reg, u8 *val)
104{
105 return m88ts2022_rd_regs(priv, reg, val, 1);
106}
107
108/* write single register with mask */
109static int m88ts2022_wr_reg_mask(struct m88ts2022_priv *priv,
110 u8 reg, u8 val, u8 mask)
111{
112 int ret;
113 u8 u8tmp;
114
115 /* no need for read if whole reg is written */
116 if (mask != 0xff) {
117 ret = m88ts2022_rd_regs(priv, reg, &u8tmp, 1);
118 if (ret)
119 return ret;
120
121 val &= mask;
122 u8tmp &= ~mask;
123 val |= u8tmp;
124 }
125
126 return m88ts2022_wr_regs(priv, reg, &val, 1);
127}
128
129static int m88ts2022_cmd(struct dvb_frontend *fe,
130 int op, int sleep, u8 reg, u8 mask, u8 val, u8 *reg_val)
131{
132 struct m88ts2022_priv *priv = fe->tuner_priv;
133 int ret, i; 24 int ret, i;
134 u8 u8tmp; 25 unsigned int utmp;
135 struct m88ts2022_reg_val reg_vals[] = { 26 struct m88ts2022_reg_val reg_vals[] = {
136 {0x51, 0x1f - op}, 27 {0x51, 0x1f - op},
137 {0x51, 0x1f}, 28 {0x51, 0x1f},
@@ -140,12 +31,12 @@ static int m88ts2022_cmd(struct dvb_frontend *fe,
140 }; 31 };
141 32
142 for (i = 0; i < 2; i++) { 33 for (i = 0; i < 2; i++) {
143 dev_dbg(&priv->client->dev, 34 dev_dbg(&dev->client->dev,
144 "%s: i=%d op=%02x reg=%02x mask=%02x val=%02x\n", 35 "i=%d op=%02x reg=%02x mask=%02x val=%02x\n",
145 __func__, i, op, reg, mask, val); 36 i, op, reg, mask, val);
146 37
147 for (i = 0; i < ARRAY_SIZE(reg_vals); i++) { 38 for (i = 0; i < ARRAY_SIZE(reg_vals); i++) {
148 ret = m88ts2022_wr_reg(priv, reg_vals[i].reg, 39 ret = regmap_write(dev->regmap, reg_vals[i].reg,
149 reg_vals[i].val); 40 reg_vals[i].val);
150 if (ret) 41 if (ret)
151 goto err; 42 goto err;
@@ -153,37 +44,38 @@ static int m88ts2022_cmd(struct dvb_frontend *fe,
153 44
154 usleep_range(sleep * 1000, sleep * 10000); 45 usleep_range(sleep * 1000, sleep * 10000);
155 46
156 ret = m88ts2022_rd_reg(priv, reg, &u8tmp); 47 ret = regmap_read(dev->regmap, reg, &utmp);
157 if (ret) 48 if (ret)
158 goto err; 49 goto err;
159 50
160 if ((u8tmp & mask) != val) 51 if ((utmp & mask) != val)
161 break; 52 break;
162 } 53 }
163 54
164 if (reg_val) 55 if (reg_val)
165 *reg_val = u8tmp; 56 *reg_val = utmp;
166err: 57err:
167 return ret; 58 return ret;
168} 59}
169 60
170static int m88ts2022_set_params(struct dvb_frontend *fe) 61static int m88ts2022_set_params(struct dvb_frontend *fe)
171{ 62{
172 struct m88ts2022_priv *priv = fe->tuner_priv; 63 struct m88ts2022_dev *dev = fe->tuner_priv;
173 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 64 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
174 int ret; 65 int ret;
175 unsigned int frequency_khz, frequency_offset_khz, f_3db_hz; 66 unsigned int utmp, frequency_khz, frequency_offset_khz, f_3db_hz;
176 unsigned int f_ref_khz, f_vco_khz, div_ref, div_out, pll_n, gdiv28; 67 unsigned int f_ref_khz, f_vco_khz, div_ref, div_out, pll_n, gdiv28;
177 u8 buf[3], u8tmp, cap_code, lpf_gm, lpf_mxdiv, div_max, div_min; 68 u8 buf[3], u8tmp, cap_code, lpf_gm, lpf_mxdiv, div_max, div_min;
178 u16 u16tmp; 69 u16 u16tmp;
179 dev_dbg(&priv->client->dev, 70
180 "%s: frequency=%d symbol_rate=%d rolloff=%d\n", 71 dev_dbg(&dev->client->dev,
181 __func__, c->frequency, c->symbol_rate, c->rolloff); 72 "frequency=%d symbol_rate=%d rolloff=%d\n",
73 c->frequency, c->symbol_rate, c->rolloff);
182 /* 74 /*
183 * Integer-N PLL synthesizer 75 * Integer-N PLL synthesizer
184 * kHz is used for all calculations to keep calculations within 32-bit 76 * kHz is used for all calculations to keep calculations within 32-bit
185 */ 77 */
186 f_ref_khz = DIV_ROUND_CLOSEST(priv->cfg.clock, 1000); 78 f_ref_khz = DIV_ROUND_CLOSEST(dev->cfg.clock, 1000);
187 div_ref = DIV_ROUND_CLOSEST(f_ref_khz, 2000); 79 div_ref = DIV_ROUND_CLOSEST(f_ref_khz, 2000);
188 80
189 if (c->symbol_rate < 5000000) 81 if (c->symbol_rate < 5000000)
@@ -203,14 +95,14 @@ static int m88ts2022_set_params(struct dvb_frontend *fe)
203 95
204 buf[0] = u8tmp; 96 buf[0] = u8tmp;
205 buf[1] = 0x40; 97 buf[1] = 0x40;
206 ret = m88ts2022_wr_regs(priv, 0x10, buf, 2); 98 ret = regmap_bulk_write(dev->regmap, 0x10, buf, 2);
207 if (ret) 99 if (ret)
208 goto err; 100 goto err;
209 101
210 f_vco_khz = frequency_khz * div_out; 102 f_vco_khz = frequency_khz * div_out;
211 pll_n = f_vco_khz * div_ref / f_ref_khz; 103 pll_n = f_vco_khz * div_ref / f_ref_khz;
212 pll_n += pll_n % 2; 104 pll_n += pll_n % 2;
213 priv->frequency_khz = pll_n * f_ref_khz / div_ref / div_out; 105 dev->frequency_khz = pll_n * f_ref_khz / div_ref / div_out;
214 106
215 if (pll_n < 4095) 107 if (pll_n < 4095)
216 u16tmp = pll_n - 1024; 108 u16tmp = pll_n - 1024;
@@ -222,88 +114,87 @@ static int m88ts2022_set_params(struct dvb_frontend *fe)
222 buf[0] = (u16tmp >> 8) & 0x3f; 114 buf[0] = (u16tmp >> 8) & 0x3f;
223 buf[1] = (u16tmp >> 0) & 0xff; 115 buf[1] = (u16tmp >> 0) & 0xff;
224 buf[2] = div_ref - 8; 116 buf[2] = div_ref - 8;
225 ret = m88ts2022_wr_regs(priv, 0x01, buf, 3); 117 ret = regmap_bulk_write(dev->regmap, 0x01, buf, 3);
226 if (ret) 118 if (ret)
227 goto err; 119 goto err;
228 120
229 dev_dbg(&priv->client->dev, 121 dev_dbg(&dev->client->dev,
230 "%s: frequency=%u offset=%d f_vco_khz=%u pll_n=%u div_ref=%u div_out=%u\n", 122 "frequency=%u offset=%d f_vco_khz=%u pll_n=%u div_ref=%u div_out=%u\n",
231 __func__, priv->frequency_khz, 123 dev->frequency_khz, dev->frequency_khz - c->frequency,
232 priv->frequency_khz - c->frequency, f_vco_khz, pll_n, 124 f_vco_khz, pll_n, div_ref, div_out);
233 div_ref, div_out);
234 125
235 ret = m88ts2022_cmd(fe, 0x10, 5, 0x15, 0x40, 0x00, NULL); 126 ret = m88ts2022_cmd(dev, 0x10, 5, 0x15, 0x40, 0x00, NULL);
236 if (ret) 127 if (ret)
237 goto err; 128 goto err;
238 129
239 ret = m88ts2022_rd_reg(priv, 0x14, &u8tmp); 130 ret = regmap_read(dev->regmap, 0x14, &utmp);
240 if (ret) 131 if (ret)
241 goto err; 132 goto err;
242 133
243 u8tmp &= 0x7f; 134 utmp &= 0x7f;
244 if (u8tmp < 64) { 135 if (utmp < 64) {
245 ret = m88ts2022_wr_reg_mask(priv, 0x10, 0x80, 0x80); 136 ret = regmap_update_bits(dev->regmap, 0x10, 0x80, 0x80);
246 if (ret) 137 if (ret)
247 goto err; 138 goto err;
248 139
249 ret = m88ts2022_wr_reg(priv, 0x11, 0x6f); 140 ret = regmap_write(dev->regmap, 0x11, 0x6f);
250 if (ret) 141 if (ret)
251 goto err; 142 goto err;
252 143
253 ret = m88ts2022_cmd(fe, 0x10, 5, 0x15, 0x40, 0x00, NULL); 144 ret = m88ts2022_cmd(dev, 0x10, 5, 0x15, 0x40, 0x00, NULL);
254 if (ret) 145 if (ret)
255 goto err; 146 goto err;
256 } 147 }
257 148
258 ret = m88ts2022_rd_reg(priv, 0x14, &u8tmp); 149 ret = regmap_read(dev->regmap, 0x14, &utmp);
259 if (ret) 150 if (ret)
260 goto err; 151 goto err;
261 152
262 u8tmp &= 0x1f; 153 utmp &= 0x1f;
263 if (u8tmp > 19) { 154 if (utmp > 19) {
264 ret = m88ts2022_wr_reg_mask(priv, 0x10, 0x00, 0x02); 155 ret = regmap_update_bits(dev->regmap, 0x10, 0x02, 0x00);
265 if (ret) 156 if (ret)
266 goto err; 157 goto err;
267 } 158 }
268 159
269 ret = m88ts2022_cmd(fe, 0x08, 5, 0x3c, 0xff, 0x00, NULL); 160 ret = m88ts2022_cmd(dev, 0x08, 5, 0x3c, 0xff, 0x00, NULL);
270 if (ret) 161 if (ret)
271 goto err; 162 goto err;
272 163
273 ret = m88ts2022_wr_reg(priv, 0x25, 0x00); 164 ret = regmap_write(dev->regmap, 0x25, 0x00);
274 if (ret) 165 if (ret)
275 goto err; 166 goto err;
276 167
277 ret = m88ts2022_wr_reg(priv, 0x27, 0x70); 168 ret = regmap_write(dev->regmap, 0x27, 0x70);
278 if (ret) 169 if (ret)
279 goto err; 170 goto err;
280 171
281 ret = m88ts2022_wr_reg(priv, 0x41, 0x09); 172 ret = regmap_write(dev->regmap, 0x41, 0x09);
282 if (ret) 173 if (ret)
283 goto err; 174 goto err;
284 175
285 ret = m88ts2022_wr_reg(priv, 0x08, 0x0b); 176 ret = regmap_write(dev->regmap, 0x08, 0x0b);
286 if (ret) 177 if (ret)
287 goto err; 178 goto err;
288 179
289 /* filters */ 180 /* filters */
290 gdiv28 = DIV_ROUND_CLOSEST(f_ref_khz * 1694U, 1000000U); 181 gdiv28 = DIV_ROUND_CLOSEST(f_ref_khz * 1694U, 1000000U);
291 182
292 ret = m88ts2022_wr_reg(priv, 0x04, gdiv28); 183 ret = regmap_write(dev->regmap, 0x04, gdiv28);
293 if (ret) 184 if (ret)
294 goto err; 185 goto err;
295 186
296 ret = m88ts2022_cmd(fe, 0x04, 2, 0x26, 0xff, 0x00, &u8tmp); 187 ret = m88ts2022_cmd(dev, 0x04, 2, 0x26, 0xff, 0x00, &u8tmp);
297 if (ret) 188 if (ret)
298 goto err; 189 goto err;
299 190
300 cap_code = u8tmp & 0x3f; 191 cap_code = u8tmp & 0x3f;
301 192
302 ret = m88ts2022_wr_reg(priv, 0x41, 0x0d); 193 ret = regmap_write(dev->regmap, 0x41, 0x0d);
303 if (ret) 194 if (ret)
304 goto err; 195 goto err;
305 196
306 ret = m88ts2022_cmd(fe, 0x04, 2, 0x26, 0xff, 0x00, &u8tmp); 197 ret = m88ts2022_cmd(dev, 0x04, 2, 0x26, 0xff, 0x00, &u8tmp);
307 if (ret) 198 if (ret)
308 goto err; 199 goto err;
309 200
@@ -314,7 +205,7 @@ static int m88ts2022_set_params(struct dvb_frontend *fe)
314 div_min = gdiv28 * 78 / 100; 205 div_min = gdiv28 * 78 / 100;
315 div_max = clamp_val(div_max, 0U, 63U); 206 div_max = clamp_val(div_max, 0U, 63U);
316 207
317 f_3db_hz = c->symbol_rate * 135UL / 200UL; 208 f_3db_hz = mult_frac(c->symbol_rate, 135, 200);
318 f_3db_hz += 2000000U + (frequency_offset_khz * 1000U); 209 f_3db_hz += 2000000U + (frequency_offset_khz * 1000U);
319 f_3db_hz = clamp(f_3db_hz, 7000000U, 40000000U); 210 f_3db_hz = clamp(f_3db_hz, 7000000U, 40000000U);
320 211
@@ -327,25 +218,25 @@ static int m88ts2022_set_params(struct dvb_frontend *fe)
327 lpf_mxdiv = DIV_ROUND_CLOSEST(++lpf_gm * LPF_COEFF * f_ref_khz, f_3db_hz); 218 lpf_mxdiv = DIV_ROUND_CLOSEST(++lpf_gm * LPF_COEFF * f_ref_khz, f_3db_hz);
328 lpf_mxdiv = clamp_val(lpf_mxdiv, 0U, div_max); 219 lpf_mxdiv = clamp_val(lpf_mxdiv, 0U, div_max);
329 220
330 ret = m88ts2022_wr_reg(priv, 0x04, lpf_mxdiv); 221 ret = regmap_write(dev->regmap, 0x04, lpf_mxdiv);
331 if (ret) 222 if (ret)
332 goto err; 223 goto err;
333 224
334 ret = m88ts2022_wr_reg(priv, 0x06, lpf_gm); 225 ret = regmap_write(dev->regmap, 0x06, lpf_gm);
335 if (ret) 226 if (ret)
336 goto err; 227 goto err;
337 228
338 ret = m88ts2022_cmd(fe, 0x04, 2, 0x26, 0xff, 0x00, &u8tmp); 229 ret = m88ts2022_cmd(dev, 0x04, 2, 0x26, 0xff, 0x00, &u8tmp);
339 if (ret) 230 if (ret)
340 goto err; 231 goto err;
341 232
342 cap_code = u8tmp & 0x3f; 233 cap_code = u8tmp & 0x3f;
343 234
344 ret = m88ts2022_wr_reg(priv, 0x41, 0x09); 235 ret = regmap_write(dev->regmap, 0x41, 0x09);
345 if (ret) 236 if (ret)
346 goto err; 237 goto err;
347 238
348 ret = m88ts2022_cmd(fe, 0x04, 2, 0x26, 0xff, 0x00, &u8tmp); 239 ret = m88ts2022_cmd(dev, 0x04, 2, 0x26, 0xff, 0x00, &u8tmp);
349 if (ret) 240 if (ret)
350 goto err; 241 goto err;
351 242
@@ -353,31 +244,31 @@ static int m88ts2022_set_params(struct dvb_frontend *fe)
353 cap_code = (cap_code + u8tmp) / 2; 244 cap_code = (cap_code + u8tmp) / 2;
354 245
355 u8tmp = cap_code | 0x80; 246 u8tmp = cap_code | 0x80;
356 ret = m88ts2022_wr_reg(priv, 0x25, u8tmp); 247 ret = regmap_write(dev->regmap, 0x25, u8tmp);
357 if (ret) 248 if (ret)
358 goto err; 249 goto err;
359 250
360 ret = m88ts2022_wr_reg(priv, 0x27, 0x30); 251 ret = regmap_write(dev->regmap, 0x27, 0x30);
361 if (ret) 252 if (ret)
362 goto err; 253 goto err;
363 254
364 ret = m88ts2022_wr_reg(priv, 0x08, 0x09); 255 ret = regmap_write(dev->regmap, 0x08, 0x09);
365 if (ret) 256 if (ret)
366 goto err; 257 goto err;
367 258
368 ret = m88ts2022_cmd(fe, 0x01, 20, 0x21, 0xff, 0x00, NULL); 259 ret = m88ts2022_cmd(dev, 0x01, 20, 0x21, 0xff, 0x00, NULL);
369 if (ret) 260 if (ret)
370 goto err; 261 goto err;
371err: 262err:
372 if (ret) 263 if (ret)
373 dev_dbg(&priv->client->dev, "%s: failed=%d\n", __func__, ret); 264 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
374 265
375 return ret; 266 return ret;
376} 267}
377 268
378static int m88ts2022_init(struct dvb_frontend *fe) 269static int m88ts2022_init(struct dvb_frontend *fe)
379{ 270{
380 struct m88ts2022_priv *priv = fe->tuner_priv; 271 struct m88ts2022_dev *dev = fe->tuner_priv;
381 int ret, i; 272 int ret, i;
382 u8 u8tmp; 273 u8 u8tmp;
383 static const struct m88ts2022_reg_val reg_vals[] = { 274 static const struct m88ts2022_reg_val reg_vals[] = {
@@ -393,23 +284,24 @@ static int m88ts2022_init(struct dvb_frontend *fe)
393 {0x24, 0x02}, 284 {0x24, 0x02},
394 {0x12, 0xa0}, 285 {0x12, 0xa0},
395 }; 286 };
396 dev_dbg(&priv->client->dev, "%s:\n", __func__);
397 287
398 ret = m88ts2022_wr_reg(priv, 0x00, 0x01); 288 dev_dbg(&dev->client->dev, "\n");
289
290 ret = regmap_write(dev->regmap, 0x00, 0x01);
399 if (ret) 291 if (ret)
400 goto err; 292 goto err;
401 293
402 ret = m88ts2022_wr_reg(priv, 0x00, 0x03); 294 ret = regmap_write(dev->regmap, 0x00, 0x03);
403 if (ret) 295 if (ret)
404 goto err; 296 goto err;
405 297
406 switch (priv->cfg.clock_out) { 298 switch (dev->cfg.clock_out) {
407 case M88TS2022_CLOCK_OUT_DISABLED: 299 case M88TS2022_CLOCK_OUT_DISABLED:
408 u8tmp = 0x60; 300 u8tmp = 0x60;
409 break; 301 break;
410 case M88TS2022_CLOCK_OUT_ENABLED: 302 case M88TS2022_CLOCK_OUT_ENABLED:
411 u8tmp = 0x70; 303 u8tmp = 0x70;
412 ret = m88ts2022_wr_reg(priv, 0x05, priv->cfg.clock_out_div); 304 ret = regmap_write(dev->regmap, 0x05, dev->cfg.clock_out_div);
413 if (ret) 305 if (ret)
414 goto err; 306 goto err;
415 break; 307 break;
@@ -420,58 +312,61 @@ static int m88ts2022_init(struct dvb_frontend *fe)
420 goto err; 312 goto err;
421 } 313 }
422 314
423 ret = m88ts2022_wr_reg(priv, 0x42, u8tmp); 315 ret = regmap_write(dev->regmap, 0x42, u8tmp);
424 if (ret) 316 if (ret)
425 goto err; 317 goto err;
426 318
427 if (priv->cfg.loop_through) 319 if (dev->cfg.loop_through)
428 u8tmp = 0xec; 320 u8tmp = 0xec;
429 else 321 else
430 u8tmp = 0x6c; 322 u8tmp = 0x6c;
431 323
432 ret = m88ts2022_wr_reg(priv, 0x62, u8tmp); 324 ret = regmap_write(dev->regmap, 0x62, u8tmp);
433 if (ret) 325 if (ret)
434 goto err; 326 goto err;
435 327
436 for (i = 0; i < ARRAY_SIZE(reg_vals); i++) { 328 for (i = 0; i < ARRAY_SIZE(reg_vals); i++) {
437 ret = m88ts2022_wr_reg(priv, reg_vals[i].reg, reg_vals[i].val); 329 ret = regmap_write(dev->regmap, reg_vals[i].reg, reg_vals[i].val);
438 if (ret) 330 if (ret)
439 goto err; 331 goto err;
440 } 332 }
441err: 333err:
442 if (ret) 334 if (ret)
443 dev_dbg(&priv->client->dev, "%s: failed=%d\n", __func__, ret); 335 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
444 return ret; 336 return ret;
445} 337}
446 338
447static int m88ts2022_sleep(struct dvb_frontend *fe) 339static int m88ts2022_sleep(struct dvb_frontend *fe)
448{ 340{
449 struct m88ts2022_priv *priv = fe->tuner_priv; 341 struct m88ts2022_dev *dev = fe->tuner_priv;
450 int ret; 342 int ret;
451 dev_dbg(&priv->client->dev, "%s:\n", __func__);
452 343
453 ret = m88ts2022_wr_reg(priv, 0x00, 0x00); 344 dev_dbg(&dev->client->dev, "\n");
345
346 ret = regmap_write(dev->regmap, 0x00, 0x00);
454 if (ret) 347 if (ret)
455 goto err; 348 goto err;
456err: 349err:
457 if (ret) 350 if (ret)
458 dev_dbg(&priv->client->dev, "%s: failed=%d\n", __func__, ret); 351 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
459 return ret; 352 return ret;
460} 353}
461 354
462static int m88ts2022_get_frequency(struct dvb_frontend *fe, u32 *frequency) 355static int m88ts2022_get_frequency(struct dvb_frontend *fe, u32 *frequency)
463{ 356{
464 struct m88ts2022_priv *priv = fe->tuner_priv; 357 struct m88ts2022_dev *dev = fe->tuner_priv;
465 dev_dbg(&priv->client->dev, "%s:\n", __func__);
466 358
467 *frequency = priv->frequency_khz; 359 dev_dbg(&dev->client->dev, "\n");
360
361 *frequency = dev->frequency_khz;
468 return 0; 362 return 0;
469} 363}
470 364
471static int m88ts2022_get_if_frequency(struct dvb_frontend *fe, u32 *frequency) 365static int m88ts2022_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
472{ 366{
473 struct m88ts2022_priv *priv = fe->tuner_priv; 367 struct m88ts2022_dev *dev = fe->tuner_priv;
474 dev_dbg(&priv->client->dev, "%s:\n", __func__); 368
369 dev_dbg(&dev->client->dev, "\n");
475 370
476 *frequency = 0; /* Zero-IF */ 371 *frequency = 0; /* Zero-IF */
477 return 0; 372 return 0;
@@ -479,31 +374,30 @@ static int m88ts2022_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
479 374
480static int m88ts2022_get_rf_strength(struct dvb_frontend *fe, u16 *strength) 375static int m88ts2022_get_rf_strength(struct dvb_frontend *fe, u16 *strength)
481{ 376{
482 struct m88ts2022_priv *priv = fe->tuner_priv; 377 struct m88ts2022_dev *dev = fe->tuner_priv;
483 int ret; 378 int ret;
484 u8 u8tmp;
485 u16 gain, u16tmp; 379 u16 gain, u16tmp;
486 unsigned int gain1, gain2, gain3; 380 unsigned int utmp, gain1, gain2, gain3;
487 381
488 ret = m88ts2022_rd_reg(priv, 0x3d, &u8tmp); 382 ret = regmap_read(dev->regmap, 0x3d, &utmp);
489 if (ret) 383 if (ret)
490 goto err; 384 goto err;
491 385
492 gain1 = (u8tmp >> 0) & 0x1f; 386 gain1 = (utmp >> 0) & 0x1f;
493 gain1 = clamp(gain1, 0U, 15U); 387 gain1 = clamp(gain1, 0U, 15U);
494 388
495 ret = m88ts2022_rd_reg(priv, 0x21, &u8tmp); 389 ret = regmap_read(dev->regmap, 0x21, &utmp);
496 if (ret) 390 if (ret)
497 goto err; 391 goto err;
498 392
499 gain2 = (u8tmp >> 0) & 0x1f; 393 gain2 = (utmp >> 0) & 0x1f;
500 gain2 = clamp(gain2, 2U, 16U); 394 gain2 = clamp(gain2, 2U, 16U);
501 395
502 ret = m88ts2022_rd_reg(priv, 0x66, &u8tmp); 396 ret = regmap_read(dev->regmap, 0x66, &utmp);
503 if (ret) 397 if (ret)
504 goto err; 398 goto err;
505 399
506 gain3 = (u8tmp >> 3) & 0x07; 400 gain3 = (utmp >> 3) & 0x07;
507 gain3 = clamp(gain3, 0U, 6U); 401 gain3 = clamp(gain3, 0U, 6U);
508 402
509 gain = gain1 * 265 + gain2 * 338 + gain3 * 285; 403 gain = gain1 * 265 + gain2 * 338 + gain3 * 285;
@@ -515,7 +409,7 @@ static int m88ts2022_get_rf_strength(struct dvb_frontend *fe, u16 *strength)
515 *strength = (u16tmp - 59000) * 0xffff / (61500 - 59000); 409 *strength = (u16tmp - 59000) * 0xffff / (61500 - 59000);
516err: 410err:
517 if (ret) 411 if (ret)
518 dev_dbg(&priv->client->dev, "%s: failed=%d\n", __func__, ret); 412 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
519 return ret; 413 return ret;
520} 414}
521 415
@@ -540,46 +434,56 @@ static int m88ts2022_probe(struct i2c_client *client,
540{ 434{
541 struct m88ts2022_config *cfg = client->dev.platform_data; 435 struct m88ts2022_config *cfg = client->dev.platform_data;
542 struct dvb_frontend *fe = cfg->fe; 436 struct dvb_frontend *fe = cfg->fe;
543 struct m88ts2022_priv *priv; 437 struct m88ts2022_dev *dev;
544 int ret; 438 int ret;
545 u8 chip_id, u8tmp; 439 u8 u8tmp;
440 unsigned int utmp;
441 static const struct regmap_config regmap_config = {
442 .reg_bits = 8,
443 .val_bits = 8,
444 };
546 445
547 priv = kzalloc(sizeof(*priv), GFP_KERNEL); 446 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
548 if (!priv) { 447 if (!dev) {
549 ret = -ENOMEM; 448 ret = -ENOMEM;
550 dev_err(&client->dev, "%s: kzalloc() failed\n", KBUILD_MODNAME); 449 dev_err(&client->dev, "kzalloc() failed\n");
551 goto err; 450 goto err;
552 } 451 }
553 452
554 memcpy(&priv->cfg, cfg, sizeof(struct m88ts2022_config)); 453 memcpy(&dev->cfg, cfg, sizeof(struct m88ts2022_config));
555 priv->client = client; 454 dev->client = client;
455 dev->regmap = devm_regmap_init_i2c(client, &regmap_config);
456 if (IS_ERR(dev->regmap)) {
457 ret = PTR_ERR(dev->regmap);
458 goto err;
459 }
556 460
557 /* check if the tuner is there */ 461 /* check if the tuner is there */
558 ret = m88ts2022_rd_reg(priv, 0x00, &u8tmp); 462 ret = regmap_read(dev->regmap, 0x00, &utmp);
559 if (ret) 463 if (ret)
560 goto err; 464 goto err;
561 465
562 if ((u8tmp & 0x03) == 0x00) { 466 if ((utmp & 0x03) == 0x00) {
563 ret = m88ts2022_wr_reg(priv, 0x00, 0x01); 467 ret = regmap_write(dev->regmap, 0x00, 0x01);
564 if (ret < 0) 468 if (ret)
565 goto err; 469 goto err;
566 470
567 usleep_range(2000, 50000); 471 usleep_range(2000, 50000);
568 } 472 }
569 473
570 ret = m88ts2022_wr_reg(priv, 0x00, 0x03); 474 ret = regmap_write(dev->regmap, 0x00, 0x03);
571 if (ret) 475 if (ret)
572 goto err; 476 goto err;
573 477
574 usleep_range(2000, 50000); 478 usleep_range(2000, 50000);
575 479
576 ret = m88ts2022_rd_reg(priv, 0x00, &chip_id); 480 ret = regmap_read(dev->regmap, 0x00, &utmp);
577 if (ret) 481 if (ret)
578 goto err; 482 goto err;
579 483
580 dev_dbg(&priv->client->dev, "%s: chip_id=%02x\n", __func__, chip_id); 484 dev_dbg(&dev->client->dev, "chip_id=%02x\n", utmp);
581 485
582 switch (chip_id) { 486 switch (utmp) {
583 case 0xc3: 487 case 0xc3:
584 case 0x83: 488 case 0x83:
585 break; 489 break;
@@ -587,13 +491,13 @@ static int m88ts2022_probe(struct i2c_client *client,
587 goto err; 491 goto err;
588 } 492 }
589 493
590 switch (priv->cfg.clock_out) { 494 switch (dev->cfg.clock_out) {
591 case M88TS2022_CLOCK_OUT_DISABLED: 495 case M88TS2022_CLOCK_OUT_DISABLED:
592 u8tmp = 0x60; 496 u8tmp = 0x60;
593 break; 497 break;
594 case M88TS2022_CLOCK_OUT_ENABLED: 498 case M88TS2022_CLOCK_OUT_ENABLED:
595 u8tmp = 0x70; 499 u8tmp = 0x70;
596 ret = m88ts2022_wr_reg(priv, 0x05, priv->cfg.clock_out_div); 500 ret = regmap_write(dev->regmap, 0x05, dev->cfg.clock_out_div);
597 if (ret) 501 if (ret)
598 goto err; 502 goto err;
599 break; 503 break;
@@ -604,49 +508,48 @@ static int m88ts2022_probe(struct i2c_client *client,
604 goto err; 508 goto err;
605 } 509 }
606 510
607 ret = m88ts2022_wr_reg(priv, 0x42, u8tmp); 511 ret = regmap_write(dev->regmap, 0x42, u8tmp);
608 if (ret) 512 if (ret)
609 goto err; 513 goto err;
610 514
611 if (priv->cfg.loop_through) 515 if (dev->cfg.loop_through)
612 u8tmp = 0xec; 516 u8tmp = 0xec;
613 else 517 else
614 u8tmp = 0x6c; 518 u8tmp = 0x6c;
615 519
616 ret = m88ts2022_wr_reg(priv, 0x62, u8tmp); 520 ret = regmap_write(dev->regmap, 0x62, u8tmp);
617 if (ret) 521 if (ret)
618 goto err; 522 goto err;
619 523
620 /* sleep */ 524 /* sleep */
621 ret = m88ts2022_wr_reg(priv, 0x00, 0x00); 525 ret = regmap_write(dev->regmap, 0x00, 0x00);
622 if (ret) 526 if (ret)
623 goto err; 527 goto err;
624 528
625 dev_info(&priv->client->dev, 529 dev_info(&dev->client->dev, "Montage M88TS2022 successfully identified\n");
626 "%s: Montage M88TS2022 successfully identified\n",
627 KBUILD_MODNAME);
628 530
629 fe->tuner_priv = priv; 531 fe->tuner_priv = dev;
630 memcpy(&fe->ops.tuner_ops, &m88ts2022_tuner_ops, 532 memcpy(&fe->ops.tuner_ops, &m88ts2022_tuner_ops,
631 sizeof(struct dvb_tuner_ops)); 533 sizeof(struct dvb_tuner_ops));
632 534
633 i2c_set_clientdata(client, priv); 535 i2c_set_clientdata(client, dev);
634 return 0; 536 return 0;
635err: 537err:
636 dev_dbg(&client->dev, "%s: failed=%d\n", __func__, ret); 538 dev_dbg(&client->dev, "failed=%d\n", ret);
637 kfree(priv); 539 kfree(dev);
638 return ret; 540 return ret;
639} 541}
640 542
641static int m88ts2022_remove(struct i2c_client *client) 543static int m88ts2022_remove(struct i2c_client *client)
642{ 544{
643 struct m88ts2022_priv *priv = i2c_get_clientdata(client); 545 struct m88ts2022_dev *dev = i2c_get_clientdata(client);
644 struct dvb_frontend *fe = priv->cfg.fe; 546 struct dvb_frontend *fe = dev->cfg.fe;
645 dev_dbg(&client->dev, "%s:\n", __func__); 547
548 dev_dbg(&client->dev, "\n");
646 549
647 memset(&fe->ops.tuner_ops, 0, sizeof(struct dvb_tuner_ops)); 550 memset(&fe->ops.tuner_ops, 0, sizeof(struct dvb_tuner_ops));
648 fe->tuner_priv = NULL; 551 fe->tuner_priv = NULL;
649 kfree(priv); 552 kfree(dev);
650 553
651 return 0; 554 return 0;
652} 555}
diff --git a/drivers/media/tuners/m88ts2022_priv.h b/drivers/media/tuners/m88ts2022_priv.h
index 0363dd866a2d..feeb5ad6beef 100644
--- a/drivers/media/tuners/m88ts2022_priv.h
+++ b/drivers/media/tuners/m88ts2022_priv.h
@@ -18,11 +18,12 @@
18#define M88TS2022_PRIV_H 18#define M88TS2022_PRIV_H
19 19
20#include "m88ts2022.h" 20#include "m88ts2022.h"
21#include <linux/regmap.h>
21 22
22struct m88ts2022_priv { 23struct m88ts2022_dev {
23 struct m88ts2022_config cfg; 24 struct m88ts2022_config cfg;
24 struct i2c_client *client; 25 struct i2c_client *client;
25 struct dvb_frontend *fe; 26 struct regmap *regmap;
26 u32 frequency_khz; 27 u32 frequency_khz;
27}; 28};
28 29
diff --git a/drivers/media/tuners/msi001.c b/drivers/media/tuners/msi001.c
index ee99e372c943..26019e731993 100644
--- a/drivers/media/tuners/msi001.c
+++ b/drivers/media/tuners/msi001.c
@@ -67,7 +67,8 @@ static int msi001_set_gain(struct msi001 *s, int lna_gain, int mixer_gain,
67{ 67{
68 int ret; 68 int ret;
69 u32 reg; 69 u32 reg;
70 dev_dbg(&s->spi->dev, "%s: lna=%d mixer=%d if=%d\n", __func__, 70
71 dev_dbg(&s->spi->dev, "lna=%d mixer=%d if=%d\n",
71 lna_gain, mixer_gain, if_gain); 72 lna_gain, mixer_gain, if_gain);
72 73
73 reg = 1 << 0; 74 reg = 1 << 0;
@@ -83,7 +84,7 @@ static int msi001_set_gain(struct msi001 *s, int lna_gain, int mixer_gain,
83 84
84 return 0; 85 return 0;
85err: 86err:
86 dev_dbg(&s->spi->dev, "%s: failed %d\n", __func__, ret); 87 dev_dbg(&s->spi->dev, "failed %d\n", ret);
87 return ret; 88 return ret;
88}; 89};
89 90
@@ -94,6 +95,7 @@ static int msi001_set_tuner(struct msi001 *s)
94 u32 reg; 95 u32 reg;
95 u64 f_vco, tmp64; 96 u64 f_vco, tmp64;
96 u8 mode, filter_mode, lo_div; 97 u8 mode, filter_mode, lo_div;
98
97 static const struct { 99 static const struct {
98 u32 rf; 100 u32 rf;
99 u8 mode; 101 u8 mode;
@@ -145,9 +147,7 @@ static int msi001_set_tuner(struct msi001 *s)
145 #define R_REF 4 147 #define R_REF 4
146 #define F_OUT_STEP 1 148 #define F_OUT_STEP 1
147 149
148 dev_dbg(&s->spi->dev, 150 dev_dbg(&s->spi->dev, "f_rf=%d f_if=%d\n", f_rf, f_if);
149 "%s: f_rf=%d f_if=%d\n",
150 __func__, f_rf, f_if);
151 151
152 for (i = 0; i < ARRAY_SIZE(band_lut); i++) { 152 for (i = 0; i < ARRAY_SIZE(band_lut); i++) {
153 if (f_rf <= band_lut[i].rf) { 153 if (f_rf <= band_lut[i].rf) {
@@ -198,8 +198,7 @@ static int msi001_set_tuner(struct msi001 *s)
198 198
199 s->bandwidth->val = bandwidth_lut[i].freq; 199 s->bandwidth->val = bandwidth_lut[i].freq;
200 200
201 dev_dbg(&s->spi->dev, "%s: bandwidth selected=%d\n", 201 dev_dbg(&s->spi->dev, "bandwidth selected=%d\n", bandwidth_lut[i].freq);
202 __func__, bandwidth_lut[i].freq);
203 202
204 f_vco = (u64) (f_rf + f_if + f_if1) * lo_div; 203 f_vco = (u64) (f_rf + f_if + f_if1) * lo_div;
205 tmp64 = f_vco; 204 tmp64 = f_vco;
@@ -225,9 +224,8 @@ static int msi001_set_tuner(struct msi001 *s)
225 tmp += 1ul * F_REF * R_REF * frac / thresh; 224 tmp += 1ul * F_REF * R_REF * frac / thresh;
226 tmp /= lo_div; 225 tmp /= lo_div;
227 226
228 dev_dbg(&s->spi->dev, 227 dev_dbg(&s->spi->dev, "rf=%u:%u n=%d thresh=%d frac=%d\n",
229 "%s: rf=%u:%u n=%d thresh=%d frac=%d\n", 228 f_rf, tmp, n, thresh, frac);
230 __func__, f_rf, tmp, n, thresh, frac);
231 229
232 ret = msi001_wreg(s, 0x00000e); 230 ret = msi001_wreg(s, 0x00000e);
233 if (ret) 231 if (ret)
@@ -276,7 +274,7 @@ static int msi001_set_tuner(struct msi001 *s)
276 274
277 return 0; 275 return 0;
278err: 276err:
279 dev_dbg(&s->spi->dev, "%s: failed %d\n", __func__, ret); 277 dev_dbg(&s->spi->dev, "failed %d\n", ret);
280 return ret; 278 return ret;
281}; 279};
282 280
@@ -284,7 +282,8 @@ static int msi001_s_power(struct v4l2_subdev *sd, int on)
284{ 282{
285 struct msi001 *s = sd_to_msi001(sd); 283 struct msi001 *s = sd_to_msi001(sd);
286 int ret; 284 int ret;
287 dev_dbg(&s->spi->dev, "%s: on=%d\n", __func__, on); 285
286 dev_dbg(&s->spi->dev, "on=%d\n", on);
288 287
289 if (on) 288 if (on)
290 ret = 0; 289 ret = 0;
@@ -301,7 +300,8 @@ static const struct v4l2_subdev_core_ops msi001_core_ops = {
301static int msi001_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *v) 300static int msi001_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *v)
302{ 301{
303 struct msi001 *s = sd_to_msi001(sd); 302 struct msi001 *s = sd_to_msi001(sd);
304 dev_dbg(&s->spi->dev, "%s: index=%d\n", __func__, v->index); 303
304 dev_dbg(&s->spi->dev, "index=%d\n", v->index);
305 305
306 strlcpy(v->name, "Mirics MSi001", sizeof(v->name)); 306 strlcpy(v->name, "Mirics MSi001", sizeof(v->name));
307 v->type = V4L2_TUNER_RF; 307 v->type = V4L2_TUNER_RF;
@@ -315,14 +315,16 @@ static int msi001_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *v)
315static int msi001_s_tuner(struct v4l2_subdev *sd, const struct v4l2_tuner *v) 315static int msi001_s_tuner(struct v4l2_subdev *sd, const struct v4l2_tuner *v)
316{ 316{
317 struct msi001 *s = sd_to_msi001(sd); 317 struct msi001 *s = sd_to_msi001(sd);
318 dev_dbg(&s->spi->dev, "%s: index=%d\n", __func__, v->index); 318
319 dev_dbg(&s->spi->dev, "index=%d\n", v->index);
319 return 0; 320 return 0;
320} 321}
321 322
322static int msi001_g_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *f) 323static int msi001_g_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *f)
323{ 324{
324 struct msi001 *s = sd_to_msi001(sd); 325 struct msi001 *s = sd_to_msi001(sd);
325 dev_dbg(&s->spi->dev, "%s: tuner=%d\n", __func__, f->tuner); 326
327 dev_dbg(&s->spi->dev, "tuner=%d\n", f->tuner);
326 f->frequency = s->f_tuner; 328 f->frequency = s->f_tuner;
327 return 0; 329 return 0;
328} 330}
@@ -332,8 +334,9 @@ static int msi001_s_frequency(struct v4l2_subdev *sd,
332{ 334{
333 struct msi001 *s = sd_to_msi001(sd); 335 struct msi001 *s = sd_to_msi001(sd);
334 unsigned int band; 336 unsigned int band;
335 dev_dbg(&s->spi->dev, "%s: tuner=%d type=%d frequency=%u\n", 337
336 __func__, f->tuner, f->type, f->frequency); 338 dev_dbg(&s->spi->dev, "tuner=%d type=%d frequency=%u\n",
339 f->tuner, f->type, f->frequency);
337 340
338 if (f->frequency < ((bands[0].rangehigh + bands[1].rangelow) / 2)) 341 if (f->frequency < ((bands[0].rangehigh + bands[1].rangelow) / 2))
339 band = 0; 342 band = 0;
@@ -349,8 +352,9 @@ static int msi001_enum_freq_bands(struct v4l2_subdev *sd,
349 struct v4l2_frequency_band *band) 352 struct v4l2_frequency_band *band)
350{ 353{
351 struct msi001 *s = sd_to_msi001(sd); 354 struct msi001 *s = sd_to_msi001(sd);
352 dev_dbg(&s->spi->dev, "%s: tuner=%d type=%d index=%d\n", 355
353 __func__, band->tuner, band->type, band->index); 356 dev_dbg(&s->spi->dev, "tuner=%d type=%d index=%d\n",
357 band->tuner, band->type, band->index);
354 358
355 if (band->index >= ARRAY_SIZE(bands)) 359 if (band->index >= ARRAY_SIZE(bands))
356 return -EINVAL; 360 return -EINVAL;
@@ -380,9 +384,10 @@ static int msi001_s_ctrl(struct v4l2_ctrl *ctrl)
380 struct msi001 *s = container_of(ctrl->handler, struct msi001, hdl); 384 struct msi001 *s = container_of(ctrl->handler, struct msi001, hdl);
381 385
382 int ret; 386 int ret;
387
383 dev_dbg(&s->spi->dev, 388 dev_dbg(&s->spi->dev,
384 "%s: id=%d name=%s val=%d min=%lld max=%lld step=%lld\n", 389 "id=%d name=%s val=%d min=%lld max=%lld step=%lld\n",
385 __func__, ctrl->id, ctrl->name, ctrl->val, 390 ctrl->id, ctrl->name, ctrl->val,
386 ctrl->minimum, ctrl->maximum, ctrl->step); 391 ctrl->minimum, ctrl->maximum, ctrl->step);
387 392
388 switch (ctrl->id) { 393 switch (ctrl->id) {
@@ -403,8 +408,7 @@ static int msi001_s_ctrl(struct v4l2_ctrl *ctrl)
403 s->mixer_gain->cur.val, s->if_gain->val); 408 s->mixer_gain->cur.val, s->if_gain->val);
404 break; 409 break;
405 default: 410 default:
406 dev_dbg(&s->spi->dev, "%s: unkown control %d\n", 411 dev_dbg(&s->spi->dev, "unkown control %d\n", ctrl->id);
407 __func__, ctrl->id);
408 ret = -EINVAL; 412 ret = -EINVAL;
409 } 413 }
410 414
@@ -419,7 +423,8 @@ static int msi001_probe(struct spi_device *spi)
419{ 423{
420 struct msi001 *s; 424 struct msi001 *s;
421 int ret; 425 int ret;
422 dev_dbg(&spi->dev, "%s:\n", __func__); 426
427 dev_dbg(&spi->dev, "\n");
423 428
424 s = kzalloc(sizeof(struct msi001), GFP_KERNEL); 429 s = kzalloc(sizeof(struct msi001), GFP_KERNEL);
425 if (s == NULL) { 430 if (s == NULL) {
@@ -466,7 +471,8 @@ static int msi001_remove(struct spi_device *spi)
466{ 471{
467 struct v4l2_subdev *sd = spi_get_drvdata(spi); 472 struct v4l2_subdev *sd = spi_get_drvdata(spi);
468 struct msi001 *s = sd_to_msi001(sd); 473 struct msi001 *s = sd_to_msi001(sd);
469 dev_dbg(&spi->dev, "%s:\n", __func__); 474
475 dev_dbg(&spi->dev, "\n");
470 476
471 /* 477 /*
472 * Registered by v4l2_spi_new_subdev() from master driver, but we must 478 * Registered by v4l2_spi_new_subdev() from master driver, but we must
diff --git a/drivers/media/tuners/mt2060.c b/drivers/media/tuners/mt2060.c
index 13381de58a84..b87b2549d58d 100644
--- a/drivers/media/tuners/mt2060.c
+++ b/drivers/media/tuners/mt2060.c
@@ -157,7 +157,6 @@ static int mt2060_set_params(struct dvb_frontend *fe)
157{ 157{
158 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 158 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
159 struct mt2060_priv *priv; 159 struct mt2060_priv *priv;
160 int ret=0;
161 int i=0; 160 int i=0;
162 u32 freq; 161 u32 freq;
163 u8 lnaband; 162 u8 lnaband;
@@ -240,7 +239,7 @@ static int mt2060_set_params(struct dvb_frontend *fe)
240 if (fe->ops.i2c_gate_ctrl) 239 if (fe->ops.i2c_gate_ctrl)
241 fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */ 240 fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */
242 241
243 return ret; 242 return 0;
244} 243}
245 244
246static void mt2060_calibrate(struct mt2060_priv *priv) 245static void mt2060_calibrate(struct mt2060_priv *priv)
diff --git a/drivers/media/tuners/mt2063.c b/drivers/media/tuners/mt2063.c
index f640dcf4a81d..9e9c5eb4cb66 100644
--- a/drivers/media/tuners/mt2063.c
+++ b/drivers/media/tuners/mt2063.c
@@ -1216,7 +1216,7 @@ static u32 MT2063_SetReceiverMode(struct mt2063_state *state,
1216 if (status >= 0) { 1216 if (status >= 0) {
1217 val = 1217 val =
1218 (state-> 1218 (state->
1219 reg[MT2063_REG_PD1_TGT] & (u8) ~0x40) | (RFAGCEN[Mode] 1219 reg[MT2063_REG_PD1_TGT] & ~0x40) | (RFAGCEN[Mode]
1220 ? 0x40 : 1220 ? 0x40 :
1221 0x00); 1221 0x00);
1222 if (state->reg[MT2063_REG_PD1_TGT] != val) 1222 if (state->reg[MT2063_REG_PD1_TGT] != val)
@@ -1225,7 +1225,7 @@ static u32 MT2063_SetReceiverMode(struct mt2063_state *state,
1225 1225
1226 /* LNARin */ 1226 /* LNARin */
1227 if (status >= 0) { 1227 if (status >= 0) {
1228 u8 val = (state->reg[MT2063_REG_CTRL_2C] & (u8) ~0x03) | 1228 u8 val = (state->reg[MT2063_REG_CTRL_2C] & ~0x03) |
1229 (LNARIN[Mode] & 0x03); 1229 (LNARIN[Mode] & 0x03);
1230 if (state->reg[MT2063_REG_CTRL_2C] != val) 1230 if (state->reg[MT2063_REG_CTRL_2C] != val)
1231 status |= mt2063_setreg(state, MT2063_REG_CTRL_2C, val); 1231 status |= mt2063_setreg(state, MT2063_REG_CTRL_2C, val);
@@ -1235,19 +1235,19 @@ static u32 MT2063_SetReceiverMode(struct mt2063_state *state,
1235 if (status >= 0) { 1235 if (status >= 0) {
1236 val = 1236 val =
1237 (state-> 1237 (state->
1238 reg[MT2063_REG_FIFF_CTRL2] & (u8) ~0xF0) | 1238 reg[MT2063_REG_FIFF_CTRL2] & ~0xF0) |
1239 (FIFFQEN[Mode] << 7) | (FIFFQ[Mode] << 4); 1239 (FIFFQEN[Mode] << 7) | (FIFFQ[Mode] << 4);
1240 if (state->reg[MT2063_REG_FIFF_CTRL2] != val) { 1240 if (state->reg[MT2063_REG_FIFF_CTRL2] != val) {
1241 status |= 1241 status |=
1242 mt2063_setreg(state, MT2063_REG_FIFF_CTRL2, val); 1242 mt2063_setreg(state, MT2063_REG_FIFF_CTRL2, val);
1243 /* trigger FIFF calibration, needed after changing FIFFQ */ 1243 /* trigger FIFF calibration, needed after changing FIFFQ */
1244 val = 1244 val =
1245 (state->reg[MT2063_REG_FIFF_CTRL] | (u8) 0x01); 1245 (state->reg[MT2063_REG_FIFF_CTRL] | 0x01);
1246 status |= 1246 status |=
1247 mt2063_setreg(state, MT2063_REG_FIFF_CTRL, val); 1247 mt2063_setreg(state, MT2063_REG_FIFF_CTRL, val);
1248 val = 1248 val =
1249 (state-> 1249 (state->
1250 reg[MT2063_REG_FIFF_CTRL] & (u8) ~0x01); 1250 reg[MT2063_REG_FIFF_CTRL] & ~0x01);
1251 status |= 1251 status |=
1252 mt2063_setreg(state, MT2063_REG_FIFF_CTRL, val); 1252 mt2063_setreg(state, MT2063_REG_FIFF_CTRL, val);
1253 } 1253 }
@@ -1259,7 +1259,7 @@ static u32 MT2063_SetReceiverMode(struct mt2063_state *state,
1259 1259
1260 /* acLNAmax */ 1260 /* acLNAmax */
1261 if (status >= 0) { 1261 if (status >= 0) {
1262 u8 val = (state->reg[MT2063_REG_LNA_OV] & (u8) ~0x1F) | 1262 u8 val = (state->reg[MT2063_REG_LNA_OV] & ~0x1F) |
1263 (ACLNAMAX[Mode] & 0x1F); 1263 (ACLNAMAX[Mode] & 0x1F);
1264 if (state->reg[MT2063_REG_LNA_OV] != val) 1264 if (state->reg[MT2063_REG_LNA_OV] != val)
1265 status |= mt2063_setreg(state, MT2063_REG_LNA_OV, val); 1265 status |= mt2063_setreg(state, MT2063_REG_LNA_OV, val);
@@ -1267,7 +1267,7 @@ static u32 MT2063_SetReceiverMode(struct mt2063_state *state,
1267 1267
1268 /* LNATGT */ 1268 /* LNATGT */
1269 if (status >= 0) { 1269 if (status >= 0) {
1270 u8 val = (state->reg[MT2063_REG_LNA_TGT] & (u8) ~0x3F) | 1270 u8 val = (state->reg[MT2063_REG_LNA_TGT] & ~0x3F) |
1271 (LNATGT[Mode] & 0x3F); 1271 (LNATGT[Mode] & 0x3F);
1272 if (state->reg[MT2063_REG_LNA_TGT] != val) 1272 if (state->reg[MT2063_REG_LNA_TGT] != val)
1273 status |= mt2063_setreg(state, MT2063_REG_LNA_TGT, val); 1273 status |= mt2063_setreg(state, MT2063_REG_LNA_TGT, val);
@@ -1275,7 +1275,7 @@ static u32 MT2063_SetReceiverMode(struct mt2063_state *state,
1275 1275
1276 /* ACRF */ 1276 /* ACRF */
1277 if (status >= 0) { 1277 if (status >= 0) {
1278 u8 val = (state->reg[MT2063_REG_RF_OV] & (u8) ~0x1F) | 1278 u8 val = (state->reg[MT2063_REG_RF_OV] & ~0x1F) |
1279 (ACRFMAX[Mode] & 0x1F); 1279 (ACRFMAX[Mode] & 0x1F);
1280 if (state->reg[MT2063_REG_RF_OV] != val) 1280 if (state->reg[MT2063_REG_RF_OV] != val)
1281 status |= mt2063_setreg(state, MT2063_REG_RF_OV, val); 1281 status |= mt2063_setreg(state, MT2063_REG_RF_OV, val);
@@ -1283,7 +1283,7 @@ static u32 MT2063_SetReceiverMode(struct mt2063_state *state,
1283 1283
1284 /* PD1TGT */ 1284 /* PD1TGT */
1285 if (status >= 0) { 1285 if (status >= 0) {
1286 u8 val = (state->reg[MT2063_REG_PD1_TGT] & (u8) ~0x3F) | 1286 u8 val = (state->reg[MT2063_REG_PD1_TGT] & ~0x3F) |
1287 (PD1TGT[Mode] & 0x3F); 1287 (PD1TGT[Mode] & 0x3F);
1288 if (state->reg[MT2063_REG_PD1_TGT] != val) 1288 if (state->reg[MT2063_REG_PD1_TGT] != val)
1289 status |= mt2063_setreg(state, MT2063_REG_PD1_TGT, val); 1289 status |= mt2063_setreg(state, MT2063_REG_PD1_TGT, val);
@@ -1294,7 +1294,7 @@ static u32 MT2063_SetReceiverMode(struct mt2063_state *state,
1294 u8 val = ACFIFMAX[Mode]; 1294 u8 val = ACFIFMAX[Mode];
1295 if (state->reg[MT2063_REG_PART_REV] != MT2063_B3 && val > 5) 1295 if (state->reg[MT2063_REG_PART_REV] != MT2063_B3 && val > 5)
1296 val = 5; 1296 val = 5;
1297 val = (state->reg[MT2063_REG_FIF_OV] & (u8) ~0x1F) | 1297 val = (state->reg[MT2063_REG_FIF_OV] & ~0x1F) |
1298 (val & 0x1F); 1298 (val & 0x1F);
1299 if (state->reg[MT2063_REG_FIF_OV] != val) 1299 if (state->reg[MT2063_REG_FIF_OV] != val)
1300 status |= mt2063_setreg(state, MT2063_REG_FIF_OV, val); 1300 status |= mt2063_setreg(state, MT2063_REG_FIF_OV, val);
@@ -1302,7 +1302,7 @@ static u32 MT2063_SetReceiverMode(struct mt2063_state *state,
1302 1302
1303 /* PD2TGT */ 1303 /* PD2TGT */
1304 if (status >= 0) { 1304 if (status >= 0) {
1305 u8 val = (state->reg[MT2063_REG_PD2_TGT] & (u8) ~0x3F) | 1305 u8 val = (state->reg[MT2063_REG_PD2_TGT] & ~0x3F) |
1306 (PD2TGT[Mode] & 0x3F); 1306 (PD2TGT[Mode] & 0x3F);
1307 if (state->reg[MT2063_REG_PD2_TGT] != val) 1307 if (state->reg[MT2063_REG_PD2_TGT] != val)
1308 status |= mt2063_setreg(state, MT2063_REG_PD2_TGT, val); 1308 status |= mt2063_setreg(state, MT2063_REG_PD2_TGT, val);
@@ -1310,7 +1310,7 @@ static u32 MT2063_SetReceiverMode(struct mt2063_state *state,
1310 1310
1311 /* Ignore ATN Overload */ 1311 /* Ignore ATN Overload */
1312 if (status >= 0) { 1312 if (status >= 0) {
1313 val = (state->reg[MT2063_REG_LNA_TGT] & (u8) ~0x80) | 1313 val = (state->reg[MT2063_REG_LNA_TGT] & ~0x80) |
1314 (RFOVDIS[Mode] ? 0x80 : 0x00); 1314 (RFOVDIS[Mode] ? 0x80 : 0x00);
1315 if (state->reg[MT2063_REG_LNA_TGT] != val) 1315 if (state->reg[MT2063_REG_LNA_TGT] != val)
1316 status |= mt2063_setreg(state, MT2063_REG_LNA_TGT, val); 1316 status |= mt2063_setreg(state, MT2063_REG_LNA_TGT, val);
@@ -1318,7 +1318,7 @@ static u32 MT2063_SetReceiverMode(struct mt2063_state *state,
1318 1318
1319 /* Ignore FIF Overload */ 1319 /* Ignore FIF Overload */
1320 if (status >= 0) { 1320 if (status >= 0) {
1321 val = (state->reg[MT2063_REG_PD1_TGT] & (u8) ~0x80) | 1321 val = (state->reg[MT2063_REG_PD1_TGT] & ~0x80) |
1322 (FIFOVDIS[Mode] ? 0x80 : 0x00); 1322 (FIFOVDIS[Mode] ? 0x80 : 0x00);
1323 if (state->reg[MT2063_REG_PD1_TGT] != val) 1323 if (state->reg[MT2063_REG_PD1_TGT] != val)
1324 status |= mt2063_setreg(state, MT2063_REG_PD1_TGT, val); 1324 status |= mt2063_setreg(state, MT2063_REG_PD1_TGT, val);
diff --git a/drivers/media/tuners/mxl301rf.c b/drivers/media/tuners/mxl301rf.c
new file mode 100644
index 000000000000..1575a5db776a
--- /dev/null
+++ b/drivers/media/tuners/mxl301rf.c
@@ -0,0 +1,349 @@
1/*
2 * MaxLinear MxL301RF OFDM tuner driver
3 *
4 * Copyright (C) 2014 Akihiro Tsukada <tskd08@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17/*
18 * NOTICE:
19 * This driver is incomplete and lacks init/config of the chips,
20 * as the necessary info is not disclosed.
21 * Other features like get_if_frequency() are missing as well.
22 * It assumes that users of this driver (such as a PCI bridge of
23 * DTV receiver cards) properly init and configure the chip
24 * via I2C *before* calling this driver's init() function.
25 *
26 * Currently, PT3 driver is the only one that uses this driver,
27 * and contains init/config code in its firmware.
28 * Thus some part of the code might be dependent on PT3 specific config.
29 */
30
31#include <linux/kernel.h>
32#include "mxl301rf.h"
33
34struct mxl301rf_state {
35 struct mxl301rf_config cfg;
36 struct i2c_client *i2c;
37};
38
39static struct mxl301rf_state *cfg_to_state(struct mxl301rf_config *c)
40{
41 return container_of(c, struct mxl301rf_state, cfg);
42}
43
44static int raw_write(struct mxl301rf_state *state, const u8 *buf, int len)
45{
46 int ret;
47
48 ret = i2c_master_send(state->i2c, buf, len);
49 if (ret >= 0 && ret < len)
50 ret = -EIO;
51 return (ret == len) ? 0 : ret;
52}
53
54static int reg_write(struct mxl301rf_state *state, u8 reg, u8 val)
55{
56 u8 buf[2] = { reg, val };
57
58 return raw_write(state, buf, 2);
59}
60
61static int reg_read(struct mxl301rf_state *state, u8 reg, u8 *val)
62{
63 u8 wbuf[2] = { 0xfb, reg };
64 int ret;
65
66 ret = raw_write(state, wbuf, sizeof(wbuf));
67 if (ret == 0)
68 ret = i2c_master_recv(state->i2c, val, 1);
69 if (ret >= 0 && ret < 1)
70 ret = -EIO;
71 return (ret == 1) ? 0 : ret;
72}
73
74/* tuner_ops */
75
76/* get RSSI and update propery cache, set to *out in % */
77static int mxl301rf_get_rf_strength(struct dvb_frontend *fe, u16 *out)
78{
79 struct mxl301rf_state *state;
80 int ret;
81 u8 rf_in1, rf_in2, rf_off1, rf_off2;
82 u16 rf_in, rf_off;
83 s64 level;
84 struct dtv_fe_stats *rssi;
85
86 rssi = &fe->dtv_property_cache.strength;
87 rssi->len = 1;
88 rssi->stat[0].scale = FE_SCALE_NOT_AVAILABLE;
89 *out = 0;
90
91 state = fe->tuner_priv;
92 ret = reg_write(state, 0x14, 0x01);
93 if (ret < 0)
94 return ret;
95 usleep_range(1000, 2000);
96
97 ret = reg_read(state, 0x18, &rf_in1);
98 if (ret == 0)
99 ret = reg_read(state, 0x19, &rf_in2);
100 if (ret == 0)
101 ret = reg_read(state, 0xd6, &rf_off1);
102 if (ret == 0)
103 ret = reg_read(state, 0xd7, &rf_off2);
104 if (ret != 0)
105 return ret;
106
107 rf_in = (rf_in2 & 0x07) << 8 | rf_in1;
108 rf_off = (rf_off2 & 0x0f) << 5 | (rf_off1 >> 3);
109 level = rf_in - rf_off - (113 << 3); /* x8 dBm */
110 level = level * 1000 / 8;
111 rssi->stat[0].svalue = level;
112 rssi->stat[0].scale = FE_SCALE_DECIBEL;
113 /* *out = (level - min) * 100 / (max - min) */
114 *out = (rf_in - rf_off + (1 << 9) - 1) * 100 / ((5 << 9) - 2);
115 return 0;
116}
117
118/* spur shift parameters */
119struct shf {
120 u32 freq; /* Channel center frequency */
121 u32 ofst_th; /* Offset frequency threshold */
122 u8 shf_val; /* Spur shift value */
123 u8 shf_dir; /* Spur shift direction */
124};
125
126static const struct shf shf_tab[] = {
127 { 64500, 500, 0x92, 0x07 },
128 { 191500, 300, 0xe2, 0x07 },
129 { 205500, 500, 0x2c, 0x04 },
130 { 212500, 500, 0x1e, 0x04 },
131 { 226500, 500, 0xd4, 0x07 },
132 { 99143, 500, 0x9c, 0x07 },
133 { 173143, 500, 0xd4, 0x07 },
134 { 191143, 300, 0xd4, 0x07 },
135 { 207143, 500, 0xce, 0x07 },
136 { 225143, 500, 0xce, 0x07 },
137 { 243143, 500, 0xd4, 0x07 },
138 { 261143, 500, 0xd4, 0x07 },
139 { 291143, 500, 0xd4, 0x07 },
140 { 339143, 500, 0x2c, 0x04 },
141 { 117143, 500, 0x7a, 0x07 },
142 { 135143, 300, 0x7a, 0x07 },
143 { 153143, 500, 0x01, 0x07 }
144};
145
146struct reg_val {
147 u8 reg;
148 u8 val;
149} __attribute__ ((__packed__));
150
151static const struct reg_val set_idac[] = {
152 { 0x0d, 0x00 },
153 { 0x0c, 0x67 },
154 { 0x6f, 0x89 },
155 { 0x70, 0x0c },
156 { 0x6f, 0x8a },
157 { 0x70, 0x0e },
158 { 0x6f, 0x8b },
159 { 0x70, 0x1c },
160};
161
162static int mxl301rf_set_params(struct dvb_frontend *fe)
163{
164 struct reg_val tune0[] = {
165 { 0x13, 0x00 }, /* abort tuning */
166 { 0x3b, 0xc0 },
167 { 0x3b, 0x80 },
168 { 0x10, 0x95 }, /* BW */
169 { 0x1a, 0x05 },
170 { 0x61, 0x00 }, /* spur shift value (placeholder) */
171 { 0x62, 0xa0 } /* spur shift direction (placeholder) */
172 };
173
174 struct reg_val tune1[] = {
175 { 0x11, 0x40 }, /* RF frequency L (placeholder) */
176 { 0x12, 0x0e }, /* RF frequency H (placeholder) */
177 { 0x13, 0x01 } /* start tune */
178 };
179
180 struct mxl301rf_state *state;
181 u32 freq;
182 u16 f;
183 u32 tmp, div;
184 int i, ret;
185
186 state = fe->tuner_priv;
187 freq = fe->dtv_property_cache.frequency;
188
189 /* spur shift function (for analog) */
190 for (i = 0; i < ARRAY_SIZE(shf_tab); i++) {
191 if (freq >= (shf_tab[i].freq - shf_tab[i].ofst_th) * 1000 &&
192 freq <= (shf_tab[i].freq + shf_tab[i].ofst_th) * 1000) {
193 tune0[5].val = shf_tab[i].shf_val;
194 tune0[6].val = 0xa0 | shf_tab[i].shf_dir;
195 break;
196 }
197 }
198 ret = raw_write(state, (u8 *) tune0, sizeof(tune0));
199 if (ret < 0)
200 goto failed;
201 usleep_range(3000, 4000);
202
203 /* convert freq to 10.6 fixed point float [MHz] */
204 f = freq / 1000000;
205 tmp = freq % 1000000;
206 div = 1000000;
207 for (i = 0; i < 6; i++) {
208 f <<= 1;
209 div >>= 1;
210 if (tmp > div) {
211 tmp -= div;
212 f |= 1;
213 }
214 }
215 if (tmp > 7812)
216 f++;
217 tune1[0].val = f & 0xff;
218 tune1[1].val = f >> 8;
219 ret = raw_write(state, (u8 *) tune1, sizeof(tune1));
220 if (ret < 0)
221 goto failed;
222 msleep(31);
223
224 ret = reg_write(state, 0x1a, 0x0d);
225 if (ret < 0)
226 goto failed;
227 ret = raw_write(state, (u8 *) set_idac, sizeof(set_idac));
228 if (ret < 0)
229 goto failed;
230 return 0;
231
232failed:
233 dev_warn(&state->i2c->dev, "(%s) failed. [adap%d-fe%d]\n",
234 __func__, fe->dvb->num, fe->id);
235 return ret;
236}
237
238static const struct reg_val standby_data[] = {
239 { 0x01, 0x00 },
240 { 0x13, 0x00 }
241};
242
243static int mxl301rf_sleep(struct dvb_frontend *fe)
244{
245 struct mxl301rf_state *state;
246 int ret;
247
248 state = fe->tuner_priv;
249 ret = raw_write(state, (u8 *)standby_data, sizeof(standby_data));
250 if (ret < 0)
251 dev_warn(&state->i2c->dev, "(%s) failed. [adap%d-fe%d]\n",
252 __func__, fe->dvb->num, fe->id);
253 return ret;
254}
255
256
257/* init sequence is not public.
258 * the parent must have init'ed the device.
259 * just wake up here.
260 */
261static int mxl301rf_init(struct dvb_frontend *fe)
262{
263 struct mxl301rf_state *state;
264 int ret;
265
266 state = fe->tuner_priv;
267
268 ret = reg_write(state, 0x01, 0x01);
269 if (ret < 0) {
270 dev_warn(&state->i2c->dev, "(%s) failed. [adap%d-fe%d]\n",
271 __func__, fe->dvb->num, fe->id);
272 return ret;
273 }
274 return 0;
275}
276
277/* I2C driver functions */
278
279static const struct dvb_tuner_ops mxl301rf_ops = {
280 .info = {
281 .name = "MaxLinear MxL301RF",
282
283 .frequency_min = 93000000,
284 .frequency_max = 803142857,
285 },
286
287 .init = mxl301rf_init,
288 .sleep = mxl301rf_sleep,
289
290 .set_params = mxl301rf_set_params,
291 .get_rf_strength = mxl301rf_get_rf_strength,
292};
293
294
295static int mxl301rf_probe(struct i2c_client *client,
296 const struct i2c_device_id *id)
297{
298 struct mxl301rf_state *state;
299 struct mxl301rf_config *cfg;
300 struct dvb_frontend *fe;
301
302 state = kzalloc(sizeof(*state), GFP_KERNEL);
303 if (!state)
304 return -ENOMEM;
305
306 state->i2c = client;
307 cfg = client->dev.platform_data;
308
309 memcpy(&state->cfg, cfg, sizeof(state->cfg));
310 fe = cfg->fe;
311 fe->tuner_priv = state;
312 memcpy(&fe->ops.tuner_ops, &mxl301rf_ops, sizeof(mxl301rf_ops));
313
314 i2c_set_clientdata(client, &state->cfg);
315 dev_info(&client->dev, "MaxLinear MxL301RF attached.\n");
316 return 0;
317}
318
319static int mxl301rf_remove(struct i2c_client *client)
320{
321 struct mxl301rf_state *state;
322
323 state = cfg_to_state(i2c_get_clientdata(client));
324 state->cfg.fe->tuner_priv = NULL;
325 kfree(state);
326 return 0;
327}
328
329
330static const struct i2c_device_id mxl301rf_id[] = {
331 {"mxl301rf", 0},
332 {}
333};
334MODULE_DEVICE_TABLE(i2c, mxl301rf_id);
335
336static struct i2c_driver mxl301rf_driver = {
337 .driver = {
338 .name = "mxl301rf",
339 },
340 .probe = mxl301rf_probe,
341 .remove = mxl301rf_remove,
342 .id_table = mxl301rf_id,
343};
344
345module_i2c_driver(mxl301rf_driver);
346
347MODULE_DESCRIPTION("MaxLinear MXL301RF tuner");
348MODULE_AUTHOR("Akihiro TSUKADA");
349MODULE_LICENSE("GPL");
diff --git a/drivers/media/tuners/mxl301rf.h b/drivers/media/tuners/mxl301rf.h
new file mode 100644
index 000000000000..19e68405f00d
--- /dev/null
+++ b/drivers/media/tuners/mxl301rf.h
@@ -0,0 +1,26 @@
1/*
2 * MaxLinear MxL301RF OFDM tuner driver
3 *
4 * Copyright (C) 2014 Akihiro Tsukada <tskd08@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#ifndef MXL301RF_H
18#define MXL301RF_H
19
20#include "dvb_frontend.h"
21
22struct mxl301rf_config {
23 struct dvb_frontend *fe;
24};
25
26#endif /* MXL301RF_H */
diff --git a/drivers/media/tuners/mxl5005s.c b/drivers/media/tuners/mxl5005s.c
index b473b76cb278..92a3be4fde87 100644
--- a/drivers/media/tuners/mxl5005s.c
+++ b/drivers/media/tuners/mxl5005s.c
@@ -1692,7 +1692,6 @@ static u16 MXL5005_TunerConfig(struct dvb_frontend *fe,
1692 ) 1692 )
1693{ 1693{
1694 struct mxl5005s_state *state = fe->tuner_priv; 1694 struct mxl5005s_state *state = fe->tuner_priv;
1695 u16 status = 0;
1696 1695
1697 state->Mode = Mode; 1696 state->Mode = Mode;
1698 state->IF_Mode = IF_mode; 1697 state->IF_Mode = IF_mode;
@@ -1715,7 +1714,7 @@ static u16 MXL5005_TunerConfig(struct dvb_frontend *fe,
1715 /* Synthesizer LO frequency calculation */ 1714 /* Synthesizer LO frequency calculation */
1716 MXL_SynthIFLO_Calc(fe); 1715 MXL_SynthIFLO_Calc(fe);
1717 1716
1718 return status; 1717 return 0;
1719} 1718}
1720 1719
1721static void MXL_SynthIFLO_Calc(struct dvb_frontend *fe) 1720static void MXL_SynthIFLO_Calc(struct dvb_frontend *fe)
diff --git a/drivers/media/tuners/qm1d1c0042.c b/drivers/media/tuners/qm1d1c0042.c
new file mode 100644
index 000000000000..18bc745ed108
--- /dev/null
+++ b/drivers/media/tuners/qm1d1c0042.c
@@ -0,0 +1,448 @@
1/*
2 * Sharp QM1D1C0042 8PSK tuner driver
3 *
4 * Copyright (C) 2014 Akihiro Tsukada <tskd08@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17/*
18 * NOTICE:
19 * As the disclosed information on the chip is very limited,
20 * this driver lacks some features, including chip config like IF freq.
21 * It assumes that users of this driver (such as a PCI bridge of
22 * DTV receiver cards) know the relevant info and
23 * configure the chip via I2C if necessary.
24 *
25 * Currently, PT3 driver is the only one that uses this driver,
26 * and contains init/config code in its firmware.
27 * Thus some part of the code might be dependent on PT3 specific config.
28 */
29
30#include <linux/kernel.h>
31#include <linux/math64.h>
32#include "qm1d1c0042.h"
33
34#define QM1D1C0042_NUM_REGS 0x20
35
36static const u8 reg_initval[QM1D1C0042_NUM_REGS] = {
37 0x48, 0x1c, 0xa0, 0x10, 0xbc, 0xc5, 0x20, 0x33,
38 0x06, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
39 0x00, 0xff, 0xf3, 0x00, 0x2a, 0x64, 0xa6, 0x86,
40 0x8c, 0xcf, 0xb8, 0xf1, 0xa8, 0xf2, 0x89, 0x00
41};
42
43static const struct qm1d1c0042_config default_cfg = {
44 .xtal_freq = 16000,
45 .lpf = 1,
46 .fast_srch = 0,
47 .lpf_wait = 20,
48 .fast_srch_wait = 4,
49 .normal_srch_wait = 15,
50};
51
52struct qm1d1c0042_state {
53 struct qm1d1c0042_config cfg;
54 struct i2c_client *i2c;
55 u8 regs[QM1D1C0042_NUM_REGS];
56};
57
58static struct qm1d1c0042_state *cfg_to_state(struct qm1d1c0042_config *c)
59{
60 return container_of(c, struct qm1d1c0042_state, cfg);
61}
62
63static int reg_write(struct qm1d1c0042_state *state, u8 reg, u8 val)
64{
65 u8 wbuf[2] = { reg, val };
66 int ret;
67
68 ret = i2c_master_send(state->i2c, wbuf, sizeof(wbuf));
69 if (ret >= 0 && ret < sizeof(wbuf))
70 ret = -EIO;
71 return (ret == sizeof(wbuf)) ? 0 : ret;
72}
73
74static int reg_read(struct qm1d1c0042_state *state, u8 reg, u8 *val)
75{
76 struct i2c_msg msgs[2] = {
77 {
78 .addr = state->i2c->addr,
79 .flags = 0,
80 .buf = &reg,
81 .len = 1,
82 },
83 {
84 .addr = state->i2c->addr,
85 .flags = I2C_M_RD,
86 .buf = val,
87 .len = 1,
88 },
89 };
90 int ret;
91
92 ret = i2c_transfer(state->i2c->adapter, msgs, ARRAY_SIZE(msgs));
93 if (ret >= 0 && ret < ARRAY_SIZE(msgs))
94 ret = -EIO;
95 return (ret == ARRAY_SIZE(msgs)) ? 0 : ret;
96}
97
98
99static int qm1d1c0042_set_srch_mode(struct qm1d1c0042_state *state, bool fast)
100{
101 if (fast)
102 state->regs[0x03] |= 0x01; /* set fast search mode */
103 else
104 state->regs[0x03] &= ~0x01 & 0xff;
105
106 return reg_write(state, 0x03, state->regs[0x03]);
107}
108
109static int qm1d1c0042_wakeup(struct qm1d1c0042_state *state)
110{
111 int ret;
112
113 state->regs[0x01] |= 1 << 3; /* BB_Reg_enable */
114 state->regs[0x01] &= (~(1 << 0)) & 0xff; /* NORMAL (wake-up) */
115 state->regs[0x05] &= (~(1 << 3)) & 0xff; /* pfd_rst NORMAL */
116 ret = reg_write(state, 0x01, state->regs[0x01]);
117 if (ret == 0)
118 ret = reg_write(state, 0x05, state->regs[0x05]);
119
120 if (ret < 0)
121 dev_warn(&state->i2c->dev, "(%s) failed. [adap%d-fe%d]\n",
122 __func__, state->cfg.fe->dvb->num, state->cfg.fe->id);
123 return ret;
124}
125
126/* tuner_ops */
127
128static int qm1d1c0042_set_config(struct dvb_frontend *fe, void *priv_cfg)
129{
130 struct qm1d1c0042_state *state;
131 struct qm1d1c0042_config *cfg;
132
133 state = fe->tuner_priv;
134 cfg = priv_cfg;
135
136 if (cfg->fe)
137 state->cfg.fe = cfg->fe;
138
139 if (cfg->xtal_freq != QM1D1C0042_CFG_XTAL_DFLT)
140 dev_warn(&state->i2c->dev,
141 "(%s) changing xtal_freq not supported. ", __func__);
142 state->cfg.xtal_freq = default_cfg.xtal_freq;
143
144 state->cfg.lpf = cfg->lpf;
145 state->cfg.fast_srch = cfg->fast_srch;
146
147 if (cfg->lpf_wait != QM1D1C0042_CFG_WAIT_DFLT)
148 state->cfg.lpf_wait = cfg->lpf_wait;
149 else
150 state->cfg.lpf_wait = default_cfg.lpf_wait;
151
152 if (cfg->fast_srch_wait != QM1D1C0042_CFG_WAIT_DFLT)
153 state->cfg.fast_srch_wait = cfg->fast_srch_wait;
154 else
155 state->cfg.fast_srch_wait = default_cfg.fast_srch_wait;
156
157 if (cfg->normal_srch_wait != QM1D1C0042_CFG_WAIT_DFLT)
158 state->cfg.normal_srch_wait = cfg->normal_srch_wait;
159 else
160 state->cfg.normal_srch_wait = default_cfg.normal_srch_wait;
161 return 0;
162}
163
164/* divisor, vco_band parameters */
165/* {maxfreq, param1(band?), param2(div?) */
166static const u32 conv_table[9][3] = {
167 { 2151000, 1, 7 },
168 { 1950000, 1, 6 },
169 { 1800000, 1, 5 },
170 { 1600000, 1, 4 },
171 { 1450000, 1, 3 },
172 { 1250000, 1, 2 },
173 { 1200000, 0, 7 },
174 { 975000, 0, 6 },
175 { 950000, 0, 0 }
176};
177
178static int qm1d1c0042_set_params(struct dvb_frontend *fe)
179{
180 struct qm1d1c0042_state *state;
181 u32 freq;
182 int i, ret;
183 u8 val, mask;
184 u32 a, sd;
185 s32 b;
186
187 state = fe->tuner_priv;
188 freq = fe->dtv_property_cache.frequency;
189
190 state->regs[0x08] &= 0xf0;
191 state->regs[0x08] |= 0x09;
192
193 state->regs[0x13] &= 0x9f;
194 state->regs[0x13] |= 0x20;
195
196 /* div2/vco_band */
197 val = state->regs[0x02] & 0x0f;
198 for (i = 0; i < 8; i++)
199 if (freq < conv_table[i][0] && freq >= conv_table[i + 1][0]) {
200 val |= conv_table[i][1] << 7;
201 val |= conv_table[i][2] << 4;
202 break;
203 }
204 ret = reg_write(state, 0x02, val);
205 if (ret < 0)
206 return ret;
207
208 a = (freq + state->cfg.xtal_freq / 2) / state->cfg.xtal_freq;
209
210 state->regs[0x06] &= 0x40;
211 state->regs[0x06] |= (a - 12) / 4;
212 ret = reg_write(state, 0x06, state->regs[0x06]);
213 if (ret < 0)
214 return ret;
215
216 state->regs[0x07] &= 0xf0;
217 state->regs[0x07] |= (a - 4 * ((a - 12) / 4 + 1) - 5) & 0x0f;
218 ret = reg_write(state, 0x07, state->regs[0x07]);
219 if (ret < 0)
220 return ret;
221
222 /* LPF */
223 val = state->regs[0x08];
224 if (state->cfg.lpf) {
225 /* LPF_CLK, LPF_FC */
226 val &= 0xf0;
227 val |= 0x02;
228 }
229 ret = reg_write(state, 0x08, val);
230 if (ret < 0)
231 return ret;
232
233 /*
234 * b = (freq / state->cfg.xtal_freq - a) << 20;
235 * sd = b (b >= 0)
236 * 1<<22 + b (b < 0)
237 */
238 b = (s32)div64_s64(((s64) freq) << 20, state->cfg.xtal_freq)
239 - (((s64) a) << 20);
240
241 if (b >= 0)
242 sd = b;
243 else
244 sd = (1 << 22) + b;
245
246 state->regs[0x09] &= 0xc0;
247 state->regs[0x09] |= (sd >> 16) & 0x3f;
248 state->regs[0x0a] = (sd >> 8) & 0xff;
249 state->regs[0x0b] = sd & 0xff;
250 ret = reg_write(state, 0x09, state->regs[0x09]);
251 if (ret == 0)
252 ret = reg_write(state, 0x0a, state->regs[0x0a]);
253 if (ret == 0)
254 ret = reg_write(state, 0x0b, state->regs[0x0b]);
255 if (ret != 0)
256 return ret;
257
258 if (!state->cfg.lpf) {
259 /* CSEL_Offset */
260 ret = reg_write(state, 0x13, state->regs[0x13]);
261 if (ret < 0)
262 return ret;
263 }
264
265 /* VCO_TM, LPF_TM */
266 mask = state->cfg.lpf ? 0x3f : 0x7f;
267 val = state->regs[0x0c] & mask;
268 ret = reg_write(state, 0x0c, val);
269 if (ret < 0)
270 return ret;
271 usleep_range(2000, 3000);
272 val = state->regs[0x0c] | ~mask;
273 ret = reg_write(state, 0x0c, val);
274 if (ret < 0)
275 return ret;
276
277 if (state->cfg.lpf)
278 msleep(state->cfg.lpf_wait);
279 else if (state->regs[0x03] & 0x01)
280 msleep(state->cfg.fast_srch_wait);
281 else
282 msleep(state->cfg.normal_srch_wait);
283
284 if (state->cfg.lpf) {
285 /* LPF_FC */
286 ret = reg_write(state, 0x08, 0x09);
287 if (ret < 0)
288 return ret;
289
290 /* CSEL_Offset */
291 ret = reg_write(state, 0x13, state->regs[0x13]);
292 if (ret < 0)
293 return ret;
294 }
295 return 0;
296}
297
298static int qm1d1c0042_sleep(struct dvb_frontend *fe)
299{
300 struct qm1d1c0042_state *state;
301 int ret;
302
303 state = fe->tuner_priv;
304 state->regs[0x01] &= (~(1 << 3)) & 0xff; /* BB_Reg_disable */
305 state->regs[0x01] |= 1 << 0; /* STDBY */
306 state->regs[0x05] |= 1 << 3; /* pfd_rst STANDBY */
307 ret = reg_write(state, 0x05, state->regs[0x05]);
308 if (ret == 0)
309 ret = reg_write(state, 0x01, state->regs[0x01]);
310 if (ret < 0)
311 dev_warn(&state->i2c->dev, "(%s) failed. [adap%d-fe%d]\n",
312 __func__, fe->dvb->num, fe->id);
313 return ret;
314}
315
316static int qm1d1c0042_init(struct dvb_frontend *fe)
317{
318 struct qm1d1c0042_state *state;
319 u8 val;
320 int i, ret;
321
322 state = fe->tuner_priv;
323 memcpy(state->regs, reg_initval, sizeof(reg_initval));
324
325 reg_write(state, 0x01, 0x0c);
326 reg_write(state, 0x01, 0x0c);
327
328 ret = reg_write(state, 0x01, 0x0c); /* soft reset on */
329 if (ret < 0)
330 goto failed;
331 usleep_range(2000, 3000);
332
333 val = state->regs[0x01] | 0x10;
334 ret = reg_write(state, 0x01, val); /* soft reset off */
335 if (ret < 0)
336 goto failed;
337
338 /* check ID */
339 ret = reg_read(state, 0x00, &val);
340 if (ret < 0 || val != 0x48)
341 goto failed;
342 usleep_range(2000, 3000);
343
344 state->regs[0x0c] |= 0x40;
345 ret = reg_write(state, 0x0c, state->regs[0x0c]);
346 if (ret < 0)
347 goto failed;
348 msleep(state->cfg.lpf_wait);
349
350 /* set all writable registers */
351 for (i = 1; i <= 0x0c ; i++) {
352 ret = reg_write(state, i, state->regs[i]);
353 if (ret < 0)
354 goto failed;
355 }
356 for (i = 0x11; i < QM1D1C0042_NUM_REGS; i++) {
357 ret = reg_write(state, i, state->regs[i]);
358 if (ret < 0)
359 goto failed;
360 }
361
362 ret = qm1d1c0042_wakeup(state);
363 if (ret < 0)
364 goto failed;
365
366 ret = qm1d1c0042_set_srch_mode(state, state->cfg.fast_srch);
367 if (ret < 0)
368 goto failed;
369
370 return ret;
371
372failed:
373 dev_warn(&state->i2c->dev, "(%s) failed. [adap%d-fe%d]\n",
374 __func__, fe->dvb->num, fe->id);
375 return ret;
376}
377
378/* I2C driver functions */
379
380static const struct dvb_tuner_ops qm1d1c0042_ops = {
381 .info = {
382 .name = "Sharp QM1D1C0042",
383
384 .frequency_min = 950000,
385 .frequency_max = 2150000,
386 },
387
388 .init = qm1d1c0042_init,
389 .sleep = qm1d1c0042_sleep,
390 .set_config = qm1d1c0042_set_config,
391 .set_params = qm1d1c0042_set_params,
392};
393
394
395static int qm1d1c0042_probe(struct i2c_client *client,
396 const struct i2c_device_id *id)
397{
398 struct qm1d1c0042_state *state;
399 struct qm1d1c0042_config *cfg;
400 struct dvb_frontend *fe;
401
402 state = kzalloc(sizeof(*state), GFP_KERNEL);
403 if (!state)
404 return -ENOMEM;
405 state->i2c = client;
406
407 cfg = client->dev.platform_data;
408 fe = cfg->fe;
409 fe->tuner_priv = state;
410 qm1d1c0042_set_config(fe, cfg);
411 memcpy(&fe->ops.tuner_ops, &qm1d1c0042_ops, sizeof(qm1d1c0042_ops));
412
413 i2c_set_clientdata(client, &state->cfg);
414 dev_info(&client->dev, "Sharp QM1D1C0042 attached.\n");
415 return 0;
416}
417
418static int qm1d1c0042_remove(struct i2c_client *client)
419{
420 struct qm1d1c0042_state *state;
421
422 state = cfg_to_state(i2c_get_clientdata(client));
423 state->cfg.fe->tuner_priv = NULL;
424 kfree(state);
425 return 0;
426}
427
428
429static const struct i2c_device_id qm1d1c0042_id[] = {
430 {"qm1d1c0042", 0},
431 {}
432};
433MODULE_DEVICE_TABLE(i2c, qm1d1c0042_id);
434
435static struct i2c_driver qm1d1c0042_driver = {
436 .driver = {
437 .name = "qm1d1c0042",
438 },
439 .probe = qm1d1c0042_probe,
440 .remove = qm1d1c0042_remove,
441 .id_table = qm1d1c0042_id,
442};
443
444module_i2c_driver(qm1d1c0042_driver);
445
446MODULE_DESCRIPTION("Sharp QM1D1C0042 tuner");
447MODULE_AUTHOR("Akihiro TSUKADA");
448MODULE_LICENSE("GPL");
diff --git a/drivers/media/tuners/qm1d1c0042.h b/drivers/media/tuners/qm1d1c0042.h
new file mode 100644
index 000000000000..4f5c18816c44
--- /dev/null
+++ b/drivers/media/tuners/qm1d1c0042.h
@@ -0,0 +1,37 @@
1/*
2 * Sharp QM1D1C0042 8PSK tuner driver
3 *
4 * Copyright (C) 2014 Akihiro Tsukada <tskd08@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#ifndef QM1D1C0042_H
18#define QM1D1C0042_H
19
20#include "dvb_frontend.h"
21
22
23struct qm1d1c0042_config {
24 struct dvb_frontend *fe;
25
26 u32 xtal_freq; /* [kHz] */ /* currently ignored */
27 bool lpf; /* enable LPF */
28 bool fast_srch; /* enable fast search mode, no LPF */
29 u32 lpf_wait; /* wait in tuning with LPF enabled. [ms] */
30 u32 fast_srch_wait; /* with fast-search mode, no LPF. [ms] */
31 u32 normal_srch_wait; /* with no LPF/fast-search mode. [ms] */
32};
33/* special values indicating to use the default in qm1d1c0042_config */
34#define QM1D1C0042_CFG_XTAL_DFLT 0
35#define QM1D1C0042_CFG_WAIT_DFLT 0
36
37#endif /* QM1D1C0042_H */
diff --git a/drivers/media/tuners/si2157.c b/drivers/media/tuners/si2157.c
index 6c53edb73a63..cf97142e01e6 100644
--- a/drivers/media/tuners/si2157.c
+++ b/drivers/media/tuners/si2157.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Silicon Labs Si2157/2158 silicon tuner driver 2 * Silicon Labs Si2147/2157/2158 silicon tuner driver
3 * 3 *
4 * Copyright (C) 2014 Antti Palosaari <crope@iki.fi> 4 * Copyright (C) 2014 Antti Palosaari <crope@iki.fi>
5 * 5 *
@@ -55,8 +55,7 @@ static int si2157_cmd_execute(struct si2157 *s, struct si2157_cmd *cmd)
55 break; 55 break;
56 } 56 }
57 57
58 dev_dbg(&s->client->dev, "%s: cmd execution took %d ms\n", 58 dev_dbg(&s->client->dev, "cmd execution took %d ms\n",
59 __func__,
60 jiffies_to_msecs(jiffies) - 59 jiffies_to_msecs(jiffies) -
61 (jiffies_to_msecs(timeout) - TIMEOUT)); 60 (jiffies_to_msecs(timeout) - TIMEOUT));
62 61
@@ -75,7 +74,7 @@ err_mutex_unlock:
75 74
76 return 0; 75 return 0;
77err: 76err:
78 dev_dbg(&s->client->dev, "%s: failed=%d\n", __func__, ret); 77 dev_dbg(&s->client->dev, "failed=%d\n", ret);
79 return ret; 78 return ret;
80} 79}
81 80
@@ -88,9 +87,12 @@ static int si2157_init(struct dvb_frontend *fe)
88 u8 *fw_file; 87 u8 *fw_file;
89 unsigned int chip_id; 88 unsigned int chip_id;
90 89
91 dev_dbg(&s->client->dev, "%s:\n", __func__); 90 dev_dbg(&s->client->dev, "\n");
92 91
93 /* configure? */ 92 if (s->fw_loaded)
93 goto warm;
94
95 /* power up */
94 memcpy(cmd.args, "\xc0\x00\x0c\x00\x00\x01\x01\x01\x01\x01\x01\x02\x00\x00\x01", 15); 96 memcpy(cmd.args, "\xc0\x00\x0c\x00\x00\x01\x01\x01\x01\x01\x01\x02\x00\x00\x01", 15);
95 cmd.wlen = 15; 97 cmd.wlen = 15;
96 cmd.rlen = 1; 98 cmd.rlen = 1;
@@ -111,45 +113,47 @@ static int si2157_init(struct dvb_frontend *fe)
111 113
112 #define SI2158_A20 ('A' << 24 | 58 << 16 | '2' << 8 | '0' << 0) 114 #define SI2158_A20 ('A' << 24 | 58 << 16 | '2' << 8 | '0' << 0)
113 #define SI2157_A30 ('A' << 24 | 57 << 16 | '3' << 8 | '0' << 0) 115 #define SI2157_A30 ('A' << 24 | 57 << 16 | '3' << 8 | '0' << 0)
116 #define SI2147_A30 ('A' << 24 | 47 << 16 | '3' << 8 | '0' << 0)
114 117
115 switch (chip_id) { 118 switch (chip_id) {
116 case SI2158_A20: 119 case SI2158_A20:
117 fw_file = SI2158_A20_FIRMWARE; 120 fw_file = SI2158_A20_FIRMWARE;
118 break; 121 break;
119 case SI2157_A30: 122 case SI2157_A30:
123 case SI2147_A30:
120 goto skip_fw_download; 124 goto skip_fw_download;
121 break; 125 break;
122 default: 126 default:
123 dev_err(&s->client->dev, 127 dev_err(&s->client->dev,
124 "%s: unkown chip version Si21%d-%c%c%c\n", 128 "unknown chip version Si21%d-%c%c%c\n",
125 KBUILD_MODNAME, cmd.args[2], cmd.args[1], 129 cmd.args[2], cmd.args[1],
126 cmd.args[3], cmd.args[4]); 130 cmd.args[3], cmd.args[4]);
127 ret = -EINVAL; 131 ret = -EINVAL;
128 goto err; 132 goto err;
129 } 133 }
130 134
131 /* cold state - try to download firmware */ 135 /* cold state - try to download firmware */
132 dev_info(&s->client->dev, "%s: found a '%s' in cold state\n", 136 dev_info(&s->client->dev, "found a '%s' in cold state\n",
133 KBUILD_MODNAME, si2157_ops.info.name); 137 si2157_ops.info.name);
134 138
135 /* request the firmware, this will block and timeout */ 139 /* request the firmware, this will block and timeout */
136 ret = request_firmware(&fw, fw_file, &s->client->dev); 140 ret = request_firmware(&fw, fw_file, &s->client->dev);
137 if (ret) { 141 if (ret) {
138 dev_err(&s->client->dev, "%s: firmware file '%s' not found\n", 142 dev_err(&s->client->dev, "firmware file '%s' not found\n",
139 KBUILD_MODNAME, fw_file); 143 fw_file);
140 goto err; 144 goto err;
141 } 145 }
142 146
143 /* firmware should be n chunks of 17 bytes */ 147 /* firmware should be n chunks of 17 bytes */
144 if (fw->size % 17 != 0) { 148 if (fw->size % 17 != 0) {
145 dev_err(&s->client->dev, "%s: firmware file '%s' is invalid\n", 149 dev_err(&s->client->dev, "firmware file '%s' is invalid\n",
146 KBUILD_MODNAME, fw_file); 150 fw_file);
147 ret = -EINVAL; 151 ret = -EINVAL;
148 goto err; 152 goto err;
149 } 153 }
150 154
151 dev_info(&s->client->dev, "%s: downloading firmware from file '%s'\n", 155 dev_info(&s->client->dev, "downloading firmware from file '%s'\n",
152 KBUILD_MODNAME, fw_file); 156 fw_file);
153 157
154 for (remaining = fw->size; remaining > 0; remaining -= 17) { 158 for (remaining = fw->size; remaining > 0; remaining -= 17) {
155 len = fw->data[fw->size - remaining]; 159 len = fw->data[fw->size - remaining];
@@ -159,8 +163,8 @@ static int si2157_init(struct dvb_frontend *fe)
159 ret = si2157_cmd_execute(s, &cmd); 163 ret = si2157_cmd_execute(s, &cmd);
160 if (ret) { 164 if (ret) {
161 dev_err(&s->client->dev, 165 dev_err(&s->client->dev,
162 "%s: firmware download failed=%d\n", 166 "firmware download failed=%d\n",
163 KBUILD_MODNAME, ret); 167 ret);
164 goto err; 168 goto err;
165 } 169 }
166 } 170 }
@@ -177,14 +181,17 @@ skip_fw_download:
177 if (ret) 181 if (ret)
178 goto err; 182 goto err;
179 183
180 s->active = true; 184 s->fw_loaded = true;
181 185
186warm:
187 s->active = true;
182 return 0; 188 return 0;
189
183err: 190err:
184 if (fw) 191 if (fw)
185 release_firmware(fw); 192 release_firmware(fw);
186 193
187 dev_dbg(&s->client->dev, "%s: failed=%d\n", __func__, ret); 194 dev_dbg(&s->client->dev, "failed=%d\n", ret);
188 return ret; 195 return ret;
189} 196}
190 197
@@ -194,20 +201,21 @@ static int si2157_sleep(struct dvb_frontend *fe)
194 int ret; 201 int ret;
195 struct si2157_cmd cmd; 202 struct si2157_cmd cmd;
196 203
197 dev_dbg(&s->client->dev, "%s:\n", __func__); 204 dev_dbg(&s->client->dev, "\n");
198 205
199 s->active = false; 206 s->active = false;
200 207
201 memcpy(cmd.args, "\x13", 1); 208 /* standby */
202 cmd.wlen = 1; 209 memcpy(cmd.args, "\x16\x00", 2);
203 cmd.rlen = 0; 210 cmd.wlen = 2;
211 cmd.rlen = 1;
204 ret = si2157_cmd_execute(s, &cmd); 212 ret = si2157_cmd_execute(s, &cmd);
205 if (ret) 213 if (ret)
206 goto err; 214 goto err;
207 215
208 return 0; 216 return 0;
209err: 217err:
210 dev_dbg(&s->client->dev, "%s: failed=%d\n", __func__, ret); 218 dev_dbg(&s->client->dev, "failed=%d\n", ret);
211 return ret; 219 return ret;
212} 220}
213 221
@@ -220,8 +228,8 @@ static int si2157_set_params(struct dvb_frontend *fe)
220 u8 bandwidth, delivery_system; 228 u8 bandwidth, delivery_system;
221 229
222 dev_dbg(&s->client->dev, 230 dev_dbg(&s->client->dev,
223 "%s: delivery_system=%d frequency=%u bandwidth_hz=%u\n", 231 "delivery_system=%d frequency=%u bandwidth_hz=%u\n",
224 __func__, c->delivery_system, c->frequency, 232 c->delivery_system, c->frequency,
225 c->bandwidth_hz); 233 c->bandwidth_hz);
226 234
227 if (!s->active) { 235 if (!s->active) {
@@ -239,6 +247,9 @@ static int si2157_set_params(struct dvb_frontend *fe)
239 bandwidth = 0x0f; 247 bandwidth = 0x0f;
240 248
241 switch (c->delivery_system) { 249 switch (c->delivery_system) {
250 case SYS_ATSC:
251 delivery_system = 0x00;
252 break;
242 case SYS_DVBT: 253 case SYS_DVBT:
243 case SYS_DVBT2: /* it seems DVB-T and DVB-T2 both are 0x20 here */ 254 case SYS_DVBT2: /* it seems DVB-T and DVB-T2 both are 0x20 here */
244 delivery_system = 0x20; 255 delivery_system = 0x20;
@@ -256,7 +267,14 @@ static int si2157_set_params(struct dvb_frontend *fe)
256 if (s->inversion) 267 if (s->inversion)
257 cmd.args[5] = 0x01; 268 cmd.args[5] = 0x01;
258 cmd.wlen = 6; 269 cmd.wlen = 6;
259 cmd.rlen = 1; 270 cmd.rlen = 4;
271 ret = si2157_cmd_execute(s, &cmd);
272 if (ret)
273 goto err;
274
275 memcpy(cmd.args, "\x14\x00\x02\x07\x01\x00", 6);
276 cmd.wlen = 6;
277 cmd.rlen = 4;
260 ret = si2157_cmd_execute(s, &cmd); 278 ret = si2157_cmd_execute(s, &cmd);
261 if (ret) 279 if (ret)
262 goto err; 280 goto err;
@@ -275,7 +293,7 @@ static int si2157_set_params(struct dvb_frontend *fe)
275 293
276 return 0; 294 return 0;
277err: 295err:
278 dev_dbg(&s->client->dev, "%s: failed=%d\n", __func__, ret); 296 dev_dbg(&s->client->dev, "failed=%d\n", ret);
279 return ret; 297 return ret;
280} 298}
281 299
@@ -310,13 +328,14 @@ static int si2157_probe(struct i2c_client *client,
310 s = kzalloc(sizeof(struct si2157), GFP_KERNEL); 328 s = kzalloc(sizeof(struct si2157), GFP_KERNEL);
311 if (!s) { 329 if (!s) {
312 ret = -ENOMEM; 330 ret = -ENOMEM;
313 dev_err(&client->dev, "%s: kzalloc() failed\n", KBUILD_MODNAME); 331 dev_err(&client->dev, "kzalloc() failed\n");
314 goto err; 332 goto err;
315 } 333 }
316 334
317 s->client = client; 335 s->client = client;
318 s->fe = cfg->fe; 336 s->fe = cfg->fe;
319 s->inversion = cfg->inversion; 337 s->inversion = cfg->inversion;
338 s->fw_loaded = false;
320 mutex_init(&s->i2c_mutex); 339 mutex_init(&s->i2c_mutex);
321 340
322 /* check if the tuner is there */ 341 /* check if the tuner is there */
@@ -333,11 +352,10 @@ static int si2157_probe(struct i2c_client *client,
333 i2c_set_clientdata(client, s); 352 i2c_set_clientdata(client, s);
334 353
335 dev_info(&s->client->dev, 354 dev_info(&s->client->dev,
336 "%s: Silicon Labs Si2157/Si2158 successfully attached\n", 355 "Silicon Labs Si2157/Si2158 successfully attached\n");
337 KBUILD_MODNAME);
338 return 0; 356 return 0;
339err: 357err:
340 dev_dbg(&client->dev, "%s: failed=%d\n", __func__, ret); 358 dev_dbg(&client->dev, "failed=%d\n", ret);
341 kfree(s); 359 kfree(s);
342 360
343 return ret; 361 return ret;
@@ -348,7 +366,7 @@ static int si2157_remove(struct i2c_client *client)
348 struct si2157 *s = i2c_get_clientdata(client); 366 struct si2157 *s = i2c_get_clientdata(client);
349 struct dvb_frontend *fe = s->fe; 367 struct dvb_frontend *fe = s->fe;
350 368
351 dev_dbg(&client->dev, "%s:\n", __func__); 369 dev_dbg(&client->dev, "\n");
352 370
353 memset(&fe->ops.tuner_ops, 0, sizeof(struct dvb_tuner_ops)); 371 memset(&fe->ops.tuner_ops, 0, sizeof(struct dvb_tuner_ops));
354 fe->tuner_priv = NULL; 372 fe->tuner_priv = NULL;
diff --git a/drivers/media/tuners/si2157.h b/drivers/media/tuners/si2157.h
index 6da4d5d1c817..d3b19cadb4a1 100644
--- a/drivers/media/tuners/si2157.h
+++ b/drivers/media/tuners/si2157.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Silicon Labs Si2157/2158 silicon tuner driver 2 * Silicon Labs Si2147/2157/2158 silicon tuner driver
3 * 3 *
4 * Copyright (C) 2014 Antti Palosaari <crope@iki.fi> 4 * Copyright (C) 2014 Antti Palosaari <crope@iki.fi>
5 * 5 *
diff --git a/drivers/media/tuners/si2157_priv.h b/drivers/media/tuners/si2157_priv.h
index 3ddab5e6b500..e71ffafed951 100644
--- a/drivers/media/tuners/si2157_priv.h
+++ b/drivers/media/tuners/si2157_priv.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Silicon Labs Si2157/2158 silicon tuner driver 2 * Silicon Labs Si2147/2157/2158 silicon tuner driver
3 * 3 *
4 * Copyright (C) 2014 Antti Palosaari <crope@iki.fi> 4 * Copyright (C) 2014 Antti Palosaari <crope@iki.fi>
5 * 5 *
@@ -26,6 +26,7 @@ struct si2157 {
26 struct i2c_client *client; 26 struct i2c_client *client;
27 struct dvb_frontend *fe; 27 struct dvb_frontend *fe;
28 bool active; 28 bool active;
29 bool fw_loaded;
29 bool inversion; 30 bool inversion;
30}; 31};
31 32
diff --git a/drivers/media/tuners/tda18212.c b/drivers/media/tuners/tda18212.c
index 05a4ac9edb6b..d93e0667b46b 100644
--- a/drivers/media/tuners/tda18212.c
+++ b/drivers/media/tuners/tda18212.c
@@ -19,125 +19,19 @@
19 */ 19 */
20 20
21#include "tda18212.h" 21#include "tda18212.h"
22#include <linux/regmap.h>
22 23
23/* Max transfer size done by I2C transfer functions */ 24struct tda18212_dev {
24#define MAX_XFER_SIZE 64 25 struct tda18212_config cfg;
25 26 struct i2c_client *client;
26struct tda18212_priv { 27 struct regmap *regmap;
27 struct tda18212_config *cfg;
28 struct i2c_adapter *i2c;
29 28
30 u32 if_frequency; 29 u32 if_frequency;
31}; 30};
32 31
33/* write multiple registers */
34static int tda18212_wr_regs(struct tda18212_priv *priv, u8 reg, u8 *val,
35 int len)
36{
37 int ret;
38 u8 buf[MAX_XFER_SIZE];
39 struct i2c_msg msg[1] = {
40 {
41 .addr = priv->cfg->i2c_address,
42 .flags = 0,
43 .len = 1 + len,
44 .buf = buf,
45 }
46 };
47
48 if (1 + len > sizeof(buf)) {
49 dev_warn(&priv->i2c->dev,
50 "%s: i2c wr reg=%04x: len=%d is too big!\n",
51 KBUILD_MODNAME, reg, len);
52 return -EINVAL;
53 }
54
55 buf[0] = reg;
56 memcpy(&buf[1], val, len);
57
58 ret = i2c_transfer(priv->i2c, msg, 1);
59 if (ret == 1) {
60 ret = 0;
61 } else {
62 dev_warn(&priv->i2c->dev, "%s: i2c wr failed=%d reg=%02x " \
63 "len=%d\n", KBUILD_MODNAME, ret, reg, len);
64 ret = -EREMOTEIO;
65 }
66 return ret;
67}
68
69/* read multiple registers */
70static int tda18212_rd_regs(struct tda18212_priv *priv, u8 reg, u8 *val,
71 int len)
72{
73 int ret;
74 u8 buf[MAX_XFER_SIZE];
75 struct i2c_msg msg[2] = {
76 {
77 .addr = priv->cfg->i2c_address,
78 .flags = 0,
79 .len = 1,
80 .buf = &reg,
81 }, {
82 .addr = priv->cfg->i2c_address,
83 .flags = I2C_M_RD,
84 .len = len,
85 .buf = buf,
86 }
87 };
88
89 if (len > sizeof(buf)) {
90 dev_warn(&priv->i2c->dev,
91 "%s: i2c rd reg=%04x: len=%d is too big!\n",
92 KBUILD_MODNAME, reg, len);
93 return -EINVAL;
94 }
95
96 ret = i2c_transfer(priv->i2c, msg, 2);
97 if (ret == 2) {
98 memcpy(val, buf, len);
99 ret = 0;
100 } else {
101 dev_warn(&priv->i2c->dev, "%s: i2c rd failed=%d reg=%02x " \
102 "len=%d\n", KBUILD_MODNAME, ret, reg, len);
103 ret = -EREMOTEIO;
104 }
105
106 return ret;
107}
108
109/* write single register */
110static int tda18212_wr_reg(struct tda18212_priv *priv, u8 reg, u8 val)
111{
112 return tda18212_wr_regs(priv, reg, &val, 1);
113}
114
115/* read single register */
116static int tda18212_rd_reg(struct tda18212_priv *priv, u8 reg, u8 *val)
117{
118 return tda18212_rd_regs(priv, reg, val, 1);
119}
120
121#if 0 /* keep, useful when developing driver */
122static void tda18212_dump_regs(struct tda18212_priv *priv)
123{
124 int i;
125 u8 buf[256];
126
127 #define TDA18212_RD_LEN 32
128 for (i = 0; i < sizeof(buf); i += TDA18212_RD_LEN)
129 tda18212_rd_regs(priv, i, &buf[i], TDA18212_RD_LEN);
130
131 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 32, 1, buf,
132 sizeof(buf), true);
133
134 return;
135}
136#endif
137
138static int tda18212_set_params(struct dvb_frontend *fe) 32static int tda18212_set_params(struct dvb_frontend *fe)
139{ 33{
140 struct tda18212_priv *priv = fe->tuner_priv; 34 struct tda18212_dev *dev = fe->tuner_priv;
141 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 35 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
142 int ret, i; 36 int ret, i;
143 u32 if_khz; 37 u32 if_khz;
@@ -166,9 +60,9 @@ static int tda18212_set_params(struct dvb_frontend *fe)
166 [ATSC_QAM] = { 0x7d, 0x20, 0x63 }, 60 [ATSC_QAM] = { 0x7d, 0x20, 0x63 },
167 }; 61 };
168 62
169 dev_dbg(&priv->i2c->dev, 63 dev_dbg(&dev->client->dev,
170 "%s: delivery_system=%d frequency=%d bandwidth_hz=%d\n", 64 "delivery_system=%d frequency=%d bandwidth_hz=%d\n",
171 __func__, c->delivery_system, c->frequency, 65 c->delivery_system, c->frequency,
172 c->bandwidth_hz); 66 c->bandwidth_hz);
173 67
174 if (fe->ops.i2c_gate_ctrl) 68 if (fe->ops.i2c_gate_ctrl)
@@ -176,25 +70,25 @@ static int tda18212_set_params(struct dvb_frontend *fe)
176 70
177 switch (c->delivery_system) { 71 switch (c->delivery_system) {
178 case SYS_ATSC: 72 case SYS_ATSC:
179 if_khz = priv->cfg->if_atsc_vsb; 73 if_khz = dev->cfg.if_atsc_vsb;
180 i = ATSC_VSB; 74 i = ATSC_VSB;
181 break; 75 break;
182 case SYS_DVBC_ANNEX_B: 76 case SYS_DVBC_ANNEX_B:
183 if_khz = priv->cfg->if_atsc_qam; 77 if_khz = dev->cfg.if_atsc_qam;
184 i = ATSC_QAM; 78 i = ATSC_QAM;
185 break; 79 break;
186 case SYS_DVBT: 80 case SYS_DVBT:
187 switch (c->bandwidth_hz) { 81 switch (c->bandwidth_hz) {
188 case 6000000: 82 case 6000000:
189 if_khz = priv->cfg->if_dvbt_6; 83 if_khz = dev->cfg.if_dvbt_6;
190 i = DVBT_6; 84 i = DVBT_6;
191 break; 85 break;
192 case 7000000: 86 case 7000000:
193 if_khz = priv->cfg->if_dvbt_7; 87 if_khz = dev->cfg.if_dvbt_7;
194 i = DVBT_7; 88 i = DVBT_7;
195 break; 89 break;
196 case 8000000: 90 case 8000000:
197 if_khz = priv->cfg->if_dvbt_8; 91 if_khz = dev->cfg.if_dvbt_8;
198 i = DVBT_8; 92 i = DVBT_8;
199 break; 93 break;
200 default: 94 default:
@@ -205,15 +99,15 @@ static int tda18212_set_params(struct dvb_frontend *fe)
205 case SYS_DVBT2: 99 case SYS_DVBT2:
206 switch (c->bandwidth_hz) { 100 switch (c->bandwidth_hz) {
207 case 6000000: 101 case 6000000:
208 if_khz = priv->cfg->if_dvbt2_6; 102 if_khz = dev->cfg.if_dvbt2_6;
209 i = DVBT2_6; 103 i = DVBT2_6;
210 break; 104 break;
211 case 7000000: 105 case 7000000:
212 if_khz = priv->cfg->if_dvbt2_7; 106 if_khz = dev->cfg.if_dvbt2_7;
213 i = DVBT2_7; 107 i = DVBT2_7;
214 break; 108 break;
215 case 8000000: 109 case 8000000:
216 if_khz = priv->cfg->if_dvbt2_8; 110 if_khz = dev->cfg.if_dvbt2_8;
217 i = DVBT2_8; 111 i = DVBT2_8;
218 break; 112 break;
219 default: 113 default:
@@ -223,7 +117,7 @@ static int tda18212_set_params(struct dvb_frontend *fe)
223 break; 117 break;
224 case SYS_DVBC_ANNEX_A: 118 case SYS_DVBC_ANNEX_A:
225 case SYS_DVBC_ANNEX_C: 119 case SYS_DVBC_ANNEX_C:
226 if_khz = priv->cfg->if_dvbc; 120 if_khz = dev->cfg.if_dvbc;
227 i = DVBC_8; 121 i = DVBC_8;
228 break; 122 break;
229 default: 123 default:
@@ -231,15 +125,15 @@ static int tda18212_set_params(struct dvb_frontend *fe)
231 goto error; 125 goto error;
232 } 126 }
233 127
234 ret = tda18212_wr_reg(priv, 0x23, bw_params[i][2]); 128 ret = regmap_write(dev->regmap, 0x23, bw_params[i][2]);
235 if (ret) 129 if (ret)
236 goto error; 130 goto error;
237 131
238 ret = tda18212_wr_reg(priv, 0x06, 0x00); 132 ret = regmap_write(dev->regmap, 0x06, 0x00);
239 if (ret) 133 if (ret)
240 goto error; 134 goto error;
241 135
242 ret = tda18212_wr_reg(priv, 0x0f, bw_params[i][0]); 136 ret = regmap_write(dev->regmap, 0x0f, bw_params[i][0]);
243 if (ret) 137 if (ret)
244 goto error; 138 goto error;
245 139
@@ -252,12 +146,12 @@ static int tda18212_set_params(struct dvb_frontend *fe)
252 buf[6] = ((c->frequency / 1000) >> 0) & 0xff; 146 buf[6] = ((c->frequency / 1000) >> 0) & 0xff;
253 buf[7] = 0xc1; 147 buf[7] = 0xc1;
254 buf[8] = 0x01; 148 buf[8] = 0x01;
255 ret = tda18212_wr_regs(priv, 0x12, buf, sizeof(buf)); 149 ret = regmap_bulk_write(dev->regmap, 0x12, buf, sizeof(buf));
256 if (ret) 150 if (ret)
257 goto error; 151 goto error;
258 152
259 /* actual IF rounded as it is on register */ 153 /* actual IF rounded as it is on register */
260 priv->if_frequency = buf[3] * 50 * 1000; 154 dev->if_frequency = buf[3] * 50 * 1000;
261 155
262exit: 156exit:
263 if (fe->ops.i2c_gate_ctrl) 157 if (fe->ops.i2c_gate_ctrl)
@@ -266,26 +160,19 @@ exit:
266 return ret; 160 return ret;
267 161
268error: 162error:
269 dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret); 163 dev_dbg(&dev->client->dev, "failed=%d\n", ret);
270 goto exit; 164 goto exit;
271} 165}
272 166
273static int tda18212_get_if_frequency(struct dvb_frontend *fe, u32 *frequency) 167static int tda18212_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
274{ 168{
275 struct tda18212_priv *priv = fe->tuner_priv; 169 struct tda18212_dev *dev = fe->tuner_priv;
276 170
277 *frequency = priv->if_frequency; 171 *frequency = dev->if_frequency;
278 172
279 return 0; 173 return 0;
280} 174}
281 175
282static int tda18212_release(struct dvb_frontend *fe)
283{
284 kfree(fe->tuner_priv);
285 fe->tuner_priv = NULL;
286 return 0;
287}
288
289static const struct dvb_tuner_ops tda18212_tuner_ops = { 176static const struct dvb_tuner_ops tda18212_tuner_ops = {
290 .info = { 177 .info = {
291 .name = "NXP TDA18212", 178 .name = "NXP TDA18212",
@@ -295,53 +182,110 @@ static const struct dvb_tuner_ops tda18212_tuner_ops = {
295 .frequency_step = 1000, 182 .frequency_step = 1000,
296 }, 183 },
297 184
298 .release = tda18212_release,
299
300 .set_params = tda18212_set_params, 185 .set_params = tda18212_set_params,
301 .get_if_frequency = tda18212_get_if_frequency, 186 .get_if_frequency = tda18212_get_if_frequency,
302}; 187};
303 188
304struct dvb_frontend *tda18212_attach(struct dvb_frontend *fe, 189static int tda18212_probe(struct i2c_client *client,
305 struct i2c_adapter *i2c, struct tda18212_config *cfg) 190 const struct i2c_device_id *id)
306{ 191{
307 struct tda18212_priv *priv = NULL; 192 struct tda18212_config *cfg = client->dev.platform_data;
193 struct dvb_frontend *fe = cfg->fe;
194 struct tda18212_dev *dev;
308 int ret; 195 int ret;
309 u8 val; 196 unsigned int chip_id;
197 char *version;
198 static const struct regmap_config regmap_config = {
199 .reg_bits = 8,
200 .val_bits = 8,
201 };
310 202
311 priv = kzalloc(sizeof(struct tda18212_priv), GFP_KERNEL); 203 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
312 if (priv == NULL) 204 if (dev == NULL) {
313 return NULL; 205 ret = -ENOMEM;
206 dev_err(&client->dev, "kzalloc() failed\n");
207 goto err;
208 }
314 209
315 priv->cfg = cfg; 210 memcpy(&dev->cfg, cfg, sizeof(struct tda18212_config));
316 priv->i2c = i2c; 211 dev->client = client;
317 fe->tuner_priv = priv; 212 dev->regmap = devm_regmap_init_i2c(client, &regmap_config);
213 if (IS_ERR(dev->regmap)) {
214 ret = PTR_ERR(dev->regmap);
215 goto err;
216 }
318 217
218 /* check if the tuner is there */
319 if (fe->ops.i2c_gate_ctrl) 219 if (fe->ops.i2c_gate_ctrl)
320 fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */ 220 fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
321 221
322 /* check if the tuner is there */ 222 ret = regmap_read(dev->regmap, 0x00, &chip_id);
323 ret = tda18212_rd_reg(priv, 0x00, &val); 223 dev_dbg(&dev->client->dev, "chip_id=%02x\n", chip_id);
324 224
325 if (fe->ops.i2c_gate_ctrl) 225 if (fe->ops.i2c_gate_ctrl)
326 fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */ 226 fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
327 227
328 if (!ret) 228 if (ret)
329 dev_dbg(&priv->i2c->dev, "%s: chip id=%02x\n", __func__, val); 229 goto err;
330 if (ret || val != 0xc7) { 230
331 kfree(priv); 231 switch (chip_id) {
332 return NULL; 232 case 0xc7:
233 version = "M"; /* master */
234 break;
235 case 0x47:
236 version = "S"; /* slave */
237 break;
238 default:
239 ret = -ENODEV;
240 goto err;
333 } 241 }
334 242
335 dev_info(&priv->i2c->dev, 243 dev_info(&dev->client->dev,
336 "%s: NXP TDA18212HN successfully identified\n", 244 "NXP TDA18212HN/%s successfully identified\n", version);
337 KBUILD_MODNAME);
338 245
246 fe->tuner_priv = dev;
339 memcpy(&fe->ops.tuner_ops, &tda18212_tuner_ops, 247 memcpy(&fe->ops.tuner_ops, &tda18212_tuner_ops,
340 sizeof(struct dvb_tuner_ops)); 248 sizeof(struct dvb_tuner_ops));
249 i2c_set_clientdata(client, dev);
341 250
342 return fe; 251 return 0;
252err:
253 dev_dbg(&client->dev, "failed=%d\n", ret);
254 kfree(dev);
255 return ret;
343} 256}
344EXPORT_SYMBOL(tda18212_attach); 257
258static int tda18212_remove(struct i2c_client *client)
259{
260 struct tda18212_dev *dev = i2c_get_clientdata(client);
261 struct dvb_frontend *fe = dev->cfg.fe;
262
263 dev_dbg(&client->dev, "\n");
264
265 memset(&fe->ops.tuner_ops, 0, sizeof(struct dvb_tuner_ops));
266 fe->tuner_priv = NULL;
267 kfree(dev);
268
269 return 0;
270}
271
272static const struct i2c_device_id tda18212_id[] = {
273 {"tda18212", 0},
274 {}
275};
276MODULE_DEVICE_TABLE(i2c, tda18212_id);
277
278static struct i2c_driver tda18212_driver = {
279 .driver = {
280 .owner = THIS_MODULE,
281 .name = "tda18212",
282 },
283 .probe = tda18212_probe,
284 .remove = tda18212_remove,
285 .id_table = tda18212_id,
286};
287
288module_i2c_driver(tda18212_driver);
345 289
346MODULE_DESCRIPTION("NXP TDA18212HN silicon tuner driver"); 290MODULE_DESCRIPTION("NXP TDA18212HN silicon tuner driver");
347MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>"); 291MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
diff --git a/drivers/media/tuners/tda18212.h b/drivers/media/tuners/tda18212.h
index c36b49e4b274..e58c9096d79c 100644
--- a/drivers/media/tuners/tda18212.h
+++ b/drivers/media/tuners/tda18212.h
@@ -25,8 +25,6 @@
25#include "dvb_frontend.h" 25#include "dvb_frontend.h"
26 26
27struct tda18212_config { 27struct tda18212_config {
28 u8 i2c_address;
29
30 u16 if_dvbt_6; 28 u16 if_dvbt_6;
31 u16 if_dvbt_7; 29 u16 if_dvbt_7;
32 u16 if_dvbt_8; 30 u16 if_dvbt_8;
@@ -37,18 +35,11 @@ struct tda18212_config {
37 u16 if_dvbc; 35 u16 if_dvbc;
38 u16 if_atsc_vsb; 36 u16 if_atsc_vsb;
39 u16 if_atsc_qam; 37 u16 if_atsc_qam;
40};
41 38
42#if IS_ENABLED(CONFIG_MEDIA_TUNER_TDA18212) 39 /*
43extern struct dvb_frontend *tda18212_attach(struct dvb_frontend *fe, 40 * pointer to DVB frontend
44 struct i2c_adapter *i2c, struct tda18212_config *cfg); 41 */
45#else 42 struct dvb_frontend *fe;
46static inline struct dvb_frontend *tda18212_attach(struct dvb_frontend *fe, 43};
47 struct i2c_adapter *i2c, struct tda18212_config *cfg)
48{
49 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
50 return NULL;
51}
52#endif
53 44
54#endif 45#endif
diff --git a/drivers/media/tuners/tda18271-common.c b/drivers/media/tuners/tda18271-common.c
index 18c77afe2e4f..86e5e3110118 100644
--- a/drivers/media/tuners/tda18271-common.c
+++ b/drivers/media/tuners/tda18271-common.c
@@ -714,12 +714,11 @@ fail:
714 return ret; 714 return ret;
715} 715}
716 716
717int _tda_printk(struct tda18271_priv *state, const char *level, 717void _tda_printk(struct tda18271_priv *state, const char *level,
718 const char *func, const char *fmt, ...) 718 const char *func, const char *fmt, ...)
719{ 719{
720 struct va_format vaf; 720 struct va_format vaf;
721 va_list args; 721 va_list args;
722 int rtn;
723 722
724 va_start(args, fmt); 723 va_start(args, fmt);
725 724
@@ -727,15 +726,13 @@ int _tda_printk(struct tda18271_priv *state, const char *level,
727 vaf.va = &args; 726 vaf.va = &args;
728 727
729 if (state) 728 if (state)
730 rtn = printk("%s%s: [%d-%04x|%c] %pV", 729 printk("%s%s: [%d-%04x|%c] %pV",
731 level, func, i2c_adapter_id(state->i2c_props.adap), 730 level, func, i2c_adapter_id(state->i2c_props.adap),
732 state->i2c_props.addr, 731 state->i2c_props.addr,
733 (state->role == TDA18271_MASTER) ? 'M' : 'S', 732 (state->role == TDA18271_MASTER) ? 'M' : 'S',
734 &vaf); 733 &vaf);
735 else 734 else
736 rtn = printk("%s%s: %pV", level, func, &vaf); 735 printk("%s%s: %pV", level, func, &vaf);
737 736
738 va_end(args); 737 va_end(args);
739
740 return rtn;
741} 738}
diff --git a/drivers/media/tuners/tda18271-priv.h b/drivers/media/tuners/tda18271-priv.h
index 454c152ccaa0..b36a7b754772 100644
--- a/drivers/media/tuners/tda18271-priv.h
+++ b/drivers/media/tuners/tda18271-priv.h
@@ -139,8 +139,8 @@ extern int tda18271_debug;
139#define DBG_CAL 16 139#define DBG_CAL 16
140 140
141__attribute__((format(printf, 4, 5))) 141__attribute__((format(printf, 4, 5)))
142int _tda_printk(struct tda18271_priv *state, const char *level, 142void _tda_printk(struct tda18271_priv *state, const char *level,
143 const char *func, const char *fmt, ...); 143 const char *func, const char *fmt, ...);
144 144
145#define tda_printk(st, lvl, fmt, arg...) \ 145#define tda_printk(st, lvl, fmt, arg...) \
146 _tda_printk(st, lvl, __func__, fmt, ##arg) 146 _tda_printk(st, lvl, __func__, fmt, ##arg)
diff --git a/drivers/media/tuners/tuner-xc2028.c b/drivers/media/tuners/tuner-xc2028.c
index 565eeebb3aeb..d12f5e4ad8bf 100644
--- a/drivers/media/tuners/tuner-xc2028.c
+++ b/drivers/media/tuners/tuner-xc2028.c
@@ -178,67 +178,67 @@ static int xc2028_get_reg(struct xc2028_data *priv, u16 reg, u16 *val)
178#define dump_firm_type(t) dump_firm_type_and_int_freq(t, 0) 178#define dump_firm_type(t) dump_firm_type_and_int_freq(t, 0)
179static void dump_firm_type_and_int_freq(unsigned int type, u16 int_freq) 179static void dump_firm_type_and_int_freq(unsigned int type, u16 int_freq)
180{ 180{
181 if (type & BASE) 181 if (type & BASE)
182 printk("BASE "); 182 printk("BASE ");
183 if (type & INIT1) 183 if (type & INIT1)
184 printk("INIT1 "); 184 printk("INIT1 ");
185 if (type & F8MHZ) 185 if (type & F8MHZ)
186 printk("F8MHZ "); 186 printk("F8MHZ ");
187 if (type & MTS) 187 if (type & MTS)
188 printk("MTS "); 188 printk("MTS ");
189 if (type & D2620) 189 if (type & D2620)
190 printk("D2620 "); 190 printk("D2620 ");
191 if (type & D2633) 191 if (type & D2633)
192 printk("D2633 "); 192 printk("D2633 ");
193 if (type & DTV6) 193 if (type & DTV6)
194 printk("DTV6 "); 194 printk("DTV6 ");
195 if (type & QAM) 195 if (type & QAM)
196 printk("QAM "); 196 printk("QAM ");
197 if (type & DTV7) 197 if (type & DTV7)
198 printk("DTV7 "); 198 printk("DTV7 ");
199 if (type & DTV78) 199 if (type & DTV78)
200 printk("DTV78 "); 200 printk("DTV78 ");
201 if (type & DTV8) 201 if (type & DTV8)
202 printk("DTV8 "); 202 printk("DTV8 ");
203 if (type & FM) 203 if (type & FM)
204 printk("FM "); 204 printk("FM ");
205 if (type & INPUT1) 205 if (type & INPUT1)
206 printk("INPUT1 "); 206 printk("INPUT1 ");
207 if (type & LCD) 207 if (type & LCD)
208 printk("LCD "); 208 printk("LCD ");
209 if (type & NOGD) 209 if (type & NOGD)
210 printk("NOGD "); 210 printk("NOGD ");
211 if (type & MONO) 211 if (type & MONO)
212 printk("MONO "); 212 printk("MONO ");
213 if (type & ATSC) 213 if (type & ATSC)
214 printk("ATSC "); 214 printk("ATSC ");
215 if (type & IF) 215 if (type & IF)
216 printk("IF "); 216 printk("IF ");
217 if (type & LG60) 217 if (type & LG60)
218 printk("LG60 "); 218 printk("LG60 ");
219 if (type & ATI638) 219 if (type & ATI638)
220 printk("ATI638 "); 220 printk("ATI638 ");
221 if (type & OREN538) 221 if (type & OREN538)
222 printk("OREN538 "); 222 printk("OREN538 ");
223 if (type & OREN36) 223 if (type & OREN36)
224 printk("OREN36 "); 224 printk("OREN36 ");
225 if (type & TOYOTA388) 225 if (type & TOYOTA388)
226 printk("TOYOTA388 "); 226 printk("TOYOTA388 ");
227 if (type & TOYOTA794) 227 if (type & TOYOTA794)
228 printk("TOYOTA794 "); 228 printk("TOYOTA794 ");
229 if (type & DIBCOM52) 229 if (type & DIBCOM52)
230 printk("DIBCOM52 "); 230 printk("DIBCOM52 ");
231 if (type & ZARLINK456) 231 if (type & ZARLINK456)
232 printk("ZARLINK456 "); 232 printk("ZARLINK456 ");
233 if (type & CHINA) 233 if (type & CHINA)
234 printk("CHINA "); 234 printk("CHINA ");
235 if (type & F6MHZ) 235 if (type & F6MHZ)
236 printk("F6MHZ "); 236 printk("F6MHZ ");
237 if (type & INPUT2) 237 if (type & INPUT2)
238 printk("INPUT2 "); 238 printk("INPUT2 ");
239 if (type & SCODE) 239 if (type & SCODE)
240 printk("SCODE "); 240 printk("SCODE ");
241 if (type & HAS_IF) 241 if (type & HAS_IF)
242 printk("HAS_IF_%d ", int_freq); 242 printk("HAS_IF_%d ", int_freq);
243} 243}
244 244
diff --git a/drivers/media/tuners/tuner_it913x.c b/drivers/media/tuners/tuner_it913x.c
deleted file mode 100644
index 3d83c425bccf..000000000000
--- a/drivers/media/tuners/tuner_it913x.c
+++ /dev/null
@@ -1,453 +0,0 @@
1/*
2 * ITE Tech IT9137 silicon tuner driver
3 *
4 * Copyright (C) 2011 Malcolm Priestley (tvboxspy@gmail.com)
5 * IT9137 Copyright (C) ITE Tech Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 *
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.=
21 */
22
23#include "tuner_it913x_priv.h"
24
25struct it913x_state {
26 struct i2c_adapter *i2c_adap;
27 u8 i2c_addr;
28 u8 chip_ver;
29 u8 tuner_type;
30 u8 firmware_ver;
31 u16 tun_xtal;
32 u8 tun_fdiv;
33 u8 tun_clk_mode;
34 u32 tun_fn_min;
35};
36
37/* read multiple registers */
38static int it913x_rd_regs(struct it913x_state *state,
39 u32 reg, u8 *data, u8 count)
40{
41 int ret;
42 u8 b[3];
43 struct i2c_msg msg[2] = {
44 { .addr = state->i2c_addr, .flags = 0,
45 .buf = b, .len = sizeof(b) },
46 { .addr = state->i2c_addr, .flags = I2C_M_RD,
47 .buf = data, .len = count }
48 };
49 b[0] = (u8)(reg >> 16) & 0xff;
50 b[1] = (u8)(reg >> 8) & 0xff;
51 b[2] = (u8) reg & 0xff;
52 b[0] |= 0x80; /* All reads from demodulator */
53
54 ret = i2c_transfer(state->i2c_adap, msg, 2);
55
56 return ret;
57}
58
59/* read single register */
60static int it913x_rd_reg(struct it913x_state *state, u32 reg)
61{
62 int ret;
63 u8 b[1];
64 ret = it913x_rd_regs(state, reg, &b[0], sizeof(b));
65 return (ret < 0) ? -ENODEV : b[0];
66}
67
68/* write multiple registers */
69static int it913x_wr_regs(struct it913x_state *state,
70 u8 pro, u32 reg, u8 buf[], u8 count)
71{
72 u8 b[256];
73 struct i2c_msg msg[1] = {
74 { .addr = state->i2c_addr, .flags = 0,
75 .buf = b, .len = 3 + count }
76 };
77 int ret;
78 b[0] = (u8)(reg >> 16) & 0xff;
79 b[1] = (u8)(reg >> 8) & 0xff;
80 b[2] = (u8) reg & 0xff;
81 memcpy(&b[3], buf, count);
82
83 if (pro == PRO_DMOD)
84 b[0] |= 0x80;
85
86 ret = i2c_transfer(state->i2c_adap, msg, 1);
87
88 if (ret < 0)
89 return -EIO;
90
91 return 0;
92}
93
94/* write single register */
95static int it913x_wr_reg(struct it913x_state *state,
96 u8 pro, u32 reg, u32 data)
97{
98 int ret;
99 u8 b[4];
100 u8 s;
101
102 b[0] = data >> 24;
103 b[1] = (data >> 16) & 0xff;
104 b[2] = (data >> 8) & 0xff;
105 b[3] = data & 0xff;
106 /* expand write as needed */
107 if (data < 0x100)
108 s = 3;
109 else if (data < 0x1000)
110 s = 2;
111 else if (data < 0x100000)
112 s = 1;
113 else
114 s = 0;
115
116 ret = it913x_wr_regs(state, pro, reg, &b[s], sizeof(b) - s);
117
118 return ret;
119}
120
121static int it913x_script_loader(struct it913x_state *state,
122 struct it913xset *loadscript)
123{
124 int ret, i;
125 if (loadscript == NULL)
126 return -EINVAL;
127
128 for (i = 0; i < 1000; ++i) {
129 if (loadscript[i].pro == 0xff)
130 break;
131 ret = it913x_wr_regs(state, loadscript[i].pro,
132 loadscript[i].address,
133 loadscript[i].reg, loadscript[i].count);
134 if (ret < 0)
135 return -ENODEV;
136 }
137 return 0;
138}
139
140static int it913x_init(struct dvb_frontend *fe)
141{
142 struct it913x_state *state = fe->tuner_priv;
143 int ret, i, reg;
144 u8 val, nv_val;
145 u8 nv[] = {48, 32, 24, 16, 12, 8, 6, 4, 2};
146 u8 b[2];
147
148 reg = it913x_rd_reg(state, 0xec86);
149 switch (reg) {
150 case 0:
151 state->tun_clk_mode = reg;
152 state->tun_xtal = 2000;
153 state->tun_fdiv = 3;
154 val = 16;
155 break;
156 case -ENODEV:
157 return -ENODEV;
158 case 1:
159 default:
160 state->tun_clk_mode = reg;
161 state->tun_xtal = 640;
162 state->tun_fdiv = 1;
163 val = 6;
164 break;
165 }
166
167 reg = it913x_rd_reg(state, 0xed03);
168
169 if (reg < 0)
170 return -ENODEV;
171 else if (reg < ARRAY_SIZE(nv))
172 nv_val = nv[reg];
173 else
174 nv_val = 2;
175
176 for (i = 0; i < 50; i++) {
177 ret = it913x_rd_regs(state, 0xed23, &b[0], sizeof(b));
178 reg = (b[1] << 8) + b[0];
179 if (reg > 0)
180 break;
181 if (ret < 0)
182 return -ENODEV;
183 udelay(2000);
184 }
185 state->tun_fn_min = state->tun_xtal * reg;
186 state->tun_fn_min /= (state->tun_fdiv * nv_val);
187 dev_dbg(&state->i2c_adap->dev, "%s: Tuner fn_min %d\n", __func__,
188 state->tun_fn_min);
189
190 if (state->chip_ver > 1)
191 msleep(50);
192 else {
193 for (i = 0; i < 50; i++) {
194 reg = it913x_rd_reg(state, 0xec82);
195 if (reg > 0)
196 break;
197 if (reg < 0)
198 return -ENODEV;
199 udelay(2000);
200 }
201 }
202
203 /* Power Up Tuner - common all versions */
204 ret = it913x_wr_reg(state, PRO_DMOD, 0xec40, 0x1);
205 ret |= it913x_wr_reg(state, PRO_DMOD, 0xfba8, 0x0);
206 ret |= it913x_wr_reg(state, PRO_DMOD, 0xec57, 0x0);
207 ret |= it913x_wr_reg(state, PRO_DMOD, 0xec58, 0x0);
208
209 return it913x_wr_reg(state, PRO_DMOD, 0xed81, val);
210}
211
212static int it9137_set_params(struct dvb_frontend *fe)
213{
214 struct it913x_state *state = fe->tuner_priv;
215 struct it913xset *set_tuner = set_it9137_template;
216 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
217 u32 bandwidth = p->bandwidth_hz;
218 u32 frequency_m = p->frequency;
219 int ret, reg;
220 u32 frequency = frequency_m / 1000;
221 u32 freq, temp_f, tmp;
222 u16 iqik_m_cal;
223 u16 n_div;
224 u8 n;
225 u8 l_band;
226 u8 lna_band;
227 u8 bw;
228
229 if (state->firmware_ver == 1)
230 set_tuner = set_it9135_template;
231 else
232 set_tuner = set_it9137_template;
233
234 dev_dbg(&state->i2c_adap->dev, "%s: Tuner Frequency %d Bandwidth %d\n",
235 __func__, frequency, bandwidth);
236
237 if (frequency >= 51000 && frequency <= 440000) {
238 l_band = 0;
239 lna_band = 0;
240 } else if (frequency > 440000 && frequency <= 484000) {
241 l_band = 1;
242 lna_band = 1;
243 } else if (frequency > 484000 && frequency <= 533000) {
244 l_band = 1;
245 lna_band = 2;
246 } else if (frequency > 533000 && frequency <= 587000) {
247 l_band = 1;
248 lna_band = 3;
249 } else if (frequency > 587000 && frequency <= 645000) {
250 l_band = 1;
251 lna_band = 4;
252 } else if (frequency > 645000 && frequency <= 710000) {
253 l_band = 1;
254 lna_band = 5;
255 } else if (frequency > 710000 && frequency <= 782000) {
256 l_band = 1;
257 lna_band = 6;
258 } else if (frequency > 782000 && frequency <= 860000) {
259 l_band = 1;
260 lna_band = 7;
261 } else if (frequency > 1450000 && frequency <= 1492000) {
262 l_band = 1;
263 lna_band = 0;
264 } else if (frequency > 1660000 && frequency <= 1685000) {
265 l_band = 1;
266 lna_band = 1;
267 } else
268 return -EINVAL;
269 set_tuner[0].reg[0] = lna_band;
270
271 switch (bandwidth) {
272 case 5000000:
273 bw = 0;
274 break;
275 case 6000000:
276 bw = 2;
277 break;
278 case 7000000:
279 bw = 4;
280 break;
281 default:
282 case 8000000:
283 bw = 6;
284 break;
285 }
286
287 set_tuner[1].reg[0] = bw;
288 set_tuner[2].reg[0] = 0xa0 | (l_band << 3);
289
290 if (frequency > 53000 && frequency <= 74000) {
291 n_div = 48;
292 n = 0;
293 } else if (frequency > 74000 && frequency <= 111000) {
294 n_div = 32;
295 n = 1;
296 } else if (frequency > 111000 && frequency <= 148000) {
297 n_div = 24;
298 n = 2;
299 } else if (frequency > 148000 && frequency <= 222000) {
300 n_div = 16;
301 n = 3;
302 } else if (frequency > 222000 && frequency <= 296000) {
303 n_div = 12;
304 n = 4;
305 } else if (frequency > 296000 && frequency <= 445000) {
306 n_div = 8;
307 n = 5;
308 } else if (frequency > 445000 && frequency <= state->tun_fn_min) {
309 n_div = 6;
310 n = 6;
311 } else if (frequency > state->tun_fn_min && frequency <= 950000) {
312 n_div = 4;
313 n = 7;
314 } else if (frequency > 1450000 && frequency <= 1680000) {
315 n_div = 2;
316 n = 0;
317 } else
318 return -EINVAL;
319
320 reg = it913x_rd_reg(state, 0xed81);
321 iqik_m_cal = (u16)reg * n_div;
322
323 if (reg < 0x20) {
324 if (state->tun_clk_mode == 0)
325 iqik_m_cal = (iqik_m_cal * 9) >> 5;
326 else
327 iqik_m_cal >>= 1;
328 } else {
329 iqik_m_cal = 0x40 - iqik_m_cal;
330 if (state->tun_clk_mode == 0)
331 iqik_m_cal = ~((iqik_m_cal * 9) >> 5);
332 else
333 iqik_m_cal = ~(iqik_m_cal >> 1);
334 }
335
336 temp_f = frequency * (u32)n_div * (u32)state->tun_fdiv;
337 freq = temp_f / state->tun_xtal;
338 tmp = freq * state->tun_xtal;
339
340 if ((temp_f - tmp) >= (state->tun_xtal >> 1))
341 freq++;
342
343 freq += (u32) n << 13;
344 /* Frequency OMEGA_IQIK_M_CAL_MID*/
345 temp_f = freq + (u32)iqik_m_cal;
346
347 set_tuner[3].reg[0] = temp_f & 0xff;
348 set_tuner[4].reg[0] = (temp_f >> 8) & 0xff;
349
350 dev_dbg(&state->i2c_adap->dev, "%s: High Frequency = %04x\n",
351 __func__, temp_f);
352
353 /* Lower frequency */
354 set_tuner[5].reg[0] = freq & 0xff;
355 set_tuner[6].reg[0] = (freq >> 8) & 0xff;
356
357 dev_dbg(&state->i2c_adap->dev, "%s: low Frequency = %04x\n",
358 __func__, freq);
359
360 ret = it913x_script_loader(state, set_tuner);
361
362 return (ret < 0) ? -ENODEV : 0;
363}
364
365/* Power sequence */
366/* Power Up Tuner on -> Frontend suspend off -> Tuner clk on */
367/* Power Down Frontend suspend on -> Tuner clk off -> Tuner off */
368
369static int it913x_sleep(struct dvb_frontend *fe)
370{
371 struct it913x_state *state = fe->tuner_priv;
372 return it913x_script_loader(state, it9137_tuner_off);
373}
374
375static int it913x_release(struct dvb_frontend *fe)
376{
377 kfree(fe->tuner_priv);
378 return 0;
379}
380
381static const struct dvb_tuner_ops it913x_tuner_ops = {
382 .info = {
383 .name = "ITE Tech IT913X",
384 .frequency_min = 174000000,
385 .frequency_max = 862000000,
386 },
387
388 .release = it913x_release,
389
390 .init = it913x_init,
391 .sleep = it913x_sleep,
392 .set_params = it9137_set_params,
393};
394
395struct dvb_frontend *it913x_attach(struct dvb_frontend *fe,
396 struct i2c_adapter *i2c_adap, u8 i2c_addr, u8 config)
397{
398 struct it913x_state *state = NULL;
399 int ret;
400
401 /* allocate memory for the internal state */
402 state = kzalloc(sizeof(struct it913x_state), GFP_KERNEL);
403 if (state == NULL)
404 return NULL;
405
406 state->i2c_adap = i2c_adap;
407 state->i2c_addr = i2c_addr;
408
409 switch (config) {
410 case AF9033_TUNER_IT9135_38:
411 case AF9033_TUNER_IT9135_51:
412 case AF9033_TUNER_IT9135_52:
413 state->chip_ver = 0x01;
414 break;
415 case AF9033_TUNER_IT9135_60:
416 case AF9033_TUNER_IT9135_61:
417 case AF9033_TUNER_IT9135_62:
418 state->chip_ver = 0x02;
419 break;
420 default:
421 dev_dbg(&i2c_adap->dev,
422 "%s: invalid config=%02x\n", __func__, config);
423 goto error;
424 }
425
426 state->tuner_type = config;
427 state->firmware_ver = 1;
428
429 /* tuner RF initial */
430 ret = it913x_wr_reg(state, PRO_DMOD, 0xec4c, 0x68);
431 if (ret < 0)
432 goto error;
433
434 fe->tuner_priv = state;
435 memcpy(&fe->ops.tuner_ops, &it913x_tuner_ops,
436 sizeof(struct dvb_tuner_ops));
437
438 dev_info(&i2c_adap->dev,
439 "%s: ITE Tech IT913X successfully attached\n",
440 KBUILD_MODNAME);
441 dev_dbg(&i2c_adap->dev, "%s: config=%02x chip_ver=%02x\n",
442 __func__, config, state->chip_ver);
443
444 return fe;
445error:
446 kfree(state);
447 return NULL;
448}
449EXPORT_SYMBOL(it913x_attach);
450
451MODULE_DESCRIPTION("ITE Tech IT913X silicon tuner driver");
452MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
453MODULE_LICENSE("GPL");
diff --git a/drivers/media/tuners/tuner_it913x_priv.h b/drivers/media/tuners/tuner_it913x_priv.h
deleted file mode 100644
index ce652108aa5d..000000000000
--- a/drivers/media/tuners/tuner_it913x_priv.h
+++ /dev/null
@@ -1,78 +0,0 @@
1/*
2 * ITE Tech IT9137 silicon tuner driver
3 *
4 * Copyright (C) 2011 Malcolm Priestley (tvboxspy@gmail.com)
5 * IT9137 Copyright (C) ITE Tech Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 *
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.=
21 */
22
23#ifndef IT913X_PRIV_H
24#define IT913X_PRIV_H
25
26#include "tuner_it913x.h"
27#include "af9033.h"
28
29#define PRO_LINK 0x0
30#define PRO_DMOD 0x1
31#define TRIGGER_OFSM 0x0000
32
33struct it913xset { u32 pro;
34 u32 address;
35 u8 reg[15];
36 u8 count;
37};
38
39/* Tuner setting scripts (still keeping it9137) */
40static struct it913xset it9137_tuner_off[] = {
41 {PRO_DMOD, 0xfba8, {0x01}, 0x01}, /* Tuner Clock Off */
42 {PRO_DMOD, 0xec40, {0x00}, 0x01}, /* Power Down Tuner */
43 {PRO_DMOD, 0xec02, {0x3f, 0x1f, 0x3f, 0x3f}, 0x04},
44 {PRO_DMOD, 0xec06, {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
45 0x00, 0x00, 0x00, 0x00}, 0x0c},
46 {PRO_DMOD, 0xec12, {0x00, 0x00, 0x00, 0x00}, 0x04},
47 {PRO_DMOD, 0xec17, {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
48 0x00}, 0x09},
49 {PRO_DMOD, 0xec22, {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
50 0x00, 0x00}, 0x0a},
51 {PRO_DMOD, 0xec20, {0x00}, 0x01},
52 {PRO_DMOD, 0xec3f, {0x01}, 0x01},
53 {0xff, 0x0000, {0x00}, 0x00}, /* Terminating Entry */
54};
55
56static struct it913xset set_it9135_template[] = {
57 {PRO_DMOD, 0xee06, {0x00}, 0x01},
58 {PRO_DMOD, 0xec56, {0x00}, 0x01},
59 {PRO_DMOD, 0xec4c, {0x00}, 0x01},
60 {PRO_DMOD, 0xec4d, {0x00}, 0x01},
61 {PRO_DMOD, 0xec4e, {0x00}, 0x01},
62 {PRO_DMOD, 0x011e, {0x00}, 0x01}, /* Older Devices */
63 {PRO_DMOD, 0x011f, {0x00}, 0x01},
64 {0xff, 0x0000, {0x00}, 0x00}, /* Terminating Entry */
65};
66
67static struct it913xset set_it9137_template[] = {
68 {PRO_DMOD, 0xee06, {0x00}, 0x01},
69 {PRO_DMOD, 0xec56, {0x00}, 0x01},
70 {PRO_DMOD, 0xec4c, {0x00}, 0x01},
71 {PRO_DMOD, 0xec4d, {0x00}, 0x01},
72 {PRO_DMOD, 0xec4e, {0x00}, 0x01},
73 {PRO_DMOD, 0xec4f, {0x00}, 0x01},
74 {PRO_DMOD, 0xec50, {0x00}, 0x01},
75 {0xff, 0x0000, {0x00}, 0x00}, /* Terminating Entry */
76};
77
78#endif
diff --git a/drivers/media/tuners/xc4000.c b/drivers/media/tuners/xc4000.c
index f9ab79e3432d..219ebafae70f 100644
--- a/drivers/media/tuners/xc4000.c
+++ b/drivers/media/tuners/xc4000.c
@@ -569,67 +569,67 @@ static int xc4000_readreg(struct xc4000_priv *priv, u16 reg, u16 *val)
569#define dump_firm_type(t) dump_firm_type_and_int_freq(t, 0) 569#define dump_firm_type(t) dump_firm_type_and_int_freq(t, 0)
570static void dump_firm_type_and_int_freq(unsigned int type, u16 int_freq) 570static void dump_firm_type_and_int_freq(unsigned int type, u16 int_freq)
571{ 571{
572 if (type & BASE) 572 if (type & BASE)
573 printk(KERN_CONT "BASE "); 573 printk(KERN_CONT "BASE ");
574 if (type & INIT1) 574 if (type & INIT1)
575 printk(KERN_CONT "INIT1 "); 575 printk(KERN_CONT "INIT1 ");
576 if (type & F8MHZ) 576 if (type & F8MHZ)
577 printk(KERN_CONT "F8MHZ "); 577 printk(KERN_CONT "F8MHZ ");
578 if (type & MTS) 578 if (type & MTS)
579 printk(KERN_CONT "MTS "); 579 printk(KERN_CONT "MTS ");
580 if (type & D2620) 580 if (type & D2620)
581 printk(KERN_CONT "D2620 "); 581 printk(KERN_CONT "D2620 ");
582 if (type & D2633) 582 if (type & D2633)
583 printk(KERN_CONT "D2633 "); 583 printk(KERN_CONT "D2633 ");
584 if (type & DTV6) 584 if (type & DTV6)
585 printk(KERN_CONT "DTV6 "); 585 printk(KERN_CONT "DTV6 ");
586 if (type & QAM) 586 if (type & QAM)
587 printk(KERN_CONT "QAM "); 587 printk(KERN_CONT "QAM ");
588 if (type & DTV7) 588 if (type & DTV7)
589 printk(KERN_CONT "DTV7 "); 589 printk(KERN_CONT "DTV7 ");
590 if (type & DTV78) 590 if (type & DTV78)
591 printk(KERN_CONT "DTV78 "); 591 printk(KERN_CONT "DTV78 ");
592 if (type & DTV8) 592 if (type & DTV8)
593 printk(KERN_CONT "DTV8 "); 593 printk(KERN_CONT "DTV8 ");
594 if (type & FM) 594 if (type & FM)
595 printk(KERN_CONT "FM "); 595 printk(KERN_CONT "FM ");
596 if (type & INPUT1) 596 if (type & INPUT1)
597 printk(KERN_CONT "INPUT1 "); 597 printk(KERN_CONT "INPUT1 ");
598 if (type & LCD) 598 if (type & LCD)
599 printk(KERN_CONT "LCD "); 599 printk(KERN_CONT "LCD ");
600 if (type & NOGD) 600 if (type & NOGD)
601 printk(KERN_CONT "NOGD "); 601 printk(KERN_CONT "NOGD ");
602 if (type & MONO) 602 if (type & MONO)
603 printk(KERN_CONT "MONO "); 603 printk(KERN_CONT "MONO ");
604 if (type & ATSC) 604 if (type & ATSC)
605 printk(KERN_CONT "ATSC "); 605 printk(KERN_CONT "ATSC ");
606 if (type & IF) 606 if (type & IF)
607 printk(KERN_CONT "IF "); 607 printk(KERN_CONT "IF ");
608 if (type & LG60) 608 if (type & LG60)
609 printk(KERN_CONT "LG60 "); 609 printk(KERN_CONT "LG60 ");
610 if (type & ATI638) 610 if (type & ATI638)
611 printk(KERN_CONT "ATI638 "); 611 printk(KERN_CONT "ATI638 ");
612 if (type & OREN538) 612 if (type & OREN538)
613 printk(KERN_CONT "OREN538 "); 613 printk(KERN_CONT "OREN538 ");
614 if (type & OREN36) 614 if (type & OREN36)
615 printk(KERN_CONT "OREN36 "); 615 printk(KERN_CONT "OREN36 ");
616 if (type & TOYOTA388) 616 if (type & TOYOTA388)
617 printk(KERN_CONT "TOYOTA388 "); 617 printk(KERN_CONT "TOYOTA388 ");
618 if (type & TOYOTA794) 618 if (type & TOYOTA794)
619 printk(KERN_CONT "TOYOTA794 "); 619 printk(KERN_CONT "TOYOTA794 ");
620 if (type & DIBCOM52) 620 if (type & DIBCOM52)
621 printk(KERN_CONT "DIBCOM52 "); 621 printk(KERN_CONT "DIBCOM52 ");
622 if (type & ZARLINK456) 622 if (type & ZARLINK456)
623 printk(KERN_CONT "ZARLINK456 "); 623 printk(KERN_CONT "ZARLINK456 ");
624 if (type & CHINA) 624 if (type & CHINA)
625 printk(KERN_CONT "CHINA "); 625 printk(KERN_CONT "CHINA ");
626 if (type & F6MHZ) 626 if (type & F6MHZ)
627 printk(KERN_CONT "F6MHZ "); 627 printk(KERN_CONT "F6MHZ ");
628 if (type & INPUT2) 628 if (type & INPUT2)
629 printk(KERN_CONT "INPUT2 "); 629 printk(KERN_CONT "INPUT2 ");
630 if (type & SCODE) 630 if (type & SCODE)
631 printk(KERN_CONT "SCODE "); 631 printk(KERN_CONT "SCODE ");
632 if (type & HAS_IF) 632 if (type & HAS_IF)
633 printk(KERN_CONT "HAS_IF_%d ", int_freq); 633 printk(KERN_CONT "HAS_IF_%d ", int_freq);
634} 634}
635 635
diff --git a/drivers/media/tuners/xc5000.c b/drivers/media/tuners/xc5000.c
index e135760f7d48..e44c8aba6074 100644
--- a/drivers/media/tuners/xc5000.c
+++ b/drivers/media/tuners/xc5000.c
@@ -59,6 +59,7 @@ struct xc5000_priv {
59 u32 freq_hz, freq_offset; 59 u32 freq_hz, freq_offset;
60 u32 bandwidth; 60 u32 bandwidth;
61 u8 video_standard; 61 u8 video_standard;
62 unsigned int mode;
62 u8 rf_mode; 63 u8 rf_mode;
63 u8 radio_input; 64 u8 radio_input;
64 65
@@ -69,6 +70,8 @@ struct xc5000_priv {
69 70
70 struct dvb_frontend *fe; 71 struct dvb_frontend *fe;
71 struct delayed_work timer_sleep; 72 struct delayed_work timer_sleep;
73
74 const struct firmware *firmware;
72}; 75};
73 76
74/* Misc Defines */ 77/* Misc Defines */
@@ -712,9 +715,50 @@ static void xc_debug_dump(struct xc5000_priv *priv)
712 } 715 }
713} 716}
714 717
715static int xc5000_set_params(struct dvb_frontend *fe) 718static int xc5000_tune_digital(struct dvb_frontend *fe)
719{
720 struct xc5000_priv *priv = fe->tuner_priv;
721 int ret;
722 u32 bw = fe->dtv_property_cache.bandwidth_hz;
723
724 ret = xc_set_signal_source(priv, priv->rf_mode);
725 if (ret != 0) {
726 printk(KERN_ERR
727 "xc5000: xc_set_signal_source(%d) failed\n",
728 priv->rf_mode);
729 return -EREMOTEIO;
730 }
731
732 ret = xc_set_tv_standard(priv,
733 xc5000_standard[priv->video_standard].video_mode,
734 xc5000_standard[priv->video_standard].audio_mode, 0);
735 if (ret != 0) {
736 printk(KERN_ERR "xc5000: xc_set_tv_standard failed\n");
737 return -EREMOTEIO;
738 }
739
740 ret = xc_set_IF_frequency(priv, priv->if_khz);
741 if (ret != 0) {
742 printk(KERN_ERR "xc5000: xc_Set_IF_frequency(%d) failed\n",
743 priv->if_khz);
744 return -EIO;
745 }
746
747 xc_write_reg(priv, XREG_OUTPUT_AMP, 0x8a);
748
749 xc_tune_channel(priv, priv->freq_hz, XC_TUNE_DIGITAL);
750
751 if (debug)
752 xc_debug_dump(priv);
753
754 priv->bandwidth = bw;
755
756 return 0;
757}
758
759static int xc5000_set_digital_params(struct dvb_frontend *fe)
716{ 760{
717 int ret, b; 761 int b;
718 struct xc5000_priv *priv = fe->tuner_priv; 762 struct xc5000_priv *priv = fe->tuner_priv;
719 u32 bw = fe->dtv_property_cache.bandwidth_hz; 763 u32 bw = fe->dtv_property_cache.bandwidth_hz;
720 u32 freq = fe->dtv_property_cache.frequency; 764 u32 freq = fe->dtv_property_cache.frequency;
@@ -794,43 +838,12 @@ static int xc5000_set_params(struct dvb_frontend *fe)
794 } 838 }
795 839
796 priv->freq_hz = freq - priv->freq_offset; 840 priv->freq_hz = freq - priv->freq_offset;
841 priv->mode = V4L2_TUNER_DIGITAL_TV;
797 842
798 dprintk(1, "%s() frequency=%d (compensated to %d)\n", 843 dprintk(1, "%s() frequency=%d (compensated to %d)\n",
799 __func__, freq, priv->freq_hz); 844 __func__, freq, priv->freq_hz);
800 845
801 ret = xc_set_signal_source(priv, priv->rf_mode); 846 return xc5000_tune_digital(fe);
802 if (ret != 0) {
803 printk(KERN_ERR
804 "xc5000: xc_set_signal_source(%d) failed\n",
805 priv->rf_mode);
806 return -EREMOTEIO;
807 }
808
809 ret = xc_set_tv_standard(priv,
810 xc5000_standard[priv->video_standard].video_mode,
811 xc5000_standard[priv->video_standard].audio_mode, 0);
812 if (ret != 0) {
813 printk(KERN_ERR "xc5000: xc_set_tv_standard failed\n");
814 return -EREMOTEIO;
815 }
816
817 ret = xc_set_IF_frequency(priv, priv->if_khz);
818 if (ret != 0) {
819 printk(KERN_ERR "xc5000: xc_Set_IF_frequency(%d) failed\n",
820 priv->if_khz);
821 return -EIO;
822 }
823
824 xc_write_reg(priv, XREG_OUTPUT_AMP, 0x8a);
825
826 xc_tune_channel(priv, priv->freq_hz, XC_TUNE_DIGITAL);
827
828 if (debug)
829 xc_debug_dump(priv);
830
831 priv->bandwidth = bw;
832
833 return 0;
834} 847}
835 848
836static int xc5000_is_firmware_loaded(struct dvb_frontend *fe) 849static int xc5000_is_firmware_loaded(struct dvb_frontend *fe)
@@ -852,12 +865,10 @@ static int xc5000_is_firmware_loaded(struct dvb_frontend *fe)
852 return ret; 865 return ret;
853} 866}
854 867
855static int xc5000_set_tv_freq(struct dvb_frontend *fe, 868static void xc5000_config_tv(struct dvb_frontend *fe,
856 struct analog_parameters *params) 869 struct analog_parameters *params)
857{ 870{
858 struct xc5000_priv *priv = fe->tuner_priv; 871 struct xc5000_priv *priv = fe->tuner_priv;
859 u16 pll_lock_status;
860 int ret;
861 872
862 dprintk(1, "%s() frequency=%d (in units of 62.5khz)\n", 873 dprintk(1, "%s() frequency=%d (in units of 62.5khz)\n",
863 __func__, params->frequency); 874 __func__, params->frequency);
@@ -876,42 +887,49 @@ static int xc5000_set_tv_freq(struct dvb_frontend *fe,
876 if (params->std & V4L2_STD_MN) { 887 if (params->std & V4L2_STD_MN) {
877 /* default to BTSC audio standard */ 888 /* default to BTSC audio standard */
878 priv->video_standard = MN_NTSC_PAL_BTSC; 889 priv->video_standard = MN_NTSC_PAL_BTSC;
879 goto tune_channel; 890 return;
880 } 891 }
881 892
882 if (params->std & V4L2_STD_PAL_BG) { 893 if (params->std & V4L2_STD_PAL_BG) {
883 /* default to NICAM audio standard */ 894 /* default to NICAM audio standard */
884 priv->video_standard = BG_PAL_NICAM; 895 priv->video_standard = BG_PAL_NICAM;
885 goto tune_channel; 896 return;
886 } 897 }
887 898
888 if (params->std & V4L2_STD_PAL_I) { 899 if (params->std & V4L2_STD_PAL_I) {
889 /* default to NICAM audio standard */ 900 /* default to NICAM audio standard */
890 priv->video_standard = I_PAL_NICAM; 901 priv->video_standard = I_PAL_NICAM;
891 goto tune_channel; 902 return;
892 } 903 }
893 904
894 if (params->std & V4L2_STD_PAL_DK) { 905 if (params->std & V4L2_STD_PAL_DK) {
895 /* default to NICAM audio standard */ 906 /* default to NICAM audio standard */
896 priv->video_standard = DK_PAL_NICAM; 907 priv->video_standard = DK_PAL_NICAM;
897 goto tune_channel; 908 return;
898 } 909 }
899 910
900 if (params->std & V4L2_STD_SECAM_DK) { 911 if (params->std & V4L2_STD_SECAM_DK) {
901 /* default to A2 DK1 audio standard */ 912 /* default to A2 DK1 audio standard */
902 priv->video_standard = DK_SECAM_A2DK1; 913 priv->video_standard = DK_SECAM_A2DK1;
903 goto tune_channel; 914 return;
904 } 915 }
905 916
906 if (params->std & V4L2_STD_SECAM_L) { 917 if (params->std & V4L2_STD_SECAM_L) {
907 priv->video_standard = L_SECAM_NICAM; 918 priv->video_standard = L_SECAM_NICAM;
908 goto tune_channel; 919 return;
909 } 920 }
910 921
911 if (params->std & V4L2_STD_SECAM_LC) { 922 if (params->std & V4L2_STD_SECAM_LC) {
912 priv->video_standard = LC_SECAM_NICAM; 923 priv->video_standard = LC_SECAM_NICAM;
913 goto tune_channel; 924 return;
914 } 925 }
926}
927
928static int xc5000_set_tv_freq(struct dvb_frontend *fe)
929{
930 struct xc5000_priv *priv = fe->tuner_priv;
931 u16 pll_lock_status;
932 int ret;
915 933
916tune_channel: 934tune_channel:
917 ret = xc_set_signal_source(priv, priv->rf_mode); 935 ret = xc_set_signal_source(priv, priv->rf_mode);
@@ -955,12 +973,11 @@ tune_channel:
955 return 0; 973 return 0;
956} 974}
957 975
958static int xc5000_set_radio_freq(struct dvb_frontend *fe, 976static int xc5000_config_radio(struct dvb_frontend *fe,
959 struct analog_parameters *params) 977 struct analog_parameters *params)
978
960{ 979{
961 struct xc5000_priv *priv = fe->tuner_priv; 980 struct xc5000_priv *priv = fe->tuner_priv;
962 int ret = -EINVAL;
963 u8 radio_input;
964 981
965 dprintk(1, "%s() frequency=%d (in units of khz)\n", 982 dprintk(1, "%s() frequency=%d (in units of khz)\n",
966 __func__, params->frequency); 983 __func__, params->frequency);
@@ -970,6 +987,18 @@ static int xc5000_set_radio_freq(struct dvb_frontend *fe,
970 return -EINVAL; 987 return -EINVAL;
971 } 988 }
972 989
990 priv->freq_hz = params->frequency * 125 / 2;
991 priv->rf_mode = XC_RF_MODE_AIR;
992
993 return 0;
994}
995
996static int xc5000_set_radio_freq(struct dvb_frontend *fe)
997{
998 struct xc5000_priv *priv = fe->tuner_priv;
999 int ret;
1000 u8 radio_input;
1001
973 if (priv->radio_input == XC5000_RADIO_FM1) 1002 if (priv->radio_input == XC5000_RADIO_FM1)
974 radio_input = FM_RADIO_INPUT1; 1003 radio_input = FM_RADIO_INPUT1;
975 else if (priv->radio_input == XC5000_RADIO_FM2) 1004 else if (priv->radio_input == XC5000_RADIO_FM2)
@@ -982,10 +1011,6 @@ static int xc5000_set_radio_freq(struct dvb_frontend *fe,
982 return -EINVAL; 1011 return -EINVAL;
983 } 1012 }
984 1013
985 priv->freq_hz = params->frequency * 125 / 2;
986
987 priv->rf_mode = XC_RF_MODE_AIR;
988
989 ret = xc_set_tv_standard(priv, xc5000_standard[radio_input].video_mode, 1014 ret = xc_set_tv_standard(priv, xc5000_standard[radio_input].video_mode,
990 xc5000_standard[radio_input].audio_mode, radio_input); 1015 xc5000_standard[radio_input].audio_mode, radio_input);
991 1016
@@ -1013,34 +1038,53 @@ static int xc5000_set_radio_freq(struct dvb_frontend *fe,
1013 return 0; 1038 return 0;
1014} 1039}
1015 1040
1016static int xc5000_set_analog_params(struct dvb_frontend *fe, 1041static int xc5000_set_params(struct dvb_frontend *fe)
1017 struct analog_parameters *params)
1018{ 1042{
1019 struct xc5000_priv *priv = fe->tuner_priv; 1043 struct xc5000_priv *priv = fe->tuner_priv;
1020 int ret = -EINVAL;
1021
1022 if (priv->i2c_props.adap == NULL)
1023 return -EINVAL;
1024 1044
1025 if (xc_load_fw_and_init_tuner(fe, 0) != 0) { 1045 if (xc_load_fw_and_init_tuner(fe, 0) != 0) {
1026 dprintk(1, "Unable to load firmware and init tuner\n"); 1046 dprintk(1, "Unable to load firmware and init tuner\n");
1027 return -EINVAL; 1047 return -EINVAL;
1028 } 1048 }
1029 1049
1050 switch (priv->mode) {
1051 case V4L2_TUNER_RADIO:
1052 return xc5000_set_radio_freq(fe);
1053 case V4L2_TUNER_ANALOG_TV:
1054 return xc5000_set_tv_freq(fe);
1055 case V4L2_TUNER_DIGITAL_TV:
1056 return xc5000_tune_digital(fe);
1057 }
1058
1059 return 0;
1060}
1061
1062static int xc5000_set_analog_params(struct dvb_frontend *fe,
1063 struct analog_parameters *params)
1064{
1065 struct xc5000_priv *priv = fe->tuner_priv;
1066 int ret;
1067
1068 if (priv->i2c_props.adap == NULL)
1069 return -EINVAL;
1070
1030 switch (params->mode) { 1071 switch (params->mode) {
1031 case V4L2_TUNER_RADIO: 1072 case V4L2_TUNER_RADIO:
1032 ret = xc5000_set_radio_freq(fe, params); 1073 ret = xc5000_config_radio(fe, params);
1074 if (ret)
1075 return ret;
1033 break; 1076 break;
1034 case V4L2_TUNER_ANALOG_TV: 1077 case V4L2_TUNER_ANALOG_TV:
1035 case V4L2_TUNER_DIGITAL_TV: 1078 xc5000_config_tv(fe, params);
1036 ret = xc5000_set_tv_freq(fe, params); 1079 break;
1080 default:
1037 break; 1081 break;
1038 } 1082 }
1083 priv->mode = params->mode;
1039 1084
1040 return ret; 1085 return xc5000_set_params(fe);
1041} 1086}
1042 1087
1043
1044static int xc5000_get_frequency(struct dvb_frontend *fe, u32 *freq) 1088static int xc5000_get_frequency(struct dvb_frontend *fe, u32 *freq)
1045{ 1089{
1046 struct xc5000_priv *priv = fe->tuner_priv; 1090 struct xc5000_priv *priv = fe->tuner_priv;
@@ -1094,20 +1138,23 @@ static int xc_load_fw_and_init_tuner(struct dvb_frontend *fe, int force)
1094 if (!force && xc5000_is_firmware_loaded(fe) == 0) 1138 if (!force && xc5000_is_firmware_loaded(fe) == 0)
1095 return 0; 1139 return 0;
1096 1140
1097 ret = request_firmware(&fw, desired_fw->name, 1141 if (!priv->firmware) {
1098 priv->i2c_props.adap->dev.parent); 1142 ret = request_firmware(&fw, desired_fw->name,
1099 if (ret) { 1143 priv->i2c_props.adap->dev.parent);
1100 printk(KERN_ERR "xc5000: Upload failed. (file not found?)\n"); 1144 if (ret) {
1101 return ret; 1145 pr_err("xc5000: Upload failed. rc %d\n", ret);
1102 } 1146 return ret;
1103 1147 }
1104 dprintk(1, "firmware read %Zu bytes.\n", fw->size); 1148 dprintk(1, "firmware read %Zu bytes.\n", fw->size);
1105 1149
1106 if (fw->size != desired_fw->size) { 1150 if (fw->size != desired_fw->size) {
1107 printk(KERN_ERR "xc5000: Firmware file with incorrect size\n"); 1151 pr_err("xc5000: Firmware file with incorrect size\n");
1108 ret = -EINVAL; 1152 release_firmware(fw);
1109 goto err; 1153 return -EINVAL;
1110 } 1154 }
1155 priv->firmware = fw;
1156 } else
1157 fw = priv->firmware;
1111 1158
1112 /* Try up to 5 times to load firmware */ 1159 /* Try up to 5 times to load firmware */
1113 for (i = 0; i < 5; i++) { 1160 for (i = 0; i < 5; i++) {
@@ -1190,7 +1237,6 @@ err:
1190 else 1237 else
1191 printk(KERN_CONT " - too many retries. Giving up\n"); 1238 printk(KERN_CONT " - too many retries. Giving up\n");
1192 1239
1193 release_firmware(fw);
1194 return ret; 1240 return ret;
1195} 1241}
1196 1242
@@ -1229,6 +1275,38 @@ static int xc5000_sleep(struct dvb_frontend *fe)
1229 return 0; 1275 return 0;
1230} 1276}
1231 1277
1278static int xc5000_suspend(struct dvb_frontend *fe)
1279{
1280 struct xc5000_priv *priv = fe->tuner_priv;
1281 int ret;
1282
1283 dprintk(1, "%s()\n", __func__);
1284
1285 cancel_delayed_work(&priv->timer_sleep);
1286
1287 ret = xc5000_tuner_reset(fe);
1288 if (ret != 0)
1289 printk(KERN_ERR
1290 "xc5000: %s() unable to shutdown tuner\n",
1291 __func__);
1292
1293 return 0;
1294}
1295
1296static int xc5000_resume(struct dvb_frontend *fe)
1297{
1298 struct xc5000_priv *priv = fe->tuner_priv;
1299
1300 dprintk(1, "%s()\n", __func__);
1301
1302 /* suspended before firmware is loaded.
1303 Avoid firmware load in resume path. */
1304 if (!priv->firmware)
1305 return 0;
1306
1307 return xc5000_set_params(fe);
1308}
1309
1232static int xc5000_init(struct dvb_frontend *fe) 1310static int xc5000_init(struct dvb_frontend *fe)
1233{ 1311{
1234 struct xc5000_priv *priv = fe->tuner_priv; 1312 struct xc5000_priv *priv = fe->tuner_priv;
@@ -1256,6 +1334,8 @@ static int xc5000_release(struct dvb_frontend *fe)
1256 if (priv) { 1334 if (priv) {
1257 cancel_delayed_work(&priv->timer_sleep); 1335 cancel_delayed_work(&priv->timer_sleep);
1258 hybrid_tuner_release_state(priv); 1336 hybrid_tuner_release_state(priv);
1337 if (priv->firmware)
1338 release_firmware(priv->firmware);
1259 } 1339 }
1260 1340
1261 mutex_unlock(&xc5000_list_mutex); 1341 mutex_unlock(&xc5000_list_mutex);
@@ -1293,9 +1373,11 @@ static const struct dvb_tuner_ops xc5000_tuner_ops = {
1293 .release = xc5000_release, 1373 .release = xc5000_release,
1294 .init = xc5000_init, 1374 .init = xc5000_init,
1295 .sleep = xc5000_sleep, 1375 .sleep = xc5000_sleep,
1376 .suspend = xc5000_suspend,
1377 .resume = xc5000_resume,
1296 1378
1297 .set_config = xc5000_set_config, 1379 .set_config = xc5000_set_config,
1298 .set_params = xc5000_set_params, 1380 .set_params = xc5000_set_digital_params,
1299 .set_analog_params = xc5000_set_analog_params, 1381 .set_analog_params = xc5000_set_analog_params,
1300 .get_frequency = xc5000_get_frequency, 1382 .get_frequency = xc5000_get_frequency,
1301 .get_if_frequency = xc5000_get_if_frequency, 1383 .get_if_frequency = xc5000_get_if_frequency,
diff --git a/drivers/media/usb/Kconfig b/drivers/media/usb/Kconfig
index 94d51e092db3..056181f2f569 100644
--- a/drivers/media/usb/Kconfig
+++ b/drivers/media/usb/Kconfig
@@ -46,6 +46,7 @@ source "drivers/media/usb/ttusb-budget/Kconfig"
46source "drivers/media/usb/ttusb-dec/Kconfig" 46source "drivers/media/usb/ttusb-dec/Kconfig"
47source "drivers/media/usb/siano/Kconfig" 47source "drivers/media/usb/siano/Kconfig"
48source "drivers/media/usb/b2c2/Kconfig" 48source "drivers/media/usb/b2c2/Kconfig"
49source "drivers/media/usb/as102/Kconfig"
49endif 50endif
50 51
51if (MEDIA_CAMERA_SUPPORT || MEDIA_ANALOG_TV_SUPPORT || MEDIA_DIGITAL_TV_SUPPORT) 52if (MEDIA_CAMERA_SUPPORT || MEDIA_ANALOG_TV_SUPPORT || MEDIA_DIGITAL_TV_SUPPORT)
@@ -55,8 +56,9 @@ endif
55 56
56if MEDIA_SDR_SUPPORT 57if MEDIA_SDR_SUPPORT
57 comment "Software defined radio USB devices" 58 comment "Software defined radio USB devices"
58source "drivers/media/usb/msi2500/Kconfig"
59source "drivers/media/usb/airspy/Kconfig" 59source "drivers/media/usb/airspy/Kconfig"
60source "drivers/media/usb/hackrf/Kconfig"
61source "drivers/media/usb/msi2500/Kconfig"
60endif 62endif
61 63
62endif #MEDIA_USB_SUPPORT 64endif #MEDIA_USB_SUPPORT
diff --git a/drivers/media/usb/Makefile b/drivers/media/usb/Makefile
index f438efffefc5..6f2eb7c8416c 100644
--- a/drivers/media/usb/Makefile
+++ b/drivers/media/usb/Makefile
@@ -9,8 +9,9 @@ obj-y += zr364xx/ stkwebcam/ s2255/
9obj-$(CONFIG_USB_VIDEO_CLASS) += uvc/ 9obj-$(CONFIG_USB_VIDEO_CLASS) += uvc/
10obj-$(CONFIG_USB_GSPCA) += gspca/ 10obj-$(CONFIG_USB_GSPCA) += gspca/
11obj-$(CONFIG_USB_PWC) += pwc/ 11obj-$(CONFIG_USB_PWC) += pwc/
12obj-$(CONFIG_USB_MSI2500) += msi2500/
13obj-$(CONFIG_USB_AIRSPY) += airspy/ 12obj-$(CONFIG_USB_AIRSPY) += airspy/
13obj-$(CONFIG_USB_HACKRF) += hackrf/
14obj-$(CONFIG_USB_MSI2500) += msi2500/
14obj-$(CONFIG_VIDEO_CPIA2) += cpia2/ 15obj-$(CONFIG_VIDEO_CPIA2) += cpia2/
15obj-$(CONFIG_VIDEO_AU0828) += au0828/ 16obj-$(CONFIG_VIDEO_AU0828) += au0828/
16obj-$(CONFIG_VIDEO_HDPVR) += hdpvr/ 17obj-$(CONFIG_VIDEO_HDPVR) += hdpvr/
@@ -23,3 +24,4 @@ obj-$(CONFIG_VIDEO_TM6000) += tm6000/
23obj-$(CONFIG_VIDEO_EM28XX) += em28xx/ 24obj-$(CONFIG_VIDEO_EM28XX) += em28xx/
24obj-$(CONFIG_VIDEO_USBTV) += usbtv/ 25obj-$(CONFIG_VIDEO_USBTV) += usbtv/
25obj-$(CONFIG_VIDEO_GO7007) += go7007/ 26obj-$(CONFIG_VIDEO_GO7007) += go7007/
27obj-$(CONFIG_DVB_AS102) += as102/
diff --git a/drivers/media/usb/airspy/airspy.c b/drivers/media/usb/airspy/airspy.c
index cb0e515d80ae..4069234abed5 100644
--- a/drivers/media/usb/airspy/airspy.c
+++ b/drivers/media/usb/airspy/airspy.c
@@ -107,6 +107,7 @@ struct airspy {
107#define USB_STATE_URB_BUF (1 << 3) 107#define USB_STATE_URB_BUF (1 << 3)
108 unsigned long flags; 108 unsigned long flags;
109 109
110 struct device *dev;
110 struct usb_device *udev; 111 struct usb_device *udev;
111 struct video_device vdev; 112 struct video_device vdev;
112 struct v4l2_device v4l2_dev; 113 struct v4l2_device v4l2_dev;
@@ -154,16 +155,15 @@ struct airspy {
154 unsigned int sample_measured; 155 unsigned int sample_measured;
155}; 156};
156 157
157#define airspy_dbg_usb_control_msg(_udev, _r, _t, _v, _i, _b, _l) { \ 158#define airspy_dbg_usb_control_msg(_dev, _r, _t, _v, _i, _b, _l) { \
158 char *_direction; \ 159 char *_direction; \
159 if (_t & USB_DIR_IN) \ 160 if (_t & USB_DIR_IN) \
160 _direction = "<<<"; \ 161 _direction = "<<<"; \
161 else \ 162 else \
162 _direction = ">>>"; \ 163 _direction = ">>>"; \
163 dev_dbg(&_udev->dev, "%s: %02x %02x %02x %02x %02x %02x %02x %02x " \ 164 dev_dbg(_dev, "%02x %02x %02x %02x %02x %02x %02x %02x %s %*ph\n", \
164 "%s %*ph\n", __func__, _t, _r, _v & 0xff, _v >> 8, \ 165 _t, _r, _v & 0xff, _v >> 8, _i & 0xff, _i >> 8, \
165 _i & 0xff, _i >> 8, _l & 0xff, _l >> 8, _direction, \ 166 _l & 0xff, _l >> 8, _direction, _l, _b); \
166 _l, _b); \
167} 167}
168 168
169/* execute firmware command */ 169/* execute firmware command */
@@ -192,7 +192,7 @@ static int airspy_ctrl_msg(struct airspy *s, u8 request, u16 value, u16 index,
192 requesttype = (USB_TYPE_VENDOR | USB_DIR_IN); 192 requesttype = (USB_TYPE_VENDOR | USB_DIR_IN);
193 break; 193 break;
194 default: 194 default:
195 dev_err(&s->udev->dev, "Unknown command %02x\n", request); 195 dev_err(s->dev, "Unknown command %02x\n", request);
196 ret = -EINVAL; 196 ret = -EINVAL;
197 goto err; 197 goto err;
198 } 198 }
@@ -203,11 +203,10 @@ static int airspy_ctrl_msg(struct airspy *s, u8 request, u16 value, u16 index,
203 203
204 ret = usb_control_msg(s->udev, pipe, request, requesttype, value, 204 ret = usb_control_msg(s->udev, pipe, request, requesttype, value,
205 index, s->buf, size, 1000); 205 index, s->buf, size, 1000);
206 airspy_dbg_usb_control_msg(s->udev, request, requesttype, value, 206 airspy_dbg_usb_control_msg(s->dev, request, requesttype, value,
207 index, s->buf, size); 207 index, s->buf, size);
208 if (ret < 0) { 208 if (ret < 0) {
209 dev_err(&s->udev->dev, 209 dev_err(s->dev, "usb_control_msg() failed %d request %02x\n",
210 "usb_control_msg() failed %d request %02x\n",
211 ret, request); 210 ret, request);
212 goto err; 211 goto err;
213 } 212 }
@@ -224,7 +223,7 @@ err:
224/* Private functions */ 223/* Private functions */
225static struct airspy_frame_buf *airspy_get_next_fill_buf(struct airspy *s) 224static struct airspy_frame_buf *airspy_get_next_fill_buf(struct airspy *s)
226{ 225{
227 unsigned long flags = 0; 226 unsigned long flags;
228 struct airspy_frame_buf *buf = NULL; 227 struct airspy_frame_buf *buf = NULL;
229 228
230 spin_lock_irqsave(&s->queued_bufs_lock, flags); 229 spin_lock_irqsave(&s->queued_bufs_lock, flags);
@@ -251,16 +250,18 @@ static unsigned int airspy_convert_stream(struct airspy *s,
251 dst_len = 0; 250 dst_len = 0;
252 } 251 }
253 252
254 /* calculate samping rate and output it in 10 seconds intervals */ 253 /* calculate sample rate and output it in 10 seconds intervals */
255 if (unlikely(time_is_before_jiffies(s->jiffies_next))) { 254 if (unlikely(time_is_before_jiffies(s->jiffies_next))) {
256 #define MSECS 10000UL 255 #define MSECS 10000UL
256 unsigned int msecs = jiffies_to_msecs(jiffies -
257 s->jiffies_next + msecs_to_jiffies(MSECS));
257 unsigned int samples = s->sample - s->sample_measured; 258 unsigned int samples = s->sample - s->sample_measured;
259
258 s->jiffies_next = jiffies + msecs_to_jiffies(MSECS); 260 s->jiffies_next = jiffies + msecs_to_jiffies(MSECS);
259 s->sample_measured = s->sample; 261 s->sample_measured = s->sample;
260 dev_dbg(&s->udev->dev, 262 dev_dbg(s->dev, "slen=%u samples=%u msecs=%u sample rate=%lu\n",
261 "slen=%d samples=%u msecs=%lu sample rate=%lu\n", 263 src_len, samples, msecs,
262 src_len, samples, MSECS, 264 samples * 1000UL / msecs);
263 samples * 1000UL / MSECS);
264 } 265 }
265 266
266 /* total number of samples */ 267 /* total number of samples */
@@ -278,9 +279,8 @@ static void airspy_urb_complete(struct urb *urb)
278 struct airspy *s = urb->context; 279 struct airspy *s = urb->context;
279 struct airspy_frame_buf *fbuf; 280 struct airspy_frame_buf *fbuf;
280 281
281 dev_dbg_ratelimited(&s->udev->dev, 282 dev_dbg_ratelimited(s->dev, "status=%d length=%d/%d errors=%d\n",
282 "%s: status=%d length=%d/%d errors=%d\n", 283 urb->status, urb->actual_length,
283 __func__, urb->status, urb->actual_length,
284 urb->transfer_buffer_length, urb->error_count); 284 urb->transfer_buffer_length, urb->error_count);
285 285
286 switch (urb->status) { 286 switch (urb->status) {
@@ -292,8 +292,7 @@ static void airspy_urb_complete(struct urb *urb)
292 case -ESHUTDOWN: 292 case -ESHUTDOWN:
293 return; 293 return;
294 default: /* error */ 294 default: /* error */
295 dev_err_ratelimited(&s->udev->dev, "URB failed %d\n", 295 dev_err_ratelimited(s->dev, "URB failed %d\n", urb->status);
296 urb->status);
297 break; 296 break;
298 } 297 }
299 298
@@ -304,7 +303,7 @@ static void airspy_urb_complete(struct urb *urb)
304 fbuf = airspy_get_next_fill_buf(s); 303 fbuf = airspy_get_next_fill_buf(s);
305 if (unlikely(fbuf == NULL)) { 304 if (unlikely(fbuf == NULL)) {
306 s->vb_full++; 305 s->vb_full++;
307 dev_notice_ratelimited(&s->udev->dev, 306 dev_notice_ratelimited(s->dev,
308 "videobuf is full, %d packets dropped\n", 307 "videobuf is full, %d packets dropped\n",
309 s->vb_full); 308 s->vb_full);
310 goto skip; 309 goto skip;
@@ -328,7 +327,7 @@ static int airspy_kill_urbs(struct airspy *s)
328 int i; 327 int i;
329 328
330 for (i = s->urbs_submitted - 1; i >= 0; i--) { 329 for (i = s->urbs_submitted - 1; i >= 0; i--) {
331 dev_dbg(&s->udev->dev, "%s: kill urb=%d\n", __func__, i); 330 dev_dbg(s->dev, "kill urb=%d\n", i);
332 /* stop the URB */ 331 /* stop the URB */
333 usb_kill_urb(s->urb_list[i]); 332 usb_kill_urb(s->urb_list[i]);
334 } 333 }
@@ -342,11 +341,10 @@ static int airspy_submit_urbs(struct airspy *s)
342 int i, ret; 341 int i, ret;
343 342
344 for (i = 0; i < s->urbs_initialized; i++) { 343 for (i = 0; i < s->urbs_initialized; i++) {
345 dev_dbg(&s->udev->dev, "%s: submit urb=%d\n", __func__, i); 344 dev_dbg(s->dev, "submit urb=%d\n", i);
346 ret = usb_submit_urb(s->urb_list[i], GFP_ATOMIC); 345 ret = usb_submit_urb(s->urb_list[i], GFP_ATOMIC);
347 if (ret) { 346 if (ret) {
348 dev_err(&s->udev->dev, 347 dev_err(s->dev, "Could not submit URB no. %d - get them all back\n",
349 "Could not submit URB no. %d - get them all back\n",
350 i); 348 i);
351 airspy_kill_urbs(s); 349 airspy_kill_urbs(s);
352 return ret; 350 return ret;
@@ -362,8 +360,7 @@ static int airspy_free_stream_bufs(struct airspy *s)
362 if (s->flags & USB_STATE_URB_BUF) { 360 if (s->flags & USB_STATE_URB_BUF) {
363 while (s->buf_num) { 361 while (s->buf_num) {
364 s->buf_num--; 362 s->buf_num--;
365 dev_dbg(&s->udev->dev, "%s: free buf=%d\n", 363 dev_dbg(s->dev, "free buf=%d\n", s->buf_num);
366 __func__, s->buf_num);
367 usb_free_coherent(s->udev, s->buf_size, 364 usb_free_coherent(s->udev, s->buf_size,
368 s->buf_list[s->buf_num], 365 s->buf_list[s->buf_num],
369 s->dma_addr[s->buf_num]); 366 s->dma_addr[s->buf_num]);
@@ -379,23 +376,20 @@ static int airspy_alloc_stream_bufs(struct airspy *s)
379 s->buf_num = 0; 376 s->buf_num = 0;
380 s->buf_size = BULK_BUFFER_SIZE; 377 s->buf_size = BULK_BUFFER_SIZE;
381 378
382 dev_dbg(&s->udev->dev, 379 dev_dbg(s->dev, "all in all I will use %u bytes for streaming\n",
383 "%s: all in all I will use %u bytes for streaming\n", 380 MAX_BULK_BUFS * BULK_BUFFER_SIZE);
384 __func__, MAX_BULK_BUFS * BULK_BUFFER_SIZE);
385 381
386 for (s->buf_num = 0; s->buf_num < MAX_BULK_BUFS; s->buf_num++) { 382 for (s->buf_num = 0; s->buf_num < MAX_BULK_BUFS; s->buf_num++) {
387 s->buf_list[s->buf_num] = usb_alloc_coherent(s->udev, 383 s->buf_list[s->buf_num] = usb_alloc_coherent(s->udev,
388 BULK_BUFFER_SIZE, GFP_ATOMIC, 384 BULK_BUFFER_SIZE, GFP_ATOMIC,
389 &s->dma_addr[s->buf_num]); 385 &s->dma_addr[s->buf_num]);
390 if (!s->buf_list[s->buf_num]) { 386 if (!s->buf_list[s->buf_num]) {
391 dev_dbg(&s->udev->dev, "%s: alloc buf=%d failed\n", 387 dev_dbg(s->dev, "alloc buf=%d failed\n", s->buf_num);
392 __func__, s->buf_num);
393 airspy_free_stream_bufs(s); 388 airspy_free_stream_bufs(s);
394 return -ENOMEM; 389 return -ENOMEM;
395 } 390 }
396 391
397 dev_dbg(&s->udev->dev, "%s: alloc buf=%d %p (dma %llu)\n", 392 dev_dbg(s->dev, "alloc buf=%d %p (dma %llu)\n", s->buf_num,
398 __func__, s->buf_num,
399 s->buf_list[s->buf_num], 393 s->buf_list[s->buf_num],
400 (long long)s->dma_addr[s->buf_num]); 394 (long long)s->dma_addr[s->buf_num]);
401 s->flags |= USB_STATE_URB_BUF; 395 s->flags |= USB_STATE_URB_BUF;
@@ -412,8 +406,7 @@ static int airspy_free_urbs(struct airspy *s)
412 406
413 for (i = s->urbs_initialized - 1; i >= 0; i--) { 407 for (i = s->urbs_initialized - 1; i >= 0; i--) {
414 if (s->urb_list[i]) { 408 if (s->urb_list[i]) {
415 dev_dbg(&s->udev->dev, "%s: free urb=%d\n", 409 dev_dbg(s->dev, "free urb=%d\n", i);
416 __func__, i);
417 /* free the URBs */ 410 /* free the URBs */
418 usb_free_urb(s->urb_list[i]); 411 usb_free_urb(s->urb_list[i]);
419 } 412 }
@@ -429,10 +422,10 @@ static int airspy_alloc_urbs(struct airspy *s)
429 422
430 /* allocate the URBs */ 423 /* allocate the URBs */
431 for (i = 0; i < MAX_BULK_BUFS; i++) { 424 for (i = 0; i < MAX_BULK_BUFS; i++) {
432 dev_dbg(&s->udev->dev, "%s: alloc urb=%d\n", __func__, i); 425 dev_dbg(s->dev, "alloc urb=%d\n", i);
433 s->urb_list[i] = usb_alloc_urb(0, GFP_ATOMIC); 426 s->urb_list[i] = usb_alloc_urb(0, GFP_ATOMIC);
434 if (!s->urb_list[i]) { 427 if (!s->urb_list[i]) {
435 dev_dbg(&s->udev->dev, "%s: failed\n", __func__); 428 dev_dbg(s->dev, "failed\n");
436 for (j = 0; j < i; j++) 429 for (j = 0; j < i; j++)
437 usb_free_urb(s->urb_list[j]); 430 usb_free_urb(s->urb_list[j]);
438 return -ENOMEM; 431 return -ENOMEM;
@@ -455,13 +448,14 @@ static int airspy_alloc_urbs(struct airspy *s)
455/* Must be called with vb_queue_lock hold */ 448/* Must be called with vb_queue_lock hold */
456static void airspy_cleanup_queued_bufs(struct airspy *s) 449static void airspy_cleanup_queued_bufs(struct airspy *s)
457{ 450{
458 unsigned long flags = 0; 451 unsigned long flags;
459 452
460 dev_dbg(&s->udev->dev, "%s:\n", __func__); 453 dev_dbg(s->dev, "\n");
461 454
462 spin_lock_irqsave(&s->queued_bufs_lock, flags); 455 spin_lock_irqsave(&s->queued_bufs_lock, flags);
463 while (!list_empty(&s->queued_bufs)) { 456 while (!list_empty(&s->queued_bufs)) {
464 struct airspy_frame_buf *buf; 457 struct airspy_frame_buf *buf;
458
465 buf = list_entry(s->queued_bufs.next, 459 buf = list_entry(s->queued_bufs.next,
466 struct airspy_frame_buf, list); 460 struct airspy_frame_buf, list);
467 list_del(&buf->list); 461 list_del(&buf->list);
@@ -476,7 +470,7 @@ static void airspy_disconnect(struct usb_interface *intf)
476 struct v4l2_device *v = usb_get_intfdata(intf); 470 struct v4l2_device *v = usb_get_intfdata(intf);
477 struct airspy *s = container_of(v, struct airspy, v4l2_dev); 471 struct airspy *s = container_of(v, struct airspy, v4l2_dev);
478 472
479 dev_dbg(&s->udev->dev, "%s:\n", __func__); 473 dev_dbg(s->dev, "\n");
480 474
481 mutex_lock(&s->vb_queue_lock); 475 mutex_lock(&s->vb_queue_lock);
482 mutex_lock(&s->v4l2_lock); 476 mutex_lock(&s->v4l2_lock);
@@ -497,7 +491,7 @@ static int airspy_queue_setup(struct vb2_queue *vq,
497{ 491{
498 struct airspy *s = vb2_get_drv_priv(vq); 492 struct airspy *s = vb2_get_drv_priv(vq);
499 493
500 dev_dbg(&s->udev->dev, "%s: *nbuffers=%d\n", __func__, *nbuffers); 494 dev_dbg(s->dev, "nbuffers=%d\n", *nbuffers);
501 495
502 /* Need at least 8 buffers */ 496 /* Need at least 8 buffers */
503 if (vq->num_buffers + *nbuffers < 8) 497 if (vq->num_buffers + *nbuffers < 8)
@@ -505,8 +499,7 @@ static int airspy_queue_setup(struct vb2_queue *vq,
505 *nplanes = 1; 499 *nplanes = 1;
506 sizes[0] = PAGE_ALIGN(s->buffersize); 500 sizes[0] = PAGE_ALIGN(s->buffersize);
507 501
508 dev_dbg(&s->udev->dev, "%s: nbuffers=%d sizes[0]=%d\n", 502 dev_dbg(s->dev, "nbuffers=%d sizes[0]=%d\n", *nbuffers, sizes[0]);
509 __func__, *nbuffers, sizes[0]);
510 return 0; 503 return 0;
511} 504}
512 505
@@ -515,7 +508,7 @@ static void airspy_buf_queue(struct vb2_buffer *vb)
515 struct airspy *s = vb2_get_drv_priv(vb->vb2_queue); 508 struct airspy *s = vb2_get_drv_priv(vb->vb2_queue);
516 struct airspy_frame_buf *buf = 509 struct airspy_frame_buf *buf =
517 container_of(vb, struct airspy_frame_buf, vb); 510 container_of(vb, struct airspy_frame_buf, vb);
518 unsigned long flags = 0; 511 unsigned long flags;
519 512
520 /* Check the device has not disconnected between prep and queuing */ 513 /* Check the device has not disconnected between prep and queuing */
521 if (unlikely(!s->udev)) { 514 if (unlikely(!s->udev)) {
@@ -533,34 +526,56 @@ static int airspy_start_streaming(struct vb2_queue *vq, unsigned int count)
533 struct airspy *s = vb2_get_drv_priv(vq); 526 struct airspy *s = vb2_get_drv_priv(vq);
534 int ret; 527 int ret;
535 528
536 dev_dbg(&s->udev->dev, "%s:\n", __func__); 529 dev_dbg(s->dev, "\n");
537 530
538 if (!s->udev) 531 if (!s->udev)
539 return -ENODEV; 532 return -ENODEV;
540 533
541 mutex_lock(&s->v4l2_lock); 534 mutex_lock(&s->v4l2_lock);
542 535
543 set_bit(POWER_ON, &s->flags);
544
545 s->sequence = 0; 536 s->sequence = 0;
546 537
538 set_bit(POWER_ON, &s->flags);
539
547 ret = airspy_alloc_stream_bufs(s); 540 ret = airspy_alloc_stream_bufs(s);
548 if (ret) 541 if (ret)
549 goto err; 542 goto err_clear_bit;
550 543
551 ret = airspy_alloc_urbs(s); 544 ret = airspy_alloc_urbs(s);
552 if (ret) 545 if (ret)
553 goto err; 546 goto err_free_stream_bufs;
554 547
555 ret = airspy_submit_urbs(s); 548 ret = airspy_submit_urbs(s);
556 if (ret) 549 if (ret)
557 goto err; 550 goto err_free_urbs;
558 551
559 /* start hardware streaming */ 552 /* start hardware streaming */
560 ret = airspy_ctrl_msg(s, CMD_RECEIVER_MODE, 1, 0, NULL, 0); 553 ret = airspy_ctrl_msg(s, CMD_RECEIVER_MODE, 1, 0, NULL, 0);
561 if (ret) 554 if (ret)
562 goto err; 555 goto err_kill_urbs;
563err: 556
557 goto exit_mutex_unlock;
558
559err_kill_urbs:
560 airspy_kill_urbs(s);
561err_free_urbs:
562 airspy_free_urbs(s);
563err_free_stream_bufs:
564 airspy_free_stream_bufs(s);
565err_clear_bit:
566 clear_bit(POWER_ON, &s->flags);
567
568 /* return all queued buffers to vb2 */
569 {
570 struct airspy_frame_buf *buf, *tmp;
571
572 list_for_each_entry_safe(buf, tmp, &s->queued_bufs, list) {
573 list_del(&buf->list);
574 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_QUEUED);
575 }
576 }
577
578exit_mutex_unlock:
564 mutex_unlock(&s->v4l2_lock); 579 mutex_unlock(&s->v4l2_lock);
565 580
566 return ret; 581 return ret;
@@ -570,7 +585,7 @@ static void airspy_stop_streaming(struct vb2_queue *vq)
570{ 585{
571 struct airspy *s = vb2_get_drv_priv(vq); 586 struct airspy *s = vb2_get_drv_priv(vq);
572 587
573 dev_dbg(&s->udev->dev, "%s:\n", __func__); 588 dev_dbg(s->dev, "\n");
574 589
575 mutex_lock(&s->v4l2_lock); 590 mutex_lock(&s->v4l2_lock);
576 591
@@ -602,8 +617,6 @@ static int airspy_querycap(struct file *file, void *fh,
602{ 617{
603 struct airspy *s = video_drvdata(file); 618 struct airspy *s = video_drvdata(file);
604 619
605 dev_dbg(&s->udev->dev, "%s:\n", __func__);
606
607 strlcpy(cap->driver, KBUILD_MODNAME, sizeof(cap->driver)); 620 strlcpy(cap->driver, KBUILD_MODNAME, sizeof(cap->driver));
608 strlcpy(cap->card, s->vdev.name, sizeof(cap->card)); 621 strlcpy(cap->card, s->vdev.name, sizeof(cap->card));
609 usb_make_path(s->udev, cap->bus_info, sizeof(cap->bus_info)); 622 usb_make_path(s->udev, cap->bus_info, sizeof(cap->bus_info));
@@ -617,10 +630,6 @@ static int airspy_querycap(struct file *file, void *fh,
617static int airspy_enum_fmt_sdr_cap(struct file *file, void *priv, 630static int airspy_enum_fmt_sdr_cap(struct file *file, void *priv,
618 struct v4l2_fmtdesc *f) 631 struct v4l2_fmtdesc *f)
619{ 632{
620 struct airspy *s = video_drvdata(file);
621
622 dev_dbg(&s->udev->dev, "%s: index=%d\n", __func__, f->index);
623
624 if (f->index >= NUM_FORMATS) 633 if (f->index >= NUM_FORMATS)
625 return -EINVAL; 634 return -EINVAL;
626 635
@@ -635,9 +644,6 @@ static int airspy_g_fmt_sdr_cap(struct file *file, void *priv,
635{ 644{
636 struct airspy *s = video_drvdata(file); 645 struct airspy *s = video_drvdata(file);
637 646
638 dev_dbg(&s->udev->dev, "%s: pixelformat fourcc %4.4s\n", __func__,
639 (char *)&s->pixelformat);
640
641 f->fmt.sdr.pixelformat = s->pixelformat; 647 f->fmt.sdr.pixelformat = s->pixelformat;
642 f->fmt.sdr.buffersize = s->buffersize; 648 f->fmt.sdr.buffersize = s->buffersize;
643 memset(f->fmt.sdr.reserved, 0, sizeof(f->fmt.sdr.reserved)); 649 memset(f->fmt.sdr.reserved, 0, sizeof(f->fmt.sdr.reserved));
@@ -652,9 +658,6 @@ static int airspy_s_fmt_sdr_cap(struct file *file, void *priv,
652 struct vb2_queue *q = &s->vb_queue; 658 struct vb2_queue *q = &s->vb_queue;
653 int i; 659 int i;
654 660
655 dev_dbg(&s->udev->dev, "%s: pixelformat fourcc %4.4s\n", __func__,
656 (char *)&f->fmt.sdr.pixelformat);
657
658 if (vb2_is_busy(q)) 661 if (vb2_is_busy(q))
659 return -EBUSY; 662 return -EBUSY;
660 663
@@ -679,12 +682,8 @@ static int airspy_s_fmt_sdr_cap(struct file *file, void *priv,
679static int airspy_try_fmt_sdr_cap(struct file *file, void *priv, 682static int airspy_try_fmt_sdr_cap(struct file *file, void *priv,
680 struct v4l2_format *f) 683 struct v4l2_format *f)
681{ 684{
682 struct airspy *s = video_drvdata(file);
683 int i; 685 int i;
684 686
685 dev_dbg(&s->udev->dev, "%s: pixelformat fourcc %4.4s\n", __func__,
686 (char *)&f->fmt.sdr.pixelformat);
687
688 memset(f->fmt.sdr.reserved, 0, sizeof(f->fmt.sdr.reserved)); 687 memset(f->fmt.sdr.reserved, 0, sizeof(f->fmt.sdr.reserved));
689 for (i = 0; i < NUM_FORMATS; i++) { 688 for (i = 0; i < NUM_FORMATS; i++) {
690 if (formats[i].pixelformat == f->fmt.sdr.pixelformat) { 689 if (formats[i].pixelformat == f->fmt.sdr.pixelformat) {
@@ -702,11 +701,8 @@ static int airspy_try_fmt_sdr_cap(struct file *file, void *priv,
702static int airspy_s_tuner(struct file *file, void *priv, 701static int airspy_s_tuner(struct file *file, void *priv,
703 const struct v4l2_tuner *v) 702 const struct v4l2_tuner *v)
704{ 703{
705 struct airspy *s = video_drvdata(file);
706 int ret; 704 int ret;
707 705
708 dev_dbg(&s->udev->dev, "%s: index=%d\n", __func__, v->index);
709
710 if (v->index == 0) 706 if (v->index == 0)
711 ret = 0; 707 ret = 0;
712 else if (v->index == 1) 708 else if (v->index == 1)
@@ -719,11 +715,8 @@ static int airspy_s_tuner(struct file *file, void *priv,
719 715
720static int airspy_g_tuner(struct file *file, void *priv, struct v4l2_tuner *v) 716static int airspy_g_tuner(struct file *file, void *priv, struct v4l2_tuner *v)
721{ 717{
722 struct airspy *s = video_drvdata(file);
723 int ret; 718 int ret;
724 719
725 dev_dbg(&s->udev->dev, "%s: index=%d\n", __func__, v->index);
726
727 if (v->index == 0) { 720 if (v->index == 0) {
728 strlcpy(v->name, "AirSpy ADC", sizeof(v->name)); 721 strlcpy(v->name, "AirSpy ADC", sizeof(v->name));
729 v->type = V4L2_TUNER_ADC; 722 v->type = V4L2_TUNER_ADC;
@@ -749,17 +742,18 @@ static int airspy_g_frequency(struct file *file, void *priv,
749 struct v4l2_frequency *f) 742 struct v4l2_frequency *f)
750{ 743{
751 struct airspy *s = video_drvdata(file); 744 struct airspy *s = video_drvdata(file);
752 int ret = 0; 745 int ret;
753 dev_dbg(&s->udev->dev, "%s: tuner=%d type=%d\n",
754 __func__, f->tuner, f->type);
755 746
756 if (f->tuner == 0) { 747 if (f->tuner == 0) {
757 f->type = V4L2_TUNER_ADC; 748 f->type = V4L2_TUNER_ADC;
758 f->frequency = s->f_adc; 749 f->frequency = s->f_adc;
750 dev_dbg(s->dev, "ADC frequency=%u Hz\n", s->f_adc);
759 ret = 0; 751 ret = 0;
760 } else if (f->tuner == 1) { 752 } else if (f->tuner == 1) {
761 f->type = V4L2_TUNER_RF; 753 f->type = V4L2_TUNER_RF;
762 f->frequency = s->f_rf; 754 f->frequency = s->f_rf;
755 dev_dbg(s->dev, "RF frequency=%u Hz\n", s->f_rf);
756 ret = 0;
763 } else { 757 } else {
764 ret = -EINVAL; 758 ret = -EINVAL;
765 } 759 }
@@ -774,22 +768,17 @@ static int airspy_s_frequency(struct file *file, void *priv,
774 int ret; 768 int ret;
775 u8 buf[4]; 769 u8 buf[4];
776 770
777 dev_dbg(&s->udev->dev, "%s: tuner=%d type=%d frequency=%u\n",
778 __func__, f->tuner, f->type, f->frequency);
779
780 if (f->tuner == 0) { 771 if (f->tuner == 0) {
781 s->f_adc = clamp_t(unsigned int, f->frequency, 772 s->f_adc = clamp_t(unsigned int, f->frequency,
782 bands[0].rangelow, 773 bands[0].rangelow,
783 bands[0].rangehigh); 774 bands[0].rangehigh);
784 dev_dbg(&s->udev->dev, "%s: ADC frequency=%u Hz\n", 775 dev_dbg(s->dev, "ADC frequency=%u Hz\n", s->f_adc);
785 __func__, s->f_adc);
786 ret = 0; 776 ret = 0;
787 } else if (f->tuner == 1) { 777 } else if (f->tuner == 1) {
788 s->f_rf = clamp_t(unsigned int, f->frequency, 778 s->f_rf = clamp_t(unsigned int, f->frequency,
789 bands_rf[0].rangelow, 779 bands_rf[0].rangelow,
790 bands_rf[0].rangehigh); 780 bands_rf[0].rangehigh);
791 dev_dbg(&s->udev->dev, "%s: RF frequency=%u Hz\n", 781 dev_dbg(s->dev, "RF frequency=%u Hz\n", s->f_rf);
792 __func__, s->f_rf);
793 buf[0] = (s->f_rf >> 0) & 0xff; 782 buf[0] = (s->f_rf >> 0) & 0xff;
794 buf[1] = (s->f_rf >> 8) & 0xff; 783 buf[1] = (s->f_rf >> 8) & 0xff;
795 buf[2] = (s->f_rf >> 16) & 0xff; 784 buf[2] = (s->f_rf >> 16) & 0xff;
@@ -805,10 +794,7 @@ static int airspy_s_frequency(struct file *file, void *priv,
805static int airspy_enum_freq_bands(struct file *file, void *priv, 794static int airspy_enum_freq_bands(struct file *file, void *priv,
806 struct v4l2_frequency_band *band) 795 struct v4l2_frequency_band *band)
807{ 796{
808 struct airspy *s = video_drvdata(file);
809 int ret; 797 int ret;
810 dev_dbg(&s->udev->dev, "%s: tuner=%d type=%d index=%d\n",
811 __func__, band->tuner, band->type, band->index);
812 798
813 if (band->tuner == 0) { 799 if (band->tuner == 0) {
814 if (band->index >= ARRAY_SIZE(bands)) { 800 if (band->index >= ARRAY_SIZE(bands)) {
@@ -892,10 +878,9 @@ static int airspy_set_lna_gain(struct airspy *s)
892 int ret; 878 int ret;
893 u8 u8tmp; 879 u8 u8tmp;
894 880
895 dev_dbg(&s->udev->dev, "%s: lna auto=%d->%d val=%d->%d\n", 881 dev_dbg(s->dev, "lna auto=%d->%d val=%d->%d\n",
896 __func__, s->lna_gain_auto->cur.val, 882 s->lna_gain_auto->cur.val, s->lna_gain_auto->val,
897 s->lna_gain_auto->val, s->lna_gain->cur.val, 883 s->lna_gain->cur.val, s->lna_gain->val);
898 s->lna_gain->val);
899 884
900 ret = airspy_ctrl_msg(s, CMD_SET_LNA_AGC, 0, s->lna_gain_auto->val, 885 ret = airspy_ctrl_msg(s, CMD_SET_LNA_AGC, 0, s->lna_gain_auto->val,
901 &u8tmp, 1); 886 &u8tmp, 1);
@@ -910,7 +895,7 @@ static int airspy_set_lna_gain(struct airspy *s)
910 } 895 }
911err: 896err:
912 if (ret) 897 if (ret)
913 dev_dbg(&s->udev->dev, "%s: failed=%d\n", __func__, ret); 898 dev_dbg(s->dev, "failed=%d\n", ret);
914 899
915 return ret; 900 return ret;
916} 901}
@@ -920,10 +905,9 @@ static int airspy_set_mixer_gain(struct airspy *s)
920 int ret; 905 int ret;
921 u8 u8tmp; 906 u8 u8tmp;
922 907
923 dev_dbg(&s->udev->dev, "%s: mixer auto=%d->%d val=%d->%d\n", 908 dev_dbg(s->dev, "mixer auto=%d->%d val=%d->%d\n",
924 __func__, s->mixer_gain_auto->cur.val, 909 s->mixer_gain_auto->cur.val, s->mixer_gain_auto->val,
925 s->mixer_gain_auto->val, s->mixer_gain->cur.val, 910 s->mixer_gain->cur.val, s->mixer_gain->val);
926 s->mixer_gain->val);
927 911
928 ret = airspy_ctrl_msg(s, CMD_SET_MIXER_AGC, 0, s->mixer_gain_auto->val, 912 ret = airspy_ctrl_msg(s, CMD_SET_MIXER_AGC, 0, s->mixer_gain_auto->val,
929 &u8tmp, 1); 913 &u8tmp, 1);
@@ -938,7 +922,7 @@ static int airspy_set_mixer_gain(struct airspy *s)
938 } 922 }
939err: 923err:
940 if (ret) 924 if (ret)
941 dev_dbg(&s->udev->dev, "%s: failed=%d\n", __func__, ret); 925 dev_dbg(s->dev, "failed=%d\n", ret);
942 926
943 return ret; 927 return ret;
944} 928}
@@ -948,8 +932,7 @@ static int airspy_set_if_gain(struct airspy *s)
948 int ret; 932 int ret;
949 u8 u8tmp; 933 u8 u8tmp;
950 934
951 dev_dbg(&s->udev->dev, "%s: val=%d->%d\n", 935 dev_dbg(s->dev, "val=%d->%d\n", s->if_gain->cur.val, s->if_gain->val);
952 __func__, s->if_gain->cur.val, s->if_gain->val);
953 936
954 ret = airspy_ctrl_msg(s, CMD_SET_VGA_GAIN, 0, s->if_gain->val, 937 ret = airspy_ctrl_msg(s, CMD_SET_VGA_GAIN, 0, s->if_gain->val,
955 &u8tmp, 1); 938 &u8tmp, 1);
@@ -957,7 +940,7 @@ static int airspy_set_if_gain(struct airspy *s)
957 goto err; 940 goto err;
958err: 941err:
959 if (ret) 942 if (ret)
960 dev_dbg(&s->udev->dev, "%s: failed=%d\n", __func__, ret); 943 dev_dbg(s->dev, "failed=%d\n", ret);
961 944
962 return ret; 945 return ret;
963} 946}
@@ -980,8 +963,8 @@ static int airspy_s_ctrl(struct v4l2_ctrl *ctrl)
980 ret = airspy_set_if_gain(s); 963 ret = airspy_set_if_gain(s);
981 break; 964 break;
982 default: 965 default:
983 dev_dbg(&s->udev->dev, "%s: unknown ctrl: id=%d name=%s\n", 966 dev_dbg(s->dev, "unknown ctrl: id=%d name=%s\n",
984 __func__, ctrl->id, ctrl->name); 967 ctrl->id, ctrl->name);
985 ret = -EINVAL; 968 ret = -EINVAL;
986 } 969 }
987 970
@@ -995,15 +978,13 @@ static const struct v4l2_ctrl_ops airspy_ctrl_ops = {
995static int airspy_probe(struct usb_interface *intf, 978static int airspy_probe(struct usb_interface *intf,
996 const struct usb_device_id *id) 979 const struct usb_device_id *id)
997{ 980{
998 struct usb_device *udev = interface_to_usbdev(intf); 981 struct airspy *s;
999 struct airspy *s = NULL;
1000 int ret; 982 int ret;
1001 u8 u8tmp, buf[BUF_SIZE]; 983 u8 u8tmp, buf[BUF_SIZE];
1002 984
1003 s = kzalloc(sizeof(struct airspy), GFP_KERNEL); 985 s = kzalloc(sizeof(struct airspy), GFP_KERNEL);
1004 if (s == NULL) { 986 if (s == NULL) {
1005 dev_err(&udev->dev, 987 dev_err(&intf->dev, "Could not allocate memory for state\n");
1006 "Could not allocate memory for airspy state\n");
1007 return -ENOMEM; 988 return -ENOMEM;
1008 } 989 }
1009 990
@@ -1011,7 +992,8 @@ static int airspy_probe(struct usb_interface *intf,
1011 mutex_init(&s->vb_queue_lock); 992 mutex_init(&s->vb_queue_lock);
1012 spin_lock_init(&s->queued_bufs_lock); 993 spin_lock_init(&s->queued_bufs_lock);
1013 INIT_LIST_HEAD(&s->queued_bufs); 994 INIT_LIST_HEAD(&s->queued_bufs);
1014 s->udev = udev; 995 s->dev = &intf->dev;
996 s->udev = interface_to_usbdev(intf);
1015 s->f_adc = bands[0].rangelow; 997 s->f_adc = bands[0].rangelow;
1016 s->f_rf = bands_rf[0].rangelow; 998 s->f_rf = bands_rf[0].rangelow;
1017 s->pixelformat = formats[0].pixelformat; 999 s->pixelformat = formats[0].pixelformat;
@@ -1023,14 +1005,14 @@ static int airspy_probe(struct usb_interface *intf,
1023 ret = airspy_ctrl_msg(s, CMD_VERSION_STRING_READ, 0, 0, 1005 ret = airspy_ctrl_msg(s, CMD_VERSION_STRING_READ, 0, 0,
1024 buf, BUF_SIZE); 1006 buf, BUF_SIZE);
1025 if (ret) { 1007 if (ret) {
1026 dev_err(&s->udev->dev, "Could not detect board\n"); 1008 dev_err(s->dev, "Could not detect board\n");
1027 goto err_free_mem; 1009 goto err_free_mem;
1028 } 1010 }
1029 1011
1030 buf[BUF_SIZE - 1] = '\0'; 1012 buf[BUF_SIZE - 1] = '\0';
1031 1013
1032 dev_info(&s->udev->dev, "Board ID: %02x\n", u8tmp); 1014 dev_info(s->dev, "Board ID: %02x\n", u8tmp);
1033 dev_info(&s->udev->dev, "Firmware version: %s\n", buf); 1015 dev_info(s->dev, "Firmware version: %s\n", buf);
1034 1016
1035 /* Init videobuf2 queue structure */ 1017 /* Init videobuf2 queue structure */
1036 s->vb_queue.type = V4L2_BUF_TYPE_SDR_CAPTURE; 1018 s->vb_queue.type = V4L2_BUF_TYPE_SDR_CAPTURE;
@@ -1042,7 +1024,7 @@ static int airspy_probe(struct usb_interface *intf,
1042 s->vb_queue.timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; 1024 s->vb_queue.timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1043 ret = vb2_queue_init(&s->vb_queue); 1025 ret = vb2_queue_init(&s->vb_queue);
1044 if (ret) { 1026 if (ret) {
1045 dev_err(&s->udev->dev, "Could not initialize vb2 queue\n"); 1027 dev_err(s->dev, "Could not initialize vb2 queue\n");
1046 goto err_free_mem; 1028 goto err_free_mem;
1047 } 1029 }
1048 1030
@@ -1056,8 +1038,7 @@ static int airspy_probe(struct usb_interface *intf,
1056 s->v4l2_dev.release = airspy_video_release; 1038 s->v4l2_dev.release = airspy_video_release;
1057 ret = v4l2_device_register(&intf->dev, &s->v4l2_dev); 1039 ret = v4l2_device_register(&intf->dev, &s->v4l2_dev);
1058 if (ret) { 1040 if (ret) {
1059 dev_err(&s->udev->dev, 1041 dev_err(s->dev, "Failed to register v4l2-device (%d)\n", ret);
1060 "Failed to register v4l2-device (%d)\n", ret);
1061 goto err_free_mem; 1042 goto err_free_mem;
1062 } 1043 }
1063 1044
@@ -1077,7 +1058,7 @@ static int airspy_probe(struct usb_interface *intf,
1077 V4L2_CID_RF_TUNER_IF_GAIN, 0, 15, 1, 0); 1058 V4L2_CID_RF_TUNER_IF_GAIN, 0, 15, 1, 0);
1078 if (s->hdl.error) { 1059 if (s->hdl.error) {
1079 ret = s->hdl.error; 1060 ret = s->hdl.error;
1080 dev_err(&s->udev->dev, "Could not initialize controls\n"); 1061 dev_err(s->dev, "Could not initialize controls\n");
1081 goto err_free_controls; 1062 goto err_free_controls;
1082 } 1063 }
1083 1064
@@ -1089,16 +1070,13 @@ static int airspy_probe(struct usb_interface *intf,
1089 1070
1090 ret = video_register_device(&s->vdev, VFL_TYPE_SDR, -1); 1071 ret = video_register_device(&s->vdev, VFL_TYPE_SDR, -1);
1091 if (ret) { 1072 if (ret) {
1092 dev_err(&s->udev->dev, 1073 dev_err(s->dev, "Failed to register as video device (%d)\n",
1093 "Failed to register as video device (%d)\n",
1094 ret); 1074 ret);
1095 goto err_unregister_v4l2_dev; 1075 goto err_unregister_v4l2_dev;
1096 } 1076 }
1097 dev_info(&s->udev->dev, "Registered as %s\n", 1077 dev_info(s->dev, "Registered as %s\n",
1098 video_device_node_name(&s->vdev)); 1078 video_device_node_name(&s->vdev));
1099 dev_notice(&s->udev->dev, 1079 dev_notice(s->dev, "SDR API is still slightly experimental and functionality changes may follow\n");
1100 "%s: SDR API is still slightly experimental and functionality changes may follow\n",
1101 KBUILD_MODNAME);
1102 return 0; 1080 return 0;
1103 1081
1104err_free_controls: 1082err_free_controls:
diff --git a/drivers/staging/media/as102/Kconfig b/drivers/media/usb/as102/Kconfig
index 28aba00dc629..28aba00dc629 100644
--- a/drivers/staging/media/as102/Kconfig
+++ b/drivers/media/usb/as102/Kconfig
diff --git a/drivers/staging/media/as102/Makefile b/drivers/media/usb/as102/Makefile
index 8916d8a909bc..22f43eee4a3b 100644
--- a/drivers/staging/media/as102/Makefile
+++ b/drivers/media/usb/as102/Makefile
@@ -1,6 +1,7 @@
1dvb-as102-objs := as102_drv.o as102_fw.o as10x_cmd.o as10x_cmd_stream.o \ 1dvb-as102-objs := as102_drv.o as102_fw.o as10x_cmd.o as10x_cmd_stream.o \
2 as102_fe.o as102_usb_drv.o as10x_cmd_cfg.o 2 as102_usb_drv.o as10x_cmd_cfg.o
3 3
4obj-$(CONFIG_DVB_AS102) += dvb-as102.o 4obj-$(CONFIG_DVB_AS102) += dvb-as102.o
5 5
6ccflags-y += -Idrivers/media/dvb-core 6ccflags-y += -Idrivers/media/dvb-core
7ccflags-y += -Idrivers/media/dvb-frontends
diff --git a/drivers/staging/media/as102/as102_drv.c b/drivers/media/usb/as102/as102_drv.c
index 09d64cd67502..8be1474b2c36 100644
--- a/drivers/staging/media/as102/as102_drv.c
+++ b/drivers/media/usb/as102/as102_drv.c
@@ -12,10 +12,6 @@
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details. 14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */ 15 */
20#include <linux/kernel.h> 16#include <linux/kernel.h>
21#include <linux/errno.h> 17#include <linux/errno.h>
@@ -28,13 +24,11 @@
28 24
29/* header file for usb device driver*/ 25/* header file for usb device driver*/
30#include "as102_drv.h" 26#include "as102_drv.h"
27#include "as10x_cmd.h"
28#include "as102_fe.h"
31#include "as102_fw.h" 29#include "as102_fw.h"
32#include "dvbdev.h" 30#include "dvbdev.h"
33 31
34int as102_debug;
35module_param_named(debug, as102_debug, int, 0644);
36MODULE_PARM_DESC(debug, "Turn on/off debugging (default: off)");
37
38int dual_tuner; 32int dual_tuner;
39module_param_named(dual_tuner, dual_tuner, int, 0644); 33module_param_named(dual_tuner, dual_tuner, int, 0644);
40MODULE_PARM_DESC(dual_tuner, "Activate Dual-Tuner config (default: off)"); 34MODULE_PARM_DESC(dual_tuner, "Activate Dual-Tuner config (default: off)");
@@ -74,7 +68,8 @@ static void as102_stop_stream(struct as102_dev_t *dev)
74 return; 68 return;
75 69
76 if (as10x_cmd_stop_streaming(bus_adap) < 0) 70 if (as10x_cmd_stop_streaming(bus_adap) < 0)
77 dprintk(debug, "as10x_cmd_stop_streaming failed\n"); 71 dev_dbg(&dev->bus_adap.usb_dev->dev,
72 "as10x_cmd_stop_streaming failed\n");
78 73
79 mutex_unlock(&dev->bus_adap.lock); 74 mutex_unlock(&dev->bus_adap.lock);
80 } 75 }
@@ -112,14 +107,16 @@ static int as10x_pid_filter(struct as102_dev_t *dev,
112 int ret = -EFAULT; 107 int ret = -EFAULT;
113 108
114 if (mutex_lock_interruptible(&dev->bus_adap.lock)) { 109 if (mutex_lock_interruptible(&dev->bus_adap.lock)) {
115 dprintk(debug, "mutex_lock_interruptible(lock) failed !\n"); 110 dev_dbg(&dev->bus_adap.usb_dev->dev,
111 "amutex_lock_interruptible(lock) failed !\n");
116 return -EBUSY; 112 return -EBUSY;
117 } 113 }
118 114
119 switch (onoff) { 115 switch (onoff) {
120 case 0: 116 case 0:
121 ret = as10x_cmd_del_PID_filter(bus_adap, (uint16_t) pid); 117 ret = as10x_cmd_del_PID_filter(bus_adap, (uint16_t) pid);
122 dprintk(debug, "DEL_PID_FILTER([%02d] 0x%04x) ret = %d\n", 118 dev_dbg(&dev->bus_adap.usb_dev->dev,
119 "DEL_PID_FILTER([%02d] 0x%04x) ret = %d\n",
123 index, pid, ret); 120 index, pid, ret);
124 break; 121 break;
125 case 1: 122 case 1:
@@ -131,7 +128,7 @@ static int as10x_pid_filter(struct as102_dev_t *dev,
131 filter.pid = pid; 128 filter.pid = pid;
132 129
133 ret = as10x_cmd_add_PID_filter(bus_adap, &filter); 130 ret = as10x_cmd_add_PID_filter(bus_adap, &filter);
134 dprintk(debug, 131 dev_dbg(&dev->bus_adap.usb_dev->dev,
135 "ADD_PID_FILTER([%02d -> %02d], 0x%04x) ret = %d\n", 132 "ADD_PID_FILTER([%02d -> %02d], 0x%04x) ret = %d\n",
136 index, filter.idx, filter.pid, ret); 133 index, filter.idx, filter.pid, ret);
137 break; 134 break;
@@ -181,6 +178,119 @@ static int as102_dvb_dmx_stop_feed(struct dvb_demux_feed *dvbdmxfeed)
181 return 0; 178 return 0;
182} 179}
183 180
181static int as102_set_tune(void *priv, struct as10x_tune_args *tune_args)
182{
183 struct as10x_bus_adapter_t *bus_adap = priv;
184 int ret;
185
186 /* Set frontend arguments */
187 if (mutex_lock_interruptible(&bus_adap->lock))
188 return -EBUSY;
189
190 ret = as10x_cmd_set_tune(bus_adap, tune_args);
191 if (ret != 0)
192 dev_dbg(&bus_adap->usb_dev->dev,
193 "as10x_cmd_set_tune failed. (err = %d)\n", ret);
194
195 mutex_unlock(&bus_adap->lock);
196
197 return ret;
198}
199
200static int as102_get_tps(void *priv, struct as10x_tps *tps)
201{
202 struct as10x_bus_adapter_t *bus_adap = priv;
203 int ret;
204
205 if (mutex_lock_interruptible(&bus_adap->lock))
206 return -EBUSY;
207
208 /* send abilis command: GET_TPS */
209 ret = as10x_cmd_get_tps(bus_adap, tps);
210
211 mutex_unlock(&bus_adap->lock);
212
213 return ret;
214}
215
216static int as102_get_status(void *priv, struct as10x_tune_status *tstate)
217{
218 struct as10x_bus_adapter_t *bus_adap = priv;
219 int ret;
220
221 if (mutex_lock_interruptible(&bus_adap->lock))
222 return -EBUSY;
223
224 /* send abilis command: GET_TUNE_STATUS */
225 ret = as10x_cmd_get_tune_status(bus_adap, tstate);
226 if (ret < 0) {
227 dev_dbg(&bus_adap->usb_dev->dev,
228 "as10x_cmd_get_tune_status failed (err = %d)\n",
229 ret);
230 }
231
232 mutex_unlock(&bus_adap->lock);
233
234 return ret;
235}
236
237static int as102_get_stats(void *priv, struct as10x_demod_stats *demod_stats)
238{
239 struct as10x_bus_adapter_t *bus_adap = priv;
240 int ret;
241
242 if (mutex_lock_interruptible(&bus_adap->lock))
243 return -EBUSY;
244
245 /* send abilis command: GET_TUNE_STATUS */
246 ret = as10x_cmd_get_demod_stats(bus_adap, demod_stats);
247 if (ret < 0) {
248 dev_dbg(&bus_adap->usb_dev->dev,
249 "as10x_cmd_get_demod_stats failed (probably not tuned)\n");
250 } else {
251 dev_dbg(&bus_adap->usb_dev->dev,
252 "demod status: fc: 0x%08x, bad fc: 0x%08x, bytes corrected: 0x%08x , MER: 0x%04x\n",
253 demod_stats->frame_count,
254 demod_stats->bad_frame_count,
255 demod_stats->bytes_fixed_by_rs,
256 demod_stats->mer);
257 }
258 mutex_unlock(&bus_adap->lock);
259
260 return ret;
261}
262
263static int as102_stream_ctrl(void *priv, int acquire, uint32_t elna_cfg)
264{
265 struct as10x_bus_adapter_t *bus_adap = priv;
266 int ret;
267
268 if (mutex_lock_interruptible(&bus_adap->lock))
269 return -EBUSY;
270
271 if (acquire) {
272 if (elna_enable)
273 as10x_cmd_set_context(bus_adap,
274 CONTEXT_LNA, elna_cfg);
275
276 ret = as10x_cmd_turn_on(bus_adap);
277 } else {
278 ret = as10x_cmd_turn_off(bus_adap);
279 }
280
281 mutex_unlock(&bus_adap->lock);
282
283 return ret;
284}
285
286static const struct as102_fe_ops as102_fe_ops = {
287 .set_tune = as102_set_tune,
288 .get_tps = as102_get_tps,
289 .get_status = as102_get_status,
290 .get_stats = as102_get_stats,
291 .stream_ctrl = as102_stream_ctrl,
292};
293
184int as102_dvb_register(struct as102_dev_t *as102_dev) 294int as102_dvb_register(struct as102_dev_t *as102_dev)
185{ 295{
186 struct device *dev = &as102_dev->bus_adap.usb_dev->dev; 296 struct device *dev = &as102_dev->bus_adap.usb_dev->dev;
@@ -221,7 +331,18 @@ int as102_dvb_register(struct as102_dev_t *as102_dev)
221 goto edmxdinit; 331 goto edmxdinit;
222 } 332 }
223 333
224 ret = as102_dvb_register_fe(as102_dev, &as102_dev->dvb_fe); 334 /* Attach the frontend */
335 as102_dev->dvb_fe = dvb_attach(as102_attach, as102_dev->name,
336 &as102_fe_ops,
337 &as102_dev->bus_adap,
338 as102_dev->elna_cfg);
339 if (!as102_dev->dvb_fe) {
340 dev_err(dev, "%s: as102_attach() failed: %d",
341 __func__, ret);
342 goto efereg;
343 }
344
345 ret = dvb_register_frontend(&as102_dev->dvb_adap, as102_dev->dvb_fe);
225 if (ret < 0) { 346 if (ret < 0) {
226 dev_err(dev, "%s: as102_dvb_register_frontend() failed: %d", 347 dev_err(dev, "%s: as102_dvb_register_frontend() failed: %d",
227 __func__, ret); 348 __func__, ret);
@@ -257,7 +378,10 @@ edmxinit:
257void as102_dvb_unregister(struct as102_dev_t *as102_dev) 378void as102_dvb_unregister(struct as102_dev_t *as102_dev)
258{ 379{
259 /* unregister as102 frontend */ 380 /* unregister as102 frontend */
260 as102_dvb_unregister_fe(&as102_dev->dvb_fe); 381 dvb_unregister_frontend(as102_dev->dvb_fe);
382
383 /* detach frontend */
384 dvb_frontend_detach(as102_dev->dvb_fe);
261 385
262 /* unregister demux device */ 386 /* unregister demux device */
263 dvb_dmxdev_release(&as102_dev->dvb_dmxdev); 387 dvb_dmxdev_release(&as102_dev->dvb_dmxdev);
diff --git a/drivers/staging/media/as102/as102_drv.h b/drivers/media/usb/as102/as102_drv.h
index a06837dcc05d..aee2d76e8dfc 100644
--- a/drivers/staging/media/as102/as102_drv.h
+++ b/drivers/media/usb/as102/as102_drv.h
@@ -11,33 +11,25 @@
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 */ 14 */
19 15
16#ifndef _AS102_DRV_H
17#define _AS102_DRV_H
20#include <linux/usb.h> 18#include <linux/usb.h>
21#include <dvb_demux.h> 19#include <dvb_demux.h>
22#include <dvb_frontend.h> 20#include <dvb_frontend.h>
23#include <dmxdev.h> 21#include <dmxdev.h>
22#include "as10x_handle.h"
24#include "as10x_cmd.h" 23#include "as10x_cmd.h"
25#include "as102_usb_drv.h" 24#include "as102_usb_drv.h"
26 25
27#define DRIVER_FULL_NAME "Abilis Systems as10x usb driver" 26#define DRIVER_FULL_NAME "Abilis Systems as10x usb driver"
28#define DRIVER_NAME "as10x_usb" 27#define DRIVER_NAME "as10x_usb"
29 28
30extern int as102_debug;
31#define debug as102_debug 29#define debug as102_debug
32extern struct usb_driver as102_usb_driver; 30extern struct usb_driver as102_usb_driver;
33extern int elna_enable; 31extern int elna_enable;
34 32
35#define dprintk(debug, args...) \
36 do { if (debug) { \
37 pr_debug("%s: ", __func__); \
38 printk(args); \
39 } } while (0)
40
41#define AS102_DEVICE_MAJOR 192 33#define AS102_DEVICE_MAJOR 192
42 34
43#define AS102_USB_BUF_SIZE 512 35#define AS102_USB_BUF_SIZE 512
@@ -71,17 +63,10 @@ struct as102_dev_t {
71 uint8_t elna_cfg; 63 uint8_t elna_cfg;
72 64
73 struct dvb_adapter dvb_adap; 65 struct dvb_adapter dvb_adap;
74 struct dvb_frontend dvb_fe; 66 struct dvb_frontend *dvb_fe;
75 struct dvb_demux dvb_dmx; 67 struct dvb_demux dvb_dmx;
76 struct dmxdev dvb_dmxdev; 68 struct dmxdev dvb_dmxdev;
77 69
78 /* demodulator stats */
79 struct as10x_demod_stats demod_stats;
80 /* signal strength */
81 uint16_t signal_strength;
82 /* bit error rate */
83 uint32_t ber;
84
85 /* timer handle to trig ts stream download */ 70 /* timer handle to trig ts stream download */
86 struct timer_list timer_handle; 71 struct timer_list timer_handle;
87 72
@@ -95,5 +80,4 @@ struct as102_dev_t {
95int as102_dvb_register(struct as102_dev_t *dev); 80int as102_dvb_register(struct as102_dev_t *dev);
96void as102_dvb_unregister(struct as102_dev_t *dev); 81void as102_dvb_unregister(struct as102_dev_t *dev);
97 82
98int as102_dvb_register_fe(struct as102_dev_t *dev, struct dvb_frontend *fe); 83#endif
99int as102_dvb_unregister_fe(struct dvb_frontend *dev);
diff --git a/drivers/staging/media/as102/as102_fw.c b/drivers/media/usb/as102/as102_fw.c
index f33f752c0aad..07d08c49f4d4 100644
--- a/drivers/staging/media/as102/as102_fw.c
+++ b/drivers/media/usb/as102/as102_fw.c
@@ -12,10 +12,6 @@
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details. 14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */ 15 */
20#include <linux/kernel.h> 16#include <linux/kernel.h>
21#include <linux/errno.h> 17#include <linux/errno.h>
diff --git a/drivers/staging/media/as102/as102_fw.h b/drivers/media/usb/as102/as102_fw.h
index 4bfc6849d95a..2732b784216d 100644
--- a/drivers/staging/media/as102/as102_fw.h
+++ b/drivers/media/usb/as102/as102_fw.h
@@ -11,10 +11,6 @@
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 */ 14 */
19#define MAX_FW_PKT_SIZE 64 15#define MAX_FW_PKT_SIZE 64
20 16
diff --git a/drivers/staging/media/as102/as102_usb_drv.c b/drivers/media/usb/as102/as102_usb_drv.c
index e6f6278e97d6..3f669066ccf6 100644
--- a/drivers/staging/media/as102/as102_usb_drv.c
+++ b/drivers/media/usb/as102/as102_usb_drv.c
@@ -12,10 +12,6 @@
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details. 14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */ 15 */
20#include <linux/kernel.h> 16#include <linux/kernel.h>
21#include <linux/errno.h> 17#include <linux/errno.h>
@@ -104,21 +100,22 @@ static int as102_usb_xfer_cmd(struct as10x_bus_adapter_t *bus_adap,
104 send_buf, send_buf_len, 100 send_buf, send_buf_len,
105 USB_CTRL_SET_TIMEOUT /* 200 */); 101 USB_CTRL_SET_TIMEOUT /* 200 */);
106 if (ret < 0) { 102 if (ret < 0) {
107 dprintk(debug, "usb_control_msg(send) failed, err %i\n", 103 dev_dbg(&bus_adap->usb_dev->dev,
108 ret); 104 "usb_control_msg(send) failed, err %i\n", ret);
109 return ret; 105 return ret;
110 } 106 }
111 107
112 if (ret != send_buf_len) { 108 if (ret != send_buf_len) {
113 dprintk(debug, "only wrote %d of %d bytes\n", 109 dev_dbg(&bus_adap->usb_dev->dev,
114 ret, send_buf_len); 110 "only wrote %d of %d bytes\n", ret, send_buf_len);
115 return -1; 111 return -1;
116 } 112 }
117 } 113 }
118 114
119 if (recv_buf != NULL) { 115 if (recv_buf != NULL) {
120#ifdef TRACE 116#ifdef TRACE
121 dprintk(debug, "want to read: %d bytes\n", recv_buf_len); 117 dev_dbg(bus_adap->usb_dev->dev,
118 "want to read: %d bytes\n", recv_buf_len);
122#endif 119#endif
123 ret = usb_control_msg(bus_adap->usb_dev, 120 ret = usb_control_msg(bus_adap->usb_dev,
124 usb_rcvctrlpipe(bus_adap->usb_dev, 0), 121 usb_rcvctrlpipe(bus_adap->usb_dev, 0),
@@ -130,12 +127,13 @@ static int as102_usb_xfer_cmd(struct as10x_bus_adapter_t *bus_adap,
130 recv_buf, recv_buf_len, 127 recv_buf, recv_buf_len,
131 USB_CTRL_GET_TIMEOUT /* 200 */); 128 USB_CTRL_GET_TIMEOUT /* 200 */);
132 if (ret < 0) { 129 if (ret < 0) {
133 dprintk(debug, "usb_control_msg(recv) failed, err %i\n", 130 dev_dbg(&bus_adap->usb_dev->dev,
134 ret); 131 "usb_control_msg(recv) failed, err %i\n", ret);
135 return ret; 132 return ret;
136 } 133 }
137#ifdef TRACE 134#ifdef TRACE
138 dprintk(debug, "read %d bytes\n", recv_buf_len); 135 dev_dbg(bus_adap->usb_dev->dev,
136 "read %d bytes\n", recv_buf_len);
139#endif 137#endif
140 } 138 }
141 139
@@ -147,28 +145,29 @@ static int as102_send_ep1(struct as10x_bus_adapter_t *bus_adap,
147 int send_buf_len, 145 int send_buf_len,
148 int swap32) 146 int swap32)
149{ 147{
150 int ret = 0, actual_len; 148 int ret, actual_len;
151 149
152 ret = usb_bulk_msg(bus_adap->usb_dev, 150 ret = usb_bulk_msg(bus_adap->usb_dev,
153 usb_sndbulkpipe(bus_adap->usb_dev, 1), 151 usb_sndbulkpipe(bus_adap->usb_dev, 1),
154 send_buf, send_buf_len, &actual_len, 200); 152 send_buf, send_buf_len, &actual_len, 200);
155 if (ret) { 153 if (ret) {
156 dprintk(debug, "usb_bulk_msg(send) failed, err %i\n", ret); 154 dev_dbg(&bus_adap->usb_dev->dev,
155 "usb_bulk_msg(send) failed, err %i\n", ret);
157 return ret; 156 return ret;
158 } 157 }
159 158
160 if (actual_len != send_buf_len) { 159 if (actual_len != send_buf_len) {
161 dprintk(debug, "only wrote %d of %d bytes\n", 160 dev_dbg(&bus_adap->usb_dev->dev, "only wrote %d of %d bytes\n",
162 actual_len, send_buf_len); 161 actual_len, send_buf_len);
163 return -1; 162 return -1;
164 } 163 }
165 return ret ? ret : actual_len; 164 return actual_len;
166} 165}
167 166
168static int as102_read_ep2(struct as10x_bus_adapter_t *bus_adap, 167static int as102_read_ep2(struct as10x_bus_adapter_t *bus_adap,
169 unsigned char *recv_buf, int recv_buf_len) 168 unsigned char *recv_buf, int recv_buf_len)
170{ 169{
171 int ret = 0, actual_len; 170 int ret, actual_len;
172 171
173 if (recv_buf == NULL) 172 if (recv_buf == NULL)
174 return -EINVAL; 173 return -EINVAL;
@@ -177,16 +176,17 @@ static int as102_read_ep2(struct as10x_bus_adapter_t *bus_adap,
177 usb_rcvbulkpipe(bus_adap->usb_dev, 2), 176 usb_rcvbulkpipe(bus_adap->usb_dev, 2),
178 recv_buf, recv_buf_len, &actual_len, 200); 177 recv_buf, recv_buf_len, &actual_len, 200);
179 if (ret) { 178 if (ret) {
180 dprintk(debug, "usb_bulk_msg(recv) failed, err %i\n", ret); 179 dev_dbg(&bus_adap->usb_dev->dev,
180 "usb_bulk_msg(recv) failed, err %i\n", ret);
181 return ret; 181 return ret;
182 } 182 }
183 183
184 if (actual_len != recv_buf_len) { 184 if (actual_len != recv_buf_len) {
185 dprintk(debug, "only read %d of %d bytes\n", 185 dev_dbg(&bus_adap->usb_dev->dev, "only read %d of %d bytes\n",
186 actual_len, recv_buf_len); 186 actual_len, recv_buf_len);
187 return -1; 187 return -1;
188 } 188 }
189 return ret ? ret : actual_len; 189 return actual_len;
190} 190}
191 191
192static struct as102_priv_ops_t as102_priv_ops = { 192static struct as102_priv_ops_t as102_priv_ops = {
@@ -211,7 +211,8 @@ static int as102_submit_urb_stream(struct as102_dev_t *dev, struct urb *urb)
211 211
212 err = usb_submit_urb(urb, GFP_ATOMIC); 212 err = usb_submit_urb(urb, GFP_ATOMIC);
213 if (err) 213 if (err)
214 dprintk(debug, "%s: usb_submit_urb failed\n", __func__); 214 dev_dbg(&urb->dev->dev,
215 "%s: usb_submit_urb failed\n", __func__);
215 216
216 return err; 217 return err;
217} 218}
@@ -256,7 +257,8 @@ static int as102_alloc_usb_stream_buffer(struct as102_dev_t *dev)
256 GFP_KERNEL, 257 GFP_KERNEL,
257 &dev->dma_addr); 258 &dev->dma_addr);
258 if (!dev->stream) { 259 if (!dev->stream) {
259 dprintk(debug, "%s: usb_buffer_alloc failed\n", __func__); 260 dev_dbg(&dev->bus_adap.usb_dev->dev,
261 "%s: usb_buffer_alloc failed\n", __func__);
260 return -ENOMEM; 262 return -ENOMEM;
261 } 263 }
262 264
@@ -268,7 +270,8 @@ static int as102_alloc_usb_stream_buffer(struct as102_dev_t *dev)
268 270
269 urb = usb_alloc_urb(0, GFP_ATOMIC); 271 urb = usb_alloc_urb(0, GFP_ATOMIC);
270 if (urb == NULL) { 272 if (urb == NULL) {
271 dprintk(debug, "%s: usb_alloc_urb failed\n", __func__); 273 dev_dbg(&dev->bus_adap.usb_dev->dev,
274 "%s: usb_alloc_urb failed\n", __func__);
272 as102_free_usb_stream_buffer(dev); 275 as102_free_usb_stream_buffer(dev);
273 return -ENOMEM; 276 return -ENOMEM;
274 } 277 }
diff --git a/drivers/staging/media/as102/as102_usb_drv.h b/drivers/media/usb/as102/as102_usb_drv.h
index 1ad1ec52b11e..4fb1baa8cac0 100644
--- a/drivers/staging/media/as102/as102_usb_drv.h
+++ b/drivers/media/usb/as102/as102_usb_drv.h
@@ -12,10 +12,6 @@
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details. 14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */ 15 */
20#ifndef _AS102_USB_DRV_H_ 16#ifndef _AS102_USB_DRV_H_
21#define _AS102_USB_DRV_H_ 17#define _AS102_USB_DRV_H_
diff --git a/drivers/staging/media/as102/as10x_cmd.c b/drivers/media/usb/as102/as10x_cmd.c
index 9e49f15a7c9f..870617994410 100644
--- a/drivers/staging/media/as102/as10x_cmd.c
+++ b/drivers/media/usb/as102/as10x_cmd.c
@@ -12,15 +12,10 @@
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details. 14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */ 15 */
20 16
21#include <linux/kernel.h> 17#include <linux/kernel.h>
22#include "as102_drv.h" 18#include "as102_drv.h"
23#include "as10x_types.h"
24#include "as10x_cmd.h" 19#include "as10x_cmd.h"
25 20
26/** 21/**
@@ -126,7 +121,7 @@ int as10x_cmd_set_tune(struct as10x_bus_adapter_t *adap,
126 121
127 /* fill command */ 122 /* fill command */
128 preq->body.set_tune.req.proc_id = cpu_to_le16(CONTROL_PROC_SETTUNE); 123 preq->body.set_tune.req.proc_id = cpu_to_le16(CONTROL_PROC_SETTUNE);
129 preq->body.set_tune.req.args.freq = cpu_to_le32(ptune->freq); 124 preq->body.set_tune.req.args.freq = (__force __u32)cpu_to_le32(ptune->freq);
130 preq->body.set_tune.req.args.bandwidth = ptune->bandwidth; 125 preq->body.set_tune.req.args.bandwidth = ptune->bandwidth;
131 preq->body.set_tune.req.args.hier_select = ptune->hier_select; 126 preq->body.set_tune.req.args.hier_select = ptune->hier_select;
132 preq->body.set_tune.req.args.modulation = ptune->modulation; 127 preq->body.set_tune.req.args.modulation = ptune->modulation;
@@ -204,9 +199,9 @@ int as10x_cmd_get_tune_status(struct as10x_bus_adapter_t *adap,
204 /* Response OK -> get response data */ 199 /* Response OK -> get response data */
205 pstatus->tune_state = prsp->body.get_tune_status.rsp.sts.tune_state; 200 pstatus->tune_state = prsp->body.get_tune_status.rsp.sts.tune_state;
206 pstatus->signal_strength = 201 pstatus->signal_strength =
207 le16_to_cpu(prsp->body.get_tune_status.rsp.sts.signal_strength); 202 le16_to_cpu((__force __le16)prsp->body.get_tune_status.rsp.sts.signal_strength);
208 pstatus->PER = le16_to_cpu(prsp->body.get_tune_status.rsp.sts.PER); 203 pstatus->PER = le16_to_cpu((__force __le16)prsp->body.get_tune_status.rsp.sts.PER);
209 pstatus->BER = le16_to_cpu(prsp->body.get_tune_status.rsp.sts.BER); 204 pstatus->BER = le16_to_cpu((__force __le16)prsp->body.get_tune_status.rsp.sts.BER);
210 205
211out: 206out:
212 return error; 207 return error;
@@ -264,7 +259,7 @@ int as10x_cmd_get_tps(struct as10x_bus_adapter_t *adap, struct as10x_tps *ptps)
264 ptps->transmission_mode = prsp->body.get_tps.rsp.tps.transmission_mode; 259 ptps->transmission_mode = prsp->body.get_tps.rsp.tps.transmission_mode;
265 ptps->DVBH_mask_HP = prsp->body.get_tps.rsp.tps.DVBH_mask_HP; 260 ptps->DVBH_mask_HP = prsp->body.get_tps.rsp.tps.DVBH_mask_HP;
266 ptps->DVBH_mask_LP = prsp->body.get_tps.rsp.tps.DVBH_mask_LP; 261 ptps->DVBH_mask_LP = prsp->body.get_tps.rsp.tps.DVBH_mask_LP;
267 ptps->cell_ID = le16_to_cpu(prsp->body.get_tps.rsp.tps.cell_ID); 262 ptps->cell_ID = le16_to_cpu((__force __le16)prsp->body.get_tps.rsp.tps.cell_ID);
268 263
269out: 264out:
270 return error; 265 return error;
@@ -315,13 +310,13 @@ int as10x_cmd_get_demod_stats(struct as10x_bus_adapter_t *adap,
315 310
316 /* Response OK -> get response data */ 311 /* Response OK -> get response data */
317 pdemod_stats->frame_count = 312 pdemod_stats->frame_count =
318 le32_to_cpu(prsp->body.get_demod_stats.rsp.stats.frame_count); 313 le32_to_cpu((__force __le32)prsp->body.get_demod_stats.rsp.stats.frame_count);
319 pdemod_stats->bad_frame_count = 314 pdemod_stats->bad_frame_count =
320 le32_to_cpu(prsp->body.get_demod_stats.rsp.stats.bad_frame_count); 315 le32_to_cpu((__force __le32)prsp->body.get_demod_stats.rsp.stats.bad_frame_count);
321 pdemod_stats->bytes_fixed_by_rs = 316 pdemod_stats->bytes_fixed_by_rs =
322 le32_to_cpu(prsp->body.get_demod_stats.rsp.stats.bytes_fixed_by_rs); 317 le32_to_cpu((__force __le32)prsp->body.get_demod_stats.rsp.stats.bytes_fixed_by_rs);
323 pdemod_stats->mer = 318 pdemod_stats->mer =
324 le16_to_cpu(prsp->body.get_demod_stats.rsp.stats.mer); 319 le16_to_cpu((__force __le16)prsp->body.get_demod_stats.rsp.stats.mer);
325 pdemod_stats->has_started = 320 pdemod_stats->has_started =
326 prsp->body.get_demod_stats.rsp.stats.has_started; 321 prsp->body.get_demod_stats.rsp.stats.has_started;
327 322
diff --git a/drivers/staging/media/as102/as10x_cmd.h b/drivers/media/usb/as102/as10x_cmd.h
index e21ec6c702a9..e06b84e2ff79 100644
--- a/drivers/staging/media/as102/as10x_cmd.h
+++ b/drivers/media/usb/as102/as10x_cmd.h
@@ -11,19 +11,13 @@
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 */ 14 */
19#ifndef _AS10X_CMD_H_ 15#ifndef _AS10X_CMD_H_
20#define _AS10X_CMD_H_ 16#define _AS10X_CMD_H_
21 17
22#ifdef __KERNEL__
23#include <linux/kernel.h> 18#include <linux/kernel.h>
24#endif
25 19
26#include "as10x_types.h" 20#include "as102_fe_types.h"
27 21
28/*********************************/ 22/*********************************/
29/* MACRO DEFINITIONS */ 23/* MACRO DEFINITIONS */
@@ -98,12 +92,12 @@ union as10x_turn_on {
98 /* request */ 92 /* request */
99 struct { 93 struct {
100 /* request identifier */ 94 /* request identifier */
101 uint16_t proc_id; 95 __le16 proc_id;
102 } __packed req; 96 } __packed req;
103 /* response */ 97 /* response */
104 struct { 98 struct {
105 /* response identifier */ 99 /* response identifier */
106 uint16_t proc_id; 100 __le16 proc_id;
107 /* error */ 101 /* error */
108 uint8_t error; 102 uint8_t error;
109 } __packed rsp; 103 } __packed rsp;
@@ -113,12 +107,12 @@ union as10x_turn_off {
113 /* request */ 107 /* request */
114 struct { 108 struct {
115 /* request identifier */ 109 /* request identifier */
116 uint16_t proc_id; 110 __le16 proc_id;
117 } __packed req; 111 } __packed req;
118 /* response */ 112 /* response */
119 struct { 113 struct {
120 /* response identifier */ 114 /* response identifier */
121 uint16_t proc_id; 115 __le16 proc_id;
122 /* error */ 116 /* error */
123 uint8_t err; 117 uint8_t err;
124 } __packed rsp; 118 } __packed rsp;
@@ -128,14 +122,14 @@ union as10x_set_tune {
128 /* request */ 122 /* request */
129 struct { 123 struct {
130 /* request identifier */ 124 /* request identifier */
131 uint16_t proc_id; 125 __le16 proc_id;
132 /* tune params */ 126 /* tune params */
133 struct as10x_tune_args args; 127 struct as10x_tune_args args;
134 } __packed req; 128 } __packed req;
135 /* response */ 129 /* response */
136 struct { 130 struct {
137 /* response identifier */ 131 /* response identifier */
138 uint16_t proc_id; 132 __le16 proc_id;
139 /* response error */ 133 /* response error */
140 uint8_t error; 134 uint8_t error;
141 } __packed rsp; 135 } __packed rsp;
@@ -145,12 +139,12 @@ union as10x_get_tune_status {
145 /* request */ 139 /* request */
146 struct { 140 struct {
147 /* request identifier */ 141 /* request identifier */
148 uint16_t proc_id; 142 __le16 proc_id;
149 } __packed req; 143 } __packed req;
150 /* response */ 144 /* response */
151 struct { 145 struct {
152 /* response identifier */ 146 /* response identifier */
153 uint16_t proc_id; 147 __le16 proc_id;
154 /* response error */ 148 /* response error */
155 uint8_t error; 149 uint8_t error;
156 /* tune status */ 150 /* tune status */
@@ -162,12 +156,12 @@ union as10x_get_tps {
162 /* request */ 156 /* request */
163 struct { 157 struct {
164 /* request identifier */ 158 /* request identifier */
165 uint16_t proc_id; 159 __le16 proc_id;
166 } __packed req; 160 } __packed req;
167 /* response */ 161 /* response */
168 struct { 162 struct {
169 /* response identifier */ 163 /* response identifier */
170 uint16_t proc_id; 164 __le16 proc_id;
171 /* response error */ 165 /* response error */
172 uint8_t error; 166 uint8_t error;
173 /* tps details */ 167 /* tps details */
@@ -179,12 +173,12 @@ union as10x_common {
179 /* request */ 173 /* request */
180 struct { 174 struct {
181 /* request identifier */ 175 /* request identifier */
182 uint16_t proc_id; 176 __le16 proc_id;
183 } __packed req; 177 } __packed req;
184 /* response */ 178 /* response */
185 struct { 179 struct {
186 /* response identifier */ 180 /* response identifier */
187 uint16_t proc_id; 181 __le16 proc_id;
188 /* response error */ 182 /* response error */
189 uint8_t error; 183 uint8_t error;
190 } __packed rsp; 184 } __packed rsp;
@@ -194,9 +188,9 @@ union as10x_add_pid_filter {
194 /* request */ 188 /* request */
195 struct { 189 struct {
196 /* request identifier */ 190 /* request identifier */
197 uint16_t proc_id; 191 __le16 proc_id;
198 /* PID to filter */ 192 /* PID to filter */
199 uint16_t pid; 193 __le16 pid;
200 /* stream type (MPE, PSI/SI or PES )*/ 194 /* stream type (MPE, PSI/SI or PES )*/
201 uint8_t stream_type; 195 uint8_t stream_type;
202 /* PID index in filter table */ 196 /* PID index in filter table */
@@ -205,7 +199,7 @@ union as10x_add_pid_filter {
205 /* response */ 199 /* response */
206 struct { 200 struct {
207 /* response identifier */ 201 /* response identifier */
208 uint16_t proc_id; 202 __le16 proc_id;
209 /* response error */ 203 /* response error */
210 uint8_t error; 204 uint8_t error;
211 /* Filter id */ 205 /* Filter id */
@@ -217,14 +211,14 @@ union as10x_del_pid_filter {
217 /* request */ 211 /* request */
218 struct { 212 struct {
219 /* request identifier */ 213 /* request identifier */
220 uint16_t proc_id; 214 __le16 proc_id;
221 /* PID to remove */ 215 /* PID to remove */
222 uint16_t pid; 216 __le16 pid;
223 } __packed req; 217 } __packed req;
224 /* response */ 218 /* response */
225 struct { 219 struct {
226 /* response identifier */ 220 /* response identifier */
227 uint16_t proc_id; 221 __le16 proc_id;
228 /* response error */ 222 /* response error */
229 uint8_t error; 223 uint8_t error;
230 } __packed rsp; 224 } __packed rsp;
@@ -234,12 +228,12 @@ union as10x_start_streaming {
234 /* request */ 228 /* request */
235 struct { 229 struct {
236 /* request identifier */ 230 /* request identifier */
237 uint16_t proc_id; 231 __le16 proc_id;
238 } __packed req; 232 } __packed req;
239 /* response */ 233 /* response */
240 struct { 234 struct {
241 /* response identifier */ 235 /* response identifier */
242 uint16_t proc_id; 236 __le16 proc_id;
243 /* error */ 237 /* error */
244 uint8_t error; 238 uint8_t error;
245 } __packed rsp; 239 } __packed rsp;
@@ -249,12 +243,12 @@ union as10x_stop_streaming {
249 /* request */ 243 /* request */
250 struct { 244 struct {
251 /* request identifier */ 245 /* request identifier */
252 uint16_t proc_id; 246 __le16 proc_id;
253 } __packed req; 247 } __packed req;
254 /* response */ 248 /* response */
255 struct { 249 struct {
256 /* response identifier */ 250 /* response identifier */
257 uint16_t proc_id; 251 __le16 proc_id;
258 /* error */ 252 /* error */
259 uint8_t error; 253 uint8_t error;
260 } __packed rsp; 254 } __packed rsp;
@@ -264,12 +258,12 @@ union as10x_get_demod_stats {
264 /* request */ 258 /* request */
265 struct { 259 struct {
266 /* request identifier */ 260 /* request identifier */
267 uint16_t proc_id; 261 __le16 proc_id;
268 } __packed req; 262 } __packed req;
269 /* response */ 263 /* response */
270 struct { 264 struct {
271 /* response identifier */ 265 /* response identifier */
272 uint16_t proc_id; 266 __le16 proc_id;
273 /* error */ 267 /* error */
274 uint8_t error; 268 uint8_t error;
275 /* demod stats */ 269 /* demod stats */
@@ -281,12 +275,12 @@ union as10x_get_impulse_resp {
281 /* request */ 275 /* request */
282 struct { 276 struct {
283 /* request identifier */ 277 /* request identifier */
284 uint16_t proc_id; 278 __le16 proc_id;
285 } __packed req; 279 } __packed req;
286 /* response */ 280 /* response */
287 struct { 281 struct {
288 /* response identifier */ 282 /* response identifier */
289 uint16_t proc_id; 283 __le16 proc_id;
290 /* error */ 284 /* error */
291 uint8_t error; 285 uint8_t error;
292 /* impulse response ready */ 286 /* impulse response ready */
@@ -298,22 +292,22 @@ union as10x_fw_context {
298 /* request */ 292 /* request */
299 struct { 293 struct {
300 /* request identifier */ 294 /* request identifier */
301 uint16_t proc_id; 295 __le16 proc_id;
302 /* value to write (for set context)*/ 296 /* value to write (for set context)*/
303 struct as10x_register_value reg_val; 297 struct as10x_register_value reg_val;
304 /* context tag */ 298 /* context tag */
305 uint16_t tag; 299 __le16 tag;
306 /* context request type */ 300 /* context request type */
307 uint16_t type; 301 __le16 type;
308 } __packed req; 302 } __packed req;
309 /* response */ 303 /* response */
310 struct { 304 struct {
311 /* response identifier */ 305 /* response identifier */
312 uint16_t proc_id; 306 __le16 proc_id;
313 /* value read (for get context) */ 307 /* value read (for get context) */
314 struct as10x_register_value reg_val; 308 struct as10x_register_value reg_val;
315 /* context request type */ 309 /* context request type */
316 uint16_t type; 310 __le16 type;
317 /* error */ 311 /* error */
318 uint8_t error; 312 uint8_t error;
319 } __packed rsp; 313 } __packed rsp;
@@ -323,7 +317,7 @@ union as10x_set_register {
323 /* request */ 317 /* request */
324 struct { 318 struct {
325 /* response identifier */ 319 /* response identifier */
326 uint16_t proc_id; 320 __le16 proc_id;
327 /* register description */ 321 /* register description */
328 struct as10x_register_addr reg_addr; 322 struct as10x_register_addr reg_addr;
329 /* register content */ 323 /* register content */
@@ -332,7 +326,7 @@ union as10x_set_register {
332 /* response */ 326 /* response */
333 struct { 327 struct {
334 /* response identifier */ 328 /* response identifier */
335 uint16_t proc_id; 329 __le16 proc_id;
336 /* error */ 330 /* error */
337 uint8_t error; 331 uint8_t error;
338 } __packed rsp; 332 } __packed rsp;
@@ -342,14 +336,14 @@ union as10x_get_register {
342 /* request */ 336 /* request */
343 struct { 337 struct {
344 /* response identifier */ 338 /* response identifier */
345 uint16_t proc_id; 339 __le16 proc_id;
346 /* register description */ 340 /* register description */
347 struct as10x_register_addr reg_addr; 341 struct as10x_register_addr reg_addr;
348 } __packed req; 342 } __packed req;
349 /* response */ 343 /* response */
350 struct { 344 struct {
351 /* response identifier */ 345 /* response identifier */
352 uint16_t proc_id; 346 __le16 proc_id;
353 /* error */ 347 /* error */
354 uint8_t error; 348 uint8_t error;
355 /* register content */ 349 /* register content */
@@ -361,24 +355,24 @@ union as10x_cfg_change_mode {
361 /* request */ 355 /* request */
362 struct { 356 struct {
363 /* request identifier */ 357 /* request identifier */
364 uint16_t proc_id; 358 __le16 proc_id;
365 /* mode */ 359 /* mode */
366 uint8_t mode; 360 uint8_t mode;
367 } __packed req; 361 } __packed req;
368 /* response */ 362 /* response */
369 struct { 363 struct {
370 /* response identifier */ 364 /* response identifier */
371 uint16_t proc_id; 365 __le16 proc_id;
372 /* error */ 366 /* error */
373 uint8_t error; 367 uint8_t error;
374 } __packed rsp; 368 } __packed rsp;
375} __packed; 369} __packed;
376 370
377struct as10x_cmd_header_t { 371struct as10x_cmd_header_t {
378 uint16_t req_id; 372 __le16 req_id;
379 uint16_t prog; 373 __le16 prog;
380 uint16_t version; 374 __le16 version;
381 uint16_t data_len; 375 __le16 data_len;
382} __packed; 376} __packed;
383 377
384#define DUMP_BLOCK_SIZE 16 378#define DUMP_BLOCK_SIZE 16
@@ -387,18 +381,18 @@ union as10x_dump_memory {
387 /* request */ 381 /* request */
388 struct { 382 struct {
389 /* request identifier */ 383 /* request identifier */
390 uint16_t proc_id; 384 __le16 proc_id;
391 /* dump memory type request */ 385 /* dump memory type request */
392 uint8_t dump_req; 386 uint8_t dump_req;
393 /* register description */ 387 /* register description */
394 struct as10x_register_addr reg_addr; 388 struct as10x_register_addr reg_addr;
395 /* nb blocks to read */ 389 /* nb blocks to read */
396 uint16_t num_blocks; 390 __le16 num_blocks;
397 } __packed req; 391 } __packed req;
398 /* response */ 392 /* response */
399 struct { 393 struct {
400 /* response identifier */ 394 /* response identifier */
401 uint16_t proc_id; 395 __le16 proc_id;
402 /* error */ 396 /* error */
403 uint8_t error; 397 uint8_t error;
404 /* dump response */ 398 /* dump response */
@@ -406,8 +400,8 @@ union as10x_dump_memory {
406 /* data */ 400 /* data */
407 union { 401 union {
408 uint8_t data8[DUMP_BLOCK_SIZE]; 402 uint8_t data8[DUMP_BLOCK_SIZE];
409 uint16_t data16[DUMP_BLOCK_SIZE / sizeof(uint16_t)]; 403 __le16 data16[DUMP_BLOCK_SIZE / sizeof(__le16)];
410 uint32_t data32[DUMP_BLOCK_SIZE / sizeof(uint32_t)]; 404 __le32 data32[DUMP_BLOCK_SIZE / sizeof(__le32)];
411 } __packed u; 405 } __packed u;
412 } __packed rsp; 406 } __packed rsp;
413} __packed; 407} __packed;
@@ -415,13 +409,13 @@ union as10x_dump_memory {
415union as10x_dumplog_memory { 409union as10x_dumplog_memory {
416 struct { 410 struct {
417 /* request identifier */ 411 /* request identifier */
418 uint16_t proc_id; 412 __le16 proc_id;
419 /* dump memory type request */ 413 /* dump memory type request */
420 uint8_t dump_req; 414 uint8_t dump_req;
421 } __packed req; 415 } __packed req;
422 struct { 416 struct {
423 /* request identifier */ 417 /* request identifier */
424 uint16_t proc_id; 418 __le16 proc_id;
425 /* error */ 419 /* error */
426 uint8_t error; 420 uint8_t error;
427 /* dump response */ 421 /* dump response */
@@ -434,13 +428,13 @@ union as10x_dumplog_memory {
434union as10x_raw_data { 428union as10x_raw_data {
435 /* request */ 429 /* request */
436 struct { 430 struct {
437 uint16_t proc_id; 431 __le16 proc_id;
438 uint8_t data[64 - sizeof(struct as10x_cmd_header_t) 432 uint8_t data[64 - sizeof(struct as10x_cmd_header_t)
439 - 2 /* proc_id */]; 433 - 2 /* proc_id */];
440 } __packed req; 434 } __packed req;
441 /* response */ 435 /* response */
442 struct { 436 struct {
443 uint16_t proc_id; 437 __le16 proc_id;
444 uint8_t error; 438 uint8_t error;
445 uint8_t data[64 - sizeof(struct as10x_cmd_header_t) 439 uint8_t data[64 - sizeof(struct as10x_cmd_header_t)
446 - 2 /* proc_id */ - 1 /* rc */]; 440 - 2 /* proc_id */ - 1 /* rc */];
diff --git a/drivers/staging/media/as102/as10x_cmd_cfg.c b/drivers/media/usb/as102/as10x_cmd_cfg.c
index b1e300d88753..c87f2ca223a2 100644
--- a/drivers/staging/media/as102/as10x_cmd_cfg.c
+++ b/drivers/media/usb/as102/as10x_cmd_cfg.c
@@ -11,15 +11,10 @@
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 */ 14 */
19 15
20#include <linux/kernel.h> 16#include <linux/kernel.h>
21#include "as102_drv.h" 17#include "as102_drv.h"
22#include "as10x_types.h"
23#include "as10x_cmd.h" 18#include "as10x_cmd.h"
24 19
25/***************************/ 20/***************************/
@@ -74,7 +69,7 @@ int as10x_cmd_get_context(struct as10x_bus_adapter_t *adap, uint16_t tag,
74 69
75 if (error == 0) { 70 if (error == 0) {
76 /* Response OK -> get response data */ 71 /* Response OK -> get response data */
77 *pvalue = le32_to_cpu(prsp->body.context.rsp.reg_val.u.value32); 72 *pvalue = le32_to_cpu((__force __le32)prsp->body.context.rsp.reg_val.u.value32);
78 /* value returned is always a 32-bit value */ 73 /* value returned is always a 32-bit value */
79 } 74 }
80 75
@@ -106,7 +101,7 @@ int as10x_cmd_set_context(struct as10x_bus_adapter_t *adap, uint16_t tag,
106 /* fill command */ 101 /* fill command */
107 pcmd->body.context.req.proc_id = cpu_to_le16(CONTROL_PROC_CONTEXT); 102 pcmd->body.context.req.proc_id = cpu_to_le16(CONTROL_PROC_CONTEXT);
108 /* pcmd->body.context.req.reg_val.mode initialization is not required */ 103 /* pcmd->body.context.req.reg_val.mode initialization is not required */
109 pcmd->body.context.req.reg_val.u.value32 = cpu_to_le32(value); 104 pcmd->body.context.req.reg_val.u.value32 = (__force u32)cpu_to_le32(value);
110 pcmd->body.context.req.tag = cpu_to_le16(tag); 105 pcmd->body.context.req.tag = cpu_to_le16(tag);
111 pcmd->body.context.req.type = cpu_to_le16(SET_CONTEXT_DATA); 106 pcmd->body.context.req.type = cpu_to_le16(SET_CONTEXT_DATA);
112 107
diff --git a/drivers/staging/media/as102/as10x_cmd_stream.c b/drivers/media/usb/as102/as10x_cmd_stream.c
index 1088ca1fe92f..126aea976639 100644
--- a/drivers/staging/media/as102/as10x_cmd_stream.c
+++ b/drivers/media/usb/as102/as10x_cmd_stream.c
@@ -11,10 +11,6 @@
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 */ 14 */
19 15
20#include <linux/kernel.h> 16#include <linux/kernel.h>
diff --git a/drivers/staging/media/as102/as10x_handle.h b/drivers/media/usb/as102/as10x_handle.h
index 5638b191b780..d6b58c770500 100644
--- a/drivers/staging/media/as102/as10x_handle.h
+++ b/drivers/media/usb/as102/as10x_handle.h
@@ -11,12 +11,9 @@
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 */ 14 */
19#ifdef __KERNEL__ 15#ifndef _AS10X_HANDLE_H
16#define _AS10X_HANDLE_H
20struct as10x_bus_adapter_t; 17struct as10x_bus_adapter_t;
21struct as102_dev_t; 18struct as102_dev_t;
22 19
diff --git a/drivers/media/usb/au0828/au0828-cards.c b/drivers/media/usb/au0828/au0828-cards.c
index 2c6b7da137ed..9eb77ac2153b 100644
--- a/drivers/media/usb/au0828/au0828-cards.c
+++ b/drivers/media/usb/au0828/au0828-cards.c
@@ -46,6 +46,8 @@ struct au0828_board au0828_boards[] = {
46 .name = "Hauppauge HVR850", 46 .name = "Hauppauge HVR850",
47 .tuner_type = TUNER_XC5000, 47 .tuner_type = TUNER_XC5000,
48 .tuner_addr = 0x61, 48 .tuner_addr = 0x61,
49 .has_ir_i2c = 1,
50 .has_analog = 1,
49 .i2c_clk_divider = AU0828_I2C_CLK_250KHZ, 51 .i2c_clk_divider = AU0828_I2C_CLK_250KHZ,
50 .input = { 52 .input = {
51 { 53 {
@@ -72,12 +74,7 @@ struct au0828_board au0828_boards[] = {
72 .tuner_type = TUNER_XC5000, 74 .tuner_type = TUNER_XC5000,
73 .tuner_addr = 0x61, 75 .tuner_addr = 0x61,
74 .has_ir_i2c = 1, 76 .has_ir_i2c = 1,
75 /* The au0828 hardware i2c implementation does not properly 77 .has_analog = 1,
76 support the xc5000's i2c clock stretching. So we need to
77 lower the clock frequency enough where the 15us clock
78 stretch fits inside of a normal clock cycle, or else the
79 au0828 fails to set the STOP bit. A 30 KHz clock puts the
80 clock pulse width at 18us */
81 .i2c_clk_divider = AU0828_I2C_CLK_250KHZ, 78 .i2c_clk_divider = AU0828_I2C_CLK_250KHZ,
82 .input = { 79 .input = {
83 { 80 {
@@ -101,20 +98,20 @@ struct au0828_board au0828_boards[] = {
101 }, 98 },
102 [AU0828_BOARD_HAUPPAUGE_HVR950Q_MXL] = { 99 [AU0828_BOARD_HAUPPAUGE_HVR950Q_MXL] = {
103 .name = "Hauppauge HVR950Q rev xxF8", 100 .name = "Hauppauge HVR950Q rev xxF8",
104 .tuner_type = UNSET, 101 .tuner_type = TUNER_XC5000,
105 .tuner_addr = ADDR_UNSET, 102 .tuner_addr = 0x61,
106 .i2c_clk_divider = AU0828_I2C_CLK_250KHZ, 103 .i2c_clk_divider = AU0828_I2C_CLK_250KHZ,
107 }, 104 },
108 [AU0828_BOARD_DVICO_FUSIONHDTV7] = { 105 [AU0828_BOARD_DVICO_FUSIONHDTV7] = {
109 .name = "DViCO FusionHDTV USB", 106 .name = "DViCO FusionHDTV USB",
110 .tuner_type = UNSET, 107 .tuner_type = TUNER_XC5000,
111 .tuner_addr = ADDR_UNSET, 108 .tuner_addr = 0x61,
112 .i2c_clk_divider = AU0828_I2C_CLK_250KHZ, 109 .i2c_clk_divider = AU0828_I2C_CLK_250KHZ,
113 }, 110 },
114 [AU0828_BOARD_HAUPPAUGE_WOODBURY] = { 111 [AU0828_BOARD_HAUPPAUGE_WOODBURY] = {
115 .name = "Hauppauge Woodbury", 112 .name = "Hauppauge Woodbury",
116 .tuner_type = UNSET, 113 .tuner_type = TUNER_NXP_TDA18271,
117 .tuner_addr = ADDR_UNSET, 114 .tuner_addr = 0x60,
118 .i2c_clk_divider = AU0828_I2C_CLK_250KHZ, 115 .i2c_clk_divider = AU0828_I2C_CLK_250KHZ,
119 }, 116 },
120}; 117};
@@ -142,8 +139,7 @@ int au0828_tuner_callback(void *priv, int component, int command, int arg)
142 mdelay(10); 139 mdelay(10);
143 return 0; 140 return 0;
144 } else { 141 } else {
145 printk(KERN_ERR 142 pr_err("%s(): Unknown command.\n", __func__);
146 "%s(): Unknown command.\n", __func__);
147 return -EINVAL; 143 return -EINVAL;
148 } 144 }
149 break; 145 break;
@@ -177,12 +173,12 @@ static void hauppauge_eeprom(struct au0828_dev *dev, u8 *eeprom_data)
177 case 72500: /* WinTV-HVR950q (OEM, No IR, ATSC/QAM */ 173 case 72500: /* WinTV-HVR950q (OEM, No IR, ATSC/QAM */
178 break; 174 break;
179 default: 175 default:
180 printk(KERN_WARNING "%s: warning: " 176 pr_warn("%s: warning: unknown hauppauge model #%d\n",
181 "unknown hauppauge model #%d\n", __func__, tv.model); 177 __func__, tv.model);
182 break; 178 break;
183 } 179 }
184 180
185 printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n", 181 pr_info("%s: hauppauge eeprom: model=%d\n",
186 __func__, tv.model); 182 __func__, tv.model);
187} 183}
188 184
@@ -228,16 +224,16 @@ void au0828_card_analog_fe_setup(struct au0828_dev *dev)
228 sd = v4l2_i2c_new_subdev(&dev->v4l2_dev, &dev->i2c_adap, 224 sd = v4l2_i2c_new_subdev(&dev->v4l2_dev, &dev->i2c_adap,
229 "au8522", 0x8e >> 1, NULL); 225 "au8522", 0x8e >> 1, NULL);
230 if (sd == NULL) 226 if (sd == NULL)
231 printk(KERN_ERR "analog subdev registration failed\n"); 227 pr_err("analog subdev registration failed\n");
232 } 228 }
233 229
234 /* Setup tuners */ 230 /* Setup tuners */
235 if (dev->board.tuner_type != TUNER_ABSENT) { 231 if (dev->board.tuner_type != TUNER_ABSENT && dev->board.has_analog) {
236 /* Load the tuner module, which does the attach */ 232 /* Load the tuner module, which does the attach */
237 sd = v4l2_i2c_new_subdev(&dev->v4l2_dev, &dev->i2c_adap, 233 sd = v4l2_i2c_new_subdev(&dev->v4l2_dev, &dev->i2c_adap,
238 "tuner", dev->board.tuner_addr, NULL); 234 "tuner", dev->board.tuner_addr, NULL);
239 if (sd == NULL) 235 if (sd == NULL)
240 printk(KERN_ERR "tuner subdev registration fail\n"); 236 pr_err("tuner subdev registration fail\n");
241 237
242 tun_setup.mode_mask = mode_mask; 238 tun_setup.mode_mask = mode_mask;
243 tun_setup.type = dev->board.tuner_type; 239 tun_setup.type = dev->board.tuner_type;
diff --git a/drivers/media/usb/au0828/au0828-core.c b/drivers/media/usb/au0828/au0828-core.c
index 56025e689442..bc064803b6c7 100644
--- a/drivers/media/usb/au0828/au0828-core.c
+++ b/drivers/media/usb/au0828/au0828-core.c
@@ -19,14 +19,14 @@
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */ 20 */
21 21
22#include "au0828.h"
23
22#include <linux/module.h> 24#include <linux/module.h>
23#include <linux/slab.h> 25#include <linux/slab.h>
24#include <linux/videodev2.h> 26#include <linux/videodev2.h>
25#include <media/v4l2-common.h> 27#include <media/v4l2-common.h>
26#include <linux/mutex.h> 28#include <linux/mutex.h>
27 29
28#include "au0828.h"
29
30/* 30/*
31 * 1 = General debug messages 31 * 1 = General debug messages
32 * 2 = USB handling 32 * 2 = USB handling
@@ -90,7 +90,7 @@ static int send_control_msg(struct au0828_dev *dev, u16 request, u32 value,
90 status = min(status, 0); 90 status = min(status, 0);
91 91
92 if (status < 0) { 92 if (status < 0) {
93 printk(KERN_ERR "%s() Failed sending control message, error %d.\n", 93 pr_err("%s() Failed sending control message, error %d.\n",
94 __func__, status); 94 __func__, status);
95 } 95 }
96 96
@@ -115,7 +115,7 @@ static int recv_control_msg(struct au0828_dev *dev, u16 request, u32 value,
115 status = min(status, 0); 115 status = min(status, 0);
116 116
117 if (status < 0) { 117 if (status < 0) {
118 printk(KERN_ERR "%s() Failed receiving control message, error %d.\n", 118 pr_err("%s() Failed receiving control message, error %d.\n",
119 __func__, status); 119 __func__, status);
120 } 120 }
121 121
@@ -153,9 +153,7 @@ static void au0828_usb_disconnect(struct usb_interface *interface)
153 153
154 dprintk(1, "%s()\n", __func__); 154 dprintk(1, "%s()\n", __func__);
155 155
156#ifdef CONFIG_VIDEO_AU0828_RC
157 au0828_rc_unregister(dev); 156 au0828_rc_unregister(dev);
158#endif
159 /* Digital TV */ 157 /* Digital TV */
160 au0828_dvb_unregister(dev); 158 au0828_dvb_unregister(dev);
161 159
@@ -199,15 +197,14 @@ static int au0828_usb_probe(struct usb_interface *interface,
199 * not enough even for most Digital TV streams. 197 * not enough even for most Digital TV streams.
200 */ 198 */
201 if (usbdev->speed != USB_SPEED_HIGH && disable_usb_speed_check == 0) { 199 if (usbdev->speed != USB_SPEED_HIGH && disable_usb_speed_check == 0) {
202 printk(KERN_ERR "au0828: Device initialization failed.\n"); 200 pr_err("au0828: Device initialization failed.\n");
203 printk(KERN_ERR "au0828: Device must be connected to a " 201 pr_err("au0828: Device must be connected to a high-speed USB 2.0 port.\n");
204 "high-speed USB 2.0 port.\n");
205 return -ENODEV; 202 return -ENODEV;
206 } 203 }
207 204
208 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 205 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
209 if (dev == NULL) { 206 if (dev == NULL) {
210 printk(KERN_ERR "%s() Unable to allocate memory\n", __func__); 207 pr_err("%s() Unable to allocate memory\n", __func__);
211 return -ENOMEM; 208 return -ENOMEM;
212 } 209 }
213 210
@@ -266,10 +263,8 @@ static int au0828_usb_probe(struct usb_interface *interface,
266 pr_err("%s() au0282_dev_register failed\n", 263 pr_err("%s() au0282_dev_register failed\n",
267 __func__); 264 __func__);
268 265
269#ifdef CONFIG_VIDEO_AU0828_RC
270 /* Remote controller */ 266 /* Remote controller */
271 au0828_rc_register(dev); 267 au0828_rc_register(dev);
272#endif
273 268
274 /* 269 /*
275 * Store the pointer to the au0828_dev so it can be accessed in 270 * Store the pointer to the au0828_dev so it can be accessed in
@@ -277,7 +272,7 @@ static int au0828_usb_probe(struct usb_interface *interface,
277 */ 272 */
278 usb_set_intfdata(interface, dev); 273 usb_set_intfdata(interface, dev);
279 274
280 printk(KERN_INFO "Registered device AU0828 [%s]\n", 275 pr_info("Registered device AU0828 [%s]\n",
281 dev->board.name == NULL ? "Unset" : dev->board.name); 276 dev->board.name == NULL ? "Unset" : dev->board.name);
282 277
283 mutex_unlock(&dev->lock); 278 mutex_unlock(&dev->lock);
@@ -285,13 +280,56 @@ static int au0828_usb_probe(struct usb_interface *interface,
285 return retval; 280 return retval;
286} 281}
287 282
283static int au0828_suspend(struct usb_interface *interface,
284 pm_message_t message)
285{
286 struct au0828_dev *dev = usb_get_intfdata(interface);
287
288 if (!dev)
289 return 0;
290
291 pr_info("Suspend\n");
292
293 au0828_rc_suspend(dev);
294 au0828_v4l2_suspend(dev);
295 au0828_dvb_suspend(dev);
296
297 /* FIXME: should suspend also ATV/DTV */
298
299 return 0;
300}
301
302static int au0828_resume(struct usb_interface *interface)
303{
304 struct au0828_dev *dev = usb_get_intfdata(interface);
305 if (!dev)
306 return 0;
307
308 pr_info("Resume\n");
309
310 /* Power Up the bridge */
311 au0828_write(dev, REG_600, 1 << 4);
312
313 /* Bring up the GPIO's and supporting devices */
314 au0828_gpio_setup(dev);
315
316 au0828_rc_resume(dev);
317 au0828_v4l2_resume(dev);
318 au0828_dvb_resume(dev);
319
320 /* FIXME: should resume also ATV/DTV */
321
322 return 0;
323}
324
288static struct usb_driver au0828_usb_driver = { 325static struct usb_driver au0828_usb_driver = {
289 .name = DRIVER_NAME, 326 .name = KBUILD_MODNAME,
290 .probe = au0828_usb_probe, 327 .probe = au0828_usb_probe,
291 .disconnect = au0828_usb_disconnect, 328 .disconnect = au0828_usb_disconnect,
292 .id_table = au0828_usb_id_table, 329 .id_table = au0828_usb_id_table,
293 330 .suspend = au0828_suspend,
294 /* FIXME: Add suspend and resume functions */ 331 .resume = au0828_resume,
332 .reset_resume = au0828_resume,
295}; 333};
296 334
297static int __init au0828_init(void) 335static int __init au0828_init(void)
@@ -299,27 +337,27 @@ static int __init au0828_init(void)
299 int ret; 337 int ret;
300 338
301 if (au0828_debug & 1) 339 if (au0828_debug & 1)
302 printk(KERN_INFO "%s() Debugging is enabled\n", __func__); 340 pr_info("%s() Debugging is enabled\n", __func__);
303 341
304 if (au0828_debug & 2) 342 if (au0828_debug & 2)
305 printk(KERN_INFO "%s() USB Debugging is enabled\n", __func__); 343 pr_info("%s() USB Debugging is enabled\n", __func__);
306 344
307 if (au0828_debug & 4) 345 if (au0828_debug & 4)
308 printk(KERN_INFO "%s() I2C Debugging is enabled\n", __func__); 346 pr_info("%s() I2C Debugging is enabled\n", __func__);
309 347
310 if (au0828_debug & 8) 348 if (au0828_debug & 8)
311 printk(KERN_INFO "%s() Bridge Debugging is enabled\n", 349 pr_info("%s() Bridge Debugging is enabled\n",
312 __func__); 350 __func__);
313 351
314 if (au0828_debug & 16) 352 if (au0828_debug & 16)
315 printk(KERN_INFO "%s() IR Debugging is enabled\n", 353 pr_info("%s() IR Debugging is enabled\n",
316 __func__); 354 __func__);
317 355
318 printk(KERN_INFO "au0828 driver loaded\n"); 356 pr_info("au0828 driver loaded\n");
319 357
320 ret = usb_register(&au0828_usb_driver); 358 ret = usb_register(&au0828_usb_driver);
321 if (ret) 359 if (ret)
322 printk(KERN_ERR "usb_register failed, error = %d\n", ret); 360 pr_err("usb_register failed, error = %d\n", ret);
323 361
324 return ret; 362 return ret;
325} 363}
diff --git a/drivers/media/usb/au0828/au0828-dvb.c b/drivers/media/usb/au0828/au0828-dvb.c
index d8b5d9480279..00ab1563d142 100644
--- a/drivers/media/usb/au0828/au0828-dvb.c
+++ b/drivers/media/usb/au0828/au0828-dvb.c
@@ -19,15 +19,15 @@
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */ 20 */
21 21
22#include "au0828.h"
23
22#include <linux/module.h> 24#include <linux/module.h>
23#include <linux/slab.h> 25#include <linux/slab.h>
24#include <linux/init.h> 26#include <linux/init.h>
25#include <linux/device.h> 27#include <linux/device.h>
26#include <linux/suspend.h>
27#include <media/v4l2-common.h> 28#include <media/v4l2-common.h>
28#include <media/tuner.h> 29#include <media/tuner.h>
29 30
30#include "au0828.h"
31#include "au8522.h" 31#include "au8522.h"
32#include "xc5000.h" 32#include "xc5000.h"
33#include "mxl5007t.h" 33#include "mxl5007t.h"
@@ -121,13 +121,13 @@ static void urb_completion(struct urb *purb)
121 return; 121 return;
122 } 122 }
123 123
124 if (dev->urb_streaming == 0) { 124 if (!dev->urb_streaming) {
125 dprintk(2, "%s: not streaming!\n", __func__); 125 dprintk(2, "%s: not streaming!\n", __func__);
126 return; 126 return;
127 } 127 }
128 128
129 if (ptype != PIPE_BULK) { 129 if (ptype != PIPE_BULK) {
130 printk(KERN_ERR "%s: Unsupported URB type %d\n", 130 pr_err("%s: Unsupported URB type %d\n",
131 __func__, ptype); 131 __func__, ptype);
132 return; 132 return;
133 } 133 }
@@ -159,7 +159,10 @@ static int stop_urb_transfer(struct au0828_dev *dev)
159 159
160 dprintk(2, "%s()\n", __func__); 160 dprintk(2, "%s()\n", __func__);
161 161
162 dev->urb_streaming = 0; 162 if (!dev->urb_streaming)
163 return 0;
164
165 dev->urb_streaming = false;
163 for (i = 0; i < URB_COUNT; i++) { 166 for (i = 0; i < URB_COUNT; i++) {
164 if (dev->urbs[i]) { 167 if (dev->urbs[i]) {
165 usb_kill_urb(dev->urbs[i]); 168 usb_kill_urb(dev->urbs[i]);
@@ -202,8 +205,7 @@ static int start_urb_transfer(struct au0828_dev *dev)
202 if (!purb->transfer_buffer) { 205 if (!purb->transfer_buffer) {
203 usb_free_urb(purb); 206 usb_free_urb(purb);
204 dev->urbs[i] = NULL; 207 dev->urbs[i] = NULL;
205 printk(KERN_ERR 208 pr_err("%s: failed big buffer allocation, err = %d\n",
206 "%s: failed big buffer allocation, err = %d\n",
207 __func__, ret); 209 __func__, ret);
208 goto err; 210 goto err;
209 } 211 }
@@ -224,13 +226,13 @@ static int start_urb_transfer(struct au0828_dev *dev)
224 ret = usb_submit_urb(dev->urbs[i], GFP_ATOMIC); 226 ret = usb_submit_urb(dev->urbs[i], GFP_ATOMIC);
225 if (ret != 0) { 227 if (ret != 0) {
226 stop_urb_transfer(dev); 228 stop_urb_transfer(dev);
227 printk(KERN_ERR "%s: failed urb submission, " 229 pr_err("%s: failed urb submission, err = %d\n",
228 "err = %d\n", __func__, ret); 230 __func__, ret);
229 return ret; 231 return ret;
230 } 232 }
231 } 233 }
232 234
233 dev->urb_streaming = 1; 235 dev->urb_streaming = true;
234 ret = 0; 236 ret = 0;
235 237
236err: 238err:
@@ -268,7 +270,7 @@ static int au0828_dvb_start_feed(struct dvb_demux_feed *feed)
268 if (!demux->dmx.frontend) 270 if (!demux->dmx.frontend)
269 return -EINVAL; 271 return -EINVAL;
270 272
271 if (dvb) { 273 if (dvb->frontend) {
272 mutex_lock(&dvb->lock); 274 mutex_lock(&dvb->lock);
273 dvb->start_count++; 275 dvb->start_count++;
274 dprintk(1, "%s(), start_count: %d, stop_count: %d\n", __func__, 276 dprintk(1, "%s(), start_count: %d, stop_count: %d\n", __func__,
@@ -297,7 +299,7 @@ static int au0828_dvb_stop_feed(struct dvb_demux_feed *feed)
297 299
298 dprintk(1, "%s()\n", __func__); 300 dprintk(1, "%s()\n", __func__);
299 301
300 if (dvb) { 302 if (dvb->frontend) {
301 cancel_work_sync(&dev->restart_streaming); 303 cancel_work_sync(&dev->restart_streaming);
302 304
303 mutex_lock(&dvb->lock); 305 mutex_lock(&dvb->lock);
@@ -324,7 +326,7 @@ static void au0828_restart_dvb_streaming(struct work_struct *work)
324 restart_streaming); 326 restart_streaming);
325 struct au0828_dvb *dvb = &dev->dvb; 327 struct au0828_dvb *dvb = &dev->dvb;
326 328
327 if (dev->urb_streaming == 0) 329 if (!dev->urb_streaming)
328 return; 330 return;
329 331
330 dprintk(1, "Restarting streaming...!\n"); 332 dprintk(1, "Restarting streaming...!\n");
@@ -393,9 +395,8 @@ static int dvb_register(struct au0828_dev *dev)
393 if (!dev->dig_transfer_buffer[i]) { 395 if (!dev->dig_transfer_buffer[i]) {
394 result = -ENOMEM; 396 result = -ENOMEM;
395 397
396 printk(KERN_ERR 398 pr_err("failed buffer allocation (errno = %d)\n",
397 "%s: failed buffer allocation (errno = %d)\n", 399 result);
398 DRIVER_NAME, result);
399 goto fail_adapter; 400 goto fail_adapter;
400 } 401 }
401 } 402 }
@@ -404,11 +405,12 @@ static int dvb_register(struct au0828_dev *dev)
404 INIT_WORK(&dev->restart_streaming, au0828_restart_dvb_streaming); 405 INIT_WORK(&dev->restart_streaming, au0828_restart_dvb_streaming);
405 406
406 /* register adapter */ 407 /* register adapter */
407 result = dvb_register_adapter(&dvb->adapter, DRIVER_NAME, THIS_MODULE, 408 result = dvb_register_adapter(&dvb->adapter,
409 KBUILD_MODNAME, THIS_MODULE,
408 &dev->usbdev->dev, adapter_nr); 410 &dev->usbdev->dev, adapter_nr);
409 if (result < 0) { 411 if (result < 0) {
410 printk(KERN_ERR "%s: dvb_register_adapter failed " 412 pr_err("dvb_register_adapter failed (errno = %d)\n",
411 "(errno = %d)\n", DRIVER_NAME, result); 413 result);
412 goto fail_adapter; 414 goto fail_adapter;
413 } 415 }
414 dvb->adapter.priv = dev; 416 dvb->adapter.priv = dev;
@@ -416,8 +418,8 @@ static int dvb_register(struct au0828_dev *dev)
416 /* register frontend */ 418 /* register frontend */
417 result = dvb_register_frontend(&dvb->adapter, dvb->frontend); 419 result = dvb_register_frontend(&dvb->adapter, dvb->frontend);
418 if (result < 0) { 420 if (result < 0) {
419 printk(KERN_ERR "%s: dvb_register_frontend failed " 421 pr_err("dvb_register_frontend failed (errno = %d)\n",
420 "(errno = %d)\n", DRIVER_NAME, result); 422 result);
421 goto fail_frontend; 423 goto fail_frontend;
422 } 424 }
423 425
@@ -436,8 +438,7 @@ static int dvb_register(struct au0828_dev *dev)
436 dvb->demux.stop_feed = au0828_dvb_stop_feed; 438 dvb->demux.stop_feed = au0828_dvb_stop_feed;
437 result = dvb_dmx_init(&dvb->demux); 439 result = dvb_dmx_init(&dvb->demux);
438 if (result < 0) { 440 if (result < 0) {
439 printk(KERN_ERR "%s: dvb_dmx_init failed (errno = %d)\n", 441 pr_err("dvb_dmx_init failed (errno = %d)\n", result);
440 DRIVER_NAME, result);
441 goto fail_dmx; 442 goto fail_dmx;
442 } 443 }
443 444
@@ -446,31 +447,29 @@ static int dvb_register(struct au0828_dev *dev)
446 dvb->dmxdev.capabilities = 0; 447 dvb->dmxdev.capabilities = 0;
447 result = dvb_dmxdev_init(&dvb->dmxdev, &dvb->adapter); 448 result = dvb_dmxdev_init(&dvb->dmxdev, &dvb->adapter);
448 if (result < 0) { 449 if (result < 0) {
449 printk(KERN_ERR "%s: dvb_dmxdev_init failed (errno = %d)\n", 450 pr_err("dvb_dmxdev_init failed (errno = %d)\n", result);
450 DRIVER_NAME, result);
451 goto fail_dmxdev; 451 goto fail_dmxdev;
452 } 452 }
453 453
454 dvb->fe_hw.source = DMX_FRONTEND_0; 454 dvb->fe_hw.source = DMX_FRONTEND_0;
455 result = dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->fe_hw); 455 result = dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->fe_hw);
456 if (result < 0) { 456 if (result < 0) {
457 printk(KERN_ERR "%s: add_frontend failed " 457 pr_err("add_frontend failed (DMX_FRONTEND_0, errno = %d)\n",
458 "(DMX_FRONTEND_0, errno = %d)\n", DRIVER_NAME, result); 458 result);
459 goto fail_fe_hw; 459 goto fail_fe_hw;
460 } 460 }
461 461
462 dvb->fe_mem.source = DMX_MEMORY_FE; 462 dvb->fe_mem.source = DMX_MEMORY_FE;
463 result = dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->fe_mem); 463 result = dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->fe_mem);
464 if (result < 0) { 464 if (result < 0) {
465 printk(KERN_ERR "%s: add_frontend failed " 465 pr_err("add_frontend failed (DMX_MEMORY_FE, errno = %d)\n",
466 "(DMX_MEMORY_FE, errno = %d)\n", DRIVER_NAME, result); 466 result);
467 goto fail_fe_mem; 467 goto fail_fe_mem;
468 } 468 }
469 469
470 result = dvb->demux.dmx.connect_frontend(&dvb->demux.dmx, &dvb->fe_hw); 470 result = dvb->demux.dmx.connect_frontend(&dvb->demux.dmx, &dvb->fe_hw);
471 if (result < 0) { 471 if (result < 0) {
472 printk(KERN_ERR "%s: connect_frontend failed (errno = %d)\n", 472 pr_err("connect_frontend failed (errno = %d)\n", result);
473 DRIVER_NAME, result);
474 goto fail_fe_conn; 473 goto fail_fe_conn;
475 } 474 }
476 475
@@ -530,8 +529,7 @@ void au0828_dvb_unregister(struct au0828_dev *dev)
530 for (i = 0; i < URB_COUNT; i++) 529 for (i = 0; i < URB_COUNT; i++)
531 kfree(dev->dig_transfer_buffer[i]); 530 kfree(dev->dig_transfer_buffer[i]);
532 } 531 }
533 532 dvb->frontend = NULL;
534
535} 533}
536 534
537/* All the DVB attach calls go here, this function get's modified 535/* All the DVB attach calls go here, this function get's modified
@@ -596,12 +594,11 @@ int au0828_dvb_register(struct au0828_dev *dev)
596 } 594 }
597 break; 595 break;
598 default: 596 default:
599 printk(KERN_WARNING "The frontend of your DVB/ATSC card " 597 pr_warn("The frontend of your DVB/ATSC card isn't supported yet\n");
600 "isn't supported yet\n");
601 break; 598 break;
602 } 599 }
603 if (NULL == dvb->frontend) { 600 if (NULL == dvb->frontend) {
604 printk(KERN_ERR "%s() Frontend initialization failed\n", 601 pr_err("%s() Frontend initialization failed\n",
605 __func__); 602 __func__);
606 return -1; 603 return -1;
607 } 604 }
@@ -613,8 +610,49 @@ int au0828_dvb_register(struct au0828_dev *dev)
613 if (ret < 0) { 610 if (ret < 0) {
614 if (dvb->frontend->ops.release) 611 if (dvb->frontend->ops.release)
615 dvb->frontend->ops.release(dvb->frontend); 612 dvb->frontend->ops.release(dvb->frontend);
613 dvb->frontend = NULL;
616 return ret; 614 return ret;
617 } 615 }
618 616
619 return 0; 617 return 0;
620} 618}
619
620void au0828_dvb_suspend(struct au0828_dev *dev)
621{
622 struct au0828_dvb *dvb = &dev->dvb;
623 int rc;
624
625 if (dvb->frontend) {
626 if (dev->urb_streaming) {
627 cancel_work_sync(&dev->restart_streaming);
628 /* Stop transport */
629 mutex_lock(&dvb->lock);
630 stop_urb_transfer(dev);
631 au0828_stop_transport(dev, 1);
632 mutex_unlock(&dvb->lock);
633 dev->need_urb_start = true;
634 }
635 /* suspend frontend - does tuner and fe to sleep */
636 rc = dvb_frontend_suspend(dvb->frontend);
637 pr_info("au0828_dvb_suspend(): Suspending DVB fe %d\n", rc);
638 }
639}
640
641void au0828_dvb_resume(struct au0828_dev *dev)
642{
643 struct au0828_dvb *dvb = &dev->dvb;
644 int rc;
645
646 if (dvb->frontend) {
647 /* resume frontend - does fe and tuner init */
648 rc = dvb_frontend_resume(dvb->frontend);
649 pr_info("au0828_dvb_resume(): Resuming DVB fe %d\n", rc);
650 if (dev->need_urb_start) {
651 /* Start transport */
652 mutex_lock(&dvb->lock);
653 au0828_start_transport(dev);
654 start_urb_transfer(dev);
655 mutex_unlock(&dvb->lock);
656 }
657 }
658}
diff --git a/drivers/media/usb/au0828/au0828-i2c.c b/drivers/media/usb/au0828/au0828-i2c.c
index daaeaf1b089c..ae7ac6669769 100644
--- a/drivers/media/usb/au0828/au0828-i2c.c
+++ b/drivers/media/usb/au0828/au0828-i2c.c
@@ -19,13 +19,14 @@
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */ 20 */
21 21
22#include "au0828.h"
23
22#include <linux/module.h> 24#include <linux/module.h>
23#include <linux/moduleparam.h> 25#include <linux/moduleparam.h>
24#include <linux/init.h> 26#include <linux/init.h>
25#include <linux/delay.h> 27#include <linux/delay.h>
26#include <linux/io.h> 28#include <linux/io.h>
27 29
28#include "au0828.h"
29#include "media/tuner.h" 30#include "media/tuner.h"
30#include <media/v4l2-common.h> 31#include <media/v4l2-common.h>
31 32
@@ -340,7 +341,7 @@ static struct i2c_algorithm au0828_i2c_algo_template = {
340/* ----------------------------------------------------------------------- */ 341/* ----------------------------------------------------------------------- */
341 342
342static struct i2c_adapter au0828_i2c_adap_template = { 343static struct i2c_adapter au0828_i2c_adap_template = {
343 .name = DRIVER_NAME, 344 .name = KBUILD_MODNAME,
344 .owner = THIS_MODULE, 345 .owner = THIS_MODULE,
345 .algo = &au0828_i2c_algo_template, 346 .algo = &au0828_i2c_algo_template,
346}; 347};
@@ -365,7 +366,7 @@ static void do_i2c_scan(char *name, struct i2c_client *c)
365 rc = i2c_master_recv(c, &buf, 0); 366 rc = i2c_master_recv(c, &buf, 0);
366 if (rc < 0) 367 if (rc < 0)
367 continue; 368 continue;
368 printk(KERN_INFO "%s: i2c scan: found device @ 0x%x [%s]\n", 369 pr_info("%s: i2c scan: found device @ 0x%x [%s]\n",
369 name, i << 1, i2c_devs[i] ? i2c_devs[i] : "???"); 370 name, i << 1, i2c_devs[i] ? i2c_devs[i] : "???");
370 } 371 }
371} 372}
@@ -381,7 +382,7 @@ int au0828_i2c_register(struct au0828_dev *dev)
381 382
382 dev->i2c_adap.dev.parent = &dev->usbdev->dev; 383 dev->i2c_adap.dev.parent = &dev->usbdev->dev;
383 384
384 strlcpy(dev->i2c_adap.name, DRIVER_NAME, 385 strlcpy(dev->i2c_adap.name, KBUILD_MODNAME,
385 sizeof(dev->i2c_adap.name)); 386 sizeof(dev->i2c_adap.name));
386 387
387 dev->i2c_adap.algo = &dev->i2c_algo; 388 dev->i2c_adap.algo = &dev->i2c_algo;
@@ -396,11 +397,11 @@ int au0828_i2c_register(struct au0828_dev *dev)
396 dev->i2c_client.adapter = &dev->i2c_adap; 397 dev->i2c_client.adapter = &dev->i2c_adap;
397 398
398 if (0 == dev->i2c_rc) { 399 if (0 == dev->i2c_rc) {
399 printk(KERN_INFO "%s: i2c bus registered\n", DRIVER_NAME); 400 pr_info("i2c bus registered\n");
400 if (i2c_scan) 401 if (i2c_scan)
401 do_i2c_scan(DRIVER_NAME, &dev->i2c_client); 402 do_i2c_scan(KBUILD_MODNAME, &dev->i2c_client);
402 } else 403 } else
403 printk(KERN_INFO "%s: i2c bus register FAILED\n", DRIVER_NAME); 404 pr_info("i2c bus register FAILED\n");
404 405
405 return dev->i2c_rc; 406 return dev->i2c_rc;
406} 407}
diff --git a/drivers/media/usb/au0828/au0828-input.c b/drivers/media/usb/au0828/au0828-input.c
index fd0d3a90ce7d..63995f97dc65 100644
--- a/drivers/media/usb/au0828/au0828-input.c
+++ b/drivers/media/usb/au0828/au0828-input.c
@@ -17,6 +17,8 @@
17 GNU General Public License for more details. 17 GNU General Public License for more details.
18 */ 18 */
19 19
20#include "au0828.h"
21
20#include <linux/module.h> 22#include <linux/module.h>
21#include <linux/init.h> 23#include <linux/init.h>
22#include <linux/delay.h> 24#include <linux/delay.h>
@@ -25,7 +27,9 @@
25#include <linux/slab.h> 27#include <linux/slab.h>
26#include <media/rc-core.h> 28#include <media/rc-core.h>
27 29
28#include "au0828.h" 30static int disable_ir;
31module_param(disable_ir, int, 0444);
32MODULE_PARM_DESC(disable_ir, "disable infrared remote support");
29 33
30struct au0828_rc { 34struct au0828_rc {
31 struct au0828_dev *dev; 35 struct au0828_dev *dev;
@@ -90,14 +94,19 @@ static int au8522_rc_read(struct au0828_rc *ir, u16 reg, int val,
90static int au8522_rc_andor(struct au0828_rc *ir, u16 reg, u8 mask, u8 value) 94static int au8522_rc_andor(struct au0828_rc *ir, u16 reg, u8 mask, u8 value)
91{ 95{
92 int rc; 96 int rc;
93 char buf; 97 char buf, oldbuf;
94 98
95 rc = au8522_rc_read(ir, reg, -1, &buf, 1); 99 rc = au8522_rc_read(ir, reg, -1, &buf, 1);
96 if (rc < 0) 100 if (rc < 0)
97 return rc; 101 return rc;
98 102
103 oldbuf = buf;
99 buf = (buf & ~mask) | (value & mask); 104 buf = (buf & ~mask) | (value & mask);
100 105
106 /* Nothing to do, just return */
107 if (buf == oldbuf)
108 return 0;
109
101 return au8522_rc_write(ir, reg, buf); 110 return au8522_rc_write(ir, reg, buf);
102} 111}
103 112
@@ -122,8 +131,11 @@ static int au0828_get_key_au8522(struct au0828_rc *ir)
122 131
123 /* Check IR int */ 132 /* Check IR int */
124 rc = au8522_rc_read(ir, 0xe1, -1, buf, 1); 133 rc = au8522_rc_read(ir, 0xe1, -1, buf, 1);
125 if (rc < 0 || !(buf[0] & (1 << 4))) 134 if (rc < 0 || !(buf[0] & (1 << 4))) {
135 /* Be sure that IR is enabled */
136 au8522_rc_set(ir, 0xe0, 1 << 4);
126 return 0; 137 return 0;
138 }
127 139
128 /* Something arrived. Get the data */ 140 /* Something arrived. Get the data */
129 rc = au8522_rc_read(ir, 0xe3, 0x11, buf, sizeof(buf)); 141 rc = au8522_rc_read(ir, 0xe3, 0x11, buf, sizeof(buf));
@@ -135,8 +147,6 @@ static int au0828_get_key_au8522(struct au0828_rc *ir)
135 /* Disable IR */ 147 /* Disable IR */
136 au8522_rc_clear(ir, 0xe0, 1 << 4); 148 au8522_rc_clear(ir, 0xe0, 1 << 4);
137 149
138 usleep_range(45000, 46000);
139
140 /* Enable IR */ 150 /* Enable IR */
141 au8522_rc_set(ir, 0xe0, 1 << 4); 151 au8522_rc_set(ir, 0xe0, 1 << 4);
142 152
@@ -243,10 +253,10 @@ static void au0828_rc_stop(struct rc_dev *rc)
243{ 253{
244 struct au0828_rc *ir = rc->priv; 254 struct au0828_rc *ir = rc->priv;
245 255
256 cancel_delayed_work_sync(&ir->work);
257
246 /* Disable IR */ 258 /* Disable IR */
247 au8522_rc_clear(ir, 0xe0, 1 << 4); 259 au8522_rc_clear(ir, 0xe0, 1 << 4);
248
249 cancel_delayed_work_sync(&ir->work);
250} 260}
251 261
252static int au0828_probe_i2c_ir(struct au0828_dev *dev) 262static int au0828_probe_i2c_ir(struct au0828_dev *dev)
@@ -273,7 +283,7 @@ int au0828_rc_register(struct au0828_dev *dev)
273 int err = -ENOMEM; 283 int err = -ENOMEM;
274 u16 i2c_rc_dev_addr = 0; 284 u16 i2c_rc_dev_addr = 0;
275 285
276 if (!dev->board.has_ir_i2c) 286 if (!dev->board.has_ir_i2c || disable_ir)
277 return 0; 287 return 0;
278 288
279 i2c_rc_dev_addr = au0828_probe_i2c_ir(dev); 289 i2c_rc_dev_addr = au0828_probe_i2c_ir(dev);
@@ -368,8 +378,13 @@ int au0828_rc_suspend(struct au0828_dev *dev)
368 if (!ir) 378 if (!ir)
369 return 0; 379 return 0;
370 380
381 pr_info("Stopping RC\n");
382
371 cancel_delayed_work_sync(&ir->work); 383 cancel_delayed_work_sync(&ir->work);
372 384
385 /* Disable IR */
386 au8522_rc_clear(ir, 0xe0, 1 << 4);
387
373 return 0; 388 return 0;
374} 389}
375 390
@@ -380,6 +395,11 @@ int au0828_rc_resume(struct au0828_dev *dev)
380 if (!ir) 395 if (!ir)
381 return 0; 396 return 0;
382 397
398 pr_info("Restarting RC\n");
399
400 /* Enable IR */
401 au8522_rc_set(ir, 0xe0, 1 << 4);
402
383 schedule_delayed_work(&ir->work, msecs_to_jiffies(ir->polling)); 403 schedule_delayed_work(&ir->work, msecs_to_jiffies(ir->polling));
384 404
385 return 0; 405 return 0;
diff --git a/drivers/media/usb/au0828/au0828-vbi.c b/drivers/media/usb/au0828/au0828-vbi.c
index 63f593070ee8..932d24f42b24 100644
--- a/drivers/media/usb/au0828/au0828-vbi.c
+++ b/drivers/media/usb/au0828/au0828-vbi.c
@@ -21,13 +21,13 @@
21 02110-1301, USA. 21 02110-1301, USA.
22 */ 22 */
23 23
24#include "au0828.h"
25
24#include <linux/kernel.h> 26#include <linux/kernel.h>
25#include <linux/module.h> 27#include <linux/module.h>
26#include <linux/init.h> 28#include <linux/init.h>
27#include <linux/slab.h> 29#include <linux/slab.h>
28 30
29#include "au0828.h"
30
31static unsigned int vbibufs = 5; 31static unsigned int vbibufs = 5;
32module_param(vbibufs, int, 0644); 32module_param(vbibufs, int, 0644);
33MODULE_PARM_DESC(vbibufs, "number of vbi buffers, range 2-32"); 33MODULE_PARM_DESC(vbibufs, "number of vbi buffers, range 2-32");
diff --git a/drivers/media/usb/au0828/au0828-video.c b/drivers/media/usb/au0828/au0828-video.c
index 98f7ea1d6d63..5f337b118bff 100644
--- a/drivers/media/usb/au0828/au0828-video.c
+++ b/drivers/media/usb/au0828/au0828-video.c
@@ -28,16 +28,16 @@
28 * 28 *
29 */ 29 */
30 30
31#include "au0828.h"
32
31#include <linux/module.h> 33#include <linux/module.h>
32#include <linux/slab.h> 34#include <linux/slab.h>
33#include <linux/init.h> 35#include <linux/init.h>
34#include <linux/device.h> 36#include <linux/device.h>
35#include <linux/suspend.h>
36#include <media/v4l2-common.h> 37#include <media/v4l2-common.h>
37#include <media/v4l2-ioctl.h> 38#include <media/v4l2-ioctl.h>
38#include <media/v4l2-event.h> 39#include <media/v4l2-event.h>
39#include <media/tuner.h> 40#include <media/tuner.h>
40#include "au0828.h"
41#include "au0828-reg.h" 41#include "au0828-reg.h"
42 42
43static DEFINE_MUTEX(au0828_sysfs_lock); 43static DEFINE_MUTEX(au0828_sysfs_lock);
@@ -53,7 +53,7 @@ MODULE_PARM_DESC(isoc_debug, "enable debug messages [isoc transfers]");
53#define au0828_isocdbg(fmt, arg...) \ 53#define au0828_isocdbg(fmt, arg...) \
54do {\ 54do {\
55 if (isoc_debug) { \ 55 if (isoc_debug) { \
56 printk(KERN_INFO "au0828 %s :"fmt, \ 56 pr_info("au0828 %s :"fmt, \
57 __func__ , ##arg); \ 57 __func__ , ##arg); \
58 } \ 58 } \
59 } while (0) 59 } while (0)
@@ -106,12 +106,12 @@ static inline void print_err_status(struct au0828_dev *dev,
106static int check_dev(struct au0828_dev *dev) 106static int check_dev(struct au0828_dev *dev)
107{ 107{
108 if (dev->dev_state & DEV_DISCONNECTED) { 108 if (dev->dev_state & DEV_DISCONNECTED) {
109 printk(KERN_INFO "v4l2 ioctl: device not present\n"); 109 pr_info("v4l2 ioctl: device not present\n");
110 return -ENODEV; 110 return -ENODEV;
111 } 111 }
112 112
113 if (dev->dev_state & DEV_MISCONFIGURED) { 113 if (dev->dev_state & DEV_MISCONFIGURED) {
114 printk(KERN_INFO "v4l2 ioctl: device is misconfigured; " 114 pr_info("v4l2 ioctl: device is misconfigured; "
115 "close and open it again\n"); 115 "close and open it again\n");
116 return -EIO; 116 return -EIO;
117 } 117 }
@@ -159,6 +159,7 @@ static void au0828_irq_callback(struct urb *urb)
159 au0828_isocdbg("urb resubmit failed (error=%i)\n", 159 au0828_isocdbg("urb resubmit failed (error=%i)\n",
160 urb->status); 160 urb->status);
161 } 161 }
162 dev->stream_state = STREAM_ON;
162} 163}
163 164
164/* 165/*
@@ -198,6 +199,8 @@ static void au0828_uninit_isoc(struct au0828_dev *dev)
198 dev->isoc_ctl.urb = NULL; 199 dev->isoc_ctl.urb = NULL;
199 dev->isoc_ctl.transfer_buffer = NULL; 200 dev->isoc_ctl.transfer_buffer = NULL;
200 dev->isoc_ctl.num_bufs = 0; 201 dev->isoc_ctl.num_bufs = 0;
202
203 dev->stream_state = STREAM_OFF;
201} 204}
202 205
203/* 206/*
@@ -717,7 +720,7 @@ buffer_prepare(struct videobuf_queue *vq, struct videobuf_buffer *vb,
717 if (VIDEOBUF_NEEDS_INIT == buf->vb.state) { 720 if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
718 rc = videobuf_iolock(vq, &buf->vb, NULL); 721 rc = videobuf_iolock(vq, &buf->vb, NULL);
719 if (rc < 0) { 722 if (rc < 0) {
720 printk(KERN_INFO "videobuf_iolock failed\n"); 723 pr_info("videobuf_iolock failed\n");
721 goto fail; 724 goto fail;
722 } 725 }
723 } 726 }
@@ -730,7 +733,7 @@ buffer_prepare(struct videobuf_queue *vq, struct videobuf_buffer *vb,
730 AU0828_MAX_ISO_BUFS, dev->max_pkt_size, 733 AU0828_MAX_ISO_BUFS, dev->max_pkt_size,
731 au0828_isoc_copy); 734 au0828_isoc_copy);
732 if (rc < 0) { 735 if (rc < 0) {
733 printk(KERN_INFO "au0828_init_isoc failed\n"); 736 pr_info("au0828_init_isoc failed\n");
734 goto fail; 737 goto fail;
735 } 738 }
736 } 739 }
@@ -801,7 +804,7 @@ static int au0828_analog_stream_enable(struct au0828_dev *d)
801 /* set au0828 interface0 to AS5 here again */ 804 /* set au0828 interface0 to AS5 here again */
802 ret = usb_set_interface(d->usbdev, 0, 5); 805 ret = usb_set_interface(d->usbdev, 0, 5);
803 if (ret < 0) { 806 if (ret < 0) {
804 printk(KERN_INFO "Au0828 can't set alt setting to 5!\n"); 807 pr_info("Au0828 can't set alt setting to 5!\n");
805 return -EBUSY; 808 return -EBUSY;
806 } 809 }
807 } 810 }
@@ -1090,7 +1093,7 @@ static int au0828_v4l2_close(struct file *filp)
1090 USB bandwidth */ 1093 USB bandwidth */
1091 ret = usb_set_interface(dev->usbdev, 0, 0); 1094 ret = usb_set_interface(dev->usbdev, 0, 0);
1092 if (ret < 0) 1095 if (ret < 0)
1093 printk(KERN_INFO "Au0828 can't set alternate to 0!\n"); 1096 pr_info("Au0828 can't set alternate to 0!\n");
1094 } 1097 }
1095 mutex_unlock(&dev->lock); 1098 mutex_unlock(&dev->lock);
1096 1099
@@ -1344,7 +1347,7 @@ static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
1344 return rc; 1347 return rc;
1345 1348
1346 if (videobuf_queue_is_busy(&fh->vb_vidq)) { 1349 if (videobuf_queue_is_busy(&fh->vb_vidq)) {
1347 printk(KERN_INFO "%s queue busy\n", __func__); 1350 pr_info("%s queue busy\n", __func__);
1348 rc = -EBUSY; 1351 rc = -EBUSY;
1349 goto out; 1352 goto out;
1350 } 1353 }
@@ -1868,6 +1871,69 @@ static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *b)
1868 return rc; 1871 return rc;
1869} 1872}
1870 1873
1874void au0828_v4l2_suspend(struct au0828_dev *dev)
1875{
1876 struct urb *urb;
1877 int i;
1878
1879 pr_info("stopping V4L2\n");
1880
1881 if (dev->stream_state == STREAM_ON) {
1882 pr_info("stopping V4L2 active URBs\n");
1883 au0828_analog_stream_disable(dev);
1884 /* stop urbs */
1885 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
1886 urb = dev->isoc_ctl.urb[i];
1887 if (urb) {
1888 if (!irqs_disabled())
1889 usb_kill_urb(urb);
1890 else
1891 usb_unlink_urb(urb);
1892 }
1893 }
1894 }
1895
1896 if (dev->vid_timeout_running)
1897 del_timer_sync(&dev->vid_timeout);
1898 if (dev->vbi_timeout_running)
1899 del_timer_sync(&dev->vbi_timeout);
1900}
1901
1902void au0828_v4l2_resume(struct au0828_dev *dev)
1903{
1904 int i, rc;
1905
1906 pr_info("restarting V4L2\n");
1907
1908 if (dev->stream_state == STREAM_ON) {
1909 au0828_stream_interrupt(dev);
1910 au0828_init_tuner(dev);
1911 }
1912
1913 if (dev->vid_timeout_running)
1914 mod_timer(&dev->vid_timeout, jiffies + (HZ / 10));
1915 if (dev->vbi_timeout_running)
1916 mod_timer(&dev->vbi_timeout, jiffies + (HZ / 10));
1917
1918 /* If we were doing ac97 instead of i2s, it would go here...*/
1919 au0828_i2s_init(dev);
1920
1921 au0828_analog_stream_enable(dev);
1922
1923 if (!(dev->stream_state == STREAM_ON)) {
1924 au0828_analog_stream_reset(dev);
1925 /* submit urbs */
1926 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
1927 rc = usb_submit_urb(dev->isoc_ctl.urb[i], GFP_ATOMIC);
1928 if (rc) {
1929 au0828_isocdbg("submit of urb %i failed (error=%i)\n",
1930 i, rc);
1931 au0828_uninit_isoc(dev);
1932 }
1933 }
1934 }
1935}
1936
1871static struct v4l2_file_operations au0828_v4l_fops = { 1937static struct v4l2_file_operations au0828_v4l_fops = {
1872 .owner = THIS_MODULE, 1938 .owner = THIS_MODULE,
1873 .open = au0828_v4l2_open, 1939 .open = au0828_v4l2_open,
@@ -1939,7 +2005,7 @@ int au0828_analog_register(struct au0828_dev *dev,
1939 retval = usb_set_interface(dev->usbdev, 2005 retval = usb_set_interface(dev->usbdev,
1940 interface->cur_altsetting->desc.bInterfaceNumber, 5); 2006 interface->cur_altsetting->desc.bInterfaceNumber, 5);
1941 if (retval != 0) { 2007 if (retval != 0) {
1942 printk(KERN_INFO "Failure setting usb interface0 to as5\n"); 2008 pr_info("Failure setting usb interface0 to as5\n");
1943 return retval; 2009 return retval;
1944 } 2010 }
1945 2011
@@ -1963,7 +2029,7 @@ int au0828_analog_register(struct au0828_dev *dev,
1963 } 2029 }
1964 } 2030 }
1965 if (!(dev->isoc_in_endpointaddr)) { 2031 if (!(dev->isoc_in_endpointaddr)) {
1966 printk(KERN_INFO "Could not locate isoc endpoint\n"); 2032 pr_info("Could not locate isoc endpoint\n");
1967 kfree(dev); 2033 kfree(dev);
1968 return -ENODEV; 2034 return -ENODEV;
1969 } 2035 }
diff --git a/drivers/media/usb/au0828/au0828.h b/drivers/media/usb/au0828/au0828.h
index 96bec05d7dac..36815a369c68 100644
--- a/drivers/media/usb/au0828/au0828.h
+++ b/drivers/media/usb/au0828/au0828.h
@@ -19,6 +19,8 @@
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */ 20 */
21 21
22#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
23
22#include <linux/usb.h> 24#include <linux/usb.h>
23#include <linux/i2c.h> 25#include <linux/i2c.h>
24#include <linux/i2c-algo-bit.h> 26#include <linux/i2c-algo-bit.h>
@@ -42,7 +44,6 @@
42#include "au0828-reg.h" 44#include "au0828-reg.h"
43#include "au0828-cards.h" 45#include "au0828-cards.h"
44 46
45#define DRIVER_NAME "au0828"
46#define URB_COUNT 16 47#define URB_COUNT 16
47#define URB_BUFSIZE (0xe522) 48#define URB_BUFSIZE (0xe522)
48 49
@@ -89,6 +90,7 @@ struct au0828_board {
89 unsigned char tuner_addr; 90 unsigned char tuner_addr;
90 unsigned char i2c_clk_divider; 91 unsigned char i2c_clk_divider;
91 unsigned char has_ir_i2c:1; 92 unsigned char has_ir_i2c:1;
93 unsigned char has_analog:1;
92 struct au0828_input input[AU0828_MAX_INPUT]; 94 struct au0828_input input[AU0828_MAX_INPUT];
93 95
94}; 96};
@@ -266,8 +268,8 @@ struct au0828_dev {
266 char *transfer_buffer[AU0828_MAX_ISO_BUFS];/* transfer buffers for isoc 268 char *transfer_buffer[AU0828_MAX_ISO_BUFS];/* transfer buffers for isoc
267 transfer */ 269 transfer */
268 270
269 /* USB / URB Related */ 271 /* DVB USB / URB Related */
270 int urb_streaming; 272 bool urb_streaming, need_urb_start;
271 struct urb *urbs[URB_COUNT]; 273 struct urb *urbs[URB_COUNT];
272 274
273 /* Preallocated transfer digital transfer buffers */ 275 /* Preallocated transfer digital transfer buffers */
@@ -311,22 +313,38 @@ int au0828_analog_register(struct au0828_dev *dev,
311 struct usb_interface *interface); 313 struct usb_interface *interface);
312int au0828_analog_stream_disable(struct au0828_dev *d); 314int au0828_analog_stream_disable(struct au0828_dev *d);
313void au0828_analog_unregister(struct au0828_dev *dev); 315void au0828_analog_unregister(struct au0828_dev *dev);
316#ifdef CONFIG_VIDEO_AU0828_V4L2
317void au0828_v4l2_suspend(struct au0828_dev *dev);
318void au0828_v4l2_resume(struct au0828_dev *dev);
319#else
320static inline void au0828_v4l2_suspend(struct au0828_dev *dev) { };
321static inline void au0828_v4l2_resume(struct au0828_dev *dev) { };
322#endif
314 323
315/* ----------------------------------------------------------- */ 324/* ----------------------------------------------------------- */
316/* au0828-dvb.c */ 325/* au0828-dvb.c */
317extern int au0828_dvb_register(struct au0828_dev *dev); 326extern int au0828_dvb_register(struct au0828_dev *dev);
318extern void au0828_dvb_unregister(struct au0828_dev *dev); 327extern void au0828_dvb_unregister(struct au0828_dev *dev);
328void au0828_dvb_suspend(struct au0828_dev *dev);
329void au0828_dvb_resume(struct au0828_dev *dev);
319 330
320/* au0828-vbi.c */ 331/* au0828-vbi.c */
321extern struct videobuf_queue_ops au0828_vbi_qops; 332extern struct videobuf_queue_ops au0828_vbi_qops;
322 333
323#define dprintk(level, fmt, arg...)\ 334#define dprintk(level, fmt, arg...)\
324 do { if (au0828_debug & level)\ 335 do { if (au0828_debug & level)\
325 printk(KERN_DEBUG DRIVER_NAME "/0: " fmt, ## arg);\ 336 printk(KERN_DEBUG pr_fmt(fmt), ## arg);\
326 } while (0) 337 } while (0)
327 338
328/* au0828-input.c */ 339/* au0828-input.c */
329int au0828_rc_register(struct au0828_dev *dev); 340#ifdef CONFIG_VIDEO_AU0828_RC
330void au0828_rc_unregister(struct au0828_dev *dev); 341extern int au0828_rc_register(struct au0828_dev *dev);
331int au0828_rc_suspend(struct au0828_dev *dev); 342extern void au0828_rc_unregister(struct au0828_dev *dev);
332int au0828_rc_resume(struct au0828_dev *dev); 343extern int au0828_rc_suspend(struct au0828_dev *dev);
344extern int au0828_rc_resume(struct au0828_dev *dev);
345#else
346static inline int au0828_rc_register(struct au0828_dev *dev) { return 0; }
347static inline void au0828_rc_unregister(struct au0828_dev *dev) { }
348static inline int au0828_rc_suspend(struct au0828_dev *dev) { return 0; }
349static inline int au0828_rc_resume(struct au0828_dev *dev) { return 0; }
350#endif
diff --git a/drivers/media/usb/cx231xx/cx231xx-avcore.c b/drivers/media/usb/cx231xx/cx231xx-avcore.c
index a428c10e1a16..40a69879fc0a 100644
--- a/drivers/media/usb/cx231xx/cx231xx-avcore.c
+++ b/drivers/media/usb/cx231xx/cx231xx-avcore.c
@@ -1595,7 +1595,7 @@ void cx231xx_set_DIF_bandpass(struct cx231xx *dev, u32 if_freq,
1595 if_freq = 16000000; 1595 if_freq = 16000000;
1596 } 1596 }
1597 1597
1598 cx231xx_info("Enter IF=%zd\n", 1598 cx231xx_info("Enter IF=%zu\n",
1599 ARRAY_SIZE(Dif_set_array)); 1599 ARRAY_SIZE(Dif_set_array));
1600 for (i = 0; i < ARRAY_SIZE(Dif_set_array); i++) { 1600 for (i = 0; i < ARRAY_SIZE(Dif_set_array); i++) {
1601 if (Dif_set_array[i].if_freq == if_freq) { 1601 if (Dif_set_array[i].if_freq == if_freq) {
@@ -2223,7 +2223,7 @@ int cx231xx_set_power_mode(struct cx231xx *dev, enum AV_MODE mode)
2223 if (status < 0) 2223 if (status < 0)
2224 return status; 2224 return status;
2225 2225
2226 tmp = le32_to_cpu(*((u32 *) value)); 2226 tmp = le32_to_cpu(*((__le32 *) value));
2227 2227
2228 switch (mode) { 2228 switch (mode) {
2229 case POLARIS_AVMODE_ENXTERNAL_AV: 2229 case POLARIS_AVMODE_ENXTERNAL_AV:
@@ -2444,7 +2444,7 @@ int cx231xx_power_suspend(struct cx231xx *dev)
2444 if (status > 0) 2444 if (status > 0)
2445 return status; 2445 return status;
2446 2446
2447 tmp = le32_to_cpu(*((u32 *) value)); 2447 tmp = le32_to_cpu(*((__le32 *) value));
2448 tmp &= (~PWR_MODE_MASK); 2448 tmp &= (~PWR_MODE_MASK);
2449 2449
2450 value[0] = (u8) tmp; 2450 value[0] = (u8) tmp;
@@ -2472,7 +2472,7 @@ int cx231xx_start_stream(struct cx231xx *dev, u32 ep_mask)
2472 if (status < 0) 2472 if (status < 0)
2473 return status; 2473 return status;
2474 2474
2475 tmp = le32_to_cpu(*((u32 *) value)); 2475 tmp = le32_to_cpu(*((__le32 *) value));
2476 tmp |= ep_mask; 2476 tmp |= ep_mask;
2477 value[0] = (u8) tmp; 2477 value[0] = (u8) tmp;
2478 value[1] = (u8) (tmp >> 8); 2478 value[1] = (u8) (tmp >> 8);
@@ -2497,7 +2497,7 @@ int cx231xx_stop_stream(struct cx231xx *dev, u32 ep_mask)
2497 if (status < 0) 2497 if (status < 0)
2498 return status; 2498 return status;
2499 2499
2500 tmp = le32_to_cpu(*((u32 *) value)); 2500 tmp = le32_to_cpu(*((__le32 *) value));
2501 tmp &= (~ep_mask); 2501 tmp &= (~ep_mask);
2502 value[0] = (u8) tmp; 2502 value[0] = (u8) tmp;
2503 value[1] = (u8) (tmp >> 8); 2503 value[1] = (u8) (tmp >> 8);
@@ -2644,7 +2644,7 @@ static int cx231xx_set_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u32 gpio_val)
2644{ 2644{
2645 int status = 0; 2645 int status = 0;
2646 2646
2647 gpio_val = cpu_to_le32(gpio_val); 2647 gpio_val = (__force u32)cpu_to_le32(gpio_val);
2648 status = cx231xx_send_gpio_cmd(dev, gpio_bit, (u8 *)&gpio_val, 4, 0, 0); 2648 status = cx231xx_send_gpio_cmd(dev, gpio_bit, (u8 *)&gpio_val, 4, 0, 0);
2649 2649
2650 return status; 2650 return status;
@@ -2652,7 +2652,7 @@ static int cx231xx_set_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u32 gpio_val)
2652 2652
2653static int cx231xx_get_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u32 *gpio_val) 2653static int cx231xx_get_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u32 *gpio_val)
2654{ 2654{
2655 u32 tmp; 2655 __le32 tmp;
2656 int status = 0; 2656 int status = 0;
2657 2657
2658 status = cx231xx_send_gpio_cmd(dev, gpio_bit, (u8 *)&tmp, 4, 0, 1); 2658 status = cx231xx_send_gpio_cmd(dev, gpio_bit, (u8 *)&tmp, 4, 0, 1);
diff --git a/drivers/media/usb/cx231xx/cx231xx-cards.c b/drivers/media/usb/cx231xx/cx231xx-cards.c
index 8039b769f258..791f00c6276b 100644
--- a/drivers/media/usb/cx231xx/cx231xx-cards.c
+++ b/drivers/media/usb/cx231xx/cx231xx-cards.c
@@ -705,7 +705,7 @@ struct cx231xx_board cx231xx_boards[] = {
705 }, 705 },
706 }, 706 },
707 [CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx] = { 707 [CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx] = {
708 .name = "Hauppauge WinTV 930C-HD (1113xx) / PCTV QuatroStick 521e", 708 .name = "Hauppauge WinTV 930C-HD (1113xx) / HVR-900H (111xxx) / PCTV QuatroStick 521e",
709 .tuner_type = TUNER_NXP_TDA18271, 709 .tuner_type = TUNER_NXP_TDA18271,
710 .tuner_addr = 0x60, 710 .tuner_addr = 0x60,
711 .tuner_gpio = RDE250_XCV_TUNER, 711 .tuner_gpio = RDE250_XCV_TUNER,
@@ -744,7 +744,7 @@ struct cx231xx_board cx231xx_boards[] = {
744 } }, 744 } },
745 }, 745 },
746 [CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx] = { 746 [CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx] = {
747 .name = "Hauppauge WinTV 930C-HD (1114xx) / PCTV QuatroStick 522e", 747 .name = "Hauppauge WinTV 930C-HD (1114xx) / HVR-901H (1114xx) / PCTV QuatroStick 522e",
748 .tuner_type = TUNER_ABSENT, 748 .tuner_type = TUNER_ABSENT,
749 .tuner_addr = 0x60, 749 .tuner_addr = 0x60,
750 .tuner_gpio = RDE250_XCV_TUNER, 750 .tuner_gpio = RDE250_XCV_TUNER,
@@ -815,6 +815,12 @@ struct usb_device_id cx231xx_id_table[] = {
815 .driver_info = CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx}, 815 .driver_info = CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx},
816 {USB_DEVICE(0x2040, 0xb131), 816 {USB_DEVICE(0x2040, 0xb131),
817 .driver_info = CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx}, 817 .driver_info = CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx},
818 /* Hauppauge WinTV-HVR-900-H */
819 {USB_DEVICE(0x2040, 0xb138),
820 .driver_info = CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx},
821 /* Hauppauge WinTV-HVR-901-H */
822 {USB_DEVICE(0x2040, 0xb139),
823 .driver_info = CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx},
818 {USB_DEVICE(0x2040, 0xb140), 824 {USB_DEVICE(0x2040, 0xb140),
819 .driver_info = CX231XX_BOARD_HAUPPAUGE_EXETER}, 825 .driver_info = CX231XX_BOARD_HAUPPAUGE_EXETER},
820 {USB_DEVICE(0x2040, 0xc200), 826 {USB_DEVICE(0x2040, 0xc200),
diff --git a/drivers/media/usb/cx231xx/cx231xx-core.c b/drivers/media/usb/cx231xx/cx231xx-core.c
index 513194aa6561..180103e48036 100644
--- a/drivers/media/usb/cx231xx/cx231xx-core.c
+++ b/drivers/media/usb/cx231xx/cx231xx-core.c
@@ -1491,7 +1491,7 @@ int cx231xx_mode_register(struct cx231xx *dev, u16 address, u32 mode)
1491 if (status < 0) 1491 if (status < 0)
1492 return status; 1492 return status;
1493 1493
1494 tmp = le32_to_cpu(*((u32 *) value)); 1494 tmp = le32_to_cpu(*((__le32 *) value));
1495 tmp |= mode; 1495 tmp |= mode;
1496 1496
1497 value[0] = (u8) tmp; 1497 value[0] = (u8) tmp;
diff --git a/drivers/media/usb/cx231xx/cx231xx-dvb.c b/drivers/media/usb/cx231xx/cx231xx-dvb.c
index 1fa79741d199..6c7b5e250eed 100644
--- a/drivers/media/usb/cx231xx/cx231xx-dvb.c
+++ b/drivers/media/usb/cx231xx/cx231xx-dvb.c
@@ -403,8 +403,6 @@ static int attach_xc5000(u8 addr, struct cx231xx *dev)
403 403
404int cx231xx_set_analog_freq(struct cx231xx *dev, u32 freq) 404int cx231xx_set_analog_freq(struct cx231xx *dev, u32 freq)
405{ 405{
406 int status = 0;
407
408 if ((dev->dvb != NULL) && (dev->dvb->frontend != NULL)) { 406 if ((dev->dvb != NULL) && (dev->dvb->frontend != NULL)) {
409 407
410 struct dvb_tuner_ops *dops = &dev->dvb->frontend->ops.tuner_ops; 408 struct dvb_tuner_ops *dops = &dev->dvb->frontend->ops.tuner_ops;
@@ -423,7 +421,7 @@ int cx231xx_set_analog_freq(struct cx231xx *dev, u32 freq)
423 421
424 } 422 }
425 423
426 return status; 424 return 0;
427} 425}
428 426
429int cx231xx_reset_analog_tuner(struct cx231xx *dev) 427int cx231xx_reset_analog_tuner(struct cx231xx *dev)
@@ -740,7 +738,7 @@ static int dvb_init(struct cx231xx *dev)
740 goto out_free; 738 goto out_free;
741 } 739 }
742 740
743 dev->dvb->frontend->ops.i2c_gate_ctrl = 0; 741 dev->dvb->frontend->ops.i2c_gate_ctrl = NULL;
744 742
745 /* define general-purpose callback pointer */ 743 /* define general-purpose callback pointer */
746 dvb->frontend->callback = cx231xx_tuner_callback; 744 dvb->frontend->callback = cx231xx_tuner_callback;
@@ -773,7 +771,7 @@ static int dvb_init(struct cx231xx *dev)
773 goto out_free; 771 goto out_free;
774 } 772 }
775 773
776 dev->dvb->frontend->ops.i2c_gate_ctrl = 0; 774 dev->dvb->frontend->ops.i2c_gate_ctrl = NULL;
777 775
778 /* define general-purpose callback pointer */ 776 /* define general-purpose callback pointer */
779 dvb->frontend->callback = cx231xx_tuner_callback; 777 dvb->frontend->callback = cx231xx_tuner_callback;
diff --git a/drivers/media/usb/dvb-usb-v2/Kconfig b/drivers/media/usb/dvb-usb-v2/Kconfig
index 66645b02c854..5b34323ad207 100644
--- a/drivers/media/usb/dvb-usb-v2/Kconfig
+++ b/drivers/media/usb/dvb-usb-v2/Kconfig
@@ -141,3 +141,10 @@ config DVB_USB_RTL28XXU
141 help 141 help
142 Say Y here to support the Realtek RTL28xxU DVB USB receiver. 142 Say Y here to support the Realtek RTL28xxU DVB USB receiver.
143 143
144config DVB_USB_DVBSKY
145 tristate "DVBSky USB support"
146 depends on DVB_USB_V2
147 select DVB_M88DS3103 if MEDIA_SUBDRV_AUTOSELECT
148 select MEDIA_TUNER_M88TS2022 if MEDIA_SUBDRV_AUTOSELECT
149 help
150 Say Y here to support the USB receivers from DVBSky.
diff --git a/drivers/media/usb/dvb-usb-v2/Makefile b/drivers/media/usb/dvb-usb-v2/Makefile
index bc38f03394cd..f10d4df0eae5 100644
--- a/drivers/media/usb/dvb-usb-v2/Makefile
+++ b/drivers/media/usb/dvb-usb-v2/Makefile
@@ -37,6 +37,9 @@ obj-$(CONFIG_DVB_USB_MXL111SF) += mxl111sf-tuner.o
37dvb-usb-rtl28xxu-objs := rtl28xxu.o 37dvb-usb-rtl28xxu-objs := rtl28xxu.o
38obj-$(CONFIG_DVB_USB_RTL28XXU) += dvb-usb-rtl28xxu.o 38obj-$(CONFIG_DVB_USB_RTL28XXU) += dvb-usb-rtl28xxu.o
39 39
40dvb-usb-dvbsky-objs := dvbsky.o
41obj-$(CONFIG_DVB_USB_DVBSKY) += dvb-usb-dvbsky.o
42
40ccflags-y += -I$(srctree)/drivers/media/dvb-core 43ccflags-y += -I$(srctree)/drivers/media/dvb-core
41ccflags-y += -I$(srctree)/drivers/media/dvb-frontends 44ccflags-y += -I$(srctree)/drivers/media/dvb-frontends
42ccflags-y += -I$(srctree)/drivers/media/tuners 45ccflags-y += -I$(srctree)/drivers/media/tuners
diff --git a/drivers/media/usb/dvb-usb-v2/af9015.c b/drivers/media/usb/dvb-usb-v2/af9015.c
index 5ca738ab44e0..16c0b7d4f8e7 100644
--- a/drivers/media/usb/dvb-usb-v2/af9015.c
+++ b/drivers/media/usb/dvb-usb-v2/af9015.c
@@ -419,7 +419,7 @@ static int af9015_eeprom_hash(struct dvb_usb_device *d)
419 /* calculate checksum */ 419 /* calculate checksum */
420 for (i = 0; i < AF9015_EEPROM_SIZE / sizeof(u32); i++) { 420 for (i = 0; i < AF9015_EEPROM_SIZE / sizeof(u32); i++) {
421 state->eeprom_sum *= GOLDEN_RATIO_PRIME_32; 421 state->eeprom_sum *= GOLDEN_RATIO_PRIME_32;
422 state->eeprom_sum += le32_to_cpu(((u32 *)buf)[i]); 422 state->eeprom_sum += le32_to_cpu(((__le32 *)buf)[i]);
423 } 423 }
424 424
425 for (i = 0; i < AF9015_EEPROM_SIZE; i += 16) 425 for (i = 0; i < AF9015_EEPROM_SIZE; i += 16)
diff --git a/drivers/media/usb/dvb-usb-v2/af9035.c b/drivers/media/usb/dvb-usb-v2/af9035.c
index c82beac0e0cb..00758c83eec7 100644
--- a/drivers/media/usb/dvb-usb-v2/af9035.c
+++ b/drivers/media/usb/dvb-usb-v2/af9035.c
@@ -193,6 +193,92 @@ static int af9035_wr_reg_mask(struct dvb_usb_device *d, u32 reg, u8 val,
193 return af9035_wr_regs(d, reg, &val, 1); 193 return af9035_wr_regs(d, reg, &val, 1);
194} 194}
195 195
196static int af9035_add_i2c_dev(struct dvb_usb_device *d, char *type, u8 addr,
197 void *platform_data, struct i2c_adapter *adapter)
198{
199 int ret, num;
200 struct state *state = d_to_priv(d);
201 struct i2c_client *client;
202 struct i2c_board_info board_info = {
203 .addr = addr,
204 .platform_data = platform_data,
205 };
206
207 strlcpy(board_info.type, type, I2C_NAME_SIZE);
208
209 /* find first free client */
210 for (num = 0; num < AF9035_I2C_CLIENT_MAX; num++) {
211 if (state->i2c_client[num] == NULL)
212 break;
213 }
214
215 dev_dbg(&d->udev->dev, "%s: num=%d\n", __func__, num);
216
217 if (num == AF9035_I2C_CLIENT_MAX) {
218 dev_err(&d->udev->dev, "%s: I2C client out of index\n",
219 KBUILD_MODNAME);
220 ret = -ENODEV;
221 goto err;
222 }
223
224 request_module(board_info.type);
225
226 /* register I2C device */
227 client = i2c_new_device(adapter, &board_info);
228 if (client == NULL || client->dev.driver == NULL) {
229 ret = -ENODEV;
230 goto err;
231 }
232
233 /* increase I2C driver usage count */
234 if (!try_module_get(client->dev.driver->owner)) {
235 i2c_unregister_device(client);
236 ret = -ENODEV;
237 goto err;
238 }
239
240 state->i2c_client[num] = client;
241 return 0;
242err:
243 dev_dbg(&d->udev->dev, "%s: failed=%d\n", __func__, ret);
244 return ret;
245}
246
247static void af9035_del_i2c_dev(struct dvb_usb_device *d)
248{
249 int num;
250 struct state *state = d_to_priv(d);
251 struct i2c_client *client;
252
253 /* find last used client */
254 num = AF9035_I2C_CLIENT_MAX;
255 while (num--) {
256 if (state->i2c_client[num] != NULL)
257 break;
258 }
259
260 dev_dbg(&d->udev->dev, "%s: num=%d\n", __func__, num);
261
262 if (num == -1) {
263 dev_err(&d->udev->dev, "%s: I2C client out of index\n",
264 KBUILD_MODNAME);
265 goto err;
266 }
267
268 client = state->i2c_client[num];
269
270 /* decrease I2C driver usage count */
271 module_put(client->dev.driver->owner);
272
273 /* unregister I2C device */
274 i2c_unregister_device(client);
275
276 state->i2c_client[num] = NULL;
277 return;
278err:
279 dev_dbg(&d->udev->dev, "%s: failed\n", __func__);
280}
281
196static int af9035_i2c_master_xfer(struct i2c_adapter *adap, 282static int af9035_i2c_master_xfer(struct i2c_adapter *adap,
197 struct i2c_msg msg[], int num) 283 struct i2c_msg msg[], int num)
198{ 284{
@@ -204,7 +290,7 @@ static int af9035_i2c_master_xfer(struct i2c_adapter *adap,
204 return -EAGAIN; 290 return -EAGAIN;
205 291
206 /* 292 /*
207 * I2C sub header is 5 bytes long. Meaning of those bytes are: 293 * AF9035 I2C sub header is 5 bytes long. Meaning of those bytes are:
208 * 0: data len 294 * 0: data len
209 * 1: I2C addr << 1 295 * 1: I2C addr << 1
210 * 2: reg addr len 296 * 2: reg addr len
@@ -218,110 +304,156 @@ static int af9035_i2c_master_xfer(struct i2c_adapter *adap,
218 * NOTE: As a firmware knows tuner type there is very small possibility 304 * NOTE: As a firmware knows tuner type there is very small possibility
219 * there could be some tuner I2C hacks done by firmware and this may 305 * there could be some tuner I2C hacks done by firmware and this may
220 * lead problems if firmware expects those bytes are used. 306 * lead problems if firmware expects those bytes are used.
307 *
308 * TODO: Here is few hacks. AF9035 chip integrates AF9033 demodulator.
309 * IT9135 chip integrates AF9033 demodulator and RF tuner. For dual
310 * tuner devices, there is also external AF9033 demodulator connected
311 * via external I2C bus. All AF9033 demod I2C traffic, both single and
312 * dual tuner configuration, is covered by firmware - actual USB IO
313 * looks just like a memory access.
314 * In case of IT913x chip, there is own tuner driver. It is implemented
315 * currently as a I2C driver, even tuner IP block is likely build
316 * directly into the demodulator memory space and there is no own I2C
317 * bus. I2C subsystem does not allow register multiple devices to same
318 * bus, having same slave address. Due to that we reuse demod address,
319 * shifted by one bit, on that case.
320 *
321 * For IT930x we use a different command and the sub header is
322 * different as well:
323 * 0: data len
324 * 1: I2C bus (0x03 seems to be only value used)
325 * 2: I2C addr << 1
221 */ 326 */
222 if (num == 2 && !(msg[0].flags & I2C_M_RD) && 327#define AF9035_IS_I2C_XFER_WRITE_READ(_msg, _num) \
223 (msg[1].flags & I2C_M_RD)) { 328 (_num == 2 && !(_msg[0].flags & I2C_M_RD) && (_msg[1].flags & I2C_M_RD))
329#define AF9035_IS_I2C_XFER_WRITE(_msg, _num) \
330 (_num == 1 && !(_msg[0].flags & I2C_M_RD))
331#define AF9035_IS_I2C_XFER_READ(_msg, _num) \
332 (_num == 1 && (_msg[0].flags & I2C_M_RD))
333
334 if (AF9035_IS_I2C_XFER_WRITE_READ(msg, num)) {
224 if (msg[0].len > 40 || msg[1].len > 40) { 335 if (msg[0].len > 40 || msg[1].len > 40) {
225 /* TODO: correct limits > 40 */ 336 /* TODO: correct limits > 40 */
226 ret = -EOPNOTSUPP; 337 ret = -EOPNOTSUPP;
227 } else if ((msg[0].addr == state->af9033_config[0].i2c_addr) || 338 } else if ((msg[0].addr == state->af9033_i2c_addr[0]) ||
228 (msg[0].addr == state->af9033_config[1].i2c_addr)) { 339 (msg[0].addr == state->af9033_i2c_addr[1]) ||
340 (state->chip_type == 0x9135)) {
229 /* demod access via firmware interface */ 341 /* demod access via firmware interface */
230 u32 reg = msg[0].buf[0] << 16 | msg[0].buf[1] << 8 | 342 u32 reg = msg[0].buf[0] << 16 | msg[0].buf[1] << 8 |
231 msg[0].buf[2]; 343 msg[0].buf[2];
232 344
233 if (msg[0].addr == state->af9033_config[1].i2c_addr) 345 if (msg[0].addr == state->af9033_i2c_addr[1] ||
346 msg[0].addr == (state->af9033_i2c_addr[1] >> 1))
234 reg |= 0x100000; 347 reg |= 0x100000;
235 348
236 ret = af9035_rd_regs(d, reg, &msg[1].buf[0], 349 ret = af9035_rd_regs(d, reg, &msg[1].buf[0],
237 msg[1].len); 350 msg[1].len);
238 } else { 351 } else {
239 /* I2C */ 352 /* I2C write + read */
240 u8 buf[MAX_XFER_SIZE]; 353 u8 buf[MAX_XFER_SIZE];
241 struct usb_req req = { CMD_I2C_RD, 0, 5 + msg[0].len, 354 struct usb_req req = { CMD_I2C_RD, 0, 5 + msg[0].len,
242 buf, msg[1].len, msg[1].buf }; 355 buf, msg[1].len, msg[1].buf };
243 356
244 if (5 + msg[0].len > sizeof(buf)) { 357 if (state->chip_type == 0x9306) {
245 dev_warn(&d->udev->dev, 358 req.cmd = CMD_GENERIC_I2C_RD;
246 "%s: i2c xfer: len=%d is too big!\n", 359 req.wlen = 3 + msg[0].len;
247 KBUILD_MODNAME, msg[0].len);
248 ret = -EOPNOTSUPP;
249 goto unlock;
250 } 360 }
251 req.mbox |= ((msg[0].addr & 0x80) >> 3); 361 req.mbox |= ((msg[0].addr & 0x80) >> 3);
362
252 buf[0] = msg[1].len; 363 buf[0] = msg[1].len;
253 buf[1] = msg[0].addr << 1; 364 if (state->chip_type == 0x9306) {
254 buf[2] = 0x00; /* reg addr len */ 365 buf[1] = 0x03; /* I2C bus */
255 buf[3] = 0x00; /* reg addr MSB */ 366 buf[2] = msg[0].addr << 1;
256 buf[4] = 0x00; /* reg addr LSB */ 367 memcpy(&buf[3], msg[0].buf, msg[0].len);
257 memcpy(&buf[5], msg[0].buf, msg[0].len); 368 } else {
369 buf[1] = msg[0].addr << 1;
370 buf[2] = 0x00; /* reg addr len */
371 buf[3] = 0x00; /* reg addr MSB */
372 buf[4] = 0x00; /* reg addr LSB */
373 memcpy(&buf[5], msg[0].buf, msg[0].len);
374 }
258 ret = af9035_ctrl_msg(d, &req); 375 ret = af9035_ctrl_msg(d, &req);
259 } 376 }
260 } else if (num == 1 && !(msg[0].flags & I2C_M_RD)) { 377 } else if (AF9035_IS_I2C_XFER_WRITE(msg, num)) {
261 if (msg[0].len > 40) { 378 if (msg[0].len > 40) {
262 /* TODO: correct limits > 40 */ 379 /* TODO: correct limits > 40 */
263 ret = -EOPNOTSUPP; 380 ret = -EOPNOTSUPP;
264 } else if ((msg[0].addr == state->af9033_config[0].i2c_addr) || 381 } else if ((msg[0].addr == state->af9033_i2c_addr[0]) ||
265 (msg[0].addr == state->af9033_config[1].i2c_addr)) { 382 (msg[0].addr == state->af9033_i2c_addr[1]) ||
383 (state->chip_type == 0x9135)) {
266 /* demod access via firmware interface */ 384 /* demod access via firmware interface */
267 u32 reg = msg[0].buf[0] << 16 | msg[0].buf[1] << 8 | 385 u32 reg = msg[0].buf[0] << 16 | msg[0].buf[1] << 8 |
268 msg[0].buf[2]; 386 msg[0].buf[2];
269 387
270 if (msg[0].addr == state->af9033_config[1].i2c_addr) 388 if (msg[0].addr == state->af9033_i2c_addr[1] ||
389 msg[0].addr == (state->af9033_i2c_addr[1] >> 1))
271 reg |= 0x100000; 390 reg |= 0x100000;
272 391
273 ret = af9035_wr_regs(d, reg, &msg[0].buf[3], 392 ret = af9035_wr_regs(d, reg, &msg[0].buf[3],
274 msg[0].len - 3); 393 msg[0].len - 3);
275 } else { 394 } else {
276 /* I2C */ 395 /* I2C write */
277 u8 buf[MAX_XFER_SIZE]; 396 u8 buf[MAX_XFER_SIZE];
278 struct usb_req req = { CMD_I2C_WR, 0, 5 + msg[0].len, 397 struct usb_req req = { CMD_I2C_WR, 0, 5 + msg[0].len,
279 buf, 0, NULL }; 398 buf, 0, NULL };
280 399
281 if (5 + msg[0].len > sizeof(buf)) { 400 if (state->chip_type == 0x9306) {
282 dev_warn(&d->udev->dev, 401 req.cmd = CMD_GENERIC_I2C_WR;
283 "%s: i2c xfer: len=%d is too big!\n", 402 req.wlen = 3 + msg[0].len;
284 KBUILD_MODNAME, msg[0].len);
285 ret = -EOPNOTSUPP;
286 goto unlock;
287 } 403 }
404
288 req.mbox |= ((msg[0].addr & 0x80) >> 3); 405 req.mbox |= ((msg[0].addr & 0x80) >> 3);
289 buf[0] = msg[0].len; 406 buf[0] = msg[0].len;
290 buf[1] = msg[0].addr << 1; 407 if (state->chip_type == 0x9306) {
291 buf[2] = 0x00; /* reg addr len */ 408 buf[1] = 0x03; /* I2C bus */
292 buf[3] = 0x00; /* reg addr MSB */ 409 buf[2] = msg[0].addr << 1;
293 buf[4] = 0x00; /* reg addr LSB */ 410 memcpy(&buf[3], msg[0].buf, msg[0].len);
294 memcpy(&buf[5], msg[0].buf, msg[0].len); 411 } else {
412 buf[1] = msg[0].addr << 1;
413 buf[2] = 0x00; /* reg addr len */
414 buf[3] = 0x00; /* reg addr MSB */
415 buf[4] = 0x00; /* reg addr LSB */
416 memcpy(&buf[5], msg[0].buf, msg[0].len);
417 }
295 ret = af9035_ctrl_msg(d, &req); 418 ret = af9035_ctrl_msg(d, &req);
296 } 419 }
297 } else if (num == 1 && (msg[0].flags & I2C_M_RD)) { 420 } else if (AF9035_IS_I2C_XFER_READ(msg, num)) {
298 if (msg[0].len > 40) { 421 if (msg[0].len > 40) {
299 /* TODO: correct limits > 40 */ 422 /* TODO: correct limits > 40 */
300 ret = -EOPNOTSUPP; 423 ret = -EOPNOTSUPP;
301 } else { 424 } else {
302 /* I2C */ 425 /* I2C read */
303 u8 buf[5]; 426 u8 buf[5];
304 struct usb_req req = { CMD_I2C_RD, 0, sizeof(buf), 427 struct usb_req req = { CMD_I2C_RD, 0, sizeof(buf),
305 buf, msg[0].len, msg[0].buf }; 428 buf, msg[0].len, msg[0].buf };
429
430 if (state->chip_type == 0x9306) {
431 req.cmd = CMD_GENERIC_I2C_RD;
432 req.wlen = 3;
433 }
306 req.mbox |= ((msg[0].addr & 0x80) >> 3); 434 req.mbox |= ((msg[0].addr & 0x80) >> 3);
307 buf[0] = msg[0].len; 435 buf[0] = msg[0].len;
308 buf[1] = msg[0].addr << 1; 436 if (state->chip_type == 0x9306) {
309 buf[2] = 0x00; /* reg addr len */ 437 buf[1] = 0x03; /* I2C bus */
310 buf[3] = 0x00; /* reg addr MSB */ 438 buf[2] = msg[0].addr << 1;
311 buf[4] = 0x00; /* reg addr LSB */ 439 } else {
440 buf[1] = msg[0].addr << 1;
441 buf[2] = 0x00; /* reg addr len */
442 buf[3] = 0x00; /* reg addr MSB */
443 buf[4] = 0x00; /* reg addr LSB */
444 }
312 ret = af9035_ctrl_msg(d, &req); 445 ret = af9035_ctrl_msg(d, &req);
313 } 446 }
314 } else { 447 } else {
315 /* 448 /*
316 * We support only three kind of I2C transactions: 449 * We support only three kind of I2C transactions:
317 * 1) 1 x read + 1 x write (repeated start) 450 * 1) 1 x write + 1 x read (repeated start)
318 * 2) 1 x write 451 * 2) 1 x write
319 * 3) 1 x read 452 * 3) 1 x read
320 */ 453 */
321 ret = -EOPNOTSUPP; 454 ret = -EOPNOTSUPP;
322 } 455 }
323 456
324unlock:
325 mutex_unlock(&d->i2c_mutex); 457 mutex_unlock(&d->i2c_mutex);
326 458
327 if (ret < 0) 459 if (ret < 0)
@@ -371,6 +503,9 @@ static int af9035_identify_state(struct dvb_usb_device *d, const char **name)
371 else 503 else
372 *name = AF9035_FIRMWARE_IT9135_V1; 504 *name = AF9035_FIRMWARE_IT9135_V1;
373 state->eeprom_addr = EEPROM_BASE_IT9135; 505 state->eeprom_addr = EEPROM_BASE_IT9135;
506 } else if (state->chip_type == 0x9306) {
507 *name = AF9035_FIRMWARE_IT9303;
508 state->eeprom_addr = EEPROM_BASE_IT9135;
374 } else { 509 } else {
375 *name = AF9035_FIRMWARE_AF9035; 510 *name = AF9035_FIRMWARE_AF9035;
376 state->eeprom_addr = EEPROM_BASE_AF9035; 511 state->eeprom_addr = EEPROM_BASE_AF9035;
@@ -536,6 +671,7 @@ static int af9035_download_firmware(struct dvb_usb_device *d,
536 u8 tmp; 671 u8 tmp;
537 struct usb_req req = { 0, 0, 0, NULL, 0, NULL }; 672 struct usb_req req = { 0, 0, 0, NULL, 0, NULL };
538 struct usb_req req_fw_ver = { CMD_FW_QUERYINFO, 0, 1, wbuf, 4, rbuf }; 673 struct usb_req req_fw_ver = { CMD_FW_QUERYINFO, 0, 1, wbuf, 4, rbuf };
674
539 dev_dbg(&d->udev->dev, "%s:\n", __func__); 675 dev_dbg(&d->udev->dev, "%s:\n", __func__);
540 676
541 /* 677 /*
@@ -579,7 +715,8 @@ static int af9035_download_firmware(struct dvb_usb_device *d,
579 if (!tmp) 715 if (!tmp)
580 tmp = 0x3a; 716 tmp = 0x3a;
581 717
582 if (state->chip_type == 0x9135) { 718 if ((state->chip_type == 0x9135) ||
719 (state->chip_type == 0x9306)) {
583 ret = af9035_wr_reg(d, 0x004bfb, tmp); 720 ret = af9035_wr_reg(d, 0x004bfb, tmp);
584 if (ret < 0) 721 if (ret < 0)
585 goto err; 722 goto err;
@@ -640,23 +777,26 @@ static int af9035_read_config(struct dvb_usb_device *d)
640 u16 tmp16, addr; 777 u16 tmp16, addr;
641 778
642 /* demod I2C "address" */ 779 /* demod I2C "address" */
643 state->af9033_config[0].i2c_addr = 0x38; 780 state->af9033_i2c_addr[0] = 0x38;
644 state->af9033_config[1].i2c_addr = 0x3a; 781 state->af9033_i2c_addr[1] = 0x3a;
645 state->af9033_config[0].adc_multiplier = AF9033_ADC_MULTIPLIER_2X; 782 state->af9033_config[0].adc_multiplier = AF9033_ADC_MULTIPLIER_2X;
646 state->af9033_config[1].adc_multiplier = AF9033_ADC_MULTIPLIER_2X; 783 state->af9033_config[1].adc_multiplier = AF9033_ADC_MULTIPLIER_2X;
647 state->af9033_config[0].ts_mode = AF9033_TS_MODE_USB; 784 state->af9033_config[0].ts_mode = AF9033_TS_MODE_USB;
648 state->af9033_config[1].ts_mode = AF9033_TS_MODE_SERIAL; 785 state->af9033_config[1].ts_mode = AF9033_TS_MODE_SERIAL;
649 786
650 /* eeprom memory mapped location */
651 if (state->chip_type == 0x9135) { 787 if (state->chip_type == 0x9135) {
788 /* feed clock for integrated RF tuner */
789 state->af9033_config[0].dyn0_clk = true;
790 state->af9033_config[1].dyn0_clk = true;
791
652 if (state->chip_version == 0x02) { 792 if (state->chip_version == 0x02) {
653 state->af9033_config[0].tuner = AF9033_TUNER_IT9135_60; 793 state->af9033_config[0].tuner = AF9033_TUNER_IT9135_60;
654 state->af9033_config[1].tuner = AF9033_TUNER_IT9135_60; 794 state->af9033_config[1].tuner = AF9033_TUNER_IT9135_60;
655 tmp16 = 0x00461d; 795 tmp16 = 0x00461d; /* eeprom memory mapped location */
656 } else { 796 } else {
657 state->af9033_config[0].tuner = AF9033_TUNER_IT9135_38; 797 state->af9033_config[0].tuner = AF9033_TUNER_IT9135_38;
658 state->af9033_config[1].tuner = AF9033_TUNER_IT9135_38; 798 state->af9033_config[1].tuner = AF9033_TUNER_IT9135_38;
659 tmp16 = 0x00461b; 799 tmp16 = 0x00461b; /* eeprom memory mapped location */
660 } 800 }
661 801
662 /* check if eeprom exists */ 802 /* check if eeprom exists */
@@ -668,8 +808,16 @@ static int af9035_read_config(struct dvb_usb_device *d)
668 dev_dbg(&d->udev->dev, "%s: no eeprom\n", __func__); 808 dev_dbg(&d->udev->dev, "%s: no eeprom\n", __func__);
669 goto skip_eeprom; 809 goto skip_eeprom;
670 } 810 }
811 } else if (state->chip_type == 0x9306) {
812 /*
813 * IT930x is an USB bridge, only single demod-single tuner
814 * configurations seen so far.
815 */
816 return 0;
671 } 817 }
672 818
819
820
673 /* check if there is dual tuners */ 821 /* check if there is dual tuners */
674 ret = af9035_rd_reg(d, state->eeprom_addr + EEPROM_TS_MODE, &tmp); 822 ret = af9035_rd_reg(d, state->eeprom_addr + EEPROM_TS_MODE, &tmp);
675 if (ret < 0) 823 if (ret < 0)
@@ -690,7 +838,7 @@ static int af9035_read_config(struct dvb_usb_device *d)
690 goto err; 838 goto err;
691 839
692 if (tmp) 840 if (tmp)
693 state->af9033_config[1].i2c_addr = tmp; 841 state->af9033_i2c_addr[1] = tmp;
694 842
695 dev_dbg(&d->udev->dev, "%s: 2nd demod I2C addr=%02x\n", 843 dev_dbg(&d->udev->dev, "%s: 2nd demod I2C addr=%02x\n",
696 __func__, tmp); 844 __func__, tmp);
@@ -799,25 +947,6 @@ static int af9035_read_config(struct dvb_usb_device *d)
799 addr += 0x10; /* shift for the 2nd tuner params */ 947 addr += 0x10; /* shift for the 2nd tuner params */
800 } 948 }
801 949
802 /*
803 * These AVerMedia devices has a bad EEPROM content :-(
804 * Override some wrong values here.
805 */
806 if (le16_to_cpu(d->udev->descriptor.idVendor) == USB_VID_AVERMEDIA) {
807 switch (le16_to_cpu(d->udev->descriptor.idProduct)) {
808 case USB_PID_AVERMEDIA_A835B_1835:
809 case USB_PID_AVERMEDIA_A835B_2835:
810 case USB_PID_AVERMEDIA_A835B_3835:
811 dev_info(&d->udev->dev,
812 "%s: overriding tuner from %02x to %02x\n",
813 KBUILD_MODNAME, state->af9033_config[0].tuner,
814 AF9033_TUNER_IT9135_60);
815
816 state->af9033_config[0].tuner = AF9033_TUNER_IT9135_60;
817 break;
818 }
819 }
820
821skip_eeprom: 950skip_eeprom:
822 /* get demod clock */ 951 /* get demod clock */
823 ret = af9035_rd_reg(d, 0x00d800, &tmp); 952 ret = af9035_rd_reg(d, 0x00d800, &tmp);
@@ -990,6 +1119,7 @@ static int af9035_frontend_callback(void *adapter_priv, int component,
990static int af9035_get_adapter_count(struct dvb_usb_device *d) 1119static int af9035_get_adapter_count(struct dvb_usb_device *d)
991{ 1120{
992 struct state *state = d_to_priv(d); 1121 struct state *state = d_to_priv(d);
1122
993 return state->dual_mode + 1; 1123 return state->dual_mode + 1;
994} 1124}
995 1125
@@ -998,7 +1128,8 @@ static int af9035_frontend_attach(struct dvb_usb_adapter *adap)
998 struct state *state = adap_to_priv(adap); 1128 struct state *state = adap_to_priv(adap);
999 struct dvb_usb_device *d = adap_to_d(adap); 1129 struct dvb_usb_device *d = adap_to_d(adap);
1000 int ret; 1130 int ret;
1001 dev_dbg(&d->udev->dev, "%s:\n", __func__); 1131
1132 dev_dbg(&d->udev->dev, "%s: adap->id=%d\n", __func__, adap->id);
1002 1133
1003 if (!state->af9033_config[adap->id].tuner) { 1134 if (!state->af9033_config[adap->id].tuner) {
1004 /* unsupported tuner */ 1135 /* unsupported tuner */
@@ -1006,9 +1137,13 @@ static int af9035_frontend_attach(struct dvb_usb_adapter *adap)
1006 goto err; 1137 goto err;
1007 } 1138 }
1008 1139
1009 /* attach demodulator */ 1140 state->af9033_config[adap->id].fe = &adap->fe[0];
1010 adap->fe[0] = dvb_attach(af9033_attach, &state->af9033_config[adap->id], 1141 state->af9033_config[adap->id].ops = &state->ops;
1011 &d->i2c_adap, &state->ops); 1142 ret = af9035_add_i2c_dev(d, "af9033", state->af9033_i2c_addr[adap->id],
1143 &state->af9033_config[adap->id], &d->i2c_adap);
1144 if (ret)
1145 goto err;
1146
1012 if (adap->fe[0] == NULL) { 1147 if (adap->fe[0] == NULL) {
1013 ret = -ENODEV; 1148 ret = -ENODEV;
1014 goto err; 1149 goto err;
@@ -1026,6 +1161,78 @@ err:
1026 return ret; 1161 return ret;
1027} 1162}
1028 1163
1164static int it930x_frontend_attach(struct dvb_usb_adapter *adap)
1165{
1166 struct state *state = adap_to_priv(adap);
1167 struct dvb_usb_device *d = adap_to_d(adap);
1168 int ret;
1169 struct si2168_config si2168_config;
1170 struct i2c_adapter *adapter;
1171
1172 dev_dbg(&d->udev->dev, "adap->id=%d\n", adap->id);
1173
1174 si2168_config.i2c_adapter = &adapter;
1175 si2168_config.fe = &adap->fe[0];
1176 si2168_config.ts_mode = SI2168_TS_SERIAL;
1177
1178 state->af9033_config[adap->id].fe = &adap->fe[0];
1179 state->af9033_config[adap->id].ops = &state->ops;
1180 ret = af9035_add_i2c_dev(d, "si2168", 0x67, &si2168_config,
1181 &d->i2c_adap);
1182 if (ret)
1183 goto err;
1184
1185 if (adap->fe[0] == NULL) {
1186 ret = -ENODEV;
1187 goto err;
1188 }
1189 state->i2c_adapter_demod = adapter;
1190
1191 return 0;
1192
1193err:
1194 dev_dbg(&d->udev->dev, "%s: failed=%d\n", __func__, ret);
1195
1196 return ret;
1197}
1198
1199static int af9035_frontend_detach(struct dvb_usb_adapter *adap)
1200{
1201 struct state *state = adap_to_priv(adap);
1202 struct dvb_usb_device *d = adap_to_d(adap);
1203 int demod2;
1204
1205 dev_dbg(&d->udev->dev, "%s: adap->id=%d\n", __func__, adap->id);
1206
1207 /*
1208 * For dual tuner devices we have to resolve 2nd demod client, as there
1209 * is two different kind of tuner drivers; one is using I2C binding
1210 * and the other is using DVB attach/detach binding.
1211 */
1212 switch (state->af9033_config[adap->id].tuner) {
1213 case AF9033_TUNER_IT9135_38:
1214 case AF9033_TUNER_IT9135_51:
1215 case AF9033_TUNER_IT9135_52:
1216 case AF9033_TUNER_IT9135_60:
1217 case AF9033_TUNER_IT9135_61:
1218 case AF9033_TUNER_IT9135_62:
1219 demod2 = 2;
1220 break;
1221 default:
1222 demod2 = 1;
1223 }
1224
1225 if (adap->id == 1) {
1226 if (state->i2c_client[demod2])
1227 af9035_del_i2c_dev(d);
1228 } else if (adap->id == 0) {
1229 if (state->i2c_client[0])
1230 af9035_del_i2c_dev(d);
1231 }
1232
1233 return 0;
1234}
1235
1029static struct tua9001_config af9035_tua9001_config = { 1236static struct tua9001_config af9035_tua9001_config = {
1030 .i2c_addr = 0x60, 1237 .i2c_addr = 0x60,
1031}; 1238};
@@ -1084,7 +1291,8 @@ static int af9035_tuner_attach(struct dvb_usb_adapter *adap)
1084 struct dvb_frontend *fe; 1291 struct dvb_frontend *fe;
1085 struct i2c_msg msg[1]; 1292 struct i2c_msg msg[1];
1086 u8 tuner_addr; 1293 u8 tuner_addr;
1087 dev_dbg(&d->udev->dev, "%s:\n", __func__); 1294
1295 dev_dbg(&d->udev->dev, "%s: adap->id=%d\n", __func__, adap->id);
1088 1296
1089 /* 1297 /*
1090 * XXX: Hack used in that function: we abuse unused I2C address bit [7] 1298 * XXX: Hack used in that function: we abuse unused I2C address bit [7]
@@ -1243,14 +1451,53 @@ static int af9035_tuner_attach(struct dvb_usb_adapter *adap)
1243 case AF9033_TUNER_IT9135_38: 1451 case AF9033_TUNER_IT9135_38:
1244 case AF9033_TUNER_IT9135_51: 1452 case AF9033_TUNER_IT9135_51:
1245 case AF9033_TUNER_IT9135_52: 1453 case AF9033_TUNER_IT9135_52:
1454 {
1455 struct it913x_config it913x_config = {
1456 .fe = adap->fe[0],
1457 .chip_ver = 1,
1458 };
1459
1460 if (state->dual_mode) {
1461 if (adap->id == 0)
1462 it913x_config.role = IT913X_ROLE_DUAL_MASTER;
1463 else
1464 it913x_config.role = IT913X_ROLE_DUAL_SLAVE;
1465 }
1466
1467 ret = af9035_add_i2c_dev(d, "it913x",
1468 state->af9033_i2c_addr[adap->id] >> 1,
1469 &it913x_config, &d->i2c_adap);
1470 if (ret)
1471 goto err;
1472
1473 fe = adap->fe[0];
1474 break;
1475 }
1246 case AF9033_TUNER_IT9135_60: 1476 case AF9033_TUNER_IT9135_60:
1247 case AF9033_TUNER_IT9135_61: 1477 case AF9033_TUNER_IT9135_61:
1248 case AF9033_TUNER_IT9135_62: 1478 case AF9033_TUNER_IT9135_62:
1249 /* attach tuner */ 1479 {
1250 fe = dvb_attach(it913x_attach, adap->fe[0], &d->i2c_adap, 1480 struct it913x_config it913x_config = {
1251 state->af9033_config[adap->id].i2c_addr, 1481 .fe = adap->fe[0],
1252 state->af9033_config[0].tuner); 1482 .chip_ver = 2,
1483 };
1484
1485 if (state->dual_mode) {
1486 if (adap->id == 0)
1487 it913x_config.role = IT913X_ROLE_DUAL_MASTER;
1488 else
1489 it913x_config.role = IT913X_ROLE_DUAL_SLAVE;
1490 }
1491
1492 ret = af9035_add_i2c_dev(d, "it913x",
1493 state->af9033_i2c_addr[adap->id] >> 1,
1494 &it913x_config, &d->i2c_adap);
1495 if (ret)
1496 goto err;
1497
1498 fe = adap->fe[0];
1253 break; 1499 break;
1500 }
1254 default: 1501 default:
1255 fe = NULL; 1502 fe = NULL;
1256 } 1503 }
@@ -1268,6 +1515,119 @@ err:
1268 return ret; 1515 return ret;
1269} 1516}
1270 1517
1518static int it930x_tuner_attach(struct dvb_usb_adapter *adap)
1519{
1520 struct state *state = adap_to_priv(adap);
1521 struct dvb_usb_device *d = adap_to_d(adap);
1522 int ret;
1523 struct si2157_config si2157_config;
1524
1525 dev_dbg(&d->udev->dev, "%s: adap->id=%d\n", __func__, adap->id);
1526
1527 /* I2C master bus 2 clock speed 300k */
1528 ret = af9035_wr_reg(d, 0x00f6a7, 0x07);
1529 if (ret < 0)
1530 goto err;
1531
1532 /* I2C master bus 1,3 clock speed 300k */
1533 ret = af9035_wr_reg(d, 0x00f103, 0x07);
1534 if (ret < 0)
1535 goto err;
1536
1537 /* set gpio11 low */
1538 ret = af9035_wr_reg_mask(d, 0xd8d4, 0x01, 0x01);
1539 if (ret < 0)
1540 goto err;
1541
1542 ret = af9035_wr_reg_mask(d, 0xd8d5, 0x01, 0x01);
1543 if (ret < 0)
1544 goto err;
1545
1546 ret = af9035_wr_reg_mask(d, 0xd8d3, 0x01, 0x01);
1547 if (ret < 0)
1548 goto err;
1549
1550 /* Tuner enable using gpiot2_en, gpiot2_on and gpiot2_o (reset) */
1551 ret = af9035_wr_reg_mask(d, 0xd8b8, 0x01, 0x01);
1552 if (ret < 0)
1553 goto err;
1554
1555 ret = af9035_wr_reg_mask(d, 0xd8b9, 0x01, 0x01);
1556 if (ret < 0)
1557 goto err;
1558
1559 ret = af9035_wr_reg_mask(d, 0xd8b7, 0x00, 0x01);
1560 if (ret < 0)
1561 goto err;
1562
1563 msleep(200);
1564
1565 ret = af9035_wr_reg_mask(d, 0xd8b7, 0x01, 0x01);
1566 if (ret < 0)
1567 goto err;
1568
1569 memset(&si2157_config, 0, sizeof(si2157_config));
1570 si2157_config.fe = adap->fe[0];
1571 ret = af9035_add_i2c_dev(d, "si2157", 0x63,
1572 &si2157_config, state->i2c_adapter_demod);
1573
1574 if (ret)
1575 goto err;
1576
1577 return 0;
1578
1579err:
1580 dev_dbg(&d->udev->dev, "%s: failed=%d\n", __func__, ret);
1581
1582 return ret;
1583}
1584
1585
1586static int it930x_tuner_detach(struct dvb_usb_adapter *adap)
1587{
1588 struct state *state = adap_to_priv(adap);
1589 struct dvb_usb_device *d = adap_to_d(adap);
1590
1591 dev_dbg(&d->udev->dev, "adap->id=%d\n", adap->id);
1592
1593 if (adap->id == 1) {
1594 if (state->i2c_client[3])
1595 af9035_del_i2c_dev(d);
1596 } else if (adap->id == 0) {
1597 if (state->i2c_client[1])
1598 af9035_del_i2c_dev(d);
1599 }
1600
1601 return 0;
1602}
1603
1604
1605static int af9035_tuner_detach(struct dvb_usb_adapter *adap)
1606{
1607 struct state *state = adap_to_priv(adap);
1608 struct dvb_usb_device *d = adap_to_d(adap);
1609
1610 dev_dbg(&d->udev->dev, "%s: adap->id=%d\n", __func__, adap->id);
1611
1612 switch (state->af9033_config[adap->id].tuner) {
1613 case AF9033_TUNER_IT9135_38:
1614 case AF9033_TUNER_IT9135_51:
1615 case AF9033_TUNER_IT9135_52:
1616 case AF9033_TUNER_IT9135_60:
1617 case AF9033_TUNER_IT9135_61:
1618 case AF9033_TUNER_IT9135_62:
1619 if (adap->id == 1) {
1620 if (state->i2c_client[3])
1621 af9035_del_i2c_dev(d);
1622 } else if (adap->id == 0) {
1623 if (state->i2c_client[1])
1624 af9035_del_i2c_dev(d);
1625 }
1626 }
1627
1628 return 0;
1629}
1630
1271static int af9035_init(struct dvb_usb_device *d) 1631static int af9035_init(struct dvb_usb_device *d)
1272{ 1632{
1273 struct state *state = d_to_priv(d); 1633 struct state *state = d_to_priv(d);
@@ -1315,6 +1675,89 @@ err:
1315 return ret; 1675 return ret;
1316} 1676}
1317 1677
1678static int it930x_init(struct dvb_usb_device *d)
1679{
1680 struct state *state = d_to_priv(d);
1681 int ret, i;
1682 u16 frame_size = (d->udev->speed == USB_SPEED_FULL ? 5 : 816) * 188 / 4;
1683 u8 packet_size = (d->udev->speed == USB_SPEED_FULL ? 64 : 512) / 4;
1684 struct reg_val_mask tab[] = {
1685 { 0x00da1a, 0x00, 0x01 }, /* ignore_sync_byte */
1686 { 0x00f41f, 0x04, 0x04 }, /* dvbt_inten */
1687 { 0x00da10, 0x00, 0x01 }, /* mpeg_full_speed */
1688 { 0x00f41a, 0x01, 0x01 }, /* dvbt_en */
1689 { 0x00da1d, 0x01, 0x01 }, /* mp2_sw_rst, reset EP4 */
1690 { 0x00dd11, 0x00, 0x20 }, /* ep4_tx_en, disable EP4 */
1691 { 0x00dd13, 0x00, 0x20 }, /* ep4_tx_nak, disable EP4 NAK */
1692 { 0x00dd11, 0x20, 0x20 }, /* ep4_tx_en, enable EP4 */
1693 { 0x00dd11, 0x00, 0x40 }, /* ep5_tx_en, disable EP5 */
1694 { 0x00dd13, 0x00, 0x40 }, /* ep5_tx_nak, disable EP5 NAK */
1695 { 0x00dd11, state->dual_mode << 6, 0x40 }, /* enable EP5 */
1696 { 0x00dd88, (frame_size >> 0) & 0xff, 0xff},
1697 { 0x00dd89, (frame_size >> 8) & 0xff, 0xff},
1698 { 0x00dd0c, packet_size, 0xff},
1699 { 0x00dd8a, (frame_size >> 0) & 0xff, 0xff},
1700 { 0x00dd8b, (frame_size >> 8) & 0xff, 0xff},
1701 { 0x00dd0d, packet_size, 0xff },
1702 { 0x00da1d, 0x00, 0x01 }, /* mp2_sw_rst, disable */
1703 { 0x00d833, 0x01, 0xff }, /* slew rate ctrl: slew rate boosts */
1704 { 0x00d830, 0x00, 0xff }, /* Bit 0 of output driving control */
1705 { 0x00d831, 0x01, 0xff }, /* Bit 1 of output driving control */
1706 { 0x00d832, 0x00, 0xff }, /* Bit 2 of output driving control */
1707
1708 /* suspend gpio1 for TS-C */
1709 { 0x00d8b0, 0x01, 0xff }, /* gpio1 */
1710 { 0x00d8b1, 0x01, 0xff }, /* gpio1 */
1711 { 0x00d8af, 0x00, 0xff }, /* gpio1 */
1712
1713 /* suspend gpio7 for TS-D */
1714 { 0x00d8c4, 0x01, 0xff }, /* gpio7 */
1715 { 0x00d8c5, 0x01, 0xff }, /* gpio7 */
1716 { 0x00d8c3, 0x00, 0xff }, /* gpio7 */
1717
1718 /* suspend gpio13 for TS-B */
1719 { 0x00d8dc, 0x01, 0xff }, /* gpio13 */
1720 { 0x00d8dd, 0x01, 0xff }, /* gpio13 */
1721 { 0x00d8db, 0x00, 0xff }, /* gpio13 */
1722
1723 /* suspend gpio14 for TS-E */
1724 { 0x00d8e4, 0x01, 0xff }, /* gpio14 */
1725 { 0x00d8e5, 0x01, 0xff }, /* gpio14 */
1726 { 0x00d8e3, 0x00, 0xff }, /* gpio14 */
1727
1728 /* suspend gpio15 for TS-A */
1729 { 0x00d8e8, 0x01, 0xff }, /* gpio15 */
1730 { 0x00d8e9, 0x01, 0xff }, /* gpio15 */
1731 { 0x00d8e7, 0x00, 0xff }, /* gpio15 */
1732
1733 { 0x00da58, 0x00, 0x01 }, /* ts_in_src, serial */
1734 { 0x00da73, 0x01, 0xff }, /* ts0_aggre_mode */
1735 { 0x00da78, 0x47, 0xff }, /* ts0_sync_byte */
1736 { 0x00da4c, 0x01, 0xff }, /* ts0_en */
1737 { 0x00da5a, 0x1f, 0xff }, /* ts_fail_ignore */
1738 };
1739
1740 dev_dbg(&d->udev->dev,
1741 "%s: USB speed=%d frame_size=%04x packet_size=%02x\n",
1742 __func__, d->udev->speed, frame_size, packet_size);
1743
1744 /* init endpoints */
1745 for (i = 0; i < ARRAY_SIZE(tab); i++) {
1746 ret = af9035_wr_reg_mask(d, tab[i].reg,
1747 tab[i].val, tab[i].mask);
1748
1749 if (ret < 0)
1750 goto err;
1751 }
1752
1753 return 0;
1754err:
1755 dev_dbg(&d->udev->dev, "%s: failed=%d\n", __func__, ret);
1756
1757 return ret;
1758}
1759
1760
1318#if IS_ENABLED(CONFIG_RC_CORE) 1761#if IS_ENABLED(CONFIG_RC_CORE)
1319static int af9035_rc_query(struct dvb_usb_device *d) 1762static int af9035_rc_query(struct dvb_usb_device *d)
1320{ 1763{
@@ -1409,6 +1852,7 @@ static int af9035_get_stream_config(struct dvb_frontend *fe, u8 *ts_type,
1409 struct usb_data_stream_properties *stream) 1852 struct usb_data_stream_properties *stream)
1410{ 1853{
1411 struct dvb_usb_device *d = fe_to_d(fe); 1854 struct dvb_usb_device *d = fe_to_d(fe);
1855
1412 dev_dbg(&d->udev->dev, "%s: adap=%d\n", __func__, fe_to_adap(fe)->id); 1856 dev_dbg(&d->udev->dev, "%s: adap=%d\n", __func__, fe_to_adap(fe)->id);
1413 1857
1414 if (d->udev->speed == USB_SPEED_FULL) 1858 if (d->udev->speed == USB_SPEED_FULL)
@@ -1486,7 +1930,9 @@ static const struct dvb_usb_device_properties af9035_props = {
1486 .i2c_algo = &af9035_i2c_algo, 1930 .i2c_algo = &af9035_i2c_algo,
1487 .read_config = af9035_read_config, 1931 .read_config = af9035_read_config,
1488 .frontend_attach = af9035_frontend_attach, 1932 .frontend_attach = af9035_frontend_attach,
1933 .frontend_detach = af9035_frontend_detach,
1489 .tuner_attach = af9035_tuner_attach, 1934 .tuner_attach = af9035_tuner_attach,
1935 .tuner_detach = af9035_tuner_detach,
1490 .init = af9035_init, 1936 .init = af9035_init,
1491 .get_rc_config = af9035_get_rc_config, 1937 .get_rc_config = af9035_get_rc_config,
1492 .get_stream_config = af9035_get_stream_config, 1938 .get_stream_config = af9035_get_stream_config,
@@ -1515,6 +1961,37 @@ static const struct dvb_usb_device_properties af9035_props = {
1515 }, 1961 },
1516}; 1962};
1517 1963
1964static const struct dvb_usb_device_properties it930x_props = {
1965 .driver_name = KBUILD_MODNAME,
1966 .owner = THIS_MODULE,
1967 .adapter_nr = adapter_nr,
1968 .size_of_priv = sizeof(struct state),
1969
1970 .generic_bulk_ctrl_endpoint = 0x02,
1971 .generic_bulk_ctrl_endpoint_response = 0x81,
1972
1973 .identify_state = af9035_identify_state,
1974 .download_firmware = af9035_download_firmware,
1975
1976 .i2c_algo = &af9035_i2c_algo,
1977 .read_config = af9035_read_config,
1978 .frontend_attach = it930x_frontend_attach,
1979 .frontend_detach = af9035_frontend_detach,
1980 .tuner_attach = it930x_tuner_attach,
1981 .tuner_detach = it930x_tuner_detach,
1982 .init = it930x_init,
1983 .get_stream_config = af9035_get_stream_config,
1984
1985 .get_adapter_count = af9035_get_adapter_count,
1986 .adapter = {
1987 {
1988 .stream = DVB_USB_STREAM_BULK(0x84, 4, 816 * 188),
1989 }, {
1990 .stream = DVB_USB_STREAM_BULK(0x85, 4, 816 * 188),
1991 },
1992 },
1993};
1994
1518static const struct usb_device_id af9035_id_table[] = { 1995static const struct usb_device_id af9035_id_table[] = {
1519 /* AF9035 devices */ 1996 /* AF9035 devices */
1520 { DVB_USB_DEVICE(USB_VID_AFATECH, USB_PID_AFATECH_AF9035_9035, 1997 { DVB_USB_DEVICE(USB_VID_AFATECH, USB_PID_AFATECH_AF9035_9035,
@@ -1568,17 +2045,21 @@ static const struct usb_device_id af9035_id_table[] = {
1568 { DVB_USB_DEVICE(USB_VID_KWORLD_2, USB_PID_CTVDIGDUAL_V2, 2045 { DVB_USB_DEVICE(USB_VID_KWORLD_2, USB_PID_CTVDIGDUAL_V2,
1569 &af9035_props, "Digital Dual TV Receiver CTVDIGDUAL_V2", 2046 &af9035_props, "Digital Dual TV Receiver CTVDIGDUAL_V2",
1570 RC_MAP_IT913X_V1) }, 2047 RC_MAP_IT913X_V1) },
2048 /* IT930x devices */
2049 { DVB_USB_DEVICE(USB_VID_ITETECH, USB_PID_ITETECH_IT9303,
2050 &it930x_props, "ITE 9303 Generic", NULL) },
1571 /* XXX: that same ID [0ccd:0099] is used by af9015 driver too */ 2051 /* XXX: that same ID [0ccd:0099] is used by af9015 driver too */
1572 { DVB_USB_DEVICE(USB_VID_TERRATEC, 0x0099, 2052 { DVB_USB_DEVICE(USB_VID_TERRATEC, 0x0099,
1573 &af9035_props, "TerraTec Cinergy T Stick Dual RC (rev. 2)", NULL) }, 2053 &af9035_props, "TerraTec Cinergy T Stick Dual RC (rev. 2)",
2054 NULL) },
1574 { DVB_USB_DEVICE(USB_VID_LEADTEK, 0x6a05, 2055 { DVB_USB_DEVICE(USB_VID_LEADTEK, 0x6a05,
1575 &af9035_props, "Leadtek WinFast DTV Dongle Dual", NULL) }, 2056 &af9035_props, "Leadtek WinFast DTV Dongle Dual", NULL) },
1576 { DVB_USB_DEVICE(USB_VID_HAUPPAUGE, 0xf900, 2057 { DVB_USB_DEVICE(USB_VID_HAUPPAUGE, 0xf900,
1577 &af9035_props, "Hauppauge WinTV-MiniStick 2", NULL) }, 2058 &af9035_props, "Hauppauge WinTV-MiniStick 2", NULL) },
1578 { DVB_USB_DEVICE(USB_VID_PCTV, USB_PID_PCTV_78E, 2059 { DVB_USB_DEVICE(USB_VID_PCTV, USB_PID_PCTV_78E,
1579 &af9035_props, "PCTV 78e", RC_MAP_IT913X_V1) }, 2060 &af9035_props, "PCTV AndroiDTV (78e)", RC_MAP_IT913X_V1) },
1580 { DVB_USB_DEVICE(USB_VID_PCTV, USB_PID_PCTV_79E, 2061 { DVB_USB_DEVICE(USB_VID_PCTV, USB_PID_PCTV_79E,
1581 &af9035_props, "PCTV 79e", RC_MAP_IT913X_V2) }, 2062 &af9035_props, "PCTV microStick (79e)", RC_MAP_IT913X_V2) },
1582 { } 2063 { }
1583}; 2064};
1584MODULE_DEVICE_TABLE(usb, af9035_id_table); 2065MODULE_DEVICE_TABLE(usb, af9035_id_table);
@@ -1603,3 +2084,4 @@ MODULE_LICENSE("GPL");
1603MODULE_FIRMWARE(AF9035_FIRMWARE_AF9035); 2084MODULE_FIRMWARE(AF9035_FIRMWARE_AF9035);
1604MODULE_FIRMWARE(AF9035_FIRMWARE_IT9135_V1); 2085MODULE_FIRMWARE(AF9035_FIRMWARE_IT9135_V1);
1605MODULE_FIRMWARE(AF9035_FIRMWARE_IT9135_V2); 2086MODULE_FIRMWARE(AF9035_FIRMWARE_IT9135_V2);
2087MODULE_FIRMWARE(AF9035_FIRMWARE_IT9303);
diff --git a/drivers/media/usb/dvb-usb-v2/af9035.h b/drivers/media/usb/dvb-usb-v2/af9035.h
index c21902fdd4c4..416a97f05ec8 100644
--- a/drivers/media/usb/dvb-usb-v2/af9035.h
+++ b/drivers/media/usb/dvb-usb-v2/af9035.h
@@ -30,7 +30,9 @@
30#include "mxl5007t.h" 30#include "mxl5007t.h"
31#include "tda18218.h" 31#include "tda18218.h"
32#include "fc2580.h" 32#include "fc2580.h"
33#include "tuner_it913x.h" 33#include "it913x.h"
34#include "si2168.h"
35#include "si2157.h"
34 36
35struct reg_val { 37struct reg_val {
36 u32 reg; 38 u32 reg;
@@ -61,9 +63,12 @@ struct state {
61 u16 chip_type; 63 u16 chip_type;
62 u8 dual_mode:1; 64 u8 dual_mode:1;
63 u16 eeprom_addr; 65 u16 eeprom_addr;
66 u8 af9033_i2c_addr[2];
64 struct af9033_config af9033_config[2]; 67 struct af9033_config af9033_config[2];
65
66 struct af9033_ops ops; 68 struct af9033_ops ops;
69 #define AF9035_I2C_CLIENT_MAX 4
70 struct i2c_client *i2c_client[AF9035_I2C_CLIENT_MAX];
71 struct i2c_adapter *i2c_adapter_demod;
67}; 72};
68 73
69static const u32 clock_lut_af9035[] = { 74static const u32 clock_lut_af9035[] = {
@@ -97,6 +102,7 @@ static const u32 clock_lut_it9135[] = {
97#define AF9035_FIRMWARE_AF9035 "dvb-usb-af9035-02.fw" 102#define AF9035_FIRMWARE_AF9035 "dvb-usb-af9035-02.fw"
98#define AF9035_FIRMWARE_IT9135_V1 "dvb-usb-it9135-01.fw" 103#define AF9035_FIRMWARE_IT9135_V1 "dvb-usb-it9135-01.fw"
99#define AF9035_FIRMWARE_IT9135_V2 "dvb-usb-it9135-02.fw" 104#define AF9035_FIRMWARE_IT9135_V2 "dvb-usb-it9135-02.fw"
105#define AF9035_FIRMWARE_IT9303 "dvb-usb-it9303-01.fw"
100 106
101/* 107/*
102 * eeprom is memory mapped as read only. Writing that memory mapped address 108 * eeprom is memory mapped as read only. Writing that memory mapped address
@@ -138,5 +144,7 @@ static const u32 clock_lut_it9135[] = {
138#define CMD_FW_DL_BEGIN 0x24 144#define CMD_FW_DL_BEGIN 0x24
139#define CMD_FW_DL_END 0x25 145#define CMD_FW_DL_END 0x25
140#define CMD_FW_SCATTER_WR 0x29 146#define CMD_FW_SCATTER_WR 0x29
147#define CMD_GENERIC_I2C_RD 0x2a
148#define CMD_GENERIC_I2C_WR 0x2b
141 149
142#endif 150#endif
diff --git a/drivers/media/usb/dvb-usb-v2/anysee.c b/drivers/media/usb/dvb-usb-v2/anysee.c
index e4a2382196f0..d3c5f230e97a 100644
--- a/drivers/media/usb/dvb-usb-v2/anysee.c
+++ b/drivers/media/usb/dvb-usb-v2/anysee.c
@@ -332,7 +332,6 @@ static struct tda10023_config anysee_tda10023_tda18212_config = {
332}; 332};
333 333
334static struct tda18212_config anysee_tda18212_config = { 334static struct tda18212_config anysee_tda18212_config = {
335 .i2c_address = (0xc0 >> 1),
336 .if_dvbt_6 = 4150, 335 .if_dvbt_6 = 4150,
337 .if_dvbt_7 = 4150, 336 .if_dvbt_7 = 4150,
338 .if_dvbt_8 = 4150, 337 .if_dvbt_8 = 4150,
@@ -340,7 +339,6 @@ static struct tda18212_config anysee_tda18212_config = {
340}; 339};
341 340
342static struct tda18212_config anysee_tda18212_config2 = { 341static struct tda18212_config anysee_tda18212_config2 = {
343 .i2c_address = 0x60 /* (0xc0 >> 1) */,
344 .if_dvbt_6 = 3550, 342 .if_dvbt_6 = 3550,
345 .if_dvbt_7 = 3700, 343 .if_dvbt_7 = 3700,
346 .if_dvbt_8 = 4150, 344 .if_dvbt_8 = 4150,
@@ -632,6 +630,92 @@ error:
632 return ret; 630 return ret;
633} 631}
634 632
633static int anysee_add_i2c_dev(struct dvb_usb_device *d, char *type, u8 addr,
634 void *platform_data)
635{
636 int ret, num;
637 struct anysee_state *state = d_to_priv(d);
638 struct i2c_client *client;
639 struct i2c_adapter *adapter = &d->i2c_adap;
640 struct i2c_board_info board_info = {
641 .addr = addr,
642 .platform_data = platform_data,
643 };
644
645 strlcpy(board_info.type, type, I2C_NAME_SIZE);
646
647 /* find first free client */
648 for (num = 0; num < ANYSEE_I2C_CLIENT_MAX; num++) {
649 if (state->i2c_client[num] == NULL)
650 break;
651 }
652
653 dev_dbg(&d->udev->dev, "%s: num=%d\n", __func__, num);
654
655 if (num == ANYSEE_I2C_CLIENT_MAX) {
656 dev_err(&d->udev->dev, "%s: I2C client out of index\n",
657 KBUILD_MODNAME);
658 ret = -ENODEV;
659 goto err;
660 }
661
662 request_module(board_info.type);
663
664 /* register I2C device */
665 client = i2c_new_device(adapter, &board_info);
666 if (client == NULL || client->dev.driver == NULL) {
667 ret = -ENODEV;
668 goto err;
669 }
670
671 /* increase I2C driver usage count */
672 if (!try_module_get(client->dev.driver->owner)) {
673 i2c_unregister_device(client);
674 ret = -ENODEV;
675 goto err;
676 }
677
678 state->i2c_client[num] = client;
679 return 0;
680err:
681 dev_dbg(&d->udev->dev, "%s: failed=%d\n", __func__, ret);
682 return ret;
683}
684
685static void anysee_del_i2c_dev(struct dvb_usb_device *d)
686{
687 int num;
688 struct anysee_state *state = d_to_priv(d);
689 struct i2c_client *client;
690
691 /* find last used client */
692 num = ANYSEE_I2C_CLIENT_MAX;
693 while (num--) {
694 if (state->i2c_client[num] != NULL)
695 break;
696 }
697
698 dev_dbg(&d->udev->dev, "%s: num=%d\n", __func__, num);
699
700 if (num == -1) {
701 dev_err(&d->udev->dev, "%s: I2C client out of index\n",
702 KBUILD_MODNAME);
703 goto err;
704 }
705
706 client = state->i2c_client[num];
707
708 /* decrease I2C driver usage count */
709 module_put(client->dev.driver->owner);
710
711 /* unregister I2C device */
712 i2c_unregister_device(client);
713
714 state->i2c_client[num] = NULL;
715err:
716 dev_dbg(&d->udev->dev, "%s: failed\n", __func__);
717}
718
635static int anysee_frontend_attach(struct dvb_usb_adapter *adap) 719static int anysee_frontend_attach(struct dvb_usb_adapter *adap)
636{ 720{
637 struct anysee_state *state = adap_to_priv(adap); 721 struct anysee_state *state = adap_to_priv(adap);
@@ -640,12 +724,12 @@ static int anysee_frontend_attach(struct dvb_usb_adapter *adap)
640 u8 tmp; 724 u8 tmp;
641 struct i2c_msg msg[2] = { 725 struct i2c_msg msg[2] = {
642 { 726 {
643 .addr = anysee_tda18212_config.i2c_address, 727 .addr = 0x60,
644 .flags = 0, 728 .flags = 0,
645 .len = 1, 729 .len = 1,
646 .buf = "\x00", 730 .buf = "\x00",
647 }, { 731 }, {
648 .addr = anysee_tda18212_config.i2c_address, 732 .addr = 0x60,
649 .flags = I2C_M_RD, 733 .flags = I2C_M_RD,
650 .len = 1, 734 .len = 1,
651 .buf = &tmp, 735 .buf = &tmp,
@@ -723,9 +807,11 @@ static int anysee_frontend_attach(struct dvb_usb_adapter *adap)
723 /* probe TDA18212 */ 807 /* probe TDA18212 */
724 tmp = 0; 808 tmp = 0;
725 ret = i2c_transfer(&d->i2c_adap, msg, 2); 809 ret = i2c_transfer(&d->i2c_adap, msg, 2);
726 if (ret == 2 && tmp == 0xc7) 810 if (ret == 2 && tmp == 0xc7) {
727 dev_dbg(&d->udev->dev, "%s: TDA18212 found\n", 811 dev_dbg(&d->udev->dev, "%s: TDA18212 found\n",
728 __func__); 812 __func__);
813 state->has_tda18212 = true;
814 }
729 else 815 else
730 tmp = 0; 816 tmp = 0;
731 817
@@ -939,46 +1025,63 @@ static int anysee_tuner_attach(struct dvb_usb_adapter *adap)
939 * fails attach old simple PLL. */ 1025 * fails attach old simple PLL. */
940 1026
941 /* attach tuner */ 1027 /* attach tuner */
942 fe = dvb_attach(tda18212_attach, adap->fe[0], &d->i2c_adap, 1028 if (state->has_tda18212) {
943 &anysee_tda18212_config); 1029 struct tda18212_config tda18212_config =
1030 anysee_tda18212_config;
944 1031
945 if (fe && adap->fe[1]) { 1032 tda18212_config.fe = adap->fe[0];
946 /* attach tuner for 2nd FE */ 1033 ret = anysee_add_i2c_dev(d, "tda18212", 0x60,
947 fe = dvb_attach(tda18212_attach, adap->fe[1], 1034 &tda18212_config);
948 &d->i2c_adap, &anysee_tda18212_config); 1035 if (ret)
949 break; 1036 goto err;
950 } else if (fe) { 1037
951 break; 1038 /* copy tuner ops for 2nd FE as tuner is shared */
952 } 1039 if (adap->fe[1]) {
953 1040 adap->fe[1]->tuner_priv =
954 /* attach tuner */ 1041 adap->fe[0]->tuner_priv;
955 fe = dvb_attach(dvb_pll_attach, adap->fe[0], (0xc0 >> 1), 1042 memcpy(&adap->fe[1]->ops.tuner_ops,
956 &d->i2c_adap, DVB_PLL_SAMSUNG_DTOS403IH102A); 1043 &adap->fe[0]->ops.tuner_ops,
1044 sizeof(struct dvb_tuner_ops));
1045 }
957 1046
958 if (fe && adap->fe[1]) { 1047 return 0;
959 /* attach tuner for 2nd FE */ 1048 } else {
960 fe = dvb_attach(dvb_pll_attach, adap->fe[1], 1049 /* attach tuner */
1050 fe = dvb_attach(dvb_pll_attach, adap->fe[0],
961 (0xc0 >> 1), &d->i2c_adap, 1051 (0xc0 >> 1), &d->i2c_adap,
962 DVB_PLL_SAMSUNG_DTOS403IH102A); 1052 DVB_PLL_SAMSUNG_DTOS403IH102A);
1053
1054 if (fe && adap->fe[1]) {
1055 /* attach tuner for 2nd FE */
1056 fe = dvb_attach(dvb_pll_attach, adap->fe[1],
1057 (0xc0 >> 1), &d->i2c_adap,
1058 DVB_PLL_SAMSUNG_DTOS403IH102A);
1059 }
963 } 1060 }
964 1061
965 break; 1062 break;
966 case ANYSEE_HW_508TC: /* 18 */ 1063 case ANYSEE_HW_508TC: /* 18 */
967 case ANYSEE_HW_508PTC: /* 21 */ 1064 case ANYSEE_HW_508PTC: /* 21 */
1065 {
968 /* E7 TC */ 1066 /* E7 TC */
969 /* E7 PTC */ 1067 /* E7 PTC */
1068 struct tda18212_config tda18212_config = anysee_tda18212_config;
970 1069
971 /* attach tuner */ 1070 tda18212_config.fe = adap->fe[0];
972 fe = dvb_attach(tda18212_attach, adap->fe[0], &d->i2c_adap, 1071 ret = anysee_add_i2c_dev(d, "tda18212", 0x60, &tda18212_config);
973 &anysee_tda18212_config); 1072 if (ret)
974 1073 goto err;
975 if (fe) { 1074
976 /* attach tuner for 2nd FE */ 1075 /* copy tuner ops for 2nd FE as tuner is shared */
977 fe = dvb_attach(tda18212_attach, adap->fe[1], 1076 if (adap->fe[1]) {
978 &d->i2c_adap, &anysee_tda18212_config); 1077 adap->fe[1]->tuner_priv = adap->fe[0]->tuner_priv;
1078 memcpy(&adap->fe[1]->ops.tuner_ops,
1079 &adap->fe[0]->ops.tuner_ops,
1080 sizeof(struct dvb_tuner_ops));
979 } 1081 }
980 1082
981 break; 1083 return 0;
1084 }
982 case ANYSEE_HW_508S2: /* 19 */ 1085 case ANYSEE_HW_508S2: /* 19 */
983 case ANYSEE_HW_508PS2: /* 22 */ 1086 case ANYSEE_HW_508PS2: /* 22 */
984 /* E7 S2 */ 1087 /* E7 S2 */
@@ -997,13 +1100,18 @@ static int anysee_tuner_attach(struct dvb_usb_adapter *adap)
997 break; 1100 break;
998 1101
999 case ANYSEE_HW_508T2C: /* 20 */ 1102 case ANYSEE_HW_508T2C: /* 20 */
1103 {
1000 /* E7 T2C */ 1104 /* E7 T2C */
1105 struct tda18212_config tda18212_config =
1106 anysee_tda18212_config2;
1001 1107
1002 /* attach tuner */ 1108 tda18212_config.fe = adap->fe[0];
1003 fe = dvb_attach(tda18212_attach, adap->fe[0], &d->i2c_adap, 1109 ret = anysee_add_i2c_dev(d, "tda18212", 0x60, &tda18212_config);
1004 &anysee_tda18212_config2); 1110 if (ret)
1111 goto err;
1005 1112
1006 break; 1113 return 0;
1114 }
1007 default: 1115 default:
1008 fe = NULL; 1116 fe = NULL;
1009 } 1117 }
@@ -1012,7 +1120,7 @@ static int anysee_tuner_attach(struct dvb_usb_adapter *adap)
1012 ret = 0; 1120 ret = 0;
1013 else 1121 else
1014 ret = -ENODEV; 1122 ret = -ENODEV;
1015 1123err:
1016 return ret; 1124 return ret;
1017} 1125}
1018 1126
@@ -1270,6 +1378,11 @@ static int anysee_init(struct dvb_usb_device *d)
1270 1378
1271static void anysee_exit(struct dvb_usb_device *d) 1379static void anysee_exit(struct dvb_usb_device *d)
1272{ 1380{
1381 struct anysee_state *state = d_to_priv(d);
1382
1383 if (state->i2c_client[0])
1384 anysee_del_i2c_dev(d);
1385
1273 return anysee_ci_release(d); 1386 return anysee_ci_release(d);
1274} 1387}
1275 1388
diff --git a/drivers/media/usb/dvb-usb-v2/anysee.h b/drivers/media/usb/dvb-usb-v2/anysee.h
index 8f426d9fc6e1..3ca2bca4ebaf 100644
--- a/drivers/media/usb/dvb-usb-v2/anysee.h
+++ b/drivers/media/usb/dvb-usb-v2/anysee.h
@@ -55,8 +55,11 @@ struct anysee_state {
55 u8 buf[64]; 55 u8 buf[64];
56 u8 seq; 56 u8 seq;
57 u8 hw; /* PCB ID */ 57 u8 hw; /* PCB ID */
58 #define ANYSEE_I2C_CLIENT_MAX 1
59 struct i2c_client *i2c_client[ANYSEE_I2C_CLIENT_MAX];
58 u8 fe_id:1; /* frondend ID */ 60 u8 fe_id:1; /* frondend ID */
59 u8 has_ci:1; 61 u8 has_ci:1;
62 u8 has_tda18212:1;
60 u8 ci_attached:1; 63 u8 ci_attached:1;
61 struct dvb_ca_en50221 ci; 64 struct dvb_ca_en50221 ci;
62 unsigned long ci_cam_ready; /* jiffies */ 65 unsigned long ci_cam_ready; /* jiffies */
diff --git a/drivers/media/usb/dvb-usb-v2/dvb_usb.h b/drivers/media/usb/dvb-usb-v2/dvb_usb.h
index 124b4baa7e97..14e111e13e54 100644
--- a/drivers/media/usb/dvb-usb-v2/dvb_usb.h
+++ b/drivers/media/usb/dvb-usb-v2/dvb_usb.h
@@ -214,6 +214,7 @@ struct dvb_usb_adapter_properties {
214 * @read_config: called to resolve device configuration 214 * @read_config: called to resolve device configuration
215 * @read_mac_address: called to resolve adapter mac-address 215 * @read_mac_address: called to resolve adapter mac-address
216 * @frontend_attach: called to attach the possible frontends 216 * @frontend_attach: called to attach the possible frontends
217 * @frontend_detach: called to detach the possible frontends
217 * @tuner_attach: called to attach the possible tuners 218 * @tuner_attach: called to attach the possible tuners
218 * @frontend_ctrl: called to power on/off active frontend 219 * @frontend_ctrl: called to power on/off active frontend
219 * @streaming_ctrl: called to start/stop the usb streaming of adapter 220 * @streaming_ctrl: called to start/stop the usb streaming of adapter
@@ -254,7 +255,9 @@ struct dvb_usb_device_properties {
254 int (*read_config) (struct dvb_usb_device *d); 255 int (*read_config) (struct dvb_usb_device *d);
255 int (*read_mac_address) (struct dvb_usb_adapter *, u8 []); 256 int (*read_mac_address) (struct dvb_usb_adapter *, u8 []);
256 int (*frontend_attach) (struct dvb_usb_adapter *); 257 int (*frontend_attach) (struct dvb_usb_adapter *);
258 int (*frontend_detach)(struct dvb_usb_adapter *);
257 int (*tuner_attach) (struct dvb_usb_adapter *); 259 int (*tuner_attach) (struct dvb_usb_adapter *);
260 int (*tuner_detach)(struct dvb_usb_adapter *);
258 int (*frontend_ctrl) (struct dvb_frontend *, int); 261 int (*frontend_ctrl) (struct dvb_frontend *, int);
259 int (*streaming_ctrl) (struct dvb_frontend *, int); 262 int (*streaming_ctrl) (struct dvb_frontend *, int);
260 int (*init) (struct dvb_usb_device *); 263 int (*init) (struct dvb_usb_device *);
diff --git a/drivers/media/usb/dvb-usb-v2/dvb_usb_core.c b/drivers/media/usb/dvb-usb-v2/dvb_usb_core.c
index 2e90310be2af..1950f37df835 100644
--- a/drivers/media/usb/dvb-usb-v2/dvb_usb_core.c
+++ b/drivers/media/usb/dvb-usb-v2/dvb_usb_core.c
@@ -21,7 +21,7 @@
21 21
22#include "dvb_usb_common.h" 22#include "dvb_usb_common.h"
23 23
24int dvb_usbv2_disable_rc_polling; 24static int dvb_usbv2_disable_rc_polling;
25module_param_named(disable_rc_polling, dvb_usbv2_disable_rc_polling, int, 0644); 25module_param_named(disable_rc_polling, dvb_usbv2_disable_rc_polling, int, 0644);
26MODULE_PARM_DESC(disable_rc_polling, 26MODULE_PARM_DESC(disable_rc_polling,
27 "disable remote control polling (default: 0)"); 27 "disable remote control polling (default: 0)");
@@ -664,9 +664,10 @@ err:
664 664
665static int dvb_usbv2_adapter_frontend_exit(struct dvb_usb_adapter *adap) 665static int dvb_usbv2_adapter_frontend_exit(struct dvb_usb_adapter *adap)
666{ 666{
667 int i; 667 int ret, i;
668 dev_dbg(&adap_to_d(adap)->udev->dev, "%s: adap=%d\n", __func__, 668 struct dvb_usb_device *d = adap_to_d(adap);
669 adap->id); 669
670 dev_dbg(&d->udev->dev, "%s: adap=%d\n", __func__, adap->id);
670 671
671 for (i = MAX_NO_OF_FE_PER_ADAP - 1; i >= 0; i--) { 672 for (i = MAX_NO_OF_FE_PER_ADAP - 1; i >= 0; i--) {
672 if (adap->fe[i]) { 673 if (adap->fe[i]) {
@@ -675,6 +676,23 @@ static int dvb_usbv2_adapter_frontend_exit(struct dvb_usb_adapter *adap)
675 } 676 }
676 } 677 }
677 678
679 if (d->props->tuner_detach) {
680 ret = d->props->tuner_detach(adap);
681 if (ret < 0) {
682 dev_dbg(&d->udev->dev, "%s: tuner_detach() failed=%d\n",
683 __func__, ret);
684 }
685 }
686
687 if (d->props->frontend_detach) {
688 ret = d->props->frontend_detach(adap);
689 if (ret < 0) {
690 dev_dbg(&d->udev->dev,
691 "%s: frontend_detach() failed=%d\n",
692 __func__, ret);
693 }
694 }
695
678 return 0; 696 return 0;
679} 697}
680 698
@@ -762,9 +780,9 @@ static int dvb_usbv2_adapter_exit(struct dvb_usb_device *d)
762 780
763 for (i = MAX_NO_OF_ADAPTER_PER_DEVICE - 1; i >= 0; i--) { 781 for (i = MAX_NO_OF_ADAPTER_PER_DEVICE - 1; i >= 0; i--) {
764 if (d->adapter[i].props) { 782 if (d->adapter[i].props) {
765 dvb_usbv2_adapter_frontend_exit(&d->adapter[i]);
766 dvb_usbv2_adapter_dvb_exit(&d->adapter[i]); 783 dvb_usbv2_adapter_dvb_exit(&d->adapter[i]);
767 dvb_usbv2_adapter_stream_exit(&d->adapter[i]); 784 dvb_usbv2_adapter_stream_exit(&d->adapter[i]);
785 dvb_usbv2_adapter_frontend_exit(&d->adapter[i]);
768 } 786 }
769 } 787 }
770 788
diff --git a/drivers/media/usb/dvb-usb-v2/dvb_usb_urb.c b/drivers/media/usb/dvb-usb-v2/dvb_usb_urb.c
index 33ff97e708e3..22bdce15ecf3 100644
--- a/drivers/media/usb/dvb-usb-v2/dvb_usb_urb.c
+++ b/drivers/media/usb/dvb-usb-v2/dvb_usb_urb.c
@@ -26,7 +26,7 @@ static int dvb_usb_v2_generic_io(struct dvb_usb_device *d,
26{ 26{
27 int ret, actual_length; 27 int ret, actual_length;
28 28
29 if (!d || !wbuf || !wlen || !d->props->generic_bulk_ctrl_endpoint || 29 if (!wbuf || !wlen || !d->props->generic_bulk_ctrl_endpoint ||
30 !d->props->generic_bulk_ctrl_endpoint_response) { 30 !d->props->generic_bulk_ctrl_endpoint_response) {
31 dev_dbg(&d->udev->dev, "%s: failed=%d\n", __func__, -EINVAL); 31 dev_dbg(&d->udev->dev, "%s: failed=%d\n", __func__, -EINVAL);
32 return -EINVAL; 32 return -EINVAL;
diff --git a/drivers/media/usb/dvb-usb-v2/dvbsky.c b/drivers/media/usb/dvb-usb-v2/dvbsky.c
new file mode 100644
index 000000000000..34688c89df11
--- /dev/null
+++ b/drivers/media/usb/dvb-usb-v2/dvbsky.c
@@ -0,0 +1,460 @@
1/*
2 * Driver for DVBSky USB2.0 receiver
3 *
4 * Copyright (C) 2013 Max nibble <nibble.max@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#include "dvb_usb.h"
22#include "m88ds3103.h"
23#include "m88ts2022.h"
24
25#define DVBSKY_MSG_DELAY 0/*2000*/
26#define DVBSKY_BUF_LEN 64
27
28DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
29
30struct dvbsky_state {
31 struct mutex stream_mutex;
32 u8 ibuf[DVBSKY_BUF_LEN];
33 u8 obuf[DVBSKY_BUF_LEN];
34 u8 last_lock;
35 struct i2c_client *i2c_client_tuner;
36
37 /* fe hook functions*/
38 int (*fe_set_voltage)(struct dvb_frontend *fe,
39 fe_sec_voltage_t voltage);
40 int (*fe_read_status)(struct dvb_frontend *fe,
41 fe_status_t *status);
42};
43
44static int dvbsky_usb_generic_rw(struct dvb_usb_device *d,
45 u8 *wbuf, u16 wlen, u8 *rbuf, u16 rlen)
46{
47 int ret;
48 struct dvbsky_state *state = d_to_priv(d);
49
50 mutex_lock(&d->usb_mutex);
51 if (wlen != 0)
52 memcpy(state->obuf, wbuf, wlen);
53
54 ret = dvb_usbv2_generic_rw_locked(d, state->obuf, wlen,
55 state->ibuf, rlen);
56
57 if (!ret && (rlen != 0))
58 memcpy(rbuf, state->ibuf, rlen);
59
60 mutex_unlock(&d->usb_mutex);
61 return ret;
62}
63
64static int dvbsky_stream_ctrl(struct dvb_usb_device *d, u8 onoff)
65{
66 struct dvbsky_state *state = d_to_priv(d);
67 int ret;
68 u8 obuf_pre[3] = { 0x37, 0, 0 };
69 u8 obuf_post[3] = { 0x36, 3, 0 };
70
71 mutex_lock(&state->stream_mutex);
72 ret = dvbsky_usb_generic_rw(d, obuf_pre, 3, NULL, 0);
73 if (!ret && onoff) {
74 msleep(20);
75 ret = dvbsky_usb_generic_rw(d, obuf_post, 3, NULL, 0);
76 }
77 mutex_unlock(&state->stream_mutex);
78 return ret;
79}
80
81static int dvbsky_streaming_ctrl(struct dvb_frontend *fe, int onoff)
82{
83 struct dvb_usb_device *d = fe_to_d(fe);
84
85 return dvbsky_stream_ctrl(d, (onoff == 0) ? 0 : 1);
86}
87
88/* GPIO */
89static int dvbsky_gpio_ctrl(struct dvb_usb_device *d, u8 gport, u8 value)
90{
91 int ret;
92 u8 obuf[3], ibuf[2];
93
94 obuf[0] = 0x0e;
95 obuf[1] = gport;
96 obuf[2] = value;
97 ret = dvbsky_usb_generic_rw(d, obuf, 3, ibuf, 1);
98 if (ret)
99 dev_err(&d->udev->dev, "%s: %s() failed=%d\n",
100 KBUILD_MODNAME, __func__, ret);
101 return ret;
102}
103
104/* I2C */
105static int dvbsky_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msg[],
106 int num)
107{
108 struct dvb_usb_device *d = i2c_get_adapdata(adap);
109 int ret = 0;
110 u8 ibuf[64], obuf[64];
111
112 if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
113 return -EAGAIN;
114
115 if (num > 2) {
116 dev_err(&d->udev->dev,
117 "dvbsky_usb: too many i2c messages[%d] than 2.", num);
118 ret = -EOPNOTSUPP;
119 goto i2c_error;
120 }
121
122 if (num == 1) {
123 if (msg[0].len > 60) {
124 dev_err(&d->udev->dev,
125 "dvbsky_usb: too many i2c bytes[%d] than 60.",
126 msg[0].len);
127 ret = -EOPNOTSUPP;
128 goto i2c_error;
129 }
130 if (msg[0].flags & I2C_M_RD) {
131 /* single read */
132 obuf[0] = 0x09;
133 obuf[1] = 0;
134 obuf[2] = msg[0].len;
135 obuf[3] = msg[0].addr;
136 ret = dvbsky_usb_generic_rw(d, obuf, 4,
137 ibuf, msg[0].len + 1);
138 if (ret)
139 dev_err(&d->udev->dev, "%s: %s() failed=%d\n",
140 KBUILD_MODNAME, __func__, ret);
141 if (!ret)
142 memcpy(msg[0].buf, &ibuf[1], msg[0].len);
143 } else {
144 /* write */
145 obuf[0] = 0x08;
146 obuf[1] = msg[0].addr;
147 obuf[2] = msg[0].len;
148 memcpy(&obuf[3], msg[0].buf, msg[0].len);
149 ret = dvbsky_usb_generic_rw(d, obuf,
150 msg[0].len + 3, ibuf, 1);
151 if (ret)
152 dev_err(&d->udev->dev, "%s: %s() failed=%d\n",
153 KBUILD_MODNAME, __func__, ret);
154 }
155 } else {
156 if ((msg[0].len > 60) || (msg[1].len > 60)) {
157 dev_err(&d->udev->dev,
158 "dvbsky_usb: too many i2c bytes[w-%d][r-%d] than 60.",
159 msg[0].len, msg[1].len);
160 ret = -EOPNOTSUPP;
161 goto i2c_error;
162 }
163 /* write then read */
164 obuf[0] = 0x09;
165 obuf[1] = msg[0].len;
166 obuf[2] = msg[1].len;
167 obuf[3] = msg[0].addr;
168 memcpy(&obuf[4], msg[0].buf, msg[0].len);
169 ret = dvbsky_usb_generic_rw(d, obuf,
170 msg[0].len + 4, ibuf, msg[1].len + 1);
171 if (ret)
172 dev_err(&d->udev->dev, "%s: %s() failed=%d\n",
173 KBUILD_MODNAME, __func__, ret);
174
175 if (!ret)
176 memcpy(msg[1].buf, &ibuf[1], msg[1].len);
177 }
178i2c_error:
179 mutex_unlock(&d->i2c_mutex);
180 return (ret) ? ret : num;
181}
182
183static u32 dvbsky_i2c_func(struct i2c_adapter *adapter)
184{
185 return I2C_FUNC_I2C;
186}
187
188static struct i2c_algorithm dvbsky_i2c_algo = {
189 .master_xfer = dvbsky_i2c_xfer,
190 .functionality = dvbsky_i2c_func,
191};
192
193#if IS_ENABLED(CONFIG_RC_CORE)
194static int dvbsky_rc_query(struct dvb_usb_device *d)
195{
196 u32 code = 0xffff, scancode;
197 u8 rc5_command, rc5_system;
198 u8 obuf[2], ibuf[2], toggle;
199 int ret;
200
201 obuf[0] = 0x10;
202 ret = dvbsky_usb_generic_rw(d, obuf, 1, ibuf, 2);
203 if (ret)
204 dev_err(&d->udev->dev, "%s: %s() failed=%d\n",
205 KBUILD_MODNAME, __func__, ret);
206 if (ret == 0)
207 code = (ibuf[0] << 8) | ibuf[1];
208 if (code != 0xffff) {
209 dev_dbg(&d->udev->dev, "rc code: %x\n", code);
210 rc5_command = code & 0x3F;
211 rc5_system = (code & 0x7C0) >> 6;
212 toggle = (code & 0x800) ? 1 : 0;
213 scancode = rc5_system << 8 | rc5_command;
214 rc_keydown(d->rc_dev, RC_TYPE_RC5, scancode, toggle);
215 }
216 return 0;
217}
218
219static int dvbsky_get_rc_config(struct dvb_usb_device *d, struct dvb_usb_rc *rc)
220{
221 rc->allowed_protos = RC_BIT_RC5;
222 rc->query = dvbsky_rc_query;
223 rc->interval = 300;
224 return 0;
225}
226#else
227 #define dvbsky_get_rc_config NULL
228#endif
229
230static int dvbsky_usb_set_voltage(struct dvb_frontend *fe,
231 fe_sec_voltage_t voltage)
232{
233 struct dvb_usb_device *d = fe_to_d(fe);
234 struct dvbsky_state *state = d_to_priv(d);
235 u8 value;
236
237 if (voltage == SEC_VOLTAGE_OFF)
238 value = 0;
239 else
240 value = 1;
241 dvbsky_gpio_ctrl(d, 0x80, value);
242
243 return state->fe_set_voltage(fe, voltage);
244}
245
246static int dvbsky_read_mac_addr(struct dvb_usb_adapter *adap, u8 mac[6])
247{
248 struct dvb_usb_device *d = adap_to_d(adap);
249 u8 obuf[] = { 0x1e, 0x00 };
250 u8 ibuf[6] = { 0 };
251 struct i2c_msg msg[] = {
252 {
253 .addr = 0x51,
254 .flags = 0,
255 .buf = obuf,
256 .len = 2,
257 }, {
258 .addr = 0x51,
259 .flags = I2C_M_RD,
260 .buf = ibuf,
261 .len = 6,
262 }
263 };
264
265 if (i2c_transfer(&d->i2c_adap, msg, 2) == 2)
266 memcpy(mac, ibuf, 6);
267
268 dev_info(&d->udev->dev, "dvbsky_usb MAC address=%pM\n", mac);
269
270 return 0;
271}
272
273static int dvbsky_usb_read_status(struct dvb_frontend *fe, fe_status_t *status)
274{
275 struct dvb_usb_device *d = fe_to_d(fe);
276 struct dvbsky_state *state = d_to_priv(d);
277 int ret;
278
279 ret = state->fe_read_status(fe, status);
280
281 /* it need resync slave fifo when signal change from unlock to lock.*/
282 if ((*status & FE_HAS_LOCK) && (!state->last_lock))
283 dvbsky_stream_ctrl(d, 1);
284
285 state->last_lock = (*status & FE_HAS_LOCK) ? 1 : 0;
286 return ret;
287}
288
289static const struct m88ds3103_config dvbsky_s960_m88ds3103_config = {
290 .i2c_addr = 0x68,
291 .clock = 27000000,
292 .i2c_wr_max = 33,
293 .clock_out = 0,
294 .ts_mode = M88DS3103_TS_CI,
295 .ts_clk = 16000,
296 .ts_clk_pol = 0,
297 .agc = 0x99,
298 .lnb_hv_pol = 1,
299 .lnb_en_pol = 1,
300};
301
302static int dvbsky_s960_attach(struct dvb_usb_adapter *adap)
303{
304 struct dvbsky_state *state = adap_to_priv(adap);
305 struct dvb_usb_device *d = adap_to_d(adap);
306 int ret = 0;
307 /* demod I2C adapter */
308 struct i2c_adapter *i2c_adapter;
309 struct i2c_client *client;
310 struct i2c_board_info info;
311 struct m88ts2022_config m88ts2022_config = {
312 .clock = 27000000,
313 };
314 memset(&info, 0, sizeof(struct i2c_board_info));
315
316 /* attach demod */
317 adap->fe[0] = dvb_attach(m88ds3103_attach,
318 &dvbsky_s960_m88ds3103_config,
319 &d->i2c_adap,
320 &i2c_adapter);
321 if (!adap->fe[0]) {
322 dev_err(&d->udev->dev, "dvbsky_s960_attach fail.\n");
323 ret = -ENODEV;
324 goto fail_attach;
325 }
326
327 /* attach tuner */
328 m88ts2022_config.fe = adap->fe[0];
329 strlcpy(info.type, "m88ts2022", I2C_NAME_SIZE);
330 info.addr = 0x60;
331 info.platform_data = &m88ts2022_config;
332 request_module("m88ts2022");
333 client = i2c_new_device(i2c_adapter, &info);
334 if (client == NULL || client->dev.driver == NULL) {
335 dvb_frontend_detach(adap->fe[0]);
336 ret = -ENODEV;
337 goto fail_attach;
338 }
339
340 if (!try_module_get(client->dev.driver->owner)) {
341 i2c_unregister_device(client);
342 dvb_frontend_detach(adap->fe[0]);
343 ret = -ENODEV;
344 goto fail_attach;
345 }
346
347 /* delegate signal strength measurement to tuner */
348 adap->fe[0]->ops.read_signal_strength =
349 adap->fe[0]->ops.tuner_ops.get_rf_strength;
350
351 /* hook fe: need to resync the slave fifo when signal locks. */
352 state->fe_read_status = adap->fe[0]->ops.read_status;
353 adap->fe[0]->ops.read_status = dvbsky_usb_read_status;
354
355 /* hook fe: LNB off/on is control by Cypress usb chip. */
356 state->fe_set_voltage = adap->fe[0]->ops.set_voltage;
357 adap->fe[0]->ops.set_voltage = dvbsky_usb_set_voltage;
358
359 state->i2c_client_tuner = client;
360
361fail_attach:
362 return ret;
363}
364
365static int dvbsky_identify_state(struct dvb_usb_device *d, const char **name)
366{
367 dvbsky_gpio_ctrl(d, 0x04, 1);
368 msleep(20);
369 dvbsky_gpio_ctrl(d, 0x83, 0);
370 dvbsky_gpio_ctrl(d, 0xc0, 1);
371 msleep(100);
372 dvbsky_gpio_ctrl(d, 0x83, 1);
373 dvbsky_gpio_ctrl(d, 0xc0, 0);
374 msleep(50);
375
376 return WARM;
377}
378
379static int dvbsky_init(struct dvb_usb_device *d)
380{
381 struct dvbsky_state *state = d_to_priv(d);
382
383 /* use default interface */
384 /*
385 ret = usb_set_interface(d->udev, 0, 0);
386 if (ret)
387 return ret;
388 */
389 mutex_init(&state->stream_mutex);
390
391 state->last_lock = 0;
392
393 return 0;
394}
395
396static void dvbsky_exit(struct dvb_usb_device *d)
397{
398 struct dvbsky_state *state = d_to_priv(d);
399 struct i2c_client *client;
400
401 client = state->i2c_client_tuner;
402 /* remove I2C tuner */
403 if (client) {
404 module_put(client->dev.driver->owner);
405 i2c_unregister_device(client);
406 }
407}
408
409/* DVB USB Driver stuff */
410static struct dvb_usb_device_properties dvbsky_s960_props = {
411 .driver_name = KBUILD_MODNAME,
412 .owner = THIS_MODULE,
413 .adapter_nr = adapter_nr,
414 .size_of_priv = sizeof(struct dvbsky_state),
415
416 .generic_bulk_ctrl_endpoint = 0x01,
417 .generic_bulk_ctrl_endpoint_response = 0x81,
418 .generic_bulk_ctrl_delay = DVBSKY_MSG_DELAY,
419
420 .i2c_algo = &dvbsky_i2c_algo,
421 .frontend_attach = dvbsky_s960_attach,
422 .init = dvbsky_init,
423 .get_rc_config = dvbsky_get_rc_config,
424 .streaming_ctrl = dvbsky_streaming_ctrl,
425 .identify_state = dvbsky_identify_state,
426 .exit = dvbsky_exit,
427 .read_mac_address = dvbsky_read_mac_addr,
428
429 .num_adapters = 1,
430 .adapter = {
431 {
432 .stream = DVB_USB_STREAM_BULK(0x82, 8, 4096),
433 }
434 }
435};
436
437static const struct usb_device_id dvbsky_id_table[] = {
438 { DVB_USB_DEVICE(0x0572, 0x6831,
439 &dvbsky_s960_props, "DVBSky S960/S860", RC_MAP_DVBSKY) },
440 { }
441};
442MODULE_DEVICE_TABLE(usb, dvbsky_id_table);
443
444static struct usb_driver dvbsky_usb_driver = {
445 .name = KBUILD_MODNAME,
446 .id_table = dvbsky_id_table,
447 .probe = dvb_usbv2_probe,
448 .disconnect = dvb_usbv2_disconnect,
449 .suspend = dvb_usbv2_suspend,
450 .resume = dvb_usbv2_resume,
451 .reset_resume = dvb_usbv2_reset_resume,
452 .no_dynamic_id = 1,
453 .soft_unbind = 1,
454};
455
456module_usb_driver(dvbsky_usb_driver);
457
458MODULE_AUTHOR("Max nibble <nibble.max@gmail.com>");
459MODULE_DESCRIPTION("Driver for DVBSky USB");
460MODULE_LICENSE("GPL");
diff --git a/drivers/media/usb/dvb-usb-v2/lmedm04.c b/drivers/media/usb/dvb-usb-v2/lmedm04.c
index e332af731187..9f2c5459b73a 100644
--- a/drivers/media/usb/dvb-usb-v2/lmedm04.c
+++ b/drivers/media/usb/dvb-usb-v2/lmedm04.c
@@ -1252,7 +1252,7 @@ static int lme2510_get_stream_config(struct dvb_frontend *fe, u8 *ts_type,
1252 1252
1253 /* Turn PID filter on the fly by module option */ 1253 /* Turn PID filter on the fly by module option */
1254 if (pid_filter == 2) { 1254 if (pid_filter == 2) {
1255 adap->pid_filtering = 1; 1255 adap->pid_filtering = true;
1256 adap->max_feed_count = 15; 1256 adap->max_feed_count = 15;
1257 } 1257 }
1258 1258
diff --git a/drivers/media/usb/dvb-usb-v2/mxl111sf.c b/drivers/media/usb/dvb-usb-v2/mxl111sf.c
index b8a707e57b99..c3447eaf1104 100644
--- a/drivers/media/usb/dvb-usb-v2/mxl111sf.c
+++ b/drivers/media/usb/dvb-usb-v2/mxl111sf.c
@@ -31,11 +31,11 @@ module_param_named(debug, dvb_usb_mxl111sf_debug, int, 0644);
31MODULE_PARM_DESC(debug, "set debugging level " 31MODULE_PARM_DESC(debug, "set debugging level "
32 "(1=info, 2=xfer, 4=i2c, 8=reg, 16=adv (or-able))."); 32 "(1=info, 2=xfer, 4=i2c, 8=reg, 16=adv (or-able)).");
33 33
34int dvb_usb_mxl111sf_isoc; 34static int dvb_usb_mxl111sf_isoc;
35module_param_named(isoc, dvb_usb_mxl111sf_isoc, int, 0644); 35module_param_named(isoc, dvb_usb_mxl111sf_isoc, int, 0644);
36MODULE_PARM_DESC(isoc, "enable usb isoc xfer (0=bulk, 1=isoc)."); 36MODULE_PARM_DESC(isoc, "enable usb isoc xfer (0=bulk, 1=isoc).");
37 37
38int dvb_usb_mxl111sf_spi; 38static int dvb_usb_mxl111sf_spi;
39module_param_named(spi, dvb_usb_mxl111sf_spi, int, 0644); 39module_param_named(spi, dvb_usb_mxl111sf_spi, int, 0644);
40MODULE_PARM_DESC(spi, "use spi rather than tp for data xfer (0=tp, 1=spi)."); 40MODULE_PARM_DESC(spi, "use spi rather than tp for data xfer (0=tp, 1=spi).");
41 41
@@ -43,7 +43,7 @@ MODULE_PARM_DESC(spi, "use spi rather than tp for data xfer (0=tp, 1=spi).");
43#define ANT_PATH_EXTERNAL 1 43#define ANT_PATH_EXTERNAL 1
44#define ANT_PATH_INTERNAL 2 44#define ANT_PATH_INTERNAL 2
45 45
46int dvb_usb_mxl111sf_rfswitch = 46static int dvb_usb_mxl111sf_rfswitch =
47#if 0 47#if 0
48 ANT_PATH_AUTO; 48 ANT_PATH_AUTO;
49#else 49#else
@@ -887,7 +887,7 @@ static u32 mxl111sf_i2c_func(struct i2c_adapter *adapter)
887 return I2C_FUNC_I2C; 887 return I2C_FUNC_I2C;
888} 888}
889 889
890struct i2c_algorithm mxl111sf_i2c_algo = { 890static struct i2c_algorithm mxl111sf_i2c_algo = {
891 .master_xfer = mxl111sf_i2c_xfer, 891 .master_xfer = mxl111sf_i2c_xfer,
892 .functionality = mxl111sf_i2c_func, 892 .functionality = mxl111sf_i2c_func,
893#ifdef NEED_ALGO_CONTROL 893#ifdef NEED_ALGO_CONTROL
diff --git a/drivers/media/usb/dvb-usb/Kconfig b/drivers/media/usb/dvb-usb/Kconfig
index 10aef2188fbe..41d3eb922a00 100644
--- a/drivers/media/usb/dvb-usb/Kconfig
+++ b/drivers/media/usb/dvb-usb/Kconfig
@@ -130,7 +130,7 @@ config DVB_USB_CXUSB
130 130
131 Medion MD95700 hybrid USB2.0 device. 131 Medion MD95700 hybrid USB2.0 device.
132 DViCO FusionHDTV (Bluebird) USB2.0 devices 132 DViCO FusionHDTV (Bluebird) USB2.0 devices
133 TechnoTrend TVStick CT2-4400 133 TechnoTrend TVStick CT2-4400 and CT2-4650 CI devices
134 134
135config DVB_USB_M920X 135config DVB_USB_M920X
136 tristate "Uli m920x DVB-T USB2.0 support" 136 tristate "Uli m920x DVB-T USB2.0 support"
diff --git a/drivers/media/usb/dvb-usb/af9005.c b/drivers/media/usb/dvb-usb/af9005.c
index af176b6ce738..3f4361e48a32 100644
--- a/drivers/media/usb/dvb-usb/af9005.c
+++ b/drivers/media/usb/dvb-usb/af9005.c
@@ -30,7 +30,7 @@ MODULE_PARM_DESC(debug,
30 "set debugging level (1=info,xfer=2,rc=4,reg=8,i2c=16,fw=32 (or-able))." 30 "set debugging level (1=info,xfer=2,rc=4,reg=8,i2c=16,fw=32 (or-able))."
31 DVB_USB_DEBUG_STATUS); 31 DVB_USB_DEBUG_STATUS);
32/* enable obnoxious led */ 32/* enable obnoxious led */
33bool dvb_usb_af9005_led = 1; 33bool dvb_usb_af9005_led = true;
34module_param_named(led, dvb_usb_af9005_led, bool, 0644); 34module_param_named(led, dvb_usb_af9005_led, bool, 0644);
35MODULE_PARM_DESC(led, "enable led (default: 1)."); 35MODULE_PARM_DESC(led, "enable led (default: 1).");
36 36
diff --git a/drivers/media/usb/dvb-usb/cxusb.c b/drivers/media/usb/dvb-usb/cxusb.c
index 16bc579d1404..356abb369c20 100644
--- a/drivers/media/usb/dvb-usb/cxusb.c
+++ b/drivers/media/usb/dvb-usb/cxusb.c
@@ -44,6 +44,7 @@
44#include "atbm8830.h" 44#include "atbm8830.h"
45#include "si2168.h" 45#include "si2168.h"
46#include "si2157.h" 46#include "si2157.h"
47#include "sp2.h"
47 48
48/* Max transfer size done by I2C transfer functions */ 49/* Max transfer size done by I2C transfer functions */
49#define MAX_XFER_SIZE 80 50#define MAX_XFER_SIZE 80
@@ -175,7 +176,7 @@ static int cxusb_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msg[],
175 176
176 for (i = 0; i < num; i++) { 177 for (i = 0; i < num; i++) {
177 178
178 if (d->udev->descriptor.idVendor == USB_VID_MEDION) 179 if (le16_to_cpu(d->udev->descriptor.idVendor) == USB_VID_MEDION)
179 switch (msg[i].addr) { 180 switch (msg[i].addr) {
180 case 0x63: 181 case 0x63:
181 cxusb_gpio_tuner(d, 0); 182 cxusb_gpio_tuner(d, 0);
@@ -672,6 +673,70 @@ static struct rc_map_table rc_map_d680_dmb_table[] = {
672 { 0x0025, KEY_POWER }, 673 { 0x0025, KEY_POWER },
673}; 674};
674 675
676static int cxusb_tt_ct2_4400_read_mac_address(struct dvb_usb_device *d, u8 mac[6])
677{
678 u8 wbuf[2];
679 u8 rbuf[6];
680 int ret;
681 struct i2c_msg msg[] = {
682 {
683 .addr = 0x51,
684 .flags = 0,
685 .buf = wbuf,
686 .len = 2,
687 }, {
688 .addr = 0x51,
689 .flags = I2C_M_RD,
690 .buf = rbuf,
691 .len = 6,
692 }
693 };
694
695 wbuf[0] = 0x1e;
696 wbuf[1] = 0x00;
697 ret = cxusb_i2c_xfer(&d->i2c_adap, msg, 2);
698
699 if (ret == 2) {
700 memcpy(mac, rbuf, 6);
701 return 0;
702 } else {
703 if (ret < 0)
704 return ret;
705 return -EIO;
706 }
707}
708
709static int cxusb_tt_ct2_4650_ci_ctrl(void *priv, u8 read, int addr,
710 u8 data, int *mem)
711{
712 struct dvb_usb_device *d = priv;
713 u8 wbuf[3];
714 u8 rbuf[2];
715 int ret;
716
717 wbuf[0] = (addr >> 8) & 0xff;
718 wbuf[1] = addr & 0xff;
719
720 if (read) {
721 ret = cxusb_ctrl_msg(d, CMD_SP2_CI_READ, wbuf, 2, rbuf, 2);
722 } else {
723 wbuf[2] = data;
724 ret = cxusb_ctrl_msg(d, CMD_SP2_CI_WRITE, wbuf, 3, rbuf, 1);
725 }
726
727 if (ret)
728 goto err;
729
730 if (read)
731 *mem = rbuf[1];
732
733 return 0;
734err:
735 deb_info("%s: ci usb write returned %d\n", __func__, ret);
736 return ret;
737
738}
739
675static int cxusb_dee1601_demod_init(struct dvb_frontend* fe) 740static int cxusb_dee1601_demod_init(struct dvb_frontend* fe)
676{ 741{
677 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x28 }; 742 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x28 };
@@ -1350,9 +1415,12 @@ static int cxusb_tt_ct2_4400_attach(struct dvb_usb_adapter *adap)
1350 struct i2c_adapter *adapter; 1415 struct i2c_adapter *adapter;
1351 struct i2c_client *client_demod; 1416 struct i2c_client *client_demod;
1352 struct i2c_client *client_tuner; 1417 struct i2c_client *client_tuner;
1418 struct i2c_client *client_ci;
1353 struct i2c_board_info info; 1419 struct i2c_board_info info;
1354 struct si2168_config si2168_config; 1420 struct si2168_config si2168_config;
1355 struct si2157_config si2157_config; 1421 struct si2157_config si2157_config;
1422 struct sp2_config sp2_config;
1423 u8 o[2], i;
1356 1424
1357 /* reset the tuner */ 1425 /* reset the tuner */
1358 if (cxusb_tt_ct2_4400_gpio_tuner(d, 0) < 0) { 1426 if (cxusb_tt_ct2_4400_gpio_tuner(d, 0) < 0) {
@@ -1369,6 +1437,7 @@ static int cxusb_tt_ct2_4400_attach(struct dvb_usb_adapter *adap)
1369 /* attach frontend */ 1437 /* attach frontend */
1370 si2168_config.i2c_adapter = &adapter; 1438 si2168_config.i2c_adapter = &adapter;
1371 si2168_config.fe = &adap->fe_adap[0].fe; 1439 si2168_config.fe = &adap->fe_adap[0].fe;
1440 si2168_config.ts_mode = SI2168_TS_PARALLEL;
1372 memset(&info, 0, sizeof(struct i2c_board_info)); 1441 memset(&info, 0, sizeof(struct i2c_board_info));
1373 strlcpy(info.type, "si2168", I2C_NAME_SIZE); 1442 strlcpy(info.type, "si2168", I2C_NAME_SIZE);
1374 info.addr = 0x64; 1443 info.addr = 0x64;
@@ -1408,6 +1477,48 @@ static int cxusb_tt_ct2_4400_attach(struct dvb_usb_adapter *adap)
1408 1477
1409 st->i2c_client_tuner = client_tuner; 1478 st->i2c_client_tuner = client_tuner;
1410 1479
1480 /* initialize CI */
1481 if (d->udev->descriptor.idProduct ==
1482 USB_PID_TECHNOTREND_CONNECT_CT2_4650_CI) {
1483
1484 memcpy(o, "\xc0\x01", 2);
1485 cxusb_ctrl_msg(d, CMD_GPIO_WRITE, o, 2, &i, 1);
1486 msleep(100);
1487
1488 memcpy(o, "\xc0\x00", 2);
1489 cxusb_ctrl_msg(d, CMD_GPIO_WRITE, o, 2, &i, 1);
1490 msleep(100);
1491
1492 memset(&sp2_config, 0, sizeof(sp2_config));
1493 sp2_config.dvb_adap = &adap->dvb_adap;
1494 sp2_config.priv = d;
1495 sp2_config.ci_control = cxusb_tt_ct2_4650_ci_ctrl;
1496 memset(&info, 0, sizeof(struct i2c_board_info));
1497 strlcpy(info.type, "sp2", I2C_NAME_SIZE);
1498 info.addr = 0x40;
1499 info.platform_data = &sp2_config;
1500 request_module(info.type);
1501 client_ci = i2c_new_device(&d->i2c_adap, &info);
1502 if (client_ci == NULL || client_ci->dev.driver == NULL) {
1503 module_put(client_tuner->dev.driver->owner);
1504 i2c_unregister_device(client_tuner);
1505 module_put(client_demod->dev.driver->owner);
1506 i2c_unregister_device(client_demod);
1507 return -ENODEV;
1508 }
1509 if (!try_module_get(client_ci->dev.driver->owner)) {
1510 i2c_unregister_device(client_ci);
1511 module_put(client_tuner->dev.driver->owner);
1512 i2c_unregister_device(client_tuner);
1513 module_put(client_demod->dev.driver->owner);
1514 i2c_unregister_device(client_demod);
1515 return -ENODEV;
1516 }
1517
1518 st->i2c_client_ci = client_ci;
1519
1520 }
1521
1411 return 0; 1522 return 0;
1412} 1523}
1413 1524
@@ -1537,6 +1648,13 @@ static void cxusb_disconnect(struct usb_interface *intf)
1537 struct cxusb_state *st = d->priv; 1648 struct cxusb_state *st = d->priv;
1538 struct i2c_client *client; 1649 struct i2c_client *client;
1539 1650
1651 /* remove I2C client for CI */
1652 client = st->i2c_client_ci;
1653 if (client) {
1654 module_put(client->dev.driver->owner);
1655 i2c_unregister_device(client);
1656 }
1657
1540 /* remove I2C client for tuner */ 1658 /* remove I2C client for tuner */
1541 client = st->i2c_client_tuner; 1659 client = st->i2c_client_tuner;
1542 if (client) { 1660 if (client) {
@@ -1576,6 +1694,7 @@ static struct usb_device_id cxusb_table [] = {
1576 { USB_DEVICE(USB_VID_CONEXANT, USB_PID_CONEXANT_D680_DMB) }, 1694 { USB_DEVICE(USB_VID_CONEXANT, USB_PID_CONEXANT_D680_DMB) },
1577 { USB_DEVICE(USB_VID_CONEXANT, USB_PID_MYGICA_D689) }, 1695 { USB_DEVICE(USB_VID_CONEXANT, USB_PID_MYGICA_D689) },
1578 { USB_DEVICE(USB_VID_TECHNOTREND, USB_PID_TECHNOTREND_TVSTICK_CT2_4400) }, 1696 { USB_DEVICE(USB_VID_TECHNOTREND, USB_PID_TECHNOTREND_TVSTICK_CT2_4400) },
1697 { USB_DEVICE(USB_VID_TECHNOTREND, USB_PID_TECHNOTREND_CONNECT_CT2_4650_CI) },
1579 {} /* Terminating entry */ 1698 {} /* Terminating entry */
1580}; 1699};
1581MODULE_DEVICE_TABLE (usb, cxusb_table); 1700MODULE_DEVICE_TABLE (usb, cxusb_table);
@@ -2230,6 +2349,8 @@ static struct dvb_usb_device_properties cxusb_tt_ct2_4400_properties = {
2230 .size_of_priv = sizeof(struct cxusb_state), 2349 .size_of_priv = sizeof(struct cxusb_state),
2231 2350
2232 .num_adapters = 1, 2351 .num_adapters = 1,
2352 .read_mac_address = cxusb_tt_ct2_4400_read_mac_address,
2353
2233 .adapter = { 2354 .adapter = {
2234 { 2355 {
2235 .num_frontends = 1, 2356 .num_frontends = 1,
@@ -2265,13 +2386,18 @@ static struct dvb_usb_device_properties cxusb_tt_ct2_4400_properties = {
2265 .rc_interval = 150, 2386 .rc_interval = 150,
2266 }, 2387 },
2267 2388
2268 .num_device_descs = 1, 2389 .num_device_descs = 2,
2269 .devices = { 2390 .devices = {
2270 { 2391 {
2271 "TechnoTrend TVStick CT2-4400", 2392 "TechnoTrend TVStick CT2-4400",
2272 { NULL }, 2393 { NULL },
2273 { &cxusb_table[20], NULL }, 2394 { &cxusb_table[20], NULL },
2274 }, 2395 },
2396 {
2397 "TechnoTrend TT-connect CT2-4650 CI",
2398 { NULL },
2399 { &cxusb_table[21], NULL },
2400 },
2275 } 2401 }
2276}; 2402};
2277 2403
diff --git a/drivers/media/usb/dvb-usb/cxusb.h b/drivers/media/usb/dvb-usb/cxusb.h
index 527ff7905e15..29f3e2ea2476 100644
--- a/drivers/media/usb/dvb-usb/cxusb.h
+++ b/drivers/media/usb/dvb-usb/cxusb.h
@@ -28,10 +28,14 @@
28#define CMD_ANALOG 0x50 28#define CMD_ANALOG 0x50
29#define CMD_DIGITAL 0x51 29#define CMD_DIGITAL 0x51
30 30
31#define CMD_SP2_CI_WRITE 0x70
32#define CMD_SP2_CI_READ 0x71
33
31struct cxusb_state { 34struct cxusb_state {
32 u8 gpio_write_state[3]; 35 u8 gpio_write_state[3];
33 struct i2c_client *i2c_client_demod; 36 struct i2c_client *i2c_client_demod;
34 struct i2c_client *i2c_client_tuner; 37 struct i2c_client *i2c_client_tuner;
38 struct i2c_client *i2c_client_ci;
35}; 39};
36 40
37#endif 41#endif
diff --git a/drivers/media/usb/dvb-usb/dib0700_devices.c b/drivers/media/usb/dvb-usb/dib0700_devices.c
index ce47d3f1c850..e1757b8f5f5d 100644
--- a/drivers/media/usb/dvb-usb/dib0700_devices.c
+++ b/drivers/media/usb/dvb-usb/dib0700_devices.c
@@ -220,12 +220,21 @@ static struct dibx000_agc_config stk7700d_7000p_mt2266_agc_config[2] = {
220}; 220};
221 221
222static struct dibx000_bandwidth_config stk7700d_mt2266_pll_config = { 222static struct dibx000_bandwidth_config stk7700d_mt2266_pll_config = {
223 60000, 30000, 223 .internal = 60000,
224 1, 8, 3, 1, 0, 224 .sampling = 30000,
225 0, 0, 1, 1, 2, 225 .pll_prediv = 1,
226 (3 << 14) | (1 << 12) | (524 << 0), 226 .pll_ratio = 8,
227 0, 227 .pll_range = 3,
228 20452225, 228 .pll_reset = 1,
229 .pll_bypass = 0,
230 .enable_refdiv = 0,
231 .bypclk_div = 0,
232 .IO_CLK_en_core = 1,
233 .ADClkSrc = 1,
234 .modulo = 2,
235 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
236 .ifreq = 0,
237 .timf = 20452225,
229}; 238};
230 239
231static struct dib7000p_config stk7700d_dib7000p_mt2266_config[] = { 240static struct dib7000p_config stk7700d_dib7000p_mt2266_config[] = {
@@ -342,57 +351,57 @@ static int stk7700d_tuner_attach(struct dvb_usb_adapter *adap)
342 351
343/* STK7700-PH: Digital/Analog Hybrid Tuner, e.h. Cinergy HT USB HE */ 352/* STK7700-PH: Digital/Analog Hybrid Tuner, e.h. Cinergy HT USB HE */
344static struct dibx000_agc_config xc3028_agc_config = { 353static struct dibx000_agc_config xc3028_agc_config = {
345 BAND_VHF | BAND_UHF, /* band_caps */ 354 .band_caps = BAND_VHF | BAND_UHF,
346
347 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0, 355 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
348 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0, 356 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
349 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */ 357 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
350 (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | 358 .setup = (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
351 (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */ 359 .inv_gain = 712,
352 360 .time_stabiliz = 21,
353 712, /* inv_gain */ 361 .alpha_level = 0,
354 21, /* time_stabiliz */ 362 .thlock = 118,
355 363 .wbd_inv = 0,
356 0, /* alpha_level */ 364 .wbd_ref = 2867,
357 118, /* thlock */ 365 .wbd_sel = 0,
358 366 .wbd_alpha = 2,
359 0, /* wbd_inv */ 367 .agc1_max = 0,
360 2867, /* wbd_ref */ 368 .agc1_min = 0,
361 0, /* wbd_sel */ 369 .agc2_max = 39718,
362 2, /* wbd_alpha */ 370 .agc2_min = 9930,
363 371 .agc1_pt1 = 0,
364 0, /* agc1_max */ 372 .agc1_pt2 = 0,
365 0, /* agc1_min */ 373 .agc1_pt3 = 0,
366 39718, /* agc2_max */ 374 .agc1_slope1 = 0,
367 9930, /* agc2_min */ 375 .agc1_slope2 = 0,
368 0, /* agc1_pt1 */ 376 .agc2_pt1 = 0,
369 0, /* agc1_pt2 */ 377 .agc2_pt2 = 128,
370 0, /* agc1_pt3 */ 378 .agc2_slope1 = 29,
371 0, /* agc1_slope1 */ 379 .agc2_slope2 = 29,
372 0, /* agc1_slope2 */ 380 .alpha_mant = 17,
373 0, /* agc2_pt1 */ 381 .alpha_exp = 27,
374 128, /* agc2_pt2 */ 382 .beta_mant = 23,
375 29, /* agc2_slope1 */ 383 .beta_exp = 51,
376 29, /* agc2_slope2 */ 384 .perform_agc_softsplit = 1,
377
378 17, /* alpha_mant */
379 27, /* alpha_exp */
380 23, /* beta_mant */
381 51, /* beta_exp */
382
383 1, /* perform_agc_softsplit */
384}; 385};
385 386
386/* PLL Configuration for COFDM BW_MHz = 8.00 with external clock = 30.00 */ 387/* PLL Configuration for COFDM BW_MHz = 8.00 with external clock = 30.00 */
387static struct dibx000_bandwidth_config xc3028_bw_config = { 388static struct dibx000_bandwidth_config xc3028_bw_config = {
388 60000, 30000, /* internal, sampling */ 389 .internal = 60000,
389 1, 8, 3, 1, 0, /* pll_cfg: prediv, ratio, range, reset, bypass */ 390 .sampling = 30000,
390 0, 0, 1, 1, 0, /* misc: refdiv, bypclk_div, IO_CLK_en_core, ADClkSrc, 391 .pll_prediv = 1,
391 modulo */ 392 .pll_ratio = 8,
392 (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */ 393 .pll_range = 3,
393 (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */ 394 .pll_reset = 1,
394 20452225, /* timf */ 395 .pll_bypass = 0,
395 30000000, /* xtal_hz */ 396 .enable_refdiv = 0,
397 .bypclk_div = 0,
398 .IO_CLK_en_core = 1,
399 .ADClkSrc = 1,
400 .modulo = 0,
401 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
402 .ifreq = (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
403 .timf = 20452225,
404 .xtal_hz = 30000000,
396}; 405};
397 406
398static struct dib7000p_config stk7700ph_dib7700_xc3028_config = { 407static struct dib7000p_config stk7700ph_dib7700_xc3028_config = {
@@ -614,59 +623,55 @@ static struct dibx000_agc_config stk7700p_7000m_mt2060_agc_config = {
614}; 623};
615 624
616static struct dibx000_agc_config stk7700p_7000p_mt2060_agc_config = { 625static struct dibx000_agc_config stk7700p_7000p_mt2060_agc_config = {
617 BAND_UHF | BAND_VHF, 626 .band_caps = BAND_UHF | BAND_VHF,
618
619 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, 627 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
620 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */ 628 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
621 (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) 629 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
622 | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), 630 .inv_gain = 712,
623 631 .time_stabiliz = 41,
624 712, 632 .alpha_level = 0,
625 41, 633 .thlock = 118,
626 634 .wbd_inv = 0,
627 0, 635 .wbd_ref = 4095,
628 118, 636 .wbd_sel = 0,
629 637 .wbd_alpha = 0,
630 0, 638 .agc1_max = 42598,
631 4095, 639 .agc1_min = 16384,
632 0, 640 .agc2_max = 42598,
633 0, 641 .agc2_min = 0,
634 642 .agc1_pt1 = 0,
635 42598, 643 .agc1_pt2 = 137,
636 16384, 644 .agc1_pt3 = 255,
637 42598, 645 .agc1_slope1 = 0,
638 0, 646 .agc1_slope2 = 255,
639 647 .agc2_pt1 = 0,
640 0, 648 .agc2_pt2 = 0,
641 137, 649 .agc2_slope1 = 0,
642 255, 650 .agc2_slope2 = 41,
643 651 .alpha_mant = 15,
644 0, 652 .alpha_exp = 25,
645 255, 653 .beta_mant = 28,
646 654 .beta_exp = 48,
647 0, 655 .perform_agc_softsplit = 0,
648 0,
649
650 0,
651 41,
652
653 15,
654 25,
655
656 28,
657 48,
658
659 0,
660}; 656};
661 657
662static struct dibx000_bandwidth_config stk7700p_pll_config = { 658static struct dibx000_bandwidth_config stk7700p_pll_config = {
663 60000, 30000, 659 .internal = 60000,
664 1, 8, 3, 1, 0, 660 .sampling = 30000,
665 0, 0, 1, 1, 0, 661 .pll_prediv = 1,
666 (3 << 14) | (1 << 12) | (524 << 0), 662 .pll_ratio = 8,
667 60258167, 663 .pll_range = 3,
668 20452225, 664 .pll_reset = 1,
669 30000000, 665 .pll_bypass = 0,
666 .enable_refdiv = 0,
667 .bypclk_div = 0,
668 .IO_CLK_en_core = 1,
669 .ADClkSrc = 1,
670 .modulo = 0,
671 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
672 .ifreq = 60258167,
673 .timf = 20452225,
674 .xtal_hz = 30000000,
670}; 675};
671 676
672static struct dib7000m_config stk7700p_dib7000m_config = { 677static struct dib7000m_config stk7700p_dib7000m_config = {
@@ -758,45 +763,36 @@ static int stk7700p_tuner_attach(struct dvb_usb_adapter *adap)
758 763
759/* DIB7070 generic */ 764/* DIB7070 generic */
760static struct dibx000_agc_config dib7070_agc_config = { 765static struct dibx000_agc_config dib7070_agc_config = {
761 BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND, 766 .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
762 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, 767 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
763 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */ 768 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
764 (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) 769 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
765 | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0), 770 .inv_gain = 600,
766 771 .time_stabiliz = 10,
767 600, 772 .alpha_level = 0,
768 10, 773 .thlock = 118,
769 774 .wbd_inv = 0,
770 0, 775 .wbd_ref = 3530,
771 118, 776 .wbd_sel = 1,
772 777 .wbd_alpha = 5,
773 0, 778 .agc1_max = 65535,
774 3530, 779 .agc1_min = 0,
775 1, 780 .agc2_max = 65535,
776 5, 781 .agc2_min = 0,
777 782 .agc1_pt1 = 0,
778 65535, 783 .agc1_pt2 = 40,
779 0, 784 .agc1_pt3 = 183,
780 785 .agc1_slope1 = 206,
781 65535, 786 .agc1_slope2 = 255,
782 0, 787 .agc2_pt1 = 72,
783 788 .agc2_pt2 = 152,
784 0, 789 .agc2_slope1 = 88,
785 40, 790 .agc2_slope2 = 90,
786 183, 791 .alpha_mant = 17,
787 206, 792 .alpha_exp = 27,
788 255, 793 .beta_mant = 23,
789 72, 794 .beta_exp = 51,
790 152, 795 .perform_agc_softsplit = 0,
791 88,
792 90,
793
794 17,
795 27,
796 23,
797 51,
798
799 0,
800}; 796};
801 797
802static int dib7070_tuner_reset(struct dvb_frontend *fe, int onoff) 798static int dib7070_tuner_reset(struct dvb_frontend *fe, int onoff)
@@ -952,13 +948,22 @@ static int stk70x0p_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
952} 948}
953 949
954static struct dibx000_bandwidth_config dib7070_bw_config_12_mhz = { 950static struct dibx000_bandwidth_config dib7070_bw_config_12_mhz = {
955 60000, 15000, 951 .internal = 60000,
956 1, 20, 3, 1, 0, 952 .sampling = 15000,
957 0, 0, 1, 1, 2, 953 .pll_prediv = 1,
958 (3 << 14) | (1 << 12) | (524 << 0), 954 .pll_ratio = 20,
959 (0 << 25) | 0, 955 .pll_range = 3,
960 20452225, 956 .pll_reset = 1,
961 12000000, 957 .pll_bypass = 0,
958 .enable_refdiv = 0,
959 .bypclk_div = 0,
960 .IO_CLK_en_core = 1,
961 .ADClkSrc = 1,
962 .modulo = 2,
963 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
964 .ifreq = (0 << 25) | 0,
965 .timf = 20452225,
966 .xtal_hz = 12000000,
962}; 967};
963 968
964static struct dib7000p_config dib7070p_dib7000p_config = { 969static struct dib7000p_config dib7070p_dib7000p_config = {
@@ -1169,14 +1174,22 @@ static struct dibx000_agc_config dib807x_agc_config[2] = {
1169}; 1174};
1170 1175
1171static struct dibx000_bandwidth_config dib807x_bw_config_12_mhz = { 1176static struct dibx000_bandwidth_config dib807x_bw_config_12_mhz = {
1172 60000, 15000, /* internal, sampling*/ 1177 .internal = 60000,
1173 1, 20, 3, 1, 0, /* pll_cfg: prediv, ratio, range, reset, bypass*/ 1178 .sampling = 15000,
1174 0, 0, 1, 1, 2, /* misc: refdiv, bypclk_div, IO_CLK_en_core, 1179 .pll_prediv = 1,
1175 ADClkSrc, modulo */ 1180 .pll_ratio = 20,
1176 (3 << 14) | (1 << 12) | (599 << 0), /* sad_cfg: refsel, sel, freq_15k*/ 1181 .pll_range = 3,
1177 (0 << 25) | 0, /* ifreq = 0.000000 MHz*/ 1182 .pll_reset = 1,
1178 18179755, /* timf*/ 1183 .pll_bypass = 0,
1179 12000000, /* xtal_hz*/ 1184 .enable_refdiv = 0,
1185 .bypclk_div = 0,
1186 .IO_CLK_en_core = 1,
1187 .ADClkSrc = 1,
1188 .modulo = 2,
1189 .sad_cfg = (3 << 14) | (1 << 12) | (599 << 0), /* sad_cfg: refsel, sel, freq_15k*/
1190 .ifreq = (0 << 25) | 0, /* ifreq = 0.000000 MHz*/
1191 .timf = 18179755,
1192 .xtal_hz = 12000000,
1180}; 1193};
1181 1194
1182static struct dib8000_config dib807x_dib8000_config[2] = { 1195static struct dib8000_config dib807x_dib8000_config[2] = {
@@ -1921,13 +1934,22 @@ static struct dibx000_agc_config dib8096p_agc_config[2] = {
1921}; 1934};
1922 1935
1923static struct dibx000_bandwidth_config dib8096p_clock_config_12_mhz = { 1936static struct dibx000_bandwidth_config dib8096p_clock_config_12_mhz = {
1924 108000, 13500, 1937 .internal = 108000,
1925 1, 9, 1, 0, 0, 1938 .sampling = 13500,
1926 0, 0, 0, 0, 2, 1939 .pll_prediv = 1,
1927 (3 << 14) | (1 << 12) | (524 << 0), 1940 .pll_ratio = 9,
1928 (0 << 25) | 0, 1941 .pll_range = 1,
1929 20199729, 1942 .pll_reset = 0,
1930 12000000, 1943 .pll_bypass = 0,
1944 .enable_refdiv = 0,
1945 .bypclk_div = 0,
1946 .IO_CLK_en_core = 0,
1947 .ADClkSrc = 0,
1948 .modulo = 2,
1949 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
1950 .ifreq = (0 << 25) | 0,
1951 .timf = 20199729,
1952 .xtal_hz = 12000000,
1931}; 1953};
1932 1954
1933static struct dib8000_config tfe8096p_dib8000_config = { 1955static struct dib8000_config tfe8096p_dib8000_config = {
@@ -2724,13 +2746,22 @@ static struct dibx000_agc_config dib7090_agc_config[2] = {
2724}; 2746};
2725 2747
2726static struct dibx000_bandwidth_config dib7090_clock_config_12_mhz = { 2748static struct dibx000_bandwidth_config dib7090_clock_config_12_mhz = {
2727 60000, 15000, 2749 .internal = 60000,
2728 1, 5, 0, 0, 0, 2750 .sampling = 15000,
2729 0, 0, 1, 1, 2, 2751 .pll_prediv = 1,
2730 (3 << 14) | (1 << 12) | (524 << 0), 2752 .pll_ratio = 5,
2731 (0 << 25) | 0, 2753 .pll_range = 0,
2732 20452225, 2754 .pll_reset = 0,
2733 15000000, 2755 .pll_bypass = 0,
2756 .enable_refdiv = 0,
2757 .bypclk_div = 0,
2758 .IO_CLK_en_core = 1,
2759 .ADClkSrc = 1,
2760 .modulo = 2,
2761 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
2762 .ifreq = (0 << 25) | 0,
2763 .timf = 20452225,
2764 .xtal_hz = 15000000,
2734}; 2765};
2735 2766
2736static struct dib7000p_config nim7090_dib7000p_config = { 2767static struct dib7000p_config nim7090_dib7000p_config = {
@@ -3498,14 +3529,22 @@ static struct dibx000_agc_config stk7700p_7000p_xc4000_agc_config = {
3498}; 3529};
3499 3530
3500static struct dibx000_bandwidth_config stk7700p_xc4000_pll_config = { 3531static struct dibx000_bandwidth_config stk7700p_xc4000_pll_config = {
3501 60000, 30000, /* internal, sampling */ 3532 .internal = 60000,
3502 1, 8, 3, 1, 0, /* pll_cfg: prediv, ratio, range, reset, bypass */ 3533 .sampling = 30000,
3503 0, 0, 1, 1, 0, /* misc: refdiv, bypclk_div, IO_CLK_en_core, */ 3534 .pll_prediv = 1,
3504 /* ADClkSrc, modulo */ 3535 .pll_ratio = 8,
3505 (3 << 14) | (1 << 12) | 524, /* sad_cfg: refsel, sel, freq_15k */ 3536 .pll_range = 3,
3506 39370534, /* ifreq */ 3537 .pll_reset = 1,
3507 20452225, /* timf */ 3538 .pll_bypass = 0,
3508 30000000 /* xtal */ 3539 .enable_refdiv = 0,
3540 .bypclk_div = 0,
3541 .IO_CLK_en_core = 1,
3542 .ADClkSrc = 1,
3543 .modulo = 0,
3544 .sad_cfg = (3 << 14) | (1 << 12) | 524, /* sad_cfg: refsel, sel, freq_15k */
3545 .ifreq = 39370534,
3546 .timf = 20452225,
3547 .xtal_hz = 30000000
3509}; 3548};
3510 3549
3511/* FIXME: none of these inputs are validated yet */ 3550/* FIXME: none of these inputs are validated yet */
diff --git a/drivers/media/usb/dvb-usb/dibusb-common.c b/drivers/media/usb/dvb-usb/dibusb-common.c
index 6d68af0c49c8..ef3a8f75f82e 100644
--- a/drivers/media/usb/dvb-usb/dibusb-common.c
+++ b/drivers/media/usb/dvb-usb/dibusb-common.c
@@ -258,8 +258,8 @@ static struct dib3000mc_config mod3000p_dib3000p_config = {
258 258
259int dibusb_dib3000mc_frontend_attach(struct dvb_usb_adapter *adap) 259int dibusb_dib3000mc_frontend_attach(struct dvb_usb_adapter *adap)
260{ 260{
261 if (adap->dev->udev->descriptor.idVendor == USB_VID_LITEON && 261 if (le16_to_cpu(adap->dev->udev->descriptor.idVendor) == USB_VID_LITEON &&
262 adap->dev->udev->descriptor.idProduct == 262 le16_to_cpu(adap->dev->udev->descriptor.idProduct) ==
263 USB_PID_LITEON_DVB_T_WARM) { 263 USB_PID_LITEON_DVB_T_WARM) {
264 msleep(1000); 264 msleep(1000);
265 } 265 }
@@ -297,8 +297,8 @@ int dibusb_dib3000mc_tuner_attach(struct dvb_usb_adapter *adap)
297 struct i2c_adapter *tun_i2c; 297 struct i2c_adapter *tun_i2c;
298 298
299 // First IF calibration for Liteon Sticks 299 // First IF calibration for Liteon Sticks
300 if (adap->dev->udev->descriptor.idVendor == USB_VID_LITEON && 300 if (le16_to_cpu(adap->dev->udev->descriptor.idVendor) == USB_VID_LITEON &&
301 adap->dev->udev->descriptor.idProduct == USB_PID_LITEON_DVB_T_WARM) { 301 le16_to_cpu(adap->dev->udev->descriptor.idProduct) == USB_PID_LITEON_DVB_T_WARM) {
302 302
303 dibusb_read_eeprom_byte(adap->dev,0x7E,&a); 303 dibusb_read_eeprom_byte(adap->dev,0x7E,&a);
304 dibusb_read_eeprom_byte(adap->dev,0x7F,&b); 304 dibusb_read_eeprom_byte(adap->dev,0x7F,&b);
@@ -310,8 +310,8 @@ int dibusb_dib3000mc_tuner_attach(struct dvb_usb_adapter *adap)
310 else 310 else
311 warn("LITE-ON DVB-T: Strange IF1 calibration :%2X %2X\n", a, b); 311 warn("LITE-ON DVB-T: Strange IF1 calibration :%2X %2X\n", a, b);
312 312
313 } else if (adap->dev->udev->descriptor.idVendor == USB_VID_DIBCOM && 313 } else if (le16_to_cpu(adap->dev->udev->descriptor.idVendor) == USB_VID_DIBCOM &&
314 adap->dev->udev->descriptor.idProduct == USB_PID_DIBCOM_MOD3001_WARM) { 314 le16_to_cpu(adap->dev->udev->descriptor.idProduct) == USB_PID_DIBCOM_MOD3001_WARM) {
315 u8 desc; 315 u8 desc;
316 dibusb_read_eeprom_byte(adap->dev, 7, &desc); 316 dibusb_read_eeprom_byte(adap->dev, 7, &desc);
317 if (desc == 2) { 317 if (desc == 2) {
diff --git a/drivers/media/usb/dvb-usb/dw2102.c b/drivers/media/usb/dvb-usb/dw2102.c
index 2add8c507ec9..1a3df10d6bad 100644
--- a/drivers/media/usb/dvb-usb/dw2102.c
+++ b/drivers/media/usb/dvb-usb/dw2102.c
@@ -667,7 +667,7 @@ static int s6x0_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[],
667 obuf[1] = (msg[j].addr << 1); 667 obuf[1] = (msg[j].addr << 1);
668 memcpy(obuf + 2, msg[j].buf, msg[j].len); 668 memcpy(obuf + 2, msg[j].buf, msg[j].len);
669 dw210x_op_rw(d->udev, 669 dw210x_op_rw(d->udev,
670 udev->descriptor.idProduct == 670 le16_to_cpu(udev->descriptor.idProduct) ==
671 0x7500 ? 0x92 : 0x90, 0, 0, 671 0x7500 ? 0x92 : 0x90, 0, 0,
672 obuf, msg[j].len + 2, 672 obuf, msg[j].len + 2,
673 DW210X_WRITE_MSG); 673 DW210X_WRITE_MSG);
@@ -1598,7 +1598,7 @@ static int dw2102_load_firmware(struct usb_device *dev,
1598 u8 reset16[] = {0, 0, 0, 0, 0, 0, 0}; 1598 u8 reset16[] = {0, 0, 0, 0, 0, 0, 0};
1599 const struct firmware *fw; 1599 const struct firmware *fw;
1600 1600
1601 switch (dev->descriptor.idProduct) { 1601 switch (le16_to_cpu(dev->descriptor.idProduct)) {
1602 case 0x2101: 1602 case 0x2101:
1603 ret = request_firmware(&fw, DW2101_FIRMWARE, &dev->dev); 1603 ret = request_firmware(&fw, DW2101_FIRMWARE, &dev->dev);
1604 if (ret != 0) { 1604 if (ret != 0) {
@@ -1641,7 +1641,7 @@ static int dw2102_load_firmware(struct usb_device *dev,
1641 ret = -EINVAL; 1641 ret = -EINVAL;
1642 } 1642 }
1643 /* init registers */ 1643 /* init registers */
1644 switch (dev->descriptor.idProduct) { 1644 switch (le16_to_cpu(dev->descriptor.idProduct)) {
1645 case USB_PID_TEVII_S650: 1645 case USB_PID_TEVII_S650:
1646 dw2104_properties.rc.core.rc_codes = RC_MAP_TEVII_NEC; 1646 dw2104_properties.rc.core.rc_codes = RC_MAP_TEVII_NEC;
1647 case USB_PID_DW2104: 1647 case USB_PID_DW2104:
@@ -1901,14 +1901,14 @@ static struct dvb_usb_device_properties s6x0_properties = {
1901 } 1901 }
1902}; 1902};
1903 1903
1904struct dvb_usb_device_properties *p1100; 1904static struct dvb_usb_device_properties *p1100;
1905static struct dvb_usb_device_description d1100 = { 1905static struct dvb_usb_device_description d1100 = {
1906 "Prof 1100 USB ", 1906 "Prof 1100 USB ",
1907 {&dw2102_table[PROF_1100], NULL}, 1907 {&dw2102_table[PROF_1100], NULL},
1908 {NULL}, 1908 {NULL},
1909}; 1909};
1910 1910
1911struct dvb_usb_device_properties *s660; 1911static struct dvb_usb_device_properties *s660;
1912static struct dvb_usb_device_description d660 = { 1912static struct dvb_usb_device_description d660 = {
1913 "TeVii S660 USB", 1913 "TeVii S660 USB",
1914 {&dw2102_table[TEVII_S660], NULL}, 1914 {&dw2102_table[TEVII_S660], NULL},
@@ -1927,14 +1927,14 @@ static struct dvb_usb_device_description d480_2 = {
1927 {NULL}, 1927 {NULL},
1928}; 1928};
1929 1929
1930struct dvb_usb_device_properties *p7500; 1930static struct dvb_usb_device_properties *p7500;
1931static struct dvb_usb_device_description d7500 = { 1931static struct dvb_usb_device_description d7500 = {
1932 "Prof 7500 USB DVB-S2", 1932 "Prof 7500 USB DVB-S2",
1933 {&dw2102_table[PROF_7500], NULL}, 1933 {&dw2102_table[PROF_7500], NULL},
1934 {NULL}, 1934 {NULL},
1935}; 1935};
1936 1936
1937struct dvb_usb_device_properties *s421; 1937static struct dvb_usb_device_properties *s421;
1938static struct dvb_usb_device_description d421 = { 1938static struct dvb_usb_device_description d421 = {
1939 "TeVii S421 PCI", 1939 "TeVii S421 PCI",
1940 {&dw2102_table[TEVII_S421], NULL}, 1940 {&dw2102_table[TEVII_S421], NULL},
diff --git a/drivers/media/usb/dvb-usb/opera1.c b/drivers/media/usb/dvb-usb/opera1.c
index 16ba90acf539..14a2119912ba 100644
--- a/drivers/media/usb/dvb-usb/opera1.c
+++ b/drivers/media/usb/dvb-usb/opera1.c
@@ -554,8 +554,8 @@ static int opera1_probe(struct usb_interface *intf,
554{ 554{
555 struct usb_device *udev = interface_to_usbdev(intf); 555 struct usb_device *udev = interface_to_usbdev(intf);
556 556
557 if (udev->descriptor.idProduct == USB_PID_OPERA1_WARM && 557 if (le16_to_cpu(udev->descriptor.idProduct) == USB_PID_OPERA1_WARM &&
558 udev->descriptor.idVendor == USB_VID_OPERA1 && 558 le16_to_cpu(udev->descriptor.idVendor) == USB_VID_OPERA1 &&
559 opera1_xilinx_load_firmware(udev, "dvb-usb-opera1-fpga-01.fw") != 0 559 opera1_xilinx_load_firmware(udev, "dvb-usb-opera1-fpga-01.fw") != 0
560 ) { 560 ) {
561 return -EINVAL; 561 return -EINVAL;
diff --git a/drivers/media/usb/dvb-usb/pctv452e.c b/drivers/media/usb/dvb-usb/pctv452e.c
index bdfe8963591c..d17618fe8f5c 100644
--- a/drivers/media/usb/dvb-usb/pctv452e.c
+++ b/drivers/media/usb/dvb-usb/pctv452e.c
@@ -883,7 +883,7 @@ static int pctv452e_frontend_attach(struct dvb_usb_adapter *a)
883 if (!a->fe_adap[0].fe) 883 if (!a->fe_adap[0].fe)
884 return -ENODEV; 884 return -ENODEV;
885 if ((dvb_attach(lnbp22_attach, a->fe_adap[0].fe, 885 if ((dvb_attach(lnbp22_attach, a->fe_adap[0].fe,
886 &a->dev->i2c_adap)) == 0) 886 &a->dev->i2c_adap)) == NULL)
887 err("Cannot attach lnbp22\n"); 887 err("Cannot attach lnbp22\n");
888 888
889 id = a->dev->desc->warm_ids[0]; 889 id = a->dev->desc->warm_ids[0];
@@ -900,7 +900,7 @@ static int pctv452e_tuner_attach(struct dvb_usb_adapter *a)
900 if (!a->fe_adap[0].fe) 900 if (!a->fe_adap[0].fe)
901 return -ENODEV; 901 return -ENODEV;
902 if (dvb_attach(stb6100_attach, a->fe_adap[0].fe, &stb6100_config, 902 if (dvb_attach(stb6100_attach, a->fe_adap[0].fe, &stb6100_config,
903 &a->dev->i2c_adap) == 0) { 903 &a->dev->i2c_adap) == NULL) {
904 err("%s failed\n", __func__); 904 err("%s failed\n", __func__);
905 return -ENODEV; 905 return -ENODEV;
906 } 906 }
@@ -965,7 +965,7 @@ static struct dvb_usb_device_properties pctv452e_properties = {
965 .cold_ids = { NULL, NULL }, /* this is a warm only device */ 965 .cold_ids = { NULL, NULL }, /* this is a warm only device */
966 .warm_ids = { &pctv452e_usb_table[0], NULL } 966 .warm_ids = { &pctv452e_usb_table[0], NULL }
967 }, 967 },
968 { 0 }, 968 { NULL },
969 } 969 }
970}; 970};
971 971
@@ -1023,7 +1023,7 @@ static struct dvb_usb_device_properties tt_connect_s2_3600_properties = {
1023 .cold_ids = { NULL, NULL }, 1023 .cold_ids = { NULL, NULL },
1024 .warm_ids = { &pctv452e_usb_table[2], NULL } 1024 .warm_ids = { &pctv452e_usb_table[2], NULL }
1025 }, 1025 },
1026 { 0 }, 1026 { NULL },
1027 } 1027 }
1028}; 1028};
1029 1029
diff --git a/drivers/media/usb/em28xx/em28xx-audio.c b/drivers/media/usb/em28xx/em28xx-audio.c
index e881ef7b6445..957c7ae30efe 100644
--- a/drivers/media/usb/em28xx/em28xx-audio.c
+++ b/drivers/media/usb/em28xx/em28xx-audio.c
@@ -268,7 +268,7 @@ static int snd_em28xx_capture_open(struct snd_pcm_substream *substream)
268 nonblock = !!(substream->f_flags & O_NONBLOCK); 268 nonblock = !!(substream->f_flags & O_NONBLOCK);
269 if (nonblock) { 269 if (nonblock) {
270 if (!mutex_trylock(&dev->lock)) 270 if (!mutex_trylock(&dev->lock))
271 return -EAGAIN; 271 return -EAGAIN;
272 } else 272 } else
273 mutex_lock(&dev->lock); 273 mutex_lock(&dev->lock);
274 274
@@ -893,7 +893,7 @@ static int em28xx_audio_init(struct em28xx *dev)
893 static int devnr; 893 static int devnr;
894 int err; 894 int err;
895 895
896 if (!dev->has_alsa_audio) { 896 if (dev->usb_audio_type != EM28XX_USB_AUDIO_VENDOR) {
897 /* This device does not support the extension (in this case 897 /* This device does not support the extension (in this case
898 the device is expecting the snd-usb-audio module or 898 the device is expecting the snd-usb-audio module or
899 doesn't have analog audio support at all) */ 899 doesn't have analog audio support at all) */
@@ -975,7 +975,7 @@ static int em28xx_audio_fini(struct em28xx *dev)
975 if (dev == NULL) 975 if (dev == NULL)
976 return 0; 976 return 0;
977 977
978 if (!dev->has_alsa_audio) { 978 if (dev->usb_audio_type != EM28XX_USB_AUDIO_VENDOR) {
979 /* This device does not support the extension (in this case 979 /* This device does not support the extension (in this case
980 the device is expecting the snd-usb-audio module or 980 the device is expecting the snd-usb-audio module or
981 doesn't have analog audio support at all) */ 981 doesn't have analog audio support at all) */
@@ -1003,7 +1003,7 @@ static int em28xx_audio_suspend(struct em28xx *dev)
1003 if (dev == NULL) 1003 if (dev == NULL)
1004 return 0; 1004 return 0;
1005 1005
1006 if (!dev->has_alsa_audio) 1006 if (dev->usb_audio_type != EM28XX_USB_AUDIO_VENDOR)
1007 return 0; 1007 return 0;
1008 1008
1009 em28xx_info("Suspending audio extension"); 1009 em28xx_info("Suspending audio extension");
@@ -1017,7 +1017,7 @@ static int em28xx_audio_resume(struct em28xx *dev)
1017 if (dev == NULL) 1017 if (dev == NULL)
1018 return 0; 1018 return 0;
1019 1019
1020 if (!dev->has_alsa_audio) 1020 if (dev->usb_audio_type != EM28XX_USB_AUDIO_VENDOR)
1021 return 0; 1021 return 0;
1022 1022
1023 em28xx_info("Resuming audio extension"); 1023 em28xx_info("Resuming audio extension");
diff --git a/drivers/media/usb/em28xx/em28xx-cards.c b/drivers/media/usb/em28xx/em28xx-cards.c
index 9da812b8a786..71fa51e7984e 100644
--- a/drivers/media/usb/em28xx/em28xx-cards.c
+++ b/drivers/media/usb/em28xx/em28xx-cards.c
@@ -2246,7 +2246,7 @@ struct em28xx_board em28xx_boards[] = {
2246}; 2246};
2247EXPORT_SYMBOL_GPL(em28xx_boards); 2247EXPORT_SYMBOL_GPL(em28xx_boards);
2248 2248
2249const unsigned int em28xx_bcount = ARRAY_SIZE(em28xx_boards); 2249static const unsigned int em28xx_bcount = ARRAY_SIZE(em28xx_boards);
2250 2250
2251/* table of devices that work with this driver */ 2251/* table of devices that work with this driver */
2252struct usb_device_id em28xx_id_table[] = { 2252struct usb_device_id em28xx_id_table[] = {
@@ -2931,9 +2931,9 @@ static void request_module_async(struct work_struct *work)
2931#if defined(CONFIG_MODULES) && defined(MODULE) 2931#if defined(CONFIG_MODULES) && defined(MODULE)
2932 if (dev->has_video) 2932 if (dev->has_video)
2933 request_module("em28xx-v4l"); 2933 request_module("em28xx-v4l");
2934 if (dev->has_audio_class) 2934 if (dev->usb_audio_type == EM28XX_USB_AUDIO_CLASS)
2935 request_module("snd-usb-audio"); 2935 request_module("snd-usb-audio");
2936 else if (dev->has_alsa_audio) 2936 else if (dev->usb_audio_type == EM28XX_USB_AUDIO_VENDOR)
2937 request_module("em28xx-alsa"); 2937 request_module("em28xx-alsa");
2938 if (dev->board.has_dvb) 2938 if (dev->board.has_dvb)
2939 request_module("em28xx-dvb"); 2939 request_module("em28xx-dvb");
@@ -3098,16 +3098,6 @@ static int em28xx_init_dev(struct em28xx *dev, struct usb_device *udev,
3098 } 3098 }
3099 } 3099 }
3100 3100
3101 if (dev->chip_id == CHIP_ID_EM2870 ||
3102 dev->chip_id == CHIP_ID_EM2874 ||
3103 dev->chip_id == CHIP_ID_EM28174 ||
3104 dev->chip_id == CHIP_ID_EM28178) {
3105 /* Digital only device - don't load any alsa module */
3106 dev->audio_mode.has_audio = false;
3107 dev->has_audio_class = false;
3108 dev->has_alsa_audio = false;
3109 }
3110
3111 if (chip_name != default_chip_name) 3101 if (chip_name != default_chip_name)
3112 printk(KERN_INFO DRIVER_NAME 3102 printk(KERN_INFO DRIVER_NAME
3113 ": chip ID is %s\n", chip_name); 3103 ": chip ID is %s\n", chip_name);
@@ -3190,7 +3180,7 @@ static int em28xx_usb_probe(struct usb_interface *interface,
3190 struct usb_device *udev; 3180 struct usb_device *udev;
3191 struct em28xx *dev = NULL; 3181 struct em28xx *dev = NULL;
3192 int retval; 3182 int retval;
3193 bool has_audio = false, has_video = false, has_dvb = false; 3183 bool has_vendor_audio = false, has_video = false, has_dvb = false;
3194 int i, nr, try_bulk; 3184 int i, nr, try_bulk;
3195 const int ifnum = interface->altsetting[0].desc.bInterfaceNumber; 3185 const int ifnum = interface->altsetting[0].desc.bInterfaceNumber;
3196 char *speed; 3186 char *speed;
@@ -3272,7 +3262,7 @@ static int em28xx_usb_probe(struct usb_interface *interface,
3272 break; 3262 break;
3273 case 0x83: 3263 case 0x83:
3274 if (usb_endpoint_xfer_isoc(e)) { 3264 if (usb_endpoint_xfer_isoc(e)) {
3275 has_audio = true; 3265 has_vendor_audio = true;
3276 } else { 3266 } else {
3277 printk(KERN_INFO DRIVER_NAME 3267 printk(KERN_INFO DRIVER_NAME
3278 ": error: skipping audio endpoint 0x83, because it uses bulk transfers !\n"); 3268 ": error: skipping audio endpoint 0x83, because it uses bulk transfers !\n");
@@ -3328,7 +3318,7 @@ static int em28xx_usb_probe(struct usb_interface *interface,
3328 } 3318 }
3329 } 3319 }
3330 3320
3331 if (!(has_audio || has_video || has_dvb)) { 3321 if (!(has_vendor_audio || has_video || has_dvb)) {
3332 retval = -ENODEV; 3322 retval = -ENODEV;
3333 goto err_free; 3323 goto err_free;
3334 } 3324 }
@@ -3375,26 +3365,27 @@ static int em28xx_usb_probe(struct usb_interface *interface,
3375 dev->devno = nr; 3365 dev->devno = nr;
3376 dev->model = id->driver_info; 3366 dev->model = id->driver_info;
3377 dev->alt = -1; 3367 dev->alt = -1;
3378 dev->is_audio_only = has_audio && !(has_video || has_dvb); 3368 dev->is_audio_only = has_vendor_audio && !(has_video || has_dvb);
3379 dev->has_alsa_audio = has_audio;
3380 dev->audio_mode.has_audio = has_audio;
3381 dev->has_video = has_video; 3369 dev->has_video = has_video;
3382 dev->ifnum = ifnum; 3370 dev->ifnum = ifnum;
3383 3371
3384 /* Checks if audio is provided by some interface */ 3372 if (has_vendor_audio) {
3373 printk(KERN_INFO DRIVER_NAME ": Audio interface %i found %s\n",
3374 ifnum, "(Vendor Class)");
3375 dev->usb_audio_type = EM28XX_USB_AUDIO_VENDOR;
3376 }
3377 /* Checks if audio is provided by a USB Audio Class interface */
3385 for (i = 0; i < udev->config->desc.bNumInterfaces; i++) { 3378 for (i = 0; i < udev->config->desc.bNumInterfaces; i++) {
3386 struct usb_interface *uif = udev->config->interface[i]; 3379 struct usb_interface *uif = udev->config->interface[i];
3387 if (uif->altsetting[0].desc.bInterfaceClass == USB_CLASS_AUDIO) { 3380 if (uif->altsetting[0].desc.bInterfaceClass == USB_CLASS_AUDIO) {
3388 dev->has_audio_class = 1; 3381 if (has_vendor_audio)
3382 em28xx_err("em28xx: device seems to have vendor AND usb audio class interfaces !\n"
3383 "\t\tThe vendor interface will be ignored. Please contact the developers <linux-media@vger.kernel.org>\n");
3384 dev->usb_audio_type = EM28XX_USB_AUDIO_CLASS;
3389 break; 3385 break;
3390 } 3386 }
3391 } 3387 }
3392 3388
3393 if (has_audio)
3394 printk(KERN_INFO DRIVER_NAME
3395 ": Audio interface %i found %s\n",
3396 ifnum,
3397 dev->has_audio_class ? "(USB Audio Class)" : "(Vendor Class)");
3398 if (has_video) 3389 if (has_video)
3399 printk(KERN_INFO DRIVER_NAME 3390 printk(KERN_INFO DRIVER_NAME
3400 ": Video interface %i found:%s%s\n", 3391 ": Video interface %i found:%s%s\n",
diff --git a/drivers/media/usb/em28xx/em28xx-core.c b/drivers/media/usb/em28xx/em28xx-core.c
index 523d7e92bf47..b5e52fe7957a 100644
--- a/drivers/media/usb/em28xx/em28xx-core.c
+++ b/drivers/media/usb/em28xx/em28xx-core.c
@@ -279,7 +279,7 @@ int em28xx_read_ac97(struct em28xx *dev, u8 reg)
279{ 279{
280 int ret; 280 int ret;
281 u8 addr = (reg & 0x7f) | 0x80; 281 u8 addr = (reg & 0x7f) | 0x80;
282 u16 val; 282 __le16 val;
283 283
284 ret = em28xx_is_ac97_ready(dev); 284 ret = em28xx_is_ac97_ready(dev);
285 if (ret < 0) 285 if (ret < 0)
@@ -433,7 +433,7 @@ int em28xx_audio_analog_set(struct em28xx *dev)
433 int ret, i; 433 int ret, i;
434 u8 xclk; 434 u8 xclk;
435 435
436 if (!dev->audio_mode.has_audio) 436 if (dev->int_audio_type == EM28XX_INT_AUDIO_NONE)
437 return 0; 437 return 0;
438 438
439 /* It is assumed that all devices use master volume for output. 439 /* It is assumed that all devices use master volume for output.
@@ -505,37 +505,48 @@ int em28xx_audio_setup(struct em28xx *dev)
505{ 505{
506 int vid1, vid2, feat, cfg; 506 int vid1, vid2, feat, cfg;
507 u32 vid; 507 u32 vid;
508 u8 i2s_samplerates;
508 509
509 if (!dev->audio_mode.has_audio) 510 if (dev->chip_id == CHIP_ID_EM2870 ||
511 dev->chip_id == CHIP_ID_EM2874 ||
512 dev->chip_id == CHIP_ID_EM28174 ||
513 dev->chip_id == CHIP_ID_EM28178) {
514 /* Digital only device - don't load any alsa module */
515 dev->int_audio_type = EM28XX_INT_AUDIO_NONE;
516 dev->usb_audio_type = EM28XX_USB_AUDIO_NONE;
510 return 0; 517 return 0;
518 }
511 519
512 /* See how this device is configured */ 520 /* See how this device is configured */
513 cfg = em28xx_read_reg(dev, EM28XX_R00_CHIPCFG); 521 cfg = em28xx_read_reg(dev, EM28XX_R00_CHIPCFG);
514 em28xx_info("Config register raw data: 0x%02x\n", cfg); 522 em28xx_info("Config register raw data: 0x%02x\n", cfg);
515 if (cfg < 0) { 523 if (cfg < 0) { /* Register read error */
516 /* Register read error? */ 524 /* Be conservative */
517 cfg = EM28XX_CHIPCFG_AC97; /* Be conservative */ 525 dev->int_audio_type = EM28XX_INT_AUDIO_AC97;
518 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) == 0x00) { 526 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) == 0x00) {
519 /* The device doesn't have vendor audio at all */ 527 /* The device doesn't have vendor audio at all */
520 dev->has_alsa_audio = false; 528 dev->int_audio_type = EM28XX_INT_AUDIO_NONE;
521 dev->audio_mode.has_audio = false; 529 dev->usb_audio_type = EM28XX_USB_AUDIO_NONE;
522 return 0; 530 return 0;
523 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) != EM28XX_CHIPCFG_AC97) { 531 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) != EM28XX_CHIPCFG_AC97) {
532 dev->int_audio_type = EM28XX_INT_AUDIO_I2S;
524 if (dev->chip_id < CHIP_ID_EM2860 && 533 if (dev->chip_id < CHIP_ID_EM2860 &&
525 (cfg & EM28XX_CHIPCFG_AUDIOMASK) == 534 (cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
526 EM2820_CHIPCFG_I2S_1_SAMPRATE) 535 EM2820_CHIPCFG_I2S_1_SAMPRATE)
527 dev->audio_mode.i2s_samplerates = 1; 536 i2s_samplerates = 1;
528 else if (dev->chip_id >= CHIP_ID_EM2860 && 537 else if (dev->chip_id >= CHIP_ID_EM2860 &&
529 (cfg & EM28XX_CHIPCFG_AUDIOMASK) == 538 (cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
530 EM2860_CHIPCFG_I2S_5_SAMPRATES) 539 EM2860_CHIPCFG_I2S_5_SAMPRATES)
531 dev->audio_mode.i2s_samplerates = 5; 540 i2s_samplerates = 5;
532 else 541 else
533 dev->audio_mode.i2s_samplerates = 3; 542 i2s_samplerates = 3;
534 em28xx_info("I2S Audio (%d sample rate(s))\n", 543 em28xx_info("I2S Audio (%d sample rate(s))\n",
535 dev->audio_mode.i2s_samplerates); 544 i2s_samplerates);
536 /* Skip the code that does AC97 vendor detection */ 545 /* Skip the code that does AC97 vendor detection */
537 dev->audio_mode.ac97 = EM28XX_NO_AC97; 546 dev->audio_mode.ac97 = EM28XX_NO_AC97;
538 goto init_audio; 547 goto init_audio;
548 } else {
549 dev->int_audio_type = EM28XX_INT_AUDIO_AC97;
539 } 550 }
540 551
541 dev->audio_mode.ac97 = EM28XX_AC97_OTHER; 552 dev->audio_mode.ac97 = EM28XX_AC97_OTHER;
@@ -549,8 +560,9 @@ int em28xx_audio_setup(struct em28xx *dev)
549 */ 560 */
550 em28xx_warn("AC97 chip type couldn't be determined\n"); 561 em28xx_warn("AC97 chip type couldn't be determined\n");
551 dev->audio_mode.ac97 = EM28XX_NO_AC97; 562 dev->audio_mode.ac97 = EM28XX_NO_AC97;
552 dev->has_alsa_audio = false; 563 if (dev->usb_audio_type == EM28XX_USB_AUDIO_VENDOR)
553 dev->audio_mode.has_audio = false; 564 dev->usb_audio_type = EM28XX_USB_AUDIO_NONE;
565 dev->int_audio_type = EM28XX_INT_AUDIO_NONE;
554 goto init_audio; 566 goto init_audio;
555 } 567 }
556 568
@@ -559,15 +571,12 @@ int em28xx_audio_setup(struct em28xx *dev)
559 goto init_audio; 571 goto init_audio;
560 572
561 vid = vid1 << 16 | vid2; 573 vid = vid1 << 16 | vid2;
562
563 dev->audio_mode.ac97_vendor_id = vid;
564 em28xx_warn("AC97 vendor ID = 0x%08x\n", vid); 574 em28xx_warn("AC97 vendor ID = 0x%08x\n", vid);
565 575
566 feat = em28xx_read_ac97(dev, AC97_RESET); 576 feat = em28xx_read_ac97(dev, AC97_RESET);
567 if (feat < 0) 577 if (feat < 0)
568 goto init_audio; 578 goto init_audio;
569 579
570 dev->audio_mode.ac97_feat = feat;
571 em28xx_warn("AC97 features = 0x%04x\n", feat); 580 em28xx_warn("AC97 features = 0x%04x\n", feat);
572 581
573 /* Try to identify what audio processor we have */ 582 /* Try to identify what audio processor we have */
@@ -586,8 +595,8 @@ init_audio:
586 em28xx_info("Empia 202 AC97 audio processor detected\n"); 595 em28xx_info("Empia 202 AC97 audio processor detected\n");
587 break; 596 break;
588 case EM28XX_AC97_SIGMATEL: 597 case EM28XX_AC97_SIGMATEL:
589 em28xx_info("Sigmatel audio processor detected(stac 97%02x)\n", 598 em28xx_info("Sigmatel audio processor detected (stac 97%02x)\n",
590 dev->audio_mode.ac97_vendor_id & 0xff); 599 vid & 0xff);
591 break; 600 break;
592 case EM28XX_AC97_OTHER: 601 case EM28XX_AC97_OTHER:
593 em28xx_warn("Unknown AC97 audio processor detected!\n"); 602 em28xx_warn("Unknown AC97 audio processor detected!\n");
diff --git a/drivers/media/usb/em28xx/em28xx-dvb.c b/drivers/media/usb/em28xx/em28xx-dvb.c
index 3a3e243edf89..9682c52d67d1 100644
--- a/drivers/media/usb/em28xx/em28xx-dvb.c
+++ b/drivers/media/usb/em28xx/em28xx-dvb.c
@@ -373,7 +373,6 @@ static struct tda18271_config kworld_ub435q_v2_config = {
373}; 373};
374 374
375static struct tda18212_config kworld_ub435q_v3_config = { 375static struct tda18212_config kworld_ub435q_v3_config = {
376 .i2c_address = 0x60,
377 .if_atsc_vsb = 3600, 376 .if_atsc_vsb = 3600,
378 .if_atsc_qam = 3600, 377 .if_atsc_qam = 3600,
379}; 378};
@@ -856,7 +855,9 @@ static const struct m88ds3103_config pctv_461e_m88ds3103_config = {
856 .clock = 27000000, 855 .clock = 27000000,
857 .i2c_wr_max = 33, 856 .i2c_wr_max = 33,
858 .clock_out = 0, 857 .clock_out = 0,
859 .ts_mode = M88DS3103_TS_PARALLEL_16, 858 .ts_mode = M88DS3103_TS_PARALLEL,
859 .ts_clk = 16000,
860 .ts_clk_pol = 1,
860 .agc = 0x99, 861 .agc = 0x99,
861}; 862};
862 863
@@ -1435,6 +1436,15 @@ static int em28xx_dvb_init(struct em28xx *dev)
1435 } 1436 }
1436 break; 1437 break;
1437 case EM2874_BOARD_KWORLD_UB435Q_V3: 1438 case EM2874_BOARD_KWORLD_UB435Q_V3:
1439 {
1440 struct i2c_client *client;
1441 struct i2c_adapter *adapter = &dev->i2c_adap[dev->def_i2c_bus];
1442 struct i2c_board_info board_info = {
1443 .type = "tda18212",
1444 .addr = 0x60,
1445 .platform_data = &kworld_ub435q_v3_config,
1446 };
1447
1438 dvb->fe[0] = dvb_attach(lgdt3305_attach, 1448 dvb->fe[0] = dvb_attach(lgdt3305_attach,
1439 &em2874_lgdt3305_nogate_dev, 1449 &em2874_lgdt3305_nogate_dev,
1440 &dev->i2c_adap[dev->def_i2c_bus]); 1450 &dev->i2c_adap[dev->def_i2c_bus]);
@@ -1443,14 +1453,26 @@ static int em28xx_dvb_init(struct em28xx *dev)
1443 goto out_free; 1453 goto out_free;
1444 } 1454 }
1445 1455
1446 /* Attach the demodulator. */ 1456 /* attach tuner */
1447 if (!dvb_attach(tda18212_attach, dvb->fe[0], 1457 kworld_ub435q_v3_config.fe = dvb->fe[0];
1448 &dev->i2c_adap[dev->def_i2c_bus], 1458 request_module("tda18212");
1449 &kworld_ub435q_v3_config)) { 1459 client = i2c_new_device(adapter, &board_info);
1450 result = -EINVAL; 1460 if (client == NULL || client->dev.driver == NULL) {
1461 dvb_frontend_detach(dvb->fe[0]);
1462 result = -ENODEV;
1451 goto out_free; 1463 goto out_free;
1452 } 1464 }
1465
1466 if (!try_module_get(client->dev.driver->owner)) {
1467 i2c_unregister_device(client);
1468 dvb_frontend_detach(dvb->fe[0]);
1469 result = -ENODEV;
1470 goto out_free;
1471 }
1472
1473 dvb->i2c_client_tuner = client;
1453 break; 1474 break;
1475 }
1454 case EM2874_BOARD_PCTV_HD_MINI_80E: 1476 case EM2874_BOARD_PCTV_HD_MINI_80E:
1455 dvb->fe[0] = dvb_attach(drx39xxj_attach, &dev->i2c_adap[dev->def_i2c_bus]); 1477 dvb->fe[0] = dvb_attach(drx39xxj_attach, &dev->i2c_adap[dev->def_i2c_bus]);
1456 if (dvb->fe[0] != NULL) { 1478 if (dvb->fe[0] != NULL) {
@@ -1533,6 +1555,7 @@ static int em28xx_dvb_init(struct em28xx *dev)
1533 /* attach demod */ 1555 /* attach demod */
1534 si2168_config.i2c_adapter = &adapter; 1556 si2168_config.i2c_adapter = &adapter;
1535 si2168_config.fe = &dvb->fe[0]; 1557 si2168_config.fe = &dvb->fe[0];
1558 si2168_config.ts_mode = SI2168_TS_PARALLEL;
1536 memset(&info, 0, sizeof(struct i2c_board_info)); 1559 memset(&info, 0, sizeof(struct i2c_board_info));
1537 strlcpy(info.type, "si2168", I2C_NAME_SIZE); 1560 strlcpy(info.type, "si2168", I2C_NAME_SIZE);
1538 info.addr = 0x64; 1561 info.addr = 0x64;
diff --git a/drivers/media/usb/em28xx/em28xx-input.c b/drivers/media/usb/em28xx/em28xx-input.c
index ed843bd221ea..581f6dad4ca9 100644
--- a/drivers/media/usb/em28xx/em28xx-input.c
+++ b/drivers/media/usb/em28xx/em28xx-input.c
@@ -71,8 +71,7 @@ struct em28xx_IR {
71 unsigned int last_readcount; 71 unsigned int last_readcount;
72 u64 rc_type; 72 u64 rc_type;
73 73
74 /* i2c slave address of external device (if used) */ 74 struct i2c_client *i2c_client;
75 u16 i2c_dev_addr;
76 75
77 int (*get_key_i2c)(struct i2c_client *ir, enum rc_type *protocol, u32 *scancode); 76 int (*get_key_i2c)(struct i2c_client *ir, enum rc_type *protocol, u32 *scancode);
78 int (*get_key)(struct em28xx_IR *, struct em28xx_ir_poll_result *); 77 int (*get_key)(struct em28xx_IR *, struct em28xx_ir_poll_result *);
@@ -294,16 +293,11 @@ static int em2874_polling_getkey(struct em28xx_IR *ir,
294 293
295static int em28xx_i2c_ir_handle_key(struct em28xx_IR *ir) 294static int em28xx_i2c_ir_handle_key(struct em28xx_IR *ir)
296{ 295{
297 struct em28xx *dev = ir->dev;
298 static u32 scancode; 296 static u32 scancode;
299 enum rc_type protocol; 297 enum rc_type protocol;
300 int rc; 298 int rc;
301 struct i2c_client client;
302
303 client.adapter = &ir->dev->i2c_adap[dev->def_i2c_bus];
304 client.addr = ir->i2c_dev_addr;
305 299
306 rc = ir->get_key_i2c(&client, &protocol, &scancode); 300 rc = ir->get_key_i2c(ir->i2c_client, &protocol, &scancode);
307 if (rc < 0) { 301 if (rc < 0) {
308 dprintk("ir->get_key_i2c() failed: %d\n", rc); 302 dprintk("ir->get_key_i2c() failed: %d\n", rc);
309 return rc; 303 return rc;
@@ -361,7 +355,7 @@ static void em28xx_ir_work(struct work_struct *work)
361{ 355{
362 struct em28xx_IR *ir = container_of(work, struct em28xx_IR, work.work); 356 struct em28xx_IR *ir = container_of(work, struct em28xx_IR, work.work);
363 357
364 if (ir->i2c_dev_addr) /* external i2c device */ 358 if (ir->i2c_client) /* external i2c device */
365 em28xx_i2c_ir_handle_key(ir); 359 em28xx_i2c_ir_handle_key(ir);
366 else /* internal device */ 360 else /* internal device */
367 em28xx_ir_handle_key(ir); 361 em28xx_ir_handle_key(ir);
@@ -609,17 +603,17 @@ static int em28xx_register_snapshot_button(struct em28xx *dev)
609static void em28xx_init_buttons(struct em28xx *dev) 603static void em28xx_init_buttons(struct em28xx *dev)
610{ 604{
611 u8 i = 0, j = 0; 605 u8 i = 0, j = 0;
612 bool addr_new = 0; 606 bool addr_new = false;
613 607
614 dev->button_polling_interval = EM28XX_BUTTONS_DEBOUNCED_QUERY_INTERVAL; 608 dev->button_polling_interval = EM28XX_BUTTONS_DEBOUNCED_QUERY_INTERVAL;
615 while (dev->board.buttons[i].role >= 0 && 609 while (dev->board.buttons[i].role >= 0 &&
616 dev->board.buttons[i].role < EM28XX_NUM_BUTTON_ROLES) { 610 dev->board.buttons[i].role < EM28XX_NUM_BUTTON_ROLES) {
617 struct em28xx_button *button = &dev->board.buttons[i]; 611 struct em28xx_button *button = &dev->board.buttons[i];
618 /* Check if polling address is already on the list */ 612 /* Check if polling address is already on the list */
619 addr_new = 1; 613 addr_new = true;
620 for (j = 0; j < dev->num_button_polling_addresses; j++) { 614 for (j = 0; j < dev->num_button_polling_addresses; j++) {
621 if (button->reg_r == dev->button_polling_addresses[j]) { 615 if (button->reg_r == dev->button_polling_addresses[j]) {
622 addr_new = 0; 616 addr_new = false;
623 break; 617 break;
624 } 618 }
625 } 619 }
@@ -756,7 +750,13 @@ static int em28xx_ir_init(struct em28xx *dev)
756 goto error; 750 goto error;
757 } 751 }
758 752
759 ir->i2c_dev_addr = i2c_rc_dev_addr; 753 ir->i2c_client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
754 if (!ir->i2c_client)
755 goto error;
756 ir->i2c_client->adapter = &ir->dev->i2c_adap[dev->def_i2c_bus];
757 ir->i2c_client->addr = i2c_rc_dev_addr;
758 ir->i2c_client->flags = 0;
759 /* NOTE: all other fields of i2c_client are unused */
760 } else { /* internal device */ 760 } else { /* internal device */
761 switch (dev->chip_id) { 761 switch (dev->chip_id) {
762 case CHIP_ID_EM2860: 762 case CHIP_ID_EM2860:
@@ -815,6 +815,7 @@ static int em28xx_ir_init(struct em28xx *dev)
815 return 0; 815 return 0;
816 816
817error: 817error:
818 kfree(ir->i2c_client);
818 dev->ir = NULL; 819 dev->ir = NULL;
819 rc_free_device(rc); 820 rc_free_device(rc);
820 kfree(ir); 821 kfree(ir);
@@ -841,6 +842,8 @@ static int em28xx_ir_fini(struct em28xx *dev)
841 if (ir->rc) 842 if (ir->rc)
842 rc_unregister_device(ir->rc); 843 rc_unregister_device(ir->rc);
843 844
845 kfree(ir->i2c_client);
846
844 /* done */ 847 /* done */
845 kfree(ir); 848 kfree(ir);
846 dev->ir = NULL; 849 dev->ir = NULL;
diff --git a/drivers/media/usb/em28xx/em28xx-vbi.c b/drivers/media/usb/em28xx/em28xx-vbi.c
index 6d7f657f6f55..34ee1e03a732 100644
--- a/drivers/media/usb/em28xx/em28xx-vbi.c
+++ b/drivers/media/usb/em28xx/em28xx-vbi.c
@@ -29,17 +29,6 @@
29#include "em28xx.h" 29#include "em28xx.h"
30#include "em28xx-v4l.h" 30#include "em28xx-v4l.h"
31 31
32static unsigned int vbibufs = 5;
33module_param(vbibufs, int, 0644);
34MODULE_PARM_DESC(vbibufs, "number of vbi buffers, range 2-32");
35
36static unsigned int vbi_debug;
37module_param(vbi_debug, int, 0644);
38MODULE_PARM_DESC(vbi_debug, "enable debug messages [vbi]");
39
40#define dprintk(level, fmt, arg...) if (vbi_debug >= level) \
41 printk(KERN_DEBUG "%s: " fmt, dev->core->name , ## arg)
42
43/* ------------------------------------------------------------------ */ 32/* ------------------------------------------------------------------ */
44 33
45static int vbi_queue_setup(struct vb2_queue *vq, const struct v4l2_format *fmt, 34static int vbi_queue_setup(struct vb2_queue *vq, const struct v4l2_format *fmt,
diff --git a/drivers/media/usb/em28xx/em28xx-video.c b/drivers/media/usb/em28xx/em28xx-video.c
index 29abc379551e..03d5ece0319c 100644
--- a/drivers/media/usb/em28xx/em28xx-video.c
+++ b/drivers/media/usb/em28xx/em28xx-video.c
@@ -435,7 +435,10 @@ static inline void finish_buffer(struct em28xx *dev,
435 em28xx_isocdbg("[%p/%d] wakeup\n", buf, buf->top_field); 435 em28xx_isocdbg("[%p/%d] wakeup\n", buf, buf->top_field);
436 436
437 buf->vb.v4l2_buf.sequence = dev->v4l2->field_count++; 437 buf->vb.v4l2_buf.sequence = dev->v4l2->field_count++;
438 buf->vb.v4l2_buf.field = V4L2_FIELD_INTERLACED; 438 if (dev->v4l2->progressive)
439 buf->vb.v4l2_buf.field = V4L2_FIELD_NONE;
440 else
441 buf->vb.v4l2_buf.field = V4L2_FIELD_INTERLACED;
439 v4l2_get_timestamp(&buf->vb.v4l2_buf.timestamp); 442 v4l2_get_timestamp(&buf->vb.v4l2_buf.timestamp);
440 443
441 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_DONE); 444 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_DONE);
@@ -478,7 +481,7 @@ static void em28xx_copy_video(struct em28xx *dev,
478 lencopy = lencopy > remain ? remain : lencopy; 481 lencopy = lencopy > remain ? remain : lencopy;
479 482
480 if ((char *)startwrite + lencopy > (char *)buf->vb_buf + buf->length) { 483 if ((char *)startwrite + lencopy > (char *)buf->vb_buf + buf->length) {
481 em28xx_isocdbg("Overflow of %zi bytes past buffer end (1)\n", 484 em28xx_isocdbg("Overflow of %zu bytes past buffer end (1)\n",
482 ((char *)startwrite + lencopy) - 485 ((char *)startwrite + lencopy) -
483 ((char *)buf->vb_buf + buf->length)); 486 ((char *)buf->vb_buf + buf->length));
484 remain = (char *)buf->vb_buf + buf->length - 487 remain = (char *)buf->vb_buf + buf->length -
@@ -504,7 +507,7 @@ static void em28xx_copy_video(struct em28xx *dev,
504 507
505 if ((char *)startwrite + lencopy > (char *)buf->vb_buf + 508 if ((char *)startwrite + lencopy > (char *)buf->vb_buf +
506 buf->length) { 509 buf->length) {
507 em28xx_isocdbg("Overflow of %zi bytes past buffer end" 510 em28xx_isocdbg("Overflow of %zu bytes past buffer end"
508 "(2)\n", 511 "(2)\n",
509 ((char *)startwrite + lencopy) - 512 ((char *)startwrite + lencopy) -
510 ((char *)buf->vb_buf + buf->length)); 513 ((char *)buf->vb_buf + buf->length));
@@ -718,7 +721,7 @@ static inline void process_frame_data_em25xx(struct em28xx *dev,
718 struct em28xx_buffer *buf = dev->usb_ctl.vid_buf; 721 struct em28xx_buffer *buf = dev->usb_ctl.vid_buf;
719 struct em28xx_dmaqueue *dmaq = &dev->vidq; 722 struct em28xx_dmaqueue *dmaq = &dev->vidq;
720 struct em28xx_v4l2 *v4l2 = dev->v4l2; 723 struct em28xx_v4l2 *v4l2 = dev->v4l2;
721 bool frame_end = 0; 724 bool frame_end = false;
722 725
723 /* Check for header */ 726 /* Check for header */
724 /* NOTE: at least with bulk transfers, only the first packet 727 /* NOTE: at least with bulk transfers, only the first packet
@@ -994,13 +997,16 @@ static void em28xx_stop_streaming(struct vb2_queue *vq)
994 } 997 }
995 998
996 spin_lock_irqsave(&dev->slock, flags); 999 spin_lock_irqsave(&dev->slock, flags);
1000 if (dev->usb_ctl.vid_buf != NULL) {
1001 vb2_buffer_done(&dev->usb_ctl.vid_buf->vb, VB2_BUF_STATE_ERROR);
1002 dev->usb_ctl.vid_buf = NULL;
1003 }
997 while (!list_empty(&vidq->active)) { 1004 while (!list_empty(&vidq->active)) {
998 struct em28xx_buffer *buf; 1005 struct em28xx_buffer *buf;
999 buf = list_entry(vidq->active.next, struct em28xx_buffer, list); 1006 buf = list_entry(vidq->active.next, struct em28xx_buffer, list);
1000 list_del(&buf->list); 1007 list_del(&buf->list);
1001 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR); 1008 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
1002 } 1009 }
1003 dev->usb_ctl.vid_buf = NULL;
1004 spin_unlock_irqrestore(&dev->slock, flags); 1010 spin_unlock_irqrestore(&dev->slock, flags);
1005} 1011}
1006 1012
@@ -1021,13 +1027,16 @@ void em28xx_stop_vbi_streaming(struct vb2_queue *vq)
1021 } 1027 }
1022 1028
1023 spin_lock_irqsave(&dev->slock, flags); 1029 spin_lock_irqsave(&dev->slock, flags);
1030 if (dev->usb_ctl.vbi_buf != NULL) {
1031 vb2_buffer_done(&dev->usb_ctl.vbi_buf->vb, VB2_BUF_STATE_ERROR);
1032 dev->usb_ctl.vbi_buf = NULL;
1033 }
1024 while (!list_empty(&vbiq->active)) { 1034 while (!list_empty(&vbiq->active)) {
1025 struct em28xx_buffer *buf; 1035 struct em28xx_buffer *buf;
1026 buf = list_entry(vbiq->active.next, struct em28xx_buffer, list); 1036 buf = list_entry(vbiq->active.next, struct em28xx_buffer, list);
1027 list_del(&buf->list); 1037 list_del(&buf->list);
1028 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR); 1038 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
1029 } 1039 }
1030 dev->usb_ctl.vbi_buf = NULL;
1031 spin_unlock_irqrestore(&dev->slock, flags); 1040 spin_unlock_irqrestore(&dev->slock, flags);
1032} 1041}
1033 1042
@@ -1711,7 +1720,7 @@ static int vidioc_querycap(struct file *file, void *priv,
1711 else 1720 else
1712 cap->device_caps = V4L2_CAP_READWRITE | V4L2_CAP_VBI_CAPTURE; 1721 cap->device_caps = V4L2_CAP_READWRITE | V4L2_CAP_VBI_CAPTURE;
1713 1722
1714 if (dev->audio_mode.has_audio) 1723 if (dev->int_audio_type != EM28XX_INT_AUDIO_NONE)
1715 cap->device_caps |= V4L2_CAP_AUDIO; 1724 cap->device_caps |= V4L2_CAP_AUDIO;
1716 1725
1717 if (dev->tuner_type != TUNER_ABSENT) 1726 if (dev->tuner_type != TUNER_ABSENT)
@@ -2296,7 +2305,7 @@ static int em28xx_v4l2_init(struct em28xx *dev)
2296 v4l2->v4l2_dev.ctrl_handler = hdl; 2305 v4l2->v4l2_dev.ctrl_handler = hdl;
2297 2306
2298 if (dev->board.is_webcam) 2307 if (dev->board.is_webcam)
2299 v4l2->progressive = 1; 2308 v4l2->progressive = true;
2300 2309
2301 /* 2310 /*
2302 * Default format, used for tvp5150 or saa711x output formats 2311 * Default format, used for tvp5150 or saa711x output formats
@@ -2502,7 +2511,7 @@ static int em28xx_v4l2_init(struct em28xx *dev)
2502 v4l2_disable_ioctl(v4l2->vdev, VIDIOC_G_FREQUENCY); 2511 v4l2_disable_ioctl(v4l2->vdev, VIDIOC_G_FREQUENCY);
2503 v4l2_disable_ioctl(v4l2->vdev, VIDIOC_S_FREQUENCY); 2512 v4l2_disable_ioctl(v4l2->vdev, VIDIOC_S_FREQUENCY);
2504 } 2513 }
2505 if (!dev->audio_mode.has_audio) { 2514 if (dev->int_audio_type == EM28XX_INT_AUDIO_NONE) {
2506 v4l2_disable_ioctl(v4l2->vdev, VIDIOC_G_AUDIO); 2515 v4l2_disable_ioctl(v4l2->vdev, VIDIOC_G_AUDIO);
2507 v4l2_disable_ioctl(v4l2->vdev, VIDIOC_S_AUDIO); 2516 v4l2_disable_ioctl(v4l2->vdev, VIDIOC_S_AUDIO);
2508 } 2517 }
@@ -2532,7 +2541,7 @@ static int em28xx_v4l2_init(struct em28xx *dev)
2532 v4l2_disable_ioctl(v4l2->vbi_dev, VIDIOC_G_FREQUENCY); 2541 v4l2_disable_ioctl(v4l2->vbi_dev, VIDIOC_G_FREQUENCY);
2533 v4l2_disable_ioctl(v4l2->vbi_dev, VIDIOC_S_FREQUENCY); 2542 v4l2_disable_ioctl(v4l2->vbi_dev, VIDIOC_S_FREQUENCY);
2534 } 2543 }
2535 if (!dev->audio_mode.has_audio) { 2544 if (dev->int_audio_type == EM28XX_INT_AUDIO_NONE) {
2536 v4l2_disable_ioctl(v4l2->vbi_dev, VIDIOC_G_AUDIO); 2545 v4l2_disable_ioctl(v4l2->vbi_dev, VIDIOC_G_AUDIO);
2537 v4l2_disable_ioctl(v4l2->vbi_dev, VIDIOC_S_AUDIO); 2546 v4l2_disable_ioctl(v4l2->vbi_dev, VIDIOC_S_AUDIO);
2538 } 2547 }
diff --git a/drivers/media/usb/em28xx/em28xx.h b/drivers/media/usb/em28xx/em28xx.h
index 4360338e7b31..a21a7463b557 100644
--- a/drivers/media/usb/em28xx/em28xx.h
+++ b/drivers/media/usb/em28xx/em28xx.h
@@ -309,13 +309,18 @@ enum em28xx_ac97_mode {
309 309
310struct em28xx_audio_mode { 310struct em28xx_audio_mode {
311 enum em28xx_ac97_mode ac97; 311 enum em28xx_ac97_mode ac97;
312};
312 313
313 u16 ac97_feat; 314enum em28xx_int_audio_type {
314 u32 ac97_vendor_id; 315 EM28XX_INT_AUDIO_NONE = 0,
315 316 EM28XX_INT_AUDIO_AC97,
316 unsigned int has_audio:1; 317 EM28XX_INT_AUDIO_I2S,
318};
317 319
318 u8 i2s_samplerates; 320enum em28xx_usb_audio_type {
321 EM28XX_USB_AUDIO_NONE = 0,
322 EM28XX_USB_AUDIO_CLASS,
323 EM28XX_USB_AUDIO_VENDOR,
319}; 324};
320 325
321/* em28xx has two audio inputs: tuner and line in. 326/* em28xx has two audio inputs: tuner and line in.
@@ -608,9 +613,9 @@ struct em28xx {
608 unsigned int is_em25xx:1; /* em25xx/em276x/7x/8x family bridge */ 613 unsigned int is_em25xx:1; /* em25xx/em276x/7x/8x family bridge */
609 unsigned char disconnected:1; /* device has been diconnected */ 614 unsigned char disconnected:1; /* device has been diconnected */
610 unsigned int has_video:1; 615 unsigned int has_video:1;
611 unsigned int has_audio_class:1;
612 unsigned int has_alsa_audio:1;
613 unsigned int is_audio_only:1; 616 unsigned int is_audio_only:1;
617 enum em28xx_int_audio_type int_audio_type;
618 enum em28xx_usb_audio_type usb_audio_type;
614 619
615 struct em28xx_board board; 620 struct em28xx_board board;
616 621
diff --git a/drivers/media/usb/go7007/go7007-usb.c b/drivers/media/usb/go7007/go7007-usb.c
index ece27ece8115..3f986e1178ce 100644
--- a/drivers/media/usb/go7007/go7007-usb.c
+++ b/drivers/media/usb/go7007/go7007-usb.c
@@ -696,7 +696,7 @@ static int go7007_usb_ezusb_write_interrupt(struct go7007 *go,
696 sizeof(status_reg), timeout); 696 sizeof(status_reg), timeout);
697 if (r < 0) 697 if (r < 0)
698 break; 698 break;
699 status_reg = le16_to_cpu(*((u16 *)go->usb_buf)); 699 status_reg = le16_to_cpu(*((__le16 *)go->usb_buf));
700 if (!(status_reg & 0x0010)) 700 if (!(status_reg & 0x0010))
701 break; 701 break;
702 msleep(10); 702 msleep(10);
@@ -751,7 +751,7 @@ static int go7007_usb_onboard_write_interrupt(struct go7007 *go,
751static void go7007_usb_readinterrupt_complete(struct urb *urb) 751static void go7007_usb_readinterrupt_complete(struct urb *urb)
752{ 752{
753 struct go7007 *go = (struct go7007 *)urb->context; 753 struct go7007 *go = (struct go7007 *)urb->context;
754 u16 *regs = (u16 *)urb->transfer_buffer; 754 __le16 *regs = (__le16 *)urb->transfer_buffer;
755 int status = urb->status; 755 int status = urb->status;
756 756
757 if (status) { 757 if (status) {
diff --git a/drivers/media/usb/gspca/gspca.c b/drivers/media/usb/gspca/gspca.c
index e8cf23c91cef..43d65057a5fe 100644
--- a/drivers/media/usb/gspca/gspca.c
+++ b/drivers/media/usb/gspca/gspca.c
@@ -876,9 +876,8 @@ static int gspca_init_transfer(struct gspca_dev *gspca_dev)
876 ep_tb[0].alt = gspca_dev->alt; 876 ep_tb[0].alt = gspca_dev->alt;
877 alt_idx = 1; 877 alt_idx = 1;
878 } else { 878 } else {
879 879 /* else, compute the minimum bandwidth
880 /* else, compute the minimum bandwidth 880 * and build the endpoint table */
881 * and build the endpoint table */
882 alt_idx = build_isoc_ep_tb(gspca_dev, intf, ep_tb); 881 alt_idx = build_isoc_ep_tb(gspca_dev, intf, ep_tb);
883 if (alt_idx <= 0) { 882 if (alt_idx <= 0) {
884 pr_err("no transfer endpoint found\n"); 883 pr_err("no transfer endpoint found\n");
diff --git a/drivers/media/usb/gspca/gspca.h b/drivers/media/usb/gspca/gspca.h
index f06253cd7469..d39adf90303b 100644
--- a/drivers/media/usb/gspca/gspca.h
+++ b/drivers/media/usb/gspca/gspca.h
@@ -235,6 +235,6 @@ int gspca_resume(struct usb_interface *intf);
235int gspca_expo_autogain(struct gspca_dev *gspca_dev, int avg_lum, 235int gspca_expo_autogain(struct gspca_dev *gspca_dev, int avg_lum,
236 int desired_avg_lum, int deadzone, int gain_knee, int exposure_knee); 236 int desired_avg_lum, int deadzone, int gain_knee, int exposure_knee);
237int gspca_coarse_grained_expo_autogain(struct gspca_dev *gspca_dev, 237int gspca_coarse_grained_expo_autogain(struct gspca_dev *gspca_dev,
238 int avg_lum, int desired_avg_lum, int deadzone); 238 int avg_lum, int desired_avg_lum, int deadzone);
239 239
240#endif /* GSPCAV2_H */ 240#endif /* GSPCAV2_H */
diff --git a/drivers/media/usb/gspca/kinect.c b/drivers/media/usb/gspca/kinect.c
index 45bc1f51c5d8..3cb30a37d6ac 100644
--- a/drivers/media/usb/gspca/kinect.c
+++ b/drivers/media/usb/gspca/kinect.c
@@ -51,9 +51,9 @@ struct pkt_hdr {
51 51
52struct cam_hdr { 52struct cam_hdr {
53 uint8_t magic[2]; 53 uint8_t magic[2];
54 uint16_t len; 54 __le16 len;
55 uint16_t cmd; 55 __le16 cmd;
56 uint16_t tag; 56 __le16 tag;
57}; 57};
58 58
59/* specific webcam descriptor */ 59/* specific webcam descriptor */
@@ -188,9 +188,9 @@ static int send_cmd(struct gspca_dev *gspca_dev, uint16_t cmd, void *cmdbuf,
188 rhdr->tag, chdr->tag); 188 rhdr->tag, chdr->tag);
189 return -1; 189 return -1;
190 } 190 }
191 if (cpu_to_le16(rhdr->len) != (actual_len/2)) { 191 if (le16_to_cpu(rhdr->len) != (actual_len/2)) {
192 pr_err("send_cmd: Bad len %04x != %04x\n", 192 pr_err("send_cmd: Bad len %04x != %04x\n",
193 cpu_to_le16(rhdr->len), (int)(actual_len/2)); 193 le16_to_cpu(rhdr->len), (int)(actual_len/2));
194 return -1; 194 return -1;
195 } 195 }
196 196
@@ -211,7 +211,7 @@ static int write_register(struct gspca_dev *gspca_dev, uint16_t reg,
211 uint16_t data) 211 uint16_t data)
212{ 212{
213 uint16_t reply[2]; 213 uint16_t reply[2];
214 uint16_t cmd[2]; 214 __le16 cmd[2];
215 int res; 215 int res;
216 216
217 cmd[0] = cpu_to_le16(reg); 217 cmd[0] = cpu_to_le16(reg);
diff --git a/drivers/media/usb/gspca/sn9c20x.c b/drivers/media/usb/gspca/sn9c20x.c
index 41a9a892f79c..d0ee899584a9 100644
--- a/drivers/media/usb/gspca/sn9c20x.c
+++ b/drivers/media/usb/gspca/sn9c20x.c
@@ -1297,7 +1297,7 @@ static void set_cmatrix(struct gspca_dev *gspca_dev,
1297 s32 hue_coord, hue_index = 180 + hue; 1297 s32 hue_coord, hue_index = 180 + hue;
1298 u8 cmatrix[21]; 1298 u8 cmatrix[21];
1299 1299
1300 memset(cmatrix, 0, sizeof cmatrix); 1300 memset(cmatrix, 0, sizeof(cmatrix));
1301 cmatrix[2] = (contrast * 0x25 / 0x100) + 0x26; 1301 cmatrix[2] = (contrast * 0x25 / 0x100) + 0x26;
1302 cmatrix[0] = 0x13 + (cmatrix[2] - 0x26) * 0x13 / 0x25; 1302 cmatrix[0] = 0x13 + (cmatrix[2] - 0x26) * 0x13 / 0x25;
1303 cmatrix[4] = 0x07 + (cmatrix[2] - 0x26) * 0x07 / 0x25; 1303 cmatrix[4] = 0x07 + (cmatrix[2] - 0x26) * 0x07 / 0x25;
@@ -1787,8 +1787,9 @@ static int sd_init(struct gspca_dev *gspca_dev)
1787 struct sd *sd = (struct sd *) gspca_dev; 1787 struct sd *sd = (struct sd *) gspca_dev;
1788 int i; 1788 int i;
1789 u8 value; 1789 u8 value;
1790 u8 i2c_init[9] = 1790 u8 i2c_init[9] = {
1791 {0x80, sd->i2c_addr, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03}; 1791 0x80, sd->i2c_addr, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03
1792 };
1792 1793
1793 for (i = 0; i < ARRAY_SIZE(bridge_init); i++) { 1794 for (i = 0; i < ARRAY_SIZE(bridge_init); i++) {
1794 value = bridge_init[i][1]; 1795 value = bridge_init[i][1];
@@ -2242,8 +2243,9 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev,
2242{ 2243{
2243 struct sd *sd = (struct sd *) gspca_dev; 2244 struct sd *sd = (struct sd *) gspca_dev;
2244 int avg_lum, is_jpeg; 2245 int avg_lum, is_jpeg;
2245 static const u8 frame_header[] = 2246 static const u8 frame_header[] = {
2246 {0xff, 0xff, 0x00, 0xc4, 0xc4, 0x96}; 2247 0xff, 0xff, 0x00, 0xc4, 0xc4, 0x96
2248 };
2247 2249
2248 is_jpeg = (sd->fmt & 0x03) == 0; 2250 is_jpeg = (sd->fmt & 0x03) == 0;
2249 if (len >= 64 && memcmp(data, frame_header, 6) == 0) { 2251 if (len >= 64 && memcmp(data, frame_header, 6) == 0) {
diff --git a/drivers/media/usb/hackrf/Kconfig b/drivers/media/usb/hackrf/Kconfig
new file mode 100644
index 000000000000..937e6f5c1e8e
--- /dev/null
+++ b/drivers/media/usb/hackrf/Kconfig
@@ -0,0 +1,10 @@
1config USB_HACKRF
2 tristate "HackRF"
3 depends on VIDEO_V4L2
4 select VIDEOBUF2_VMALLOC
5 ---help---
6 This is a video4linux2 driver for HackRF SDR device.
7
8 To compile this driver as a module, choose M here: the
9 module will be called hackrf
10
diff --git a/drivers/media/usb/hackrf/Makefile b/drivers/media/usb/hackrf/Makefile
new file mode 100644
index 000000000000..73064a24cd4e
--- /dev/null
+++ b/drivers/media/usb/hackrf/Makefile
@@ -0,0 +1 @@
obj-$(CONFIG_USB_HACKRF) += hackrf.o
diff --git a/drivers/media/usb/hackrf/hackrf.c b/drivers/media/usb/hackrf/hackrf.c
new file mode 100644
index 000000000000..328b5ba47a0a
--- /dev/null
+++ b/drivers/media/usb/hackrf/hackrf.c
@@ -0,0 +1,1142 @@
1/*
2 * HackRF driver
3 *
4 * Copyright (C) 2014 Antti Palosaari <crope@iki.fi>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include <linux/module.h>
18#include <linux/slab.h>
19#include <linux/usb.h>
20#include <media/v4l2-device.h>
21#include <media/v4l2-ioctl.h>
22#include <media/v4l2-ctrls.h>
23#include <media/v4l2-event.h>
24#include <media/videobuf2-vmalloc.h>
25
26/* HackRF USB API commands (from HackRF Library) */
27enum {
28 CMD_SET_TRANSCEIVER_MODE = 0x01,
29 CMD_SAMPLE_RATE_SET = 0x06,
30 CMD_BASEBAND_FILTER_BANDWIDTH_SET = 0x07,
31 CMD_BOARD_ID_READ = 0x0e,
32 CMD_VERSION_STRING_READ = 0x0f,
33 CMD_SET_FREQ = 0x10,
34 CMD_SET_LNA_GAIN = 0x13,
35 CMD_SET_VGA_GAIN = 0x14,
36};
37
38/*
39 * bEndpointAddress 0x81 EP 1 IN
40 * Transfer Type Bulk
41 * wMaxPacketSize 0x0200 1x 512 bytes
42 */
43#define MAX_BULK_BUFS (6)
44#define BULK_BUFFER_SIZE (128 * 512)
45
46static const struct v4l2_frequency_band bands_adc[] = {
47 {
48 .tuner = 0,
49 .type = V4L2_TUNER_ADC,
50 .index = 0,
51 .capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
52 .rangelow = 200000,
53 .rangehigh = 24000000,
54 },
55};
56
57static const struct v4l2_frequency_band bands_rf[] = {
58 {
59 .tuner = 1,
60 .type = V4L2_TUNER_RF,
61 .index = 0,
62 .capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
63 .rangelow = 1,
64 .rangehigh = 4294967294LL, /* max u32, hw goes over 7GHz */
65 },
66};
67
68/* stream formats */
69struct hackrf_format {
70 char *name;
71 u32 pixelformat;
72 u32 buffersize;
73};
74
75/* format descriptions for capture and preview */
76static struct hackrf_format formats[] = {
77 {
78 .name = "Complex S8",
79 .pixelformat = V4L2_SDR_FMT_CS8,
80 .buffersize = BULK_BUFFER_SIZE,
81 },
82};
83
84static const unsigned int NUM_FORMATS = ARRAY_SIZE(formats);
85
86/* intermediate buffers with raw data from the USB device */
87struct hackrf_frame_buf {
88 struct vb2_buffer vb; /* common v4l buffer stuff -- must be first */
89 struct list_head list;
90};
91
92struct hackrf_dev {
93#define POWER_ON (1 << 1)
94#define URB_BUF (1 << 2)
95#define USB_STATE_URB_BUF (1 << 3)
96 unsigned long flags;
97
98 struct device *dev;
99 struct usb_device *udev;
100 struct video_device vdev;
101 struct v4l2_device v4l2_dev;
102
103 /* videobuf2 queue and queued buffers list */
104 struct vb2_queue vb_queue;
105 struct list_head queued_bufs;
106 spinlock_t queued_bufs_lock; /* Protects queued_bufs */
107 unsigned sequence; /* Buffer sequence counter */
108 unsigned int vb_full; /* vb is full and packets dropped */
109
110 /* Note if taking both locks v4l2_lock must always be locked first! */
111 struct mutex v4l2_lock; /* Protects everything else */
112 struct mutex vb_queue_lock; /* Protects vb_queue */
113
114 struct urb *urb_list[MAX_BULK_BUFS];
115 int buf_num;
116 unsigned long buf_size;
117 u8 *buf_list[MAX_BULK_BUFS];
118 dma_addr_t dma_addr[MAX_BULK_BUFS];
119 int urbs_initialized;
120 int urbs_submitted;
121
122 /* USB control message buffer */
123 #define BUF_SIZE 24
124 u8 buf[BUF_SIZE];
125
126 /* Current configuration */
127 unsigned int f_adc;
128 unsigned int f_rf;
129 u32 pixelformat;
130 u32 buffersize;
131
132 /* Controls */
133 struct v4l2_ctrl_handler hdl;
134 struct v4l2_ctrl *bandwidth_auto;
135 struct v4l2_ctrl *bandwidth;
136 struct v4l2_ctrl *lna_gain;
137 struct v4l2_ctrl *if_gain;
138
139 /* Sample rate calc */
140 unsigned long jiffies_next;
141 unsigned int sample;
142 unsigned int sample_measured;
143};
144
145#define hackrf_dbg_usb_control_msg(_dev, _r, _t, _v, _i, _b, _l) { \
146 char *_direction; \
147 if (_t & USB_DIR_IN) \
148 _direction = "<<<"; \
149 else \
150 _direction = ">>>"; \
151 dev_dbg(_dev, "%02x %02x %02x %02x %02x %02x %02x %02x %s %*ph\n", \
152 _t, _r, _v & 0xff, _v >> 8, _i & 0xff, \
153 _i >> 8, _l & 0xff, _l >> 8, _direction, _l, _b); \
154}
155
156/* execute firmware command */
157static int hackrf_ctrl_msg(struct hackrf_dev *dev, u8 request, u16 value,
158 u16 index, u8 *data, u16 size)
159{
160 int ret;
161 unsigned int pipe;
162 u8 requesttype;
163
164 switch (request) {
165 case CMD_SET_TRANSCEIVER_MODE:
166 case CMD_SET_FREQ:
167 case CMD_SAMPLE_RATE_SET:
168 case CMD_BASEBAND_FILTER_BANDWIDTH_SET:
169 pipe = usb_sndctrlpipe(dev->udev, 0);
170 requesttype = (USB_TYPE_VENDOR | USB_DIR_OUT);
171 break;
172 case CMD_BOARD_ID_READ:
173 case CMD_VERSION_STRING_READ:
174 case CMD_SET_LNA_GAIN:
175 case CMD_SET_VGA_GAIN:
176 pipe = usb_rcvctrlpipe(dev->udev, 0);
177 requesttype = (USB_TYPE_VENDOR | USB_DIR_IN);
178 break;
179 default:
180 dev_err(dev->dev, "Unknown command %02x\n", request);
181 ret = -EINVAL;
182 goto err;
183 }
184
185 /* write request */
186 if (!(requesttype & USB_DIR_IN))
187 memcpy(dev->buf, data, size);
188
189 ret = usb_control_msg(dev->udev, pipe, request, requesttype, value,
190 index, dev->buf, size, 1000);
191 hackrf_dbg_usb_control_msg(dev->dev, request, requesttype, value,
192 index, dev->buf, size);
193 if (ret < 0) {
194 dev_err(dev->dev, "usb_control_msg() failed %d request %02x\n",
195 ret, request);
196 goto err;
197 }
198
199 /* read request */
200 if (requesttype & USB_DIR_IN)
201 memcpy(data, dev->buf, size);
202
203 return 0;
204err:
205 return ret;
206}
207
208/* Private functions */
209static struct hackrf_frame_buf *hackrf_get_next_fill_buf(struct hackrf_dev *dev)
210{
211 unsigned long flags;
212 struct hackrf_frame_buf *buf = NULL;
213
214 spin_lock_irqsave(&dev->queued_bufs_lock, flags);
215 if (list_empty(&dev->queued_bufs))
216 goto leave;
217
218 buf = list_entry(dev->queued_bufs.next, struct hackrf_frame_buf, list);
219 list_del(&buf->list);
220leave:
221 spin_unlock_irqrestore(&dev->queued_bufs_lock, flags);
222 return buf;
223}
224
225static unsigned int hackrf_convert_stream(struct hackrf_dev *dev,
226 void *dst, void *src, unsigned int src_len)
227{
228 memcpy(dst, src, src_len);
229
230 /* calculate sample rate and output it in 10 seconds intervals */
231 if (unlikely(time_is_before_jiffies(dev->jiffies_next))) {
232 #define MSECS 10000UL
233 unsigned int msecs = jiffies_to_msecs(jiffies -
234 dev->jiffies_next + msecs_to_jiffies(MSECS));
235 unsigned int samples = dev->sample - dev->sample_measured;
236
237 dev->jiffies_next = jiffies + msecs_to_jiffies(MSECS);
238 dev->sample_measured = dev->sample;
239 dev_dbg(dev->dev, "slen=%u samples=%u msecs=%u sample rate=%lu\n",
240 src_len, samples, msecs,
241 samples * 1000UL / msecs);
242 }
243
244 /* total number of samples */
245 dev->sample += src_len / 2;
246
247 return src_len;
248}
249
250/*
251 * This gets called for the bulk stream pipe. This is done in interrupt
252 * time, so it has to be fast, not crash, and not stall. Neat.
253 */
254static void hackrf_urb_complete(struct urb *urb)
255{
256 struct hackrf_dev *dev = urb->context;
257 struct hackrf_frame_buf *fbuf;
258
259 dev_dbg_ratelimited(dev->dev, "status=%d length=%d/%d errors=%d\n",
260 urb->status, urb->actual_length,
261 urb->transfer_buffer_length, urb->error_count);
262
263 switch (urb->status) {
264 case 0: /* success */
265 case -ETIMEDOUT: /* NAK */
266 break;
267 case -ECONNRESET: /* kill */
268 case -ENOENT:
269 case -ESHUTDOWN:
270 return;
271 default: /* error */
272 dev_err_ratelimited(dev->dev, "URB failed %d\n", urb->status);
273 break;
274 }
275
276 if (likely(urb->actual_length > 0)) {
277 void *ptr;
278 unsigned int len;
279 /* get free framebuffer */
280 fbuf = hackrf_get_next_fill_buf(dev);
281 if (unlikely(fbuf == NULL)) {
282 dev->vb_full++;
283 dev_notice_ratelimited(dev->dev,
284 "videobuf is full, %d packets dropped\n",
285 dev->vb_full);
286 goto skip;
287 }
288
289 /* fill framebuffer */
290 ptr = vb2_plane_vaddr(&fbuf->vb, 0);
291 len = hackrf_convert_stream(dev, ptr, urb->transfer_buffer,
292 urb->actual_length);
293 vb2_set_plane_payload(&fbuf->vb, 0, len);
294 v4l2_get_timestamp(&fbuf->vb.v4l2_buf.timestamp);
295 fbuf->vb.v4l2_buf.sequence = dev->sequence++;
296 vb2_buffer_done(&fbuf->vb, VB2_BUF_STATE_DONE);
297 }
298skip:
299 usb_submit_urb(urb, GFP_ATOMIC);
300}
301
302static int hackrf_kill_urbs(struct hackrf_dev *dev)
303{
304 int i;
305
306 for (i = dev->urbs_submitted - 1; i >= 0; i--) {
307 dev_dbg(dev->dev, "kill urb=%d\n", i);
308 /* stop the URB */
309 usb_kill_urb(dev->urb_list[i]);
310 }
311 dev->urbs_submitted = 0;
312
313 return 0;
314}
315
316static int hackrf_submit_urbs(struct hackrf_dev *dev)
317{
318 int i, ret;
319
320 for (i = 0; i < dev->urbs_initialized; i++) {
321 dev_dbg(dev->dev, "submit urb=%d\n", i);
322 ret = usb_submit_urb(dev->urb_list[i], GFP_ATOMIC);
323 if (ret) {
324 dev_err(dev->dev, "Could not submit URB no. %d - get them all back\n",
325 i);
326 hackrf_kill_urbs(dev);
327 return ret;
328 }
329 dev->urbs_submitted++;
330 }
331
332 return 0;
333}
334
335static int hackrf_free_stream_bufs(struct hackrf_dev *dev)
336{
337 if (dev->flags & USB_STATE_URB_BUF) {
338 while (dev->buf_num) {
339 dev->buf_num--;
340 dev_dbg(dev->dev, "free buf=%d\n", dev->buf_num);
341 usb_free_coherent(dev->udev, dev->buf_size,
342 dev->buf_list[dev->buf_num],
343 dev->dma_addr[dev->buf_num]);
344 }
345 }
346 dev->flags &= ~USB_STATE_URB_BUF;
347
348 return 0;
349}
350
351static int hackrf_alloc_stream_bufs(struct hackrf_dev *dev)
352{
353 dev->buf_num = 0;
354 dev->buf_size = BULK_BUFFER_SIZE;
355
356 dev_dbg(dev->dev, "all in all I will use %u bytes for streaming\n",
357 MAX_BULK_BUFS * BULK_BUFFER_SIZE);
358
359 for (dev->buf_num = 0; dev->buf_num < MAX_BULK_BUFS; dev->buf_num++) {
360 dev->buf_list[dev->buf_num] = usb_alloc_coherent(dev->udev,
361 BULK_BUFFER_SIZE, GFP_ATOMIC,
362 &dev->dma_addr[dev->buf_num]);
363 if (!dev->buf_list[dev->buf_num]) {
364 dev_dbg(dev->dev, "alloc buf=%d failed\n",
365 dev->buf_num);
366 hackrf_free_stream_bufs(dev);
367 return -ENOMEM;
368 }
369
370 dev_dbg(dev->dev, "alloc buf=%d %p (dma %llu)\n", dev->buf_num,
371 dev->buf_list[dev->buf_num],
372 (long long)dev->dma_addr[dev->buf_num]);
373 dev->flags |= USB_STATE_URB_BUF;
374 }
375
376 return 0;
377}
378
379static int hackrf_free_urbs(struct hackrf_dev *dev)
380{
381 int i;
382
383 hackrf_kill_urbs(dev);
384
385 for (i = dev->urbs_initialized - 1; i >= 0; i--) {
386 if (dev->urb_list[i]) {
387 dev_dbg(dev->dev, "free urb=%d\n", i);
388 /* free the URBs */
389 usb_free_urb(dev->urb_list[i]);
390 }
391 }
392 dev->urbs_initialized = 0;
393
394 return 0;
395}
396
397static int hackrf_alloc_urbs(struct hackrf_dev *dev)
398{
399 int i, j;
400
401 /* allocate the URBs */
402 for (i = 0; i < MAX_BULK_BUFS; i++) {
403 dev_dbg(dev->dev, "alloc urb=%d\n", i);
404 dev->urb_list[i] = usb_alloc_urb(0, GFP_ATOMIC);
405 if (!dev->urb_list[i]) {
406 dev_dbg(dev->dev, "failed\n");
407 for (j = 0; j < i; j++)
408 usb_free_urb(dev->urb_list[j]);
409 return -ENOMEM;
410 }
411 usb_fill_bulk_urb(dev->urb_list[i],
412 dev->udev,
413 usb_rcvbulkpipe(dev->udev, 0x81),
414 dev->buf_list[i],
415 BULK_BUFFER_SIZE,
416 hackrf_urb_complete, dev);
417
418 dev->urb_list[i]->transfer_flags = URB_NO_TRANSFER_DMA_MAP;
419 dev->urb_list[i]->transfer_dma = dev->dma_addr[i];
420 dev->urbs_initialized++;
421 }
422
423 return 0;
424}
425
426/* Must be called with vb_queue_lock hold */
427static void hackrf_cleanup_queued_bufs(struct hackrf_dev *dev)
428{
429 unsigned long flags;
430
431 dev_dbg(dev->dev, "\n");
432
433 spin_lock_irqsave(&dev->queued_bufs_lock, flags);
434 while (!list_empty(&dev->queued_bufs)) {
435 struct hackrf_frame_buf *buf;
436
437 buf = list_entry(dev->queued_bufs.next,
438 struct hackrf_frame_buf, list);
439 list_del(&buf->list);
440 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
441 }
442 spin_unlock_irqrestore(&dev->queued_bufs_lock, flags);
443}
444
445/* The user yanked out the cable... */
446static void hackrf_disconnect(struct usb_interface *intf)
447{
448 struct v4l2_device *v = usb_get_intfdata(intf);
449 struct hackrf_dev *dev = container_of(v, struct hackrf_dev, v4l2_dev);
450
451 dev_dbg(dev->dev, "\n");
452
453 mutex_lock(&dev->vb_queue_lock);
454 mutex_lock(&dev->v4l2_lock);
455 /* No need to keep the urbs around after disconnection */
456 dev->udev = NULL;
457 v4l2_device_disconnect(&dev->v4l2_dev);
458 video_unregister_device(&dev->vdev);
459 mutex_unlock(&dev->v4l2_lock);
460 mutex_unlock(&dev->vb_queue_lock);
461
462 v4l2_device_put(&dev->v4l2_dev);
463}
464
465/* Videobuf2 operations */
466static int hackrf_queue_setup(struct vb2_queue *vq,
467 const struct v4l2_format *fmt, unsigned int *nbuffers,
468 unsigned int *nplanes, unsigned int sizes[], void *alloc_ctxs[])
469{
470 struct hackrf_dev *dev = vb2_get_drv_priv(vq);
471
472 dev_dbg(dev->dev, "nbuffers=%d\n", *nbuffers);
473
474 /* Need at least 8 buffers */
475 if (vq->num_buffers + *nbuffers < 8)
476 *nbuffers = 8 - vq->num_buffers;
477 *nplanes = 1;
478 sizes[0] = PAGE_ALIGN(dev->buffersize);
479
480 dev_dbg(dev->dev, "nbuffers=%d sizes[0]=%d\n", *nbuffers, sizes[0]);
481 return 0;
482}
483
484static void hackrf_buf_queue(struct vb2_buffer *vb)
485{
486 struct hackrf_dev *dev = vb2_get_drv_priv(vb->vb2_queue);
487 struct hackrf_frame_buf *buf =
488 container_of(vb, struct hackrf_frame_buf, vb);
489 unsigned long flags;
490
491 spin_lock_irqsave(&dev->queued_bufs_lock, flags);
492 list_add_tail(&buf->list, &dev->queued_bufs);
493 spin_unlock_irqrestore(&dev->queued_bufs_lock, flags);
494}
495
496static int hackrf_start_streaming(struct vb2_queue *vq, unsigned int count)
497{
498 struct hackrf_dev *dev = vb2_get_drv_priv(vq);
499 int ret;
500
501 dev_dbg(dev->dev, "\n");
502
503 if (!dev->udev)
504 return -ENODEV;
505
506 mutex_lock(&dev->v4l2_lock);
507
508 dev->sequence = 0;
509
510 set_bit(POWER_ON, &dev->flags);
511
512 ret = hackrf_alloc_stream_bufs(dev);
513 if (ret)
514 goto err;
515
516 ret = hackrf_alloc_urbs(dev);
517 if (ret)
518 goto err;
519
520 ret = hackrf_submit_urbs(dev);
521 if (ret)
522 goto err;
523
524 /* start hardware streaming */
525 ret = hackrf_ctrl_msg(dev, CMD_SET_TRANSCEIVER_MODE, 1, 0, NULL, 0);
526 if (ret)
527 goto err;
528
529 goto exit_mutex_unlock;
530err:
531 hackrf_kill_urbs(dev);
532 hackrf_free_urbs(dev);
533 hackrf_free_stream_bufs(dev);
534 clear_bit(POWER_ON, &dev->flags);
535
536 /* return all queued buffers to vb2 */
537 {
538 struct hackrf_frame_buf *buf, *tmp;
539
540 list_for_each_entry_safe(buf, tmp, &dev->queued_bufs, list) {
541 list_del(&buf->list);
542 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_QUEUED);
543 }
544 }
545
546exit_mutex_unlock:
547 mutex_unlock(&dev->v4l2_lock);
548
549 return ret;
550}
551
552static void hackrf_stop_streaming(struct vb2_queue *vq)
553{
554 struct hackrf_dev *dev = vb2_get_drv_priv(vq);
555
556 dev_dbg(dev->dev, "\n");
557
558 mutex_lock(&dev->v4l2_lock);
559
560 /* stop hardware streaming */
561 hackrf_ctrl_msg(dev, CMD_SET_TRANSCEIVER_MODE, 0, 0, NULL, 0);
562
563 hackrf_kill_urbs(dev);
564 hackrf_free_urbs(dev);
565 hackrf_free_stream_bufs(dev);
566
567 hackrf_cleanup_queued_bufs(dev);
568
569 clear_bit(POWER_ON, &dev->flags);
570
571 mutex_unlock(&dev->v4l2_lock);
572}
573
574static struct vb2_ops hackrf_vb2_ops = {
575 .queue_setup = hackrf_queue_setup,
576 .buf_queue = hackrf_buf_queue,
577 .start_streaming = hackrf_start_streaming,
578 .stop_streaming = hackrf_stop_streaming,
579 .wait_prepare = vb2_ops_wait_prepare,
580 .wait_finish = vb2_ops_wait_finish,
581};
582
583static int hackrf_querycap(struct file *file, void *fh,
584 struct v4l2_capability *cap)
585{
586 struct hackrf_dev *dev = video_drvdata(file);
587
588 dev_dbg(dev->dev, "\n");
589
590 strlcpy(cap->driver, KBUILD_MODNAME, sizeof(cap->driver));
591 strlcpy(cap->card, dev->vdev.name, sizeof(cap->card));
592 usb_make_path(dev->udev, cap->bus_info, sizeof(cap->bus_info));
593 cap->device_caps = V4L2_CAP_SDR_CAPTURE | V4L2_CAP_STREAMING |
594 V4L2_CAP_READWRITE | V4L2_CAP_TUNER;
595 cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
596
597 return 0;
598}
599
600static int hackrf_s_fmt_sdr_cap(struct file *file, void *priv,
601 struct v4l2_format *f)
602{
603 struct hackrf_dev *dev = video_drvdata(file);
604 struct vb2_queue *q = &dev->vb_queue;
605 int i;
606
607 dev_dbg(dev->dev, "pixelformat fourcc %4.4s\n",
608 (char *)&f->fmt.sdr.pixelformat);
609
610 if (vb2_is_busy(q))
611 return -EBUSY;
612
613 memset(f->fmt.sdr.reserved, 0, sizeof(f->fmt.sdr.reserved));
614 for (i = 0; i < NUM_FORMATS; i++) {
615 if (f->fmt.sdr.pixelformat == formats[i].pixelformat) {
616 dev->pixelformat = formats[i].pixelformat;
617 dev->buffersize = formats[i].buffersize;
618 f->fmt.sdr.buffersize = formats[i].buffersize;
619 return 0;
620 }
621 }
622
623 dev->pixelformat = formats[0].pixelformat;
624 dev->buffersize = formats[0].buffersize;
625 f->fmt.sdr.pixelformat = formats[0].pixelformat;
626 f->fmt.sdr.buffersize = formats[0].buffersize;
627
628 return 0;
629}
630
631static int hackrf_g_fmt_sdr_cap(struct file *file, void *priv,
632 struct v4l2_format *f)
633{
634 struct hackrf_dev *dev = video_drvdata(file);
635
636 dev_dbg(dev->dev, "pixelformat fourcc %4.4s\n",
637 (char *)&dev->pixelformat);
638
639 memset(f->fmt.sdr.reserved, 0, sizeof(f->fmt.sdr.reserved));
640 f->fmt.sdr.pixelformat = dev->pixelformat;
641 f->fmt.sdr.buffersize = dev->buffersize;
642
643 return 0;
644}
645
646static int hackrf_try_fmt_sdr_cap(struct file *file, void *priv,
647 struct v4l2_format *f)
648{
649 struct hackrf_dev *dev = video_drvdata(file);
650 int i;
651
652 dev_dbg(dev->dev, "pixelformat fourcc %4.4s\n",
653 (char *)&f->fmt.sdr.pixelformat);
654
655 memset(f->fmt.sdr.reserved, 0, sizeof(f->fmt.sdr.reserved));
656 for (i = 0; i < NUM_FORMATS; i++) {
657 if (formats[i].pixelformat == f->fmt.sdr.pixelformat) {
658 f->fmt.sdr.buffersize = formats[i].buffersize;
659 return 0;
660 }
661 }
662
663 f->fmt.sdr.pixelformat = formats[0].pixelformat;
664 f->fmt.sdr.buffersize = formats[0].buffersize;
665
666 return 0;
667}
668
669static int hackrf_enum_fmt_sdr_cap(struct file *file, void *priv,
670 struct v4l2_fmtdesc *f)
671{
672 struct hackrf_dev *dev = video_drvdata(file);
673
674 dev_dbg(dev->dev, "index=%d\n", f->index);
675
676 if (f->index >= NUM_FORMATS)
677 return -EINVAL;
678
679 strlcpy(f->description, formats[f->index].name, sizeof(f->description));
680 f->pixelformat = formats[f->index].pixelformat;
681
682 return 0;
683}
684
685static int hackrf_s_tuner(struct file *file, void *priv,
686 const struct v4l2_tuner *v)
687{
688 struct hackrf_dev *dev = video_drvdata(file);
689 int ret;
690
691 dev_dbg(dev->dev, "index=%d\n", v->index);
692
693 if (v->index == 0)
694 ret = 0;
695 else if (v->index == 1)
696 ret = 0;
697 else
698 ret = -EINVAL;
699
700 return ret;
701}
702
703static int hackrf_g_tuner(struct file *file, void *priv, struct v4l2_tuner *v)
704{
705 struct hackrf_dev *dev = video_drvdata(file);
706 int ret;
707
708 dev_dbg(dev->dev, "index=%d\n", v->index);
709
710 if (v->index == 0) {
711 strlcpy(v->name, "HackRF ADC", sizeof(v->name));
712 v->type = V4L2_TUNER_ADC;
713 v->capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS;
714 v->rangelow = bands_adc[0].rangelow;
715 v->rangehigh = bands_adc[0].rangehigh;
716 ret = 0;
717 } else if (v->index == 1) {
718 strlcpy(v->name, "HackRF RF", sizeof(v->name));
719 v->type = V4L2_TUNER_RF;
720 v->capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS;
721 v->rangelow = bands_rf[0].rangelow;
722 v->rangehigh = bands_rf[0].rangehigh;
723 ret = 0;
724 } else {
725 ret = -EINVAL;
726 }
727
728 return ret;
729}
730
731static int hackrf_s_frequency(struct file *file, void *priv,
732 const struct v4l2_frequency *f)
733{
734 struct hackrf_dev *dev = video_drvdata(file);
735 int ret;
736 unsigned int upper, lower;
737 u8 buf[8];
738
739 dev_dbg(dev->dev, "tuner=%d type=%d frequency=%u\n",
740 f->tuner, f->type, f->frequency);
741
742 if (f->tuner == 0) {
743 dev->f_adc = clamp_t(unsigned int, f->frequency,
744 bands_adc[0].rangelow, bands_adc[0].rangehigh);
745 dev_dbg(dev->dev, "ADC frequency=%u Hz\n", dev->f_adc);
746 upper = dev->f_adc;
747 lower = 1;
748 buf[0] = (upper >> 0) & 0xff;
749 buf[1] = (upper >> 8) & 0xff;
750 buf[2] = (upper >> 16) & 0xff;
751 buf[3] = (upper >> 24) & 0xff;
752 buf[4] = (lower >> 0) & 0xff;
753 buf[5] = (lower >> 8) & 0xff;
754 buf[6] = (lower >> 16) & 0xff;
755 buf[7] = (lower >> 24) & 0xff;
756 ret = hackrf_ctrl_msg(dev, CMD_SAMPLE_RATE_SET, 0, 0, buf, 8);
757 } else if (f->tuner == 1) {
758 dev->f_rf = clamp_t(unsigned int, f->frequency,
759 bands_rf[0].rangelow, bands_rf[0].rangehigh);
760 dev_dbg(dev->dev, "RF frequency=%u Hz\n", dev->f_rf);
761 upper = dev->f_rf / 1000000;
762 lower = dev->f_rf % 1000000;
763 buf[0] = (upper >> 0) & 0xff;
764 buf[1] = (upper >> 8) & 0xff;
765 buf[2] = (upper >> 16) & 0xff;
766 buf[3] = (upper >> 24) & 0xff;
767 buf[4] = (lower >> 0) & 0xff;
768 buf[5] = (lower >> 8) & 0xff;
769 buf[6] = (lower >> 16) & 0xff;
770 buf[7] = (lower >> 24) & 0xff;
771 ret = hackrf_ctrl_msg(dev, CMD_SET_FREQ, 0, 0, buf, 8);
772 } else {
773 ret = -EINVAL;
774 }
775
776 return ret;
777}
778
779static int hackrf_g_frequency(struct file *file, void *priv,
780 struct v4l2_frequency *f)
781{
782 struct hackrf_dev *dev = video_drvdata(file);
783 int ret;
784
785 dev_dbg(dev->dev, "tuner=%d type=%d\n", f->tuner, f->type);
786
787 if (f->tuner == 0) {
788 f->type = V4L2_TUNER_ADC;
789 f->frequency = dev->f_adc;
790 ret = 0;
791 } else if (f->tuner == 1) {
792 f->type = V4L2_TUNER_RF;
793 f->frequency = dev->f_rf;
794 ret = 0;
795 } else {
796 ret = -EINVAL;
797 }
798
799 return ret;
800}
801
802static int hackrf_enum_freq_bands(struct file *file, void *priv,
803 struct v4l2_frequency_band *band)
804{
805 struct hackrf_dev *dev = video_drvdata(file);
806 int ret;
807
808 dev_dbg(dev->dev, "tuner=%d type=%d index=%d\n",
809 band->tuner, band->type, band->index);
810
811 if (band->tuner == 0) {
812 if (band->index >= ARRAY_SIZE(bands_adc)) {
813 ret = -EINVAL;
814 } else {
815 *band = bands_adc[band->index];
816 ret = 0;
817 }
818 } else if (band->tuner == 1) {
819 if (band->index >= ARRAY_SIZE(bands_rf)) {
820 ret = -EINVAL;
821 } else {
822 *band = bands_rf[band->index];
823 ret = 0;
824 }
825 } else {
826 ret = -EINVAL;
827 }
828
829 return ret;
830}
831
832static const struct v4l2_ioctl_ops hackrf_ioctl_ops = {
833 .vidioc_querycap = hackrf_querycap,
834
835 .vidioc_s_fmt_sdr_cap = hackrf_s_fmt_sdr_cap,
836 .vidioc_g_fmt_sdr_cap = hackrf_g_fmt_sdr_cap,
837 .vidioc_enum_fmt_sdr_cap = hackrf_enum_fmt_sdr_cap,
838 .vidioc_try_fmt_sdr_cap = hackrf_try_fmt_sdr_cap,
839
840 .vidioc_reqbufs = vb2_ioctl_reqbufs,
841 .vidioc_create_bufs = vb2_ioctl_create_bufs,
842 .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
843 .vidioc_querybuf = vb2_ioctl_querybuf,
844 .vidioc_qbuf = vb2_ioctl_qbuf,
845 .vidioc_dqbuf = vb2_ioctl_dqbuf,
846
847 .vidioc_streamon = vb2_ioctl_streamon,
848 .vidioc_streamoff = vb2_ioctl_streamoff,
849
850 .vidioc_s_tuner = hackrf_s_tuner,
851 .vidioc_g_tuner = hackrf_g_tuner,
852
853 .vidioc_s_frequency = hackrf_s_frequency,
854 .vidioc_g_frequency = hackrf_g_frequency,
855 .vidioc_enum_freq_bands = hackrf_enum_freq_bands,
856
857 .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
858 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
859 .vidioc_log_status = v4l2_ctrl_log_status,
860};
861
862static const struct v4l2_file_operations hackrf_fops = {
863 .owner = THIS_MODULE,
864 .open = v4l2_fh_open,
865 .release = vb2_fop_release,
866 .read = vb2_fop_read,
867 .poll = vb2_fop_poll,
868 .mmap = vb2_fop_mmap,
869 .unlocked_ioctl = video_ioctl2,
870};
871
872static struct video_device hackrf_template = {
873 .name = "HackRF One",
874 .release = video_device_release_empty,
875 .fops = &hackrf_fops,
876 .ioctl_ops = &hackrf_ioctl_ops,
877};
878
879static void hackrf_video_release(struct v4l2_device *v)
880{
881 struct hackrf_dev *dev = container_of(v, struct hackrf_dev, v4l2_dev);
882
883 v4l2_ctrl_handler_free(&dev->hdl);
884 v4l2_device_unregister(&dev->v4l2_dev);
885 kfree(dev);
886}
887
888static int hackrf_set_bandwidth(struct hackrf_dev *dev)
889{
890 int ret, i;
891 u16 u16tmp, u16tmp2;
892 unsigned int bandwidth;
893
894 static const struct {
895 u32 freq;
896 } bandwidth_lut[] = {
897 { 1750000}, /* 1.75 MHz */
898 { 2500000}, /* 2.5 MHz */
899 { 3500000}, /* 3.5 MHz */
900 { 5000000}, /* 5 MHz */
901 { 5500000}, /* 5.5 MHz */
902 { 6000000}, /* 6 MHz */
903 { 7000000}, /* 7 MHz */
904 { 8000000}, /* 8 MHz */
905 { 9000000}, /* 9 MHz */
906 {10000000}, /* 10 MHz */
907 {12000000}, /* 12 MHz */
908 {14000000}, /* 14 MHz */
909 {15000000}, /* 15 MHz */
910 {20000000}, /* 20 MHz */
911 {24000000}, /* 24 MHz */
912 {28000000}, /* 28 MHz */
913 };
914
915 dev_dbg(dev->dev, "bandwidth auto=%d->%d val=%d->%d f_adc=%u\n",
916 dev->bandwidth_auto->cur.val,
917 dev->bandwidth_auto->val, dev->bandwidth->cur.val,
918 dev->bandwidth->val, dev->f_adc);
919
920 if (dev->bandwidth_auto->val == true)
921 bandwidth = dev->f_adc;
922 else
923 bandwidth = dev->bandwidth->val;
924
925 for (i = 0; i < ARRAY_SIZE(bandwidth_lut); i++) {
926 if (bandwidth <= bandwidth_lut[i].freq) {
927 bandwidth = bandwidth_lut[i].freq;
928 break;
929 }
930 }
931
932 dev->bandwidth->val = bandwidth;
933 dev->bandwidth->cur.val = bandwidth;
934
935 dev_dbg(dev->dev, "bandwidth selected=%d\n", bandwidth_lut[i].freq);
936
937 u16tmp = 0;
938 u16tmp |= ((bandwidth >> 0) & 0xff) << 0;
939 u16tmp |= ((bandwidth >> 8) & 0xff) << 8;
940 u16tmp2 = 0;
941 u16tmp2 |= ((bandwidth >> 16) & 0xff) << 0;
942 u16tmp2 |= ((bandwidth >> 24) & 0xff) << 8;
943
944 ret = hackrf_ctrl_msg(dev, CMD_BASEBAND_FILTER_BANDWIDTH_SET,
945 u16tmp, u16tmp2, NULL, 0);
946 if (ret)
947 dev_dbg(dev->dev, "failed=%d\n", ret);
948
949 return ret;
950}
951
952static int hackrf_set_lna_gain(struct hackrf_dev *dev)
953{
954 int ret;
955 u8 u8tmp;
956
957 dev_dbg(dev->dev, "lna val=%d->%d\n",
958 dev->lna_gain->cur.val, dev->lna_gain->val);
959
960 ret = hackrf_ctrl_msg(dev, CMD_SET_LNA_GAIN, 0, dev->lna_gain->val,
961 &u8tmp, 1);
962 if (ret)
963 dev_dbg(dev->dev, "failed=%d\n", ret);
964
965 return ret;
966}
967
968static int hackrf_set_if_gain(struct hackrf_dev *dev)
969{
970 int ret;
971 u8 u8tmp;
972
973 dev_dbg(dev->dev, "val=%d->%d\n",
974 dev->if_gain->cur.val, dev->if_gain->val);
975
976 ret = hackrf_ctrl_msg(dev, CMD_SET_VGA_GAIN, 0, dev->if_gain->val,
977 &u8tmp, 1);
978 if (ret)
979 dev_dbg(dev->dev, "failed=%d\n", ret);
980
981 return ret;
982}
983
984static int hackrf_s_ctrl(struct v4l2_ctrl *ctrl)
985{
986 struct hackrf_dev *dev = container_of(ctrl->handler,
987 struct hackrf_dev, hdl);
988 int ret;
989
990 switch (ctrl->id) {
991 case V4L2_CID_RF_TUNER_BANDWIDTH_AUTO:
992 case V4L2_CID_RF_TUNER_BANDWIDTH:
993 ret = hackrf_set_bandwidth(dev);
994 break;
995 case V4L2_CID_RF_TUNER_LNA_GAIN:
996 ret = hackrf_set_lna_gain(dev);
997 break;
998 case V4L2_CID_RF_TUNER_IF_GAIN:
999 ret = hackrf_set_if_gain(dev);
1000 break;
1001 default:
1002 dev_dbg(dev->dev, "unknown ctrl: id=%d name=%s\n",
1003 ctrl->id, ctrl->name);
1004 ret = -EINVAL;
1005 }
1006
1007 return ret;
1008}
1009
1010static const struct v4l2_ctrl_ops hackrf_ctrl_ops = {
1011 .s_ctrl = hackrf_s_ctrl,
1012};
1013
1014static int hackrf_probe(struct usb_interface *intf,
1015 const struct usb_device_id *id)
1016{
1017 struct hackrf_dev *dev;
1018 int ret;
1019 u8 u8tmp, buf[BUF_SIZE];
1020
1021 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1022 if (dev == NULL)
1023 return -ENOMEM;
1024
1025 mutex_init(&dev->v4l2_lock);
1026 mutex_init(&dev->vb_queue_lock);
1027 spin_lock_init(&dev->queued_bufs_lock);
1028 INIT_LIST_HEAD(&dev->queued_bufs);
1029 dev->dev = &intf->dev;
1030 dev->udev = interface_to_usbdev(intf);
1031 dev->f_adc = bands_adc[0].rangelow;
1032 dev->f_rf = bands_rf[0].rangelow;
1033 dev->pixelformat = formats[0].pixelformat;
1034 dev->buffersize = formats[0].buffersize;
1035
1036 /* Detect device */
1037 ret = hackrf_ctrl_msg(dev, CMD_BOARD_ID_READ, 0, 0, &u8tmp, 1);
1038 if (ret == 0)
1039 ret = hackrf_ctrl_msg(dev, CMD_VERSION_STRING_READ, 0, 0,
1040 buf, BUF_SIZE);
1041 if (ret) {
1042 dev_err(dev->dev, "Could not detect board\n");
1043 goto err_free_mem;
1044 }
1045
1046 buf[BUF_SIZE - 1] = '\0';
1047
1048 dev_info(dev->dev, "Board ID: %02x\n", u8tmp);
1049 dev_info(dev->dev, "Firmware version: %s\n", buf);
1050
1051 /* Init videobuf2 queue structure */
1052 dev->vb_queue.type = V4L2_BUF_TYPE_SDR_CAPTURE;
1053 dev->vb_queue.io_modes = VB2_MMAP | VB2_USERPTR | VB2_READ;
1054 dev->vb_queue.drv_priv = dev;
1055 dev->vb_queue.buf_struct_size = sizeof(struct hackrf_frame_buf);
1056 dev->vb_queue.ops = &hackrf_vb2_ops;
1057 dev->vb_queue.mem_ops = &vb2_vmalloc_memops;
1058 dev->vb_queue.timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1059 ret = vb2_queue_init(&dev->vb_queue);
1060 if (ret) {
1061 dev_err(dev->dev, "Could not initialize vb2 queue\n");
1062 goto err_free_mem;
1063 }
1064
1065 /* Init video_device structure */
1066 dev->vdev = hackrf_template;
1067 dev->vdev.queue = &dev->vb_queue;
1068 dev->vdev.queue->lock = &dev->vb_queue_lock;
1069 video_set_drvdata(&dev->vdev, dev);
1070
1071 /* Register the v4l2_device structure */
1072 dev->v4l2_dev.release = hackrf_video_release;
1073 ret = v4l2_device_register(&intf->dev, &dev->v4l2_dev);
1074 if (ret) {
1075 dev_err(dev->dev, "Failed to register v4l2-device (%d)\n", ret);
1076 goto err_free_mem;
1077 }
1078
1079 /* Register controls */
1080 v4l2_ctrl_handler_init(&dev->hdl, 4);
1081 dev->bandwidth_auto = v4l2_ctrl_new_std(&dev->hdl, &hackrf_ctrl_ops,
1082 V4L2_CID_RF_TUNER_BANDWIDTH_AUTO, 0, 1, 1, 1);
1083 dev->bandwidth = v4l2_ctrl_new_std(&dev->hdl, &hackrf_ctrl_ops,
1084 V4L2_CID_RF_TUNER_BANDWIDTH,
1085 1750000, 28000000, 50000, 1750000);
1086 v4l2_ctrl_auto_cluster(2, &dev->bandwidth_auto, 0, false);
1087 dev->lna_gain = v4l2_ctrl_new_std(&dev->hdl, &hackrf_ctrl_ops,
1088 V4L2_CID_RF_TUNER_LNA_GAIN, 0, 40, 8, 0);
1089 dev->if_gain = v4l2_ctrl_new_std(&dev->hdl, &hackrf_ctrl_ops,
1090 V4L2_CID_RF_TUNER_IF_GAIN, 0, 62, 2, 0);
1091 if (dev->hdl.error) {
1092 ret = dev->hdl.error;
1093 dev_err(dev->dev, "Could not initialize controls\n");
1094 goto err_free_controls;
1095 }
1096
1097 v4l2_ctrl_handler_setup(&dev->hdl);
1098
1099 dev->v4l2_dev.ctrl_handler = &dev->hdl;
1100 dev->vdev.v4l2_dev = &dev->v4l2_dev;
1101 dev->vdev.lock = &dev->v4l2_lock;
1102
1103 ret = video_register_device(&dev->vdev, VFL_TYPE_SDR, -1);
1104 if (ret) {
1105 dev_err(dev->dev, "Failed to register as video device (%d)\n",
1106 ret);
1107 goto err_unregister_v4l2_dev;
1108 }
1109 dev_info(dev->dev, "Registered as %s\n",
1110 video_device_node_name(&dev->vdev));
1111 dev_notice(dev->dev, "SDR API is still slightly experimental and functionality changes may follow\n");
1112 return 0;
1113
1114err_free_controls:
1115 v4l2_ctrl_handler_free(&dev->hdl);
1116err_unregister_v4l2_dev:
1117 v4l2_device_unregister(&dev->v4l2_dev);
1118err_free_mem:
1119 kfree(dev);
1120 return ret;
1121}
1122
1123/* USB device ID list */
1124static struct usb_device_id hackrf_id_table[] = {
1125 { USB_DEVICE(0x1d50, 0x6089) }, /* HackRF One */
1126 { }
1127};
1128MODULE_DEVICE_TABLE(usb, hackrf_id_table);
1129
1130/* USB subsystem interface */
1131static struct usb_driver hackrf_driver = {
1132 .name = KBUILD_MODNAME,
1133 .probe = hackrf_probe,
1134 .disconnect = hackrf_disconnect,
1135 .id_table = hackrf_id_table,
1136};
1137
1138module_usb_driver(hackrf_driver);
1139
1140MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
1141MODULE_DESCRIPTION("HackRF");
1142MODULE_LICENSE("GPL");
diff --git a/drivers/media/usb/hdpvr/hdpvr-control.c b/drivers/media/usb/hdpvr/hdpvr-control.c
index 6053661dc04b..6e86032ea5db 100644
--- a/drivers/media/usb/hdpvr/hdpvr-control.c
+++ b/drivers/media/usb/hdpvr/hdpvr-control.c
@@ -59,13 +59,10 @@ int get_video_info(struct hdpvr_device *dev, struct hdpvr_video_info *vidinf)
59 1000); 59 1000);
60 60
61#ifdef HDPVR_DEBUG 61#ifdef HDPVR_DEBUG
62 if (hdpvr_debug & MSG_INFO) { 62 if (hdpvr_debug & MSG_INFO)
63 char print_buf[15];
64 hex_dump_to_buffer(dev->usbc_buf, 5, 16, 1, print_buf,
65 sizeof(print_buf), 0);
66 v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev, 63 v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev,
67 "get video info returned: %d, %s\n", ret, print_buf); 64 "get video info returned: %d, %5ph\n", ret,
68 } 65 dev->usbc_buf);
69#endif 66#endif
70 mutex_unlock(&dev->usbc_mutex); 67 mutex_unlock(&dev->usbc_mutex);
71 68
@@ -82,9 +79,6 @@ int get_video_info(struct hdpvr_device *dev, struct hdpvr_video_info *vidinf)
82 79
83int get_input_lines_info(struct hdpvr_device *dev) 80int get_input_lines_info(struct hdpvr_device *dev)
84{ 81{
85#ifdef HDPVR_DEBUG
86 char print_buf[9];
87#endif
88 int ret, lines; 82 int ret, lines;
89 83
90 mutex_lock(&dev->usbc_mutex); 84 mutex_lock(&dev->usbc_mutex);
@@ -96,13 +90,10 @@ int get_input_lines_info(struct hdpvr_device *dev)
96 1000); 90 1000);
97 91
98#ifdef HDPVR_DEBUG 92#ifdef HDPVR_DEBUG
99 if (hdpvr_debug & MSG_INFO) { 93 if (hdpvr_debug & MSG_INFO)
100 hex_dump_to_buffer(dev->usbc_buf, 3, 16, 1, print_buf,
101 sizeof(print_buf), 0);
102 v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev, 94 v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev,
103 "get input lines info returned: %d, %s\n", ret, 95 "get input lines info returned: %d, %3ph\n", ret,
104 print_buf); 96 dev->usbc_buf);
105 }
106#else 97#else
107 (void)ret; /* suppress compiler warning */ 98 (void)ret; /* suppress compiler warning */
108#endif 99#endif
diff --git a/drivers/media/usb/hdpvr/hdpvr-core.c b/drivers/media/usb/hdpvr/hdpvr-core.c
index c5638964c3f2..42b4cdf28cfd 100644
--- a/drivers/media/usb/hdpvr/hdpvr-core.c
+++ b/drivers/media/usb/hdpvr/hdpvr-core.c
@@ -124,14 +124,6 @@ static int device_authorization(struct hdpvr_device *dev)
124 int ret, retval = -ENOMEM; 124 int ret, retval = -ENOMEM;
125 char request_type = 0x38, rcv_request = 0x81; 125 char request_type = 0x38, rcv_request = 0x81;
126 char *response; 126 char *response;
127#ifdef HDPVR_DEBUG
128 size_t buf_size = 46;
129 char *print_buf = kzalloc(5*buf_size+1, GFP_KERNEL);
130 if (!print_buf) {
131 v4l2_err(&dev->v4l2_dev, "Out of memory\n");
132 return retval;
133 }
134#endif
135 127
136 mutex_lock(&dev->usbc_mutex); 128 mutex_lock(&dev->usbc_mutex);
137 ret = usb_control_msg(dev->udev, 129 ret = usb_control_msg(dev->udev,
@@ -147,11 +139,9 @@ static int device_authorization(struct hdpvr_device *dev)
147 } 139 }
148#ifdef HDPVR_DEBUG 140#ifdef HDPVR_DEBUG
149 else { 141 else {
150 hex_dump_to_buffer(dev->usbc_buf, 46, 16, 1, print_buf,
151 5*buf_size+1, 0);
152 v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev, 142 v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev,
153 "Status request returned, len %d: %s\n", 143 "Status request returned, len %d: %46ph\n",
154 ret, print_buf); 144 ret, dev->usbc_buf);
155 } 145 }
156#endif 146#endif
157 147
@@ -189,15 +179,13 @@ static int device_authorization(struct hdpvr_device *dev)
189 179
190 response = dev->usbc_buf+38; 180 response = dev->usbc_buf+38;
191#ifdef HDPVR_DEBUG 181#ifdef HDPVR_DEBUG
192 hex_dump_to_buffer(response, 8, 16, 1, print_buf, 5*buf_size+1, 0); 182 v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev, "challenge: %8ph\n",
193 v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev, "challenge: %s\n", 183 response);
194 print_buf);
195#endif 184#endif
196 challenge(response); 185 challenge(response);
197#ifdef HDPVR_DEBUG 186#ifdef HDPVR_DEBUG
198 hex_dump_to_buffer(response, 8, 16, 1, print_buf, 5*buf_size+1, 0); 187 v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev, " response: %8ph\n",
199 v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev, " response: %s\n", 188 response);
200 print_buf);
201#endif 189#endif
202 190
203 msleep(100); 191 msleep(100);
@@ -213,9 +201,6 @@ static int device_authorization(struct hdpvr_device *dev)
213 retval = ret != 8; 201 retval = ret != 8;
214unlock: 202unlock:
215 mutex_unlock(&dev->usbc_mutex); 203 mutex_unlock(&dev->usbc_mutex);
216#ifdef HDPVR_DEBUG
217 kfree(print_buf);
218#endif
219 return retval; 204 return retval;
220} 205}
221 206
diff --git a/drivers/media/usb/msi2500/msi2500.c b/drivers/media/usb/msi2500/msi2500.c
index 26b133414032..efc761c78f72 100644
--- a/drivers/media/usb/msi2500/msi2500.c
+++ b/drivers/media/usb/msi2500/msi2500.c
@@ -120,6 +120,7 @@ struct msi2500_frame_buf {
120}; 120};
121 121
122struct msi2500_state { 122struct msi2500_state {
123 struct device *dev;
123 struct video_device vdev; 124 struct video_device vdev;
124 struct v4l2_device v4l2_dev; 125 struct v4l2_device v4l2_dev;
125 struct v4l2_subdev *v4l2_subdev; 126 struct v4l2_subdev *v4l2_subdev;
@@ -153,14 +154,13 @@ struct msi2500_state {
153 u32 next_sample; /* for track lost packets */ 154 u32 next_sample; /* for track lost packets */
154 u32 sample; /* for sample rate calc */ 155 u32 sample; /* for sample rate calc */
155 unsigned long jiffies_next; 156 unsigned long jiffies_next;
156 unsigned int sample_ctrl_bit[4];
157}; 157};
158 158
159/* Private functions */ 159/* Private functions */
160static struct msi2500_frame_buf *msi2500_get_next_fill_buf( 160static struct msi2500_frame_buf *msi2500_get_next_fill_buf(
161 struct msi2500_state *s) 161 struct msi2500_state *s)
162{ 162{
163 unsigned long flags = 0; 163 unsigned long flags;
164 struct msi2500_frame_buf *buf = NULL; 164 struct msi2500_frame_buf *buf = NULL;
165 165
166 spin_lock_irqsave(&s->queued_bufs_lock, flags); 166 spin_lock_irqsave(&s->queued_bufs_lock, flags);
@@ -269,7 +269,7 @@ static int msi2500_convert_stream(struct msi2500_state *s, u8 *dst, u8 *src,
269 sample[i] = src[3] << 24 | src[2] << 16 | src[1] << 8 | 269 sample[i] = src[3] << 24 | src[2] << 16 | src[1] << 8 |
270 src[0] << 0; 270 src[0] << 0;
271 if (i == 0 && s->next_sample != sample[0]) { 271 if (i == 0 && s->next_sample != sample[0]) {
272 dev_dbg_ratelimited(&s->udev->dev, 272 dev_dbg_ratelimited(s->dev,
273 "%d samples lost, %d %08x:%08x\n", 273 "%d samples lost, %d %08x:%08x\n",
274 sample[0] - s->next_sample, 274 sample[0] - s->next_sample,
275 src_len, s->next_sample, sample[0]); 275 src_len, s->next_sample, sample[0]);
@@ -279,7 +279,7 @@ static int msi2500_convert_stream(struct msi2500_state *s, u8 *dst, u8 *src,
279 * Dump all unknown 'garbage' data - maybe we will discover 279 * Dump all unknown 'garbage' data - maybe we will discover
280 * someday if there is something rational... 280 * someday if there is something rational...
281 */ 281 */
282 dev_dbg_ratelimited(&s->udev->dev, "%*ph\n", 12, &src[4]); 282 dev_dbg_ratelimited(s->dev, "%*ph\n", 12, &src[4]);
283 283
284 src += 16; /* skip header */ 284 src += 16; /* skip header */
285 285
@@ -322,8 +322,7 @@ static int msi2500_convert_stream(struct msi2500_state *s, u8 *dst, u8 *src,
322 } 322 }
323 case MSI2500_PIX_FMT_SDR_MSI2500_384: /* 384 x IQ samples */ 323 case MSI2500_PIX_FMT_SDR_MSI2500_384: /* 384 x IQ samples */
324 /* Dump unknown 'garbage' data */ 324 /* Dump unknown 'garbage' data */
325 dev_dbg_ratelimited(&s->udev->dev, 325 dev_dbg_ratelimited(s->dev, "%*ph\n", 24, &src[1000]);
326 "%*ph\n", 24, &src[1000]);
327 memcpy(dst, src, 984); 326 memcpy(dst, src, 984);
328 src += 984 + 24; 327 src += 984 + 24;
329 dst += 984; 328 dst += 984;
@@ -365,8 +364,7 @@ static int msi2500_convert_stream(struct msi2500_state *s, u8 *dst, u8 *src,
365 364
366 s->jiffies_next = jiffies + msecs_to_jiffies(MSECS); 365 s->jiffies_next = jiffies + msecs_to_jiffies(MSECS);
367 s->sample = s->next_sample; 366 s->sample = s->next_sample;
368 dev_dbg(&s->udev->dev, 367 dev_dbg(s->dev, "size=%u samples=%u msecs=%u sample rate=%lu\n",
369 "size=%u samples=%u msecs=%u sample rate=%lu\n",
370 src_len, samples, msecs, 368 src_len, samples, msecs,
371 samples * 1000UL / msecs); 369 samples * 1000UL / msecs);
372 } 370 }
@@ -387,19 +385,16 @@ static void msi2500_isoc_handler(struct urb *urb)
387 385
388 if (unlikely(urb->status == -ENOENT || urb->status == -ECONNRESET || 386 if (unlikely(urb->status == -ENOENT || urb->status == -ECONNRESET ||
389 urb->status == -ESHUTDOWN)) { 387 urb->status == -ESHUTDOWN)) {
390 dev_dbg(&s->udev->dev, "URB (%p) unlinked %ssynchronuously\n", 388 dev_dbg(s->dev, "URB (%p) unlinked %ssynchronuously\n",
391 urb, urb->status == -ENOENT ? "" : "a"); 389 urb, urb->status == -ENOENT ? "" : "a");
392 return; 390 return;
393 } 391 }
394 392
395 if (unlikely(urb->status != 0)) { 393 if (unlikely(urb->status != 0)) {
396 dev_dbg(&s->udev->dev, 394 dev_dbg(s->dev, "called with status %d\n", urb->status);
397 "msi2500_isoc_handler() called with status %d\n",
398 urb->status);
399 /* Give up after a number of contiguous errors */ 395 /* Give up after a number of contiguous errors */
400 if (++s->isoc_errors > MAX_ISOC_ERRORS) 396 if (++s->isoc_errors > MAX_ISOC_ERRORS)
401 dev_dbg(&s->udev->dev, 397 dev_dbg(s->dev, "Too many ISOC errors, bailing out\n");
402 "Too many ISOC errors, bailing out\n");
403 goto handler_end; 398 goto handler_end;
404 } else { 399 } else {
405 /* Reset ISOC error counter. We did get here, after all. */ 400 /* Reset ISOC error counter. We did get here, after all. */
@@ -413,7 +408,7 @@ static void msi2500_isoc_handler(struct urb *urb)
413 /* Check frame error */ 408 /* Check frame error */
414 fstatus = urb->iso_frame_desc[i].status; 409 fstatus = urb->iso_frame_desc[i].status;
415 if (unlikely(fstatus)) { 410 if (unlikely(fstatus)) {
416 dev_dbg_ratelimited(&s->udev->dev, 411 dev_dbg_ratelimited(s->dev,
417 "frame=%d/%d has error %d skipping\n", 412 "frame=%d/%d has error %d skipping\n",
418 i, urb->number_of_packets, fstatus); 413 i, urb->number_of_packets, fstatus);
419 continue; 414 continue;
@@ -430,7 +425,7 @@ static void msi2500_isoc_handler(struct urb *urb)
430 fbuf = msi2500_get_next_fill_buf(s); 425 fbuf = msi2500_get_next_fill_buf(s);
431 if (unlikely(fbuf == NULL)) { 426 if (unlikely(fbuf == NULL)) {
432 s->vb_full++; 427 s->vb_full++;
433 dev_dbg_ratelimited(&s->udev->dev, 428 dev_dbg_ratelimited(s->dev,
434 "videobuf is full, %d packets dropped\n", 429 "videobuf is full, %d packets dropped\n",
435 s->vb_full); 430 s->vb_full);
436 continue; 431 continue;
@@ -446,22 +441,19 @@ static void msi2500_isoc_handler(struct urb *urb)
446handler_end: 441handler_end:
447 i = usb_submit_urb(urb, GFP_ATOMIC); 442 i = usb_submit_urb(urb, GFP_ATOMIC);
448 if (unlikely(i != 0)) 443 if (unlikely(i != 0))
449 dev_dbg(&s->udev->dev, 444 dev_dbg(s->dev, "Error (%d) re-submitting urb\n", i);
450 "Error (%d) re-submitting urb in msi2500_isoc_handler\n",
451 i);
452} 445}
453 446
454static void msi2500_iso_stop(struct msi2500_state *s) 447static void msi2500_iso_stop(struct msi2500_state *s)
455{ 448{
456 int i; 449 int i;
457 450
458 dev_dbg(&s->udev->dev, "%s:\n", __func__); 451 dev_dbg(s->dev, "\n");
459 452
460 /* Unlinking ISOC buffers one by one */ 453 /* Unlinking ISOC buffers one by one */
461 for (i = 0; i < MAX_ISO_BUFS; i++) { 454 for (i = 0; i < MAX_ISO_BUFS; i++) {
462 if (s->urbs[i]) { 455 if (s->urbs[i]) {
463 dev_dbg(&s->udev->dev, "Unlinking URB %p\n", 456 dev_dbg(s->dev, "Unlinking URB %p\n", s->urbs[i]);
464 s->urbs[i]);
465 usb_kill_urb(s->urbs[i]); 457 usb_kill_urb(s->urbs[i]);
466 } 458 }
467 } 459 }
@@ -471,12 +463,12 @@ static void msi2500_iso_free(struct msi2500_state *s)
471{ 463{
472 int i; 464 int i;
473 465
474 dev_dbg(&s->udev->dev, "%s:\n", __func__); 466 dev_dbg(s->dev, "\n");
475 467
476 /* Freeing ISOC buffers one by one */ 468 /* Freeing ISOC buffers one by one */
477 for (i = 0; i < MAX_ISO_BUFS; i++) { 469 for (i = 0; i < MAX_ISO_BUFS; i++) {
478 if (s->urbs[i]) { 470 if (s->urbs[i]) {
479 dev_dbg(&s->udev->dev, "Freeing URB\n"); 471 dev_dbg(s->dev, "Freeing URB\n");
480 if (s->urbs[i]->transfer_buffer) { 472 if (s->urbs[i]->transfer_buffer) {
481 usb_free_coherent(s->udev, 473 usb_free_coherent(s->udev,
482 s->urbs[i]->transfer_buffer_length, 474 s->urbs[i]->transfer_buffer_length,
@@ -492,7 +484,7 @@ static void msi2500_iso_free(struct msi2500_state *s)
492/* Both v4l2_lock and vb_queue_lock should be locked when calling this */ 484/* Both v4l2_lock and vb_queue_lock should be locked when calling this */
493static void msi2500_isoc_cleanup(struct msi2500_state *s) 485static void msi2500_isoc_cleanup(struct msi2500_state *s)
494{ 486{
495 dev_dbg(&s->udev->dev, "%s:\n", __func__); 487 dev_dbg(s->dev, "\n");
496 488
497 msi2500_iso_stop(s); 489 msi2500_iso_stop(s);
498 msi2500_iso_free(s); 490 msi2500_iso_free(s);
@@ -501,14 +493,12 @@ static void msi2500_isoc_cleanup(struct msi2500_state *s)
501/* Both v4l2_lock and vb_queue_lock should be locked when calling this */ 493/* Both v4l2_lock and vb_queue_lock should be locked when calling this */
502static int msi2500_isoc_init(struct msi2500_state *s) 494static int msi2500_isoc_init(struct msi2500_state *s)
503{ 495{
504 struct usb_device *udev;
505 struct urb *urb; 496 struct urb *urb;
506 int i, j, ret; 497 int i, j, ret;
507 498
508 dev_dbg(&s->udev->dev, "%s:\n", __func__); 499 dev_dbg(s->dev, "\n");
509 500
510 s->isoc_errors = 0; 501 s->isoc_errors = 0;
511 udev = s->udev;
512 502
513 ret = usb_set_interface(s->udev, 0, 1); 503 ret = usb_set_interface(s->udev, 0, 1);
514 if (ret) 504 if (ret)
@@ -518,23 +508,22 @@ static int msi2500_isoc_init(struct msi2500_state *s)
518 for (i = 0; i < MAX_ISO_BUFS; i++) { 508 for (i = 0; i < MAX_ISO_BUFS; i++) {
519 urb = usb_alloc_urb(ISO_FRAMES_PER_DESC, GFP_KERNEL); 509 urb = usb_alloc_urb(ISO_FRAMES_PER_DESC, GFP_KERNEL);
520 if (urb == NULL) { 510 if (urb == NULL) {
521 dev_err(&s->udev->dev, 511 dev_err(s->dev, "Failed to allocate urb %d\n", i);
522 "Failed to allocate urb %d\n", i);
523 msi2500_isoc_cleanup(s); 512 msi2500_isoc_cleanup(s);
524 return -ENOMEM; 513 return -ENOMEM;
525 } 514 }
526 s->urbs[i] = urb; 515 s->urbs[i] = urb;
527 dev_dbg(&s->udev->dev, "Allocated URB at 0x%p\n", urb); 516 dev_dbg(s->dev, "Allocated URB at 0x%p\n", urb);
528 517
529 urb->interval = 1; 518 urb->interval = 1;
530 urb->dev = udev; 519 urb->dev = s->udev;
531 urb->pipe = usb_rcvisocpipe(udev, 0x81); 520 urb->pipe = usb_rcvisocpipe(s->udev, 0x81);
532 urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP; 521 urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP;
533 urb->transfer_buffer = usb_alloc_coherent(udev, ISO_BUFFER_SIZE, 522 urb->transfer_buffer = usb_alloc_coherent(s->udev,
523 ISO_BUFFER_SIZE,
534 GFP_KERNEL, &urb->transfer_dma); 524 GFP_KERNEL, &urb->transfer_dma);
535 if (urb->transfer_buffer == NULL) { 525 if (urb->transfer_buffer == NULL) {
536 dev_err(&s->udev->dev, 526 dev_err(s->dev, "Failed to allocate urb buffer %d\n",
537 "Failed to allocate urb buffer %d\n",
538 i); 527 i);
539 msi2500_isoc_cleanup(s); 528 msi2500_isoc_cleanup(s);
540 return -ENOMEM; 529 return -ENOMEM;
@@ -554,13 +543,12 @@ static int msi2500_isoc_init(struct msi2500_state *s)
554 for (i = 0; i < MAX_ISO_BUFS; i++) { 543 for (i = 0; i < MAX_ISO_BUFS; i++) {
555 ret = usb_submit_urb(s->urbs[i], GFP_KERNEL); 544 ret = usb_submit_urb(s->urbs[i], GFP_KERNEL);
556 if (ret) { 545 if (ret) {
557 dev_err(&s->udev->dev, 546 dev_err(s->dev, "usb_submit_urb %d failed with error %d\n",
558 "isoc_init() submit_urb %d failed with error %d\n",
559 i, ret); 547 i, ret);
560 msi2500_isoc_cleanup(s); 548 msi2500_isoc_cleanup(s);
561 return ret; 549 return ret;
562 } 550 }
563 dev_dbg(&s->udev->dev, "URB 0x%p submitted.\n", s->urbs[i]); 551 dev_dbg(s->dev, "URB 0x%p submitted.\n", s->urbs[i]);
564 } 552 }
565 553
566 /* All is done... */ 554 /* All is done... */
@@ -570,9 +558,9 @@ static int msi2500_isoc_init(struct msi2500_state *s)
570/* Must be called with vb_queue_lock hold */ 558/* Must be called with vb_queue_lock hold */
571static void msi2500_cleanup_queued_bufs(struct msi2500_state *s) 559static void msi2500_cleanup_queued_bufs(struct msi2500_state *s)
572{ 560{
573 unsigned long flags = 0; 561 unsigned long flags;
574 562
575 dev_dbg(&s->udev->dev, "%s:\n", __func__); 563 dev_dbg(s->dev, "\n");
576 564
577 spin_lock_irqsave(&s->queued_bufs_lock, flags); 565 spin_lock_irqsave(&s->queued_bufs_lock, flags);
578 while (!list_empty(&s->queued_bufs)) { 566 while (!list_empty(&s->queued_bufs)) {
@@ -593,7 +581,7 @@ static void msi2500_disconnect(struct usb_interface *intf)
593 struct msi2500_state *s = 581 struct msi2500_state *s =
594 container_of(v, struct msi2500_state, v4l2_dev); 582 container_of(v, struct msi2500_state, v4l2_dev);
595 583
596 dev_dbg(&s->udev->dev, "%s:\n", __func__); 584 dev_dbg(s->dev, "\n");
597 585
598 mutex_lock(&s->vb_queue_lock); 586 mutex_lock(&s->vb_queue_lock);
599 mutex_lock(&s->v4l2_lock); 587 mutex_lock(&s->v4l2_lock);
@@ -613,7 +601,7 @@ static int msi2500_querycap(struct file *file, void *fh,
613{ 601{
614 struct msi2500_state *s = video_drvdata(file); 602 struct msi2500_state *s = video_drvdata(file);
615 603
616 dev_dbg(&s->udev->dev, "%s:\n", __func__); 604 dev_dbg(s->dev, "\n");
617 605
618 strlcpy(cap->driver, KBUILD_MODNAME, sizeof(cap->driver)); 606 strlcpy(cap->driver, KBUILD_MODNAME, sizeof(cap->driver));
619 strlcpy(cap->card, s->vdev.name, sizeof(cap->card)); 607 strlcpy(cap->card, s->vdev.name, sizeof(cap->card));
@@ -631,14 +619,13 @@ static int msi2500_queue_setup(struct vb2_queue *vq,
631{ 619{
632 struct msi2500_state *s = vb2_get_drv_priv(vq); 620 struct msi2500_state *s = vb2_get_drv_priv(vq);
633 621
634 dev_dbg(&s->udev->dev, "%s: *nbuffers=%d\n", __func__, *nbuffers); 622 dev_dbg(s->dev, "nbuffers=%d\n", *nbuffers);
635 623
636 /* Absolute min and max number of buffers available for mmap() */ 624 /* Absolute min and max number of buffers available for mmap() */
637 *nbuffers = clamp_t(unsigned int, *nbuffers, 8, 32); 625 *nbuffers = clamp_t(unsigned int, *nbuffers, 8, 32);
638 *nplanes = 1; 626 *nplanes = 1;
639 sizes[0] = PAGE_ALIGN(s->buffersize); 627 sizes[0] = PAGE_ALIGN(s->buffersize);
640 dev_dbg(&s->udev->dev, "%s: nbuffers=%d sizes[0]=%d\n", 628 dev_dbg(s->dev, "nbuffers=%d sizes[0]=%d\n", *nbuffers, sizes[0]);
641 __func__, *nbuffers, sizes[0]);
642 return 0; 629 return 0;
643} 630}
644 631
@@ -647,7 +634,7 @@ static void msi2500_buf_queue(struct vb2_buffer *vb)
647 struct msi2500_state *s = vb2_get_drv_priv(vb->vb2_queue); 634 struct msi2500_state *s = vb2_get_drv_priv(vb->vb2_queue);
648 struct msi2500_frame_buf *buf = 635 struct msi2500_frame_buf *buf =
649 container_of(vb, struct msi2500_frame_buf, vb); 636 container_of(vb, struct msi2500_frame_buf, vb);
650 unsigned long flags = 0; 637 unsigned long flags;
651 638
652 /* Check the device has not disconnected between prep and queuing */ 639 /* Check the device has not disconnected between prep and queuing */
653 if (unlikely(!s->udev)) { 640 if (unlikely(!s->udev)) {
@@ -665,16 +652,15 @@ static void msi2500_buf_queue(struct vb2_buffer *vb)
665#define CMD_STOP_STREAMING 0x45 652#define CMD_STOP_STREAMING 0x45
666#define CMD_READ_UNKNOW 0x48 653#define CMD_READ_UNKNOW 0x48
667 654
668#define msi2500_dbg_usb_control_msg(_udev, _r, _t, _v, _i, _b, _l) { \ 655#define msi2500_dbg_usb_control_msg(_dev, _r, _t, _v, _i, _b, _l) { \
669 char *_direction; \ 656 char *_direction; \
670 if (_t & USB_DIR_IN) \ 657 if (_t & USB_DIR_IN) \
671 _direction = "<<<"; \ 658 _direction = "<<<"; \
672 else \ 659 else \
673 _direction = ">>>"; \ 660 _direction = ">>>"; \
674 dev_dbg(&_udev->dev, "%s: %02x %02x %02x %02x %02x %02x %02x %02x " \ 661 dev_dbg(_dev, "%02x %02x %02x %02x %02x %02x %02x %02x %s %*ph\n", \
675 "%s %*ph\n", __func__, _t, _r, _v & 0xff, _v >> 8, \ 662 _t, _r, _v & 0xff, _v >> 8, _i & 0xff, _i >> 8, \
676 _i & 0xff, _i >> 8, _l & 0xff, _l >> 8, _direction, \ 663 _l & 0xff, _l >> 8, _direction, _l, _b); \
677 _l, _b); \
678} 664}
679 665
680static int msi2500_ctrl_msg(struct msi2500_state *s, u8 cmd, u32 data) 666static int msi2500_ctrl_msg(struct msi2500_state *s, u8 cmd, u32 data)
@@ -685,18 +671,16 @@ static int msi2500_ctrl_msg(struct msi2500_state *s, u8 cmd, u32 data)
685 u16 value = (data >> 0) & 0xffff; 671 u16 value = (data >> 0) & 0xffff;
686 u16 index = (data >> 16) & 0xffff; 672 u16 index = (data >> 16) & 0xffff;
687 673
688 msi2500_dbg_usb_control_msg(s->udev, 674 msi2500_dbg_usb_control_msg(s->dev,
689 request, requesttype, value, index, NULL, 0); 675 request, requesttype, value, index, NULL, 0);
690
691 ret = usb_control_msg(s->udev, usb_sndctrlpipe(s->udev, 0), 676 ret = usb_control_msg(s->udev, usb_sndctrlpipe(s->udev, 0),
692 request, requesttype, value, index, NULL, 0, 2000); 677 request, requesttype, value, index, NULL, 0, 2000);
693
694 if (ret) 678 if (ret)
695 dev_err(&s->udev->dev, "%s: failed %d, cmd %02x, data %04x\n", 679 dev_err(s->dev, "failed %d, cmd %02x, data %04x\n",
696 __func__, ret, cmd, data); 680 ret, cmd, data);
697 681
698 return ret; 682 return ret;
699}; 683}
700 684
701#define F_REF 24000000 685#define F_REF 24000000
702#define DIV_R_IN 2 686#define DIV_R_IN 2
@@ -785,8 +769,7 @@ static int msi2500_set_usb_adc(struct msi2500_state *s)
785 769
786 for (div_r_out = 4; div_r_out < 16; div_r_out += 2) { 770 for (div_r_out = 4; div_r_out < 16; div_r_out += 2) {
787 f_vco = f_sr * div_r_out * 12; 771 f_vco = f_sr * div_r_out * 12;
788 dev_dbg(&s->udev->dev, "%s: div_r_out=%d f_vco=%d\n", 772 dev_dbg(s->dev, "div_r_out=%d f_vco=%d\n", div_r_out, f_vco);
789 __func__, div_r_out, f_vco);
790 if (f_vco >= 202000000) 773 if (f_vco >= 202000000)
791 break; 774 break;
792 } 775 }
@@ -800,10 +783,8 @@ static int msi2500_set_usb_adc(struct msi2500_state *s)
800 reg3 |= ((fract >> 20) & 0x000001) << 15; /* [20] */ 783 reg3 |= ((fract >> 20) & 0x000001) << 15; /* [20] */
801 reg4 |= ((fract >> 0) & 0x0fffff) << 8; /* [19:0] */ 784 reg4 |= ((fract >> 0) & 0x0fffff) << 8; /* [19:0] */
802 785
803 dev_dbg(&s->udev->dev, 786 dev_dbg(s->dev, "f_sr=%d f_vco=%d div_n=%d div_m=%d div_r_out=%d reg3=%08x reg4=%08x\n",
804 "%s: f_sr=%d f_vco=%d div_n=%d div_m=%d div_r_out=%d reg3=%08x reg4=%08x\n", 787 f_sr, f_vco, div_n, div_m, div_r_out, reg3, reg4);
805 __func__, f_sr, f_vco, div_n, div_m, div_r_out, reg3,
806 reg4);
807 788
808 ret = msi2500_ctrl_msg(s, CMD_WREG, 0x00608008); 789 ret = msi2500_ctrl_msg(s, CMD_WREG, 0x00608008);
809 if (ret) 790 if (ret)
@@ -838,14 +819,14 @@ static int msi2500_set_usb_adc(struct msi2500_state *s)
838 goto err; 819 goto err;
839err: 820err:
840 return ret; 821 return ret;
841}; 822}
842 823
843static int msi2500_start_streaming(struct vb2_queue *vq, unsigned int count) 824static int msi2500_start_streaming(struct vb2_queue *vq, unsigned int count)
844{ 825{
845 struct msi2500_state *s = vb2_get_drv_priv(vq); 826 struct msi2500_state *s = vb2_get_drv_priv(vq);
846 int ret; 827 int ret;
847 828
848 dev_dbg(&s->udev->dev, "%s:\n", __func__); 829 dev_dbg(s->dev, "\n");
849 830
850 if (!s->udev) 831 if (!s->udev)
851 return -ENODEV; 832 return -ENODEV;
@@ -873,7 +854,7 @@ static void msi2500_stop_streaming(struct vb2_queue *vq)
873{ 854{
874 struct msi2500_state *s = vb2_get_drv_priv(vq); 855 struct msi2500_state *s = vb2_get_drv_priv(vq);
875 856
876 dev_dbg(&s->udev->dev, "%s:\n", __func__); 857 dev_dbg(s->dev, "\n");
877 858
878 mutex_lock(&s->v4l2_lock); 859 mutex_lock(&s->v4l2_lock);
879 860
@@ -909,7 +890,7 @@ static int msi2500_enum_fmt_sdr_cap(struct file *file, void *priv,
909{ 890{
910 struct msi2500_state *s = video_drvdata(file); 891 struct msi2500_state *s = video_drvdata(file);
911 892
912 dev_dbg(&s->udev->dev, "%s: index=%d\n", __func__, f->index); 893 dev_dbg(s->dev, "index=%d\n", f->index);
913 894
914 if (f->index >= s->num_formats) 895 if (f->index >= s->num_formats)
915 return -EINVAL; 896 return -EINVAL;
@@ -925,7 +906,7 @@ static int msi2500_g_fmt_sdr_cap(struct file *file, void *priv,
925{ 906{
926 struct msi2500_state *s = video_drvdata(file); 907 struct msi2500_state *s = video_drvdata(file);
927 908
928 dev_dbg(&s->udev->dev, "%s: pixelformat fourcc %4.4s\n", __func__, 909 dev_dbg(s->dev, "pixelformat fourcc %4.4s\n",
929 (char *)&s->pixelformat); 910 (char *)&s->pixelformat);
930 911
931 f->fmt.sdr.pixelformat = s->pixelformat; 912 f->fmt.sdr.pixelformat = s->pixelformat;
@@ -942,7 +923,7 @@ static int msi2500_s_fmt_sdr_cap(struct file *file, void *priv,
942 struct vb2_queue *q = &s->vb_queue; 923 struct vb2_queue *q = &s->vb_queue;
943 int i; 924 int i;
944 925
945 dev_dbg(&s->udev->dev, "%s: pixelformat fourcc %4.4s\n", __func__, 926 dev_dbg(s->dev, "pixelformat fourcc %4.4s\n",
946 (char *)&f->fmt.sdr.pixelformat); 927 (char *)&f->fmt.sdr.pixelformat);
947 928
948 if (vb2_is_busy(q)) 929 if (vb2_is_busy(q))
@@ -972,7 +953,7 @@ static int msi2500_try_fmt_sdr_cap(struct file *file, void *priv,
972 struct msi2500_state *s = video_drvdata(file); 953 struct msi2500_state *s = video_drvdata(file);
973 int i; 954 int i;
974 955
975 dev_dbg(&s->udev->dev, "%s: pixelformat fourcc %4.4s\n", __func__, 956 dev_dbg(s->dev, "pixelformat fourcc %4.4s\n",
976 (char *)&f->fmt.sdr.pixelformat); 957 (char *)&f->fmt.sdr.pixelformat);
977 958
978 memset(f->fmt.sdr.reserved, 0, sizeof(f->fmt.sdr.reserved)); 959 memset(f->fmt.sdr.reserved, 0, sizeof(f->fmt.sdr.reserved));
@@ -995,7 +976,7 @@ static int msi2500_s_tuner(struct file *file, void *priv,
995 struct msi2500_state *s = video_drvdata(file); 976 struct msi2500_state *s = video_drvdata(file);
996 int ret; 977 int ret;
997 978
998 dev_dbg(&s->udev->dev, "%s: index=%d\n", __func__, v->index); 979 dev_dbg(s->dev, "index=%d\n", v->index);
999 980
1000 if (v->index == 0) 981 if (v->index == 0)
1001 ret = 0; 982 ret = 0;
@@ -1012,7 +993,7 @@ static int msi2500_g_tuner(struct file *file, void *priv, struct v4l2_tuner *v)
1012 struct msi2500_state *s = video_drvdata(file); 993 struct msi2500_state *s = video_drvdata(file);
1013 int ret; 994 int ret;
1014 995
1015 dev_dbg(&s->udev->dev, "%s: index=%d\n", __func__, v->index); 996 dev_dbg(s->dev, "index=%d\n", v->index);
1016 997
1017 if (v->index == 0) { 998 if (v->index == 0) {
1018 strlcpy(v->name, "Mirics MSi2500", sizeof(v->name)); 999 strlcpy(v->name, "Mirics MSi2500", sizeof(v->name));
@@ -1036,8 +1017,7 @@ static int msi2500_g_frequency(struct file *file, void *priv,
1036 struct msi2500_state *s = video_drvdata(file); 1017 struct msi2500_state *s = video_drvdata(file);
1037 int ret = 0; 1018 int ret = 0;
1038 1019
1039 dev_dbg(&s->udev->dev, "%s: tuner=%d type=%d\n", 1020 dev_dbg(s->dev, "tuner=%d type=%d\n", f->tuner, f->type);
1040 __func__, f->tuner, f->type);
1041 1021
1042 if (f->tuner == 0) { 1022 if (f->tuner == 0) {
1043 f->frequency = s->f_adc; 1023 f->frequency = s->f_adc;
@@ -1058,15 +1038,14 @@ static int msi2500_s_frequency(struct file *file, void *priv,
1058 struct msi2500_state *s = video_drvdata(file); 1038 struct msi2500_state *s = video_drvdata(file);
1059 int ret; 1039 int ret;
1060 1040
1061 dev_dbg(&s->udev->dev, "%s: tuner=%d type=%d frequency=%u\n", 1041 dev_dbg(s->dev, "tuner=%d type=%d frequency=%u\n",
1062 __func__, f->tuner, f->type, f->frequency); 1042 f->tuner, f->type, f->frequency);
1063 1043
1064 if (f->tuner == 0) { 1044 if (f->tuner == 0) {
1065 s->f_adc = clamp_t(unsigned int, f->frequency, 1045 s->f_adc = clamp_t(unsigned int, f->frequency,
1066 bands[0].rangelow, 1046 bands[0].rangelow,
1067 bands[0].rangehigh); 1047 bands[0].rangehigh);
1068 dev_dbg(&s->udev->dev, "%s: ADC frequency=%u Hz\n", 1048 dev_dbg(s->dev, "ADC frequency=%u Hz\n", s->f_adc);
1069 __func__, s->f_adc);
1070 ret = msi2500_set_usb_adc(s); 1049 ret = msi2500_set_usb_adc(s);
1071 } else if (f->tuner == 1) { 1050 } else if (f->tuner == 1) {
1072 ret = v4l2_subdev_call(s->v4l2_subdev, tuner, s_frequency, f); 1051 ret = v4l2_subdev_call(s->v4l2_subdev, tuner, s_frequency, f);
@@ -1083,8 +1062,8 @@ static int msi2500_enum_freq_bands(struct file *file, void *priv,
1083 struct msi2500_state *s = video_drvdata(file); 1062 struct msi2500_state *s = video_drvdata(file);
1084 int ret; 1063 int ret;
1085 1064
1086 dev_dbg(&s->udev->dev, "%s: tuner=%d type=%d index=%d\n", 1065 dev_dbg(s->dev, "tuner=%d type=%d index=%d\n",
1087 __func__, band->tuner, band->type, band->index); 1066 band->tuner, band->type, band->index);
1088 1067
1089 if (band->tuner == 0) { 1068 if (band->tuner == 0) {
1090 if (band->index >= ARRAY_SIZE(bands)) { 1069 if (band->index >= ARRAY_SIZE(bands)) {
@@ -1169,8 +1148,7 @@ static int msi2500_transfer_one_message(struct spi_master *master,
1169 u32 data; 1148 u32 data;
1170 1149
1171 list_for_each_entry(t, &m->transfers, transfer_list) { 1150 list_for_each_entry(t, &m->transfers, transfer_list) {
1172 dev_dbg(&s->udev->dev, "%s: msg=%*ph\n", 1151 dev_dbg(s->dev, "msg=%*ph\n", t->len, t->tx_buf);
1173 __func__, t->len, t->tx_buf);
1174 data = 0x09; /* reg 9 is SPI adapter */ 1152 data = 0x09; /* reg 9 is SPI adapter */
1175 data |= ((u8 *)t->tx_buf)[0] << 8; 1153 data |= ((u8 *)t->tx_buf)[0] << 8;
1176 data |= ((u8 *)t->tx_buf)[1] << 16; 1154 data |= ((u8 *)t->tx_buf)[1] << 16;
@@ -1186,8 +1164,7 @@ static int msi2500_transfer_one_message(struct spi_master *master,
1186static int msi2500_probe(struct usb_interface *intf, 1164static int msi2500_probe(struct usb_interface *intf,
1187 const struct usb_device_id *id) 1165 const struct usb_device_id *id)
1188{ 1166{
1189 struct usb_device *udev = interface_to_usbdev(intf); 1167 struct msi2500_state *s;
1190 struct msi2500_state *s = NULL;
1191 struct v4l2_subdev *sd; 1168 struct v4l2_subdev *sd;
1192 struct spi_master *master; 1169 struct spi_master *master;
1193 int ret; 1170 int ret;
@@ -1200,7 +1177,7 @@ static int msi2500_probe(struct usb_interface *intf,
1200 1177
1201 s = kzalloc(sizeof(struct msi2500_state), GFP_KERNEL); 1178 s = kzalloc(sizeof(struct msi2500_state), GFP_KERNEL);
1202 if (s == NULL) { 1179 if (s == NULL) {
1203 pr_err("Could not allocate memory for msi2500_state\n"); 1180 dev_err(&intf->dev, "Could not allocate memory for state\n");
1204 return -ENOMEM; 1181 return -ENOMEM;
1205 } 1182 }
1206 1183
@@ -1208,12 +1185,13 @@ static int msi2500_probe(struct usb_interface *intf,
1208 mutex_init(&s->vb_queue_lock); 1185 mutex_init(&s->vb_queue_lock);
1209 spin_lock_init(&s->queued_bufs_lock); 1186 spin_lock_init(&s->queued_bufs_lock);
1210 INIT_LIST_HEAD(&s->queued_bufs); 1187 INIT_LIST_HEAD(&s->queued_bufs);
1211 s->udev = udev; 1188 s->dev = &intf->dev;
1189 s->udev = interface_to_usbdev(intf);
1212 s->f_adc = bands[0].rangelow; 1190 s->f_adc = bands[0].rangelow;
1213 s->pixelformat = formats[0].pixelformat; 1191 s->pixelformat = formats[0].pixelformat;
1214 s->buffersize = formats[0].buffersize; 1192 s->buffersize = formats[0].buffersize;
1215 s->num_formats = NUM_FORMATS; 1193 s->num_formats = NUM_FORMATS;
1216 if (msi2500_emulated_fmt == false) 1194 if (!msi2500_emulated_fmt)
1217 s->num_formats -= 2; 1195 s->num_formats -= 2;
1218 1196
1219 /* Init videobuf2 queue structure */ 1197 /* Init videobuf2 queue structure */
@@ -1226,7 +1204,7 @@ static int msi2500_probe(struct usb_interface *intf,
1226 s->vb_queue.timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; 1204 s->vb_queue.timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1227 ret = vb2_queue_init(&s->vb_queue); 1205 ret = vb2_queue_init(&s->vb_queue);
1228 if (ret) { 1206 if (ret) {
1229 dev_err(&s->udev->dev, "Could not initialize vb2 queue\n"); 1207 dev_err(s->dev, "Could not initialize vb2 queue\n");
1230 goto err_free_mem; 1208 goto err_free_mem;
1231 } 1209 }
1232 1210
@@ -1240,13 +1218,12 @@ static int msi2500_probe(struct usb_interface *intf,
1240 s->v4l2_dev.release = msi2500_video_release; 1218 s->v4l2_dev.release = msi2500_video_release;
1241 ret = v4l2_device_register(&intf->dev, &s->v4l2_dev); 1219 ret = v4l2_device_register(&intf->dev, &s->v4l2_dev);
1242 if (ret) { 1220 if (ret) {
1243 dev_err(&s->udev->dev, 1221 dev_err(s->dev, "Failed to register v4l2-device (%d)\n", ret);
1244 "Failed to register v4l2-device (%d)\n", ret);
1245 goto err_free_mem; 1222 goto err_free_mem;
1246 } 1223 }
1247 1224
1248 /* SPI master adapter */ 1225 /* SPI master adapter */
1249 master = spi_alloc_master(&s->udev->dev, 0); 1226 master = spi_alloc_master(s->dev, 0);
1250 if (master == NULL) { 1227 if (master == NULL) {
1251 ret = -ENOMEM; 1228 ret = -ENOMEM;
1252 goto err_unregister_v4l2_dev; 1229 goto err_unregister_v4l2_dev;
@@ -1267,7 +1244,7 @@ static int msi2500_probe(struct usb_interface *intf,
1267 sd = v4l2_spi_new_subdev(&s->v4l2_dev, master, &board_info); 1244 sd = v4l2_spi_new_subdev(&s->v4l2_dev, master, &board_info);
1268 s->v4l2_subdev = sd; 1245 s->v4l2_subdev = sd;
1269 if (sd == NULL) { 1246 if (sd == NULL) {
1270 dev_err(&s->udev->dev, "cannot get v4l2 subdevice\n"); 1247 dev_err(s->dev, "cannot get v4l2 subdevice\n");
1271 ret = -ENODEV; 1248 ret = -ENODEV;
1272 goto err_unregister_master; 1249 goto err_unregister_master;
1273 } 1250 }
@@ -1276,7 +1253,7 @@ static int msi2500_probe(struct usb_interface *intf,
1276 v4l2_ctrl_handler_init(&s->hdl, 0); 1253 v4l2_ctrl_handler_init(&s->hdl, 0);
1277 if (s->hdl.error) { 1254 if (s->hdl.error) {
1278 ret = s->hdl.error; 1255 ret = s->hdl.error;
1279 dev_err(&s->udev->dev, "Could not initialize controls\n"); 1256 dev_err(s->dev, "Could not initialize controls\n");
1280 goto err_free_controls; 1257 goto err_free_controls;
1281 } 1258 }
1282 1259
@@ -1289,16 +1266,13 @@ static int msi2500_probe(struct usb_interface *intf,
1289 1266
1290 ret = video_register_device(&s->vdev, VFL_TYPE_SDR, -1); 1267 ret = video_register_device(&s->vdev, VFL_TYPE_SDR, -1);
1291 if (ret) { 1268 if (ret) {
1292 dev_err(&s->udev->dev, 1269 dev_err(s->dev, "Failed to register as video device (%d)\n",
1293 "Failed to register as video device (%d)\n",
1294 ret); 1270 ret);
1295 goto err_unregister_v4l2_dev; 1271 goto err_unregister_v4l2_dev;
1296 } 1272 }
1297 dev_info(&s->udev->dev, "Registered as %s\n", 1273 dev_info(s->dev, "Registered as %s\n",
1298 video_device_node_name(&s->vdev)); 1274 video_device_node_name(&s->vdev));
1299 dev_notice(&s->udev->dev, 1275 dev_notice(s->dev, "SDR API is still slightly experimental and functionality changes may follow\n");
1300 "%s: SDR API is still slightly experimental and functionality changes may follow\n",
1301 KBUILD_MODNAME);
1302 1276
1303 return 0; 1277 return 0;
1304 1278
diff --git a/drivers/media/usb/pwc/pwc-v4l.c b/drivers/media/usb/pwc/pwc-v4l.c
index aa7449eaca08..3d987984602f 100644
--- a/drivers/media/usb/pwc/pwc-v4l.c
+++ b/drivers/media/usb/pwc/pwc-v4l.c
@@ -52,7 +52,7 @@ enum { custom_autocontour, custom_contour, custom_noise_reduction,
52 custom_awb_speed, custom_awb_delay, 52 custom_awb_speed, custom_awb_delay,
53 custom_save_user, custom_restore_user, custom_restore_factory }; 53 custom_save_user, custom_restore_user, custom_restore_factory };
54 54
55const char * const pwc_auto_whitebal_qmenu[] = { 55static const char * const pwc_auto_whitebal_qmenu[] = {
56 "Indoor (Incandescant Lighting) Mode", 56 "Indoor (Incandescant Lighting) Mode",
57 "Outdoor (Sunlight) Mode", 57 "Outdoor (Sunlight) Mode",
58 "Indoor (Fluorescent Lighting) Mode", 58 "Indoor (Fluorescent Lighting) Mode",
diff --git a/drivers/media/usb/s2255/s2255drv.c b/drivers/media/usb/s2255/s2255drv.c
index 2c901861034a..ccc00099b261 100644
--- a/drivers/media/usb/s2255/s2255drv.c
+++ b/drivers/media/usb/s2255/s2255drv.c
@@ -2245,7 +2245,7 @@ static int s2255_probe(struct usb_interface *interface,
2245 } 2245 }
2246 2246
2247 atomic_set(&dev->num_channels, 0); 2247 atomic_set(&dev->num_channels, 0);
2248 dev->pid = le16_to_cpu(id->idProduct); 2248 dev->pid = id->idProduct;
2249 dev->fw_data = kzalloc(sizeof(struct s2255_fw), GFP_KERNEL); 2249 dev->fw_data = kzalloc(sizeof(struct s2255_fw), GFP_KERNEL);
2250 if (!dev->fw_data) 2250 if (!dev->fw_data)
2251 goto errorFWDATA1; 2251 goto errorFWDATA1;
diff --git a/drivers/media/usb/siano/smsusb.c b/drivers/media/usb/siano/smsusb.c
index 1836a416d806..94e10b10b66e 100644
--- a/drivers/media/usb/siano/smsusb.c
+++ b/drivers/media/usb/siano/smsusb.c
@@ -277,14 +277,14 @@ static int smsusb1_load_firmware(struct usb_device *udev, int id, int board_id)
277 rc = usb_bulk_msg(udev, usb_sndbulkpipe(udev, 2), 277 rc = usb_bulk_msg(udev, usb_sndbulkpipe(udev, 2),
278 fw_buffer, fw->size, &dummy, 1000); 278 fw_buffer, fw->size, &dummy, 1000);
279 279
280 sms_info("sent %zd(%d) bytes, rc %d", fw->size, dummy, rc); 280 sms_info("sent %zu(%d) bytes, rc %d", fw->size, dummy, rc);
281 281
282 kfree(fw_buffer); 282 kfree(fw_buffer);
283 } else { 283 } else {
284 sms_err("failed to allocate firmware buffer"); 284 sms_err("failed to allocate firmware buffer");
285 rc = -ENOMEM; 285 rc = -ENOMEM;
286 } 286 }
287 sms_info("read FW %s, size=%zd", fw_filename, fw->size); 287 sms_info("read FW %s, size=%zu", fw_filename, fw->size);
288 288
289 release_firmware(fw); 289 release_firmware(fw);
290 290
@@ -655,6 +655,8 @@ static const struct usb_device_id smsusb_id_table[] = {
655 .driver_info = SMS1XXX_BOARD_ONDA_MDTV_DATA_CARD }, 655 .driver_info = SMS1XXX_BOARD_ONDA_MDTV_DATA_CARD },
656 { USB_DEVICE(0x3275, 0x0080), 656 { USB_DEVICE(0x3275, 0x0080),
657 .driver_info = SMS1XXX_BOARD_SIANO_RIO }, 657 .driver_info = SMS1XXX_BOARD_SIANO_RIO },
658 { USB_DEVICE(0x2013, 0x0257),
659 .driver_info = SMS1XXX_BOARD_PCTV_77E },
658 { } /* Terminating entry */ 660 { } /* Terminating entry */
659 }; 661 };
660 662
diff --git a/drivers/media/usb/ttusb-dec/ttusbdecfe.c b/drivers/media/usb/ttusb-dec/ttusbdecfe.c
index 5c45c9d0712d..9c29552aedec 100644
--- a/drivers/media/usb/ttusb-dec/ttusbdecfe.c
+++ b/drivers/media/usb/ttusb-dec/ttusbdecfe.c
@@ -156,6 +156,9 @@ static int ttusbdecfe_dvbs_diseqc_send_master_cmd(struct dvb_frontend* fe, struc
156 0x00, 0x00, 0x00, 0x00, 156 0x00, 0x00, 0x00, 0x00,
157 0x00, 0x00 }; 157 0x00, 0x00 };
158 158
159 if (cmd->msg_len > sizeof(b) - 4)
160 return -EINVAL;
161
159 memcpy(&b[4], cmd->msg, cmd->msg_len); 162 memcpy(&b[4], cmd->msg, cmd->msg_len);
160 163
161 state->config->send_command(fe, 0x72, 164 state->config->send_command(fe, 0x72,
diff --git a/drivers/media/usb/usbtv/Kconfig b/drivers/media/usb/usbtv/Kconfig
index 7c5b86006ee6..b833c5b9094e 100644
--- a/drivers/media/usb/usbtv/Kconfig
+++ b/drivers/media/usb/usbtv/Kconfig
@@ -1,6 +1,7 @@
1config VIDEO_USBTV 1config VIDEO_USBTV
2 tristate "USBTV007 video capture support" 2 tristate "USBTV007 video capture support"
3 depends on VIDEO_V4L2 3 depends on VIDEO_V4L2 && SND
4 select SND_PCM
4 select VIDEOBUF2_VMALLOC 5 select VIDEOBUF2_VMALLOC
5 6
6 ---help--- 7 ---help---
diff --git a/drivers/media/usb/usbtv/Makefile b/drivers/media/usb/usbtv/Makefile
index 775316a88ea6..f555cf8a3dd2 100644
--- a/drivers/media/usb/usbtv/Makefile
+++ b/drivers/media/usb/usbtv/Makefile
@@ -1,4 +1,5 @@
1usbtv-y := usbtv-core.o \ 1usbtv-y := usbtv-core.o \
2 usbtv-video.o 2 usbtv-video.o \
3 usbtv-audio.o
3 4
4obj-$(CONFIG_VIDEO_USBTV) += usbtv.o 5obj-$(CONFIG_VIDEO_USBTV) += usbtv.o
diff --git a/drivers/media/usb/usbtv/usbtv-audio.c b/drivers/media/usb/usbtv/usbtv-audio.c
new file mode 100644
index 000000000000..78c12d22dfbb
--- /dev/null
+++ b/drivers/media/usb/usbtv/usbtv-audio.c
@@ -0,0 +1,385 @@
1/*
2 * Fushicai USBTV007 Audio-Video Grabber Driver
3 *
4 * Product web site:
5 * http://www.fushicai.com/products_detail/&productId=d05449ee-b690-42f9-a661-aa7353894bed.html
6 *
7 * Copyright (c) 2013 Federico Simoncelli
8 * All rights reserved.
9 * No physical hardware was harmed running Windows during the
10 * reverse-engineering activity
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions, and the following disclaimer,
17 * without modification.
18 * 2. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
20 *
21 * Alternatively, this software may be distributed under the terms of the
22 * GNU General Public License ("GPL").
23 */
24
25#include <sound/core.h>
26#include <sound/initval.h>
27#include <sound/ac97_codec.h>
28#include <sound/pcm_params.h>
29
30#include "usbtv.h"
31
32static struct snd_pcm_hardware snd_usbtv_digital_hw = {
33 .info = SNDRV_PCM_INFO_BATCH |
34 SNDRV_PCM_INFO_MMAP |
35 SNDRV_PCM_INFO_INTERLEAVED |
36 SNDRV_PCM_INFO_BLOCK_TRANSFER |
37 SNDRV_PCM_INFO_MMAP_VALID,
38 .formats = SNDRV_PCM_FMTBIT_S16_LE,
39 .rates = SNDRV_PCM_RATE_48000,
40 .rate_min = 48000,
41 .rate_max = 48000,
42 .channels_min = 2,
43 .channels_max = 2,
44 .period_bytes_min = 11059,
45 .period_bytes_max = 13516,
46 .periods_min = 2,
47 .periods_max = 98,
48 .buffer_bytes_max = 62720 * 8, /* value in usbaudio.c */
49};
50
51static int snd_usbtv_pcm_open(struct snd_pcm_substream *substream)
52{
53 struct usbtv *chip = snd_pcm_substream_chip(substream);
54 struct snd_pcm_runtime *runtime = substream->runtime;
55
56 chip->snd_substream = substream;
57 runtime->hw = snd_usbtv_digital_hw;
58
59 return 0;
60}
61
62static int snd_usbtv_pcm_close(struct snd_pcm_substream *substream)
63{
64 struct usbtv *chip = snd_pcm_substream_chip(substream);
65
66 if (atomic_read(&chip->snd_stream)) {
67 atomic_set(&chip->snd_stream, 0);
68 schedule_work(&chip->snd_trigger);
69 }
70
71 return 0;
72}
73
74static int snd_usbtv_hw_params(struct snd_pcm_substream *substream,
75 struct snd_pcm_hw_params *hw_params)
76{
77 int rv;
78 struct usbtv *chip = snd_pcm_substream_chip(substream);
79
80 rv = snd_pcm_lib_malloc_pages(substream,
81 params_buffer_bytes(hw_params));
82
83 if (rv < 0) {
84 dev_warn(chip->dev, "pcm audio buffer allocation failure %i\n",
85 rv);
86 return rv;
87 }
88
89 return 0;
90}
91
92static int snd_usbtv_hw_free(struct snd_pcm_substream *substream)
93{
94 snd_pcm_lib_free_pages(substream);
95 return 0;
96}
97
98static int snd_usbtv_prepare(struct snd_pcm_substream *substream)
99{
100 struct usbtv *chip = snd_pcm_substream_chip(substream);
101
102 chip->snd_buffer_pos = 0;
103 chip->snd_period_pos = 0;
104
105 return 0;
106}
107
108static void usbtv_audio_urb_received(struct urb *urb)
109{
110 struct usbtv *chip = urb->context;
111 struct snd_pcm_substream *substream = chip->snd_substream;
112 struct snd_pcm_runtime *runtime = substream->runtime;
113 size_t i, frame_bytes, chunk_length, buffer_pos, period_pos;
114 int period_elapsed;
115 void *urb_current;
116
117 switch (urb->status) {
118 case 0:
119 case -ETIMEDOUT:
120 break;
121 case -ENOENT:
122 case -EPROTO:
123 case -ECONNRESET:
124 case -ESHUTDOWN:
125 return;
126 default:
127 dev_warn(chip->dev, "unknown audio urb status %i\n",
128 urb->status);
129 }
130
131 if (!atomic_read(&chip->snd_stream))
132 return;
133
134 frame_bytes = runtime->frame_bits >> 3;
135 chunk_length = USBTV_CHUNK / frame_bytes;
136
137 buffer_pos = chip->snd_buffer_pos;
138 period_pos = chip->snd_period_pos;
139 period_elapsed = 0;
140
141 for (i = 0; i < urb->actual_length; i += USBTV_CHUNK_SIZE) {
142 urb_current = urb->transfer_buffer + i + USBTV_AUDIO_HDRSIZE;
143
144 if (buffer_pos + chunk_length >= runtime->buffer_size) {
145 size_t cnt = (runtime->buffer_size - buffer_pos) *
146 frame_bytes;
147 memcpy(runtime->dma_area + buffer_pos * frame_bytes,
148 urb_current, cnt);
149 memcpy(runtime->dma_area, urb_current + cnt,
150 chunk_length * frame_bytes - cnt);
151 } else {
152 memcpy(runtime->dma_area + buffer_pos * frame_bytes,
153 urb_current, chunk_length * frame_bytes);
154 }
155
156 buffer_pos += chunk_length;
157 period_pos += chunk_length;
158
159 if (buffer_pos >= runtime->buffer_size)
160 buffer_pos -= runtime->buffer_size;
161
162 if (period_pos >= runtime->period_size) {
163 period_pos -= runtime->period_size;
164 period_elapsed = 1;
165 }
166 }
167
168 snd_pcm_stream_lock(substream);
169
170 chip->snd_buffer_pos = buffer_pos;
171 chip->snd_period_pos = period_pos;
172
173 snd_pcm_stream_unlock(substream);
174
175 if (period_elapsed)
176 snd_pcm_period_elapsed(substream);
177
178 usb_submit_urb(urb, GFP_ATOMIC);
179}
180
181static int usbtv_audio_start(struct usbtv *chip)
182{
183 unsigned int pipe;
184 static const u16 setup[][2] = {
185 /* These seem to enable the device. */
186 { USBTV_BASE + 0x0008, 0x0001 },
187 { USBTV_BASE + 0x01d0, 0x00ff },
188 { USBTV_BASE + 0x01d9, 0x0002 },
189
190 { USBTV_BASE + 0x01da, 0x0013 },
191 { USBTV_BASE + 0x01db, 0x0012 },
192 { USBTV_BASE + 0x01e9, 0x0002 },
193 { USBTV_BASE + 0x01ec, 0x006c },
194 { USBTV_BASE + 0x0294, 0x0020 },
195 { USBTV_BASE + 0x0255, 0x00cf },
196 { USBTV_BASE + 0x0256, 0x0020 },
197 { USBTV_BASE + 0x01eb, 0x0030 },
198 { USBTV_BASE + 0x027d, 0x00a6 },
199 { USBTV_BASE + 0x0280, 0x0011 },
200 { USBTV_BASE + 0x0281, 0x0040 },
201 { USBTV_BASE + 0x0282, 0x0011 },
202 { USBTV_BASE + 0x0283, 0x0040 },
203 { 0xf891, 0x0010 },
204
205 /* this sets the input from composite */
206 { USBTV_BASE + 0x0284, 0x00aa },
207 };
208
209 chip->snd_bulk_urb = usb_alloc_urb(0, GFP_KERNEL);
210 if (chip->snd_bulk_urb == NULL)
211 goto err_alloc_urb;
212
213 pipe = usb_rcvbulkpipe(chip->udev, USBTV_AUDIO_ENDP);
214
215 chip->snd_bulk_urb->transfer_buffer = kzalloc(
216 USBTV_AUDIO_URBSIZE, GFP_KERNEL);
217 if (chip->snd_bulk_urb->transfer_buffer == NULL)
218 goto err_transfer_buffer;
219
220 usb_fill_bulk_urb(chip->snd_bulk_urb, chip->udev, pipe,
221 chip->snd_bulk_urb->transfer_buffer, USBTV_AUDIO_URBSIZE,
222 usbtv_audio_urb_received, chip);
223
224 /* starting the stream */
225 usbtv_set_regs(chip, setup, ARRAY_SIZE(setup));
226
227 usb_clear_halt(chip->udev, pipe);
228 usb_submit_urb(chip->snd_bulk_urb, GFP_ATOMIC);
229
230 return 0;
231
232err_transfer_buffer:
233 usb_free_urb(chip->snd_bulk_urb);
234 chip->snd_bulk_urb = NULL;
235
236err_alloc_urb:
237 return -ENOMEM;
238}
239
240static int usbtv_audio_stop(struct usbtv *chip)
241{
242 static const u16 setup[][2] = {
243 /* The original windows driver sometimes sends also:
244 * { USBTV_BASE + 0x00a2, 0x0013 }
245 * but it seems useless and its real effects are untested at
246 * the moment.
247 */
248 { USBTV_BASE + 0x027d, 0x0000 },
249 { USBTV_BASE + 0x0280, 0x0010 },
250 { USBTV_BASE + 0x0282, 0x0010 },
251 };
252
253 if (chip->snd_bulk_urb) {
254 usb_kill_urb(chip->snd_bulk_urb);
255 kfree(chip->snd_bulk_urb->transfer_buffer);
256 usb_free_urb(chip->snd_bulk_urb);
257 chip->snd_bulk_urb = NULL;
258 }
259
260 usbtv_set_regs(chip, setup, ARRAY_SIZE(setup));
261
262 return 0;
263}
264
265void usbtv_audio_suspend(struct usbtv *usbtv)
266{
267 if (atomic_read(&usbtv->snd_stream) && usbtv->snd_bulk_urb)
268 usb_kill_urb(usbtv->snd_bulk_urb);
269}
270
271void usbtv_audio_resume(struct usbtv *usbtv)
272{
273 if (atomic_read(&usbtv->snd_stream) && usbtv->snd_bulk_urb)
274 usb_submit_urb(usbtv->snd_bulk_urb, GFP_ATOMIC);
275}
276
277static void snd_usbtv_trigger(struct work_struct *work)
278{
279 struct usbtv *chip = container_of(work, struct usbtv, snd_trigger);
280
281 if (atomic_read(&chip->snd_stream))
282 usbtv_audio_start(chip);
283 else
284 usbtv_audio_stop(chip);
285}
286
287static int snd_usbtv_card_trigger(struct snd_pcm_substream *substream, int cmd)
288{
289 struct usbtv *chip = snd_pcm_substream_chip(substream);
290
291 switch (cmd) {
292 case SNDRV_PCM_TRIGGER_START:
293 case SNDRV_PCM_TRIGGER_RESUME:
294 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
295 atomic_set(&chip->snd_stream, 1);
296 break;
297 case SNDRV_PCM_TRIGGER_STOP:
298 case SNDRV_PCM_TRIGGER_SUSPEND:
299 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
300 atomic_set(&chip->snd_stream, 0);
301 break;
302 default:
303 return -EINVAL;
304 }
305
306 schedule_work(&chip->snd_trigger);
307
308 return 0;
309}
310
311static snd_pcm_uframes_t snd_usbtv_pointer(struct snd_pcm_substream *substream)
312{
313 struct usbtv *chip = snd_pcm_substream_chip(substream);
314
315 return chip->snd_buffer_pos;
316}
317
318static struct snd_pcm_ops snd_usbtv_pcm_ops = {
319 .open = snd_usbtv_pcm_open,
320 .close = snd_usbtv_pcm_close,
321 .ioctl = snd_pcm_lib_ioctl,
322 .hw_params = snd_usbtv_hw_params,
323 .hw_free = snd_usbtv_hw_free,
324 .prepare = snd_usbtv_prepare,
325 .trigger = snd_usbtv_card_trigger,
326 .pointer = snd_usbtv_pointer,
327};
328
329int usbtv_audio_init(struct usbtv *usbtv)
330{
331 int rv;
332 struct snd_card *card;
333 struct snd_pcm *pcm;
334
335 INIT_WORK(&usbtv->snd_trigger, snd_usbtv_trigger);
336 atomic_set(&usbtv->snd_stream, 0);
337
338 rv = snd_card_new(&usbtv->udev->dev, SNDRV_DEFAULT_IDX1, "usbtv",
339 THIS_MODULE, 0, &card);
340 if (rv < 0)
341 return rv;
342
343 strlcpy(card->driver, usbtv->dev->driver->name, sizeof(card->driver));
344 strlcpy(card->shortname, "usbtv", sizeof(card->shortname));
345 snprintf(card->longname, sizeof(card->longname),
346 "USBTV Audio at bus %d device %d", usbtv->udev->bus->busnum,
347 usbtv->udev->devnum);
348
349 snd_card_set_dev(card, usbtv->dev);
350
351 usbtv->snd = card;
352
353 rv = snd_pcm_new(card, "USBTV Audio", 0, 0, 1, &pcm);
354 if (rv < 0)
355 goto err;
356
357 strlcpy(pcm->name, "USBTV Audio Input", sizeof(pcm->name));
358 pcm->info_flags = 0;
359 pcm->private_data = usbtv;
360
361 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_usbtv_pcm_ops);
362 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_CONTINUOUS,
363 snd_dma_continuous_data(GFP_KERNEL), USBTV_AUDIO_BUFFER,
364 USBTV_AUDIO_BUFFER);
365
366 rv = snd_card_register(card);
367 if (rv)
368 goto err;
369
370 return 0;
371
372err:
373 usbtv->snd = NULL;
374 snd_card_free(card);
375
376 return rv;
377}
378
379void usbtv_audio_free(struct usbtv *usbtv)
380{
381 if (usbtv->snd && usbtv->udev) {
382 snd_card_free(usbtv->snd);
383 usbtv->snd = NULL;
384 }
385}
diff --git a/drivers/media/usb/usbtv/usbtv-core.c b/drivers/media/usb/usbtv/usbtv-core.c
index 473fab81b602..29428bef272c 100644
--- a/drivers/media/usb/usbtv/usbtv-core.c
+++ b/drivers/media/usb/usbtv/usbtv-core.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Fushicai USBTV007 Video Grabber Driver 2 * Fushicai USBTV007 Audio-Video Grabber Driver
3 * 3 *
4 * Product web site: 4 * Product web site:
5 * http://www.fushicai.com/products_detail/&productId=d05449ee-b690-42f9-a661-aa7353894bed.html 5 * http://www.fushicai.com/products_detail/&productId=d05449ee-b690-42f9-a661-aa7353894bed.html
@@ -84,12 +84,19 @@ static int usbtv_probe(struct usb_interface *intf,
84 if (ret < 0) 84 if (ret < 0)
85 goto usbtv_video_fail; 85 goto usbtv_video_fail;
86 86
87 ret = usbtv_audio_init(usbtv);
88 if (ret < 0)
89 goto usbtv_audio_fail;
90
87 /* for simplicity we exploit the v4l2_device reference counting */ 91 /* for simplicity we exploit the v4l2_device reference counting */
88 v4l2_device_get(&usbtv->v4l2_dev); 92 v4l2_device_get(&usbtv->v4l2_dev);
89 93
90 dev_info(dev, "Fushicai USBTV007 Video Grabber\n"); 94 dev_info(dev, "Fushicai USBTV007 Audio-Video Grabber\n");
91 return 0; 95 return 0;
92 96
97usbtv_audio_fail:
98 usbtv_video_free(usbtv);
99
93usbtv_video_fail: 100usbtv_video_fail:
94 usb_set_intfdata(intf, NULL); 101 usb_set_intfdata(intf, NULL);
95 usb_put_dev(usbtv->udev); 102 usb_put_dev(usbtv->udev);
@@ -101,11 +108,13 @@ usbtv_video_fail:
101static void usbtv_disconnect(struct usb_interface *intf) 108static void usbtv_disconnect(struct usb_interface *intf)
102{ 109{
103 struct usbtv *usbtv = usb_get_intfdata(intf); 110 struct usbtv *usbtv = usb_get_intfdata(intf);
111
104 usb_set_intfdata(intf, NULL); 112 usb_set_intfdata(intf, NULL);
105 113
106 if (!usbtv) 114 if (!usbtv)
107 return; 115 return;
108 116
117 usbtv_audio_free(usbtv);
109 usbtv_video_free(usbtv); 118 usbtv_video_free(usbtv);
110 119
111 usb_put_dev(usbtv->udev); 120 usb_put_dev(usbtv->udev);
@@ -122,8 +131,8 @@ static struct usb_device_id usbtv_id_table[] = {
122}; 131};
123MODULE_DEVICE_TABLE(usb, usbtv_id_table); 132MODULE_DEVICE_TABLE(usb, usbtv_id_table);
124 133
125MODULE_AUTHOR("Lubomir Rintel"); 134MODULE_AUTHOR("Lubomir Rintel, Federico Simoncelli");
126MODULE_DESCRIPTION("Fushicai USBTV007 Video Grabber Driver"); 135MODULE_DESCRIPTION("Fushicai USBTV007 Audio-Video Grabber Driver");
127MODULE_LICENSE("Dual BSD/GPL"); 136MODULE_LICENSE("Dual BSD/GPL");
128 137
129static struct usb_driver usbtv_usb_driver = { 138static struct usb_driver usbtv_usb_driver = {
diff --git a/drivers/media/usb/usbtv/usbtv-video.c b/drivers/media/usb/usbtv/usbtv-video.c
index 030c5854b4b3..9d3525f659f0 100644
--- a/drivers/media/usb/usbtv/usbtv-video.c
+++ b/drivers/media/usb/usbtv/usbtv-video.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Fushicai USBTV007 Video Grabber Driver 2 * Fushicai USBTV007 Audio-Video Grabber Driver
3 * 3 *
4 * Product web site: 4 * Product web site:
5 * http://www.fushicai.com/products_detail/&productId=d05449ee-b690-42f9-a661-aa7353894bed.html 5 * http://www.fushicai.com/products_detail/&productId=d05449ee-b690-42f9-a661-aa7353894bed.html
@@ -79,7 +79,6 @@ static int usbtv_select_input(struct usbtv *usbtv, int input)
79 { USBTV_BASE + 0x011f, 0x00f2 }, 79 { USBTV_BASE + 0x011f, 0x00f2 },
80 { USBTV_BASE + 0x0127, 0x0060 }, 80 { USBTV_BASE + 0x0127, 0x0060 },
81 { USBTV_BASE + 0x00ae, 0x0010 }, 81 { USBTV_BASE + 0x00ae, 0x0010 },
82 { USBTV_BASE + 0x0284, 0x00aa },
83 { USBTV_BASE + 0x0239, 0x0060 }, 82 { USBTV_BASE + 0x0239, 0x0060 },
84 }; 83 };
85 84
@@ -88,7 +87,6 @@ static int usbtv_select_input(struct usbtv *usbtv, int input)
88 { USBTV_BASE + 0x011f, 0x00ff }, 87 { USBTV_BASE + 0x011f, 0x00ff },
89 { USBTV_BASE + 0x0127, 0x0060 }, 88 { USBTV_BASE + 0x0127, 0x0060 },
90 { USBTV_BASE + 0x00ae, 0x0030 }, 89 { USBTV_BASE + 0x00ae, 0x0030 },
91 { USBTV_BASE + 0x0284, 0x0088 },
92 { USBTV_BASE + 0x0239, 0x0060 }, 90 { USBTV_BASE + 0x0239, 0x0060 },
93 }; 91 };
94 92
@@ -225,7 +223,6 @@ static int usbtv_setup_capture(struct usbtv *usbtv)
225 { USBTV_BASE + 0x0159, 0x0006 }, 223 { USBTV_BASE + 0x0159, 0x0006 },
226 { USBTV_BASE + 0x015d, 0x0000 }, 224 { USBTV_BASE + 0x015d, 0x0000 },
227 225
228 { USBTV_BASE + 0x0284, 0x0088 },
229 { USBTV_BASE + 0x0003, 0x0004 }, 226 { USBTV_BASE + 0x0003, 0x0004 },
230 { USBTV_BASE + 0x0100, 0x00d3 }, 227 { USBTV_BASE + 0x0100, 0x00d3 },
231 { USBTV_BASE + 0x0115, 0x0015 }, 228 { USBTV_BASE + 0x0115, 0x0015 },
@@ -256,7 +253,7 @@ static int usbtv_setup_capture(struct usbtv *usbtv)
256 * 720 pixel lines, as the chunk is 240 words long, which is 480 pixels. 253 * 720 pixel lines, as the chunk is 240 words long, which is 480 pixels.
257 * Therefore, we break down the chunk into two halves before copyting, 254 * Therefore, we break down the chunk into two halves before copyting,
258 * so that we can interleave a line if needed. */ 255 * so that we can interleave a line if needed. */
259static void usbtv_chunk_to_vbuf(u32 *frame, u32 *src, int chunk_no, int odd) 256static void usbtv_chunk_to_vbuf(u32 *frame, __be32 *src, int chunk_no, int odd)
260{ 257{
261 int half; 258 int half;
262 259
@@ -266,6 +263,7 @@ static void usbtv_chunk_to_vbuf(u32 *frame, u32 *src, int chunk_no, int odd)
266 int part_index = (line * 2 + !odd) * 3 + (part_no % 3); 263 int part_index = (line * 2 + !odd) * 3 + (part_no % 3);
267 264
268 u32 *dst = &frame[part_index * USBTV_CHUNK/2]; 265 u32 *dst = &frame[part_index * USBTV_CHUNK/2];
266
269 memcpy(dst, src, USBTV_CHUNK/2 * sizeof(*src)); 267 memcpy(dst, src, USBTV_CHUNK/2 * sizeof(*src));
270 src += USBTV_CHUNK/2; 268 src += USBTV_CHUNK/2;
271 } 269 }
@@ -274,7 +272,7 @@ static void usbtv_chunk_to_vbuf(u32 *frame, u32 *src, int chunk_no, int odd)
274/* Called for each 256-byte image chunk. 272/* Called for each 256-byte image chunk.
275 * First word identifies the chunk, followed by 240 words of image 273 * First word identifies the chunk, followed by 240 words of image
276 * data and padding. */ 274 * data and padding. */
277static void usbtv_image_chunk(struct usbtv *usbtv, u32 *chunk) 275static void usbtv_image_chunk(struct usbtv *usbtv, __be32 *chunk)
278{ 276{
279 int frame_id, odd, chunk_no; 277 int frame_id, odd, chunk_no;
280 u32 *frame; 278 u32 *frame;
@@ -365,7 +363,7 @@ static void usbtv_iso_cb(struct urb *ip)
365 363
366 for (offset = 0; USBTV_CHUNK_SIZE * offset < size; offset++) 364 for (offset = 0; USBTV_CHUNK_SIZE * offset < size; offset++)
367 usbtv_image_chunk(usbtv, 365 usbtv_image_chunk(usbtv,
368 (u32 *)&data[USBTV_CHUNK_SIZE * offset]); 366 (__be32 *)&data[USBTV_CHUNK_SIZE * offset]);
369 } 367 }
370 368
371resubmit: 369resubmit:
@@ -410,6 +408,7 @@ static void usbtv_stop(struct usbtv *usbtv)
410 /* Cancel running transfers. */ 408 /* Cancel running transfers. */
411 for (i = 0; i < USBTV_ISOC_TRANSFERS; i++) { 409 for (i = 0; i < USBTV_ISOC_TRANSFERS; i++) {
412 struct urb *ip = usbtv->isoc_urbs[i]; 410 struct urb *ip = usbtv->isoc_urbs[i];
411
413 if (ip == NULL) 412 if (ip == NULL)
414 continue; 413 continue;
415 usb_kill_urb(ip); 414 usb_kill_urb(ip);
@@ -434,6 +433,8 @@ static int usbtv_start(struct usbtv *usbtv)
434 int i; 433 int i;
435 int ret; 434 int ret;
436 435
436 usbtv_audio_suspend(usbtv);
437
437 ret = usb_set_interface(usbtv->udev, 0, 0); 438 ret = usb_set_interface(usbtv->udev, 0, 0);
438 if (ret < 0) 439 if (ret < 0)
439 return ret; 440 return ret;
@@ -446,6 +447,8 @@ static int usbtv_start(struct usbtv *usbtv)
446 if (ret < 0) 447 if (ret < 0)
447 return ret; 448 return ret;
448 449
450 usbtv_audio_resume(usbtv);
451
449 for (i = 0; i < USBTV_ISOC_TRANSFERS; i++) { 452 for (i = 0; i < USBTV_ISOC_TRANSFERS; i++) {
450 struct urb *ip; 453 struct urb *ip;
451 454
@@ -559,6 +562,7 @@ static int usbtv_g_input(struct file *file, void *priv, unsigned int *i)
559static int usbtv_s_input(struct file *file, void *priv, unsigned int i) 562static int usbtv_s_input(struct file *file, void *priv, unsigned int i)
560{ 563{
561 struct usbtv *usbtv = video_drvdata(file); 564 struct usbtv *usbtv = video_drvdata(file);
565
562 return usbtv_select_input(usbtv, i); 566 return usbtv_select_input(usbtv, i);
563} 567}
564 568
diff --git a/drivers/media/usb/usbtv/usbtv.h b/drivers/media/usb/usbtv/usbtv.h
index cb1d388cc647..968119581fab 100644
--- a/drivers/media/usb/usbtv/usbtv.h
+++ b/drivers/media/usb/usbtv/usbtv.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Fushicai USBTV007 Video Grabber Driver 2 * Fushicai USBTV007 Audio-Video Grabber Driver
3 * 3 *
4 * Copyright (c) 2013 Lubomir Rintel 4 * Copyright (c) 2013 Lubomir Rintel
5 * All rights reserved. 5 * All rights reserved.
@@ -28,6 +28,7 @@
28 28
29/* Hardware. */ 29/* Hardware. */
30#define USBTV_VIDEO_ENDP 0x81 30#define USBTV_VIDEO_ENDP 0x81
31#define USBTV_AUDIO_ENDP 0x83
31#define USBTV_BASE 0xc000 32#define USBTV_BASE 0xc000
32#define USBTV_REQUEST_REG 12 33#define USBTV_REQUEST_REG 12
33 34
@@ -39,6 +40,10 @@
39#define USBTV_CHUNK_SIZE 256 40#define USBTV_CHUNK_SIZE 256
40#define USBTV_CHUNK 240 41#define USBTV_CHUNK 240
41 42
43#define USBTV_AUDIO_URBSIZE 20480
44#define USBTV_AUDIO_HDRSIZE 4
45#define USBTV_AUDIO_BUFFER 65536
46
42/* Chunk header. */ 47/* Chunk header. */
43#define USBTV_MAGIC_OK(chunk) ((be32_to_cpu(chunk[0]) & 0xff000000) \ 48#define USBTV_MAGIC_OK(chunk) ((be32_to_cpu(chunk[0]) & 0xff000000) \
44 == 0x88000000) 49 == 0x88000000)
@@ -91,9 +96,23 @@ struct usbtv {
91 int iso_size; 96 int iso_size;
92 unsigned int sequence; 97 unsigned int sequence;
93 struct urb *isoc_urbs[USBTV_ISOC_TRANSFERS]; 98 struct urb *isoc_urbs[USBTV_ISOC_TRANSFERS];
99
100 /* audio */
101 struct snd_card *snd;
102 struct snd_pcm_substream *snd_substream;
103 atomic_t snd_stream;
104 struct work_struct snd_trigger;
105 struct urb *snd_bulk_urb;
106 size_t snd_buffer_pos;
107 size_t snd_period_pos;
94}; 108};
95 109
96int usbtv_set_regs(struct usbtv *usbtv, const u16 regs[][2], int size); 110int usbtv_set_regs(struct usbtv *usbtv, const u16 regs[][2], int size);
97 111
98int usbtv_video_init(struct usbtv *usbtv); 112int usbtv_video_init(struct usbtv *usbtv);
99void usbtv_video_free(struct usbtv *usbtv); 113void usbtv_video_free(struct usbtv *usbtv);
114
115int usbtv_audio_init(struct usbtv *usbtv);
116void usbtv_audio_free(struct usbtv *usbtv);
117void usbtv_audio_suspend(struct usbtv *usbtv);
118void usbtv_audio_resume(struct usbtv *usbtv);
diff --git a/drivers/media/usb/uvc/uvc_ctrl.c b/drivers/media/usb/uvc/uvc_ctrl.c
index 0eb82106d2ff..3e59b288b8a8 100644
--- a/drivers/media/usb/uvc/uvc_ctrl.c
+++ b/drivers/media/usb/uvc/uvc_ctrl.c
@@ -309,9 +309,8 @@ static struct uvc_control_info uvc_ctrls[] = {
309 .selector = UVC_CT_PANTILT_RELATIVE_CONTROL, 309 .selector = UVC_CT_PANTILT_RELATIVE_CONTROL,
310 .index = 12, 310 .index = 12,
311 .size = 4, 311 .size = 4,
312 .flags = UVC_CTRL_FLAG_SET_CUR | UVC_CTRL_FLAG_GET_MIN 312 .flags = UVC_CTRL_FLAG_SET_CUR
313 | UVC_CTRL_FLAG_GET_MAX | UVC_CTRL_FLAG_GET_RES 313 | UVC_CTRL_FLAG_GET_RANGE
314 | UVC_CTRL_FLAG_GET_DEF
315 | UVC_CTRL_FLAG_AUTO_UPDATE, 314 | UVC_CTRL_FLAG_AUTO_UPDATE,
316 }, 315 },
317 { 316 {
@@ -391,6 +390,35 @@ static void uvc_ctrl_set_zoom(struct uvc_control_mapping *mapping,
391 data[2] = min((int)abs(value), 0xff); 390 data[2] = min((int)abs(value), 0xff);
392} 391}
393 392
393static __s32 uvc_ctrl_get_rel_speed(struct uvc_control_mapping *mapping,
394 __u8 query, const __u8 *data)
395{
396 unsigned int first = mapping->offset / 8;
397 __s8 rel = (__s8)data[first];
398
399 switch (query) {
400 case UVC_GET_CUR:
401 return (rel == 0) ? 0 : (rel > 0 ? data[first+1]
402 : -data[first+1]);
403 case UVC_GET_MIN:
404 return -data[first+1];
405 case UVC_GET_MAX:
406 case UVC_GET_RES:
407 case UVC_GET_DEF:
408 default:
409 return data[first+1];
410 }
411}
412
413static void uvc_ctrl_set_rel_speed(struct uvc_control_mapping *mapping,
414 __s32 value, __u8 *data)
415{
416 unsigned int first = mapping->offset / 8;
417
418 data[first] = value == 0 ? 0 : (value > 0) ? 1 : 0xff;
419 data[first+1] = min_t(int, abs(value), 0xff);
420}
421
394static struct uvc_control_mapping uvc_ctrl_mappings[] = { 422static struct uvc_control_mapping uvc_ctrl_mappings[] = {
395 { 423 {
396 .id = V4L2_CID_BRIGHTNESS, 424 .id = V4L2_CID_BRIGHTNESS,
@@ -677,6 +705,30 @@ static struct uvc_control_mapping uvc_ctrl_mappings[] = {
677 .data_type = UVC_CTRL_DATA_TYPE_SIGNED, 705 .data_type = UVC_CTRL_DATA_TYPE_SIGNED,
678 }, 706 },
679 { 707 {
708 .id = V4L2_CID_PAN_SPEED,
709 .name = "Pan (Speed)",
710 .entity = UVC_GUID_UVC_CAMERA,
711 .selector = UVC_CT_PANTILT_RELATIVE_CONTROL,
712 .size = 16,
713 .offset = 0,
714 .v4l2_type = V4L2_CTRL_TYPE_INTEGER,
715 .data_type = UVC_CTRL_DATA_TYPE_SIGNED,
716 .get = uvc_ctrl_get_rel_speed,
717 .set = uvc_ctrl_set_rel_speed,
718 },
719 {
720 .id = V4L2_CID_TILT_SPEED,
721 .name = "Tilt (Speed)",
722 .entity = UVC_GUID_UVC_CAMERA,
723 .selector = UVC_CT_PANTILT_RELATIVE_CONTROL,
724 .size = 16,
725 .offset = 16,
726 .v4l2_type = V4L2_CTRL_TYPE_INTEGER,
727 .data_type = UVC_CTRL_DATA_TYPE_SIGNED,
728 .get = uvc_ctrl_get_rel_speed,
729 .set = uvc_ctrl_set_rel_speed,
730 },
731 {
680 .id = V4L2_CID_PRIVACY, 732 .id = V4L2_CID_PRIVACY,
681 .name = "Privacy", 733 .name = "Privacy",
682 .entity = UVC_GUID_UVC_CAMERA, 734 .entity = UVC_GUID_UVC_CAMERA,
@@ -1795,7 +1847,7 @@ done:
1795 * - Handle restore order (Auto-Exposure Mode should be restored before 1847 * - Handle restore order (Auto-Exposure Mode should be restored before
1796 * Exposure Time). 1848 * Exposure Time).
1797 */ 1849 */
1798int uvc_ctrl_resume_device(struct uvc_device *dev) 1850int uvc_ctrl_restore_values(struct uvc_device *dev)
1799{ 1851{
1800 struct uvc_control *ctrl; 1852 struct uvc_control *ctrl;
1801 struct uvc_entity *entity; 1853 struct uvc_entity *entity;
diff --git a/drivers/media/usb/uvc/uvc_driver.c b/drivers/media/usb/uvc/uvc_driver.c
index f8135f4e3b52..7c8322d4fc63 100644
--- a/drivers/media/usb/uvc/uvc_driver.c
+++ b/drivers/media/usb/uvc/uvc_driver.c
@@ -2000,7 +2000,7 @@ static int __uvc_resume(struct usb_interface *intf, int reset)
2000 int ret = 0; 2000 int ret = 0;
2001 2001
2002 if (reset) { 2002 if (reset) {
2003 ret = uvc_ctrl_resume_device(dev); 2003 ret = uvc_ctrl_restore_values(dev);
2004 if (ret < 0) 2004 if (ret < 0)
2005 return ret; 2005 return ret;
2006 } 2006 }
@@ -2175,6 +2175,15 @@ static struct usb_device_id uvc_ids[] = {
2175 .bInterfaceClass = USB_CLASS_VENDOR_SPEC, 2175 .bInterfaceClass = USB_CLASS_VENDOR_SPEC,
2176 .bInterfaceSubClass = 1, 2176 .bInterfaceSubClass = 1,
2177 .bInterfaceProtocol = 0 }, 2177 .bInterfaceProtocol = 0 },
2178 /* Logitech HD Pro Webcam C920 */
2179 { .match_flags = USB_DEVICE_ID_MATCH_DEVICE
2180 | USB_DEVICE_ID_MATCH_INT_INFO,
2181 .idVendor = 0x046d,
2182 .idProduct = 0x082d,
2183 .bInterfaceClass = USB_CLASS_VIDEO,
2184 .bInterfaceSubClass = 1,
2185 .bInterfaceProtocol = 0,
2186 .driver_info = UVC_QUIRK_RESTORE_CTRLS_ON_INIT },
2178 /* Chicony CNF7129 (Asus EEE 100HE) */ 2187 /* Chicony CNF7129 (Asus EEE 100HE) */
2179 { .match_flags = USB_DEVICE_ID_MATCH_DEVICE 2188 { .match_flags = USB_DEVICE_ID_MATCH_DEVICE
2180 | USB_DEVICE_ID_MATCH_INT_INFO, 2189 | USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2229,6 +2238,15 @@ static struct usb_device_id uvc_ids[] = {
2229 .bInterfaceSubClass = 1, 2238 .bInterfaceSubClass = 1,
2230 .bInterfaceProtocol = 0, 2239 .bInterfaceProtocol = 0,
2231 .driver_info = UVC_QUIRK_PROBE_DEF }, 2240 .driver_info = UVC_QUIRK_PROBE_DEF },
2241 /* Dell XPS M1330 (OmniVision OV7670 webcam) */
2242 { .match_flags = USB_DEVICE_ID_MATCH_DEVICE
2243 | USB_DEVICE_ID_MATCH_INT_INFO,
2244 .idVendor = 0x05a9,
2245 .idProduct = 0x7670,
2246 .bInterfaceClass = USB_CLASS_VIDEO,
2247 .bInterfaceSubClass = 1,
2248 .bInterfaceProtocol = 0,
2249 .driver_info = UVC_QUIRK_PROBE_DEF },
2232 /* Apple Built-In iSight */ 2250 /* Apple Built-In iSight */
2233 { .match_flags = USB_DEVICE_ID_MATCH_DEVICE 2251 { .match_flags = USB_DEVICE_ID_MATCH_DEVICE
2234 | USB_DEVICE_ID_MATCH_INT_INFO, 2252 | USB_DEVICE_ID_MATCH_INT_INFO,
diff --git a/drivers/media/usb/uvc/uvc_v4l2.c b/drivers/media/usb/uvc/uvc_v4l2.c
index 378ae02e593b..60a8e2c3631e 100644
--- a/drivers/media/usb/uvc/uvc_v4l2.c
+++ b/drivers/media/usb/uvc/uvc_v4l2.c
@@ -318,6 +318,7 @@ static int uvc_v4l2_set_format(struct uvc_streaming *stream,
318 stream->ctrl = probe; 318 stream->ctrl = probe;
319 stream->cur_format = format; 319 stream->cur_format = format;
320 stream->cur_frame = frame; 320 stream->cur_frame = frame;
321 stream->frame_size = fmt->fmt.pix.sizeimage;
321 322
322done: 323done:
323 mutex_unlock(&stream->mutex); 324 mutex_unlock(&stream->mutex);
diff --git a/drivers/media/usb/uvc/uvc_video.c b/drivers/media/usb/uvc/uvc_video.c
index 9144a2f3ed82..9ace520bb079 100644
--- a/drivers/media/usb/uvc/uvc_video.c
+++ b/drivers/media/usb/uvc/uvc_video.c
@@ -1143,7 +1143,7 @@ static int uvc_video_encode_data(struct uvc_streaming *stream,
1143static void uvc_video_validate_buffer(const struct uvc_streaming *stream, 1143static void uvc_video_validate_buffer(const struct uvc_streaming *stream,
1144 struct uvc_buffer *buf) 1144 struct uvc_buffer *buf)
1145{ 1145{
1146 if (buf->length != buf->bytesused && 1146 if (stream->frame_size != buf->bytesused &&
1147 !(stream->cur_format->flags & UVC_FMT_FLAG_COMPRESSED)) 1147 !(stream->cur_format->flags & UVC_FMT_FLAG_COMPRESSED))
1148 buf->error = 1; 1148 buf->error = 1;
1149} 1149}
@@ -1463,7 +1463,7 @@ static unsigned int uvc_endpoint_max_bpi(struct usb_device *dev,
1463 1463
1464 switch (dev->speed) { 1464 switch (dev->speed) {
1465 case USB_SPEED_SUPER: 1465 case USB_SPEED_SUPER:
1466 return ep->ss_ep_comp.wBytesPerInterval; 1466 return le16_to_cpu(ep->ss_ep_comp.wBytesPerInterval);
1467 case USB_SPEED_HIGH: 1467 case USB_SPEED_HIGH:
1468 psize = usb_endpoint_maxp(&ep->desc); 1468 psize = usb_endpoint_maxp(&ep->desc);
1469 return (psize & 0x07ff) * (1 + ((psize >> 11) & 3)); 1469 return (psize & 0x07ff) * (1 + ((psize >> 11) & 3));
@@ -1678,6 +1678,12 @@ static int uvc_init_video(struct uvc_streaming *stream, gfp_t gfp_flags)
1678 } 1678 }
1679 } 1679 }
1680 1680
1681 /* The Logitech C920 temporarily forgets that it should not be adjusting
1682 * Exposure Absolute during init so restore controls to stored values.
1683 */
1684 if (stream->dev->quirks & UVC_QUIRK_RESTORE_CTRLS_ON_INIT)
1685 uvc_ctrl_restore_values(stream->dev);
1686
1681 return 0; 1687 return 0;
1682} 1688}
1683 1689
diff --git a/drivers/media/usb/uvc/uvcvideo.h b/drivers/media/usb/uvc/uvcvideo.h
index b1f69a6d4068..6f676c29ec09 100644
--- a/drivers/media/usb/uvc/uvcvideo.h
+++ b/drivers/media/usb/uvc/uvcvideo.h
@@ -147,6 +147,7 @@
147#define UVC_QUIRK_FIX_BANDWIDTH 0x00000080 147#define UVC_QUIRK_FIX_BANDWIDTH 0x00000080
148#define UVC_QUIRK_PROBE_DEF 0x00000100 148#define UVC_QUIRK_PROBE_DEF 0x00000100
149#define UVC_QUIRK_RESTRICT_FRAME_RATE 0x00000200 149#define UVC_QUIRK_RESTRICT_FRAME_RATE 0x00000200
150#define UVC_QUIRK_RESTORE_CTRLS_ON_INIT 0x00000400
150 151
151/* Format flags */ 152/* Format flags */
152#define UVC_FMT_FLAG_COMPRESSED 0x00000001 153#define UVC_FMT_FLAG_COMPRESSED 0x00000001
@@ -456,6 +457,8 @@ struct uvc_streaming {
456 struct uvc_format *def_format; 457 struct uvc_format *def_format;
457 struct uvc_format *cur_format; 458 struct uvc_format *cur_format;
458 struct uvc_frame *cur_frame; 459 struct uvc_frame *cur_frame;
460 size_t frame_size;
461
459 /* Protect access to ctrl, cur_format, cur_frame and hardware video 462 /* Protect access to ctrl, cur_format, cur_frame and hardware video
460 * probe control. 463 * probe control.
461 */ 464 */
@@ -688,7 +691,7 @@ extern int uvc_ctrl_add_mapping(struct uvc_video_chain *chain,
688 const struct uvc_control_mapping *mapping); 691 const struct uvc_control_mapping *mapping);
689extern int uvc_ctrl_init_device(struct uvc_device *dev); 692extern int uvc_ctrl_init_device(struct uvc_device *dev);
690extern void uvc_ctrl_cleanup_device(struct uvc_device *dev); 693extern void uvc_ctrl_cleanup_device(struct uvc_device *dev);
691extern int uvc_ctrl_resume_device(struct uvc_device *dev); 694extern int uvc_ctrl_restore_values(struct uvc_device *dev);
692 695
693extern int uvc_ctrl_begin(struct uvc_video_chain *chain); 696extern int uvc_ctrl_begin(struct uvc_video_chain *chain);
694extern int __uvc_ctrl_commit(struct uvc_fh *handle, int rollback, 697extern int __uvc_ctrl_commit(struct uvc_fh *handle, int rollback,
diff --git a/drivers/media/v4l2-core/tuner-core.c b/drivers/media/v4l2-core/tuner-core.c
index 06c18ba16fa0..559f8372e2eb 100644
--- a/drivers/media/v4l2-core/tuner-core.c
+++ b/drivers/media/v4l2-core/tuner-core.c
@@ -601,7 +601,7 @@ static int tuner_probe(struct i2c_client *client,
601 t->name = "(tuner unset)"; 601 t->name = "(tuner unset)";
602 t->type = UNSET; 602 t->type = UNSET;
603 t->audmode = V4L2_TUNER_MODE_STEREO; 603 t->audmode = V4L2_TUNER_MODE_STEREO;
604 t->standby = 1; 604 t->standby = true;
605 t->radio_freq = 87.5 * 16000; /* Initial freq range */ 605 t->radio_freq = 87.5 * 16000; /* Initial freq range */
606 t->tv_freq = 400 * 16; /* Sets freq to VHF High - needed for some PLL's to properly start */ 606 t->tv_freq = 400 * 16; /* Sets freq to VHF High - needed for some PLL's to properly start */
607 607
@@ -1260,7 +1260,9 @@ static int tuner_suspend(struct device *dev)
1260 1260
1261 tuner_dbg("suspend\n"); 1261 tuner_dbg("suspend\n");
1262 1262
1263 if (!t->standby && analog_ops->standby) 1263 if (t->fe.ops.tuner_ops.suspend)
1264 t->fe.ops.tuner_ops.suspend(&t->fe);
1265 else if (!t->standby && analog_ops->standby)
1264 analog_ops->standby(&t->fe); 1266 analog_ops->standby(&t->fe);
1265 1267
1266 return 0; 1268 return 0;
@@ -1273,7 +1275,9 @@ static int tuner_resume(struct device *dev)
1273 1275
1274 tuner_dbg("resume\n"); 1276 tuner_dbg("resume\n");
1275 1277
1276 if (!t->standby) 1278 if (t->fe.ops.tuner_ops.resume)
1279 t->fe.ops.tuner_ops.resume(&t->fe);
1280 else if (!t->standby)
1277 if (set_mode(t, t->mode) == 0) 1281 if (set_mode(t, t->mode) == 0)
1278 set_freq(t, 0); 1282 set_freq(t, 0);
1279 1283
diff --git a/drivers/media/v4l2-core/v4l2-common.c b/drivers/media/v4l2-core/v4l2-common.c
index ccaa38f65cf1..2e9d81f4c1a5 100644
--- a/drivers/media/v4l2-core/v4l2-common.c
+++ b/drivers/media/v4l2-core/v4l2-common.c
@@ -435,16 +435,13 @@ static unsigned int clamp_align(unsigned int x, unsigned int min,
435 /* Bits that must be zero to be aligned */ 435 /* Bits that must be zero to be aligned */
436 unsigned int mask = ~((1 << align) - 1); 436 unsigned int mask = ~((1 << align) - 1);
437 437
438 /* Clamp to aligned min and max */
439 x = clamp(x, (min + ~mask) & mask, max & mask);
440
438 /* Round to nearest aligned value */ 441 /* Round to nearest aligned value */
439 if (align) 442 if (align)
440 x = (x + (1 << (align - 1))) & mask; 443 x = (x + (1 << (align - 1))) & mask;
441 444
442 /* Clamp to aligned value of min and max */
443 if (x < min)
444 x = (min + ~mask) & mask;
445 else if (x > max)
446 x = max & mask;
447
448 return x; 445 return x;
449} 446}
450 447
diff --git a/drivers/media/v4l2-core/v4l2-compat-ioctl32.c b/drivers/media/v4l2-core/v4l2-compat-ioctl32.c
index cca6c2f76b3a..e502a5fb2994 100644
--- a/drivers/media/v4l2-core/v4l2-compat-ioctl32.c
+++ b/drivers/media/v4l2-core/v4l2-compat-ioctl32.c
@@ -328,7 +328,7 @@ struct v4l2_buffer32 {
328 __u32 reserved; 328 __u32 reserved;
329}; 329};
330 330
331static int get_v4l2_plane32(struct v4l2_plane *up, struct v4l2_plane32 *up32, 331static int get_v4l2_plane32(struct v4l2_plane __user *up, struct v4l2_plane32 __user *up32,
332 enum v4l2_memory memory) 332 enum v4l2_memory memory)
333{ 333{
334 void __user *up_pln; 334 void __user *up_pln;
@@ -357,7 +357,7 @@ static int get_v4l2_plane32(struct v4l2_plane *up, struct v4l2_plane32 *up32,
357 return 0; 357 return 0;
358} 358}
359 359
360static int put_v4l2_plane32(struct v4l2_plane *up, struct v4l2_plane32 *up32, 360static int put_v4l2_plane32(struct v4l2_plane __user *up, struct v4l2_plane32 __user *up32,
361 enum v4l2_memory memory) 361 enum v4l2_memory memory)
362{ 362{
363 if (copy_in_user(up32, up, 2 * sizeof(__u32)) || 363 if (copy_in_user(up32, up, 2 * sizeof(__u32)) ||
@@ -427,7 +427,7 @@ static int get_v4l2_buffer32(struct v4l2_buffer *kp, struct v4l2_buffer32 __user
427 * by passing a very big num_planes value */ 427 * by passing a very big num_planes value */
428 uplane = compat_alloc_user_space(num_planes * 428 uplane = compat_alloc_user_space(num_planes *
429 sizeof(struct v4l2_plane)); 429 sizeof(struct v4l2_plane));
430 kp->m.planes = uplane; 430 kp->m.planes = (__force struct v4l2_plane *)uplane;
431 431
432 while (--num_planes >= 0) { 432 while (--num_planes >= 0) {
433 ret = get_v4l2_plane32(uplane, uplane32, kp->memory); 433 ret = get_v4l2_plane32(uplane, uplane32, kp->memory);
@@ -498,7 +498,7 @@ static int put_v4l2_buffer32(struct v4l2_buffer *kp, struct v4l2_buffer32 __user
498 if (num_planes == 0) 498 if (num_planes == 0)
499 return 0; 499 return 0;
500 500
501 uplane = kp->m.planes; 501 uplane = (__force struct v4l2_plane __user *)kp->m.planes;
502 if (get_user(p, &up->m.planes)) 502 if (get_user(p, &up->m.planes))
503 return -EFAULT; 503 return -EFAULT;
504 uplane32 = compat_ptr(p); 504 uplane32 = compat_ptr(p);
@@ -562,7 +562,7 @@ static int get_v4l2_framebuffer32(struct v4l2_framebuffer *kp, struct v4l2_frame
562 get_user(kp->flags, &up->flags) || 562 get_user(kp->flags, &up->flags) ||
563 copy_from_user(&kp->fmt, &up->fmt, sizeof(up->fmt))) 563 copy_from_user(&kp->fmt, &up->fmt, sizeof(up->fmt)))
564 return -EFAULT; 564 return -EFAULT;
565 kp->base = compat_ptr(tmp); 565 kp->base = (__force void *)compat_ptr(tmp);
566 return 0; 566 return 0;
567} 567}
568 568
@@ -667,11 +667,15 @@ static int get_v4l2_ext_controls32(struct v4l2_ext_controls *kp, struct v4l2_ext
667 n * sizeof(struct v4l2_ext_control32))) 667 n * sizeof(struct v4l2_ext_control32)))
668 return -EFAULT; 668 return -EFAULT;
669 kcontrols = compat_alloc_user_space(n * sizeof(struct v4l2_ext_control)); 669 kcontrols = compat_alloc_user_space(n * sizeof(struct v4l2_ext_control));
670 kp->controls = kcontrols; 670 kp->controls = (__force struct v4l2_ext_control *)kcontrols;
671 while (--n >= 0) { 671 while (--n >= 0) {
672 u32 id;
673
672 if (copy_in_user(kcontrols, ucontrols, sizeof(*ucontrols))) 674 if (copy_in_user(kcontrols, ucontrols, sizeof(*ucontrols)))
673 return -EFAULT; 675 return -EFAULT;
674 if (ctrl_is_pointer(kcontrols->id)) { 676 if (get_user(id, &kcontrols->id))
677 return -EFAULT;
678 if (ctrl_is_pointer(id)) {
675 void __user *s; 679 void __user *s;
676 680
677 if (get_user(p, &ucontrols->string)) 681 if (get_user(p, &ucontrols->string))
@@ -689,7 +693,8 @@ static int get_v4l2_ext_controls32(struct v4l2_ext_controls *kp, struct v4l2_ext
689static int put_v4l2_ext_controls32(struct v4l2_ext_controls *kp, struct v4l2_ext_controls32 __user *up) 693static int put_v4l2_ext_controls32(struct v4l2_ext_controls *kp, struct v4l2_ext_controls32 __user *up)
690{ 694{
691 struct v4l2_ext_control32 __user *ucontrols; 695 struct v4l2_ext_control32 __user *ucontrols;
692 struct v4l2_ext_control __user *kcontrols = kp->controls; 696 struct v4l2_ext_control __user *kcontrols =
697 (__force struct v4l2_ext_control __user *)kp->controls;
693 int n = kp->count; 698 int n = kp->count;
694 compat_caddr_t p; 699 compat_caddr_t p;
695 700
@@ -711,11 +716,14 @@ static int put_v4l2_ext_controls32(struct v4l2_ext_controls *kp, struct v4l2_ext
711 716
712 while (--n >= 0) { 717 while (--n >= 0) {
713 unsigned size = sizeof(*ucontrols); 718 unsigned size = sizeof(*ucontrols);
719 u32 id;
714 720
721 if (get_user(id, &kcontrols->id))
722 return -EFAULT;
715 /* Do not modify the pointer when copying a pointer control. 723 /* Do not modify the pointer when copying a pointer control.
716 The contents of the pointer was changed, not the pointer 724 The contents of the pointer was changed, not the pointer
717 itself. */ 725 itself. */
718 if (ctrl_is_pointer(kcontrols->id)) 726 if (ctrl_is_pointer(id))
719 size -= sizeof(ucontrols->value64); 727 size -= sizeof(ucontrols->value64);
720 if (copy_in_user(ucontrols, kcontrols, size)) 728 if (copy_in_user(ucontrols, kcontrols, size))
721 return -EFAULT; 729 return -EFAULT;
@@ -770,7 +778,7 @@ static int get_v4l2_edid32(struct v4l2_edid *kp, struct v4l2_edid32 __user *up)
770 get_user(tmp, &up->edid) || 778 get_user(tmp, &up->edid) ||
771 copy_from_user(kp->reserved, up->reserved, sizeof(kp->reserved))) 779 copy_from_user(kp->reserved, up->reserved, sizeof(kp->reserved)))
772 return -EFAULT; 780 return -EFAULT;
773 kp->edid = compat_ptr(tmp); 781 kp->edid = (__force u8 *)compat_ptr(tmp);
774 return 0; 782 return 0;
775} 783}
776 784
@@ -783,7 +791,7 @@ static int put_v4l2_edid32(struct v4l2_edid *kp, struct v4l2_edid32 __user *up)
783 put_user(kp->start_block, &up->start_block) || 791 put_user(kp->start_block, &up->start_block) ||
784 put_user(kp->blocks, &up->blocks) || 792 put_user(kp->blocks, &up->blocks) ||
785 put_user(tmp, &up->edid) || 793 put_user(tmp, &up->edid) ||
786 copy_to_user(kp->reserved, up->reserved, sizeof(kp->reserved))) 794 copy_to_user(up->reserved, kp->reserved, sizeof(up->reserved)))
787 return -EFAULT; 795 return -EFAULT;
788 return 0; 796 return 0;
789} 797}
diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c
index f030d6a9e044..86012140923f 100644
--- a/drivers/media/v4l2-core/v4l2-ctrls.c
+++ b/drivers/media/v4l2-core/v4l2-ctrls.c
@@ -796,6 +796,8 @@ const char *v4l2_ctrl_get_name(u32 id)
796 case V4L2_CID_AUTO_FOCUS_STOP: return "Auto Focus, Stop"; 796 case V4L2_CID_AUTO_FOCUS_STOP: return "Auto Focus, Stop";
797 case V4L2_CID_AUTO_FOCUS_STATUS: return "Auto Focus, Status"; 797 case V4L2_CID_AUTO_FOCUS_STATUS: return "Auto Focus, Status";
798 case V4L2_CID_AUTO_FOCUS_RANGE: return "Auto Focus, Range"; 798 case V4L2_CID_AUTO_FOCUS_RANGE: return "Auto Focus, Range";
799 case V4L2_CID_PAN_SPEED: return "Pan, Speed";
800 case V4L2_CID_TILT_SPEED: return "Tilt, Speed";
799 801
800 /* FM Radio Modulator controls */ 802 /* FM Radio Modulator controls */
801 /* Keep the order of the 'case's the same as in v4l2-controls.h! */ 803 /* Keep the order of the 'case's the same as in v4l2-controls.h! */
@@ -859,6 +861,10 @@ const char *v4l2_ctrl_get_name(u32 id)
859 case V4L2_CID_VBLANK: return "Vertical Blanking"; 861 case V4L2_CID_VBLANK: return "Vertical Blanking";
860 case V4L2_CID_HBLANK: return "Horizontal Blanking"; 862 case V4L2_CID_HBLANK: return "Horizontal Blanking";
861 case V4L2_CID_ANALOGUE_GAIN: return "Analogue Gain"; 863 case V4L2_CID_ANALOGUE_GAIN: return "Analogue Gain";
864 case V4L2_CID_TEST_PATTERN_RED: return "Red Pixel Value";
865 case V4L2_CID_TEST_PATTERN_GREENR: return "Green (Red) Pixel Value";
866 case V4L2_CID_TEST_PATTERN_BLUE: return "Blue Pixel Value";
867 case V4L2_CID_TEST_PATTERN_GREENB: return "Green (Blue) Pixel Value";
862 868
863 /* Image processing controls */ 869 /* Image processing controls */
864 /* Keep the order of the 'case's the same as in v4l2-controls.h! */ 870 /* Keep the order of the 'case's the same as in v4l2-controls.h! */
diff --git a/drivers/media/v4l2-core/v4l2-dv-timings.c b/drivers/media/v4l2-core/v4l2-dv-timings.c
index ce1c9f5d9dee..b1d8dbb39665 100644
--- a/drivers/media/v4l2-core/v4l2-dv-timings.c
+++ b/drivers/media/v4l2-core/v4l2-dv-timings.c
@@ -164,7 +164,8 @@ bool v4l2_valid_dv_timings(const struct v4l2_dv_timings *t,
164 bt->width > cap->max_width || 164 bt->width > cap->max_width ||
165 bt->pixelclock < cap->min_pixelclock || 165 bt->pixelclock < cap->min_pixelclock ||
166 bt->pixelclock > cap->max_pixelclock || 166 bt->pixelclock > cap->max_pixelclock ||
167 (cap->standards && !(bt->standards & cap->standards)) || 167 (cap->standards && bt->standards &&
168 !(bt->standards & cap->standards)) ||
168 (bt->interlaced && !(caps & V4L2_DV_BT_CAP_INTERLACED)) || 169 (bt->interlaced && !(caps & V4L2_DV_BT_CAP_INTERLACED)) ||
169 (!bt->interlaced && !(caps & V4L2_DV_BT_CAP_PROGRESSIVE))) 170 (!bt->interlaced && !(caps & V4L2_DV_BT_CAP_PROGRESSIVE)))
170 return false; 171 return false;
diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
index d15e16737eef..9ccb19a435ef 100644
--- a/drivers/media/v4l2-core/v4l2-ioctl.c
+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
@@ -562,7 +562,7 @@ static void v4l_print_ext_controls(const void *arg, bool write_only)
562 pr_cont("class=0x%x, count=%d, error_idx=%d", 562 pr_cont("class=0x%x, count=%d, error_idx=%d",
563 p->ctrl_class, p->count, p->error_idx); 563 p->ctrl_class, p->count, p->error_idx);
564 for (i = 0; i < p->count; i++) { 564 for (i = 0; i < p->count; i++) {
565 if (p->controls[i].size) 565 if (!p->controls[i].size)
566 pr_cont(", id/val=0x%x/0x%x", 566 pr_cont(", id/val=0x%x/0x%x",
567 p->controls[i].id, p->controls[i].value); 567 p->controls[i].id, p->controls[i].value);
568 else 568 else
@@ -1153,9 +1153,9 @@ static int v4l_g_fmt(const struct v4l2_ioctl_ops *ops,
1153 switch (p->type) { 1153 switch (p->type) {
1154 case V4L2_BUF_TYPE_VIDEO_OVERLAY: 1154 case V4L2_BUF_TYPE_VIDEO_OVERLAY:
1155 case V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY: { 1155 case V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY: {
1156 struct v4l2_clip *clips = p->fmt.win.clips; 1156 struct v4l2_clip __user *clips = p->fmt.win.clips;
1157 u32 clipcount = p->fmt.win.clipcount; 1157 u32 clipcount = p->fmt.win.clipcount;
1158 void *bitmap = p->fmt.win.bitmap; 1158 void __user *bitmap = p->fmt.win.bitmap;
1159 1159
1160 memset(&p->fmt, 0, sizeof(p->fmt)); 1160 memset(&p->fmt, 0, sizeof(p->fmt));
1161 p->fmt.win.clips = clips; 1161 p->fmt.win.clips = clips;
diff --git a/drivers/media/v4l2-core/v4l2-subdev.c b/drivers/media/v4l2-core/v4l2-subdev.c
index b4d235c13fbf..543631c3557a 100644
--- a/drivers/media/v4l2-core/v4l2-subdev.c
+++ b/drivers/media/v4l2-core/v4l2-subdev.c
@@ -501,11 +501,20 @@ int v4l2_subdev_link_validate_default(struct v4l2_subdev *sd,
501 struct v4l2_subdev_format *source_fmt, 501 struct v4l2_subdev_format *source_fmt,
502 struct v4l2_subdev_format *sink_fmt) 502 struct v4l2_subdev_format *sink_fmt)
503{ 503{
504 /* The width, height and code must match. */
504 if (source_fmt->format.width != sink_fmt->format.width 505 if (source_fmt->format.width != sink_fmt->format.width
505 || source_fmt->format.height != sink_fmt->format.height 506 || source_fmt->format.height != sink_fmt->format.height
506 || source_fmt->format.code != sink_fmt->format.code) 507 || source_fmt->format.code != sink_fmt->format.code)
507 return -EINVAL; 508 return -EINVAL;
508 509
510 /* The field order must match, or the sink field order must be NONE
511 * to support interlaced hardware connected to bridges that support
512 * progressive formats only.
513 */
514 if (source_fmt->format.field != sink_fmt->format.field &&
515 sink_fmt->format.field != V4L2_FIELD_NONE)
516 return -EINVAL;
517
509 return 0; 518 return 0;
510} 519}
511EXPORT_SYMBOL_GPL(v4l2_subdev_link_validate_default); 520EXPORT_SYMBOL_GPL(v4l2_subdev_link_validate_default);
diff --git a/drivers/media/v4l2-core/videobuf-core.c b/drivers/media/v4l2-core/videobuf-core.c
index fb5ee5dd8fe9..b91a266d0b7e 100644
--- a/drivers/media/v4l2-core/videobuf-core.c
+++ b/drivers/media/v4l2-core/videobuf-core.c
@@ -441,11 +441,6 @@ int videobuf_reqbufs(struct videobuf_queue *q,
441 unsigned int size, count; 441 unsigned int size, count;
442 int retval; 442 int retval;
443 443
444 if (req->count < 1) {
445 dprintk(1, "reqbufs: count invalid (%d)\n", req->count);
446 return -EINVAL;
447 }
448
449 if (req->memory != V4L2_MEMORY_MMAP && 444 if (req->memory != V4L2_MEMORY_MMAP &&
450 req->memory != V4L2_MEMORY_USERPTR && 445 req->memory != V4L2_MEMORY_USERPTR &&
451 req->memory != V4L2_MEMORY_OVERLAY) { 446 req->memory != V4L2_MEMORY_OVERLAY) {
@@ -471,6 +466,12 @@ int videobuf_reqbufs(struct videobuf_queue *q,
471 goto done; 466 goto done;
472 } 467 }
473 468
469 if (req->count == 0) {
470 dprintk(1, "reqbufs: count invalid (%d)\n", req->count);
471 retval = __videobuf_free(q);
472 goto done;
473 }
474
474 count = req->count; 475 count = req->count;
475 if (count > VIDEO_MAX_FRAME) 476 if (count > VIDEO_MAX_FRAME)
476 count = VIDEO_MAX_FRAME; 477 count = VIDEO_MAX_FRAME;
diff --git a/drivers/media/v4l2-core/videobuf-dma-sg.c b/drivers/media/v4l2-core/videobuf-dma-sg.c
index 3c8cc023a5a5..3ff15f1c9d70 100644
--- a/drivers/media/v4l2-core/videobuf-dma-sg.c
+++ b/drivers/media/v4l2-core/videobuf-dma-sg.c
@@ -253,9 +253,11 @@ int videobuf_dma_init_kernel(struct videobuf_dmabuf *dma, int direction,
253 return 0; 253 return 0;
254out_free_pages: 254out_free_pages:
255 while (i > 0) { 255 while (i > 0) {
256 void *addr = page_address(dma->vaddr_pages[i]); 256 void *addr;
257 dma_free_coherent(dma->dev, PAGE_SIZE, addr, dma->dma_addr[i]); 257
258 i--; 258 i--;
259 addr = page_address(dma->vaddr_pages[i]);
260 dma_free_coherent(dma->dev, PAGE_SIZE, addr, dma->dma_addr[i]);
259 } 261 }
260 kfree(dma->dma_addr); 262 kfree(dma->dma_addr);
261 dma->dma_addr = NULL; 263 dma->dma_addr = NULL;
diff --git a/drivers/media/v4l2-core/videobuf2-core.c b/drivers/media/v4l2-core/videobuf2-core.c
index 25d3ae2188cb..f2e43de3dd87 100644
--- a/drivers/media/v4l2-core/videobuf2-core.c
+++ b/drivers/media/v4l2-core/videobuf2-core.c
@@ -36,7 +36,7 @@ module_param(debug, int, 0644);
36#define dprintk(level, fmt, arg...) \ 36#define dprintk(level, fmt, arg...) \
37 do { \ 37 do { \
38 if (debug >= level) \ 38 if (debug >= level) \
39 pr_debug("vb2: %s: " fmt, __func__, ## arg); \ 39 pr_info("vb2: %s: " fmt, __func__, ## arg); \
40 } while (0) 40 } while (0)
41 41
42#ifdef CONFIG_VIDEO_ADV_DEBUG 42#ifdef CONFIG_VIDEO_ADV_DEBUG
@@ -882,7 +882,9 @@ static int __reqbufs(struct vb2_queue *q, struct v4l2_requestbuffers *req)
882 * We already have buffers allocated, so first check if they 882 * We already have buffers allocated, so first check if they
883 * are not in use and can be freed. 883 * are not in use and can be freed.
884 */ 884 */
885 mutex_lock(&q->mmap_lock);
885 if (q->memory == V4L2_MEMORY_MMAP && __buffers_in_use(q)) { 886 if (q->memory == V4L2_MEMORY_MMAP && __buffers_in_use(q)) {
887 mutex_unlock(&q->mmap_lock);
886 dprintk(1, "memory in use, cannot free\n"); 888 dprintk(1, "memory in use, cannot free\n");
887 return -EBUSY; 889 return -EBUSY;
888 } 890 }
@@ -894,6 +896,7 @@ static int __reqbufs(struct vb2_queue *q, struct v4l2_requestbuffers *req)
894 */ 896 */
895 __vb2_queue_cancel(q); 897 __vb2_queue_cancel(q);
896 ret = __vb2_queue_free(q, q->num_buffers); 898 ret = __vb2_queue_free(q, q->num_buffers);
899 mutex_unlock(&q->mmap_lock);
897 if (ret) 900 if (ret)
898 return ret; 901 return ret;
899 902
@@ -955,6 +958,7 @@ static int __reqbufs(struct vb2_queue *q, struct v4l2_requestbuffers *req)
955 */ 958 */
956 } 959 }
957 960
961 mutex_lock(&q->mmap_lock);
958 q->num_buffers = allocated_buffers; 962 q->num_buffers = allocated_buffers;
959 963
960 if (ret < 0) { 964 if (ret < 0) {
@@ -963,8 +967,10 @@ static int __reqbufs(struct vb2_queue *q, struct v4l2_requestbuffers *req)
963 * from q->num_buffers. 967 * from q->num_buffers.
964 */ 968 */
965 __vb2_queue_free(q, allocated_buffers); 969 __vb2_queue_free(q, allocated_buffers);
970 mutex_unlock(&q->mmap_lock);
966 return ret; 971 return ret;
967 } 972 }
973 mutex_unlock(&q->mmap_lock);
968 974
969 /* 975 /*
970 * Return the number of successfully allocated buffers 976 * Return the number of successfully allocated buffers
@@ -1063,6 +1069,7 @@ static int __create_bufs(struct vb2_queue *q, struct v4l2_create_buffers *create
1063 */ 1069 */
1064 } 1070 }
1065 1071
1072 mutex_lock(&q->mmap_lock);
1066 q->num_buffers += allocated_buffers; 1073 q->num_buffers += allocated_buffers;
1067 1074
1068 if (ret < 0) { 1075 if (ret < 0) {
@@ -1071,8 +1078,10 @@ static int __create_bufs(struct vb2_queue *q, struct v4l2_create_buffers *create
1071 * from q->num_buffers. 1078 * from q->num_buffers.
1072 */ 1079 */
1073 __vb2_queue_free(q, allocated_buffers); 1080 __vb2_queue_free(q, allocated_buffers);
1081 mutex_unlock(&q->mmap_lock);
1074 return -ENOMEM; 1082 return -ENOMEM;
1075 } 1083 }
1084 mutex_unlock(&q->mmap_lock);
1076 1085
1077 /* 1086 /*
1078 * Return the number of successfully allocated buffers 1087 * Return the number of successfully allocated buffers
@@ -1581,7 +1590,6 @@ static void __enqueue_in_driver(struct vb2_buffer *vb)
1581static int __buf_prepare(struct vb2_buffer *vb, const struct v4l2_buffer *b) 1590static int __buf_prepare(struct vb2_buffer *vb, const struct v4l2_buffer *b)
1582{ 1591{
1583 struct vb2_queue *q = vb->vb2_queue; 1592 struct vb2_queue *q = vb->vb2_queue;
1584 struct rw_semaphore *mmap_sem;
1585 int ret; 1593 int ret;
1586 1594
1587 ret = __verify_length(vb, b); 1595 ret = __verify_length(vb, b);
@@ -1618,26 +1626,9 @@ static int __buf_prepare(struct vb2_buffer *vb, const struct v4l2_buffer *b)
1618 ret = __qbuf_mmap(vb, b); 1626 ret = __qbuf_mmap(vb, b);
1619 break; 1627 break;
1620 case V4L2_MEMORY_USERPTR: 1628 case V4L2_MEMORY_USERPTR:
1621 /* 1629 down_read(&current->mm->mmap_sem);
1622 * In case of user pointer buffers vb2 allocators need to get
1623 * direct access to userspace pages. This requires getting
1624 * the mmap semaphore for read access in the current process
1625 * structure. The same semaphore is taken before calling mmap
1626 * operation, while both qbuf/prepare_buf and mmap are called
1627 * by the driver or v4l2 core with the driver's lock held.
1628 * To avoid an AB-BA deadlock (mmap_sem then driver's lock in
1629 * mmap and driver's lock then mmap_sem in qbuf/prepare_buf),
1630 * the videobuf2 core releases the driver's lock, takes
1631 * mmap_sem and then takes the driver's lock again.
1632 */
1633 mmap_sem = &current->mm->mmap_sem;
1634 call_void_qop(q, wait_prepare, q);
1635 down_read(mmap_sem);
1636 call_void_qop(q, wait_finish, q);
1637
1638 ret = __qbuf_userptr(vb, b); 1630 ret = __qbuf_userptr(vb, b);
1639 1631 up_read(&current->mm->mmap_sem);
1640 up_read(mmap_sem);
1641 break; 1632 break;
1642 case V4L2_MEMORY_DMABUF: 1633 case V4L2_MEMORY_DMABUF:
1643 ret = __qbuf_dmabuf(vb, b); 1634 ret = __qbuf_dmabuf(vb, b);
@@ -2504,7 +2495,9 @@ int vb2_mmap(struct vb2_queue *q, struct vm_area_struct *vma)
2504 return -EINVAL; 2495 return -EINVAL;
2505 } 2496 }
2506 2497
2498 mutex_lock(&q->mmap_lock);
2507 ret = call_memop(vb, mmap, vb->planes[plane].mem_priv, vma); 2499 ret = call_memop(vb, mmap, vb->planes[plane].mem_priv, vma);
2500 mutex_unlock(&q->mmap_lock);
2508 if (ret) 2501 if (ret)
2509 return ret; 2502 return ret;
2510 2503
@@ -2523,6 +2516,7 @@ unsigned long vb2_get_unmapped_area(struct vb2_queue *q,
2523 unsigned long off = pgoff << PAGE_SHIFT; 2516 unsigned long off = pgoff << PAGE_SHIFT;
2524 struct vb2_buffer *vb; 2517 struct vb2_buffer *vb;
2525 unsigned int buffer, plane; 2518 unsigned int buffer, plane;
2519 void *vaddr;
2526 int ret; 2520 int ret;
2527 2521
2528 if (q->memory != V4L2_MEMORY_MMAP) { 2522 if (q->memory != V4L2_MEMORY_MMAP) {
@@ -2539,7 +2533,8 @@ unsigned long vb2_get_unmapped_area(struct vb2_queue *q,
2539 2533
2540 vb = q->bufs[buffer]; 2534 vb = q->bufs[buffer];
2541 2535
2542 return (unsigned long)vb2_plane_vaddr(vb, plane); 2536 vaddr = vb2_plane_vaddr(vb, plane);
2537 return vaddr ? (unsigned long)vaddr : -EINVAL;
2543} 2538}
2544EXPORT_SYMBOL_GPL(vb2_get_unmapped_area); 2539EXPORT_SYMBOL_GPL(vb2_get_unmapped_area);
2545#endif 2540#endif
@@ -2686,6 +2681,7 @@ int vb2_queue_init(struct vb2_queue *q)
2686 INIT_LIST_HEAD(&q->queued_list); 2681 INIT_LIST_HEAD(&q->queued_list);
2687 INIT_LIST_HEAD(&q->done_list); 2682 INIT_LIST_HEAD(&q->done_list);
2688 spin_lock_init(&q->done_lock); 2683 spin_lock_init(&q->done_lock);
2684 mutex_init(&q->mmap_lock);
2689 init_waitqueue_head(&q->done_wq); 2685 init_waitqueue_head(&q->done_wq);
2690 2686
2691 if (q->buf_struct_size == 0) 2687 if (q->buf_struct_size == 0)
@@ -2707,7 +2703,9 @@ void vb2_queue_release(struct vb2_queue *q)
2707{ 2703{
2708 __vb2_cleanup_fileio(q); 2704 __vb2_cleanup_fileio(q);
2709 __vb2_queue_cancel(q); 2705 __vb2_queue_cancel(q);
2706 mutex_lock(&q->mmap_lock);
2710 __vb2_queue_free(q, q->num_buffers); 2707 __vb2_queue_free(q, q->num_buffers);
2708 mutex_unlock(&q->mmap_lock);
2711} 2709}
2712EXPORT_SYMBOL_GPL(vb2_queue_release); 2710EXPORT_SYMBOL_GPL(vb2_queue_release);
2713 2711
@@ -2985,6 +2983,12 @@ static size_t __vb2_perform_fileio(struct vb2_queue *q, char __user *data, size_
2985 buf->queued = 0; 2983 buf->queued = 0;
2986 buf->size = read ? vb2_get_plane_payload(q->bufs[index], 0) 2984 buf->size = read ? vb2_get_plane_payload(q->bufs[index], 0)
2987 : vb2_plane_size(q->bufs[index], 0); 2985 : vb2_plane_size(q->bufs[index], 0);
2986 /* Compensate for data_offset on read in the multiplanar case. */
2987 if (is_multiplanar && read &&
2988 fileio->b.m.planes[0].data_offset < buf->size) {
2989 buf->pos = fileio->b.m.planes[0].data_offset;
2990 buf->size -= buf->pos;
2991 }
2988 } else { 2992 } else {
2989 buf = &fileio->bufs[index]; 2993 buf = &fileio->bufs[index];
2990 } 2994 }
@@ -3372,15 +3376,8 @@ EXPORT_SYMBOL_GPL(vb2_ioctl_expbuf);
3372int vb2_fop_mmap(struct file *file, struct vm_area_struct *vma) 3376int vb2_fop_mmap(struct file *file, struct vm_area_struct *vma)
3373{ 3377{
3374 struct video_device *vdev = video_devdata(file); 3378 struct video_device *vdev = video_devdata(file);
3375 struct mutex *lock = vdev->queue->lock ? vdev->queue->lock : vdev->lock;
3376 int err;
3377 3379
3378 if (lock && mutex_lock_interruptible(lock)) 3380 return vb2_mmap(vdev->queue, vma);
3379 return -ERESTARTSYS;
3380 err = vb2_mmap(vdev->queue, vma);
3381 if (lock)
3382 mutex_unlock(lock);
3383 return err;
3384} 3381}
3385EXPORT_SYMBOL_GPL(vb2_fop_mmap); 3382EXPORT_SYMBOL_GPL(vb2_fop_mmap);
3386 3383
@@ -3499,15 +3496,8 @@ unsigned long vb2_fop_get_unmapped_area(struct file *file, unsigned long addr,
3499 unsigned long len, unsigned long pgoff, unsigned long flags) 3496 unsigned long len, unsigned long pgoff, unsigned long flags)
3500{ 3497{
3501 struct video_device *vdev = video_devdata(file); 3498 struct video_device *vdev = video_devdata(file);
3502 struct mutex *lock = vdev->queue->lock ? vdev->queue->lock : vdev->lock;
3503 int ret;
3504 3499
3505 if (lock && mutex_lock_interruptible(lock)) 3500 return vb2_get_unmapped_area(vdev->queue, addr, len, pgoff, flags);
3506 return -ERESTARTSYS;
3507 ret = vb2_get_unmapped_area(vdev->queue, addr, len, pgoff, flags);
3508 if (lock)
3509 mutex_unlock(lock);
3510 return ret;
3511} 3501}
3512EXPORT_SYMBOL_GPL(vb2_fop_get_unmapped_area); 3502EXPORT_SYMBOL_GPL(vb2_fop_get_unmapped_area);
3513#endif 3503#endif
diff --git a/drivers/staging/media/Kconfig b/drivers/staging/media/Kconfig
index 3323eb5e77b0..655cf5037b0b 100644
--- a/drivers/staging/media/Kconfig
+++ b/drivers/staging/media/Kconfig
@@ -19,8 +19,6 @@ menuconfig STAGING_MEDIA
19if STAGING_MEDIA 19if STAGING_MEDIA
20 20
21# Please keep them in alphabetic order 21# Please keep them in alphabetic order
22source "drivers/staging/media/as102/Kconfig"
23
24source "drivers/staging/media/bcm2048/Kconfig" 22source "drivers/staging/media/bcm2048/Kconfig"
25 23
26source "drivers/staging/media/cxd2099/Kconfig" 24source "drivers/staging/media/cxd2099/Kconfig"
diff --git a/drivers/staging/media/Makefile b/drivers/staging/media/Makefile
index 7db83f373f63..6dbe578178cd 100644
--- a/drivers/staging/media/Makefile
+++ b/drivers/staging/media/Makefile
@@ -1,4 +1,3 @@
1obj-$(CONFIG_DVB_AS102) += as102/
2obj-$(CONFIG_I2C_BCM2048) += bcm2048/ 1obj-$(CONFIG_I2C_BCM2048) += bcm2048/
3obj-$(CONFIG_DVB_CXD2099) += cxd2099/ 2obj-$(CONFIG_DVB_CXD2099) += cxd2099/
4obj-$(CONFIG_LIRC_STAGING) += lirc/ 3obj-$(CONFIG_LIRC_STAGING) += lirc/
diff --git a/drivers/staging/media/as102/as102_fe.c b/drivers/staging/media/as102/as102_fe.c
deleted file mode 100644
index b686b7617cdc..000000000000
--- a/drivers/staging/media/as102/as102_fe.c
+++ /dev/null
@@ -1,571 +0,0 @@
1/*
2 * Abilis Systems Single DVB-T Receiver
3 * Copyright (C) 2008 Pierrick Hascoet <pierrick.hascoet@abilis.com>
4 * Copyright (C) 2010 Devin Heitmueller <dheitmueller@kernellabs.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20#include "as102_drv.h"
21#include "as10x_types.h"
22#include "as10x_cmd.h"
23
24static void as10x_fe_copy_tps_parameters(struct dtv_frontend_properties *dst,
25 struct as10x_tps *src);
26
27static void as102_fe_copy_tune_parameters(struct as10x_tune_args *dst,
28 struct dtv_frontend_properties *src);
29
30static int as102_fe_set_frontend(struct dvb_frontend *fe)
31{
32 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
33 int ret = 0;
34 struct as102_dev_t *dev;
35 struct as10x_tune_args tune_args = { 0 };
36
37 dev = (struct as102_dev_t *) fe->tuner_priv;
38 if (dev == NULL)
39 return -ENODEV;
40
41 if (mutex_lock_interruptible(&dev->bus_adap.lock))
42 return -EBUSY;
43
44 as102_fe_copy_tune_parameters(&tune_args, p);
45
46 /* send abilis command: SET_TUNE */
47 ret = as10x_cmd_set_tune(&dev->bus_adap, &tune_args);
48 if (ret != 0)
49 dprintk(debug, "as10x_cmd_set_tune failed. (err = %d)\n", ret);
50
51 mutex_unlock(&dev->bus_adap.lock);
52
53 return (ret < 0) ? -EINVAL : 0;
54}
55
56static int as102_fe_get_frontend(struct dvb_frontend *fe)
57{
58 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
59 int ret = 0;
60 struct as102_dev_t *dev;
61 struct as10x_tps tps = { 0 };
62
63 dev = (struct as102_dev_t *) fe->tuner_priv;
64 if (dev == NULL)
65 return -EINVAL;
66
67 if (mutex_lock_interruptible(&dev->bus_adap.lock))
68 return -EBUSY;
69
70 /* send abilis command: GET_TPS */
71 ret = as10x_cmd_get_tps(&dev->bus_adap, &tps);
72
73 if (ret == 0)
74 as10x_fe_copy_tps_parameters(p, &tps);
75
76 mutex_unlock(&dev->bus_adap.lock);
77
78 return (ret < 0) ? -EINVAL : 0;
79}
80
81static int as102_fe_get_tune_settings(struct dvb_frontend *fe,
82 struct dvb_frontend_tune_settings *settings) {
83
84#if 0
85 dprintk(debug, "step_size = %d\n", settings->step_size);
86 dprintk(debug, "max_drift = %d\n", settings->max_drift);
87 dprintk(debug, "min_delay_ms = %d -> %d\n", settings->min_delay_ms,
88 1000);
89#endif
90
91 settings->min_delay_ms = 1000;
92
93 return 0;
94}
95
96
97static int as102_fe_read_status(struct dvb_frontend *fe, fe_status_t *status)
98{
99 int ret = 0;
100 struct as102_dev_t *dev;
101 struct as10x_tune_status tstate = { 0 };
102
103 dev = (struct as102_dev_t *) fe->tuner_priv;
104 if (dev == NULL)
105 return -ENODEV;
106
107 if (mutex_lock_interruptible(&dev->bus_adap.lock))
108 return -EBUSY;
109
110 /* send abilis command: GET_TUNE_STATUS */
111 ret = as10x_cmd_get_tune_status(&dev->bus_adap, &tstate);
112 if (ret < 0) {
113 dprintk(debug, "as10x_cmd_get_tune_status failed (err = %d)\n",
114 ret);
115 goto out;
116 }
117
118 dev->signal_strength = tstate.signal_strength;
119 dev->ber = tstate.BER;
120
121 switch (tstate.tune_state) {
122 case TUNE_STATUS_SIGNAL_DVB_OK:
123 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER;
124 break;
125 case TUNE_STATUS_STREAM_DETECTED:
126 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_SYNC;
127 break;
128 case TUNE_STATUS_STREAM_TUNED:
129 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_SYNC |
130 FE_HAS_LOCK;
131 break;
132 default:
133 *status = TUNE_STATUS_NOT_TUNED;
134 }
135
136 dprintk(debug, "tuner status: 0x%02x, strength %d, per: %d, ber: %d\n",
137 tstate.tune_state, tstate.signal_strength,
138 tstate.PER, tstate.BER);
139
140 if (*status & FE_HAS_LOCK) {
141 if (as10x_cmd_get_demod_stats(&dev->bus_adap,
142 (struct as10x_demod_stats *) &dev->demod_stats) < 0) {
143 memset(&dev->demod_stats, 0, sizeof(dev->demod_stats));
144 dprintk(debug,
145 "as10x_cmd_get_demod_stats failed (probably not tuned)\n");
146 } else {
147 dprintk(debug,
148 "demod status: fc: 0x%08x, bad fc: 0x%08x, "
149 "bytes corrected: 0x%08x , MER: 0x%04x\n",
150 dev->demod_stats.frame_count,
151 dev->demod_stats.bad_frame_count,
152 dev->demod_stats.bytes_fixed_by_rs,
153 dev->demod_stats.mer);
154 }
155 } else {
156 memset(&dev->demod_stats, 0, sizeof(dev->demod_stats));
157 }
158
159out:
160 mutex_unlock(&dev->bus_adap.lock);
161 return ret;
162}
163
164/*
165 * Note:
166 * - in AS102 SNR=MER
167 * - the SNR will be returned in linear terms, i.e. not in dB
168 * - the accuracy equals ±2dB for a SNR range from 4dB to 30dB
169 * - the accuracy is >2dB for SNR values outside this range
170 */
171static int as102_fe_read_snr(struct dvb_frontend *fe, u16 *snr)
172{
173 struct as102_dev_t *dev;
174
175 dev = (struct as102_dev_t *) fe->tuner_priv;
176 if (dev == NULL)
177 return -ENODEV;
178
179 *snr = dev->demod_stats.mer;
180
181 return 0;
182}
183
184static int as102_fe_read_ber(struct dvb_frontend *fe, u32 *ber)
185{
186 struct as102_dev_t *dev;
187
188 dev = (struct as102_dev_t *) fe->tuner_priv;
189 if (dev == NULL)
190 return -ENODEV;
191
192 *ber = dev->ber;
193
194 return 0;
195}
196
197static int as102_fe_read_signal_strength(struct dvb_frontend *fe,
198 u16 *strength)
199{
200 struct as102_dev_t *dev;
201
202 dev = (struct as102_dev_t *) fe->tuner_priv;
203 if (dev == NULL)
204 return -ENODEV;
205
206 *strength = (((0xffff * 400) * dev->signal_strength + 41000) * 2);
207
208 return 0;
209}
210
211static int as102_fe_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
212{
213 struct as102_dev_t *dev;
214
215 dev = (struct as102_dev_t *) fe->tuner_priv;
216 if (dev == NULL)
217 return -ENODEV;
218
219 if (dev->demod_stats.has_started)
220 *ucblocks = dev->demod_stats.bad_frame_count;
221 else
222 *ucblocks = 0;
223
224 return 0;
225}
226
227static int as102_fe_ts_bus_ctrl(struct dvb_frontend *fe, int acquire)
228{
229 struct as102_dev_t *dev;
230 int ret;
231
232 dev = (struct as102_dev_t *) fe->tuner_priv;
233 if (dev == NULL)
234 return -ENODEV;
235
236 if (mutex_lock_interruptible(&dev->bus_adap.lock))
237 return -EBUSY;
238
239 if (acquire) {
240 if (elna_enable)
241 as10x_cmd_set_context(&dev->bus_adap,
242 CONTEXT_LNA, dev->elna_cfg);
243
244 ret = as10x_cmd_turn_on(&dev->bus_adap);
245 } else {
246 ret = as10x_cmd_turn_off(&dev->bus_adap);
247 }
248
249 mutex_unlock(&dev->bus_adap.lock);
250
251 return ret;
252}
253
254static struct dvb_frontend_ops as102_fe_ops = {
255 .delsys = { SYS_DVBT },
256 .info = {
257 .name = "Unknown AS102 device",
258 .frequency_min = 174000000,
259 .frequency_max = 862000000,
260 .frequency_stepsize = 166667,
261 .caps = FE_CAN_INVERSION_AUTO
262 | FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4
263 | FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO
264 | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QPSK
265 | FE_CAN_QAM_AUTO
266 | FE_CAN_TRANSMISSION_MODE_AUTO
267 | FE_CAN_GUARD_INTERVAL_AUTO
268 | FE_CAN_HIERARCHY_AUTO
269 | FE_CAN_RECOVER
270 | FE_CAN_MUTE_TS
271 },
272
273 .set_frontend = as102_fe_set_frontend,
274 .get_frontend = as102_fe_get_frontend,
275 .get_tune_settings = as102_fe_get_tune_settings,
276
277 .read_status = as102_fe_read_status,
278 .read_snr = as102_fe_read_snr,
279 .read_ber = as102_fe_read_ber,
280 .read_signal_strength = as102_fe_read_signal_strength,
281 .read_ucblocks = as102_fe_read_ucblocks,
282 .ts_bus_ctrl = as102_fe_ts_bus_ctrl,
283};
284
285int as102_dvb_unregister_fe(struct dvb_frontend *fe)
286{
287 /* unregister frontend */
288 dvb_unregister_frontend(fe);
289
290 /* detach frontend */
291 dvb_frontend_detach(fe);
292
293 return 0;
294}
295
296int as102_dvb_register_fe(struct as102_dev_t *as102_dev,
297 struct dvb_frontend *dvb_fe)
298{
299 int errno;
300 struct dvb_adapter *dvb_adap;
301
302 if (as102_dev == NULL)
303 return -EINVAL;
304
305 /* extract dvb_adapter */
306 dvb_adap = &as102_dev->dvb_adap;
307
308 /* init frontend callback ops */
309 memcpy(&dvb_fe->ops, &as102_fe_ops, sizeof(struct dvb_frontend_ops));
310 strncpy(dvb_fe->ops.info.name, as102_dev->name,
311 sizeof(dvb_fe->ops.info.name));
312
313 /* register dvb frontend */
314 errno = dvb_register_frontend(dvb_adap, dvb_fe);
315 if (errno == 0)
316 dvb_fe->tuner_priv = as102_dev;
317
318 return errno;
319}
320
321static void as10x_fe_copy_tps_parameters(struct dtv_frontend_properties *fe_tps,
322 struct as10x_tps *as10x_tps)
323{
324
325 /* extract constellation */
326 switch (as10x_tps->modulation) {
327 case CONST_QPSK:
328 fe_tps->modulation = QPSK;
329 break;
330 case CONST_QAM16:
331 fe_tps->modulation = QAM_16;
332 break;
333 case CONST_QAM64:
334 fe_tps->modulation = QAM_64;
335 break;
336 }
337
338 /* extract hierarchy */
339 switch (as10x_tps->hierarchy) {
340 case HIER_NONE:
341 fe_tps->hierarchy = HIERARCHY_NONE;
342 break;
343 case HIER_ALPHA_1:
344 fe_tps->hierarchy = HIERARCHY_1;
345 break;
346 case HIER_ALPHA_2:
347 fe_tps->hierarchy = HIERARCHY_2;
348 break;
349 case HIER_ALPHA_4:
350 fe_tps->hierarchy = HIERARCHY_4;
351 break;
352 }
353
354 /* extract code rate HP */
355 switch (as10x_tps->code_rate_HP) {
356 case CODE_RATE_1_2:
357 fe_tps->code_rate_HP = FEC_1_2;
358 break;
359 case CODE_RATE_2_3:
360 fe_tps->code_rate_HP = FEC_2_3;
361 break;
362 case CODE_RATE_3_4:
363 fe_tps->code_rate_HP = FEC_3_4;
364 break;
365 case CODE_RATE_5_6:
366 fe_tps->code_rate_HP = FEC_5_6;
367 break;
368 case CODE_RATE_7_8:
369 fe_tps->code_rate_HP = FEC_7_8;
370 break;
371 }
372
373 /* extract code rate LP */
374 switch (as10x_tps->code_rate_LP) {
375 case CODE_RATE_1_2:
376 fe_tps->code_rate_LP = FEC_1_2;
377 break;
378 case CODE_RATE_2_3:
379 fe_tps->code_rate_LP = FEC_2_3;
380 break;
381 case CODE_RATE_3_4:
382 fe_tps->code_rate_LP = FEC_3_4;
383 break;
384 case CODE_RATE_5_6:
385 fe_tps->code_rate_LP = FEC_5_6;
386 break;
387 case CODE_RATE_7_8:
388 fe_tps->code_rate_LP = FEC_7_8;
389 break;
390 }
391
392 /* extract guard interval */
393 switch (as10x_tps->guard_interval) {
394 case GUARD_INT_1_32:
395 fe_tps->guard_interval = GUARD_INTERVAL_1_32;
396 break;
397 case GUARD_INT_1_16:
398 fe_tps->guard_interval = GUARD_INTERVAL_1_16;
399 break;
400 case GUARD_INT_1_8:
401 fe_tps->guard_interval = GUARD_INTERVAL_1_8;
402 break;
403 case GUARD_INT_1_4:
404 fe_tps->guard_interval = GUARD_INTERVAL_1_4;
405 break;
406 }
407
408 /* extract transmission mode */
409 switch (as10x_tps->transmission_mode) {
410 case TRANS_MODE_2K:
411 fe_tps->transmission_mode = TRANSMISSION_MODE_2K;
412 break;
413 case TRANS_MODE_8K:
414 fe_tps->transmission_mode = TRANSMISSION_MODE_8K;
415 break;
416 }
417}
418
419static uint8_t as102_fe_get_code_rate(fe_code_rate_t arg)
420{
421 uint8_t c;
422
423 switch (arg) {
424 case FEC_1_2:
425 c = CODE_RATE_1_2;
426 break;
427 case FEC_2_3:
428 c = CODE_RATE_2_3;
429 break;
430 case FEC_3_4:
431 c = CODE_RATE_3_4;
432 break;
433 case FEC_5_6:
434 c = CODE_RATE_5_6;
435 break;
436 case FEC_7_8:
437 c = CODE_RATE_7_8;
438 break;
439 default:
440 c = CODE_RATE_UNKNOWN;
441 break;
442 }
443
444 return c;
445}
446
447static void as102_fe_copy_tune_parameters(struct as10x_tune_args *tune_args,
448 struct dtv_frontend_properties *params)
449{
450
451 /* set frequency */
452 tune_args->freq = params->frequency / 1000;
453
454 /* fix interleaving_mode */
455 tune_args->interleaving_mode = INTLV_NATIVE;
456
457 switch (params->bandwidth_hz) {
458 case 8000000:
459 tune_args->bandwidth = BW_8_MHZ;
460 break;
461 case 7000000:
462 tune_args->bandwidth = BW_7_MHZ;
463 break;
464 case 6000000:
465 tune_args->bandwidth = BW_6_MHZ;
466 break;
467 default:
468 tune_args->bandwidth = BW_8_MHZ;
469 }
470
471 switch (params->guard_interval) {
472 case GUARD_INTERVAL_1_32:
473 tune_args->guard_interval = GUARD_INT_1_32;
474 break;
475 case GUARD_INTERVAL_1_16:
476 tune_args->guard_interval = GUARD_INT_1_16;
477 break;
478 case GUARD_INTERVAL_1_8:
479 tune_args->guard_interval = GUARD_INT_1_8;
480 break;
481 case GUARD_INTERVAL_1_4:
482 tune_args->guard_interval = GUARD_INT_1_4;
483 break;
484 case GUARD_INTERVAL_AUTO:
485 default:
486 tune_args->guard_interval = GUARD_UNKNOWN;
487 break;
488 }
489
490 switch (params->modulation) {
491 case QPSK:
492 tune_args->modulation = CONST_QPSK;
493 break;
494 case QAM_16:
495 tune_args->modulation = CONST_QAM16;
496 break;
497 case QAM_64:
498 tune_args->modulation = CONST_QAM64;
499 break;
500 default:
501 tune_args->modulation = CONST_UNKNOWN;
502 break;
503 }
504
505 switch (params->transmission_mode) {
506 case TRANSMISSION_MODE_2K:
507 tune_args->transmission_mode = TRANS_MODE_2K;
508 break;
509 case TRANSMISSION_MODE_8K:
510 tune_args->transmission_mode = TRANS_MODE_8K;
511 break;
512 default:
513 tune_args->transmission_mode = TRANS_MODE_UNKNOWN;
514 }
515
516 switch (params->hierarchy) {
517 case HIERARCHY_NONE:
518 tune_args->hierarchy = HIER_NONE;
519 break;
520 case HIERARCHY_1:
521 tune_args->hierarchy = HIER_ALPHA_1;
522 break;
523 case HIERARCHY_2:
524 tune_args->hierarchy = HIER_ALPHA_2;
525 break;
526 case HIERARCHY_4:
527 tune_args->hierarchy = HIER_ALPHA_4;
528 break;
529 case HIERARCHY_AUTO:
530 tune_args->hierarchy = HIER_UNKNOWN;
531 break;
532 }
533
534 dprintk(debug, "tuner parameters: freq: %d bw: 0x%02x gi: 0x%02x\n",
535 params->frequency,
536 tune_args->bandwidth,
537 tune_args->guard_interval);
538
539 /*
540 * Detect a hierarchy selection
541 * if HP/LP are both set to FEC_NONE, HP will be selected.
542 */
543 if ((tune_args->hierarchy != HIER_NONE) &&
544 ((params->code_rate_LP == FEC_NONE) ||
545 (params->code_rate_HP == FEC_NONE))) {
546
547 if (params->code_rate_LP == FEC_NONE) {
548 tune_args->hier_select = HIER_HIGH_PRIORITY;
549 tune_args->code_rate =
550 as102_fe_get_code_rate(params->code_rate_HP);
551 }
552
553 if (params->code_rate_HP == FEC_NONE) {
554 tune_args->hier_select = HIER_LOW_PRIORITY;
555 tune_args->code_rate =
556 as102_fe_get_code_rate(params->code_rate_LP);
557 }
558
559 dprintk(debug,
560 "\thierarchy: 0x%02x selected: %s code_rate_%s: 0x%02x\n",
561 tune_args->hierarchy,
562 tune_args->hier_select == HIER_HIGH_PRIORITY ?
563 "HP" : "LP",
564 tune_args->hier_select == HIER_HIGH_PRIORITY ?
565 "HP" : "LP",
566 tune_args->code_rate);
567 } else {
568 tune_args->code_rate =
569 as102_fe_get_code_rate(params->code_rate_HP);
570 }
571}
diff --git a/drivers/staging/media/davinci_vpfe/Kconfig b/drivers/staging/media/davinci_vpfe/Kconfig
index 12f321dd2399..4de2f082491d 100644
--- a/drivers/staging/media/davinci_vpfe/Kconfig
+++ b/drivers/staging/media/davinci_vpfe/Kconfig
@@ -1,6 +1,7 @@
1config VIDEO_DM365_VPFE 1config VIDEO_DM365_VPFE
2 tristate "DM365 VPFE Media Controller Capture Driver" 2 tristate "DM365 VPFE Media Controller Capture Driver"
3 depends on VIDEO_V4L2 && ARCH_DAVINCI_DM365 && !VIDEO_DM365_ISIF 3 depends on VIDEO_V4L2 && ARCH_DAVINCI_DM365 && !VIDEO_DM365_ISIF
4 depends on HAS_DMA
4 select VIDEOBUF2_DMA_CONTIG 5 select VIDEOBUF2_DMA_CONTIG
5 help 6 help
6 Support for DM365 VPFE based Media Controller Capture driver. 7 Support for DM365 VPFE based Media Controller Capture driver.
diff --git a/drivers/staging/media/dt3155v4l/Kconfig b/drivers/staging/media/dt3155v4l/Kconfig
index 226a1ca90b3c..2d496001b6e8 100644
--- a/drivers/staging/media/dt3155v4l/Kconfig
+++ b/drivers/staging/media/dt3155v4l/Kconfig
@@ -1,6 +1,7 @@
1config VIDEO_DT3155 1config VIDEO_DT3155
2 tristate "DT3155 frame grabber, Video4Linux interface" 2 tristate "DT3155 frame grabber, Video4Linux interface"
3 depends on PCI && VIDEO_DEV && VIDEO_V4L2 3 depends on PCI && VIDEO_DEV && VIDEO_V4L2
4 depends on HAS_DMA
4 select VIDEOBUF2_DMA_CONTIG 5 select VIDEOBUF2_DMA_CONTIG
5 default n 6 default n
6 ---help--- 7 ---help---
diff --git a/drivers/staging/media/lirc/lirc_imon.c b/drivers/staging/media/lirc/lirc_imon.c
index 726cc3a31856..7aca44f28c5a 100644
--- a/drivers/staging/media/lirc/lirc_imon.c
+++ b/drivers/staging/media/lirc/lirc_imon.c
@@ -414,6 +414,7 @@ static ssize_t vfd_write(struct file *file, const char __user *buf,
414 data_buf = memdup_user(buf, n_bytes); 414 data_buf = memdup_user(buf, n_bytes);
415 if (IS_ERR(data_buf)) { 415 if (IS_ERR(data_buf)) {
416 retval = PTR_ERR(data_buf); 416 retval = PTR_ERR(data_buf);
417 data_buf = NULL;
417 goto exit; 418 goto exit;
418 } 419 }
419 420
diff --git a/drivers/staging/media/lirc/lirc_sasem.c b/drivers/staging/media/lirc/lirc_sasem.c
index 86ad811fda24..c20ef56202bf 100644
--- a/drivers/staging/media/lirc/lirc_sasem.c
+++ b/drivers/staging/media/lirc/lirc_sasem.c
@@ -392,6 +392,7 @@ static ssize_t vfd_write(struct file *file, const char __user *buf,
392 data_buf = memdup_user((void const __user *)buf, n_bytes); 392 data_buf = memdup_user((void const __user *)buf, n_bytes);
393 if (IS_ERR(data_buf)) { 393 if (IS_ERR(data_buf)) {
394 retval = PTR_ERR(data_buf); 394 retval = PTR_ERR(data_buf);
395 data_buf = NULL;
395 goto exit; 396 goto exit;
396 } 397 }
397 398
diff --git a/drivers/staging/media/omap4iss/Kconfig b/drivers/staging/media/omap4iss/Kconfig
index 8afc6fee40c5..b78643f907e7 100644
--- a/drivers/staging/media/omap4iss/Kconfig
+++ b/drivers/staging/media/omap4iss/Kconfig
@@ -1,6 +1,7 @@
1config VIDEO_OMAP4 1config VIDEO_OMAP4
2 bool "OMAP 4 Camera support" 2 bool "OMAP 4 Camera support"
3 depends on VIDEO_V4L2=y && VIDEO_V4L2_SUBDEV_API && I2C=y && ARCH_OMAP4 3 depends on VIDEO_V4L2=y && VIDEO_V4L2_SUBDEV_API && I2C=y && ARCH_OMAP4
4 depends on HAS_DMA
4 select VIDEOBUF2_DMA_CONTIG 5 select VIDEOBUF2_DMA_CONTIG
5 ---help--- 6 ---help---
6 Driver for an OMAP 4 ISS controller. 7 Driver for an OMAP 4 ISS controller.
diff --git a/include/media/davinci/dm644x_ccdc.h b/include/media/davinci/dm644x_ccdc.h
index 852e96c4bb46..984fb79031de 100644
--- a/include/media/davinci/dm644x_ccdc.h
+++ b/include/media/davinci/dm644x_ccdc.h
@@ -114,7 +114,7 @@ struct ccdc_fault_pixel {
114 /* Number of fault pixel */ 114 /* Number of fault pixel */
115 unsigned short fp_num; 115 unsigned short fp_num;
116 /* Address of fault pixel table */ 116 /* Address of fault pixel table */
117 unsigned int fpc_table_addr; 117 unsigned long fpc_table_addr;
118}; 118};
119 119
120/* Structure for CCDC configuration parameters for raw capture mode passed 120/* Structure for CCDC configuration parameters for raw capture mode passed
diff --git a/include/media/omap3isp.h b/include/media/omap3isp.h
index c9d06d9f7e6e..398279dd1922 100644
--- a/include/media/omap3isp.h
+++ b/include/media/omap3isp.h
@@ -57,6 +57,8 @@ enum {
57 * 0 - Active high, 1 - Active low 57 * 0 - Active high, 1 - Active low
58 * @vs_pol: Vertical synchronization polarity 58 * @vs_pol: Vertical synchronization polarity
59 * 0 - Active high, 1 - Active low 59 * 0 - Active high, 1 - Active low
60 * @fld_pol: Field signal polarity
61 * 0 - Positive, 1 - Negative
60 * @data_pol: Data polarity 62 * @data_pol: Data polarity
61 * 0 - Normal, 1 - One's complement 63 * 0 - Normal, 1 - One's complement
62 */ 64 */
@@ -65,6 +67,7 @@ struct isp_parallel_platform_data {
65 unsigned int clk_pol:1; 67 unsigned int clk_pol:1;
66 unsigned int hs_pol:1; 68 unsigned int hs_pol:1;
67 unsigned int vs_pol:1; 69 unsigned int vs_pol:1;
70 unsigned int fld_pol:1;
68 unsigned int data_pol:1; 71 unsigned int data_pol:1;
69}; 72};
70 73
diff --git a/include/media/rc-map.h b/include/media/rc-map.h
index 80f951890b4c..e7a1514075ec 100644
--- a/include/media/rc-map.h
+++ b/include/media/rc-map.h
@@ -135,6 +135,7 @@ void rc_map_init(void);
135#define RC_MAP_DM1105_NEC "rc-dm1105-nec" 135#define RC_MAP_DM1105_NEC "rc-dm1105-nec"
136#define RC_MAP_DNTV_LIVE_DVBT_PRO "rc-dntv-live-dvbt-pro" 136#define RC_MAP_DNTV_LIVE_DVBT_PRO "rc-dntv-live-dvbt-pro"
137#define RC_MAP_DNTV_LIVE_DVB_T "rc-dntv-live-dvb-t" 137#define RC_MAP_DNTV_LIVE_DVB_T "rc-dntv-live-dvb-t"
138#define RC_MAP_DVBSKY "rc-dvbsky"
138#define RC_MAP_EMPTY "rc-empty" 139#define RC_MAP_EMPTY "rc-empty"
139#define RC_MAP_EM_TERRATEC "rc-em-terratec" 140#define RC_MAP_EM_TERRATEC "rc-em-terratec"
140#define RC_MAP_ENCORE_ENLTV2 "rc-encore-enltv2" 141#define RC_MAP_ENCORE_ENLTV2 "rc-encore-enltv2"
diff --git a/include/media/videobuf2-core.h b/include/media/videobuf2-core.h
index 2fefcf491aa8..6ef2d01197da 100644
--- a/include/media/videobuf2-core.h
+++ b/include/media/videobuf2-core.h
@@ -356,8 +356,8 @@ struct v4l2_fh;
356 * @buf_struct_size: size of the driver-specific buffer structure; 356 * @buf_struct_size: size of the driver-specific buffer structure;
357 * "0" indicates the driver doesn't want to use a custom buffer 357 * "0" indicates the driver doesn't want to use a custom buffer
358 * structure type, so sizeof(struct vb2_buffer) will is used 358 * structure type, so sizeof(struct vb2_buffer) will is used
359 * @timestamp_flags: Timestamp flags; V4L2_BUF_FLAGS_TIMESTAMP_* and 359 * @timestamp_flags: Timestamp flags; V4L2_BUF_FLAG_TIMESTAMP_* and
360 * V4L2_BUF_FLAGS_TSTAMP_SRC_* 360 * V4L2_BUF_FLAG_TSTAMP_SRC_*
361 * @gfp_flags: additional gfp flags used when allocating the buffers. 361 * @gfp_flags: additional gfp flags used when allocating the buffers.
362 * Typically this is 0, but it may be e.g. GFP_DMA or __GFP_DMA32 362 * Typically this is 0, but it may be e.g. GFP_DMA or __GFP_DMA32
363 * to force the buffer allocation to a specific memory zone. 363 * to force the buffer allocation to a specific memory zone.
@@ -366,6 +366,7 @@ struct v4l2_fh;
366 * cannot be started unless at least this number of buffers 366 * cannot be started unless at least this number of buffers
367 * have been queued into the driver. 367 * have been queued into the driver.
368 * 368 *
369 * @mmap_lock: private mutex used when buffers are allocated/freed/mmapped
369 * @memory: current memory type used 370 * @memory: current memory type used
370 * @bufs: videobuf buffer structures 371 * @bufs: videobuf buffer structures
371 * @num_buffers: number of allocated/used buffers 372 * @num_buffers: number of allocated/used buffers
@@ -402,6 +403,7 @@ struct vb2_queue {
402 u32 min_buffers_needed; 403 u32 min_buffers_needed;
403 404
404/* private: internal use only */ 405/* private: internal use only */
406 struct mutex mmap_lock;
405 enum v4l2_memory memory; 407 enum v4l2_memory memory;
406 struct vb2_buffer *bufs[VIDEO_MAX_FRAME]; 408 struct vb2_buffer *bufs[VIDEO_MAX_FRAME];
407 unsigned int num_buffers; 409 unsigned int num_buffers;
@@ -592,6 +594,15 @@ vb2_plane_size(struct vb2_buffer *vb, unsigned int plane_no)
592 return 0; 594 return 0;
593} 595}
594 596
597/**
598 * vb2_start_streaming_called() - return streaming status of driver
599 * @q: videobuf queue
600 */
601static inline bool vb2_start_streaming_called(struct vb2_queue *q)
602{
603 return q->start_streaming_called;
604}
605
595/* 606/*
596 * The following functions are not part of the vb2 core API, but are simple 607 * The following functions are not part of the vb2 core API, but are simple
597 * helper functions that you can use in your struct v4l2_file_operations, 608 * helper functions that you can use in your struct v4l2_file_operations,
diff --git a/include/uapi/linux/Kbuild b/include/uapi/linux/Kbuild
index 70e150ebc6c9..3cc8e1c2b996 100644
--- a/include/uapi/linux/Kbuild
+++ b/include/uapi/linux/Kbuild
@@ -355,6 +355,7 @@ header-y += serio.h
355header-y += shm.h 355header-y += shm.h
356header-y += signal.h 356header-y += signal.h
357header-y += signalfd.h 357header-y += signalfd.h
358header-y += smiapp.h
358header-y += snmp.h 359header-y += snmp.h
359header-y += sock_diag.h 360header-y += sock_diag.h
360header-y += socket.h 361header-y += socket.h
diff --git a/include/uapi/linux/smiapp.h b/include/uapi/linux/smiapp.h
new file mode 100644
index 000000000000..53938f4412ee
--- /dev/null
+++ b/include/uapi/linux/smiapp.h
@@ -0,0 +1,29 @@
1/*
2 * include/uapi/linux/smiapp.h
3 *
4 * Generic driver for SMIA/SMIA++ compliant camera modules
5 *
6 * Copyright (C) 2014 Intel Corporation
7 * Contact: Sakari Ailus <sakari.ailus@iki.fi>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 */
19
20#ifndef __UAPI_LINUX_SMIAPP_H_
21#define __UAPI_LINUX_SMIAPP_H_
22
23#define V4L2_SMIAPP_TEST_PATTERN_MODE_DISABLED 0
24#define V4L2_SMIAPP_TEST_PATTERN_MODE_SOLID_COLOUR 1
25#define V4L2_SMIAPP_TEST_PATTERN_MODE_COLOUR_BARS 2
26#define V4L2_SMIAPP_TEST_PATTERN_MODE_COLOUR_BARS_GREY 3
27#define V4L2_SMIAPP_TEST_PATTERN_MODE_PN9 4
28
29#endif /* __UAPI_LINUX_SMIAPP_H_ */
diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h
index e946e43fb8d5..661f119a51b8 100644
--- a/include/uapi/linux/v4l2-controls.h
+++ b/include/uapi/linux/v4l2-controls.h
@@ -746,6 +746,8 @@ enum v4l2_auto_focus_range {
746 V4L2_AUTO_FOCUS_RANGE_INFINITY = 3, 746 V4L2_AUTO_FOCUS_RANGE_INFINITY = 3,
747}; 747};
748 748
749#define V4L2_CID_PAN_SPEED (V4L2_CID_CAMERA_CLASS_BASE+32)
750#define V4L2_CID_TILT_SPEED (V4L2_CID_CAMERA_CLASS_BASE+33)
749 751
750/* FM Modulator class control IDs */ 752/* FM Modulator class control IDs */
751 753
@@ -865,6 +867,10 @@ enum v4l2_jpeg_chroma_subsampling {
865#define V4L2_CID_VBLANK (V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 1) 867#define V4L2_CID_VBLANK (V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 1)
866#define V4L2_CID_HBLANK (V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 2) 868#define V4L2_CID_HBLANK (V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 2)
867#define V4L2_CID_ANALOGUE_GAIN (V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 3) 869#define V4L2_CID_ANALOGUE_GAIN (V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 3)
870#define V4L2_CID_TEST_PATTERN_RED (V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 4)
871#define V4L2_CID_TEST_PATTERN_GREENR (V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 5)
872#define V4L2_CID_TEST_PATTERN_BLUE (V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 6)
873#define V4L2_CID_TEST_PATTERN_GREENB (V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 7)
868 874
869 875
870/* Image processing controls */ 876/* Image processing controls */
diff --git a/include/uapi/linux/v4l2-dv-timings.h b/include/uapi/linux/v4l2-dv-timings.h
index 6c8f159e416e..6a0764c89fcb 100644
--- a/include/uapi/linux/v4l2-dv-timings.h
+++ b/include/uapi/linux/v4l2-dv-timings.h
@@ -21,17 +21,8 @@
21#ifndef _V4L2_DV_TIMINGS_H 21#ifndef _V4L2_DV_TIMINGS_H
22#define _V4L2_DV_TIMINGS_H 22#define _V4L2_DV_TIMINGS_H
23 23
24#if __GNUC__ < 4 || (__GNUC__ == 4 && (__GNUC_MINOR__ < 6))
25/* Sadly gcc versions older than 4.6 have a bug in how they initialize
26 anonymous unions where they require additional curly brackets.
27 This violates the C1x standard. This workaround adds the curly brackets
28 if needed. */
29#define V4L2_INIT_BT_TIMINGS(_width, args...) \ 24#define V4L2_INIT_BT_TIMINGS(_width, args...) \
30 { .bt = { _width , ## args } } 25 { .bt = { _width , ## args } }
31#else
32#define V4L2_INIT_BT_TIMINGS(_width, args...) \
33 .bt = { _width , ## args }
34#endif
35 26
36/* CEA-861-E timings (i.e. standard HDTV timings) */ 27/* CEA-861-E timings (i.e. standard HDTV timings) */
37 28
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index 778a3298fb34..1c2f84fd4d99 100644
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -79,6 +79,7 @@
79/* Four-character-code (FOURCC) */ 79/* Four-character-code (FOURCC) */
80#define v4l2_fourcc(a, b, c, d)\ 80#define v4l2_fourcc(a, b, c, d)\
81 ((__u32)(a) | ((__u32)(b) << 8) | ((__u32)(c) << 16) | ((__u32)(d) << 24)) 81 ((__u32)(a) | ((__u32)(b) << 8) | ((__u32)(c) << 16) | ((__u32)(d) << 24))
82#define v4l2_fourcc_be(a, b, c, d) (v4l2_fourcc(a, b, c, d) | (1 << 31))
82 83
83/* 84/*
84 * E N U M S 85 * E N U M S
@@ -307,6 +308,8 @@ struct v4l2_pix_format {
307#define V4L2_PIX_FMT_XRGB555 v4l2_fourcc('X', 'R', '1', '5') /* 16 XRGB-1-5-5-5 */ 308#define V4L2_PIX_FMT_XRGB555 v4l2_fourcc('X', 'R', '1', '5') /* 16 XRGB-1-5-5-5 */
308#define V4L2_PIX_FMT_RGB565 v4l2_fourcc('R', 'G', 'B', 'P') /* 16 RGB-5-6-5 */ 309#define V4L2_PIX_FMT_RGB565 v4l2_fourcc('R', 'G', 'B', 'P') /* 16 RGB-5-6-5 */
309#define V4L2_PIX_FMT_RGB555X v4l2_fourcc('R', 'G', 'B', 'Q') /* 16 RGB-5-5-5 BE */ 310#define V4L2_PIX_FMT_RGB555X v4l2_fourcc('R', 'G', 'B', 'Q') /* 16 RGB-5-5-5 BE */
311#define V4L2_PIX_FMT_ARGB555X v4l2_fourcc_be('A', 'R', '1', '5') /* 16 ARGB-5-5-5 BE */
312#define V4L2_PIX_FMT_XRGB555X v4l2_fourcc_be('X', 'R', '1', '5') /* 16 XRGB-5-5-5 BE */
310#define V4L2_PIX_FMT_RGB565X v4l2_fourcc('R', 'G', 'B', 'R') /* 16 RGB-5-6-5 BE */ 313#define V4L2_PIX_FMT_RGB565X v4l2_fourcc('R', 'G', 'B', 'R') /* 16 RGB-5-6-5 BE */
311#define V4L2_PIX_FMT_BGR666 v4l2_fourcc('B', 'G', 'R', 'H') /* 18 BGR-6-6-6 */ 314#define V4L2_PIX_FMT_BGR666 v4l2_fourcc('B', 'G', 'R', 'H') /* 18 BGR-6-6-6 */
312#define V4L2_PIX_FMT_BGR24 v4l2_fourcc('B', 'G', 'R', '3') /* 24 BGR-8-8-8 */ 315#define V4L2_PIX_FMT_BGR24 v4l2_fourcc('B', 'G', 'R', '3') /* 24 BGR-8-8-8 */
@@ -1285,11 +1288,11 @@ struct v4l2_ext_control {
1285 union { 1288 union {
1286 __s32 value; 1289 __s32 value;
1287 __s64 value64; 1290 __s64 value64;
1288 char *string; 1291 char __user *string;
1289 __u8 *p_u8; 1292 __u8 __user *p_u8;
1290 __u16 *p_u16; 1293 __u16 __user *p_u16;
1291 __u32 *p_u32; 1294 __u32 __user *p_u32;
1292 void *ptr; 1295 void __user *ptr;
1293 }; 1296 };
1294} __attribute__ ((packed)); 1297} __attribute__ ((packed));
1295 1298