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authorkonrad@kernel.org <konrad@kernel.org>2013-04-05 16:42:24 -0400
committerH. Peter Anvin <hpa@linux.intel.com>2013-04-11 18:41:15 -0400
commit4d681be3c33dd74efffbe2a8f70634f7128602ec (patch)
treebedae6990d10b9e137ea80c12f5746c14907120f
parent357d122670937c35b33d99c46356ef2b63182a1f (diff)
x86, wakeup, sleep: Use pvops functions for changing GDT entries
We check the TSS descriptor before we try to dereference it. Also we document what the value '9' actually means using the AMD64 Architecture Programmer's Manual Volume 2, pg 90: "Hex value 9: Available 64-bit TSS" and pg 91: "The available 32-bit TSS (09h), which is redefined as the available 64-bit TSS." Without this, on Xen, where the GDT is available as R/O (to protect the hypervisor from the guest modifying it), we end up with a pagetable fault. Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Link: http://lkml.kernel.org/r/1365194544-14648-5-git-send-email-konrad.wilk@oracle.com Cc: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
-rw-r--r--arch/x86/power/cpu.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/arch/x86/power/cpu.c b/arch/x86/power/cpu.c
index 82c39c532349..168da8429032 100644
--- a/arch/x86/power/cpu.c
+++ b/arch/x86/power/cpu.c
@@ -132,7 +132,10 @@ static void fix_processor_context(void)
132{ 132{
133 int cpu = smp_processor_id(); 133 int cpu = smp_processor_id();
134 struct tss_struct *t = &per_cpu(init_tss, cpu); 134 struct tss_struct *t = &per_cpu(init_tss, cpu);
135 135#ifdef CONFIG_X86_64
136 struct desc_struct *desc = get_cpu_gdt_table(cpu);
137 tss_desc tss;
138#endif
136 set_tss_desc(cpu, t); /* 139 set_tss_desc(cpu, t); /*
137 * This just modifies memory; should not be 140 * This just modifies memory; should not be
138 * necessary. But... This is necessary, because 141 * necessary. But... This is necessary, because
@@ -141,7 +144,9 @@ static void fix_processor_context(void)
141 */ 144 */
142 145
143#ifdef CONFIG_X86_64 146#ifdef CONFIG_X86_64
144 get_cpu_gdt_table(cpu)[GDT_ENTRY_TSS].type = 9; 147 memcpy(&tss, &desc[GDT_ENTRY_TSS], sizeof(tss_desc));
148 tss.type = 0x9; /* The available 64-bit TSS (see AMD vol 2, pg 91 */
149 write_gdt_entry(desc, GDT_ENTRY_TSS, &tss, DESC_TSS);
145 150
146 syscall_init(); /* This sets MSR_*STAR and related */ 151 syscall_init(); /* This sets MSR_*STAR and related */
147#endif 152#endif