diff options
author | Ben Widawsky <benjamin.widawsky@intel.com> | 2013-11-03 19:47:33 -0500 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-11-08 12:09:36 -0500 |
commit | 4d4dead67a4ab1d5de393f15ed5e4e2aa63d3bcf (patch) | |
tree | 5b8ab42b340f675cc4014e944fc608a4ca7f68a6 | |
parent | 8fe6bd239a72ba31c2568a29b730c9cd4f05c52c (diff) |
drm/i915/bdw: Add device IDs
v2: Squash in "drm/i915/bdw: Add BDW to the HAS_DDI check" as
suggested by Damien.
v3: Squash in VEBOX enabling from Zhao Yakui <yakui.zhao@intel.com>
v4: Rebase on top of Jesse's patch to extract all pci ids to
include/drm/i915_pciids.h.
v4: Replace Halo by its marketing moniker Iris. Requested by Ben.
v5: Switch from info->has*ring to info->ring_mask.
v6: Add 0x16X2 variant (which is newer than this patch)
Rename to use new naming scheme (Chris)
Remove Simulator PCI ids. These snuck in during rebase (Chris)
v7: Fix poor sed job from v6
Make the desktop variants use the desktop macro (Rebase error). Notice
that this makes no functional difference - it's just confusing.
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.c | 22 | ||||
-rw-r--r-- | include/drm/i915_pciids.h | 25 |
2 files changed, 46 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index a0804fa1e306..70799febb8ba 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c | |||
@@ -336,6 +336,24 @@ static const struct intel_device_info intel_haswell_m_info = { | |||
336 | .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, | 336 | .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, |
337 | }; | 337 | }; |
338 | 338 | ||
339 | static const struct intel_device_info intel_broadwell_d_info = { | ||
340 | .is_preliminary = 1, | ||
341 | .gen = 8, | ||
342 | .need_gfx_hws = 1, .has_hotplug = 1, | ||
343 | .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, | ||
344 | .has_llc = 1, | ||
345 | .has_ddi = 1, | ||
346 | }; | ||
347 | |||
348 | static const struct intel_device_info intel_broadwell_m_info = { | ||
349 | .is_preliminary = 1, | ||
350 | .gen = 8, .is_mobile = 1, | ||
351 | .need_gfx_hws = 1, .has_hotplug = 1, | ||
352 | .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, | ||
353 | .has_llc = 1, | ||
354 | .has_ddi = 1, | ||
355 | }; | ||
356 | |||
339 | /* | 357 | /* |
340 | * Make sure any device matches here are from most specific to most | 358 | * Make sure any device matches here are from most specific to most |
341 | * general. For example, since the Quanta match is based on the subsystem | 359 | * general. For example, since the Quanta match is based on the subsystem |
@@ -367,7 +385,9 @@ static const struct intel_device_info intel_haswell_m_info = { | |||
367 | INTEL_HSW_D_IDS(&intel_haswell_d_info), \ | 385 | INTEL_HSW_D_IDS(&intel_haswell_d_info), \ |
368 | INTEL_HSW_M_IDS(&intel_haswell_m_info), \ | 386 | INTEL_HSW_M_IDS(&intel_haswell_m_info), \ |
369 | INTEL_VLV_M_IDS(&intel_valleyview_m_info), \ | 387 | INTEL_VLV_M_IDS(&intel_valleyview_m_info), \ |
370 | INTEL_VLV_D_IDS(&intel_valleyview_d_info) | 388 | INTEL_VLV_D_IDS(&intel_valleyview_d_info), \ |
389 | INTEL_BDW_M_IDS(&intel_broadwell_m_info), \ | ||
390 | INTEL_BDW_D_IDS(&intel_broadwell_d_info) | ||
371 | 391 | ||
372 | static const struct pci_device_id pciidlist[] = { /* aka */ | 392 | static const struct pci_device_id pciidlist[] = { /* aka */ |
373 | INTEL_PCI_IDS, | 393 | INTEL_PCI_IDS, |
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index 8a10f5c354e6..940ece4934ba 100644 --- a/include/drm/i915_pciids.h +++ b/include/drm/i915_pciids.h | |||
@@ -208,4 +208,29 @@ | |||
208 | #define INTEL_VLV_D_IDS(info) \ | 208 | #define INTEL_VLV_D_IDS(info) \ |
209 | INTEL_VGA_DEVICE(0x0155, info) | 209 | INTEL_VGA_DEVICE(0x0155, info) |
210 | 210 | ||
211 | #define _INTEL_BDW_M(gt, id, info) \ | ||
212 | INTEL_VGA_DEVICE((((gt) - 1) << 4) | (id), info) | ||
213 | #define _INTEL_BDW_D(gt, id, info) \ | ||
214 | INTEL_VGA_DEVICE((((gt) - 1) << 4) | (id), info) | ||
215 | |||
216 | #define _INTEL_BDW_M_IDS(gt, info) \ | ||
217 | _INTEL_BDW_M(gt, 0x1602, info), /* ULT */ \ | ||
218 | _INTEL_BDW_M(gt, 0x1606, info), /* ULT */ \ | ||
219 | _INTEL_BDW_M(gt, 0x160B, info), /* Iris */ \ | ||
220 | _INTEL_BDW_M(gt, 0x160E, info) /* ULX */ | ||
221 | |||
222 | #define _INTEL_BDW_D_IDS(gt, info) \ | ||
223 | _INTEL_BDW_D(gt, 0x160A, info), /* Server */ \ | ||
224 | _INTEL_BDW_D(gt, 0x160D, info) /* Workstation */ | ||
225 | |||
226 | #define INTEL_BDW_M_IDS(info) \ | ||
227 | _INTEL_BDW_M_IDS(1, info), \ | ||
228 | _INTEL_BDW_M_IDS(2, info), \ | ||
229 | _INTEL_BDW_M_IDS(3, info) | ||
230 | |||
231 | #define INTEL_BDW_D_IDS(info) \ | ||
232 | _INTEL_BDW_D_IDS(1, info), \ | ||
233 | _INTEL_BDW_D_IDS(2, info), \ | ||
234 | _INTEL_BDW_D_IDS(3, info) | ||
235 | |||
211 | #endif /* _I915_PCIIDS_H */ | 236 | #endif /* _I915_PCIIDS_H */ |