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authorWolfram Sang <wsa+renesas@sang-engineering.com>2014-05-13 21:10:08 -0400
committerSimon Horman <horms+renesas@verge.net.au>2014-05-13 22:42:51 -0400
commit4c84c1b3accabdfb7aa8e98a4644c94df0703bb0 (patch)
treebdefe1f7724d35e5b2b45fc376af9510accb5d36
parent5f76a5699f52052468e006e6c58010c5183b8386 (diff)
ARM: shmobile: r7s72100: add scif nodes to dtsi
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--arch/arm/boot/dts/r7s72100.dtsi96
1 files changed, 96 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index 5a6e2481b567..a4a67380b0a2 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -200,6 +200,102 @@
200 status = "disabled"; 200 status = "disabled";
201 }; 201 };
202 202
203 scif0: serial@e8007000 {
204 compatible = "renesas,scif-r7s72100", "renesas,scif";
205 reg = <0xe8007000 64>;
206 interrupts = <0 190 IRQ_TYPE_LEVEL_HIGH>,
207 <0 191 IRQ_TYPE_LEVEL_HIGH>,
208 <0 192 IRQ_TYPE_LEVEL_HIGH>,
209 <0 189 IRQ_TYPE_LEVEL_HIGH>;
210 clocks = <&mstp4_clks R7S72100_CLK_SCIF0>;
211 clock-names = "sci_ick";
212 status = "disabled";
213 };
214
215 scif1: serial@e8007800 {
216 compatible = "renesas,scif-r7s72100", "renesas,scif";
217 reg = <0xe8007800 64>;
218 interrupts = <0 194 IRQ_TYPE_LEVEL_HIGH>,
219 <0 195 IRQ_TYPE_LEVEL_HIGH>,
220 <0 196 IRQ_TYPE_LEVEL_HIGH>,
221 <0 193 IRQ_TYPE_LEVEL_HIGH>;
222 clocks = <&mstp4_clks R7S72100_CLK_SCIF1>;
223 clock-names = "sci_ick";
224 status = "disabled";
225 };
226
227 scif2: serial@e8008000 {
228 compatible = "renesas,scif-r7s72100", "renesas,scif";
229 reg = <0xe8008000 64>;
230 interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>,
231 <0 199 IRQ_TYPE_LEVEL_HIGH>,
232 <0 200 IRQ_TYPE_LEVEL_HIGH>,
233 <0 197 IRQ_TYPE_LEVEL_HIGH>;
234 clocks = <&mstp4_clks R7S72100_CLK_SCIF2>;
235 clock-names = "sci_ick";
236 status = "disabled";
237 };
238
239 scif3: serial@e8008800 {
240 compatible = "renesas,scif-r7s72100", "renesas,scif";
241 reg = <0xe8008800 64>;
242 interrupts = <0 202 IRQ_TYPE_LEVEL_HIGH>,
243 <0 203 IRQ_TYPE_LEVEL_HIGH>,
244 <0 204 IRQ_TYPE_LEVEL_HIGH>,
245 <0 201 IRQ_TYPE_LEVEL_HIGH>;
246 clocks = <&mstp4_clks R7S72100_CLK_SCIF3>;
247 clock-names = "sci_ick";
248 status = "disabled";
249 };
250
251 scif4: serial@e8009000 {
252 compatible = "renesas,scif-r7s72100", "renesas,scif";
253 reg = <0xe8009000 64>;
254 interrupts = <0 206 IRQ_TYPE_LEVEL_HIGH>,
255 <0 207 IRQ_TYPE_LEVEL_HIGH>,
256 <0 208 IRQ_TYPE_LEVEL_HIGH>,
257 <0 205 IRQ_TYPE_LEVEL_HIGH>;
258 clocks = <&mstp4_clks R7S72100_CLK_SCIF4>;
259 clock-names = "sci_ick";
260 status = "disabled";
261 };
262
263 scif5: serial@e8009800 {
264 compatible = "renesas,scif-r7s72100", "renesas,scif";
265 reg = <0xe8009800 64>;
266 interrupts = <0 210 IRQ_TYPE_LEVEL_HIGH>,
267 <0 211 IRQ_TYPE_LEVEL_HIGH>,
268 <0 212 IRQ_TYPE_LEVEL_HIGH>,
269 <0 209 IRQ_TYPE_LEVEL_HIGH>;
270 clocks = <&mstp4_clks R7S72100_CLK_SCIF5>;
271 clock-names = "sci_ick";
272 status = "disabled";
273 };
274
275 scif6: serial@e800a000 {
276 compatible = "renesas,scif-r7s72100", "renesas,scif";
277 reg = <0xe800a000 64>;
278 interrupts = <0 214 IRQ_TYPE_LEVEL_HIGH>,
279 <0 215 IRQ_TYPE_LEVEL_HIGH>,
280 <0 216 IRQ_TYPE_LEVEL_HIGH>,
281 <0 213 IRQ_TYPE_LEVEL_HIGH>;
282 clocks = <&mstp4_clks R7S72100_CLK_SCIF6>;
283 clock-names = "sci_ick";
284 status = "disabled";
285 };
286
287 scif7: serial@e800a800 {
288 compatible = "renesas,scif-r7s72100", "renesas,scif";
289 reg = <0xe800a800 64>;
290 interrupts = <0 218 IRQ_TYPE_LEVEL_HIGH>,
291 <0 219 IRQ_TYPE_LEVEL_HIGH>,
292 <0 220 IRQ_TYPE_LEVEL_HIGH>,
293 <0 217 IRQ_TYPE_LEVEL_HIGH>;
294 clocks = <&mstp4_clks R7S72100_CLK_SCIF7>;
295 clock-names = "sci_ick";
296 status = "disabled";
297 };
298
203 spi0: spi@e800c800 { 299 spi0: spi@e800c800 {
204 compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz"; 300 compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
205 reg = <0xe800c800 0x24>; 301 reg = <0xe800c800 0x24>;