diff options
author | Michael Ellerman <michael@ellerman.id.au> | 2007-09-17 02:05:02 -0400 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2007-10-02 23:25:28 -0400 |
commit | 4acb889627412cbab6b4b44593efe232f5028eb2 (patch) | |
tree | b0309843df733e4b1403cc3f5d099d356c5783d2 | |
parent | 0411a5e233db0f5196cff46a34bff15c005bbe6a (diff) |
[POWERPC] Update axon_msi to use dcr_host_t.base
Now that dcr_host_t contains the base address, we can use that in the
axon_msi code, rather than storing it separately.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
-rw-r--r-- | arch/powerpc/platforms/cell/axon_msi.c | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/arch/powerpc/platforms/cell/axon_msi.c b/arch/powerpc/platforms/cell/axon_msi.c index 4bde8da11f44..1245b2f517bb 100644 --- a/arch/powerpc/platforms/cell/axon_msi.c +++ b/arch/powerpc/platforms/cell/axon_msi.c | |||
@@ -69,7 +69,6 @@ struct axon_msic { | |||
69 | dcr_host_t dcr_host; | 69 | dcr_host_t dcr_host; |
70 | struct list_head list; | 70 | struct list_head list; |
71 | u32 read_offset; | 71 | u32 read_offset; |
72 | u32 dcr_base; | ||
73 | }; | 72 | }; |
74 | 73 | ||
75 | static LIST_HEAD(axon_msic_list); | 74 | static LIST_HEAD(axon_msic_list); |
@@ -78,12 +77,12 @@ static void msic_dcr_write(struct axon_msic *msic, unsigned int dcr_n, u32 val) | |||
78 | { | 77 | { |
79 | pr_debug("axon_msi: dcr_write(0x%x, 0x%x)\n", val, dcr_n); | 78 | pr_debug("axon_msi: dcr_write(0x%x, 0x%x)\n", val, dcr_n); |
80 | 79 | ||
81 | dcr_write(msic->dcr_host, msic->dcr_base + dcr_n, val); | 80 | dcr_write(msic->dcr_host, msic->dcr_host.base + dcr_n, val); |
82 | } | 81 | } |
83 | 82 | ||
84 | static u32 msic_dcr_read(struct axon_msic *msic, unsigned int dcr_n) | 83 | static u32 msic_dcr_read(struct axon_msic *msic, unsigned int dcr_n) |
85 | { | 84 | { |
86 | return dcr_read(msic->dcr_host, msic->dcr_base + dcr_n); | 85 | return dcr_read(msic->dcr_host, msic->dcr_host.base + dcr_n); |
87 | } | 86 | } |
88 | 87 | ||
89 | static void axon_msi_cascade(unsigned int irq, struct irq_desc *desc) | 88 | static void axon_msi_cascade(unsigned int irq, struct irq_desc *desc) |
@@ -324,7 +323,7 @@ static int axon_msi_setup_one(struct device_node *dn) | |||
324 | struct page *page; | 323 | struct page *page; |
325 | struct axon_msic *msic; | 324 | struct axon_msic *msic; |
326 | unsigned int virq; | 325 | unsigned int virq; |
327 | int dcr_len; | 326 | int dcr_base, dcr_len; |
328 | 327 | ||
329 | pr_debug("axon_msi: setting up dn %s\n", dn->full_name); | 328 | pr_debug("axon_msi: setting up dn %s\n", dn->full_name); |
330 | 329 | ||
@@ -335,17 +334,17 @@ static int axon_msi_setup_one(struct device_node *dn) | |||
335 | goto out; | 334 | goto out; |
336 | } | 335 | } |
337 | 336 | ||
338 | msic->dcr_base = dcr_resource_start(dn, 0); | 337 | dcr_base = dcr_resource_start(dn, 0); |
339 | dcr_len = dcr_resource_len(dn, 0); | 338 | dcr_len = dcr_resource_len(dn, 0); |
340 | 339 | ||
341 | if (msic->dcr_base == 0 || dcr_len == 0) { | 340 | if (dcr_base == 0 || dcr_len == 0) { |
342 | printk(KERN_ERR | 341 | printk(KERN_ERR |
343 | "axon_msi: couldn't parse dcr properties on %s\n", | 342 | "axon_msi: couldn't parse dcr properties on %s\n", |
344 | dn->full_name); | 343 | dn->full_name); |
345 | goto out; | 344 | goto out; |
346 | } | 345 | } |
347 | 346 | ||
348 | msic->dcr_host = dcr_map(dn, msic->dcr_base, dcr_len); | 347 | msic->dcr_host = dcr_map(dn, dcr_base, dcr_len); |
349 | if (!DCR_MAP_OK(msic->dcr_host)) { | 348 | if (!DCR_MAP_OK(msic->dcr_host)) { |
350 | printk(KERN_ERR "axon_msi: dcr_map failed for %s\n", | 349 | printk(KERN_ERR "axon_msi: dcr_map failed for %s\n", |
351 | dn->full_name); | 350 | dn->full_name); |