aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorAndrea Merello <andrea.merello@gmail.com>2014-03-26 16:02:46 -0400
committerJohn W. Linville <linville@tuxdriver.com>2014-03-27 14:20:08 -0400
commit4a67aa5d64c9e97289229cb2d0a8931744ccf6a1 (patch)
treedc6d9c659b6bea1b7dafe6da35c379e70c99cce1
parent711d4ed38143a01b0f109e11e47e62e9f589d4e3 (diff)
rtl8180: add rtl8187se HW initialization
This patch adds few functions that initializes extra stuff that is present only in rtl8187se HW, and it modify the existing HW initialization function where necessary Signed-off-by: Andrea Merello <andrea.merello@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r--drivers/net/wireless/rtl818x/rtl8180/dev.c168
1 files changed, 159 insertions, 9 deletions
diff --git a/drivers/net/wireless/rtl818x/rtl8180/dev.c b/drivers/net/wireless/rtl818x/rtl8180/dev.c
index 1c4a1485f4b7..80618525ac78 100644
--- a/drivers/net/wireless/rtl818x/rtl8180/dev.c
+++ b/drivers/net/wireless/rtl818x/rtl8180/dev.c
@@ -578,6 +578,75 @@ void rtl8180_set_anaparam(struct rtl8180_priv *priv, u32 anaparam)
578 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 578 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
579} 579}
580 580
581static void rtl8187se_mac_config(struct ieee80211_hw *dev)
582{
583 struct rtl8180_priv *priv = dev->priv;
584 u8 reg;
585
586 rtl818x_iowrite32(priv, REG_ADDR4(0x1F0), 0);
587 rtl818x_ioread32(priv, REG_ADDR4(0x1F0));
588 rtl818x_iowrite32(priv, REG_ADDR4(0x1F4), 0);
589 rtl818x_ioread32(priv, REG_ADDR4(0x1F4));
590 rtl818x_iowrite8(priv, REG_ADDR1(0x1F8), 0);
591 rtl818x_ioread8(priv, REG_ADDR1(0x1F8));
592 /* Enable DA10 TX power saving */
593 reg = rtl818x_ioread8(priv, &priv->map->PHY_PR);
594 rtl818x_iowrite8(priv, &priv->map->PHY_PR, reg | 0x04);
595 /* Power */
596 rtl818x_iowrite16(priv, PI_DATA_REG, 0x1000);
597 rtl818x_iowrite16(priv, SI_DATA_REG, 0x1000);
598 /* AFE - default to power ON */
599 rtl818x_iowrite16(priv, REG_ADDR2(0x370), 0x0560);
600 rtl818x_iowrite16(priv, REG_ADDR2(0x372), 0x0560);
601 rtl818x_iowrite16(priv, REG_ADDR2(0x374), 0x0DA4);
602 rtl818x_iowrite16(priv, REG_ADDR2(0x376), 0x0DA4);
603 rtl818x_iowrite16(priv, REG_ADDR2(0x378), 0x0560);
604 rtl818x_iowrite16(priv, REG_ADDR2(0x37A), 0x0560);
605 rtl818x_iowrite16(priv, REG_ADDR2(0x37C), 0x00EC);
606 rtl818x_iowrite16(priv, REG_ADDR2(0x37E), 0x00EC);
607 rtl818x_iowrite8(priv, REG_ADDR1(0x24E), 0x01);
608 /* unknown, needed for suspend to RAM resume */
609 rtl818x_iowrite8(priv, REG_ADDR1(0x0A), 0x72);
610}
611
612static void rtl8187se_set_antenna_config(struct ieee80211_hw *dev, u8 def_ant,
613 bool diversity)
614{
615 struct rtl8180_priv *priv = dev->priv;
616
617 rtl8225_write_phy_cck(dev, 0x0C, 0x09);
618 if (diversity) {
619 if (def_ant == 1) {
620 rtl818x_iowrite8(priv, &priv->map->TX_ANTENNA, 0x00);
621 rtl8225_write_phy_cck(dev, 0x11, 0xBB);
622 rtl8225_write_phy_cck(dev, 0x01, 0xC7);
623 rtl8225_write_phy_ofdm(dev, 0x0D, 0x54);
624 rtl8225_write_phy_ofdm(dev, 0x18, 0xB2);
625 } else { /* main antenna */
626 rtl818x_iowrite8(priv, &priv->map->TX_ANTENNA, 0x03);
627 rtl8225_write_phy_cck(dev, 0x11, 0x9B);
628 rtl8225_write_phy_cck(dev, 0x01, 0xC7);
629 rtl8225_write_phy_ofdm(dev, 0x0D, 0x5C);
630 rtl8225_write_phy_ofdm(dev, 0x18, 0xB2);
631 }
632 } else { /* disable antenna diversity */
633 if (def_ant == 1) {
634 rtl818x_iowrite8(priv, &priv->map->TX_ANTENNA, 0x00);
635 rtl8225_write_phy_cck(dev, 0x11, 0xBB);
636 rtl8225_write_phy_cck(dev, 0x01, 0x47);
637 rtl8225_write_phy_ofdm(dev, 0x0D, 0x54);
638 rtl8225_write_phy_ofdm(dev, 0x18, 0x32);
639 } else { /* main antenna */
640 rtl818x_iowrite8(priv, &priv->map->TX_ANTENNA, 0x03);
641 rtl8225_write_phy_cck(dev, 0x11, 0x9B);
642 rtl8225_write_phy_cck(dev, 0x01, 0x47);
643 rtl8225_write_phy_ofdm(dev, 0x0D, 0x5C);
644 rtl8225_write_phy_ofdm(dev, 0x18, 0x32);
645 }
646 }
647 /* priv->curr_ant = def_ant; */
648}
649
581static void rtl8180_int_enable(struct ieee80211_hw *dev) 650static void rtl8180_int_enable(struct ieee80211_hw *dev)
582{ 651{
583 struct rtl8180_priv *priv = dev->priv; 652 struct rtl8180_priv *priv = dev->priv;
@@ -666,6 +735,7 @@ static int rtl8180_init_hw(struct ieee80211_hw *dev)
666{ 735{
667 struct rtl8180_priv *priv = dev->priv; 736 struct rtl8180_priv *priv = dev->priv;
668 u16 reg; 737 u16 reg;
738 u32 reg32;
669 739
670 rtl818x_iowrite8(priv, &priv->map->CMD, 0); 740 rtl818x_iowrite8(priv, &priv->map->CMD, 0);
671 rtl818x_ioread8(priv, &priv->map->CMD); 741 rtl818x_ioread8(priv, &priv->map->CMD);
@@ -696,14 +766,36 @@ static int rtl8180_init_hw(struct ieee80211_hw *dev)
696 rtl8180_config_cardbus(dev); 766 rtl8180_config_cardbus(dev);
697 } 767 }
698 768
699 rtl818x_iowrite8(priv, &priv->map->MSR, 0); 769 if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE)
770 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_ENEDCA);
771 else
772 rtl818x_iowrite8(priv, &priv->map->MSR, 0);
700 773
701 if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8180) 774 if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8180)
702 rtl8180_set_anaparam(priv, priv->anaparam); 775 rtl8180_set_anaparam(priv, priv->anaparam);
703 776
704 rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma); 777 rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma);
705 rtl818x_iowrite32(priv, &priv->map->TBDA, priv->tx_ring[1].dma); 778 /* mac80211 queue have higher prio for lower index. The last queue
706 rtl818x_iowrite32(priv, &priv->map->TLPDA, priv->tx_ring[0].dma); 779 * (that mac80211 is not aware of) is reserved for beacons (and have
780 * the highest priority on the NIC)
781 */
782 if (priv->chip_family != RTL818X_CHIP_FAMILY_RTL8187SE) {
783 rtl818x_iowrite32(priv, &priv->map->TBDA,
784 priv->tx_ring[1].dma);
785 rtl818x_iowrite32(priv, &priv->map->TLPDA,
786 priv->tx_ring[0].dma);
787 } else {
788 rtl818x_iowrite32(priv, &priv->map->TBDA,
789 priv->tx_ring[4].dma);
790 rtl818x_iowrite32(priv, &priv->map->TVODA,
791 priv->tx_ring[0].dma);
792 rtl818x_iowrite32(priv, &priv->map->TVIDA,
793 priv->tx_ring[1].dma);
794 rtl818x_iowrite32(priv, &priv->map->TBEDA,
795 priv->tx_ring[2].dma);
796 rtl818x_iowrite32(priv, &priv->map->TBKDA,
797 priv->tx_ring[3].dma);
798 }
707 799
708 /* TODO: necessary? specs indicate not */ 800 /* TODO: necessary? specs indicate not */
709 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 801 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
@@ -724,7 +816,14 @@ static int rtl8180_init_hw(struct ieee80211_hw *dev)
724 if (priv->chip_family != RTL818X_CHIP_FAMILY_RTL8180) { 816 if (priv->chip_family != RTL818X_CHIP_FAMILY_RTL8180) {
725 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0); 817 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
726 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81); 818 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
819 } else {
820 rtl818x_iowrite8(priv, &priv->map->SECURITY, 0);
821
822 rtl818x_iowrite8(priv, &priv->map->PHY_DELAY, 0x6);
823 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER, 0x4C);
824 }
727 825
826 if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8185) {
728 /* TODO: set ClkRun enable? necessary? */ 827 /* TODO: set ClkRun enable? necessary? */
729 reg = rtl818x_ioread8(priv, &priv->map->GP_ENABLE); 828 reg = rtl818x_ioread8(priv, &priv->map->GP_ENABLE);
730 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, reg & ~(1 << 6)); 829 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, reg & ~(1 << 6));
@@ -732,11 +831,55 @@ static int rtl8180_init_hw(struct ieee80211_hw *dev)
732 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); 831 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
733 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | (1 << 2)); 832 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | (1 << 2));
734 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 833 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
735 } else { 834 }
736 rtl818x_iowrite8(priv, &priv->map->SECURITY, 0);
737 835
738 rtl818x_iowrite8(priv, &priv->map->PHY_DELAY, 0x6); 836 if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE) {
739 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER, 0x4C); 837
838 /* the set auto rate fallback bitmask from 1M to 54 Mb/s */
839 rtl818x_iowrite16(priv, ARFR, 0xFFF);
840 rtl818x_ioread16(priv, ARFR);
841
842 /* stop unused queus (no dma alloc) */
843 rtl818x_iowrite8(priv, &priv->map->TPPOLL_STOP,
844 RTL818x_TPPOLL_STOP_MG | RTL818x_TPPOLL_STOP_HI);
845
846 rtl818x_iowrite8(priv, &priv->map->ACM_CONTROL, 0x00);
847 rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
848
849 rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
850
851 /* some black magic here.. */
852 rtl8187se_mac_config(dev);
853
854 rtl818x_iowrite16(priv, RFSW_CTRL, 0x569A);
855 rtl818x_ioread16(priv, RFSW_CTRL);
856
857 rtl8180_set_anaparam(priv, RTL8225SE_ANAPARAM_ON);
858 rtl8180_set_anaparam2(priv, RTL8225SE_ANAPARAM2_ON);
859 rtl8180_set_anaparam3(priv, RTL8225SE_ANAPARAM3);
860
861
862 rtl818x_iowrite8(priv, &priv->map->CONFIG5,
863 rtl818x_ioread8(priv, &priv->map->CONFIG5) & 0x7F);
864
865 /*probably this switch led on */
866 rtl818x_iowrite8(priv, &priv->map->PGSELECT,
867 rtl818x_ioread8(priv, &priv->map->PGSELECT) | 0x08);
868
869 rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
870 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1BFF);
871 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
872
873 rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x4003);
874
875 /* the reference code mac hardcode table write
876 * this reg by doing byte-wide accesses.
877 * It does it just for lowest and highest byte..
878 */
879 reg32 = rtl818x_ioread32(priv, &priv->map->RF_PARA);
880 reg32 &= 0x00ffff00;
881 reg32 |= 0xb8000054;
882 rtl818x_iowrite32(priv, &priv->map->RF_PARA, reg32);
740 } 883 }
741 884
742 priv->rf->init(dev); 885 priv->rf->init(dev);
@@ -752,6 +895,10 @@ static int rtl8180_init_hw(struct ieee80211_hw *dev)
752 else 895 else
753 rtl8180_conf_basic_rates(dev, 0x1f3); 896 rtl8180_conf_basic_rates(dev, 0x1f3);
754 897
898 if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE)
899 rtl8187se_set_antenna_config(dev,
900 priv->antenna_diversity_default,
901 priv->antenna_diversity_en);
755 return 0; 902 return 0;
756} 903}
757 904
@@ -926,11 +1073,13 @@ static int rtl8180_start(struct ieee80211_hw *dev)
926 1073
927 if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8185) 1074 if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8185)
928 reg |= RTL818X_RX_CONF_CSDM1 | RTL818X_RX_CONF_CSDM2; 1075 reg |= RTL818X_RX_CONF_CSDM1 | RTL818X_RX_CONF_CSDM2;
929 else { 1076 else if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8180) {
930 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE1) 1077 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE1)
931 ? RTL818X_RX_CONF_CSDM1 : 0; 1078 ? RTL818X_RX_CONF_CSDM1 : 0;
932 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE2) 1079 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE2)
933 ? RTL818X_RX_CONF_CSDM2 : 0; 1080 ? RTL818X_RX_CONF_CSDM2 : 0;
1081 } else {
1082 reg &= ~(RTL818X_RX_CONF_CSDM1 | RTL818X_RX_CONF_CSDM2);
934 } 1083 }
935 1084
936 priv->rx_conf = reg; 1085 priv->rx_conf = reg;
@@ -968,7 +1117,8 @@ static int rtl8180_start(struct ieee80211_hw *dev)
968 reg |= (6 << 21 /* MAX TX DMA */) | 1117 reg |= (6 << 21 /* MAX TX DMA */) |
969 RTL818X_TX_CONF_NO_ICV; 1118 RTL818X_TX_CONF_NO_ICV;
970 1119
971 1120 if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE)
1121 reg |= 1<<30; /* "duration procedure mode" */
972 1122
973 if (priv->chip_family != RTL818X_CHIP_FAMILY_RTL8180) 1123 if (priv->chip_family != RTL818X_CHIP_FAMILY_RTL8180)
974 reg &= ~RTL818X_TX_CONF_PROBE_DTS; 1124 reg &= ~RTL818X_TX_CONF_PROBE_DTS;