drm/i915/vlv: use lower precision RC6 counter

And add some reg defines while we're at it.  Since the units of the RC6
residency counter are actually in CZ clocks, we want to just use the
high bits or we'll overflow too frequently.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

2 files changed, 8 insertions, 1 deletions

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 33bb4750516a..c15cc749ca2c 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4729,6 +4729,10 @@
                                                  GEN6_PM_RP_DOWN_TIMEOUT)
 
 #define GEN6_GT_GFX_RC6_LOCKED                  0x138104
+#define VLV_COUNTER_CONTROL                     0x138104
+#define   VLV_COUNT_RANGE_HIGH                  (1<<15)
+#define   VLV_MEDIA_RC6_COUNT_EN                (1<<1)
+#define   VLV_RENDER_RC6_COUNT_EN               (1<<0)
 #define GEN6_GT_GFX_RC6                         0x138108
 #define GEN6_GT_GFX_RC6p                        0x13810C
 #define GEN6_GT_GFX_RC6pp                       0x138110
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 2ac1c2fd58bb..102fc498a12f 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3837,7 +3837,10 @@ static void valleyview_enable_rps(struct drm_device *dev)
         I915_WRITE(GEN6_RC6_THRESHOLD, 0xc350);
 
         /* allows RC6 residency counter to work */
-        I915_WRITE(0x138104, _MASKED_BIT_ENABLE(0x3));
+        I915_WRITE(VLV_COUNTER_CONTROL,
+                   _MASKED_BIT_ENABLE(VLV_COUNT_RANGE_HIGH |
+                                      VLV_MEDIA_RC6_COUNT_EN |
+                                      VLV_RENDER_RC6_COUNT_EN));
         if (intel_enable_rc6(dev) & INTEL_RC6_ENABLE)
                 rc6_mode = GEN7_RC_CTL_TO_MODE;
         I915_WRITE(GEN6_RC_CONTROL, rc6_mode);