aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorGabor Juhos <juhosg@openwrt.org>2013-04-10 03:07:27 -0400
committerRalf Baechle <ralf@linux-mips.org>2013-05-07 19:19:07 -0400
commit48b4aba7a8a2b098f12259ffa13301243349cfab (patch)
tree1c2d827afc370b56d20eef908e5e48062fc9733e
parent9169a5d01114c930a0494f9160da8c334d71680d (diff)
MIPS: ralink: add PCI IRQ handling
The Ralink IRQ code was not handling the PCI IRQ yet. Add this functionaility to make PCI work on rt3883. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5165/
-rw-r--r--arch/mips/ralink/irq.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/mips/ralink/irq.c b/arch/mips/ralink/irq.c
index 6d054c5ec9ab..d9807d0587cd 100644
--- a/arch/mips/ralink/irq.c
+++ b/arch/mips/ralink/irq.c
@@ -31,6 +31,7 @@
31#define INTC_INT_GLOBAL BIT(31) 31#define INTC_INT_GLOBAL BIT(31)
32 32
33#define RALINK_CPU_IRQ_INTC (MIPS_CPU_IRQ_BASE + 2) 33#define RALINK_CPU_IRQ_INTC (MIPS_CPU_IRQ_BASE + 2)
34#define RALINK_CPU_IRQ_PCI (MIPS_CPU_IRQ_BASE + 4)
34#define RALINK_CPU_IRQ_FE (MIPS_CPU_IRQ_BASE + 5) 35#define RALINK_CPU_IRQ_FE (MIPS_CPU_IRQ_BASE + 5)
35#define RALINK_CPU_IRQ_WIFI (MIPS_CPU_IRQ_BASE + 6) 36#define RALINK_CPU_IRQ_WIFI (MIPS_CPU_IRQ_BASE + 6)
36#define RALINK_CPU_IRQ_COUNTER (MIPS_CPU_IRQ_BASE + 7) 37#define RALINK_CPU_IRQ_COUNTER (MIPS_CPU_IRQ_BASE + 7)
@@ -104,6 +105,9 @@ asmlinkage void plat_irq_dispatch(void)
104 else if (pending & STATUSF_IP6) 105 else if (pending & STATUSF_IP6)
105 do_IRQ(RALINK_CPU_IRQ_WIFI); 106 do_IRQ(RALINK_CPU_IRQ_WIFI);
106 107
108 else if (pending & STATUSF_IP4)
109 do_IRQ(RALINK_CPU_IRQ_PCI);
110
107 else if (pending & STATUSF_IP2) 111 else if (pending & STATUSF_IP2)
108 do_IRQ(RALINK_CPU_IRQ_INTC); 112 do_IRQ(RALINK_CPU_IRQ_INTC);
109 113