drm/i915: Extract intel_fifo_underrun.c

Prep work for some nice documentation. Requires that we export the
display irq enable/disable functions on ilk/ibx. But we already export
them for vlv/i915. So not more inconsistency.

v2: Rebase on top of skl stage 1.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>

5 files changed, 334 insertions, 294 deletions

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 3a6bce047f6f..75fd7de9bf4b 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -45,6 +45,7 @@ i915-y += intel_renderstate_gen6.o \
 # modesetting core code
 i915-y += intel_bios.o \
           intel_display.o \
+          intel_fifo_underrun.o \
           intel_frontbuffer.o \
           intel_modes.o \
           intel_overlay.o \
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 9962da202456..26724c54bd80 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2312,6 +2312,17 @@ i915_disable_pipestat(struct drm_i915_private *dev_priv, enum pipe pipe,
 
 void valleyview_enable_display_irqs(struct drm_i915_private *dev_priv);
 void valleyview_disable_display_irqs(struct drm_i915_private *dev_priv);
+void
+ironlake_enable_display_irq(struct drm_i915_private *dev_priv, u32 mask);
+void
+ironlake_disable_display_irq(struct drm_i915_private *dev_priv, u32 mask);
+void ibx_display_interrupt_update(struct drm_i915_private *dev_priv,
+                                  uint32_t interrupt_mask,
+                                  uint32_t enabled_irq_mask);
+#define ibx_enable_display_interrupt(dev_priv, bits) \
+        ibx_display_interrupt_update((dev_priv), (bits), (bits))
+#define ibx_disable_display_interrupt(dev_priv, bits) \
+        ibx_display_interrupt_update((dev_priv), (bits), 0)
 
 /* i915_gem.c */
 int i915_gem_init_ioctl(struct drm_device *dev, void *data,
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index f17bbf3ac136..536efa277b01 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -139,7 +139,7 @@ static const u32 hpd_status_i915[] = { /* i915 and valleyview are the same */
 } while (0)
 
 /* For display hotplug interrupt */
-static void
+void
 ironlake_enable_display_irq(struct drm_i915_private *dev_priv, u32 mask)
 {
         assert_spin_locked(&dev_priv->irq_lock);
@@ -154,7 +154,7 @@ ironlake_enable_display_irq(struct drm_i915_private *dev_priv, u32 mask)
         }
 }
 
-static void
+void
 ironlake_disable_display_irq(struct drm_i915_private *dev_priv, u32 mask)
 {
         assert_spin_locked(&dev_priv->irq_lock);
@@ -238,24 +238,6 @@ void gen6_disable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask)
         snb_update_pm_irq(dev_priv, mask, 0);
 }
 
-static bool ivb_can_enable_err_int(struct drm_device *dev)
-{
-        struct drm_i915_private *dev_priv = dev->dev_private;
-        struct intel_crtc *crtc;
-        enum pipe pipe;
-
-        assert_spin_locked(&dev_priv->irq_lock);
-
-        for_each_pipe(dev_priv, pipe) {
-                crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
-
-                if (crtc->cpu_fifo_underrun_disabled)
-                        return false;
-        }
-
-        return true;
-}
-
 /**
   * bdw_update_pm_irq - update GT interrupt 2
   * @dev_priv: driver private
@@ -296,130 +278,15 @@ void gen8_disable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask)
         bdw_update_pm_irq(dev_priv, mask, 0);
 }
 
-static bool cpt_can_enable_serr_int(struct drm_device *dev)
-{
-        struct drm_i915_private *dev_priv = dev->dev_private;
-        enum pipe pipe;
-        struct intel_crtc *crtc;
-
-        assert_spin_locked(&dev_priv->irq_lock);
-
-        for_each_pipe(dev_priv, pipe) {
-                crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
-
-                if (crtc->pch_fifo_underrun_disabled)
-                        return false;
-        }
-
-        return true;
-}
-
-void i9xx_check_fifo_underruns(struct drm_device *dev)
-{
-        struct drm_i915_private *dev_priv = dev->dev_private;
-        struct intel_crtc *crtc;
-
-        spin_lock_irq(&dev_priv->irq_lock);
-
-        for_each_intel_crtc(dev, crtc) {
-                u32 reg = PIPESTAT(crtc->pipe);
-                u32 pipestat;
-
-                if (crtc->cpu_fifo_underrun_disabled)
-                        continue;
-
-                pipestat = I915_READ(reg) & 0xffff0000;
-                if ((pipestat & PIPE_FIFO_UNDERRUN_STATUS) == 0)
-                        continue;
-
-                I915_WRITE(reg, pipestat | PIPE_FIFO_UNDERRUN_STATUS);
-                POSTING_READ(reg);
-
-                DRM_ERROR("pipe %c underrun\n", pipe_name(crtc->pipe));
-        }
-
-        spin_unlock_irq(&dev_priv->irq_lock);
-}
-
-static void i9xx_set_fifo_underrun_reporting(struct drm_device *dev,
-                                             enum pipe pipe,
-                                             bool enable, bool old)
-{
-        struct drm_i915_private *dev_priv = dev->dev_private;
-        u32 reg = PIPESTAT(pipe);
-        u32 pipestat = I915_READ(reg) & 0xffff0000;
-
-        assert_spin_locked(&dev_priv->irq_lock);
-
-        if (enable) {
-                I915_WRITE(reg, pipestat | PIPE_FIFO_UNDERRUN_STATUS);
-                POSTING_READ(reg);
-        } else {
-                if (old && pipestat & PIPE_FIFO_UNDERRUN_STATUS)
-                        DRM_ERROR("pipe %c underrun\n", pipe_name(pipe));
-        }
-}
-
-static void ironlake_set_fifo_underrun_reporting(struct drm_device *dev,
-                                                 enum pipe pipe, bool enable)
-{
-        struct drm_i915_private *dev_priv = dev->dev_private;
-        uint32_t bit = (pipe == PIPE_A) ? DE_PIPEA_FIFO_UNDERRUN :
-                                          DE_PIPEB_FIFO_UNDERRUN;
-
-        if (enable)
-                ironlake_enable_display_irq(dev_priv, bit);
-        else
-                ironlake_disable_display_irq(dev_priv, bit);
-}
-
-static void ivybridge_set_fifo_underrun_reporting(struct drm_device *dev,
-                                                  enum pipe pipe,
-                                                  bool enable, bool old)
-{
-        struct drm_i915_private *dev_priv = dev->dev_private;
-        if (enable) {
-                I915_WRITE(GEN7_ERR_INT, ERR_INT_FIFO_UNDERRUN(pipe));
-
-                if (!ivb_can_enable_err_int(dev))
-                        return;
-
-                ironlake_enable_display_irq(dev_priv, DE_ERR_INT_IVB);
-        } else {
-                ironlake_disable_display_irq(dev_priv, DE_ERR_INT_IVB);
-
-                if (old &&
-                    I915_READ(GEN7_ERR_INT) & ERR_INT_FIFO_UNDERRUN(pipe)) {