diff options
author | David Cohen <david.a.cohen@intel.com> | 2012-12-20 17:45:51 -0500 |
---|---|---|
committer | Grant Likely <grant.likely@secretlab.ca> | 2013-02-05 08:33:30 -0500 |
commit | 46ebfbc3745597067494186a0e7031add22f3134 (patch) | |
tree | 773d852cc6ecaa739da32eb8e1716619960e59d2 | |
parent | 936cb1b12519c73373e461df6e106c460396941c (diff) |
gpio/langwell: cleanup driver
This patch cleans up cosmetic issues, remove useless functions and add
to_lnw_priv() macro to replace many usages of container_of().
Signed-off-by: David Cohen <david.a.cohen@intel.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
-rw-r--r-- | drivers/gpio/gpio-langwell.c | 51 |
1 files changed, 17 insertions, 34 deletions
diff --git a/drivers/gpio/gpio-langwell.c b/drivers/gpio/gpio-langwell.c index a53ad08974cb..634c3d37f7b5 100644 --- a/drivers/gpio/gpio-langwell.c +++ b/drivers/gpio/gpio-langwell.c | |||
@@ -71,10 +71,12 @@ struct lnw_gpio { | |||
71 | struct irq_domain *domain; | 71 | struct irq_domain *domain; |
72 | }; | 72 | }; |
73 | 73 | ||
74 | #define to_lnw_priv(chip) container_of(chip, struct lnw_gpio, chip) | ||
75 | |||
74 | static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset, | 76 | static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset, |
75 | enum GPIO_REG reg_type) | 77 | enum GPIO_REG reg_type) |
76 | { | 78 | { |
77 | struct lnw_gpio *lnw = container_of(chip, struct lnw_gpio, chip); | 79 | struct lnw_gpio *lnw = to_lnw_priv(chip); |
78 | unsigned nreg = chip->ngpio / 32; | 80 | unsigned nreg = chip->ngpio / 32; |
79 | u8 reg = offset / 32; | 81 | u8 reg = offset / 32; |
80 | void __iomem *ptr; | 82 | void __iomem *ptr; |
@@ -86,7 +88,7 @@ static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset, | |||
86 | static void __iomem *gpio_reg_2bit(struct gpio_chip *chip, unsigned offset, | 88 | static void __iomem *gpio_reg_2bit(struct gpio_chip *chip, unsigned offset, |
87 | enum GPIO_REG reg_type) | 89 | enum GPIO_REG reg_type) |
88 | { | 90 | { |
89 | struct lnw_gpio *lnw = container_of(chip, struct lnw_gpio, chip); | 91 | struct lnw_gpio *lnw = to_lnw_priv(chip); |
90 | unsigned nreg = chip->ngpio / 32; | 92 | unsigned nreg = chip->ngpio / 32; |
91 | u8 reg = offset / 16; | 93 | u8 reg = offset / 16; |
92 | void __iomem *ptr; | 94 | void __iomem *ptr; |
@@ -130,7 +132,7 @@ static void lnw_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
130 | 132 | ||
131 | static int lnw_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | 133 | static int lnw_gpio_direction_input(struct gpio_chip *chip, unsigned offset) |
132 | { | 134 | { |
133 | struct lnw_gpio *lnw = container_of(chip, struct lnw_gpio, chip); | 135 | struct lnw_gpio *lnw = to_lnw_priv(chip); |
134 | void __iomem *gpdr = gpio_reg(chip, offset, GPDR); | 136 | void __iomem *gpdr = gpio_reg(chip, offset, GPDR); |
135 | u32 value; | 137 | u32 value; |
136 | unsigned long flags; | 138 | unsigned long flags; |
@@ -153,7 +155,7 @@ static int lnw_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | |||
153 | static int lnw_gpio_direction_output(struct gpio_chip *chip, | 155 | static int lnw_gpio_direction_output(struct gpio_chip *chip, |
154 | unsigned offset, int value) | 156 | unsigned offset, int value) |
155 | { | 157 | { |
156 | struct lnw_gpio *lnw = container_of(chip, struct lnw_gpio, chip); | 158 | struct lnw_gpio *lnw = to_lnw_priv(chip); |
157 | void __iomem *gpdr = gpio_reg(chip, offset, GPDR); | 159 | void __iomem *gpdr = gpio_reg(chip, offset, GPDR); |
158 | unsigned long flags; | 160 | unsigned long flags; |
159 | 161 | ||
@@ -176,7 +178,7 @@ static int lnw_gpio_direction_output(struct gpio_chip *chip, | |||
176 | 178 | ||
177 | static int lnw_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | 179 | static int lnw_gpio_to_irq(struct gpio_chip *chip, unsigned offset) |
178 | { | 180 | { |
179 | struct lnw_gpio *lnw = container_of(chip, struct lnw_gpio, chip); | 181 | struct lnw_gpio *lnw = to_lnw_priv(chip); |
180 | return irq_create_mapping(lnw->domain, offset); | 182 | return irq_create_mapping(lnw->domain, offset); |
181 | } | 183 | } |
182 | 184 | ||
@@ -301,17 +303,6 @@ static const struct irq_domain_ops lnw_gpio_irq_ops = { | |||
301 | .xlate = irq_domain_xlate_twocell, | 303 | .xlate = irq_domain_xlate_twocell, |
302 | }; | 304 | }; |
303 | 305 | ||
304 | #ifdef CONFIG_PM | ||
305 | static int lnw_gpio_runtime_resume(struct device *dev) | ||
306 | { | ||
307 | return 0; | ||
308 | } | ||
309 | |||
310 | static int lnw_gpio_runtime_suspend(struct device *dev) | ||
311 | { | ||
312 | return 0; | ||
313 | } | ||
314 | |||
315 | static int lnw_gpio_runtime_idle(struct device *dev) | 306 | static int lnw_gpio_runtime_idle(struct device *dev) |
316 | { | 307 | { |
317 | int err = pm_schedule_suspend(dev, 500); | 308 | int err = pm_schedule_suspend(dev, 500); |
@@ -322,16 +313,8 @@ static int lnw_gpio_runtime_idle(struct device *dev) | |||
322 | return -EBUSY; | 313 | return -EBUSY; |
323 | } | 314 | } |
324 | 315 | ||
325 | #else | ||
326 | #define lnw_gpio_runtime_suspend NULL | ||
327 | #define lnw_gpio_runtime_resume NULL | ||
328 | #define lnw_gpio_runtime_idle NULL | ||
329 | #endif | ||
330 | |||
331 | static const struct dev_pm_ops lnw_gpio_pm_ops = { | 316 | static const struct dev_pm_ops lnw_gpio_pm_ops = { |
332 | .runtime_suspend = lnw_gpio_runtime_suspend, | 317 | SET_RUNTIME_PM_OPS(NULL, NULL, lnw_gpio_runtime_idle) |
333 | .runtime_resume = lnw_gpio_runtime_resume, | ||
334 | .runtime_idle = lnw_gpio_runtime_idle, | ||
335 | }; | 318 | }; |
336 | 319 | ||
337 | static int lnw_gpio_probe(struct pci_dev *pdev, | 320 | static int lnw_gpio_probe(struct pci_dev *pdev, |
@@ -351,7 +334,7 @@ static int lnw_gpio_probe(struct pci_dev *pdev, | |||
351 | retval = pci_request_regions(pdev, "langwell_gpio"); | 334 | retval = pci_request_regions(pdev, "langwell_gpio"); |
352 | if (retval) { | 335 | if (retval) { |
353 | dev_err(&pdev->dev, "error requesting resources\n"); | 336 | dev_err(&pdev->dev, "error requesting resources\n"); |
354 | goto err2; | 337 | goto err_pci_req_region; |
355 | } | 338 | } |
356 | /* get the gpio_base from bar1 */ | 339 | /* get the gpio_base from bar1 */ |
357 | start = pci_resource_start(pdev, 1); | 340 | start = pci_resource_start(pdev, 1); |
@@ -360,7 +343,7 @@ static int lnw_gpio_probe(struct pci_dev *pdev, | |||
360 | if (!base) { | 343 | if (!base) { |
361 | dev_err(&pdev->dev, "error mapping bar1\n"); | 344 | dev_err(&pdev->dev, "error mapping bar1\n"); |
362 | retval = -EFAULT; | 345 | retval = -EFAULT; |
363 | goto err3; | 346 | goto err_ioremap; |
364 | } | 347 | } |
365 | gpio_base = *((u32 *)base + 1); | 348 | gpio_base = *((u32 *)base + 1); |
366 | /* release the IO mapping, since we already get the info from bar1 */ | 349 | /* release the IO mapping, since we already get the info from bar1 */ |
@@ -372,21 +355,21 @@ static int lnw_gpio_probe(struct pci_dev *pdev, | |||
372 | if (!base) { | 355 | if (!base) { |
373 | dev_err(&pdev->dev, "error mapping bar0\n"); | 356 | dev_err(&pdev->dev, "error mapping bar0\n"); |
374 | retval = -EFAULT; | 357 | retval = -EFAULT; |
375 | goto err3; | 358 | goto err_ioremap; |
376 | } | 359 | } |
377 | 360 | ||
378 | lnw = devm_kzalloc(&pdev->dev, sizeof(struct lnw_gpio), GFP_KERNEL); | 361 | lnw = devm_kzalloc(&pdev->dev, sizeof(*lnw), GFP_KERNEL); |
379 | if (!lnw) { | 362 | if (!lnw) { |
380 | dev_err(&pdev->dev, "can't allocate langwell_gpio chip data\n"); | 363 | dev_err(&pdev->dev, "can't allocate langwell_gpio chip data\n"); |
381 | retval = -ENOMEM; | 364 | retval = -ENOMEM; |
382 | goto err3; | 365 | goto err_ioremap; |
383 | } | 366 | } |
384 | 367 | ||
385 | lnw->domain = irq_domain_add_linear(pdev->dev.of_node, ngpio, | 368 | lnw->domain = irq_domain_add_linear(pdev->dev.of_node, ngpio, |
386 | &lnw_gpio_irq_ops, lnw); | 369 | &lnw_gpio_irq_ops, lnw); |
387 | if (!lnw->domain) { | 370 | if (!lnw->domain) { |
388 | retval = -ENOMEM; | 371 | retval = -ENOMEM; |
389 | goto err3; | 372 | goto err_ioremap; |
390 | } | 373 | } |
391 | 374 | ||
392 | lnw->reg_base = base; | 375 | lnw->reg_base = base; |
@@ -405,7 +388,7 @@ static int lnw_gpio_probe(struct pci_dev *pdev, | |||
405 | retval = gpiochip_add(&lnw->chip); | 388 | retval = gpiochip_add(&lnw->chip); |
406 | if (retval) { | 389 | if (retval) { |
407 | dev_err(&pdev->dev, "langwell gpiochip_add error %d\n", retval); | 390 | dev_err(&pdev->dev, "langwell gpiochip_add error %d\n", retval); |
408 | goto err3; | 391 | goto err_ioremap; |
409 | } | 392 | } |
410 | 393 | ||
411 | lnw_irq_init_hw(lnw); | 394 | lnw_irq_init_hw(lnw); |
@@ -420,9 +403,9 @@ static int lnw_gpio_probe(struct pci_dev *pdev, | |||
420 | 403 | ||
421 | return 0; | 404 | return 0; |
422 | 405 | ||
423 | err3: | 406 | err_ioremap: |
424 | pci_release_regions(pdev); | 407 | pci_release_regions(pdev); |
425 | err2: | 408 | err_pci_req_region: |
426 | pci_disable_device(pdev); | 409 | pci_disable_device(pdev); |
427 | return retval; | 410 | return retval; |
428 | } | 411 | } |