diff options
author | James Hogan <james.hogan@imgtec.com> | 2015-01-30 07:09:38 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2015-03-27 14:42:48 -0400 |
commit | 466aec5f292be469e15b3dc3d17b731dab93727c (patch) | |
tree | ab9aa70efec2d0476dc3d05f209fd1db7c683b64 | |
parent | 84ab45b33858a87632e1f5e207e302bf48eaf52e (diff) |
Revert "MIPS: Don't assume 64-bit FP registers for context switch"
This reverts commit 02987633df7ba2f62967791dda816eb191d1add3.
The basic premise of the patch was incorrect since MSA context
(including FP state) is saved using st.d which stores two consecutive
64-bit words in memory rather than a single 128-bit word. This means
that even with big endian MSA, the FP state is still in the first 64-bit
word.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9168/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r-- | arch/mips/include/asm/asmmacro-32.h | 128 | ||||
-rw-r--r-- | arch/mips/include/asm/asmmacro.h | 128 | ||||
-rw-r--r-- | arch/mips/kernel/asm-offsets.c | 66 |
3 files changed, 128 insertions, 194 deletions
diff --git a/arch/mips/include/asm/asmmacro-32.h b/arch/mips/include/asm/asmmacro-32.h index cdac7b3eeaf7..80386470d3a4 100644 --- a/arch/mips/include/asm/asmmacro-32.h +++ b/arch/mips/include/asm/asmmacro-32.h | |||
@@ -16,38 +16,38 @@ | |||
16 | .set push | 16 | .set push |
17 | SET_HARDFLOAT | 17 | SET_HARDFLOAT |
18 | cfc1 \tmp, fcr31 | 18 | cfc1 \tmp, fcr31 |
19 | swc1 $f0, THREAD_FPR0_LS64(\thread) | 19 | swc1 $f0, THREAD_FPR0(\thread) |
20 | swc1 $f1, THREAD_FPR1_LS64(\thread) | 20 | swc1 $f1, THREAD_FPR1(\thread) |
21 | swc1 $f2, THREAD_FPR2_LS64(\thread) | 21 | swc1 $f2, THREAD_FPR2(\thread) |
22 | swc1 $f3, THREAD_FPR3_LS64(\thread) | 22 | swc1 $f3, THREAD_FPR3(\thread) |
23 | swc1 $f4, THREAD_FPR4_LS64(\thread) | 23 | swc1 $f4, THREAD_FPR4(\thread) |
24 | swc1 $f5, THREAD_FPR5_LS64(\thread) | 24 | swc1 $f5, THREAD_FPR5(\thread) |
25 | swc1 $f6, THREAD_FPR6_LS64(\thread) | 25 | swc1 $f6, THREAD_FPR6(\thread) |
26 | swc1 $f7, THREAD_FPR7_LS64(\thread) | 26 | swc1 $f7, THREAD_FPR7(\thread) |
27 | swc1 $f8, THREAD_FPR8_LS64(\thread) | 27 | swc1 $f8, THREAD_FPR8(\thread) |
28 | swc1 $f9, THREAD_FPR9_LS64(\thread) | 28 | swc1 $f9, THREAD_FPR9(\thread) |
29 | swc1 $f10, THREAD_FPR10_LS64(\thread) | 29 | swc1 $f10, THREAD_FPR10(\thread) |
30 | swc1 $f11, THREAD_FPR11_LS64(\thread) | 30 | swc1 $f11, THREAD_FPR11(\thread) |
31 | swc1 $f12, THREAD_FPR12_LS64(\thread) | 31 | swc1 $f12, THREAD_FPR12(\thread) |
32 | swc1 $f13, THREAD_FPR13_LS64(\thread) | 32 | swc1 $f13, THREAD_FPR13(\thread) |
33 | swc1 $f14, THREAD_FPR14_LS64(\thread) | 33 | swc1 $f14, THREAD_FPR14(\thread) |
34 | swc1 $f15, THREAD_FPR15_LS64(\thread) | 34 | swc1 $f15, THREAD_FPR15(\thread) |
35 | swc1 $f16, THREAD_FPR16_LS64(\thread) | 35 | swc1 $f16, THREAD_FPR16(\thread) |
36 | swc1 $f17, THREAD_FPR17_LS64(\thread) | 36 | swc1 $f17, THREAD_FPR17(\thread) |
37 | swc1 $f18, THREAD_FPR18_LS64(\thread) | 37 | swc1 $f18, THREAD_FPR18(\thread) |
38 | swc1 $f19, THREAD_FPR19_LS64(\thread) | 38 | swc1 $f19, THREAD_FPR19(\thread) |
39 | swc1 $f20, THREAD_FPR20_LS64(\thread) | 39 | swc1 $f20, THREAD_FPR20(\thread) |
40 | swc1 $f21, THREAD_FPR21_LS64(\thread) | 40 | swc1 $f21, THREAD_FPR21(\thread) |
41 | swc1 $f22, THREAD_FPR22_LS64(\thread) | 41 | swc1 $f22, THREAD_FPR22(\thread) |
42 | swc1 $f23, THREAD_FPR23_LS64(\thread) | 42 | swc1 $f23, THREAD_FPR23(\thread) |
43 | swc1 $f24, THREAD_FPR24_LS64(\thread) | 43 | swc1 $f24, THREAD_FPR24(\thread) |
44 | swc1 $f25, THREAD_FPR25_LS64(\thread) | 44 | swc1 $f25, THREAD_FPR25(\thread) |
45 | swc1 $f26, THREAD_FPR26_LS64(\thread) | 45 | swc1 $f26, THREAD_FPR26(\thread) |
46 | swc1 $f27, THREAD_FPR27_LS64(\thread) | 46 | swc1 $f27, THREAD_FPR27(\thread) |
47 | swc1 $f28, THREAD_FPR28_LS64(\thread) | 47 | swc1 $f28, THREAD_FPR28(\thread) |
48 | swc1 $f29, THREAD_FPR29_LS64(\thread) | 48 | swc1 $f29, THREAD_FPR29(\thread) |
49 | swc1 $f30, THREAD_FPR30_LS64(\thread) | 49 | swc1 $f30, THREAD_FPR30(\thread) |
50 | swc1 $f31, THREAD_FPR31_LS64(\thread) | 50 | swc1 $f31, THREAD_FPR31(\thread) |
51 | sw \tmp, THREAD_FCR31(\thread) | 51 | sw \tmp, THREAD_FCR31(\thread) |
52 | .set pop | 52 | .set pop |
53 | .endm | 53 | .endm |
@@ -56,38 +56,38 @@ | |||
56 | .set push | 56 | .set push |
57 | SET_HARDFLOAT | 57 | SET_HARDFLOAT |
58 | lw \tmp, THREAD_FCR31(\thread) | 58 | lw \tmp, THREAD_FCR31(\thread) |
59 | lwc1 $f0, THREAD_FPR0_LS64(\thread) | 59 | lwc1 $f0, THREAD_FPR0(\thread) |
60 | lwc1 $f1, THREAD_FPR1_LS64(\thread) | 60 | lwc1 $f1, THREAD_FPR1(\thread) |
61 | lwc1 $f2, THREAD_FPR2_LS64(\thread) | 61 | lwc1 $f2, THREAD_FPR2(\thread) |
62 | lwc1 $f3, THREAD_FPR3_LS64(\thread) | 62 | lwc1 $f3, THREAD_FPR3(\thread) |
63 | lwc1 $f4, THREAD_FPR4_LS64(\thread) | 63 | lwc1 $f4, THREAD_FPR4(\thread) |
64 | lwc1 $f5, THREAD_FPR5_LS64(\thread) | 64 | lwc1 $f5, THREAD_FPR5(\thread) |
65 | lwc1 $f6, THREAD_FPR6_LS64(\thread) | 65 | lwc1 $f6, THREAD_FPR6(\thread) |
66 | lwc1 $f7, THREAD_FPR7_LS64(\thread) | 66 | lwc1 $f7, THREAD_FPR7(\thread) |
67 | lwc1 $f8, THREAD_FPR8_LS64(\thread) | 67 | lwc1 $f8, THREAD_FPR8(\thread) |
68 | lwc1 $f9, THREAD_FPR9_LS64(\thread) | 68 | lwc1 $f9, THREAD_FPR9(\thread) |
69 | lwc1 $f10, THREAD_FPR10_LS64(\thread) | 69 | lwc1 $f10, THREAD_FPR10(\thread) |
70 | lwc1 $f11, THREAD_FPR11_LS64(\thread) | 70 | lwc1 $f11, THREAD_FPR11(\thread) |
71 | lwc1 $f12, THREAD_FPR12_LS64(\thread) | 71 | lwc1 $f12, THREAD_FPR12(\thread) |
72 | lwc1 $f13, THREAD_FPR13_LS64(\thread) | 72 | lwc1 $f13, THREAD_FPR13(\thread) |
73 | lwc1 $f14, THREAD_FPR14_LS64(\thread) | 73 | lwc1 $f14, THREAD_FPR14(\thread) |
74 | lwc1 $f15, THREAD_FPR15_LS64(\thread) | 74 | lwc1 $f15, THREAD_FPR15(\thread) |
75 | lwc1 $f16, THREAD_FPR16_LS64(\thread) | 75 | lwc1 $f16, THREAD_FPR16(\thread) |
76 | lwc1 $f17, THREAD_FPR17_LS64(\thread) | 76 | lwc1 $f17, THREAD_FPR17(\thread) |
77 | lwc1 $f18, THREAD_FPR18_LS64(\thread) | 77 | lwc1 $f18, THREAD_FPR18(\thread) |
78 | lwc1 $f19, THREAD_FPR19_LS64(\thread) | 78 | lwc1 $f19, THREAD_FPR19(\thread) |
79 | lwc1 $f20, THREAD_FPR20_LS64(\thread) | 79 | lwc1 $f20, THREAD_FPR20(\thread) |
80 | lwc1 $f21, THREAD_FPR21_LS64(\thread) | 80 | lwc1 $f21, THREAD_FPR21(\thread) |
81 | lwc1 $f22, THREAD_FPR22_LS64(\thread) | 81 | lwc1 $f22, THREAD_FPR22(\thread) |
82 | lwc1 $f23, THREAD_FPR23_LS64(\thread) | 82 | lwc1 $f23, THREAD_FPR23(\thread) |
83 | lwc1 $f24, THREAD_FPR24_LS64(\thread) | 83 | lwc1 $f24, THREAD_FPR24(\thread) |
84 | lwc1 $f25, THREAD_FPR25_LS64(\thread) | 84 | lwc1 $f25, THREAD_FPR25(\thread) |
85 | lwc1 $f26, THREAD_FPR26_LS64(\thread) | 85 | lwc1 $f26, THREAD_FPR26(\thread) |
86 | lwc1 $f27, THREAD_FPR27_LS64(\thread) | 86 | lwc1 $f27, THREAD_FPR27(\thread) |
87 | lwc1 $f28, THREAD_FPR28_LS64(\thread) | 87 | lwc1 $f28, THREAD_FPR28(\thread) |
88 | lwc1 $f29, THREAD_FPR29_LS64(\thread) | 88 | lwc1 $f29, THREAD_FPR29(\thread) |
89 | lwc1 $f30, THREAD_FPR30_LS64(\thread) | 89 | lwc1 $f30, THREAD_FPR30(\thread) |
90 | lwc1 $f31, THREAD_FPR31_LS64(\thread) | 90 | lwc1 $f31, THREAD_FPR31(\thread) |
91 | ctc1 \tmp, fcr31 | 91 | ctc1 \tmp, fcr31 |
92 | .set pop | 92 | .set pop |
93 | .endm | 93 | .endm |
diff --git a/arch/mips/include/asm/asmmacro.h b/arch/mips/include/asm/asmmacro.h index a64e424ace16..6156ac8c4cfb 100644 --- a/arch/mips/include/asm/asmmacro.h +++ b/arch/mips/include/asm/asmmacro.h | |||
@@ -60,22 +60,22 @@ | |||
60 | .set push | 60 | .set push |
61 | SET_HARDFLOAT | 61 | SET_HARDFLOAT |
62 | cfc1 \tmp, fcr31 | 62 | cfc1 \tmp, fcr31 |
63 | sdc1 $f0, THREAD_FPR0_LS64(\thread) | 63 | sdc1 $f0, THREAD_FPR0(\thread) |
64 | sdc1 $f2, THREAD_FPR2_LS64(\thread) | 64 | sdc1 $f2, THREAD_FPR2(\thread) |
65 | sdc1 $f4, THREAD_FPR4_LS64(\thread) | 65 | sdc1 $f4, THREAD_FPR4(\thread) |
66 | sdc1 $f6, THREAD_FPR6_LS64(\thread) | 66 | sdc1 $f6, THREAD_FPR6(\thread) |
67 | sdc1 $f8, THREAD_FPR8_LS64(\thread) | 67 | sdc1 $f8, THREAD_FPR8(\thread) |
68 | sdc1 $f10, THREAD_FPR10_LS64(\thread) | 68 | sdc1 $f10, THREAD_FPR10(\thread) |
69 | sdc1 $f12, THREAD_FPR12_LS64(\thread) | 69 | sdc1 $f12, THREAD_FPR12(\thread) |
70 | sdc1 $f14, THREAD_FPR14_LS64(\thread) | 70 | sdc1 $f14, THREAD_FPR14(\thread) |
71 | sdc1 $f16, THREAD_FPR16_LS64(\thread) | 71 | sdc1 $f16, THREAD_FPR16(\thread) |
72 | sdc1 $f18, THREAD_FPR18_LS64(\thread) | 72 | sdc1 $f18, THREAD_FPR18(\thread) |
73 | sdc1 $f20, THREAD_FPR20_LS64(\thread) | 73 | sdc1 $f20, THREAD_FPR20(\thread) |
74 | sdc1 $f22, THREAD_FPR22_LS64(\thread) | 74 | sdc1 $f22, THREAD_FPR22(\thread) |
75 | sdc1 $f24, THREAD_FPR24_LS64(\thread) | 75 | sdc1 $f24, THREAD_FPR24(\thread) |
76 | sdc1 $f26, THREAD_FPR26_LS64(\thread) | 76 | sdc1 $f26, THREAD_FPR26(\thread) |
77 | sdc1 $f28, THREAD_FPR28_LS64(\thread) | 77 | sdc1 $f28, THREAD_FPR28(\thread) |
78 | sdc1 $f30, THREAD_FPR30_LS64(\thread) | 78 | sdc1 $f30, THREAD_FPR30(\thread) |
79 | sw \tmp, THREAD_FCR31(\thread) | 79 | sw \tmp, THREAD_FCR31(\thread) |
80 | .set pop | 80 | .set pop |
81 | .endm | 81 | .endm |
@@ -84,22 +84,22 @@ | |||
84 | .set push | 84 | .set push |
85 | .set mips64r2 | 85 | .set mips64r2 |
86 | SET_HARDFLOAT | 86 | SET_HARDFLOAT |
87 | sdc1 $f1, THREAD_FPR1_LS64(\thread) | 87 | sdc1 $f1, THREAD_FPR1(\thread) |
88 | sdc1 $f3, THREAD_FPR3_LS64(\thread) | 88 | sdc1 $f3, THREAD_FPR3(\thread) |
89 | sdc1 $f5, THREAD_FPR5_LS64(\thread) | 89 | sdc1 $f5, THREAD_FPR5(\thread) |
90 | sdc1 $f7, THREAD_FPR7_LS64(\thread) | 90 | sdc1 $f7, THREAD_FPR7(\thread) |
91 | sdc1 $f9, THREAD_FPR9_LS64(\thread) | 91 | sdc1 $f9, THREAD_FPR9(\thread) |
92 | sdc1 $f11, THREAD_FPR11_LS64(\thread) | 92 | sdc1 $f11, THREAD_FPR11(\thread) |
93 | sdc1 $f13, THREAD_FPR13_LS64(\thread) | 93 | sdc1 $f13, THREAD_FPR13(\thread) |
94 | sdc1 $f15, THREAD_FPR15_LS64(\thread) | 94 | sdc1 $f15, THREAD_FPR15(\thread) |
95 | sdc1 $f17, THREAD_FPR17_LS64(\thread) | 95 | sdc1 $f17, THREAD_FPR17(\thread) |
96 | sdc1 $f19, THREAD_FPR19_LS64(\thread) | 96 | sdc1 $f19, THREAD_FPR19(\thread) |
97 | sdc1 $f21, THREAD_FPR21_LS64(\thread) | 97 | sdc1 $f21, THREAD_FPR21(\thread) |
98 | sdc1 $f23, THREAD_FPR23_LS64(\thread) | 98 | sdc1 $f23, THREAD_FPR23(\thread) |
99 | sdc1 $f25, THREAD_FPR25_LS64(\thread) | 99 | sdc1 $f25, THREAD_FPR25(\thread) |
100 | sdc1 $f27, THREAD_FPR27_LS64(\thread) | 100 | sdc1 $f27, THREAD_FPR27(\thread) |
101 | sdc1 $f29, THREAD_FPR29_LS64(\thread) | 101 | sdc1 $f29, THREAD_FPR29(\thread) |
102 | sdc1 $f31, THREAD_FPR31_LS64(\thread) | 102 | sdc1 $f31, THREAD_FPR31(\thread) |
103 | .set pop | 103 | .set pop |
104 | .endm | 104 | .endm |
105 | 105 | ||
@@ -118,22 +118,22 @@ | |||
118 | .set push | 118 | .set push |
119 | SET_HARDFLOAT | 119 | SET_HARDFLOAT |
120 | lw \tmp, THREAD_FCR31(\thread) | 120 | lw \tmp, THREAD_FCR31(\thread) |
121 | ldc1 $f0, THREAD_FPR0_LS64(\thread) | 121 | ldc1 $f0, THREAD_FPR0(\thread) |
122 | ldc1 $f2, THREAD_FPR2_LS64(\thread) | 122 | ldc1 $f2, THREAD_FPR2(\thread) |
123 | ldc1 $f4, THREAD_FPR4_LS64(\thread) | 123 | ldc1 $f4, THREAD_FPR4(\thread) |
124 | ldc1 $f6, THREAD_FPR6_LS64(\thread) | 124 | ldc1 $f6, THREAD_FPR6(\thread) |
125 | ldc1 $f8, THREAD_FPR8_LS64(\thread) | 125 | ldc1 $f8, THREAD_FPR8(\thread) |
126 | ldc1 $f10, THREAD_FPR10_LS64(\thread) | 126 | ldc1 $f10, THREAD_FPR10(\thread) |
127 | ldc1 $f12, THREAD_FPR12_LS64(\thread) | 127 | ldc1 $f12, THREAD_FPR12(\thread) |
128 | ldc1 $f14, THREAD_FPR14_LS64(\thread) | 128 | ldc1 $f14, THREAD_FPR14(\thread) |
129 | ldc1 $f16, THREAD_FPR16_LS64(\thread) | 129 | ldc1 $f16, THREAD_FPR16(\thread) |
130 | ldc1 $f18, THREAD_FPR18_LS64(\thread) | 130 | ldc1 $f18, THREAD_FPR18(\thread) |
131 | ldc1 $f20, THREAD_FPR20_LS64(\thread) | 131 | ldc1 $f20, THREAD_FPR20(\thread) |
132 | ldc1 $f22, THREAD_FPR22_LS64(\thread) | 132 | ldc1 $f22, THREAD_FPR22(\thread) |
133 | ldc1 $f24, THREAD_FPR24_LS64(\thread) | 133 | ldc1 $f24, THREAD_FPR24(\thread) |
134 | ldc1 $f26, THREAD_FPR26_LS64(\thread) | 134 | ldc1 $f26, THREAD_FPR26(\thread) |
135 | ldc1 $f28, THREAD_FPR28_LS64(\thread) | 135 | ldc1 $f28, THREAD_FPR28(\thread) |
136 | ldc1 $f30, THREAD_FPR30_LS64(\thread) | 136 | ldc1 $f30, THREAD_FPR30(\thread) |
137 | ctc1 \tmp, fcr31 | 137 | ctc1 \tmp, fcr31 |
138 | .endm | 138 | .endm |
139 | 139 | ||
@@ -141,22 +141,22 @@ | |||
141 | .set push | 141 | .set push |
142 | .set mips64r2 | 142 | .set mips64r2 |
143 | SET_HARDFLOAT | 143 | SET_HARDFLOAT |
144 | ldc1 $f1, THREAD_FPR1_LS64(\thread) | 144 | ldc1 $f1, THREAD_FPR1(\thread) |
145 | ldc1 $f3, THREAD_FPR3_LS64(\thread) | 145 | ldc1 $f3, THREAD_FPR3(\thread) |
146 | ldc1 $f5, THREAD_FPR5_LS64(\thread) | 146 | ldc1 $f5, THREAD_FPR5(\thread) |
147 | ldc1 $f7, THREAD_FPR7_LS64(\thread) | 147 | ldc1 $f7, THREAD_FPR7(\thread) |
148 | ldc1 $f9, THREAD_FPR9_LS64(\thread) | 148 | ldc1 $f9, THREAD_FPR9(\thread) |
149 | ldc1 $f11, THREAD_FPR11_LS64(\thread) | 149 | ldc1 $f11, THREAD_FPR11(\thread) |
150 | ldc1 $f13, THREAD_FPR13_LS64(\thread) | 150 | ldc1 $f13, THREAD_FPR13(\thread) |
151 | ldc1 $f15, THREAD_FPR15_LS64(\thread) | 151 | ldc1 $f15, THREAD_FPR15(\thread) |
152 | ldc1 $f17, THREAD_FPR17_LS64(\thread) | 152 | ldc1 $f17, THREAD_FPR17(\thread) |
153 | ldc1 $f19, THREAD_FPR19_LS64(\thread) | 153 | ldc1 $f19, THREAD_FPR19(\thread) |
154 | ldc1 $f21, THREAD_FPR21_LS64(\thread) | 154 | ldc1 $f21, THREAD_FPR21(\thread) |
155 | ldc1 $f23, THREAD_FPR23_LS64(\thread) | 155 | ldc1 $f23, THREAD_FPR23(\thread) |
156 | ldc1 $f25, THREAD_FPR25_LS64(\thread) | 156 | ldc1 $f25, THREAD_FPR25(\thread) |
157 | ldc1 $f27, THREAD_FPR27_LS64(\thread) | 157 | ldc1 $f27, THREAD_FPR27(\thread) |
158 | ldc1 $f29, THREAD_FPR29_LS64(\thread) | 158 | ldc1 $f29, THREAD_FPR29(\thread) |
159 | ldc1 $f31, THREAD_FPR31_LS64(\thread) | 159 | ldc1 $f31, THREAD_FPR31(\thread) |
160 | .set pop | 160 | .set pop |
161 | .endm | 161 | .endm |
162 | 162 | ||
diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c index 750d67ac41e9..3ee1565c5be3 100644 --- a/arch/mips/kernel/asm-offsets.c +++ b/arch/mips/kernel/asm-offsets.c | |||
@@ -167,72 +167,6 @@ void output_thread_fpu_defines(void) | |||
167 | OFFSET(THREAD_FPR30, task_struct, thread.fpu.fpr[30]); | 167 | OFFSET(THREAD_FPR30, task_struct, thread.fpu.fpr[30]); |
168 | OFFSET(THREAD_FPR31, task_struct, thread.fpu.fpr[31]); | 168 | OFFSET(THREAD_FPR31, task_struct, thread.fpu.fpr[31]); |
169 | 169 | ||
170 | /* the least significant 64 bits of each FP register */ | ||
171 | OFFSET(THREAD_FPR0_LS64, task_struct, | ||
172 | thread.fpu.fpr[0].val64[FPR_IDX(64, 0)]); | ||
173 | OFFSET(THREAD_FPR1_LS64, task_struct, | ||
174 | thread.fpu.fpr[1].val64[FPR_IDX(64, 0)]); | ||
175 | OFFSET(THREAD_FPR2_LS64, task_struct, | ||
176 | thread.fpu.fpr[2].val64[FPR_IDX(64, 0)]); | ||
177 | OFFSET(THREAD_FPR3_LS64, task_struct, | ||
178 | thread.fpu.fpr[3].val64[FPR_IDX(64, 0)]); | ||
179 | OFFSET(THREAD_FPR4_LS64, task_struct, | ||
180 | thread.fpu.fpr[4].val64[FPR_IDX(64, 0)]); | ||
181 | OFFSET(THREAD_FPR5_LS64, task_struct, | ||
182 | thread.fpu.fpr[5].val64[FPR_IDX(64, 0)]); | ||
183 | OFFSET(THREAD_FPR6_LS64, task_struct, | ||
184 | thread.fpu.fpr[6].val64[FPR_IDX(64, 0)]); | ||
185 | OFFSET(THREAD_FPR7_LS64, task_struct, | ||
186 | thread.fpu.fpr[7].val64[FPR_IDX(64, 0)]); | ||
187 | OFFSET(THREAD_FPR8_LS64, task_struct, | ||
188 | thread.fpu.fpr[8].val64[FPR_IDX(64, 0)]); | ||
189 | OFFSET(THREAD_FPR9_LS64, task_struct, | ||
190 | thread.fpu.fpr[9].val64[FPR_IDX(64, 0)]); | ||
191 | OFFSET(THREAD_FPR10_LS64, task_struct, | ||
192 | thread.fpu.fpr[10].val64[FPR_IDX(64, 0)]); | ||
193 | OFFSET(THREAD_FPR11_LS64, task_struct, | ||
194 | thread.fpu.fpr[11].val64[FPR_IDX(64, 0)]); | ||
195 | OFFSET(THREAD_FPR12_LS64, task_struct, | ||
196 | thread.fpu.fpr[12].val64[FPR_IDX(64, 0)]); | ||
197 | OFFSET(THREAD_FPR13_LS64, task_struct, | ||
198 | thread.fpu.fpr[13].val64[FPR_IDX(64, 0)]); | ||
199 | OFFSET(THREAD_FPR14_LS64, task_struct, | ||
200 | thread.fpu.fpr[14].val64[FPR_IDX(64, 0)]); | ||
201 | OFFSET(THREAD_FPR15_LS64, task_struct, | ||
202 | thread.fpu.fpr[15].val64[FPR_IDX(64, 0)]); | ||
203 | OFFSET(THREAD_FPR16_LS64, task_struct, | ||
204 | thread.fpu.fpr[16].val64[FPR_IDX(64, 0)]); | ||
205 | OFFSET(THREAD_FPR17_LS64, task_struct, | ||
206 | thread.fpu.fpr[17].val64[FPR_IDX(64, 0)]); | ||
207 | OFFSET(THREAD_FPR18_LS64, task_struct, | ||
208 | thread.fpu.fpr[18].val64[FPR_IDX(64, 0)]); | ||
209 | OFFSET(THREAD_FPR19_LS64, task_struct, | ||
210 | thread.fpu.fpr[19].val64[FPR_IDX(64, 0)]); | ||
211 | OFFSET(THREAD_FPR20_LS64, task_struct, | ||
212 | thread.fpu.fpr[20].val64[FPR_IDX(64, 0)]); | ||
213 | OFFSET(THREAD_FPR21_LS64, task_struct, | ||
214 | thread.fpu.fpr[21].val64[FPR_IDX(64, 0)]); | ||
215 | OFFSET(THREAD_FPR22_LS64, task_struct, | ||
216 | thread.fpu.fpr[22].val64[FPR_IDX(64, 0)]); | ||
217 | OFFSET(THREAD_FPR23_LS64, task_struct, | ||
218 | thread.fpu.fpr[23].val64[FPR_IDX(64, 0)]); | ||
219 | OFFSET(THREAD_FPR24_LS64, task_struct, | ||
220 | thread.fpu.fpr[24].val64[FPR_IDX(64, 0)]); | ||
221 | OFFSET(THREAD_FPR25_LS64, task_struct, | ||
222 | thread.fpu.fpr[25].val64[FPR_IDX(64, 0)]); | ||
223 | OFFSET(THREAD_FPR26_LS64, task_struct, | ||
224 | thread.fpu.fpr[26].val64[FPR_IDX(64, 0)]); | ||
225 | OFFSET(THREAD_FPR27_LS64, task_struct, | ||
226 | thread.fpu.fpr[27].val64[FPR_IDX(64, 0)]); | ||
227 | OFFSET(THREAD_FPR28_LS64, task_struct, | ||
228 | thread.fpu.fpr[28].val64[FPR_IDX(64, 0)]); | ||
229 | OFFSET(THREAD_FPR29_LS64, task_struct, | ||
230 | thread.fpu.fpr[29].val64[FPR_IDX(64, 0)]); | ||
231 | OFFSET(THREAD_FPR30_LS64, task_struct, | ||
232 | thread.fpu.fpr[30].val64[FPR_IDX(64, 0)]); | ||
233 | OFFSET(THREAD_FPR31_LS64, task_struct, | ||
234 | thread.fpu.fpr[31].val64[FPR_IDX(64, 0)]); | ||
235 | |||
236 | OFFSET(THREAD_FCR31, task_struct, thread.fpu.fcr31); | 170 | OFFSET(THREAD_FCR31, task_struct, thread.fpu.fcr31); |
237 | OFFSET(THREAD_MSA_CSR, task_struct, thread.fpu.msacsr); | 171 | OFFSET(THREAD_MSA_CSR, task_struct, thread.fpu.msacsr); |
238 | BLANK(); | 172 | BLANK(); |