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authorAxel Lin <axel.lin@ingics.com>2014-05-23 01:05:31 -0400
committerMark Brown <broonie@linaro.org>2014-06-01 06:49:25 -0400
commit4641c771b67e0d1df9395ed789c618dcfbc62709 (patch)
treead14c401cd02a2ac7138d051a3f7a499f9b2ff25
parent3bb40619aca84905f87dd6bc7f6dce9efb525f28 (diff)
ASoC: cs42l56: Fix new value argument in snd_soc_update_bits calls
The new value argument needs proper shift to match the mask bit fields. Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested-by: Brian Austin <brian.austin@cirrus.com> Acked-by: Brian Austin <brian.austin@cirrus.com> Signed-off-by: Mark Brown <broonie@linaro.org>
-rw-r--r--sound/soc/codecs/cs42l56.c70
-rw-r--r--sound/soc/codecs/cs42l56.h10
2 files changed, 37 insertions, 43 deletions
diff --git a/sound/soc/codecs/cs42l56.c b/sound/soc/codecs/cs42l56.c
index 5bb134b4ab9b..fdc4bd27b0df 100644
--- a/sound/soc/codecs/cs42l56.c
+++ b/sound/soc/codecs/cs42l56.c
@@ -763,14 +763,14 @@ static int cs42l56_set_sysclk(struct snd_soc_dai *codec_dai,
763 case CS42L56_MCLK_11P2896MHZ: 763 case CS42L56_MCLK_11P2896MHZ:
764 case CS42L56_MCLK_12MHZ: 764 case CS42L56_MCLK_12MHZ:
765 case CS42L56_MCLK_12P288MHZ: 765 case CS42L56_MCLK_12P288MHZ:
766 cs42l56->mclk_div2 = 1; 766 cs42l56->mclk_div2 = CS42L56_MCLK_DIV2;
767 cs42l56->mclk_prediv = 0; 767 cs42l56->mclk_prediv = 0;
768 break; 768 break;
769 case CS42L56_MCLK_22P5792MHZ: 769 case CS42L56_MCLK_22P5792MHZ:
770 case CS42L56_MCLK_24MHZ: 770 case CS42L56_MCLK_24MHZ:
771 case CS42L56_MCLK_24P576MHZ: 771 case CS42L56_MCLK_24P576MHZ:
772 cs42l56->mclk_div2 = 1; 772 cs42l56->mclk_div2 = CS42L56_MCLK_DIV2;
773 cs42l56->mclk_prediv = 1; 773 cs42l56->mclk_prediv = CS42L56_MCLK_PREDIV;
774 break; 774 break;
775 default: 775 default:
776 return -EINVAL; 776 return -EINVAL;
@@ -844,57 +844,49 @@ static int cs42l56_digital_mute(struct snd_soc_dai *dai, int mute)
844 /* Hit the DSP Mixer first */ 844 /* Hit the DSP Mixer first */
845 snd_soc_update_bits(codec, CS42L56_DSP_MUTE_CTL, 845 snd_soc_update_bits(codec, CS42L56_DSP_MUTE_CTL,
846 CS42L56_ADCAMIX_MUTE_MASK | 846 CS42L56_ADCAMIX_MUTE_MASK |
847 CS42L56_ADCBMIX_MUTE_MASK | 847 CS42L56_ADCBMIX_MUTE_MASK |
848 CS42L56_PCMAMIX_MUTE_MASK | 848 CS42L56_PCMAMIX_MUTE_MASK |
849 CS42L56_PCMBMIX_MUTE_MASK | 849 CS42L56_PCMBMIX_MUTE_MASK |
850 CS42L56_MSTB_MUTE_MASK | 850 CS42L56_MSTB_MUTE_MASK |
851 CS42L56_MSTA_MUTE_MASK, 851 CS42L56_MSTA_MUTE_MASK,
852 CS42L56_MUTE); 852 CS42L56_MUTE_ALL);
853 /* Mute ADC's */ 853 /* Mute ADC's */
854 snd_soc_update_bits(codec, CS42L56_MISC_ADC_CTL, 854 snd_soc_update_bits(codec, CS42L56_MISC_ADC_CTL,
855 CS42L56_ADCA_MUTE_MASK | 855 CS42L56_ADCA_MUTE_MASK |
856 CS42L56_ADCB_MUTE_MASK, 856 CS42L56_ADCB_MUTE_MASK,
857 CS42L56_MUTE); 857 CS42L56_MUTE_ALL);
858 /* HP And LO */ 858 /* HP And LO */
859 snd_soc_update_bits(codec, CS42L56_HPA_VOLUME, 859 snd_soc_update_bits(codec, CS42L56_HPA_VOLUME,
860 CS42L56_HP_MUTE_MASK, 860 CS42L56_HP_MUTE_MASK, CS42L56_MUTE_ALL);
861 CS42L56_MUTE);
862 snd_soc_update_bits(codec, CS42L56_HPB_VOLUME, 861 snd_soc_update_bits(codec, CS42L56_HPB_VOLUME,
863 CS42L56_HP_MUTE_MASK, 862 CS42L56_HP_MUTE_MASK, CS42L56_MUTE_ALL);
864 CS42L56_MUTE);
865 snd_soc_update_bits(codec, CS42L56_LOA_VOLUME, 863 snd_soc_update_bits(codec, CS42L56_LOA_VOLUME,
866 CS42L56_LO_MUTE_MASK, 864 CS42L56_LO_MUTE_MASK, CS42L56_MUTE_ALL);
867 CS42L56_MUTE);
868 snd_soc_update_bits(codec, CS42L56_LOB_VOLUME, 865 snd_soc_update_bits(codec, CS42L56_LOB_VOLUME,
869 CS42L56_LO_MUTE_MASK, 866 CS42L56_LO_MUTE_MASK, CS42L56_MUTE_ALL);
870 CS42L56_MUTE);
871
872
873 } else { 867 } else {
874 snd_soc_update_bits(codec, CS42L56_DSP_MUTE_CTL, 868 snd_soc_update_bits(codec, CS42L56_DSP_MUTE_CTL,
875 CS42L56_ADCAMIX_MUTE_MASK | 869 CS42L56_ADCAMIX_MUTE_MASK |
876 CS42L56_ADCBMIX_MUTE_MASK | 870 CS42L56_ADCBMIX_MUTE_MASK |
877 CS42L56_PCMAMIX_MUTE_MASK | 871 CS42L56_PCMAMIX_MUTE_MASK |
878 CS42L56_PCMBMIX_MUTE_MASK | 872 CS42L56_PCMBMIX_MUTE_MASK |
879 CS42L56_MSTB_MUTE_MASK | 873 CS42L56_MSTB_MUTE_MASK |
880 CS42L56_MSTA_MUTE_MASK, 874 CS42L56_MSTA_MUTE_MASK,
881 CS42L56_UNMUTE); 875 CS42L56_UNMUTE);
876
882 snd_soc_update_bits(codec, CS42L56_MISC_ADC_CTL, 877 snd_soc_update_bits(codec, CS42L56_MISC_ADC_CTL,
883 CS42L56_ADCA_MUTE_MASK | 878 CS42L56_ADCA_MUTE_MASK |
884 CS42L56_ADCB_MUTE_MASK, 879 CS42L56_ADCB_MUTE_MASK,
885 CS42L56_UNMUTE); 880 CS42L56_UNMUTE);
881
886 snd_soc_update_bits(codec, CS42L56_HPA_VOLUME, 882 snd_soc_update_bits(codec, CS42L56_HPA_VOLUME,
887 CS42L56_HP_MUTE_MASK, 883 CS42L56_HP_MUTE_MASK, CS42L56_UNMUTE);
888 CS42L56_UNMUTE);
889 snd_soc_update_bits(codec, CS42L56_HPB_VOLUME, 884 snd_soc_update_bits(codec, CS42L56_HPB_VOLUME,
890 CS42L56_HP_MUTE_MASK, 885 CS42L56_HP_MUTE_MASK, CS42L56_UNMUTE);
891 CS42L56_UNMUTE);
892 snd_soc_update_bits(codec, CS42L56_LOA_VOLUME, 886 snd_soc_update_bits(codec, CS42L56_LOA_VOLUME,
893 CS42L56_LO_MUTE_MASK, 887 CS42L56_LO_MUTE_MASK, CS42L56_UNMUTE);
894 CS42L56_UNMUTE);
895 snd_soc_update_bits(codec, CS42L56_LOB_VOLUME, 888 snd_soc_update_bits(codec, CS42L56_LOB_VOLUME,
896 CS42L56_LO_MUTE_MASK, 889 CS42L56_LO_MUTE_MASK, CS42L56_UNMUTE);
897 CS42L56_UNMUTE);
898 } 890 }
899 return 0; 891 return 0;
900} 892}
diff --git a/sound/soc/codecs/cs42l56.h b/sound/soc/codecs/cs42l56.h
index ad2b50a90b16..5025ec9be9b2 100644
--- a/sound/soc/codecs/cs42l56.h
+++ b/sound/soc/codecs/cs42l56.h
@@ -80,19 +80,21 @@
80#define CS42L56_PDN_HPB_MASK 0xc0 80#define CS42L56_PDN_HPB_MASK 0xc0
81 81
82/* serial port and clk masks */ 82/* serial port and clk masks */
83#define CS42L56_MASTER_MODE 1 83#define CS42L56_MASTER_MODE 0x40
84#define CS42L56_SLAVE_MODE 0 84#define CS42L56_SLAVE_MODE 0
85#define CS42L56_MS_MODE_MASK 0x40 85#define CS42L56_MS_MODE_MASK 0x40
86#define CS42L56_SCLK_INV 1 86#define CS42L56_SCLK_INV 0x20
87#define CS42L56_SCLK_INV_MASK 0x20 87#define CS42L56_SCLK_INV_MASK 0x20
88#define CS42L56_SCLK_MCLK_MASK 0x18 88#define CS42L56_SCLK_MCLK_MASK 0x18
89#define CS42L56_MCLK_PREDIV 0x04
89#define CS42L56_MCLK_PREDIV_MASK 0x04 90#define CS42L56_MCLK_PREDIV_MASK 0x04
91#define CS42L56_MCLK_DIV2 0x02
90#define CS42L56_MCLK_DIV2_MASK 0x02 92#define CS42L56_MCLK_DIV2_MASK 0x02
91#define CS42L56_MCLK_DIS_MASK 0x01 93#define CS42L56_MCLK_DIS_MASK 0x01
92#define CS42L56_CLK_AUTO_MASK 0x20 94#define CS42L56_CLK_AUTO_MASK 0x20
93#define CS42L56_CLK_RATIO_MASK 0x1f 95#define CS42L56_CLK_RATIO_MASK 0x1f
94#define CS42L56_DIG_FMT_I2S 0 96#define CS42L56_DIG_FMT_I2S 0
95#define CS42L56_DIG_FMT_LEFT_J 1 97#define CS42L56_DIG_FMT_LEFT_J 0x08
96#define CS42L56_DIG_FMT_MASK 0x08 98#define CS42L56_DIG_FMT_MASK 0x08
97 99
98/* Class H and misc ctl masks */ 100/* Class H and misc ctl masks */
@@ -116,7 +118,7 @@
116#define CS42L56_DEEMPH_MASK 0x40 118#define CS42L56_DEEMPH_MASK 0x40
117#define CS42L56_PLYBCK_GANG_MASK 0x10 119#define CS42L56_PLYBCK_GANG_MASK 0x10
118#define CS42L56_PCM_INV_MASK 0x0c 120#define CS42L56_PCM_INV_MASK 0x0c
119#define CS42L56_MUTE 1 121#define CS42L56_MUTE_ALL 0xff
120#define CS42L56_UNMUTE 0 122#define CS42L56_UNMUTE 0
121#define CS42L56_ADCAMIX_MUTE_MASK 0x40 123#define CS42L56_ADCAMIX_MUTE_MASK 0x40
122#define CS42L56_ADCBMIX_MUTE_MASK 0x80 124#define CS42L56_ADCBMIX_MUTE_MASK 0x80