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authorLinus Torvalds <torvalds@linux-foundation.org>2011-12-05 19:54:15 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2011-12-05 19:54:15 -0500
commit45e713efe2fa574b6662e7fb63fae9497c5e03d4 (patch)
treec22ff1bcc6641c8f950a2ffa257649794238ee35
parent232ea344550c4a099d35d9df552509d6748a31c0 (diff)
parent61ed26e388ac67da262bb1a95d0474e4cabd4b0d (diff)
Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: intr_remapping: Fix section mismatch in ir_dev_scope_init() intel-iommu: Fix section mismatch in dmar_parse_rmrr_atsr_dev() x86, amd: Fix up numa_node information for AMD CPU family 15h model 0-0fh northbridge functions x86, AMD: Correct align_va_addr documentation x86/rtc, mrst: Don't register a platform RTC device for for Intel MID platforms x86/mrst: Battery fixes x86/paravirt: PTE updates in k(un)map_atomic need to be synchronous, regardless of lazy_mmu mode x86: Fix "Acer Aspire 1" reboot hang x86/mtrr: Resolve inconsistency with Intel processor manual x86: Document rdmsr_safe restrictions x86, microcode: Fix the failure path of microcode update driver init code Add TAINT_FIRMWARE_WORKAROUND on MTRR fixup x86/mpparse: Account for bus types other than ISA and PCI x86, mrst: Change the pmic_gpio device type to IPC mrst: Added some platform data for the SFI translations x86,mrst: Power control commands update x86/reboot: Blacklist Dell OptiPlex 990 known to require PCI reboot x86, UV: Fix UV2 hub part number x86: Add user_mode_vm check in stack_overflow_check
-rw-r--r--Documentation/kernel-parameters.txt4
-rw-r--r--arch/x86/include/asm/intel_scu_ipc.h14
-rw-r--r--arch/x86/include/asm/mrst.h9
-rw-r--r--arch/x86/include/asm/msr.h9
-rw-r--r--arch/x86/include/asm/uv/uv_mmrs.h1
-rw-r--r--arch/x86/kernel/apic/x2apic_uv_x.c2
-rw-r--r--arch/x86/kernel/cpu/mtrr/generic.c2
-rw-r--r--arch/x86/kernel/irq_64.c3
-rw-r--r--arch/x86/kernel/microcode_core.c28
-rw-r--r--arch/x86/kernel/mpparse.c2
-rw-r--r--arch/x86/kernel/quirks.c13
-rw-r--r--arch/x86/kernel/reboot.c21
-rw-r--r--arch/x86/kernel/rtc.c5
-rw-r--r--arch/x86/mm/highmem_32.c2
-rw-r--r--arch/x86/platform/mrst/mrst.c68
-rw-r--r--drivers/iommu/intel-iommu.c2
-rw-r--r--drivers/iommu/intr_remapping.c2
-rw-r--r--drivers/power/intel_mid_battery.c12
-rw-r--r--include/linux/pci_ids.h4
19 files changed, 164 insertions, 39 deletions
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index a0c5c5f4fce6..5e22c3f1f8bd 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -315,8 +315,8 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
315 CPU-intensive style benchmark, and it can vary highly in 315 CPU-intensive style benchmark, and it can vary highly in
316 a microbenchmark depending on workload and compiler. 316 a microbenchmark depending on workload and compiler.
317 317
318 1: only for 32-bit processes 318 32: only for 32-bit processes
319 2: only for 64-bit processes 319 64: only for 64-bit processes
320 on: enable for both 32- and 64-bit processes 320 on: enable for both 32- and 64-bit processes
321 off: disable for both 32- and 64-bit processes 321 off: disable for both 32- and 64-bit processes
322 322
diff --git a/arch/x86/include/asm/intel_scu_ipc.h b/arch/x86/include/asm/intel_scu_ipc.h
index 4420993acc47..925b605eb5c6 100644
--- a/arch/x86/include/asm/intel_scu_ipc.h
+++ b/arch/x86/include/asm/intel_scu_ipc.h
@@ -3,11 +3,15 @@
3 3
4#include <linux/notifier.h> 4#include <linux/notifier.h>
5 5
6#define IPCMSG_VRTC 0xFA /* Set vRTC device */ 6#define IPCMSG_WARM_RESET 0xF0
7 7#define IPCMSG_COLD_RESET 0xF1
8/* Command id associated with message IPCMSG_VRTC */ 8#define IPCMSG_SOFT_RESET 0xF2
9#define IPC_CMD_VRTC_SETTIME 1 /* Set time */ 9#define IPCMSG_COLD_BOOT 0xF3
10#define IPC_CMD_VRTC_SETALARM 2 /* Set alarm */ 10
11#define IPCMSG_VRTC 0xFA /* Set vRTC device */
12 /* Command id associated with message IPCMSG_VRTC */
13 #define IPC_CMD_VRTC_SETTIME 1 /* Set time */
14 #define IPC_CMD_VRTC_SETALARM 2 /* Set alarm */
11 15
12/* Read single register */ 16/* Read single register */
13int intel_scu_ipc_ioread8(u16 addr, u8 *data); 17int intel_scu_ipc_ioread8(u16 addr, u8 *data);
diff --git a/arch/x86/include/asm/mrst.h b/arch/x86/include/asm/mrst.h
index e6283129c821..93f79094c224 100644
--- a/arch/x86/include/asm/mrst.h
+++ b/arch/x86/include/asm/mrst.h
@@ -31,11 +31,20 @@ enum mrst_cpu_type {
31}; 31};
32 32
33extern enum mrst_cpu_type __mrst_cpu_chip; 33extern enum mrst_cpu_type __mrst_cpu_chip;
34
35#ifdef CONFIG_X86_INTEL_MID
36
34static inline enum mrst_cpu_type mrst_identify_cpu(void) 37static inline enum mrst_cpu_type mrst_identify_cpu(void)
35{ 38{
36 return __mrst_cpu_chip; 39 return __mrst_cpu_chip;
37} 40}
38 41
42#else /* !CONFIG_X86_INTEL_MID */
43
44#define mrst_identify_cpu() (0)
45
46#endif /* !CONFIG_X86_INTEL_MID */
47
39enum mrst_timer_options { 48enum mrst_timer_options {
40 MRST_TIMER_DEFAULT, 49 MRST_TIMER_DEFAULT,
41 MRST_TIMER_APBT_ONLY, 50 MRST_TIMER_APBT_ONLY,
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 084ef95274cd..95203d40ffdd 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -169,7 +169,14 @@ static inline int wrmsr_safe(unsigned msr, unsigned low, unsigned high)
169 return native_write_msr_safe(msr, low, high); 169 return native_write_msr_safe(msr, low, high);
170} 170}
171 171
172/* rdmsr with exception handling */ 172/*
173 * rdmsr with exception handling.
174 *
175 * Please note that the exception handling works only after we've
176 * switched to the "smart" #GP handler in trap_init() which knows about
177 * exception tables - using this macro earlier than that causes machine
178 * hangs on boxes which do not implement the @msr in the first argument.
179 */
173#define rdmsr_safe(msr, p1, p2) \ 180#define rdmsr_safe(msr, p1, p2) \
174({ \ 181({ \
175 int __err; \ 182 int __err; \
diff --git a/arch/x86/include/asm/uv/uv_mmrs.h b/arch/x86/include/asm/uv/uv_mmrs.h
index 10474fb1185d..cf1d73643f60 100644
--- a/arch/x86/include/asm/uv/uv_mmrs.h
+++ b/arch/x86/include/asm/uv/uv_mmrs.h
@@ -57,6 +57,7 @@
57 57
58#define UV1_HUB_PART_NUMBER 0x88a5 58#define UV1_HUB_PART_NUMBER 0x88a5
59#define UV2_HUB_PART_NUMBER 0x8eb8 59#define UV2_HUB_PART_NUMBER 0x8eb8
60#define UV2_HUB_PART_NUMBER_X 0x1111
60 61
61/* Compat: if this #define is present, UV headers support UV2 */ 62/* Compat: if this #define is present, UV headers support UV2 */
62#define UV2_HUB_IS_SUPPORTED 1 63#define UV2_HUB_IS_SUPPORTED 1
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index 62ae3001ae02..9d59bbacd4e3 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -93,6 +93,8 @@ static int __init early_get_pnodeid(void)
93 93
94 if (node_id.s.part_number == UV2_HUB_PART_NUMBER) 94 if (node_id.s.part_number == UV2_HUB_PART_NUMBER)
95 uv_min_hub_revision_id += UV2_HUB_REVISION_BASE - 1; 95 uv_min_hub_revision_id += UV2_HUB_REVISION_BASE - 1;
96 if (node_id.s.part_number == UV2_HUB_PART_NUMBER_X)
97 uv_min_hub_revision_id += UV2_HUB_REVISION_BASE - 1;
96 98
97 uv_hub_info->hub_revision = uv_min_hub_revision_id; 99 uv_hub_info->hub_revision = uv_min_hub_revision_id;
98 pnode = (node_id.s.node_id >> 1) & ((1 << m_n_config.s.n_skt) - 1); 100 pnode = (node_id.s.node_id >> 1) & ((1 << m_n_config.s.n_skt) - 1);
diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c
index a71efcdbb092..97b26356e9ee 100644
--- a/arch/x86/kernel/cpu/mtrr/generic.c
+++ b/arch/x86/kernel/cpu/mtrr/generic.c
@@ -547,6 +547,7 @@ static void generic_get_mtrr(unsigned int reg, unsigned long *base,
547 547
548 if (tmp != mask_lo) { 548 if (tmp != mask_lo) {
549 printk(KERN_WARNING "mtrr: your BIOS has configured an incorrect mask, fixing it.\n"); 549 printk(KERN_WARNING "mtrr: your BIOS has configured an incorrect mask, fixing it.\n");
550 add_taint(TAINT_FIRMWARE_WORKAROUND);
550 mask_lo = tmp; 551 mask_lo = tmp;
551 } 552 }
552 } 553 }
@@ -693,6 +694,7 @@ static void prepare_set(void) __acquires(set_atomicity_lock)
693 694
694 /* Disable MTRRs, and set the default type to uncached */ 695 /* Disable MTRRs, and set the default type to uncached */
695 mtrr_wrmsr(MSR_MTRRdefType, deftype_lo & ~0xcff, deftype_hi); 696 mtrr_wrmsr(MSR_MTRRdefType, deftype_lo & ~0xcff, deftype_hi);
697 wbinvd();
696} 698}
697 699
698static void post_set(void) __releases(set_atomicity_lock) 700static void post_set(void) __releases(set_atomicity_lock)
diff --git a/arch/x86/kernel/irq_64.c b/arch/x86/kernel/irq_64.c
index acf8fbf8fbda..69bca468c47a 100644
--- a/arch/x86/kernel/irq_64.c
+++ b/arch/x86/kernel/irq_64.c
@@ -38,6 +38,9 @@ static inline void stack_overflow_check(struct pt_regs *regs)
38#ifdef CONFIG_DEBUG_STACKOVERFLOW 38#ifdef CONFIG_DEBUG_STACKOVERFLOW
39 u64 curbase = (u64)task_stack_page(current); 39 u64 curbase = (u64)task_stack_page(current);
40 40
41 if (user_mode_vm(regs))
42 return;
43
41 WARN_ONCE(regs->sp >= curbase && 44 WARN_ONCE(regs->sp >= curbase &&
42 regs->sp <= curbase + THREAD_SIZE && 45 regs->sp <= curbase + THREAD_SIZE &&
43 regs->sp < curbase + sizeof(struct thread_info) + 46 regs->sp < curbase + sizeof(struct thread_info) +
diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c
index f2d2a664e797..9d46f5e43b51 100644
--- a/arch/x86/kernel/microcode_core.c
+++ b/arch/x86/kernel/microcode_core.c
@@ -256,7 +256,7 @@ static int __init microcode_dev_init(void)
256 return 0; 256 return 0;
257} 257}
258 258
259static void microcode_dev_exit(void) 259static void __exit microcode_dev_exit(void)
260{ 260{
261 misc_deregister(&microcode_dev); 261 misc_deregister(&microcode_dev);
262} 262}
@@ -519,10 +519,8 @@ static int __init microcode_init(void)
519 519
520 microcode_pdev = platform_device_register_simple("microcode", -1, 520 microcode_pdev = platform_device_register_simple("microcode", -1,
521 NULL, 0); 521 NULL, 0);
522 if (IS_ERR(microcode_pdev)) { 522 if (IS_ERR(microcode_pdev))
523 microcode_dev_exit();
524 return PTR_ERR(microcode_pdev); 523 return PTR_ERR(microcode_pdev);
525 }
526 524
527 get_online_cpus(); 525 get_online_cpus();
528 mutex_lock(&microcode_mutex); 526 mutex_lock(&microcode_mutex);
@@ -532,14 +530,12 @@ static int __init microcode_init(void)
532 mutex_unlock(&microcode_mutex); 530 mutex_unlock(&microcode_mutex);
533 put_online_cpus(); 531 put_online_cpus();
534 532
535 if (error) { 533 if (error)
536 platform_device_unregister(microcode_pdev); 534 goto out_pdev;
537 return error;
538 }
539 535
540 error = microcode_dev_init(); 536 error = microcode_dev_init();
541 if (error) 537 if (error)
542 return error; 538 goto out_sysdev_driver;
543 539
544 register_syscore_ops(&mc_syscore_ops); 540 register_syscore_ops(&mc_syscore_ops);
545 register_hotcpu_notifier(&mc_cpu_notifier); 541 register_hotcpu_notifier(&mc_cpu_notifier);
@@ -548,6 +544,20 @@ static int __init microcode_init(void)
548 " <tigran@aivazian.fsnet.co.uk>, Peter Oruba\n"); 544 " <tigran@aivazian.fsnet.co.uk>, Peter Oruba\n");
549 545
550 return 0; 546 return 0;
547
548out_sysdev_driver:
549 get_online_cpus();
550 mutex_lock(&microcode_mutex);
551
552 sysdev_driver_unregister(&cpu_sysdev_class, &mc_sysdev_driver);
553
554 mutex_unlock(&microcode_mutex);
555 put_online_cpus();
556
557out_pdev:
558 platform_device_unregister(microcode_pdev);
559 return error;
560
551} 561}
552module_init(microcode_init); 562module_init(microcode_init);
553 563
diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c
index 9103b89c145a..0741b062a304 100644
--- a/arch/x86/kernel/mpparse.c
+++ b/arch/x86/kernel/mpparse.c
@@ -95,8 +95,8 @@ static void __init MP_bus_info(struct mpc_bus *m)
95 } 95 }
96#endif 96#endif
97 97
98 set_bit(m->busid, mp_bus_not_pci);
98 if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) { 99 if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
99 set_bit(m->busid, mp_bus_not_pci);
100#if defined(CONFIG_EISA) || defined(CONFIG_MCA) 100#if defined(CONFIG_EISA) || defined(CONFIG_MCA)
101 mp_bus_id_to_type[m->busid] = MP_BUS_ISA; 101 mp_bus_id_to_type[m->busid] = MP_BUS_ISA;
102#endif 102#endif
diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c
index b78643d0f9a5..03920a15a632 100644
--- a/arch/x86/kernel/quirks.c
+++ b/arch/x86/kernel/quirks.c
@@ -553,4 +553,17 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC,
553 quirk_amd_nb_node); 553 quirk_amd_nb_node);
554DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_LINK, 554DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_LINK,
555 quirk_amd_nb_node); 555 quirk_amd_nb_node);
556DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F0,
557 quirk_amd_nb_node);
558DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F1,
559 quirk_amd_nb_node);
560DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F2,
561 quirk_amd_nb_node);
562DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F3,
563 quirk_amd_nb_node);
564DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F4,
565 quirk_amd_nb_node);
566DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F5,
567 quirk_amd_nb_node);
568
556#endif 569#endif
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c
index e334be1182b9..37a458b521a6 100644
--- a/arch/x86/kernel/reboot.c
+++ b/arch/x86/kernel/reboot.c
@@ -124,7 +124,7 @@ __setup("reboot=", reboot_setup);
124 */ 124 */
125 125
126/* 126/*
127 * Some machines require the "reboot=b" commandline option, 127 * Some machines require the "reboot=b" or "reboot=k" commandline options,
128 * this quirk makes that automatic. 128 * this quirk makes that automatic.
129 */ 129 */
130static int __init set_bios_reboot(const struct dmi_system_id *d) 130static int __init set_bios_reboot(const struct dmi_system_id *d)
@@ -136,6 +136,15 @@ static int __init set_bios_reboot(const struct dmi_system_id *d)
136 return 0; 136 return 0;
137} 137}
138 138
139static int __init set_kbd_reboot(const struct dmi_system_id *d)
140{
141 if (reboot_type != BOOT_KBD) {
142 reboot_type = BOOT_KBD;
143 printk(KERN_INFO "%s series board detected. Selecting KBD-method for reboot.\n", d->ident);
144 }
145 return 0;
146}
147
139static struct dmi_system_id __initdata reboot_dmi_table[] = { 148static struct dmi_system_id __initdata reboot_dmi_table[] = {
140 { /* Handle problems with rebooting on Dell E520's */ 149 { /* Handle problems with rebooting on Dell E520's */
141 .callback = set_bios_reboot, 150 .callback = set_bios_reboot,
@@ -295,7 +304,7 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = {
295 }, 304 },
296 }, 305 },
297 { /* Handle reboot issue on Acer Aspire one */ 306 { /* Handle reboot issue on Acer Aspire one */
298 .callback = set_bios_reboot, 307 .callback = set_kbd_reboot,
299 .ident = "Acer Aspire One A110", 308 .ident = "Acer Aspire One A110",
300 .matches = { 309 .matches = {
301 DMI_MATCH(DMI_SYS_VENDOR, "Acer"), 310 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
@@ -443,6 +452,14 @@ static struct dmi_system_id __initdata pci_reboot_dmi_table[] = {
443 DMI_MATCH(DMI_PRODUCT_NAME, "Latitude E6420"), 452 DMI_MATCH(DMI_PRODUCT_NAME, "Latitude E6420"),
444 }, 453 },
445 }, 454 },
455 { /* Handle problems with rebooting on the OptiPlex 990. */
456 .callback = set_pci_reboot,
457 .ident = "Dell OptiPlex 990",
458 .matches = {
459 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
460 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 990"),
461 },
462 },
446 { } 463 { }
447}; 464};
448 465
diff --git a/arch/x86/kernel/rtc.c b/arch/x86/kernel/rtc.c
index 348ce016a835..af6db6ec5b2a 100644
--- a/arch/x86/kernel/rtc.c
+++ b/arch/x86/kernel/rtc.c
@@ -12,6 +12,7 @@
12#include <asm/vsyscall.h> 12#include <asm/vsyscall.h>
13#include <asm/x86_init.h> 13#include <asm/x86_init.h>
14#include <asm/time.h> 14#include <asm/time.h>
15#include <asm/mrst.h>
15 16
16#ifdef CONFIG_X86_32 17#ifdef CONFIG_X86_32
17/* 18/*
@@ -242,6 +243,10 @@ static __init int add_rtc_cmos(void)
242 if (of_have_populated_dt()) 243 if (of_have_populated_dt())
243 return 0; 244 return 0;
244 245
246 /* Intel MID platforms don't have ioport rtc */
247 if (mrst_identify_cpu())
248 return -ENODEV;
249
245 platform_device_register(&rtc_device); 250 platform_device_register(&rtc_device);
246 dev_info(&rtc_device.dev, 251 dev_info(&rtc_device.dev,
247 "registered platform RTC device (no PNP device found)\n"); 252 "registered platform RTC device (no PNP device found)\n");
diff --git a/arch/x86/mm/highmem_32.c b/arch/x86/mm/highmem_32.c
index b49962662101..f4f29b19fac5 100644
--- a/arch/x86/mm/highmem_32.c
+++ b/arch/x86/mm/highmem_32.c
@@ -45,6 +45,7 @@ void *kmap_atomic_prot(struct page *page, pgprot_t prot)
45 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); 45 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
46 BUG_ON(!pte_none(*(kmap_pte-idx))); 46 BUG_ON(!pte_none(*(kmap_pte-idx)));
47 set_pte(kmap_pte-idx, mk_pte(page, prot)); 47 set_pte(kmap_pte-idx, mk_pte(page, prot));
48 arch_flush_lazy_mmu_mode();
48 49
49 return (void *)vaddr; 50 return (void *)vaddr;
50} 51}
@@ -88,6 +89,7 @@ void __kunmap_atomic(void *kvaddr)
88 */ 89 */
89 kpte_clear_flush(kmap_pte-idx, vaddr); 90 kpte_clear_flush(kmap_pte-idx, vaddr);
90 kmap_atomic_idx_pop(); 91 kmap_atomic_idx_pop();
92 arch_flush_lazy_mmu_mode();
91 } 93 }
92#ifdef CONFIG_DEBUG_HIGHMEM 94#ifdef CONFIG_DEBUG_HIGHMEM
93 else { 95 else {
diff --git a/arch/x86/platform/mrst/mrst.c b/arch/x86/platform/mrst/mrst.c
index b1489a06a49d..ad4ec1cb097e 100644
--- a/arch/x86/platform/mrst/mrst.c
+++ b/arch/x86/platform/mrst/mrst.c
@@ -76,6 +76,20 @@ struct sfi_rtc_table_entry sfi_mrtc_array[SFI_MRTC_MAX];
76EXPORT_SYMBOL_GPL(sfi_mrtc_array); 76EXPORT_SYMBOL_GPL(sfi_mrtc_array);
77int sfi_mrtc_num; 77int sfi_mrtc_num;
78 78
79static void mrst_power_off(void)
80{
81 if (__mrst_cpu_chip == MRST_CPU_CHIP_LINCROFT)
82 intel_scu_ipc_simple_command(IPCMSG_COLD_RESET, 1);
83}
84
85static void mrst_reboot(void)
86{
87 if (__mrst_cpu_chip == MRST_CPU_CHIP_LINCROFT)
88 intel_scu_ipc_simple_command(IPCMSG_COLD_RESET, 0);
89 else
90 intel_scu_ipc_simple_command(IPCMSG_COLD_BOOT, 0);
91}
92
79/* parse all the mtimer info to a static mtimer array */ 93/* parse all the mtimer info to a static mtimer array */
80static int __init sfi_parse_mtmr(struct sfi_table_header *table) 94static int __init sfi_parse_mtmr(struct sfi_table_header *table)
81{ 95{
@@ -265,17 +279,6 @@ static int mrst_i8042_detect(void)
265 return 0; 279 return 0;
266} 280}
267 281
268/* Reboot and power off are handled by the SCU on a MID device */
269static void mrst_power_off(void)
270{
271 intel_scu_ipc_simple_command(0xf1, 1);
272}
273
274static void mrst_reboot(void)
275{
276 intel_scu_ipc_simple_command(0xf1, 0);
277}
278
279/* 282/*
280 * Moorestown does not have external NMI source nor port 0x61 to report 283 * Moorestown does not have external NMI source nor port 0x61 to report
281 * NMI status. The possible NMI sources are from pmu as a result of NMI 284 * NMI status. The possible NMI sources are from pmu as a result of NMI
@@ -484,6 +487,46 @@ static void __init *max7315_platform_data(void *info)
484 return max7315; 487 return max7315;
485} 488}
486 489
490static void *tca6416_platform_data(void *info)
491{
492 static struct pca953x_platform_data tca6416;
493 struct i2c_board_info *i2c_info = info;
494 int gpio_base, intr;
495 char base_pin_name[SFI_NAME_LEN + 1];
496 char intr_pin_name[SFI_NAME_LEN + 1];
497
498 strcpy(i2c_info->type, "tca6416");
499 strcpy(base_pin_name, "tca6416_base");
500 strcpy(intr_pin_name, "tca6416_int");
501
502 gpio_base = get_gpio_by_name(base_pin_name);
503 intr = get_gpio_by_name(intr_pin_name);
504
505 if (gpio_base == -1)
506 return NULL;
507 tca6416.gpio_base = gpio_base;
508 if (intr != -1) {
509 i2c_info->irq = intr + MRST_IRQ_OFFSET;
510 tca6416.irq_base = gpio_base + MRST_IRQ_OFFSET;
511 } else {
512 i2c_info->irq = -1;
513 tca6416.irq_base = -1;
514 }
515 return &tca6416;
516}
517
518static void *mpu3050_platform_data(void *info)
519{
520 struct i2c_board_info *i2c_info = info;
521 int intr = get_gpio_by_name("mpu3050_int");
522
523 if (intr == -1)
524 return NULL;
525
526 i2c_info->irq = intr + MRST_IRQ_OFFSET;
527 return NULL;
528}
529
487static void __init *emc1403_platform_data(void *info) 530static void __init *emc1403_platform_data(void *info)
488{ 531{
489 static short intr2nd_pdata; 532 static short intr2nd_pdata;
@@ -646,12 +689,15 @@ static void *msic_ocd_platform_data(void *info)
646static const struct devs_id __initconst device_ids[] = { 689static const struct devs_id __initconst device_ids[] = {
647 {"bma023", SFI_DEV_TYPE_I2C, 1, &no_platform_data}, 690 {"bma023", SFI_DEV_TYPE_I2C, 1, &no_platform_data},
648 {"pmic_gpio", SFI_DEV_TYPE_SPI, 1, &pmic_gpio_platform_data}, 691 {"pmic_gpio", SFI_DEV_TYPE_SPI, 1, &pmic_gpio_platform_data},
692 {"pmic_gpio", SFI_DEV_TYPE_IPC, 1, &pmic_gpio_platform_data},
649 {"spi_max3111", SFI_DEV_TYPE_SPI, 0, &max3111_platform_data}, 693 {"spi_max3111", SFI_DEV_TYPE_SPI, 0, &max3111_platform_data},
650 {"i2c_max7315", SFI_DEV_TYPE_I2C, 1, &max7315_platform_data}, 694 {"i2c_max7315", SFI_DEV_TYPE_I2C, 1, &max7315_platform_data},
651 {"i2c_max7315_2", SFI_DEV_TYPE_I2C, 1, &max7315_platform_data}, 695 {"i2c_max7315_2", SFI_DEV_TYPE_I2C, 1, &max7315_platform_data},
696 {"tca6416", SFI_DEV_TYPE_I2C, 1, &tca6416_platform_data},
652 {"emc1403", SFI_DEV_TYPE_I2C, 1, &emc1403_platform_data}, 697 {"emc1403", SFI_DEV_TYPE_I2C, 1, &emc1403_platform_data},
653 {"i2c_accel", SFI_DEV_TYPE_I2C, 0, &lis331dl_platform_data}, 698 {"i2c_accel", SFI_DEV_TYPE_I2C, 0, &lis331dl_platform_data},
654 {"pmic_audio", SFI_DEV_TYPE_IPC, 1, &no_platform_data}, 699 {"pmic_audio", SFI_DEV_TYPE_IPC, 1, &no_platform_data},
700 {"mpu3050", SFI_DEV_TYPE_I2C, 1, &mpu3050_platform_data},
655 701
656 /* MSIC subdevices */ 702 /* MSIC subdevices */
657 {"msic_battery", SFI_DEV_TYPE_IPC, 1, &msic_battery_platform_data}, 703 {"msic_battery", SFI_DEV_TYPE_IPC, 1, &msic_battery_platform_data},
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index c0c7820d4c46..a004c3945c67 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -3524,7 +3524,7 @@ found:
3524 return 0; 3524 return 0;
3525} 3525}
3526 3526
3527int dmar_parse_rmrr_atsr_dev(void) 3527int __init dmar_parse_rmrr_atsr_dev(void)
3528{ 3528{
3529 struct dmar_rmrr_unit *rmrr, *rmrr_n; 3529 struct dmar_rmrr_unit *rmrr, *rmrr_n;
3530 struct dmar_atsr_unit *atsr, *atsr_n; 3530 struct dmar_atsr_unit *atsr, *atsr_n;
diff --git a/drivers/iommu/intr_remapping.c b/drivers/iommu/intr_remapping.c
index 07c9f189f314..6777ca049471 100644
--- a/drivers/iommu/intr_remapping.c
+++ b/drivers/iommu/intr_remapping.c
@@ -773,7 +773,7 @@ int __init parse_ioapics_under_ir(void)
773 return ir_supported; 773 return ir_supported;
774} 774}
775 775
776int ir_dev_scope_init(void) 776int __init ir_dev_scope_init(void)
777{ 777{
778 if (!intr_remapping_enabled) 778 if (!intr_remapping_enabled)
779 return 0; 779 return 0;
diff --git a/drivers/power/intel_mid_battery.c b/drivers/power/intel_mid_battery.c
index cffcb7c00b00..01fa671ec97f 100644
--- a/drivers/power/intel_mid_battery.c
+++ b/drivers/power/intel_mid_battery.c
@@ -61,7 +61,8 @@ MODULE_PARM_DESC(debug, "Flag to enable PMIC Battery debug messages.");
61#define PMIC_BATT_CHR_SBATDET_MASK (1 << 5) 61#define PMIC_BATT_CHR_SBATDET_MASK (1 << 5)
62#define PMIC_BATT_CHR_SDCLMT_MASK (1 << 6) 62#define PMIC_BATT_CHR_SDCLMT_MASK (1 << 6)
63#define PMIC_BATT_CHR_SUSBOVP_MASK (1 << 7) 63#define PMIC_BATT_CHR_SUSBOVP_MASK (1 << 7)
64#define PMIC_BATT_CHR_EXCPT_MASK 0xC6 64#define PMIC_BATT_CHR_EXCPT_MASK 0x86
65
65#define PMIC_BATT_ADC_ACCCHRG_MASK (1 << 31) 66#define PMIC_BATT_ADC_ACCCHRG_MASK (1 << 31)
66#define PMIC_BATT_ADC_ACCCHRGVAL_MASK 0x7FFFFFFF 67#define PMIC_BATT_ADC_ACCCHRGVAL_MASK 0x7FFFFFFF
67 68
@@ -304,11 +305,6 @@ static void pmic_battery_read_status(struct pmic_power_module_info *pbi)
304 pbi->batt_status = POWER_SUPPLY_STATUS_NOT_CHARGING; 305 pbi->batt_status = POWER_SUPPLY_STATUS_NOT_CHARGING;
305 pmic_battery_log_event(BATT_EVENT_BATOVP_EXCPT); 306 pmic_battery_log_event(BATT_EVENT_BATOVP_EXCPT);
306 batt_exception = 1; 307 batt_exception = 1;
307 } else if (r8 & PMIC_BATT_CHR_SDCLMT_MASK) {
308 pbi->batt_health = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
309 pbi->batt_status = POWER_SUPPLY_STATUS_NOT_CHARGING;
310 pmic_battery_log_event(BATT_EVENT_DCLMT_EXCPT);
311 batt_exception = 1;
312 } else if (r8 & PMIC_BATT_CHR_STEMP_MASK) { 308 } else if (r8 & PMIC_BATT_CHR_STEMP_MASK) {
313 pbi->batt_health = POWER_SUPPLY_HEALTH_OVERHEAT; 309 pbi->batt_health = POWER_SUPPLY_HEALTH_OVERHEAT;
314 pbi->batt_status = POWER_SUPPLY_STATUS_NOT_CHARGING; 310 pbi->batt_status = POWER_SUPPLY_STATUS_NOT_CHARGING;
@@ -316,6 +312,10 @@ static void pmic_battery_read_status(struct pmic_power_module_info *pbi)
316 batt_exception = 1; 312 batt_exception = 1;
317 } else { 313 } else {
318 pbi->batt_health = POWER_SUPPLY_HEALTH_GOOD; 314 pbi->batt_health = POWER_SUPPLY_HEALTH_GOOD;
315 if (r8 & PMIC_BATT_CHR_SDCLMT_MASK) {
316 /* PMIC will change charging current automatically */
317 pmic_battery_log_event(BATT_EVENT_DCLMT_EXCPT);
318 }
319 } 319 }
320 } 320 }
321 321
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 172ba70306d1..2aaee0ca9da8 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -517,8 +517,12 @@
517#define PCI_DEVICE_ID_AMD_11H_NB_DRAM 0x1302 517#define PCI_DEVICE_ID_AMD_11H_NB_DRAM 0x1302
518#define PCI_DEVICE_ID_AMD_11H_NB_MISC 0x1303 518#define PCI_DEVICE_ID_AMD_11H_NB_MISC 0x1303
519#define PCI_DEVICE_ID_AMD_11H_NB_LINK 0x1304 519#define PCI_DEVICE_ID_AMD_11H_NB_LINK 0x1304
520#define PCI_DEVICE_ID_AMD_15H_NB_F0 0x1600
521#define PCI_DEVICE_ID_AMD_15H_NB_F1 0x1601
522#define PCI_DEVICE_ID_AMD_15H_NB_F2 0x1602
520#define PCI_DEVICE_ID_AMD_15H_NB_F3 0x1603 523#define PCI_DEVICE_ID_AMD_15H_NB_F3 0x1603
521#define PCI_DEVICE_ID_AMD_15H_NB_F4 0x1604 524#define PCI_DEVICE_ID_AMD_15H_NB_F4 0x1604
525#define PCI_DEVICE_ID_AMD_15H_NB_F5 0x1605
522#define PCI_DEVICE_ID_AMD_CNB17H_F3 0x1703 526#define PCI_DEVICE_ID_AMD_CNB17H_F3 0x1703
523#define PCI_DEVICE_ID_AMD_LANCE 0x2000 527#define PCI_DEVICE_ID_AMD_LANCE 0x2000
524#define PCI_DEVICE_ID_AMD_LANCE_HOME 0x2001 528#define PCI_DEVICE_ID_AMD_LANCE_HOME 0x2001