iommu/arm-smmu: remove support for chained SMMUs

The ARM SMMU driver has supported chained SMMUs (i.e. SMMUs connected
back-to-back in series) via the smmu-parent property in device tree.
This was in anticipation of somebody building such a configuration,
however that seems not to be the case.

This patch removes the unused chained SMMU hack from the driver. We can
consider adding it back later if somebody decided they need it, but for
the time being it's just pointless mess that we're carrying in mainline.

Removal of the feature also makes migration to the generic IOMMU bindings
easier.

Signed-off-by: Will Deacon <will.deacon@arm.com>

2 files changed, 77 insertions, 192 deletions

diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
index f284b99402bc..2d0f7cd867ea 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
@@ -42,12 +42,6 @@ conditions.
 
 ** System MMU optional properties:
 
-- smmu-parent   : When multiple SMMUs are chained together, this
-                  property can be used to provide a phandle to the
-                  parent SMMU (that is the next SMMU on the path going
-                  from the mmu-masters towards memory) node for this
-                  SMMU.
-
 - calxeda,smmu-secure-config-access : Enable proper handling of buggy
                   implementations that always use secure access to
                   SMMU configuration registers. In this case non-secure
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 3ae50be49269..2961b8c474eb 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -333,28 +333,17 @@ struct arm_smmu_smr {
 struct arm_smmu_master_cfg {
         int                             num_streamids;
         u16                             streamids[MAX_MASTER_STREAMIDS];
-
-        /*
-         * We only need to allocate these on the root SMMU, as we
-         * configure unmatched streams to bypass translation.
-         */
         struct arm_smmu_smr             *smrs;
 };
 
 struct arm_smmu_master {
         struct device_node              *of_node;
-
-        /*
-         * The following is specific to the master's position in the
-         * SMMU chain.
-         */
         struct rb_node                  node;
         struct arm_smmu_master_cfg      cfg;
 };
 
 struct arm_smmu_device {
         struct device                   *dev;
-        struct device_node              *parent_of_node;
 
         void __iomem                    *base;
         unsigned long                   size;
@@ -392,7 +381,6 @@ struct arm_smmu_device {
 };
 
 struct arm_smmu_cfg {
-        struct arm_smmu_device          *smmu;
         u8                              cbndx;
         u8                              irptndx;
         u32                             cbar;
@@ -404,15 +392,8 @@ struct arm_smmu_cfg {
 #define ARM_SMMU_CB_VMID(cfg)           ((cfg)->cbndx + 1)
 
 struct arm_smmu_domain {
-        /*
-         * A domain can span across multiple, chained SMMUs and requires
-         * all devices within the domain to follow the same translation
-         * path.
-         */
-        struct arm_smmu_device          *leaf_smmu;
-        struct arm_smmu_cfg             root_cfg;
-        phys_addr_t                     output_mask;
-
+        struct arm_smmu_device          *smmu;
+        struct arm_smmu_cfg             cfg;
         spinlock_t                      lock;
 };
 
@@ -546,59 +527,20 @@ static int register_smmu_master(struct arm_smmu_device *smmu,
         return insert_smmu_master(smmu, master);
 }
 
-static struct arm_smmu_device *find_parent_smmu(struct arm_smmu_device *smmu)
+static struct arm_smmu_device *find_smmu_for_device(struct device *dev)
 {
-        struct arm_smmu_device *parent;
-
-        if (!smmu->parent_of_node)
-                return NULL;
-
-        spin_lock(&arm_smmu_devices_lock);
-        list_for_each_entry(parent, &arm_smmu_devices, list)
-                if (parent->dev->of_node == smmu->parent_of_node)
-                        goto out_unlock;
-
-        parent = NULL;
-        dev_warn(smmu->dev,
-                 "Failed to find SMMU parent despite parent in DT\n");
-out_unlock:
-        spin_unlock(&arm_smmu_devices_lock);
-        return parent;
-}
-
-static struct arm_smmu_device *find_parent_smmu_for_device(struct device *dev)
-{
-        struct arm_smmu_device *child, *parent, *smmu;
+        struct arm_smmu_device *smmu;
         struct arm_smmu_master *master = NULL;
         struct device_node *dev_node = dev_get_master_dev(dev)->of_node;
 
         spin_lock(&arm_smmu_devices_lock);
-        list_for_each_entry(parent, &arm_smmu_devices, list) {
-                smmu = parent;
-
-                /* Try to find a child of the current SMMU. */
-                list_for_each_entry(child, &arm_smmu_devices, list) {
-                        if (child->parent_of_node == parent->dev->of_node) {
-                                /* Does the child sit above our master? */
-                                master = find_smmu_master(child, dev_node);
-                                if (master) {
-                                        smmu = NULL;
-                                        break;
-                                }
-                        }
-                }
-
-                /* We found some children, so keep searching. */
-                if (!smmu) {
-                        master = NULL;
-                        continue;
-                }
-
+        list_for_each_entry(smmu, &arm_smmu_devices, list) {
                 master = find_smmu_master(smmu, dev_node);
                 if (master)
                         break;
         }
         spin_unlock(&arm_smmu_devices_lock);
+
         return master ? smmu : NULL;
 }
 
@@ -639,9 +581,10 @@ static void arm_smmu_tlb_sync(struct arm_smmu_device *smmu)
         }
 }
 
-static void arm_smmu_tlb_inv_context(struct arm_smmu_cfg *cfg)
+static void arm_smmu_tlb_inv_context(struct arm_smmu_domain *smmu_domain)
 {
-        struct arm_smmu_device *smmu = cfg->smmu;
+        struct arm_smmu_cfg *cfg = &smmu_domain->cfg;
+        struct arm_smmu_device *smmu = smmu_domain->smmu;
         void __iomem *base = ARM_SMMU_GR0(smmu);
         bool stage1 = cfg->cbar != CBAR_TYPE_S2_TRANS;
 
@@ -665,11 +608,11 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev)
         unsigned long iova;
         struct iommu_domain *domain = dev;
         struct arm_smmu_domain *smmu_domain = domain->priv;
-        struct arm_smmu_cfg *root_cfg = &smmu_domain->root_cfg;
-        struct arm_smmu_device *smmu = root_cfg->smmu;
+        struct arm_smmu_cfg *cfg = &smmu_domain->cfg;
+        struct arm_smmu_device *smmu = smmu_domain->smmu;
         void __iomem *cb_base;
 
-        cb_base = ARM_SMMU_CB_BASE(smmu) + ARM_SMMU_CB(smmu, root_cfg->cbndx);
+        cb_base = ARM_SMMU_CB_BASE(smmu) + ARM_SMMU_CB(smmu, cfg->cbndx);
         fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR);