diff options
author | Greg Ungerer <gerg@uclinux.org> | 2011-12-23 23:36:27 -0500 |
---|---|---|
committer | Greg Ungerer <gerg@uclinux.org> | 2012-03-04 18:43:10 -0500 |
commit | 440f6ffc061a84e81386a093c07af8a429c18702 (patch) | |
tree | a5c202d9b43364b57acbef2e9e745c78c8d1b79e | |
parent | c05793c7332d0f4179068bc6a6120e67b73a09ef (diff) |
m68knommu: move old ColdFire timers init from CPU init to timers code
The original ColdFire timer interrupt setup is used by most of the users
of the original ColdFire timer code. But the code is currently duplicated
in each of the ColdFire CPU specific init files. Move it to the timers
code that it is really part of. It is strait forward to make it conditional
on also having the original interrupt engine that it needs.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
-rw-r--r-- | arch/m68k/platform/5206/config.c | 18 | ||||
-rw-r--r-- | arch/m68k/platform/5249/config.c | 18 | ||||
-rw-r--r-- | arch/m68k/platform/5307/config.c | 18 | ||||
-rw-r--r-- | arch/m68k/platform/5407/config.c | 18 | ||||
-rw-r--r-- | arch/m68k/platform/coldfire/timers.c | 20 |
5 files changed, 20 insertions, 72 deletions
diff --git a/arch/m68k/platform/5206/config.c b/arch/m68k/platform/5206/config.c index aca6253191f7..c81dd51ff758 100644 --- a/arch/m68k/platform/5206/config.c +++ b/arch/m68k/platform/5206/config.c | |||
@@ -19,23 +19,6 @@ | |||
19 | 19 | ||
20 | /***************************************************************************/ | 20 | /***************************************************************************/ |
21 | 21 | ||
22 | static void __init m5206_timers_init(void) | ||
23 | { | ||
24 | /* Timer1 is always used as system timer */ | ||
25 | writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3, | ||
26 | MCF_MBAR + MCFSIM_TIMER1ICR); | ||
27 | mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1); | ||
28 | |||
29 | #ifdef CONFIG_HIGHPROFILE | ||
30 | /* Timer2 is to be used as a high speed profile timer */ | ||
31 | writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3, | ||
32 | MCF_MBAR + MCFSIM_TIMER2ICR); | ||
33 | mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2); | ||
34 | #endif | ||
35 | } | ||
36 | |||
37 | /***************************************************************************/ | ||
38 | |||
39 | void m5206_cpu_reset(void) | 22 | void m5206_cpu_reset(void) |
40 | { | 23 | { |
41 | local_irq_disable(); | 24 | local_irq_disable(); |
@@ -57,7 +40,6 @@ void __init config_BSP(char *commandp, int size) | |||
57 | 40 | ||
58 | mach_reset = m5206_cpu_reset; | 41 | mach_reset = m5206_cpu_reset; |
59 | mach_sched_init = hw_timer_init; | 42 | mach_sched_init = hw_timer_init; |
60 | m5206_timers_init(); | ||
61 | 43 | ||
62 | /* Only support the external interrupts on their primary level */ | 44 | /* Only support the external interrupts on their primary level */ |
63 | mcf_mapirq2imr(25, MCFINTC_EINT1); | 45 | mcf_mapirq2imr(25, MCFINTC_EINT1); |
diff --git a/arch/m68k/platform/5249/config.c b/arch/m68k/platform/5249/config.c index d00e12a378cc..cda273383226 100644 --- a/arch/m68k/platform/5249/config.c +++ b/arch/m68k/platform/5249/config.c | |||
@@ -83,23 +83,6 @@ static void __init m5249_smc91x_init(void) | |||
83 | 83 | ||
84 | /***************************************************************************/ | 84 | /***************************************************************************/ |
85 | 85 | ||
86 | static void __init m5249_timers_init(void) | ||
87 | { | ||
88 | /* Timer1 is always used as system timer */ | ||
89 | writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3, | ||
90 | MCF_MBAR + MCFSIM_TIMER1ICR); | ||
91 | mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1); | ||
92 | |||
93 | #ifdef CONFIG_HIGHPROFILE | ||
94 | /* Timer2 is to be used as a high speed profile timer */ | ||
95 | writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3, | ||
96 | MCF_MBAR + MCFSIM_TIMER2ICR); | ||
97 | mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2); | ||
98 | #endif | ||
99 | } | ||
100 | |||
101 | /***************************************************************************/ | ||
102 | |||
103 | void m5249_cpu_reset(void) | 86 | void m5249_cpu_reset(void) |
104 | { | 87 | { |
105 | local_irq_disable(); | 88 | local_irq_disable(); |
@@ -115,7 +98,6 @@ void __init config_BSP(char *commandp, int size) | |||
115 | { | 98 | { |
116 | mach_reset = m5249_cpu_reset; | 99 | mach_reset = m5249_cpu_reset; |
117 | mach_sched_init = hw_timer_init; | 100 | mach_sched_init = hw_timer_init; |
118 | m5249_timers_init(); | ||
119 | #ifdef CONFIG_M5249C3 | 101 | #ifdef CONFIG_M5249C3 |
120 | m5249_smc91x_init(); | 102 | m5249_smc91x_init(); |
121 | #endif | 103 | #endif |
diff --git a/arch/m68k/platform/5307/config.c b/arch/m68k/platform/5307/config.c index 89722cdbd026..5f4bf6cb017f 100644 --- a/arch/m68k/platform/5307/config.c +++ b/arch/m68k/platform/5307/config.c | |||
@@ -28,23 +28,6 @@ unsigned char ledbank = 0xff; | |||
28 | 28 | ||
29 | /***************************************************************************/ | 29 | /***************************************************************************/ |
30 | 30 | ||
31 | static void __init m5307_timers_init(void) | ||
32 | { | ||
33 | /* Timer1 is always used as system timer */ | ||
34 | writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3, | ||
35 | MCF_MBAR + MCFSIM_TIMER1ICR); | ||
36 | mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1); | ||
37 | |||
38 | #ifdef CONFIG_HIGHPROFILE | ||
39 | /* Timer2 is to be used as a high speed profile timer */ | ||
40 | writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3, | ||
41 | MCF_MBAR + MCFSIM_TIMER2ICR); | ||
42 | mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2); | ||
43 | #endif | ||
44 | } | ||
45 | |||
46 | /***************************************************************************/ | ||
47 | |||
48 | void m5307_cpu_reset(void) | 31 | void m5307_cpu_reset(void) |
49 | { | 32 | { |
50 | local_irq_disable(); | 33 | local_irq_disable(); |
@@ -67,7 +50,6 @@ void __init config_BSP(char *commandp, int size) | |||
67 | 50 | ||
68 | mach_reset = m5307_cpu_reset; | 51 | mach_reset = m5307_cpu_reset; |
69 | mach_sched_init = hw_timer_init; | 52 | mach_sched_init = hw_timer_init; |
70 | m5307_timers_init(); | ||
71 | 53 | ||
72 | /* Only support the external interrupts on their primary level */ | 54 | /* Only support the external interrupts on their primary level */ |
73 | mcf_mapirq2imr(25, MCFINTC_EINT1); | 55 | mcf_mapirq2imr(25, MCFINTC_EINT1); |
diff --git a/arch/m68k/platform/5407/config.c b/arch/m68k/platform/5407/config.c index e3b4cab0feb3..19c612557b98 100644 --- a/arch/m68k/platform/5407/config.c +++ b/arch/m68k/platform/5407/config.c | |||
@@ -19,23 +19,6 @@ | |||
19 | 19 | ||
20 | /***************************************************************************/ | 20 | /***************************************************************************/ |
21 | 21 | ||
22 | static void __init m5407_timers_init(void) | ||
23 | { | ||
24 | /* Timer1 is always used as system timer */ | ||
25 | writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3, | ||
26 | MCF_MBAR + MCFSIM_TIMER1ICR); | ||
27 | mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1); | ||
28 | |||
29 | #ifdef CONFIG_HIGHPROFILE | ||
30 | /* Timer2 is to be used as a high speed profile timer */ | ||
31 | writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3, | ||
32 | MCF_MBAR + MCFSIM_TIMER2ICR); | ||
33 | mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2); | ||
34 | #endif | ||
35 | } | ||
36 | |||
37 | /***************************************************************************/ | ||
38 | |||
39 | void m5407_cpu_reset(void) | 22 | void m5407_cpu_reset(void) |
40 | { | 23 | { |
41 | local_irq_disable(); | 24 | local_irq_disable(); |
@@ -51,7 +34,6 @@ void __init config_BSP(char *commandp, int size) | |||
51 | { | 34 | { |
52 | mach_reset = m5407_cpu_reset; | 35 | mach_reset = m5407_cpu_reset; |
53 | mach_sched_init = hw_timer_init; | 36 | mach_sched_init = hw_timer_init; |
54 | m5407_timers_init(); | ||
55 | 37 | ||
56 | /* Only support the external interrupts on their primary level */ | 38 | /* Only support the external interrupts on their primary level */ |
57 | mcf_mapirq2imr(25, MCFINTC_EINT1); | 39 | mcf_mapirq2imr(25, MCFINTC_EINT1); |
diff --git a/arch/m68k/platform/coldfire/timers.c b/arch/m68k/platform/coldfire/timers.c index d0b4e9798fde..ed96ce50d79f 100644 --- a/arch/m68k/platform/coldfire/timers.c +++ b/arch/m68k/platform/coldfire/timers.c | |||
@@ -51,6 +51,25 @@ static irq_handler_t timer_interrupt; | |||
51 | 51 | ||
52 | /***************************************************************************/ | 52 | /***************************************************************************/ |
53 | 53 | ||
54 | static void init_timer_irq(void) | ||
55 | { | ||
56 | #ifdef MCFSIM_ICR_AUTOVEC | ||
57 | /* Timer1 is always used as system timer */ | ||
58 | writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3, | ||
59 | MCF_MBAR + MCFSIM_TIMER1ICR); | ||
60 | mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1); | ||
61 | |||
62 | #ifdef CONFIG_HIGHPROFILE | ||
63 | /* Timer2 is to be used as a high speed profile timer */ | ||
64 | writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3, | ||
65 | MCF_MBAR + MCFSIM_TIMER2ICR); | ||
66 | mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2); | ||
67 | #endif | ||
68 | #endif /* MCFSIM_ICR_AUTOVEC */ | ||
69 | } | ||
70 | |||
71 | /***************************************************************************/ | ||
72 | |||
54 | static irqreturn_t mcftmr_tick(int irq, void *dummy) | 73 | static irqreturn_t mcftmr_tick(int irq, void *dummy) |
55 | { | 74 | { |
56 | /* Reset the ColdFire timer */ | 75 | /* Reset the ColdFire timer */ |
@@ -113,6 +132,7 @@ void hw_timer_init(irq_handler_t handler) | |||
113 | clocksource_register_hz(&mcftmr_clk, FREQ); | 132 | clocksource_register_hz(&mcftmr_clk, FREQ); |
114 | 133 | ||
115 | timer_interrupt = handler; | 134 | timer_interrupt = handler; |
135 | init_timer_irq(); | ||
116 | setup_irq(MCF_IRQ_TIMER, &mcftmr_timer_irq); | 136 | setup_irq(MCF_IRQ_TIMER, &mcftmr_timer_irq); |
117 | 137 | ||
118 | #ifdef CONFIG_HIGHPROFILE | 138 | #ifdef CONFIG_HIGHPROFILE |