diff options
author | Rabin Vincent <rabin@rab.in> | 2015-02-08 10:15:19 -0500 |
---|---|---|
committer | Jesper Nilsson <jespern@axis.com> | 2015-03-25 04:47:43 -0400 |
commit | 43f7071e107ede92ac9e499d218233c8bb4c3607 (patch) | |
tree | 4250af03dfd7a10aa3af8d3fac07dba4c530ca93 | |
parent | 8fda64c23c2a2d421704d349696565b3a8366864 (diff) |
CRISv32: add irq domains support
Add support for IRQ domains to the CRISv32 interrupt controller.
Signed-off-by: Rabin Vincent <rabin@rab.in>
Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
-rw-r--r-- | arch/cris/Kconfig | 1 | ||||
-rw-r--r-- | arch/cris/arch-v32/kernel/irq.c | 28 |
2 files changed, 26 insertions, 3 deletions
diff --git a/arch/cris/Kconfig b/arch/cris/Kconfig index 319660ed2994..c34561869856 100644 --- a/arch/cris/Kconfig +++ b/arch/cris/Kconfig | |||
@@ -53,6 +53,7 @@ config CRIS | |||
53 | select OLD_SIGSUSPEND | 53 | select OLD_SIGSUSPEND |
54 | select OLD_SIGACTION | 54 | select OLD_SIGACTION |
55 | select ARCH_REQUIRE_GPIOLIB | 55 | select ARCH_REQUIRE_GPIOLIB |
56 | select IRQ_DOMAIN if ETRAX_ARCH_V32 | ||
56 | 57 | ||
57 | config HZ | 58 | config HZ |
58 | int | 59 | int |
diff --git a/arch/cris/arch-v32/kernel/irq.c b/arch/cris/arch-v32/kernel/irq.c index 25437ae28128..bc871d2c594a 100644 --- a/arch/cris/arch-v32/kernel/irq.c +++ b/arch/cris/arch-v32/kernel/irq.c | |||
@@ -10,6 +10,8 @@ | |||
10 | #include <linux/errno.h> | 10 | #include <linux/errno.h> |
11 | #include <linux/init.h> | 11 | #include <linux/init.h> |
12 | #include <linux/profile.h> | 12 | #include <linux/profile.h> |
13 | #include <linux/of.h> | ||
14 | #include <linux/of_irq.h> | ||
13 | #include <linux/proc_fs.h> | 15 | #include <linux/proc_fs.h> |
14 | #include <linux/seq_file.h> | 16 | #include <linux/seq_file.h> |
15 | #include <linux/threads.h> | 17 | #include <linux/threads.h> |
@@ -431,6 +433,19 @@ crisv32_do_multiple(struct pt_regs* regs) | |||
431 | irq_exit(); | 433 | irq_exit(); |
432 | } | 434 | } |
433 | 435 | ||
436 | static int crisv32_irq_map(struct irq_domain *h, unsigned int virq, | ||
437 | irq_hw_number_t hw_irq_num) | ||
438 | { | ||
439 | irq_set_chip_and_handler(virq, &crisv32_irq_type, handle_simple_irq); | ||
440 | |||
441 | return 0; | ||
442 | } | ||
443 | |||
444 | static struct irq_domain_ops crisv32_irq_ops = { | ||
445 | .map = crisv32_irq_map, | ||
446 | .xlate = irq_domain_xlate_onecell, | ||
447 | }; | ||
448 | |||
434 | /* | 449 | /* |
435 | * This is called by start_kernel. It fixes the IRQ masks and setup the | 450 | * This is called by start_kernel. It fixes the IRQ masks and setup the |
436 | * interrupt vector table to point to bad_interrupt pointers. | 451 | * interrupt vector table to point to bad_interrupt pointers. |
@@ -441,6 +456,8 @@ init_IRQ(void) | |||
441 | int i; | 456 | int i; |
442 | int j; | 457 | int j; |
443 | reg_intr_vect_rw_mask vect_mask = {0}; | 458 | reg_intr_vect_rw_mask vect_mask = {0}; |
459 | struct device_node *np; | ||
460 | struct irq_domain *domain; | ||
444 | 461 | ||
445 | /* Clear all interrupts masks. */ | 462 | /* Clear all interrupts masks. */ |
446 | for (i = 0; i < NBR_REGS; i++) | 463 | for (i = 0; i < NBR_REGS; i++) |
@@ -449,10 +466,15 @@ init_IRQ(void) | |||
449 | for (i = 0; i < 256; i++) | 466 | for (i = 0; i < 256; i++) |
450 | etrax_irv->v[i] = weird_irq; | 467 | etrax_irv->v[i] = weird_irq; |
451 | 468 | ||
452 | /* Point all IRQ's to bad handlers. */ | 469 | np = of_find_compatible_node(NULL, NULL, "axis,crisv32-intc"); |
470 | domain = irq_domain_add_legacy(np, NR_IRQS - FIRST_IRQ, | ||
471 | FIRST_IRQ, FIRST_IRQ, | ||
472 | &crisv32_irq_ops, NULL); | ||
473 | BUG_ON(!domain); | ||
474 | irq_set_default_host(domain); | ||
475 | of_node_put(np); | ||
476 | |||
453 | for (i = FIRST_IRQ, j = 0; j < NR_IRQS; i++, j++) { | 477 | for (i = FIRST_IRQ, j = 0; j < NR_IRQS; i++, j++) { |
454 | irq_set_chip_and_handler(j, &crisv32_irq_type, | ||
455 | handle_simple_irq); | ||
456 | set_exception_vector(i, interrupt[j]); | 478 | set_exception_vector(i, interrupt[j]); |
457 | } | 479 | } |
458 | 480 | ||